
1
2
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MS-7091
Version 1.20
Intel (R) Grantsdale (GMCH) + ICH6 Chipset
Title
A A
B B
C C
COVER SHEET
BLOCK DIAGRAM
Intel LGA775
Intel Grantsdale
ICH6
ICS954119DF Clock Gen
LPC I/O - W83637HF
FWH/FAN/SATA
LAN - VT 6106L
IEEE1394 VT-6307
Azalia Codec (CMI9880L)
PCI -Express X16 Slot
DDR I DIMM 1 & 2 Channel A
DDR I DIMM 3 & 4 Channel B
DDR VTT Decoupling
PCI Slot 1,2,3
ATX ,Front Panel,IDE
USB CONNECTORS
MS7 ACPI Controller
Intersil 6565 3Phase
Misc
MANUAL PARTS
POWER MAP
HISTORY 31
Page
1
2
3 , 4 , 5
6 , 7 , 8 , 9
10,11,12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
Intel Tejas & Prescott LGA775 Processor
CPU:
Intel Tejas/Prescott - 3.6G & Above
System Chipset:
Intel Grantsdale - GMCH (North Bridge)
Intel ICH6 (South Bridge)
On Board Chipset:
BIOS -- FWH EEPROM
AC'97 Codec -- CM9880L
LPC Super I/O -- W83637HF
LAN -- VIA VT6106L
EEE1394 -- VIA VT6307
CLOCK -- ICS954119DF
Main Memory:
DDR I * 4 (Max 4GB)
Expansion Slots:
PCI EXPRESS X16 SLOT * 1
PCI 1.2.3 SLOT * 3
Intersil PWM:
PCI Routing Table
PCI Device
D D
PCI Slot 1
PCI Slot 2
(Add MEDION SPEC)
PCI Slot 3
EEE1394 VT6307
LAN VT6105
1
AD16
AD17
AD20
AD18
AD19 4 D
AD22
0
1
3
5FAD21
2
6
INTERRUPTIDSEL REQ/GNT
A
B
E
C
C
2
3
Controller: HIP6565 3 Phase
Driver: HIP6602B * 1 + HIP6601B * 1
Title
COVER SHEET
Size Document Number Rev
A3
4
Date: Sheet
MICRO-START INT'L CO.,LTD .
MS-7091 1.20
131Wednesday, December 01, 2004
5
of

1
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3
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5
VRM_GD
VTT_PWG
A A
PCIRST#1
B B
HD_RST#
VRM 10.1
Intersil 6565
3-Phase PWM
PCI
EXPRESS
X16
Connector
Analog
Video
Out
IDE Primary
IDE Primary
SERIAL ATA1
SERIAL ATA2
P.28
P.15
P.19
P.18
P.18
P.18
P.18
UltraDMA
33/66/100
Intel LGA775 Processor
FSB
H_PWRGD
H_CPURST#
Grantsdale-G
P.6~9
DMI
PLRST#
VRM_GD
ICH6
P.10~12
CHANNEL A
CHANNEL B
PWR_GD
SLP_S4#
SLP_S3#
P.3~5
Block Diagram
2 DDR1
DIMM
Modules
P.20
2 DDR1
DIMM
Modules
P.21
PCIRST_ICH6#
PCI
PWR_GD
PCIRST#1
PCI Slot 1
PCI Slot 2
MS7
PCI Slot 3
VID_GD
RSMRST#
HD_RST#
PCIRST#2
P.25
P.16
USB
RSMRST#
LPC Bus
PCIRST#2
LPC SIO
W83627THF
P.14
USB2.0
C C
USB Port0~ 7
C MEDIA
Azalia Codec
ATX1
PWR_OK
P.23 P.23 P.15
LAN
VT6105L
PCIRST#1
1394
VIA VT-6307
D D
1
P.17
P.26
PCI
FWH
P.30
FP_RST#SW_ON#
JFP1
2
Keyboard
Mouse
PCIRST_ICH6#
3
Floopy Parallel Serial
P.14
P.14
P.14 P.18 P.18
Title
BLOCK DIAGRAM
Size Document Number Rev
A3
4
Date: Sheet
MICRO-START INT'L CO.,LTD .
MS-7091 1.20
231Wednesday, December 01, 2004
5
of

1
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3
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5
VID Pull-Up Resistor
CPU SIGNAL BLOCK
R87 X_0/0402
A A
C66 X_104P
R92
X_1K/0402
H_DBI#0
H_DBI#1
H_DBI#2
H_DBI#3
H_TDI
H_TDO
H_TMS
H_TRST#
H_TCK
CPU_BOOT
LL_ID0
H_D#63
H_D#62
H_D#61
H_D#60
H_D#59
H_D#58
H_D#57
H_D#56
H_D#55
H_D#54
H_DBI#06
H_DBI#16
H_DBI#26
H_DBI#36
H_EDRDY#6
H_IERR#4
H_FERR#4,10
H_STPCLK#10
H_INIT#10
H_DBSY#6
B B
C C
VTT_OUT_RIGHT
H_D#[0..63]6
D D
H_DRDY#6
H_TRDY#6
H_ADS#6
H_LOCK#6
H_BNR#6
H_HIT#6
H_HITM#6
H_BPRI#6
H_DEFER#6
10/10 parallel
CPU_TMPA14
VTIN_GND14
TRMTRIP#4,10
H_PROCHOT#4,19
H_IGNNE#10
ICH_H_SMI#10
H_A20M#10
H_SLP#10
LL_ID027
H_FSBSEL04,8,13
H_FSBSEL14,8,13
H_FSBSEL24,8,13
H_PWRGD4,10
H_CPURST#4,6
G11
D19
C20
AB2
AB3
AD3
AD1
AF1
AC1
AG1
AE1
AL1
AK1
AE8
AL2
AH2
AE6
G10
D16
A20
AA2
G29
H30
G30
G23
B22
A22
A19
B19
B21
C21
B18
A17
B16
C18
A8
F2
R3
M3
P3
H4
B2
C1
E3
D2
C3
C2
D4
E4
G8
G7
M2
N2
P2
K3
L2
N5
C9
Y1
V2
N1
H_A#[3..31]6
U9A
DBI0#
DBI1#
DBI2#
DBI3#
EDRDY#
IERR#
MCERR#
FERR#/PBE#
STPCLK#
BINIT#
INIT#
RSP#
DBSY#
DRDY#
TRDY#
ADS#
LOCK#
BNR#
HIT#
HITM#
BPRI#
DEFER#
TDI
TDO
TMS
TRST#
TCK
THERMDA
THERMDC
THERMTRIP#
GND/SKTOCC#
PROCHOT#
IGNNE#
SMI#
A20M#
SLP#
RSVD
RESERVED0
RESERVED1
RESERVED2
RESERVED3
RESERVED4
RESERVED5
BOOTSELECT
LL_ID0
LL_ID1
BSEL0
BSEL1
BSEL2
PWRGOOD
RESET#
D63#
D62#
D61#
D60#
D59#
D58#
D57#
D56#
D55#
D54#
D53#
B15
H_A#8
H_A#6
H_A#3
H_A#5
H_A#7
H_A#4
A7#
D20#
A6#
D19#
A5#
D18#
A4#
D17#
A3#
D16#
FP_RST_R#
AC2
AN3
AN4
AN5
AN6
AJ3
AK3
DBR#
RSVD
RSVD
ITP_CLK1
ITP_CLK0
VSS_SENSE
VCC_SENSE
D15#
D14#
D13#
D12#
D11#
D10#
D9#
D8#
D7#
D6#
C12
B12D8C11
B10
A11
A10A7B7B6A5C6A4C5B4
H_A#27
AF5
E19
H_A#21
H_A#23
H_A#26
H_A#25
H_A#24
H_A#19
H_A#20
H_A#18
H_A#17
H_A#22
AB4
AC5
AB5
AA5
AD6
AA4Y4Y6W6AB6W5V4V5U4U5T4U6T5R4M4L4M5P6L5
A27#
A26#
A25#
A24#
A23#
A22#
A21#
A20#
A19#
A18#
A17#
D40#
D39#
D38#
D37#
D36#
D35#
D34#
D33#
D32#
D31#
D30#
E18
F18
F17
G17
G18
E16
E15
G16
G15
F15
H_A#30
H_A#31
H_A#29
H_A#28
AJ6
AJ5
AH5
AH4
AG5
AG4
AG6
AF4
A35#
A34#
A33#
A32#
A31#
A30#
A29#
A28#
D52#
D51#
D50#
D49#
D48#
D47#
D46#
D45#
D44#
D43#
D42#
D41#
C14
C15
A14
D17
D20
G22
D22
E22
G21
F21
E21
F20
H_A#16
G14
H_A#15
A16#
D29#
F14
H_A#14
A15#
D28#
G13
H_A#13
A14#
D27#
E13
H_A#12
A13#
D26#
D13
H_A#11
A12#
D25#
A11#
D24#
F12
H_A#10
A9#
A10#
D23#
D22#
F11
D10
E10D7E9F9F8G9D11
A8#
D21#
H_A#9
VCC_VRM_SENSE
VSS_VRM_SENSE
TP2
H_VID4
H_VID5
TP_VID6
AM5
AL4
AK4
AM7
VID6#
VID5#
VID4#
VID7#
VID_SELECT
GTLREF_SEL
LINT0/INTR
D5#
D4#
D3#
D2#
D1#
FP_RST#
H_VID0
H_VID1
H_VID2
H_VID3
AL6
AM3
AL5
AM2
VID3#
VID2#
VID1#
VID0#
GTLREF0
GTLREF1
BPM5#
BPM4#
BPM3#
BPM2#
BPM1#
BPM0#
PCREQ#
REQ4#
REQ3#
REQ2#
REQ1#
REQ0#
TESTHI12
TESTHI11
TESTHI10
TESTHI9
TESTHI8
TESTHI7
TESTHI6
TESTHI5
TESTHI4
TESTHI3
TESTHI2
TESTHI1
TESTHI0
RSVD
RSVD
BCLK1#
BCLK0#
RS2#
RS1#
RS0#
AP1#
AP0#
BR0#
COMP5
COMP4
COMP3
COMP2
COMP1
COMP0
DP3#
DP2#
DP1#
DP0#
ADSTB1#
ADSTB0#
DSTBP3#
DSTBP2#
DSTBP1#
DSTBP0#
DSTBN3#
DSTBN2#
DSTBN1#
DSTBN0#
LINT1/NMI
D0#
ZIF-SOCK775-15u
FP_RST# 11,24
VCC_VRM_SENSE 27
VSS_VRM_SENSE 27
H_VID[0..5] 27
VID_SELECT
AN7
CPU_GTLREF
H1
H2
GTLREF_SEL
H29
H_BPM#5
AG3
H_BPM#4
AF2
H_BPM#3
AG2
H_BPM#2
AD2
H_BPM#1
AJ1
H_BPM#0
AJ2
H_PCREQ#
G5
H_REQ#4
J6
H_REQ#3
K6
H_REQ#2
M6
H_REQ#1
J5
H_REQ#0
K4
H_TESTHI12
W2
H_TESTHI11
P1
H_TESTHI10
H5
H_TESTHI9
G4
H_TESTHI8
G3
F24
G24
G26
G27
G25
H_TESTHI2_7
F25
H_TESTHI1
W3
H_TESTHI0
F26
RSVD_AK6
AK6
RSVD_G6
G6
G28
F28
H_RS#2
A3
H_RS#1
F5
H_RS#0
B3
U3
U2
F3
H_COMP5
T2
H_COMP4 VTT_OUT_LEFT
J2
H_COMP3
R1
H_COMP2
G2
H_COMP1
T1
H_COMP0
A13
J17
H16
H15
J16
AD5
R6
C17
G19
E12
B9
A16
G20
G12
C8
L1
K1
TP1
H_PCREQ# 6
H_REQ#4 6
H_REQ#3 6
H_REQ#2 6
H_REQ#1 6
H_REQ#0 6
R99 62/0402
R149 62/0402
R94 62/0402
R153 62/0402
R79 X_62/0402
R109 X_62/0402
TP4
TP3
R100 X_60.4RST/0402
R110 X_60.4RST/0402
R104 100RST/0402
R112 100RST/0402
R95 60.4RST/0402
R151 60.4RST/0402
TP5
TP8
TP7
TP6
CPU_GTLREF 4
GTLREF_SEL 6
H_TESTHI10
H_TESTHI11
H_TESTHI9
H_TESTHI8
V_FSB_VTT
VTT_OUT_LEFT
V_FSB_VTT
VTT_OUT_RIGHT
VTT_OUT_LEFT
CK_H_CPU# 13
CK_H_CPU 13
H_RS#2 6
H_RS#1 6
H_RS#0 6
H_ADSTB#1 6
H_ADSTB#0 6
H_DSTBP#3 6
H_DSTBP#2 6
H_DSTBP#1 6
H_DSTBP#0 6
H_DSTBN#3 6
H_DSTBN#2 6
H_DSTBN#1 6
H_DSTBN#0 6
H_NMI 10
H_INTR 10
VTT_OUT_LEFT
7 8
5 6
3 4
1 2
RN19 8P4R-62/0402
H_BR#0 4,6
C84
PLACE RESISTORS OUTSIDE SOCKET
CAVITY IF NO ROOM FOR VARIABLE
RESISTOR DON'T PLACE
VTT_OUT_RIGHT
H_VID3
H_VID1
H_VID2
H_VID4
H_VID0
R68 680/0402
H_VID5
R72 680/0402
H_TRST#
R80 49.9RST/0402
H_TCK
R82 49.9RST/0402
H_TMS
R90 49.9RST/0402
RN13
H_BPM#4
H_TDO
H_BPM#2
H_TDI
H_BPM#3
H_BPM#5
H_BPM#1
H_BPM#0
V_FSB_VTT 4,6,8,12,13,26,27
VTT_OUT_RIGHT 4
X_104P
8P4R-51/0402
1 2
3 4
5 6
7 8
7 8
5 6
3 4
1 2
RN8
8P4R-51/0402
VTT_OUT_LEFT 4
RN3
8P4R-680
1
3
5
7
2
4
6
8
R172
X_249R/1%
GTLREF_SEL
Q28
X_2N7002S
VTT_OUT_RIGHT
C50 104P
C54 104P
VCC3
R173
X_110R/1%
H_TESTHI0
R174
X_61.9R/1%
H_D#25
H_D#23
H_D#19
H_D#43
H_D#51
H_D#53
1
H_D#46
H_D#49
H_D#50
H_D#52
H_D#45
H_D#48
H_D#44
H_D#47
2
H_D#37
H_D#40
H_D#39
H_D#38
H_D#41
H_D#42
H_D#30
H_D#27
H_D#28
H_D#29
H_D#31
H_D#36
H_D#32
H_D#34
H_D#35
H_D#33
H_D#22
H_D#26
H_D#24
H_D#15
H_D#16
H_D#21
H_D#20
H_D#18
H_D#17
H_D#10
H_D#12
H_D#11
H_D#14
H_D#13
H_D#8
H_D#7
H_D#9
3
H_D#0
H_D#4
H_D#1
H_D#6
H_D#3
H_D#2
H_D#5
4
Title
Intel LGA775 - Signals
Size Document Number Rev
A3
Date: Sheet
MICRO-START INT'L CO.,LTD .
MS-7091 1.20
331Wednesday, December 01, 2004
5
of

1
VCCP
AH15
AH14
AH12
AH11
AG9
AG8
AG30
AG29
AG28
AG27
AG26
AG25
AG22
AG21
AG19
AG18
AG15
AG14
AG12
AG11
AF9
AF8
AF22
AF21
AF19
AF18
AF15
AF14
AF12
AF11
AE9
AE23
AE22
AE21
AE19
AE18
AE15
AE14
AE12
AE11
AD8
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AC8
AC30
AC29
AC28
AC27
AC26
AC25
AC24
AC23
AB8
AA8
VCCP
U9B
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
U27
U28
U29
U30U8V8
W23
W24
W25
W26
W27
W28
W29
W30W8Y23
Y24
Y25
Y26
Y27
Y28
Y29
Y30
Y8
A A
B B
VCCP
VCC
VCC
AH18
VCC
VCC
U26
AH19
VCC
VCC
U25
AH21
VCC
VCC
U24
AH22
VCC
VCC
AH25
VCC
VCC
2
AH26
VCC
VCC
T30T8U23
AH27
VCC
VCC
T29
AH28
VCC
VCC
T28
AH29
VCC
VCC
T27
AH30
VCC
VCC
T26
AH8
T25
VCC
VCC
AH9
T24
VCC
VCC
3
AJ11
AJ12
AJ14
AJ15
AJ18
AJ19
AJ21
AJ22
AJ25
AJ26
AJ8
AJ9
AK11
AK12
AK14
AK15
AK18
AK19
AK21
AK22
AK25
AK26
AK8
AK9
AL11
AL12
AL14
AL15
AL18
AL19
AL21
AL22
AL25
AL26
AL29
AL30
AL8
AL9
AM11
AM12
AM14
AM15
AM18
AM19
AM21
AM22
AM25
AM26
AM29
AM30
AM8
AM9
AN11
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
AN9
J10
J11
J12
J13
J14
J15
J18
J19
J20
J21
J22
J23
J24
J25
J26
J27
J28
J29
J30J8J9
K23
K24
K25
K26
K27
K28
K29
K30K8L8
M23
M24
M25
M26
M27
M28
M29
M30M8N23
N24
N25
N26
N27
N28
N29
N30N8P8R8T23
4
AN12
AN14
AN15
AN18
AN19
AN21
AN22
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC-IOPLL
VTTPWRGD
VTT_OUT_RIGHT
VTT_OUT_LEFT
VTT_SEL
RSVD/VTT_PKGSENSE
HS1
VCC
VCC
VCC
VCC
VCC
VCC
AN25
AN26
AN29
AN30
AN8
123
HS2
VCCA
VSSA
RSVD
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
HS3
HS4
4
H_VCCA
A23
H_VSSA
B23
TP_VCCPLL
D23
H_VCCIOPLL
C23
A25
A26
A27
A28
A29
A30
B25
B26
B27
B28
B29
B30
C25
C26
C27
C28
C29
C30
D25
D26
D27
D28
VCCFUSEPRG
D29
VIDFUSEPRG
D30
VTT_PWG
AM6
VTT_OUT_RIGHT
AA1
VTT_OUT_LEFT
J1
VTT_SEL
F27
F29
ZIF-SOCK775-15u
TP12
V_FSB_VTT
R154 X_1K/0402
R155
X_0/0402
V_FSB_VTT 3,6,8,12,13,26,27
VTT_OUT_RIGHT 3
VTT_OUT_LEFT 3
VCC3
5
It must close bulk caps.
C166 X_106P/0805
C C
100 OHMS OVER 210 OHMS RESISTORS
VTT_OUT_LEFT
GTLREF VOLTAGE SHOULD BE
0.67*VTT = 0.8V
R97
49.9RST/0402
R98
100RST/0402
V_FSB_VTT
C141 106P/0805
C180 106P/0805
CPU_GTLREF
C65
105P
C88
X_222P
CPU_GTLREF 3
DC voltage drop should
be less than 70mV.
PLACE AT CPU END OF ROUTE
VTT_OUT_RIGHT
VTT_OUT_LEFT
D D
V_FSB_VTT
R74 62/0402
R69 120/0402
R105 100RST/0402
R114 62/0402
R113 62/0402
PLACE AT ICH END OF ROUTE
V_FSB_VTT
RN59 8P4R-62/0402
1
12
34
56
78
H_CPURST#
H_PROCHOT#
H_PWRGD
H_BR#0
H_IERR#
TRMTRIP#
H_FERR#
H_CPURST# 3,6
H_PROCHOT# 3,19
H_PWRGD 3,10
H_BR#0 3,6
H_IERR# 3
FSBSEL RESISTOR CAN BE REMOVED IF ONLY TEAJS
AND CEDAR MILL ARE SUPPORTED
TRMTRIP# 3,10
H_FERR# 3,10 H_FSBSEL0 3,8,13
2
V_FSB_VTT
3
It support DC current if 125mA.
V_FSB_VTT
VID_GD#26,27
RN36
8P4R-470
12
34
56
78
L4 X_10uH/8
S4
L3 X_10uH/8
S3
H_FSBSEL0
H_FSBSEL1
H_FSBSEL2
12
12
VCC5_SB
VTT_OUT_LEFT
R52
1K/0402
R55 1K
H_FSBSEL1 3,8,13
H_FSBSEL2 3,8,13
4
EC38
22u/6.3V/1206
R58
680/0402
SOT23EBC
ECB
EC39
X_106P/0805
1.25V VTT_PWRGOOD
VTT_PWG
Q12
MMBT3904
Title
Size Document Number Rev
A3
Date: Sheet
H_VCCIOPLL
H_VSSA
C125
105P
H_VCCA
MICRO-START INT'L CO.,LTD .
Intel LGA775 - Power
MS-7091 1.20
431Wednesday, December 01, 2004
5
of

1
2
3
4
5
A A
AC4
AE3
U9C
RSVD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AE29
VSS
AE30
RSVD
VSS
AE5
A12
A15
A18
A2
A21
A24
A6
A9
AA23
AA24
AA25
AA26
AA27
B B
C C
AA28
AA29
AA3
AA30
AA6
AA7
AB1
AB23
AB24
AB25
AB26
AB27
AB28
AB29
AB30
AB7
AC3
AC6
AC7
AD4
AD7
AE10
AE13
AE16
AE17
AE2
AE20
AE24
AE25
AE26
AE27
AE28
TP13
TP10
TP9
E23
E24E5E6E7F23F6B13J3N4P5V1W1Y3Y7Y5Y2W7W4V7V6V30V3V29
VSS
RSVD
VSS
AG10
RSVD
VSS
AG13
RSVD
VSS
AG16
VSS
AG17
VSS
AG20
VSS
VSS
AG23
AG24
RSVD
VSS
AF16
RSVD
VSS
AF17
RSVD
VSS
AF20
RSVD
VSS
AF23
RSVD
VSS
AF24
RSVD
VSS
AF25
RSVD
VSS
AF26
RSVD
VSS
AF27
VSS
AF28
VSS
AF29
RSVD
VSS
AF3
RSVD
VSS
AF30
AF6
RSVD
VSS
AF7
AE4D1D14
RSVD
VSS
AE7
RSVD
VSS
AF10
TP11
RSVD
VSS
AF13
VSS
VSS
AG7
VSS
VSS
AH1
VSS
VSS
VSS
VSS
AH10
VSS
VSS
AH13
VSS
VSS
AH16
VSS
VSS
AH17
VSS
VSS
AH20
VSS
VSS
AH23
V28
VSS
VSS
AH24
V27
VSS
VSS
AH3
V26
V25
V24
V23U7U1T7T6T3R7R5R30
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AH6
AH7
AJ10
AJ13
H17
H18
H19
H20
H21
H22
H23
H24
H25
H26
H27
VSS
AN1
VSS
VSS
VSS
VSS
AN10
VSS
VSS
AN13
VSS
VSS
AN16
VSS
AN17
H28H3H6H7H8H9J4J7K2
AN2
VSS
VSS
VSS
VSS
AN20
VSS
VSS
AN23
VSS
VSS
AN24
AN27
VSS
VSS
VSS
VSS
VSS
AN28B1B11
VSS
VSS
VSS
VSS
VSS
VSS
B14
VSS
VSS
H14
VSS
H13
VSS
H12
VSS
H11
VSS
H10
VSS
G1
VSS
F7
VSS
F4
VSS
F22
VSS
F19
VSS
F16
VSS
F13
VSS
F10
VSS
E8
VSS
E29
VSS
E28
VSS
E27
VSS
E26
VSS
E25
VSS
E20
VSS
E2
VSS
E17
VSS
E14
VSS
E11
VSS
D9
VSS
D6
VSS
D5
VSS
D3
VSS
D24
VSS
D21
VSS
D18
VSS
D15
VSS
D12
VSS
C7
VSS
C4
VSS
C24
VSS
C22
VSS
C19
VSS
C16
VSS
C13
VSS
C10
VSS
B8
VSS
B5
VSS
B24
VSS
B20
VSS
B17
VSS
ZIF-SOCK775-15u
R29
R28
R27
R26
R25
R24
R23R2P7P4P30
P29
P28
P27
P26
P25
P24
P23N7N6N3M7M1L7L6L30L3L29
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AJ16
AJ17
AJ20
AJ23
AJ24
AJ27
AJ28
AJ29
AJ30
AJ4
AJ7
AK10
AK13
AK16
AK17
AK2
AK20
AK23
AK24
AK27
AK28
AK29
AK30
AK5
AK7
AL10
AL13
AL16
AL17
AL20
VSS
VSS
AL23
VSS
VSS
AL24
VSS
VSS
AL27
VSS
VSS
AL28
AL3
VSS
VSS
AL7
VSS
VSS
L28
L27
L26
L25
L24
L23K7K5
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AM16
AM17
AM20
AM23
AM24
AM27
AM28
AM4
VSS
VSS
VSS
VSS
AM1
AM10
AM13
D D
Title
Intel LGA775- GND
Size Document Number Rev
A3
1
2
3
4
Date: Sheet
MICRO-START INT'L CO.,LTD .
MS-7091 1.20
531Wednesday, December 01, 2004
5
of

1
AC11
AB11
Y20
Y19
Y17
Y16
W20
W16
U20
VCCNCTF
VCCNCTF
RSVRD
RSVRD
AK21
AK24
AL21
VCCNCTF
VCCNCTF
VCCNCTF
RSVRD
RSVRD
RSVRD
AL20
AK18
AJ24
U16
VCCNCTF
RSVRD
AJ23
M30
M28
M26
M35
M31
M32
M23
M22
AG7
M14
H29
K29
G30
G32
K30
K27
K33
R29
N26
N31
P26
N29
P28
R28
N33
T27
T31
U28
T26
T29
N27
E31
R33
E30
F33
E32
H31
G31
F31
N35
N34
P33
K34
P34
G24
AF7
B23
D24
A23
A24
J29
L29
L31
L28
J28
L26
J31
L33
L34
J35
L35
J32
U11A
HA3#
HA4#
HA5#
HA6#
HA7#
HA8#
HA9#
HA10#
HA11#
HA12#
HA13#
HA14#
HA15#
HA16#
HA17#
HA18#
HA19#
HA20#
HA21#
HA22#
HA23#
HA24#
HA25#
HA26#
HA27#
HA28#
HA29#
HA30#
HA31#
HAD_STB0#
HAD_STB1#
HPCREQ#
BREQ0#
BPRI#
BNR#
HLOCK#
ADS#
HREQ0#
HREQ1#
HREQ2#
HREQ3#
HREQ4#
HIT#
HITM#
DEFER#
HTRDY#
DBSY#
DRDY#
HEDRDY#
RS0#
RS1#
RS2#
HCLKP
HCLKN
PWROK
CPURST#
RSTIN#
ICH_SYNC#
HDRCOMP
HDSCOMP
HDSWING
HDVREF
VCCNCTF
VCCNCTF
VCCNCTF
RSVRD
AJ21
H_A#3 H_D#0
H_A#33
H_A#4
H_A#43
H_A#5
H_A#53
H_A#6
H_A#63
A A
H_ADSTB#03
H_ADSTB#13
B B
C C
V_2P5_MCH
V_1P5_CORE
C238
C217
H_PCREQ#3
H_DEFER#3
H_TRDY#3
H_DBSY#3
H_DRDY#3
H_EDRDY#3
CK_H_MCH13
CK_H_MCH#13
H_CPURST#3,4
ICH_SYNC#11
R429 8.2K
20RST/0402
R207
106P/0805
106P/0805
H_BR#03,4
H_BPRI#3
H_BNR#3
H_LOCK#3
H_ADS#3
H_REQ#03
H_REQ#13
H_REQ#23
H_REQ#33
H_REQ#43
H_HIT#3
H_HITM#3
H_RS#03
H_RS#13
H_RS#23
PWR_GD11,26
PLTRST#10
H_A#73
H_A#83
H_A#93
H_A#103
H_A#113
H_A#123
H_A#133
H_A#143
H_A#153
H_A#163
H_A#173
H_A#183
H_A#193
H_A#203
H_A#213
H_A#223
H_A#233
H_A#243
H_A#253
H_A#263
H_A#273
H_A#283
H_A#293
H_A#303
H_A#313
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_RS#0
H_RS#1
H_RS#2
HRCOMP
HSCOMP
HSWING
MCH_GTLREF
T20
T19
T17
VCCNCTF
VCCNCTF
VCCNCTF
RSVRD
RSVRD
RSVRD
AJ18
AJ20
V31
2
T16
AA13
AA14
VCCNCTF
VCCNCTF
VCCNCTF
RSVRD
RSVRD
RSVRD
V30
U30
V32
AA16
AA18
AA20
VCCNCTF
VCCNCTF
VCCNCTF
RSVRD
RSVRD
RSVRD
Y30
AB29
R31
AA21
AA22
AA23
VCCNCTF
VCCNCTF
VCCNCTF
RSVRD
RSVRD
RSVRD
R30
AA31
AA30
V_1P5_CORE
AA24
AB13
AB14
VCCNCTF
VCCNCTF
VCCNCTF
RSVRD
RSVRD
RSVRD
AC12
AC13
AC14
AB15
AB16
AB17
VCCNCTF
VCCNCTF
VCCNCTF
RSVRD
RSVRD
RSVRD
AC15
AC16
AC17
3
AB18
AB19
AB20
AB21
AB22
AB23
AB24
N13
N14
N15
N16
N18
N20
N21
P13
P14
P15
P17
P19
P21
P22
R13
R14
R15
R16
R18
R20
R22
R23
T13
T14
T15
T21
T23
T24
U13
U14
U22
U24
V13
V14
V15
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRDNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNC
AC18
AC19
AC20
AC21
AC22
N12
N22
N23
N24
P12
P23
P24
R12
R24
T12
U12
V12
W12
Y12
AA12
AB12
AC23
AC24
AN19
AL28
AJ14
AH24
AG6
AD30
P30
L19
L12
K12
J12
H17
H15
H12
G12
F24
F12
E16
V21
V23
V24
VCCNCTF
VCCNCTF
VCCNCTF
C16
AR35
AR34
W13
W14
W22
VCCNCTF
VCCNCTF
VCCNCTF
AR2
AR1
AP35
W24
Y13
Y14
VCCNCTF
VCCNCTF
VCCNCTF
AP1
B35B1A34
4
Y15
Y21
Y23
VCCNCTF
VCCNCTF
VCCNCTF
NC
Grantsdale_P
A2
Y24
VCCNCTF
VCCNCTF
DINV_0#
DINV_1#
DINV_2#
DINV_3#
HD_STBP0#
HD_STBN0#
HD_STBP1#
HD_STBN1#
HD_STBP2#
HD_STBN2#
HD_STBP3#
HD_STBN3#
HD0#
HD1#
HD2#
HD3#
HD4#
HD5#
HD6#
HD7#
HD8#
HD9#
HD10#
HD11#
HD12#
HD13#
HD14#
HD15#
HD16#
HD17#
HD18#
HD19#
HD20#
HD21#
HD22#
HD23#
HD24#
HD25#
HD26#
HD27#
HD28#
HD29#
HD30#
HD31#
HD32#
HD33#
HD34#
HD35#
HD36#
HD37#
HD38#
HD39#
HD40#
HD41#
HD42#
HD43#
HD44#
HD45#
HD46#
HD47#
HD48#
HD49#
HD50#
HD51#
HD52#
HD53#
HD54#
HD55#
HD56#
HD57#
HD58#
HD59#
HD60#
HD61#
HD62#
HD63#
J33
H33
J34
G35
H35
G34
F34
G33
D34
C33
D33
B34
C34
B33
C32
B32
E28
C30
D29
H28
G29
J27
F28
F27
E27
E25
G25
J25
K25
L25
L23
K23
J22
J24
K22
J21
M21
H23
M19
K21
H20
H19
M18
K18
K17
G18
H18
F17
A25
C27
C31
B30
B31
A31
B27
A29
C28
A28
C25
C26
D27
A27
E24
B25
E34
J26
K19
B26
E33
E35
H26
F26
J19
F19
B29
C29
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
H_DBI#0
H_DBI#1
H_DBI#2
H_DBI#3
H_DSTBP#0 3
H_DSTBN#0 3
H_DSTBP#1 3
H_DSTBN#1 3
H_DSTBP#2 3
H_DSTBN#2 3
H_DSTBP#3 3
H_DSTBN#3 3
H_D#0 3
H_D#1 3
H_D#2 3
H_D#3 3
H_D#4 3
H_D#5 3
H_D#6 3
H_D#7 3
H_D#8 3
H_D#9 3
H_D#10 3
H_D#11 3
H_D#12 3
H_D#13 3
H_D#14 3
H_D#15 3
H_D#16 3
H_D#17 3
H_D#18 3
H_D#19 3
H_D#20 3
H_D#21 3
H_D#22 3
H_D#23 3
H_D#24 3
H_D#25 3
H_D#26 3
H_D#27 3
H_D#28 3
H_D#29 3
H_D#30 3
H_D#31 3
H_D#32 3
H_D#33 3
H_D#34 3
H_D#35 3
H_D#36 3
H_D#37 3
H_D#38 3
H_D#39 3
H_D#40 3
H_D#41 3
H_D#42 3
H_D#43 3
H_D#44 3
H_D#45 3
H_D#46 3
H_D#47 3
H_D#48 3
H_D#49 3
H_D#50 3
H_D#51 3
H_D#52 3
H_D#53 3
H_D#54 3
H_D#55 3
H_D#56 3
H_D#57 3
H_D#58 3
H_D#59 3
H_D#60 3
H_D#61 3
H_D#62 3
H_D#63 3
H_DBI#0 3
H_DBI#1 3
H_DBI#2 3
H_DBI#3 3
5
+12V
5 mils trace 8 mils space rout in
D D
same layer within 750 mils
V_FSB_VTT3,4,8,12,13,26,27
V_FSB_VTT HSCOMP V_FSB_VTT HSWING
1
R20360.4RST/0402
C168
X_2.2P
HD_SWING VOLTAGE "12 MIL TRACE , 10MIL
SPACE" HD_SWING S/B 1/4*VTT +/- 2%n
R206
301RST/0402
R212
102RST/0402
C170
103P
PLACE DIVIDER RESISTOR NEAR VTT
2
GTLREF_SEL3
VCCP
R184
X_10K
When install this circuit,must change
100R, 210R.
3
R148
X_619R1%
V_FSB_VTT
Q24
X_2N7002S
D S
G
GTLREF VOLTAGE SHOULD BE 0.67*VTT=0.8V
49.9 OHM OVER 100 RESISTORS
R202
49.9RST/0402
R200
100RST/0402
C164
X_104P
4
MCH_GTLREF
C165
104P
Title
Intel Grantsdale - CPU
Size Document Number Rev
A3
Date: Sheet
MICRO-START INT'L CO.,LTD .
MS-7091 1.20
631Wednesday, December 01, 2004
5
of

1
2
3
4
5
SADQ51
SBDQ49
DATA_A52
AD31
AB27
SADQ52
SBDQ50
DATA_A53
AD35
SADQ53
SBDQ51
AB26
DATA_A54
AA32
AE29
DQM_A[0..7]20
DQM_A3
DQM_A5
DQM_A1
DQM_A4
DATA_A56
DATA_A61
DATA_A62
DATA_A57
DATA_A60
DATA_A58
DATA_A55
Y35
V34
SADQ54
SADQ55
SBDQ52
SBDQ53
AE27
AC28
DATA_A63
DATA_A59
V33
R32
R34
W35
W33
T33
T35
SADQ56
SADQ57
SADQ58
SADQ59
SADQ60
SADQ61
SADQ62
SADQ63
SBDQ54
SBDQ55
SBDQ56
SBDQ57
SBDQ58
SBDQ59
SBDQ60
SBDQ61
AA29
SBDQ62
W29
U26
V29
Y26
AA28
W26
AC26
SCKE_A0
AL12
SACKE0
SBDQ63
V28
SCKE_A1
AN11
SACKE1
SCKE_A2
AP11
SACKE2
SBCKE0
AN10
SCKE_A3
AR11
SACKE3
SBCKE1
AM9
AP10
DQM_A2
DQM_A0
AF2
AL1
AN7
AH16
AK29
SADM0
SADM1
SADM2
SADM3
SADM4
SBCKE2
SBCKE3
SBDM0
SBDM1
SBDM2
AR9
AJ5
AH9
AH13
DATA_A[0..63]20
DATA_A16
DATA_A21
DATA_A24
DATA_A11
AP4
AL7
DATA_A18
DATA_A17
DATA_A14
DATA_A15
DATA_A12
DATA_A13
AJ3
AK3
AP2
AP3
AP5
AR5
SADQ11
SADQ12
SADQ13
SADQ14
SADQ15
SADQ16
SADQ17
SBDQ9
SBDQ10
SBDQ11
SBDQ12
SBDQ13
SBDQ14
SBDQ15
AF11
AE11
AJ8
AL8
AG10
AG11
A A
B B
C C
SCS_A#020
SCS_A#120
SCS_A#220
SCS_A#320
RAS_A#20
CAS_A#20
MAA_A020
MAA_A120
MAA_A220
MAA_A320
MAA_A420
MAA_A520
MAA_A620
MAA_A720
MAA_A820
MAA_A920
MAA_A1020
MAA_A1120
MAA_A1220
MAA_A1320
WE_A#20
P_DDR0_A20
N_DDR0_A20
P_DDR1_A20
N_DDR1_A20
P_DDR2_A20
N_DDR2_A20
P_DDR3_A20
N_DDR3_A20
P_DDR4_A20
N_DDR4_A20
P_DDR5_A20
N_DDR5_A20
SBS_A020
SBS_A120
DQS_A020
DQS_A120
DQS_A220
DQS_A320
DQS_A420
DQS_A520
DQS_A620
DQS_A720
TP18
TP16
SCS_A#0
SCS_A#1
SCS_A#2
SCS_A#3
RAS_A#
CAS_A#
WE_A#
MAA_A0
MAA_A1
MAA_A2
MAA_A3
MAA_A4
MAA_A5
MAA_A6
MAA_A7
MAA_A8
MAA_A9
MAA_A10
MAA_A11
MAA_A12
MAA_A13
SBS_A0
SBS_A1
DQS_A0
DQS_A1
DQS_A2
DQS_A3
DQS_A4
DQS_A5
DQS_A6
DQS_A7
P_DDR0_A
N_DDR0_A
P_DDR1_A
N_DDR1_A
P_DDR2_A
N_DDR2_A
P_DDR3_A
N_DDR3_A
P_DDR4_A
N_DDR4_A
P_DDR5_A
N_DDR5_A
TP_SA_RCVENOUT
TP_SA_RCVENIN
SM_XSLEWIN
MCH_VREF_A
SMPCOMP_P
SMPCOMP_N
AM34
AL35
AK34
AL33
AN29
AL34
AP31
AN22
AP22
AN21
AP21
AM21
AP19
AR20
AN16
AN18
AM15
AN23
AP15
AP13
AB33
AP33
AR24
AR28
AR29
AN28
AP26
AR23
AG1
AG2
AP7
AR7
AF17
AG17
AM30
AL29
AG35
AG33
AA34
AA35
U34
U35
AM24
AN25
AN2
AN3
AB34
AC33
AP25
AN26
AM2
AM3
AC35
AC34
AN31
AH15
AE16
AJ12
AK12
AE7
AG8
AG4
AE5
AF5
AL3
AL2
U11B
SACS0#
SACS1#
SACS2#
SACS3#
SARAS#
SACAS#
SAWE#
SAMA0
SAMA1
SAMA2
SAMA3
SAMA4
SAMA5
SAMA6
SAMA7
SAMA8
SAMA9
SAMA10
SAMA11
SAMA12
SAMA13
RSV
RSV
RSV
RSV
SABA0
SABA1
RSV
SADQS0
RSV
SADQS1
RSV
SADQS2
RSV
SADQS3
RSV
SADQS4
RSV
SADQS5
RSV
SADQS6
RSV
SADQS7
RSV
SACK0
SACK0#
SACK1
SACK1#
SACK2
SACK2#
SACK3
SACK3#
SACK4
SACK4#
SACK5
SACK5#
RSV
RSV_TP1
RSV_TP0
SMXSLEWIN
SMXSLEWOUT
SMVREF0
SRCOMP1
SRCOMP0
RSV
RSV
Grantsdale_P
DATA_A1
AE3
SADQ0
DATA_A8
DATA_A3
DATA_A2
DATA_A7
DATA_A9
DATA_A4
DATA_A5
AF3
AH2
AJ2
AE2
AE1
AG3
AH3
AJ1
AK2
AN4
SADQ1
SADQ2
SADQ3
SADQ4
SADQ5
SADQ6
SADQ7
SADQ8
SADQ9
SADQ10
SBDQ0
SBDQ1
SBDQ2
SBDQ3
SBDQ4
SBDQ5
SBDQ6
SBDQ7
AH7
AJ6
SBDQ8
AL5
AN6
AG9
AH4
AM5
AL6
AJ7
DATA_A10
DATA_A6
DATA_A0
AN8
AE13
DATA_A25
DATA_A26
DATA_A22
DATA_A23
DATA_A20
DATA_A19
AP9
AN5
SADQ18
SADQ19
SBDQ16
SBDQ17
AF13
AG14
DATA_A27
DATA_A29
DATA_A30
AP6
SADQ20
SBDQ18
AD14
DATA_A28
AR8
AN9
AK16
AL17
AD17
AF19
AF16
AJ17
SADQ21
SADQ22
SADQ23
SADQ24
SADQ25
SADQ26
SADQ27
SADQ28
SADQ29
SBDQ19
SBDQ20
SBDQ21
SBDQ22
SBDQ23
SBDQ24
SBDQ25
SBDQ26
AD12
SBDQ27
AH12
AF14
AD15
AD18
AK19
AE22
AH21
AE19
SADQ30
SBDQ28
AL18
DATA_A31
AH18
AH19
DATA_A37
DATA_A34
DATA_A32
DATA_A33
AH27
AK27
SADQ31
SADQ32
SBDQ29
SBDQ30
AF22
AD21
DATA_A40
DATA_A35
DATA_A38
DATA_A36
DATA_A39
AN30
AK31
AL27
AJ28
AL30
AL31
AJ34
SADQ33
SADQ34
SADQ35
SADQ36
SADQ37
SADQ38
SADQ39
SBDQ31
SBDQ32
SBDQ33
SBDQ34
SBDQ35
SBDQ36
SBDQ37
AF23
AF25
AL25
AJ26
AD23
AF24
AJ25
SCKE_A[0..3]20
DATA_A45
DATA_A42
AG32
AJ29
DATA_A49
DATA_A48
DATA_A43
DATA_A44
DATA_A47
DATA_A51
DATA_A46
SADQ43
SBDQ41
AJ33
AG30
DATA_A50
AH33
AF33
AE33
AE35
AE34
Y33
W34
SADQ44
SADQ45
SADQ46
SADQ47
SADQ48
SADQ49
SADQ50
SBDQ42
SBDQ43
SBDQ44
SBDQ45
SBDQ46
SBDQ47
SBDQ48
AG31
AK33
AK32
AG27
AF28
AE31
AF27
AF34
SADQ42
SBDQ40
AJ31
DATA_A41
AH35
SADQ40
SADQ41
SBDQ38
SBDQ39
AL26
DQM_A6
DQM_A7
AG34
AA33
U33
SADM5
SADM6
SADM7
SMYSLEWOUT
SBDM3
SBDM4
SBDM5
AG20
AG24
AH31
SMYSLEWIN
SBDM6
AD24
W31
FOR DDR1
SCS_B#0
AP34
SBCS0#
SBCS1#
SBCS2#
SBCS3#
SBRAS#
SBCAS#
SBWE#
SBMA0
SBMA1
SBMA2
SBMA3
SBMA4
SBMA5
SBMA6
SBMA7
SBMA8
SBMA9
SBMA10
SBMA11
SBMA12
SBMA13
SBBA0
SBBA1
SBDQS0
SBDQS1
SBDQS2
SBDQS3
SBDQS4
SBDQS5
SBDQS6
SBDQS7
SBCK0
SBCK0#
SBCK1
SBCK1#
SBCK2
SBCK2#
SBCK3
SBCK3#
SBCK4
SBCK4#
SBCK5
SBCK5#
RSV_TP3
RSV_TP2
SMVREF1
SBDM7
RSV
RSV
RSV
RSV
RSV
RSV
RSV
RSV
RSV
RSV
RSV
RSV
RSV
RSV
SCS_B#1
AN34
SCS_B#2
AN33
SCS_B#3
AM33
RAS_B#
AP27
CAS_B#
AN27
WE_B#
AR27
MAA_B0
AM18
MAA_B1
AP18
MAA_B2
AN17
MAA_B3
AR16
MAA_B4
AR15
MAA_B5
AN15
MAA_B6
AP17
MAA_B7
AL15
MAA_B8
AP14
MAA_B9
AN13
MAA_B10
AN20
MAA_B11
AR12
MAA_B12
AM12
MAA_B13
AD32
AN32
AP29
AP30
AP32
SBS_B0
AM27
SBS_B1
AR19
AP23
DQS_B0
AK5
AL4
DQS_B1
AK10
AH10
DQS_B2
AK13
AL14
DQS_B3
AD20
AF20
DQS_B4
AH25
AG26
DQS_B5
AH28
AH30
DQS_B6
AB31
AC30
DQS_B7
W27
Y28
P_DDR0_B
AH22
N_DDR0_B
AG23
P_DDR1_B
AL11
N_DDR1_B
AJ11
P_DDR2_B
AE26
N_DDR2_B
AE25
P_DDR3_B
AL23
N_DDR3_B
AK22
P_DDR4_B
AK9
N_DDR4_B
AL9
P_DDR5_B
AD29
N_DDR5_B
AD28
AL24
TP_SB_RCVENOUT
AK15
TP_SB_RCVENIN
AN14
SM_YSLEWIN
AF9
AE10
MCH_VREF_A
AE8
SCS_B#0 21
SCS_B#1 21
SCS_B#2 21
SCS_B#3 21
RAS_B# 21
CAS_B# 21
WE_B# 21
MAA_B0 21
MAA_B1 21
MAA_B2 21
MAA_B3 21
MAA_B4 21
MAA_B5 21
MAA_B6 21
MAA_B7 21
MAA_B8 21
MAA_B9 21
MAA_B10 21
MAA_B11 21
MAA_B12 21
MAA_B13 21
SBS_B0 21
SBS_B1 21
DQS_B0 21
DQS_B1 21
DQS_B2 21
DQS_B3 21
DQS_B4 21
DQS_B5 21
DQS_B6 21
DQS_B7 21
P_DDR0_B 21
N_DDR0_B 21
P_DDR1_B 21
N_DDR1_B 21
P_DDR2_B 21
N_DDR2_B 21
P_DDR3_B 21
N_DDR3_B 21
P_DDR4_B 21
N_DDR4_B 21
P_DDR5_B 21
N_DDR5_B 21
TP17
TP22
DATA_B42
DATA_B14
DATA_B15
DATA_B21
DATA_B23
DATA_B11
DATA_B17
DATA_B10
DATA_B16
DATA_B12
DATA_B13
DATA_B18
DATA_B4
DATA_B5
DATA_B3
DATA_B7
DATA_B8
DATA_B0
DATA_B[0..63]21
DATA_B1
DATA_B9
DATA_B2
DATA_B6
DATA_B19
DATA_B27
DATA_B20
DATA_B24
DATA_B22
DATA_B25
DATA_B26
DATA_B34
DATA_B32
DATA_B35
DATA_B36
DATA_B31
DATA_B30
DATA_B28
DATA_B29
DATA_B39
DATA_B33
DATA_B37
DATA_B38
CPU STRAPPING RESISTORS
ALL COMPONENTS CLOSE TO CPU
V_SM
R263
D D
80.6RST/0402
C294
X_104P
R262 80.6RST/0402
SMPCOMP_N
SMPCOMP_P
R260 1KST/0402
V_SM
DATA_B46
DATA_B47
DATA_B48
DATA_B52
DATA_B55
DATA_B40
DATA_B45
DATA_B41
DATA_B43
DATA_B49
DATA_B44
DATA_B50
R261
1KST/0402
DATA_B57
DATA_B54
DATA_B51
SCKE_B[0..3]21
DATA_B58
DATA_B56
DATA_B60
DATA_B53
DATA_B59
DQM_B[0..7]21
MCH_VREF_A
C291
104P
SCKE_B3
DATA_B61
DATA_B63
DATA_B62
SCKE_B0
SCKE_B2
SCKE_B1
PLACE 0.1UF CAP CLOSE TO MCH
C286
104P
PLACE CLOSE TO MCH
1
2
3
4
DQM_B7
DQM_B3
Title
Size Document Number Rev
Custom
Date: Sheet
MICRO-START INT'L CO.,LTD.
Intel Grantsdale - Memory
MS-7091 1.20
5
of
731Wednesday, December 01, 2004
DQM_B5
DQM_B4
DQM_B6
DQM_B0
DQM_B1
DQM_B2

1
2
3
4
5
V_1P5_CORE
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AC10
AC9
AC8
AC7
AC6
AC5
AC4
AC3
AC2
AC1
AB10
AB9
AB8
AB7
AB6
AB5
AB4
AB3
EXP_A_RXP_019
EXP_A_RXN_019
EXP_A_RXP_119
A A
B B
C C
EXP_A_RXN_119
EXP_A_RXP_219
EXP_A_RXN_219
EXP_A_RXP_319
EXP_A_RXN_319
EXP_A_RXP_419
EXP_A_RXN_419
EXP_A_RXP_519
EXP_A_RXN_519
EXP_A_RXP_619
EXP_A_RXN_619
EXP_A_RXP_719
EXP_A_RXN_719
EXP_A_RXP_819
EXP_A_RXN_819
EXP_A_RXP_919
EXP_A_RXN_919
EXP_A_RXP_1019
EXP_A_RXN_1019
EXP_A_RXP_1119
EXP_A_RXN_1119
EXP_A_RXP_1219
EXP_A_RXN_1219
EXP_A_RXP_1319
EXP_A_RXN_1319
EXP_A_RXP_1419
EXP_A_RXN_1419
EXP_A_RXP_1519
EXP_A_RXN_1519
DMI_ITP_MRP_010
DMI_ITN_MRN_010
DMI_ITP_MRP_110
DMI_ITN_MRN_110
DMI_ITP_MRP_210
DMI_ITN_MRN_210
DMI_ITP_MRP_310
DMI_ITN_MRN_310
CK_PE_100M_MCH13
CK_PE_100M_MCH#13
SDVO_CTRL_DATA19
SDVO_CTRL_CLK19
R234 X_1K/0402
R231 X_1K/0402
C209 104P
EXP_A_RXP_0
EXP_A_RXN_0
EXP_A_RXP_1
EXP_A_RXN_1
EXP_A_RXP_2
EXP_A_RXN_2
EXP_A_RXP_3
EXP_A_RXN_3
EXP_A_RXP_4
EXP_A_RXN_4
EXP_A_RXP_5
EXP_A_RXN_5
EXP_A_RXP_6
EXP_A_RXN_6
EXP_A_RXN_7 EXP_A_TXP_6
EXP_A_RXN_8
EXP_A_RXP_9
EXP_A_RXN_9
EXP_A_RXP_10
EXP_A_RXN_10
EXP_A_RXP_11
EXP_A_RXP_12
EXP_A_RXN_12
EXP_A_RXP_13
EXP_A_RXN_13
EXP_A_RXP_14
EXP_A_RXN_14
EXP_A_RXP_15
EXP_A_RXN_15
DMI_ITP_MRP_0
DMI_ITN_MRN_0
DMI_ITP_MRP_1
DMI_ITN_MRN_1
DMI_ITP_MRP_2
DMI_ITN_MRN_2
DMI_ITP_MRP_3
DMI_ITN_MRN_3
CK_PE_100M_MCH
CK_PE_100M_MCH#
SDVO_CTRL_DATA
SDVO_CTRL_CLK
BSEL0
BSEL1
BSEL2
XDP_18
TP15
XDP_28
TP14
MTYPE
EXP_SLR
XDP_36
TP21
XDP_6
TP19
XDP_4
TP20
V_1P5_CORE
VCCA_HPLLVCCA_HPLL
VCCA_MPLL
VCCA_DPLLA
VCCA_DPLLB
VCCA_GPLL
V_2P5_MCH
V_2P5_MCH
U11C
E11
F11
J11
H11
F9
E9
F7
E7
B3
B4
D5
E5
G6
G5
H8
H7
J6
J5
K8
K7
L6
L5
P10
R10
M8
M7
N6
N5
P7
P8
R6
R5
U5
U6
T9
T8
V7
V8
V10
U10
A11
B11
K13
J13
H16
E15
D17
M16
F15
C15
A16
B15
C14
K15
L10
M10
A17
B17
A12
B13
A14
A13
E13
D13
F13
EXPARXP0
EXPARXN0
EXPARXP1
EXPARXN1
EXPARXP2
EXPARXN2
EXPARXP3
EXPARXN3
EXPARXP4
EXPARXN4
EXPARXP5
EXPARXN5
EXPARXP6
EXPARXN6
EXPARXP7
EXPARXN7
EXPARXP8
EXPARXN8
EXPARXP9
EXPARXN9
EXPARXP10
EXPARXN10
EXPARXP11
EXPARXN11
EXPARXP12
EXPARXN12
EXPARXP13
EXPARXN13
EXPARXP14
EXPARXN14
EXPARXP15
EXPARXN15
DMI RXP0
DMI RXN0
DMI RXP1
DMI RXN1
DMI RXP2
DMI RXN2
DMI RXP3
DMI RXN3
GCLKINP
GCLKINN
SDVOCTRLDATA
SDVOCTRLCLK
BSEL0
BSEL1
BSEL2
RSV
RSV
MTYPE
EXP_SLR
RSV
RSV
RSV
VCC
VSS
VCCAHPLL
VCCAMPLL
VCCADPLLA
VCCADPLLB
VCCA3GPLL
VCCHV
VCCACRTDAC
VCCACRTDAC
VSSACRTDAC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
H22
G22
G21
F22
F21
F20
E22
E21
E20
E19
D22
D21
D20
VTT
D19
C22
C21
C20
C19
B22
B21
AB2
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VTT
VTT
VTT
VTT
VTT
VTT
B20
B19
A22
A21
A20
A19
V_SM
AB1
W18
V19
V17
U18
AR33
AR31
AR26
AR22
AR18
AR14
AR10
AP28
AP24
AP20
AP16
AP12
AN35
AM32
AM28
AM26
AM25
AM23
AM22
AM20
AM19
AM17
AM16
AM14
AM13
AM11
AM10
AK35W1W2W3W4W6W7W8W9Y1Y2Y3Y4Y5Y6Y7Y8
VCC
VCC
VCC
VCC
VCC
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
AC25
AB25
AA25
AA11
Y25
Y18
Y11
W25
W11
V25
V20
V16
V11
U25
U11
T25
T18
T11
R25
R11
P25
P11
VSSNCTF
N25
AD25
N11
M11
AA15
AA17
AA19
N17
VCC3G
VCC3G
VCC3G
VCC3G
VCC3G
VCC3G
VCC3G
VCC3G
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
N19
P16
P18
P20
R17
R19
R21
T22
VCC3G
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
U15
U21
U23
V22
W15
W21
W23
VCC3G
VSSNCTF
Y22
VCC3G
VCC3G
VCC3G
CRTDDCDATA
Grantsdale_P
V_1P5_PCIEXPRESS
Y9
VCC3G
VCC3G
VCC3G
VCC3G
EXPATXP0
EXPATXN0
EXPATXP1
EXPATXN1
EXPATXP2
EXPATXN2
EXPATXP3
EXPATXN3
EXPATXP4
EXPATXN4
EXPATXP5
EXPATXN5
EXPATXP6
EXPATXN6
EXPATXP7
EXPATXN7
EXPATXP8
EXPATXN8
EXPATXP9
EXPATXN9
EXPATXP10
EXPATXN10
EXPATXP11
EXPATXN11
EXPATXP12
EXPATXN12
EXPATXP13
EXPATXN13
EXPATXP14
EXPATXN14
EXPATXP15
EXPATXN15
DMI TXP0
DMI TXN0
DMI TXP1
DMI TXN1
DMI TXP2
DMI TXN2
DMI TXP3
DMI TXN3
EXPACOMPO
EXPACOMPI
CRTHSYNC
CRTVSYNC
CRTRED
CRTGREEN
CRTBLUE
CRTREDB
CRTGREENB
CTRBLUEB
CRTDDCCLK
DREFCLKINP
DREFCLKINN
CRTIREF
PMEXTTS
PMBMBUSY#
TESTIN#
MCHDETECT
C10
C9
A9
A8
C8
C7
A7
A6
C6
C5
C2
D2
E3
F3
F1
G1
G3
H3
H1
J1
J3
K3
K1
L1
L3
M3
M1
N1
N3
P3
P1
R1
R3
T3
T1
U1
U3
V3
V5
W5
Y10
W10
E12
D12
F14
D14
H14
G14
E14
J14
L14
M15
M13
M12
A15
K16
G16
R35
A35
EXP_A_TXP_0
EXP_A_TXN_0
EXP_A_TXP_1
EXP_A_TXN_1
EXP_A_TXP_2
EXP_A_TXN_2
EXP_A_TXP_3
EXP_A_TXN_3
EXP_A_TXP_4
EXP_A_TXN_4
EXP_A_TXP_5
EXP_A_TXN_5EXP_A_RXP_7
EXP_A_TXN_6EXP_A_RXP_8
EXP_A_TXP_7
EXP_A_TXN_7
EXP_A_TXP_8
EXP_A_TXN_8
EXP_A_TXP_9
EXP_A_TXN_9
EXP_A_TXP_10EXP_A_RXN_11
EXP_A_TXN_10
EXP_A_TXP_11
EXP_A_TXN_11
EXP_A_TXP_12
EXP_A_TXN_12
EXP_A_TXP_13
EXP_A_TXN_13
EXP_A_TXP_14
EXP_A_TXN_14
EXP_A_TXP_15
EXP_A_TXN_15
DMI_MTP_IRP_0
DMI_MTN_IRN_0
DMI_MTP_IRP_1
DMI_MTN_IRN_1
DMI_MTP_IRP_2
DMI_MTN_IRN_2
DMI_MTP_IRP_3
DMI_MTN_IRN_3
R242 10K
R237 10K
R227 X_0/0402
R233 10K
EXTTS
R251 24.9RST
V_2P5_MCH
V_1P5_CORE
EXP_A_TXP_0 19
EXP_A_TXN_0 19
EXP_A_TXP_1 19
EXP_A_TXN_1 19
EXP_A_TXP_2 19
EXP_A_TXN_2 19
EXP_A_TXP_3 19
EXP_A_TXN_3 19
EXP_A_TXP_4 19
EXP_A_TXN_4 19
EXP_A_TXP_5 19
EXP_A_TXN_5 19
EXP_A_TXP_6 19
EXP_A_TXN_6 19
EXP_A_TXP_7 19
EXP_A_TXN_7 19
EXP_A_TXP_8 19
EXP_A_TXN_8 19
EXP_A_TXP_9 19
EXP_A_TXN_9 19
EXP_A_TXP_10 19
EXP_A_TXN_10 19
EXP_A_TXP_11 19
EXP_A_TXN_11 19
EXP_A_TXP_12 19
EXP_A_TXN_12 19
EXP_A_TXP_13 19
EXP_A_TXN_13 19
EXP_A_TXP_14 19
EXP_A_TXN_14 19
EXP_A_TXP_15 19
EXP_A_TXN_15 19
DMI_MTP_IRP_0 10
DMI_MTN_IRN_0 10
DMI_MTP_IRP_1 10
DMI_MTN_IRN_1 10
DMI_MTP_IRP_2 10
DMI_MTN_IRN_2 10
DMI_MTP_IRP_3 10
DMI_MTN_IRN_3 10
V_1P5_PCIEXPRESSGRCOMP
V_2P5_MCH
V_SM V_SM
C203 106P/0805
C147 106P/0805
C191 106P/0805
C154 106P/0805
V_FSB_VTT
C179
X_104P
0
0
1
0
H_FSBSEL0
H_FSBSEL1
H_FSBSEL2
TABLE
PSB FREQUENCY
RESERVED
133 MHZ (533)
200 MHZ (800)
H_FSBSEL03,4,13
H_FSBSEL13,4,13
H_FSBSEL23,4,13
BSEL
2
1
0
0
0
0
0
1
C152 106P/0805
C167 106P/0805
C138 X_106P/0805
C139 X_106P/0805
C193
104P
BSEL0
R163
RN37
7 8
5 6
3 4
1 2
8P4R-10K
X_2.49K
R158
X_2.49K
R156
X_2.49K
BSEL1
BSEL2
V_FSB_VTT3,4,6,12,13,26,27
S6 X_COPPER
12
V_1P5_CORE
V_1P5_CORE
D D
L7 X_0/0805
S7 X_COPPER
12
L32 OPTION 0 ohm
1
L29 OPTION 0 ohm
C196
X_224P
VCCA_HPLL
C183
X_106P/0805
VCCA_MPLL
C192
X_106P/0805
I=45mA
104P
I=60mA
C197
104P
V_FSB_VTT
V_1P5_CORE
V_1P5_CORE
2
S10 X_COPPER
12
L12 X_0/0805
S9 X_COPPER
12
L11 X_0/0805 R225 1RSTL9 X_0/0805
VCCA_DPLLA
C212
X_106P/0805
VCCA_DPLLB
C202
X_106P/0805
S15 X_COPPER
12
I=55mA
C211
104P
I=55mA
C204
104P
3
V_1P5_CORE
V_1P5_CORE
L14 X_0/0805
L10 X_1UH/0805/0.5A
S8
12
ANALOG FILTERS
+
VCCA_GPLL_R VCCA_GPLL
CT13
470u/10V/6.3*11.5
R224 1RST
4
V_1P5_PCIEXPRESS
C237
C287 106P/0805C184
C199
X_106P/0805
106P/0805
I=45mA
C201
104P
Title
Size Document Number Rev
Custom
Date: Sheet
MICRO-START INT'L CO.,LTD.
Intel Grantsdale-PCI EXPRESS
MS-7091 1.20
5
of
831Wednesday, December 01, 2004

1
AR30
AR25
AR21
AR17
AR13
AR6
AR3
AP8
AN1
AM31
AM29
AM8
AM7
AM6
AM4
AL32
AL22
AL19
AL16
AL13
AL10
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
G28H2H4H5H6H9H10
AK30
VSS
VSS
C11
C13
C17
C18
C23
C35
D10
D11
D15
D16
D18
D23
D25
D26
D28
D30
D31
D32
A10
A18
A26
A30
A33
B10
B12
B14
B16
B18
B24
B28
E10
E17
E18
E23
E26
E29
F10
F16
F18
F23
F25
F29
F30
F32
F35
U11D
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
A3
VSS
A5
VSS
VSS
VSS
VSS
VSS
VSS
B2
VSS
B5
VSS
B6
VSS
B7
VSS
B8
VSS
B9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
C1
VSS
C3
VSS
C4
VSS
VSS
VSS
VSS
VSS
VSS
VSS
D3
VSS
D4
VSS
D6
VSS
D7
VSS
D8
VSS
D9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
E1
VSS
E2
VSS
E4
VSS
E6
VSS
E8
VSS
VSS
VSS
VSS
VSS
VSS
VSS
F2
VSS
F4
VSS
F5
VSS
F6
VSS
F8
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
G2G4G7G8G9
G10
G11
G13
G15
VSS
VSS
VSS
VSS
VSS
VSS
VSS
G17
G19
G20
G23
G26
G27
A A
B B
C C
VSS
VSS
AK28
VSS
VSS
H13
AK26
VSS
VSS
H21
AK25
VSS
VSS
H24
AK23
VSS
VSS
H25
AK20
H27
VSS
VSS
2
AK17
VSS
VSS
H30
AK14
VSS
VSS
H32
AK11
AK8
AK7
AK6
AK4
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
H34J2J4J7J8J9J10
AK1
VSS
VSS
3
AJ35
AJ32
AJ30
AJ27
AJ22
AJ19
AJ16
AJ15
AJ13
AJ10
AJ9
AJ4
AH34
AH32
AH29
AH26
AH23
AH20
AH17
AH14
AH11
AH8
AH6
AH5
AH1
AG29
AG28
AG25
AG22
AG21
AG19
AG18
AG16
AG15
AG13
AG12
AG5
AF35
AF32
AF31
AF30
AF29
AF26
AF21
AF18
AF15
AF12
AF10
AF8
AF6
AF4
AF1
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
J15
J16
J17
J18
J20
J23
J30K2K4K5K6K9K10
K11
K14
K20
K24
K26
K28
K31
K32
K35L2L4L7L8L9L11
L13
L15
L16
L17
L18
L20
L21
L22
L24
L27
L30
L32M2M4M5M6M9M17
M20
M24
M25
M27
M29
AE32
AE30
AE28
AE24
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
M34N2N4N7N8N9N10
AE23
VSS
VSS
AE21
4
AE20
AE18
VSS
VSS
VSS
VSS
VSS
VSS
N28
AE17
AE15
AE14
AE12
AE9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
N30
N32P2P4P5P6P9P27
AE6
VSS
VSS
AE4
VSS
VSS
AD34
VSS
VSS
AD27
VSS
VSS
P29
AD26
VSS
VSS
P31
AD22
AD19
VSS
VSS
AD16
VSS
AD13
VSS
AD11
VSS
AC32
VSS
AC31
VSS
AC29
VSS
AC27
VSS
AB35
VSS
AB32
VSS
AB30
VSS
AB28
VSS
AA27
VSS
AA26
VSS
AA10
VSS
AA9
VSS
AA8
VSS
AA7
VSS
AA6
VSS
AA5
VSS
AA4
VSS
AA3
VSS
AA2
VSS
AA1
VSS
Y34
VSS
Y32
VSS
Y31
VSS
Y29
VSS
Y27
VSS
W32
VSS
W30
VSS
W28
VSS
W19
VSS
W17
VSS
V35
VSS
V27
VSS
V26
VSS
V18
VSS
V9
VSS
V6
VSS
V4
VSS
V2
VSS
V1
VSS
U32
VSS
U31
VSS
U29
VSS
U27
VSS
U19
VSS
U17
VSS
U9
VSS
U8
VSS
U7
VSS
U4
VSS
U2
VSS
T34
VSS
T32
VSS
T30
VSS
T28
VSS
T10
VSS
T7
VSS
T6
VSS
T5
VSS
T4
VSS
T2
VSS
R27
VSS
R26
VSS
R9
VSS
R8
VSS
R7
VSS
R4
VSS
R2
VSS
P35
VSS
P32
VSS
Grantsdale_P
5
D D
Title
Intel Grantsdale GND
Size Document Number Rev
A3
1
2
3
4
Date: Sheet
MICRO-START INT'L CO.,LTD .
MS-7091 1.20
931Wednesday, December 01, 2004
5
of