8
7
6
5
4
3
2
1
Cover Sheet
Block Diagram
D D
MAIN CLOCK GEN & DDR CLOCK BUFFER
mPGA478-B INTEL CPU Sockets
MS-6533
VERSION:00A
SIS 645/650 CHIPSET
Willamette/Northwood 478pin mPGA-B Processor Schematics
SIS 645/650 NORTH BRIDGE
DDR SLOT
DDR TERMINATOR
SIS 961A SOUTH BRIDGE
AGP SLOT
CPU:
C C
Willamette/Northwood mPGA-478B Processor
PCI SLOTS
LAN CONTROLLER
System Brookdale Chipset:
SIS 645/650 (North Bridge)
+961A (South Bridge)
On Board Chipset:
LPC Super I/O -- W83697HF
Expansion Slots:
B B
AGP2.0 SLOT * 1
PCI2.2 SLOT* 3
CNR SLOT * 1
RJ45 CONNECTOR
IDE CONNECTOR
USB CONNECTOR
AC'97 CODEC
AUDIO CONNECTOR
CNR & FAN
LPC I/O(W83697HF)
PARALLEL & SERIAL PORT
VRM 9.X
ACPI CONTROLLER
1
2
3
4 - 5
6 - 9
10
11
12 - 14
15
16
17
18
19
20
21
22
23
24
25
26
27
ATX POWER CON & VGA CON
FRONT PANEL
Decoupling Capacitor
History
A A
MICRO-STAR INT'L CO.,LTD.
Title
COVER PAGE
Size Document Number Rev
MS-6533 0A
Custom
8
7
6
5
4
3
Date: Sheet of
2
28
29
30
31
1 31Monday, October 29, 2001
1
5
4
3
2
1
System Block Diagram
D D
GPIO_0
GPIO_1
GPIO_2
SOCKET-478
GPIO_3 EXTSMI#
GPIO_4 Pull-Down
GPIO_5 PREQ#5(Pull-Up)
GPIO_6
GPI_7 RESUME Pull-Down
Host Bus
Support Dual Monitor
VGA
D-SUB
AGP SLOT
DDR SDRAM
SSTL-2 Termination
(Only for DDR)
SIS645/650
C C
VGA Connector
VGA CONNECTOR
VGA
DIMM 1 DIMM 2
Rtt
GPI_8 RING
GPI_9
GPI_10
GPIO_11
GPIO_13
GPIO_14
GPIO_15
GPIO_16
GPIO_17
GPIO_18
GPIO_19
Support Max to six-PCI Devices
Lan
PCI SLOT 3 PCI SLOT 2 PCI SLOT 1
SiS961
IDE 1
B B
IDE 2
KEYBOARD
/MOUSE
PS/2
HyperZip
512 MB
LPC Bus
Audio Codec
CNR
USB 0
USB 1
AC'97
USB 2
USB 3
Analog In
Analog Out
GPIO_20
GPIO Table on SIS961
I/O
I/O
I/O
I/O
I/O
I/O
I/O
MAIN
MAIN
MAIN
MAIN
MAIN
MAIN
MAIN
Pull-Down
Pull-Down
THERM#
PGNT#5(Pull-Up)
I/O
I
RESUME
I RESERVED
RESUME
I RESERVED
RESUME
I/O RESUME
RESERVED
Pull-DownGPIO_12 I/O RESUME
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
RESUME
RESUME
RESUME
RESUME
RESUME
RESUME
RESUME
RESUME
Flash Rom protection H: Disable, L: Enable
LAN_WAKE#
KBDAT
KBCLK
MSDAT
MSCLK
SMBCLK
SMBDAT
2
FAN CONTROL
IR/CIR
LPC Super I/O
GAME/MIDIGPIOs
4
VOLTAGE MONITOR
TEMPERATURE MONITOR
SERIAL PARALLEL FLOPPY
MICRO-STAR INT'L CO.,LTD.
Title
System Block Diagram
Size Document Number Rev
MS-6533 0A
3
2
Date: Sheet of
1
2 31Tuesday, October 16, 2001
FAN1FAN
Legacy
ROM
A A
5
5
VCC3
R207
10K
NPN-MBT3904LT1-S-SOT23
CB126
0.1u
CP24
X_COPPER
CB178
CB177
0.1u
0.1u
VCC3
R219
10K
Q27
CP11 X_COPPER
L28
X_80_0805
CB127
0.01u
L48
X_80_0805
D D
CE7
10u
C C
B B
VCCP
VCC2.5V
CE5
+
10u
VCC3
CE11
10u
CB196
0.1u CB182
0.1u
VCC3
R218
10K
Q26
NPN-MBT3904LT1-S-SOT23
VCC3
CB87
0.1u
CB195
0.1u
CB197
CB179
0.1uCB180
0.1u
R217
CP26 X_COPPER
L49
X_80_0805
CB194
0.1u
CB110
0.1u
0.1u
0.1u
CBVDD
CB111
0.1u
CB187
CB184
1000p
CB198
0.1u
475
4
Main Clock Generator
U15
ICS-ICS952001AF-SSOP48
1
VDDREF
11
VDDZ
13
VDDPCI
19
VDDPCI
28
VDD48
29
VDDAGP
42
VDDCPU
48
VDDSD
12
PCI_STOP#
45
CPU_STOP#
5
VSSREF
8
VSSZ
18
VSSPCI
24
VSSPCI
25
VSS48
32
VSSAGP
41
VSSCPU
46
VSSSD
33
PD#/VTT_PWRGD
38
IREF
36
VDDA
CB181
1000p
37
VSSA
XIN
6
14M-16pf-HC49S-D
C143
10p_0603
3
40
CPUCLK0
39
CPUCLK#0
44
CPUCLK1
43
CPUCLK#1
47
SDCLK
31
AGPCLK0
30
AGPCLK1
9
ZCLK0
10
ZCLK1
FS3 96XPCLK
14
PCICLK_F0/FS3
PCICLK_F1/FS4
PCICLK0
PCICLK1
PCICLK2
PCICLK3
PCICLK4
PCICLK5
REF0/FS0
REF1/FS1
REF2/FS2
24_48M/MULTISEL
SDATA
XOUT
7
Y1
C134
10p_0603
FS4 SIOPCLK
15
16
17
20
21
22
23
FS0
2
FS1
3
FS2
4
27
48M
26
MULTISEL
35
SCLK
34
R237
R238
R235
R236
R234
R239
R240
R289
R290
RN76 33
7 8
5 6
3 4
1 2
RN77 33
7 8
5 6
3 4
1 2
R283
R285
R286
R287
R241
R242
CPUCLK0
33
CPUCLK-0
33
CPUCLK1
33
CPUCLK-1
33
SDCLK
22
AGPCLK0
22
AGPCLK1
22
ZCLK0
22
ZCLK1
22
PCICLK1
PCICLK2
PCICLK3
PCICLK4
PCICLK5
REFCLK0
33
REFCLK1
33
APICCLK
33
REFCLK2
X_33
UCLK48M
22
SIO48M
22
SMBCLK
SMBDAT
VCC3
FS4 FS3 FS2 FS1 FS0 CPU SDRAM ZCLK AGP PCI
0 0 0 0
CPUCLK0 4
CPUCLK-0 4
CPUCLK1 6
CPUCLK-1 6
SDCLK 7
AGPCLK0 6
AGPCLK1 15
ZCLK0 8
ZCLK1 12
96XPCLK 12
SIOPCLK 24
PCICLK1 16
PCICLK2 16
PCICLK3 16
PCICLK4 16
PCICLK5 17
REFCLK0 8
REFCLK1 13
APICCLK 13
REFCLK2 21
UCLK48M 14
SIO48M 24
SMBCLK 10,13,23,27
SMBDAT 10,13,23,27
F0~F4 internal Pull-Down 120K
R291 2.7K
R292 X_2.7K
R288 X_2.7K
R271 X_2.7K
R276 X_2.7K
0 01111
FS0
FS1
FS3
R542
R543
100 100
2
MULTISEL
100133
MULTISEL internal Pull-Up 120K
R243 X_4.7K
R220 X_4.7K
BSEL0 4
FS2
X_10K
FS4
X_10K
6666666633
33
VCC3
CPUCLK0
CPUCLK-0
CPUCLK1
CPUCLK-1
SDCLK
AGPCLK0
AGPCLK1
ZCLK0
ZCLK1
PCICLK2
PCICLK1
SIOPCLK
96XPCLK
PCICLK5
PCICLK4
PCICLK3
APICCLK
REFCLK0
REFCLK1
REFCLK2
UCLK48M
SIO48M
SMBCLK
SMBDAT
1
R215
R216
R213
R214
C110 X_10p
C112 X_10p_0603
C164 X_10p_0603
CN18 X_10p
CN19 X_10p
C161 X_10p_0603
C160 X_10p_0603
C113 10p_0603
DDRCLK0
DDRCLK1
DDRCLK2
DDRCLK3
DDRCLK8
DDRCLK7
49.9
49.9
49.9
49.9
C111 X_10p_0603
C163 X_10p_0603
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
C153 X_10p_0603
C162 X_10p_0603
C114 10p_0603
C251 X_10p
C252 X_10p
C58 X_10p_0603
C59 X_10p_0603
C62 X_10p_0603
C64 X_10p_0603
C39 X_10p_0603
C42 X_10p_0603
U7
CB118
CBVDD
R116
R86 0
CP14 X_COPPER
VCC2.5V
A A
L32
X_80_0805
5
CE4
+
10u
CB124
0.01u
0.1u
SMBCLK
SMBDAT
FWDSDCLKO7
FWDSDCLKO
0
ICS-ICS93722BF-SSOP28
3
VDD
12
VDD
23
VDD
10
AVDD
7
SCLK
22
SDATA
8
CLK_IN
20
FB_IN
9
NC
18
NC
21
NC
4
6
GND
111528
GND
GND
GND
Clock Buffer (DDR)
R111
2
CLK0
CLK1
CLK2
CLK3
CLK4
CLK5
CLK#0
CLK#1
CLK#2
CLK#3
CLK#4
CLK#5
FB_OUT
R112
4
R115
13
R118
17
R82
24
R85
26
R110
1
R113
5
R114
14
R117
16
R83
25
R84
27
R87
19
DDRCLK0
0
DDRCLK1
0
DDRCLK2
0
DDRCLK3
0
DDRCLK8
0
DDRCLK7
0
DDRCLK-0
0
DDRCLK-1
0
DDRCLK-2
0
DDRCLK-3
0
DDRCLK-8
0
DDRCLK-7
0
FB_OUT
22
C43
10p_0603
3
DDRCLK[0..8]
DDRCLK-[0..8]
DDRCLK[0..8] 10
DDRCLK-[0..8] 10
2
MICRO-STAR INT'L CO.,LTD.
Title
MAIN CLOCK GEN & BUFFER
Size Document Number Rev
MS-6533 0A
Date: Sheet of
DDRCLK-0
DDRCLK-1
DDRCLK-2
DDRCLK-3
DDRCLK-8
DDRCLK-7
1
C57 X_10p_0603
C60 X_10p_0603
C61 X_10p_0603
C63 X_10p_0603
C40 X_10p_0603
C41 X_10p_0603
3 31Sunday, October 28, 2001
8
7
6
5
4
3
2
1
CPU GTL REFERNCE VOLTAGE BLOCK
VCCP
Length < 1.5inch.
CPU SIGNAL BLOCK
HDBI#0
HDBI#1
HDBI#2
HDBI#3
ITP_TDI
ITP_TDO
ITP_TMS
ITP_TRST#
ITP_TCK
CPU_TMPA
THERMTRIP#
PROCHOT#
IGNNE#
SMI#
A20M#
CPUSLP#
CPU_GD
CPURST#
HD#63
HD#62
HD#61
HD#60
HD#59
HD#58
HD#57
HD#56
HD#55
HD#54
HA#[3..31]6
G25
AC3
AF26
AB26
AD2
AD3
AE21
AF24
AF25
AD6
AD5
AB23
AB25
AA24
AA22
AA25
W25
W26
E21
P26
V21
V6
B6
Y4
AA3
W5
AB2
H5
H2
G1
G4
G2
F3
E3
D2
E2
C1
D5
F7
E6
D4
B3
C4
A2
C3
B2
B5
C6
A22
A7
Y21
Y24
Y23
Y26
V24
DBI0#
DBI1#
DBI2#
DBI3#
IERR#
MCERR#
FERR#
STPCLK#
BINIT#
INIT#
RSP#
DBSY#
DRDY#
J6
TRDY#
ADS#
LOCK#
BNR#
HIT#
HITM#
BPRI#
DEFER#
TDI
TDO
TMS
TRST#
TCK
THERMDA
THERMDC
THERMTRIP#
GND/SKTOCC#
PROCHOT#
IGNNE#
SMI#
A20M#
SLP#
RESERVED0
RESERVED1
RESERVED2
RESERVED3
RESERVED4
RESERVED5
RESERVED6
BSEL0
BSEL1
PWRGOOD
RESET#
D63#
D62#
D61#
D60#
D59#
D58#
D57#
D56#
D55#
D54#
HA#22
HA#25
HA#23
HA#26
HA#27
HA#28
HA#30
HA#29
HA#31
AB1Y1W2V3U4T5W1R6V2T4U3P6U1T2R3P4P3R2T1N5N4N2M1N1M4M3L2M6L3K1L6K4K2
A35#
A34#
A33#
A32#
A31#
A30#
A29#
A28#
A27#
A26#
D53#
D52#
D51#
D50#
D49#
D48#
D47#
D46#
D45#
D44#
D43#
D42#
T23
HD#47
T22
HD#46
T25
HD#45
T26
HD#44
R24
HD#43
R25
HD#42
D41#
P24
HD#41
R21
HD#40
7
V22
HD#53
U21
HD#52
V25
HD#51
U23
HD#50
U24
HD#49
U26
HD#48
A25#
D40#
HA#24
A24#
D39#
N25
HD#39
A23#
D38#
N26
HD#38
A22#
D37#
M26
HD#37
HA#21
A21#
D36#
N23
M24
HD#36
HA#20
A20#
D35#
HD#35
HA#19
A19#
D34#
P21
N22
HD#34
HA#18
A18#
D33#
HD#33
HA#17
A17#
D32#
M23
HD#32
6
HA#16
A16#
D31#
H25
HD#31
HA#15
A15#
D30#
K23
HD#30
HA#14
A14#
D29#
J24
HD#29
HA#13
A13#
D28#
L22
HD#28
HA#12
A12#
D27#
M21
HD#27
HA#11
A11#
D26#
H24
HD#26
HA#10
A10#
D25#
G26
HD#25
HA#9
A9#
D24#
L21
HD#24
HA#8
A8#
D23#
D26
HD#23
HA#7
A7#
D22#
F26
HD#22
HA#6
A6#
D21#
E25
HD#21
HA#5
A5#
D20#
F24
HD#20
HA#4
A4#
D19#
F23
HD#19
HA#3
AE25A5A4
A3#
DBR#
Differential
Host Data
Strobes
D18#
D17#
D16#
D15#
G23
E24
H22
D25
HD#16
HD#18
HD#15
HD#17
VCC_SENSE
D14#
D13#
J21
D23
HD#14
HD#13
AD26
AC26
ITP_CLK1
VSS_SENSE
D12#
D11#
D10#
C26
H21
G22
B25
HD#10
HD#11
HD#12
5
ITP_CLK0
D9#
D8#
C24
HD#8
HD#9
C23
HD#7
VID[0..4] 26
VID1
VID0
VID2
VID4
VID3
AE1
AE2
AE3
AE4
AE5
VID4#
VID3#
VID2#
VID1#
VID0#
GTLREF3
GTLREF2
GTLREF1
GTLREF0
BPM5#
BPM4#
BPM3#
BPM2#
BPM1#
BPM0#
REQ4#
REQ3#
REQ2#
REQ1#
REQ0#
TESTHI12
TESTHI11
TESTHI10
TESTHI9
TESTHI8
TESTHI7
TESTHI6
TESTHI5
TESTHI4
TESTHI3
TESTHI2
TESTHI1
TESTHI0
BCLK1#
BCLK0#
RS2#
RS1#
RS0#
AP1#
AP0#
BR0#
COMP1
COMP0
DP3#
DP2#
DP1#
DP0#
ADSTB1#
ADSTB0#
DSTBP3#
DSTBP2#
DSTBP1#
DSTBP0#
DSTBN3#
DSTBN2#
DSTBN1#
DSTBN0#
LINT1/NMI
LINT0/INTR
D7#
D6#
D5#
D4#
D3#
D2#
D1#
D0#
B24
D22
C21
A25
A23
B22
B21
PGA-S478-F02
HD#5
HD#0
HD#2
HD#4
HD#3
HD#1
HD#6
AA21
AA6
F20
F6
AB4
AA5
Y6
AC4
AB5
AC6
H3
J3
J4
K5
J1
AD25
A6
Y3
W4
U6
AB22
AA20
AC23
AC24
AC20
AC21
AA2
AD24
AF23
AF22
F4
G5
F1
V5
AC1
H6
P1
L24
L25
K26
K25
J26
R5
L5
W23
P23
J23
F21
W22
R22
K22
E22
E5
D1
GTLREF1
GTLREF2
BPM#5
BPM#4
BPM#1
BPM#0
HREQ#4
HREQ#3
HREQ#2
HREQ#1
HREQ#0
R60 4.7K
R26 4.7K
R59 4.7K
R58 4.7K
RS#2
RS#1
RS#0
R38 49.9
R66 49.9
4
HREQ#[0..4] 6
VCCP
CPUCLK-0 3
CPUCLK0 3
RS#[0..2] 6
HBR#0 6
* Short trace
HADSTB#1 6
HADSTB#0 6
HDSTBP#3 6
HDSTBP#2 6
HDSTBP#1 6
HDSTBP#0 6
HDSTBN#3 6
HDSTBN#2 6
HDSTBN#1 6
HDSTBN#0 6
NMI 13
INTR 13
3
D D
HDBI#[0..3]6
FERR#13
STPCLK#13
INIT#13
HDBSY#6
HDRDY#6
HTRDY#6
HADS#6
BSEL03
HD#[0..63]6
100 MHz
133 MHz
8
HLOCK#6
HBNR#6
HIT#6
HITM#6
HBPRI#6
HDEFER#6
CPU_TMPA23,24
VTIN_GND24
PROCHOT#13
IGNNE#13
SMI#13
A20M#13
CPUSLP#13
FSB
R544 X_0
CPU_GD6
CPURST#6
C C
Trace : 10
mil width
10mil
space
R63 X_33
BSEL0
0
1
B B
A A
GTLREF1
Length < 1.5inch.
GTLREF2
Every pin put one 220pF cap near it.
Trace Width 15mils, Space 15mils.
Keep the voltage dividers within 1.5 inches of the
first GTLREF Pin
ITP_TMS
ITP_TDO
ITP_TCK
CPU STRAPPING RESISTORS
NA for S3
2/3*Vccp
C22
C21
220p
220p
2/3*Vccp
C16
C17 R19
220p
220p
CPU ITP BLOCK
R28 39
R29 75
R31 27
CLOSED TO SOCKET478
PROCHOT#
CPU_GD
HBR#0
CPURST#
THERMTRIP#
BPM#0
BPM#1
BPM#4
BPM#5
ITP_TDI
ITP_TRST#
CPU_GD
CPURST#
CPUSLP#
CLOSED TO SOCKET478
STPCLK#
CPUSLP#
SMI#
INIT#
FERR#
A20M#
INTR
NMI
IGNNE#
Title
Size Document Number Rev
Date: Sheet of
R14 62
R64 62
R48 49.9
R65 49.9
R50 62
R22 49.9
R23 49.9
R25 49.9
R24 49.9
R49 150
R30 680
R13 56
R16 X_56
R17 56
R15 56
R27 62
RN2
7 8
5 6
3 4
1 2
56
MICRO-STAR INT'L CO.,LTD.
mPGA478 CPU-1
MS-6533 0A
2
R61
49.9
C30
R62
1u
100
VCCP
R12
X_49.9-1%U4A
X_100-1%
VCCP
VCCP
VCCP
VCCP
X_1000p-0805C33
X_1000p-0805C34
X_0.022uC3
VCCP
VCCP
4 31Thursday, October 25, 2001
1
8
7
6
5
4
3
2
1
VCC
VSS
VCC
VSS
F13
VCC
VSS
G21G6G24
F15
F17
VCC
VCC
VSS
VSS
G3H1H23
F19
F9
VCC
VSS
VCC_VID
AF4
VCC
VSS
VSS
H26H4J2
AF3
VCC-VID
VSS
VSS
AD20
AE23
VCC-IOPLL
VCC-VIDPRG
VSS
VSS
VSS
VSS
J22
J25J5K21
VCCA
VSSA
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
PGA-S478-F02
AD22
Y5
Y25
Y22
Y2
W6
W3
W24
W21
V4
V26
V23
V1
U5
U25
U22
U2
T6
T3
T24
T21
R4
R26
R23
R1
P5
P25
P22
P2
N6
N3
N24
N21
M5
M25
M22
M2
L4
L26
L23
L1
K6
K3
K24
C32
X_10u-1206
C27
X_10u-1206
C31
22u-1206
L14 4.7u-10%
L13 4.7u-10%
C26
22u-1206
VCCP
CPU VOLTAGE BLOCK
VCCP
D D
C C
AA11
AA13
AA15
AA17
AA19
AA23
AA26
AB10
AB12
AB14
AB16
AB18
AB20
AB21
AB24
AC11
AC13
AC15
AC17
AC19
AC22
AC25
A10
A12
A14
A16
A18
A20A8AA10
AA12
AA14
AA16
AA18
AA8
AB11
AB13
AB15
AB17
AB19
AB7
AB9
AC10
AC12
AC14
AC16
AC18
AC8
AD11
AD13
AD15
AD17
AD19
AD7
AD9
AE10
AE12
AE14
AE16
AE18
AE20
AE6
AE8
AF11
AF13
AF15
AF17
AF19
AF2
AF21
AF5
AF7
AF9
B11
B13
B15
B17
B19B7B9
C10
C12
C14
C16
C18
C20C8D11
D13
D15
D17
D19D7D9
E10
E12
E14
E16
E18
VCC
VSS
E20E8F11
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
F12
F14
F16
F18F2F22
F25F5F8
U4B
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
D10
VSS
A11
VSS
A13
VSS
A15
VSS
A17
VSS
A19
VSS
A21
VSS
A24
VSS
A26
VSS
A3
VSS
A9
VSS
AA1
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AA4
VSS
AA7
VSS
AA9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AB3
VSS
AB6
VSS
AB8
VSS
VSS
VSS
VSS
VSS
VSS
AC2
VSS
VSS
VSS
AC5
VSS
AC7
VSS
AC9
VSS
AD1
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AD10
AD12
AD14
AD16
AD18
AD21
AD23
AD4
AD8
AE11
AE13
AE15
AE17
AE19
AE22
AE24
AE26
AE7
AE9
AF1
AF10
AF12
AF14
AF16
AF18
AF20
AF6
AF8
B10
B12
B14
B16
B18
B23
B20
B26B4B8
C11
C13
C15
C17C2C19
C22
C25C5C7C9D12
D14
D16
D18
D20
D21D3D24D6D8E1E11
VSS
E13
E15
VCC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
E17
E19
E23
E7E9F10
E4
E26
B B
CPU DECOUPLING CAPACITORS
VCCP
CB15
10u-1206
CB19
10u-1206
CB23
10u-1206
CB31
10u-1206
CB39
10u-1206
CB44
10u-1206
CB49
10u-1206
CB53
A A
10u-1206
CB55
10u-1206
CB16
10u-1206
PLACE CAPS WITHIN CPU CAVITY
8
7
VCCP
CB14
10u-1206
CB28
10u-1206
CB20
10u-1206
CB33
10u-1206
10u-1206
CB51
10u-1206
CB54
10u-1206
CB40
10u-1206
CB29
10u-1206
VCCP
CB34
10u-1206
CB41
10u-1206
CB47
10u-1206
CB30
10u-1206CB46
CB35
10u-1206
CB42
10u-1206
CB48
10u-1206
MICRO-STAR INT'L CO.,LTD.
Title
mPGA478 CPU-2
Size Document Number Rev
MS-6533 0A
6
5
4
3
Date: Sheet of
2
5 31Thursday, October 25, 2001
1
5
4
3
2
1
SIS645
C1XAVSS
C1XAVDD
C4XAVSS
C4XAVDD
HVREF
HPCOMP
HNCOMP
HNCVREF
ST0
ST1
ST2
AAD0
AAD1
AAD2
AAD3
AAD4
AAD5
AAD6
AAD7
AAD8
AAD9
AAD10
AAD11
AAD12
AAD13
AAD14
AAD15
AAD16
AAD17
AAD18
AAD19
AAD20
AAD21
AAD22
AAD23
AAD24
AAD25
AAD26
AAD27
AAD28
AAD29
AAD30
AAD31
SBA7
SBA6
SBA5
SBA4
SBA3
SBA2
SBA1
SBA0
D D
C C
B B
A A
SIS-SIS645-VA2
AC/BE#3
AC/BE#2
AC/BE#1
AC/BE#0
AREQ#
AGNT#
AFRAME#
AIRDY#
ATRDY#
ADEVSEL#
ASERR#
ASTOP#
AGP8XDET
ADBIH
SB_STB
SB_STB#
AD_STB0
AD_STB#0
AD_STB1
AD_STB#1
AGPCLK
AGPRCOMP
A1XAVDD
A1XAVSS
A4XAVDD
A4XAVSS
AGPVREF
AGPVSSREF
HDSTBN#3
HDSTBN#2
HDSTBN#1
HDSTBN#0
HDSTBP#3
HDSTBP#2
HDSTBP#1
HDSTBP#0
DBI#3
DBI#2
DBI#1
A27
H27
R25
HDBI#2
HDBI#1
HDBI#0
CT13
X_10u_0805
APAR
RBF#
WBF#
PIPE#
ADBIL
DBI#0
U9A
F6
F3
H4
K5
C9
A6
G2
G1
G3
G4
H5
H1
H3
E8
F8
D9
D10
B3
C4
B5
A4
K1
L1
C1
D1
B10
M1
B9
A9
B8
A8
M3
M2
F20
F23
K24
P24
F21
F24
L24
N25
SIS-SIS650-VA1
2
ACBE#1
ACBE#0HDEFER#
ADEVSEL#
APAR
ADSTB0
ADSTB1
ADSTB#1
AGPCLK0
AGPRCOMP
A1XAVDD
A1XAVSS
A4XAVDD
A4XAVSS
HDSTBN#3
HDSTBN#2
HDSTBN#1
HDSTBN#0
HDSTBP#3
HDSTBP#2
HDSTBP#1
HDSTBP#0
HDBI#[0..3] 4
AH25
AJ25
AH27
AJ27
U21
T21
P21
N21
J17
B20
B19
A19A7F9B7M6M5M4L3L6L4K6L2K3J3K4J2J6J4J1H6F4F1G6E3F5E2E4E1D3D4C2F7C3E6B2D5D6A3D7C5A5C6D8
CPUCLK13
CPUCLK-13
HDEFER#4
HLOCK#4
HTRDY#4
CPURST#4
CPU_GD4
RS#[0..2]4
HADS#4
HITM#4
HIT#4
HDRDY#4
HDBSY#4
HBNR#4
HREQ#[0..4]
HREQ#[0..4]4
HA#[3..31]
HA#[3..31]4
VCCP
VCCP VCCP
R122
75
R109
150
5
CPUCLK1 ACBE#3
CPUCLK-1 ACBE#2
HLOCK#
HTRDY# AREQ#
CPURST# AGNT#
CPU_GD AFRAME#
HBPRI#4
HBR#04
HBPRI# AIRDY#
HBR#0 ATRDY#
RS#[0..2]
HADS#
HITM# RBF#
HIT# WBF#
HDRDY# PIPE#
HDBSY#
HBNR#
HREQ#4
HREQ#3
HREQ#2 SBSTB
HREQ#1 SBSTB#
HREQ#0
HADSTB#1 ADSTB#0
HADSTB#0
HA#31
HA#30
HA#29
HA#28
HA#27
HA#26
HA#25
HA#24
HA#23
HA#22
HA#21
HA#20
HA#19
HA#18
HA#17
HA#16
HA#15
HA#14
HA#13
HA#12
HA#11
HA#10
HA#9
HA#8
HA#7
HA#6
HA#5
HA#4
HA#3
HNCOMP
Rds-on(n) = 10 ohm
HNCVERF = 1/3 VCCP
Rds-on(p) = 56 ohm
HPCVERF = 2/3 VCCP
HD#[0..63]4
CB115
0.01u
CB105
0.01u
place this capacitor
under 650 solder side
R104
R94
110
HADSTB#14
HADSTB#04
20
AJ26
CPUCLK
AH26
CPUCLK#
U26
DEFER#
U24
HLOCK#
V26
HTRDY#
C20
CPURST#
D19
CPUPWRGD
T27
BPRI#
U25
W26
W28
W29
W24
W25
AD24
AA24
AF26
AE25
AH28
AD26
AG29
AE26
AF28
AC24
AG28
AE29
AD28
AC25
AD27
AE28
AF27
AB24
AB26
AC28
AC26
AC29
AA26
AB28
AB27
AA25
AA29
AA28
BREQ0#
T24
RS#2
T26
RS#1
U29
RS#0
V28
ADS#
T28
HITM#
U28
HIT#
DRDY#
V24
DBSY#
V27
BNR#
HREQ#4
HREQ#3
HREQ#2
HREQ#1
Y27
HREQ#0
HASTB#1
HASTB#0
HA#31
HA#30
HA#29
HA#28
HA#27
HA#26
HA#25
HA#24
HA#23
HA#22
HA#21
HA#20
HA#19
HA#18
HA#17
HA#16
HA#15
HA#14
HA#13
HA#12
HA#11
HA#10
HA#9
HA#8
HA#7
HA#6
Y26
HA#5
Y24
HA#4
Y28
HA#3
HD#63
HD#62
HD#61
HD#60
B21
F19
A21
E19
HD#63
HD#62
HD#61
HD#60
R98
150
R101
75
4
RS#2 ASERR#
RS#1 ASTOP#
RS#0
HD#[0..63]
HVREF
CB102
0.1u
HVREF0
HVREF1
HVREF2
C4XAVSS
C4XAVDD
HVREF3
C1XAVSS
C1XAVDD
HOST
HD#59
HD#58
HD#57
HD#56
HD#55
HD#54
HD#53
HD#52
HD#51
C22
B23
HD#56
HD#55
HNCVREF
A23
HD#54
CB94
0.01u
CB97
0.01u
D21
HD#53
F22
HD#52
D24
HD#51
HD#50
D23
HD#50
D22
HD#59
D20
HD#58
B22
HD#57
ST0
ST1
ST2
AAD0
AAD1
AAD2
AAD3
AAD4
AAD5
AAD6
AAD7
HVREF4
HPCOMP
HNCOMP
HNCOMPVREF
AAD8
650-1
HD#49
HD#48
HD#47
HD#46
HD#45
HD#44
HD#43
HD#42
HD#41
HD#40
HD#39
HD#38
HD#37
HD#36
HD#35
HD#34
HD#33
C24
HD#49
B24
HD#48
E25
HD#47
E23
HD#46
D25
A25
HD#45
HD#44
C1XAVDD
C1XAVSS
C26
HD#43
B26
HD#42
B27
HD#41
D26
HD#40
B28
HD#39
E26
HD#38
F28
HD#37
G25
F27
F26
HD#36
HD#35
COST DOWN
CB85
0.01u
1 2
X_COPPER_0
HD#34
G24
HD#33
L16
0
CP7
HD#32
H24
HD#32
AAD9
HD#31
G29
HD#31
AAD10
HD#30
J26
HD#30
AAD11
HD#29
G26
HD#29
VCC3
AAD12
AAD13
HD#28
HD#27
J25
H26
HD#28
HD#27
CT14
X_10u_0805
AAD14
HD#26
G28
HD#26
AAD15
HD#25
H28
HD#25
AAD16
HD#24
J24
K28
HD#24
3
AAD17
HD#23
HD#23
AAD18
HD#22
J29
HD#22
AAD19
HD#21
K27
HD#21
AAD20
HD#20
J28
HD#20
AAD21
HD#19
M24
HD#19
AAD22
HD#18
L26
HD#18
AAD23
HD#17
K26
L25
HD#17
HD#16
C4XAVDD
C4XAVSS
AAD24
HD#16
AAD25
HD#15
L28
HD#15
AAD26
HD#14
M26
HD#14
AAD27
HD#13
P26
HD#13
AAD28
HD#12
L29
HD#12
AAD29
AAD30
AAD31
AGP
HD#11
HD#10
HD#9
HD#8
N24
N26
M27
N28
P27
HD#9
HD#8
HD#7
HD#11
HD#10
SBA7
HD#7
N29
HD#6
CB84
0.01u
SBA6
HD#6
SBA5
SBA4
SBA3
HD#5
HD#4
HD#3
R24
R28
M28
HD#5
HD#4
HD#3
L15
80
CP6
1 2
X_COPPER_0
P28
HD#2
SBA2
HD#2
R26
HD#1
SBA1
HD#1
C7
R29
HD#0
SBA0
HD#0
E21
HDBI#3
VCC3
AAD[0..31]
SBA[0..7]
ACBE#[0..3]
ST[0..2]
ADSTB[0..1]
ADSTB#[0..1]
AREQ# 15
AGNT# 15
AFRAME# 15
AIRDY# 15
ATRDY# 15
ADEVSEL# 15
ASERR# 15
ASTOP# 15
SBSTB 15
SBSTB# 15
AGPCLK0 3
AVREFGC
HDSTBN#3 4
HDSTBN#2 4
HDSTBN#1 4
HDSTBN#0 4
HDSTBP#3 4
HDSTBP#2 4
HDSTBP#1 4
HDSTBP#0 4
APAR 15
RBF# 15
WBF# 15
PIPE# 15
AAD[0..31] 15
SBA[0..7] 15
ACBE#[0..3] 15
ST[0..2] 15
ADSTB[0..1] 15
ADSTB#[0..1] 15
VDDQ
R160
60.4
VCC3
VCC3
CT20
X_10U_0805
CT22
X_10u_0805
1
AVREFGC 15
6 31Sunday, October 28, 2001
C253
0.01u
COST DOWN
CB134
0.1u
L34
0
CB132
0.01u
1 2
X_COPPER_0
L36
80
CB138
0.01u
CP17
1 2
X_COPPER_0
CP15
A1XAVDD
A1XAVSSHPCOMP
A4XAVDD
CB136
0.1u
A4XAVSS
MICRO-STAR INT'L CO.,LTD.
Title
SIS645/650-1
Size Document Number Rev
MS-6533 0A
Date: Sheet of
5
4
3
2
1
MA7
MA8
MA5
MA6
RN220
D D
Rs place close to DIMM1
MA14
MA13
MA9
RN200
U9B
RMD1 MD1 MD0
RMD5 MD5 MD1
RMD4 MD4 MD2
RMD0 MD0 MD3
RMD6 MD6 MD4
RMD2 MD2 MD5
RDQM0 DQM0 MD6
RDQS0 DQS0 MD7
RMD9 MD9 DQM0
RMD8 MD8 DQS0
RMD7 MD7 MD8
RMD3 MD3 MD9 MA2
RMD11 MD11 MD10
RMD10 MD10 MD11
RMD15 MD15 MD12
RMD14 MD14 MD13
RDQM1 DQM1 MD14 MA7
RMD13 MD13 MD15 MA8
RDQS1 DQS1 DQM1
RMD12 MD12 DQS1 MA10 RMA10
RMD21 MD21 MD16 MA11 RMA11
C C
B B
A A
RMD17 MD17 MD17 MA12 RMA12
RMD16 MD16 MD18 MA13
RMD20 MD20 MD19 MA14
RMD22 MD22 MD20
RMD18 MD18 MD21 SRAS# RSRAS#
RDQM2 DQM2 MD22 SCAS# RSCAS#
RDQS2 DQS2 MD23 SWE# RSWE#
RMD28 MD28 DQM2
RMD24 MD24 DQS2
RMD23 MD23 MD24
RMD19 MD19 MD25
RMD31 MD31 MD26
RMD27 MD27 MD27
RMD30 MD30 MD28
RMD26 MD26 MD29
RDQM3 DQM3 MD30
RDQS3 DQS3 MD31
RMD25 MD25 DQM3
RMD29 MD29 DQS3
RMD37 MD37 MD32 CKE0
RMD33 MD33 MD33 CKE1
RMD36 MD36 MD34 CKE2
RMD32 MD32 MD35 CKE3
RMD38 MD38 MD36
RMD34 MD34 MD37
RDQM4 DQM4 MD38
RDQS4 DQS4 MD39
RMD44 MD44 DQM4
RMD40 MD40 DQS4
RMD35 MD35 MD40 SDCLK
RMD39 MD39 MD41
RDQS5 DQS5 MD42 FWDSDCLKO
RDQM5 DQM5 MD43
RMD41 MD41 MD44
RMD45 MD45 MD45
RMD47 MD47 MD46
RMD43 MD43
RMD42 MD42 DQS5
RMD55 MD55 MD48 SDAVSS
RDQS6 DQS6 MD49
RMD54 MD54 MD50
RDQM6 DQM6 MD51 DDRAVDD
RMD53 MD53 MD52
RMD52 MD52 MD53 DDRAVSS
RMD49 MD49
RMD48 MD48 MD55
RMD56 MD56 DQM6
RMD60 MD60 DQS6 DDRVREFA
RMD51 MD51 MD56 DDRVREFB
RMD50 MD50 MD57
RMD62 MD62
RDQM7 DQM7 MD59 DDRAVDD
RMD57 MD57
RMD61 MD61 MD61
RMD63 MD63
RMD58 MD58
RDQS7 DQS7
RN3
1 2
3 4
5 6
10
7 8
RN5
1 2
3 4
5 6
10
7 8
RN7101 2
3 4
5 6
7 8
RN11
1 2
3 4
5 6
10
7 8
RN9101 2
3 4
5 6
7 8
RN15
1 2
3 4
5 6
10
7 8
RN17
1 2
3 4
5 6
10
7 8
RN23101 2
3 4
5 6
7 8
RN29
1 2
3 4
5 6
10
7 8
RN26101 2
3 4
5 6
7 8
RN38
1 2
3 4
5 6
10
7 8
RN40
1 2
3 4
5 6
10
7 8
RN41101 2
3 4
5 6
7 8
RN44
1 2
3 4
5 6
10
7 8
RN47101 2
3 4
5 6
7 8
RN51
1 2
3 4
5 6
10
7 8
RN49
1 2
3 4
5 6
10
7 8
RN53101 2
3 4
5 6
7 8
RN56
1 2
3 4
5 6
10
7 8
1 2
3 4
RN60
5 6
10
7 8
AJ23
MD0
AG22
MD1
AH21
MD2
AJ21
MD3
AD23
MD4
AE23
MD5
AF22
MD6
AF21
MD7
AD22
DQM0
AH22
DQS0/CSB#0
AD21
MD8
AG20
MD9
AE19
MD10
AF19
MD11
AE21
MD12
AD20
MD13
AD19
MD14
AH19
MD15
AF20
DQM1
AH20
DQS1/CSB#1
AF18
MD16
AG18
MD17
AH17
MD18
AD16
MD19
AD18
MD20
AD17
MD21
AF17
MD22
AJ17
MD23
AE17
DQM2
AH18
DQS2/CSB#2
AD14
MD24
AG14
MD25
AJ13
MD26
AE13
MD27
AJ15
MD28
AF14
MD29
AD13
MD30
AF13
MD31
AH13
DQM3
AH14
DQS3/CSB#3
AD10
MD32
AH10
MD33
AE9
MD34
AD8
MD35
AG10
MD36
AF10
MD37
AH9
MD38
AF9
MD39
AD9
DQM4
AJ9
DQS4/CSB#4
AH5
MD40
AG4
MD41
AE5
MD42
AH3
MD43
AG6
MD44
AF6
MD45
AF5
AF4
AH4
AJ3
AE4
AD6
AE2
AC5
AG2
AG1
AF3
AC6
AD4
AF2
AB6
AD3
AA6
AB3
AC4
AE1
AD2
AC1
AB4
AC2
MD46
MD47
DQM5
DQS5/CSB#5
MD48
MD49
MD50
MD51
MD52
MD53
MD54
MD55
DQM6
DQS6/CSB#6
MD56
MD57
MD58
MD59
MD60
MD61
MD62
MD63
DQM7
DQS7/CSB#7
MD47RMD46 MD46
DQM5 SDAVDD
MD54
MD58
MD60
MD62RMD59 MD59
MD63
DQM7
DQS7
650-2
MA0
MA1
MA2
MA3
MA4
MA5
MA6
MA7
MA8
MA9
MA10
MA11
MA12
MA13
MA14
SRAS#
SCAS#
SWE#
CS#0
CS#1
CS#2
CS#3
CS#4
CS#5
CKE0
CKE1
CKE2
CKE3
CKE4
CKE5
S3AUXSW#
SDCLK
FWDSDCLKO
SDRCLKI
SDAVDD
SDAVSS
DDRAVDD
DDRAVSS
DDRVREFA
DDRVREFB
DRAM_SEL
AH11
AF12
AH12
AG12
AD12
AH15
AF15
AH16
AE15
AD15
AF11
AG8
AJ11
AG16
AF16
AH8
AJ7
AH7
AE7
AF7
AH6
AJ5
AF8
AD7
AB2
AA4
AB1
Y6
AA5
Y5
Y4
<---
AA3
--->
AD11
AE11
Y1
Y2
AA1
AA2
AJ19
AH2
R183 4.7K
W3
CS-0
CS-1
CS-2
CS-3
R137 22
SIS-SIS650-VA1
MA0
MA1
MA3
MA4
MA5
MA6
MA9
RMA7
78
RMA8
56
RMA5
34
RMA6
12
78
RMA14
56
RMA13
34
RMA9
12
Rs place close to DIMM1
R74 0
12
34
56
78
RN1040
R75
R92 0
R78 0
R99 0
R108 0
R103 0
0
RN45 0
CKE: Open Drain
S3AUXSW#
R185 4.7K
C68
10p_0603
HI: DDR
RMA0
RMA1
RMA2
RMA3
RMA4
78
56
34
12
VCC3SBY
FWDSDCLKO 3
RMD[0..63]
RDQM[0..7]
RDQS[0..7]
RMA[0..14]
RCS-[0..3]
CKE[0..3]
RSRAS# 10,11
RSCAS# 10,11
RSWE# 10,11
RCS-0
RCS-2
RCS-1
RCS-3
S3AUXSW# 27
SDCLK 3
SDAVDD
SDAVSS
DDRAVSS
RMD[0..63] 10,11
RDQM[0..7] 10,11
RDQS[0..7] 10,11
RMA[0..14] 10,11
RCS-[0..3] 10,11
CKE[0..3] 10
DDRVREFA
DDRVREFB
CB153
0.1u
CB152
CB151
0.1u
0.01u
CB108
0.01u
CB113
0.01u
CB139
0.01u
CB140
0.01u
L46
80
CB154
0.01u
1 2
X_COPPER_0
L41
80
CP18
1 2
X_COPPER_0
CP21
VCCM
VCCM
R121
150
R123
150
R155
150
R154
150
VCC3
CT25
X_10u_0805
VCC3VCC3SBY
CT24
X_10u_0805
MICRO-STAR INT'L CO.,LTD.
Title
SIS645/650-2
Size Document Number Rev
MS-6533 0A
5
4
3
2
Date: Sheet of
1
7 31Sunday, October 28, 2001
5
4
3
2
1
NOTE: This page is for universal PCB design( suitable for both 645 or 650)
NB Hardware Trap Table
TRAP1
D11
TRAP1
TRAP0
E10
Default
1(DDR)
TESTMODE2
TESTMODE1
TESTMODE0
A10
F11
C11
DLLEN#
DRAM_SEL
D D
ZAD[0..15]12
ZSTB[0..1]12
ZSTB-[0..1]12
C C
ZAD[0..15]
ZSTB[0..1]
ZSTB-[0..1]
VCC1_8
CB155
R168
0.1u
150
ZVREF
CB150
R164
0.1u
150
TRAP0
TRAP1
CSYNC
RSYNC
LSYNC
ZCLK0
ZCLK03
ZUREQ
ZUREQ12
ZDREQ
ZDREQ12
ZSTB0
ZSTB-0 GOUT
ZSTB1
ZSTB-1 HSYNC
ZAD0
ZAD1 DDC1CLK
ZAD2 DDC1DATA
ZAD3
ZAD4
ZAD5 INTA#
ZAD6
ZAD7
ZAD8 CSYNC
ZAD9 RSYNC
ZAD10 LSYNC
ZAD11
ZAD12
ZAD13 VCOMP
ZAD14 VRSET
ZAD15 VVBWN ENTEST
ZVREF
VDDZCMP
ZCMP_N
ZCMP_P DACAVSS1
VSSZCMP
Z1XAVDD DCLKAVSS
Z1XAVSS
Z4XAVDD ECLKAVSS
Z4XAVSS
0
enable PLL disable PLL
SDR DDR
normal NB debug mode
TV selection, NTSC/PAL(0/1) 0
enable VB
enable VGA interface
enable panel link
U9C
SIS-SIS650-VA1
V3
ZCLK
U6
ZUREQ
U1
ZDREQ
T3
ZSTB0
T1
ZSTB#0
P1
ZSTB1
P3
ZSTB#1
T4
ZAD0
R3
ZAD1
T5
ZAD2
T6
ZAD3
R2
ZAD4
R6
ZAD5
R1
ZAD6
R4
ZAD7
P4
ZAD8
N3
ZAD9
P5
ZAD10
P6
ZAD11
N1
ZAD12
N6
ZAD13
N2
ZAD14
N4
ZAD15
U3
ZVREF
V5
VDDZCMP
U4
ZCMP_N
U2
ZCMP_P
V6
VSSZCMP
W1
Z1XAVDD
W2
Z1XAVSS
V2
Z4XAVDD
V1
Z4XAVSS
1
HyperZip
650-3
PCIRST#
PWROK
AUXOK
VGA
Stereo
Glass
Y3W4W6
PCIRST1#
PCIRST1#24,27
B B
PWRGD13,27
PWRGD
AUXOK
AUXOK13
DLLEN#
E11
0
0
0
1
0
ENTEST
F10
ENTEST
embedded pull-low
(30~50K Ohm)
yes
yes
yes
C15
VOSCI
A12
ROUT
B13
GOUT
A13
BOUT
F13
HSYNC
E13
VSYNC
D13
VGPIO0
D12
VGPIO1
B11
INT#A
E12
CSYNC
A11
RSYNC
F12
LSYNC
E14
VCOMP
D14
VRSET
F14
VVBWN
B12
DACAVDD1
C12
DACAVSS1
C13
DACAVDD2
C14
DACAVSS2
B15
DCLKAVDD
A15
DCLKAVSS
B14
ECLKAVDD
A14
ECLKAVSS
R478
R479
R480
R132 33
R128 33
R129 0
0
0
0
for 650 only
RSYNC
R158 4.7K
TRAP1
R146 4.7K
CSYNC
R159 4.7K
LSYNC
R161 4.7K
REFCLK0
VSYNC
REFCLK0 3
HSYNC 28
VSYNC 28
DDC1CLK 28
DDC1DATA 28
INTA# 12,15,16
CSYNC 15
RSYNC 15
LSYNC 15
DACAVDD1 PWRGD
DACAVSS1
DACAVDD1
AUXOK
DCLKAVDD
ECLKAVDD
VCC3
C292
47p
C294
C293
47p
47p
R142 4.7K
C92 0.1u
C254 0.1u
ROUT
BOUT
ROUT 28
GOUT 28
BOUT 28
VCC3
COST DOWN
C88
X_10u_0805
L42
0
CP19
1 2
Z1XAVDD
C83
0.1u
Z1XAVSS
X_COPPER_0
C90
X_10u_0805
VCC1_8
VCC3
C87
A A
X_10u_0805
COST DOWN
L39
0
CP20
1 2
X_COPPER_0
Z4XAVDD
C85
0.1u
Z4XAVSS
COST DOWN
L40
0
CP22
1 2
X_COPPER_0
VDDZCMP
R165 56
C89
R167 56
0.1u
ZCMP_N
ZCMP_P
VSSZCMP
DCLKAVDD
DCLKAVSS
ECLKAVDD
ECLKAVSS
CB119
0.1u
L26 80
CB120
0.1u
L27 X_80_0603
L24
80
CP9
1 2
X_COPPER_0
X_80_0603
CP10
1 2
X_COPPER_0
VCC3
CE2
X_10u_0805
L25
VCC3
CE3
VVBWN
DACAVDD1
DACAVSS1
CB104
CB100
0.1u
CP13
VRSETVCOMP
VCC1_8
80
R127
130
CE6
X_10u_0805
0.1u
L31
CB128
1 2
0.1u
X_COPPER_0
L30X_80_0603
X_10u_0805
MICRO-STAR INT'L CO.,LTD.
Title
SIS645/650
Size Document Number Rev
MS-6533 0A
5
4
3
2
Date: Sheet of
1
8 31Sunday, October 28, 2001
5
4
3
2
1
VCCP VCC1_8 VCC3
H21
H22
J16
J20
J21
J22
K16
K17
K18
K19
K20
K21
L20
M20
N20
P20
R20
R21
T20
U20
V20
W20
Y20
Y21
AA20
AA21
AA22
AB21
AB22
L12
L14
L15
L16
L18
M11
M19
N11
P19
R11
T19
U11
V19
W11
W13
W15
W17
P11
IVDD
VSS
J14
IVDD
IVDD
IVDD
PVDDZ
VSS
VSS
VSS
VSS
VSS
VSS
U17
U18
V12
V13
V14
V15
V16
VCCP
AE10
AE12
AE14
AE16
AE18
AE20
AE22
W18
AA10
AA13
AA14
AA15
AA16
AA17
AB13
AB17
A16
VTT
A17
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
VTT
A18
VTT
B16
VTT
B17
VTT
B18
VTT
C16
VTT
C17
VTT
C18
VTT
D15
VTT
D16
VTT
D17
VTT
D18
VTT
E15
VTT
E16
VTT
E17
VTT
E18
VTT
F15
VTT
F16
VTT
F17
VTT
F18
VTT
AB5
VDDM
AD5
VDDM
AE6
VDDM
AE8
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
V10
VDDM
V11
VDDM
VDDM
Y9
VDDM
Y10
VDDM
Y12
VDDM
Y14
VDDM
Y16
VDDM
Y18
VDDM
Y19
VDDM
AA8
VDDM
AA9
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
AB8
VDDM
AB9
VDDM
VDDM
VDDM
E5
VDDQ
E7
VDDQ
E9
VDDQ
G5
VDDQ
J5
VDDQ
L5
VDDQ
H8
VDDQ
H9
VDDQ
J8
VDDQ
J9
VDDQ
J10
VDDQ
J13
VDDQ
K9
VDDQ
K11
VDDQ
K13
VDDQ
L10
VDDQ
N9
VDDQ
N10
VDDQ
N5
VDDZ
R5
VDDZ
U5
VDDZ
W5
VDDZ
P9
VDDZ
P10
VDDZ
R9
VDDZ
R10
VDDZ
T9
VDDZ
T10
VDDZ
T11
VDDZ
PVDDP
PVDDP
PVDDP
PVDDP
PVDDP
PVDDP
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
L17
L19
N19
R19
U19
W19
M12
M13
M14
M15
M16
M17
M18
VSS
N12
N13
N14
N15
N16
N17
N18
P12
VSS
VSS
VSS
P13
P14
650-4
VSS
VSS
VSS
VSS
VSS
P15
P16
P17
P18
R12
R13
Power
VSS
VSS
VSS
R14
R15
VSS
VSS
VSS
VSS
VSS
VSS
VSS
R16
R17
R18
T12
T13
T14
T15
IVDD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
T16
T17
T18
U12
U13
U14
U15
U16
D D
VCCM
C C
VDDQ
B B
VCC1_8
A A
J15
OVDD
VSS
V17
K15
OVDD
VSS
V18
K10
OVDD
VSS
K12
PVDD
B25
K14
PVDD
VSS
C28
M10
PVDD
VSS
C29
VCC3SBY
W10
PVDD
VSS
VSS
D27
D28
Y11
PVDDM
PVDDM
VSS
VSS
E28
Y13
PVDDM
VSS
E29
Y15
PVDDM
VSS
AF23
Y17
PVDDM
VSS
AF24
AF25
VCCM
10u_0805
10u_0805
CB116
0.1u
CB86
0.1u
CB64
0.1u
CB38
0.1u
CT18
CT21
CB221
0.1u
CB223
0.1u
CB230
0.1u
CB226
0.1u
VCC3
CB114
1u
CB211
0.1u
CB213
0.1u
VCC3
CB227
0.1u
CB224
0.1u
CB148
0.1u
CB121
0.1u
VCC1_8SBY
CB156
1u
CB164
0.1u
VCC3SBY
VDDQ
CB225
0.1u
CB232
0.1u
CB233
0.1u
CB231
0.1u
CB103
1u
CB133
0.1u
VCC3SBY
U9D
CB112
1u
CB107
1u
CB63
1u
CB81
1u
CB145
0.1u
CB144
0.1u
1u-0805
1u-0805
1u-0805
1u-0805
CB229
CB228
CB220
CB219
CB162
1u
CB163
0.1u
VCCM
U10
U9
A20
A22
A24
A26
C19
C21
C23
C25
C27
E20
E22
E24
F25
H25
K25
M25
P25
T25
V25
Y25
AB25
AD25
E27
G27
J27
L27
N27
R27
U27
W27
AA27
AC27
AE27
D29
F29
H29
K29
M29
P29
T29
V29
Y29
AB29
AD29
AF29
AE24
AG25
B4
B6
C8
C10
D2
F2
H2
K2
P2
T2
V4
AD1
AF1
AC3
AE3
AG3
AG5
AG7
AG9
AG11
AG13
AG15
AG17
AG19
AG21
AG23
AJ4
AJ6
AJ8
AJ10
AJ12
AJ14
AJ16
AJ18
AJ20
AJ22
AJ24
AG27
SIS-SIS650-VA1
VCC1_8SBY
VCC3SBY
VCCP
VDDQ
CB146
0.1u
CB149
0.1u
Place these capacitors under 635 solder side
VCCP
VCC1_8
CB216
0.1u
CB218
0.1u
CB222
0.1u
CB217
0.1u
AUX1.8
AUX3.3
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AG24
AG26
AH23
AH24
MICRO-STAR INT'L CO.,LTD.
Title
VCC1_8
5
4
3
2
SIS645/650-4
Size Document Number Rev
MS-6533 0A
Date: Sheet of
9 31Sunday, October 28, 2001
1