MSI MS-171B1 Schematics rev.A

5

4

3

2

1

DDR II 400/533/667

MS-171B1-0A

AMD S1 PROCESSOR 638-Pin uFCPGA 638

OUT

4,5,6,7

16x16

IN

R G B

LVDS

D D

ICS951462

EXTERNAL CLOCK GENERATOR

15

HyperTransport

LINK0

SIDE MEMORY

BOOTSTRAPS ROM(DNI)

13

14

DDR2 400MHz

I2C I/F

ATI NB - RX690T

HyperTransport LINK0 CPU I/F INTEGRATED GRAPHICS LVDS/TVOUT/TMDS

X1 PCIE INTERFACE

1 X16 PCIE VIDEO/SDVO I/F

UNBUFFERED DDR2 NEAR SODIMM

200-PIN DDR2 SODIMM

UNBUFFERED DDR2 FAR SODIMM

200-PIN DDR2 SODIMM

VGA CONN

LVDS CONN

8,9

16

1 X4 PCIE I/F WITH SB

3G

PCIE0 PCIE1 PCIE2

C C

30

TV

30

NEW CARD

24

RTL8111B

PCIE3

25

10,11,12,13,14

4 X1 PCIE I/F

HDMI

HDMI CONN

16

A-LINK

X4

NewCard

USB#5

MiniPCI

USB#1

USBPORT

USB#6

USBPORT

USB#9

USBPORT

USB#8

CAMERA

USB#2

WIRELESS

USB#0

B B

USBPORT

USB#3

BLUETOOTH

USB#7

USBPORT

USB#4

BOOTSTRAPS ROM (SB)

21

USB 2.0

I2C I/F

ATI SB - SB600

USB 2.0 (10 PORTS) SATA II (4 PORTS) AZALIA HD AUDIO AC97 2.3 ATA 66/100/133 SPI I/F LPC I/F

ACPI 2.0 INT RTC HW MONITOR

PCI/PCI BDGE

17, 18, 19, 20, 21

HD AUDIO I/F

ALC883/888

ATA 66/100/133 I/F

PCI

AZALIA CODEC

26

SATA CONNECTOR

IDE CONNECTOR

OZ711

CARDREADER

AMP & AUDIO CONN

28

22

27

WIRELESS

PCIE0

BATTERY CHAGER

SYSTEM MAIN POWER

A A

SB600 & PCIE POWER

40

37

39

5

30

CPU CORE POWER

CPU&RS690M HT VLDT POWER

35

DISCHARGE CIRCUIT

CPU MEMORY POWER

36

RS690M CORE POWER

4

38

39

37

LPC DEBUG

3

PS2

KBD MOUSE

LPC BUS

KBC ENE3910

BIOS

31

ISA I/F

CIR

CPU FAN

31

33

MICRO-STAR INT'L CO.,LTD.

Title

BLOCK DIAGRAM

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

MICRO-STAR INT'L CO.,LTD.

MS-171B1

A

150Wednesday, January 24, 2007

1

5

4

3

2

1

+3VALW

SYSTEM PWR

LDO

PWR_SRC

D D

C C

PWR_SRC

MAIN POWER

MEMORY

SUS_ON

VTTEN

PWR SWITCH

ENABLE

TPS51120RHBR

SYSTEM PWR

LDO

ENABLE

PWR SWITCH

ENABLE

SC486I

+5VSUS

+5VALW

RUND

USB5V_A

RUND

CPU_VTT_SUS

CPU_VDDIO_SUS

ADD5V

+5VRUN

+3SUS

VCCFAN1

CRT5V

RUND_DG

BT_RADIO_ON#

CPU_M_VREF_SUS

MEM_M_VREF_SUS

+5V_CAMERA

+5VRUN_BT

EN_MCARD_VCC3#

OZ2211S-B

VDDA_EN

RT9167/A

+3.3V_AVDDC

AVDD_USB

EN_MCARD_VCC3#

CPPE#

QSOP24

VDD33

CAVCC

+VDDA

MCARD_VCC3

+3VSUS_CARD

+3VRUN

AVDD33

AVDD18

EVDD18

DVDD15

DTV_3G_PWRON

WLAN_PWRON

SPEAKER_MUTE#

CPPE#

QSOP24

AVDDCK_3V

CLK_VDDA

CLK_VDD

VDDR3

+2.5VRUN

XTLVDD_ATA

+3VRUN

AME8804

LVDS_DIGON

+3VRUN_TV

+3VRUN_WL

+3V_SPDIF

+3VRUN_CARD

+1.27VRUN

PLLVDD_ATA

+3V_LCD

VID(0-5)

Output Select

ADAPTER&BATTERY

B B

PWR_SRC

C P U

+3VRUN

CPU CORE

ENABLEVDD_EN

MAX8774GTL+

PWR SWITCH

ON/SKIP1

CPU_VDD_RUN

+1.8VRUN

1_5_VCC

APL5912

AVDDQ

PLLVDD

HTPVDD

VDD18

+1_5VRUN

CPPE#

QSOP24

+1_5VRUN_CARD

PWR_SRC

VLDT_EN

PLLVDD12

VDDA12

VDDA18

+1.2VRUN

PCIE_VDDR

AVDDCK_1.2V

+VLDT

VCC_NB

MICRO-STAR INT'L CO.,LTD.

Title

POWER DELIVERY CHART

Size

Document Number Rev

Size Document Number Rev

Custom

Date: Sheet

2

MICRO-STAR INT'L CO.,LTD.

MS-171B1

of

25

of

25

of

25

1

A

0Wednesday, January 24, 2007

NB SB

RUND

PWR SWITCH

+5VSUS

A A

ON/SKIP2

+1.2VSUS

OZ813LP_QFN24

5

4

+1.2VRUN

3

5

4

3

2

1

100MHZ

RS690T

GFX_CLKP

GFX_CLKN

SB_OSCIN

SBSRC_CLKP

SBSRC_CLKN

CLK_48M_USB

HTREFCLK

14.318MHZ

100MHZ

48MHZ

REFCLK+

REFCLK-

REFCLK+

REFCLK-

PIN19

PIN18

PEX_REFCLK#

PEX_REFCLK

REFCLK_P

REFCLK_N

3

OSCIN

MINI-PCIE-CARD

TV TUNER/3G CARD

NEW CARD

ROBSON

RTL8111B

25MHZ20P_S-2

14M_OSC

PCIE_RCLKP

PCIE_RCLKN

USBCLK

PCICLK0 PCI_CLK0

AZ_BITCLK

PCICLK5

PCI_CLK0

AZ_BIT_CLK

PCI_CLK5

33MHZ

SB600

32.768KHZ12.5P_S-2

Title

CLOCK DISTRIBUTION

Document Number Rev

Size

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

OZ711

BIT_CLK

ALC883

PIN12

MDC CONN

LCLK

KBC

MICRO-STAR INT'L CO.,LTD.

MS-171B1

24.576MHZ_SMD5X3.2

TP_CLK

PSCLK3

32.768KHZ12.5P_S-2

1

PIN4

TP

A

of

35

0Wednesday, January 24, 2007

SBLINK_CLKP

SRCCLKT0

ATIGCLKT0

ATIGCLKC0

HTTCLK0

FS2/REF2

FS1/REF1

SRCCLKT1

SRCCLKC1

48MHz_0

SRCCLKT2

SRCCLKC2

SRCCLKT3

SRCCLKC3

SRCCLKT4

SRCCLKC4

SRCCLKT6

SRCCLKC6

SRCCLKT5

SRCCLKC5

SBLINK_CLKN

SRCCLKC0

D D

FAR SODIMMNEAR SODIMM

CK1

CK0

CK0#

CK1#

C C

HZ

333MHZ

333M

MEM_MA0_CLK1_N

MEM_MA0_CLK1_P

MA0_CLK_L1

MA0_CLK_H1

333MHZ

MEM_MA0_CLK2_N

MEM_MA0_CLK2_P

MA0_CLK_L2

MA0_CLK_H2

AMD CPU

B B

A A

CK0

CK0#

333MHZ

MEM_MB0_CLK1_N

MEM_MB0_CLK1_P

MB0_CLK_L1

MB0_CLK_H1

CK1

CK1#

333MHZ

MEM_MB0_CLK2_N

MEM_MB0_CLK2_P

MB0_CLK_L2

MB0_CLK_H2

CPUCLK8T0

CPUCLK8C0

CPUCLK

CPUCLK#

200MHZ

CLKIN_H

CLKIN_L

100MHZ

NBSRC_CLKP

NBSRC_CLKN

HTREFCLK

NB_OSC

GPP_CLK0P

GPP_CLK0N

GPP_CLK1P

GPP_CLK1N

GPP_CLK2P

GPP_CLK2N

GPP_CLK4P

GPP_CLK4N

GPP_CLK3P

GPP_CLK3N

100MHZ

SB_CLKP SB_CLKN

200MHZ

14.318MHZ

CLOCK GENERATOR

14.31818MHZ20P_S-2

5

4

5

4

3

2

1

PROCESSOR HYPERTRANSPORT INTERFACE

VLDT_Ax AND VLDT_Bx ARE CONNECTED TO THE LDT_RUN POWER SUPPLY THROUGH THE PACKAGE OR ON THE DIE. IT IS ONLY CONNECTED

D D

HT_CADIN15_P10 HT_CADIN15_N10 HT_CADIN14_P10 HT_CADIN14_N10 HT_CADIN13_P10

C C

B B

+VLDT

HT_CADIN13_N10 HT_CADIN12_P10 HT_CADIN12_N10 HT_CADIN11_P10 HT_CADIN11_N10 HT_CADIN10_P10 HT_CADIN10_N10 HT_CADIN9_P10 HT_CADIN9_N10 HT_CADIN8_P10 HT_CADIN8_N10 HT_CADIN7_P10 HT_CADIN7_N10 HT_CADIN6_P10 HT_CADIN6_N10 HT_CADIN5_P10 HT_CADIN5_N10 HT_CADIN4_P10 HT_CADIN4_N10 HT_CADIN3_P10 HT_CADIN3_N10 HT_CADIN2_P10 HT_CADIN2_N10 HT_CADIN1_P10 HT_CADIN1_N10 HT_CADIN0_P10 HT_CADIN0_N10

ON THE BOARD TO DECOUPLING NEAR THE CPU PACKAGE

+VLDT

1A

D4

VLDT_A3

D3

VLDT_A2

D2

VLDT_A1

D1

VLDT_A0

N5

L0_CADIN_H15

P5

L0_CADIN_L15

M3

L0_CADIN_H14

M4

L0_CADIN_L14

L5

L0_CADIN_H13

M5

L0_CADIN_L13

K3

L0_CADIN_H12

K4

L0_CADIN_L12

H3

L0_CADIN_H11

H4

L0_CADIN_L11

G5

L0_CADIN_H10

H5

L0_CADIN_L10

F3

L0_CADIN_H9

F4

L0_CADIN_L9

E5

L0_CADIN_H8

F5

L0_CADIN_L8

N3

L0_CADIN_H7

N2

L0_CADIN_L7

L1

L0_CADIN_H6

M1

L0_CADIN_L6

L3

L0_CADIN_H5

L2

L0_CADIN_L5

J1

L0_CADIN_H4

K1

L0_CADIN_L4

G1

L0_CADIN_H3

H1

L0_CADIN_L3

G3

L0_CADIN_H2

G2

L0_CADIN_L2

E1

L0_CADIN_H1

F1

L0_CADIN_L1

E3

L0_CADIN_H0

E2

L0_CADIN_L0

HT_CLKIN1_P10 HT_CLKIN1_N10 HT_CLKIN0_P10 HT_CLKIN0_N10

J5

L0_CLKIN_H1

K5

L0_CLKIN_L1

J3

L0_CLKIN_H0

J2

L0_CLKIN_L0

U17AU17A

L0_CADOUT_H15

L0_CADOUT_L15

L0_CADOUT_H14

L0_CADOUT_L14

L0_CADOUT_H13

L0_CADOUT_L13

L0_CADOUT_H12

L0_CADOUT_L12

L0_CADOUT_H11

L0_CADOUT_L11

L0_CADOUT_H10

L0_CADOUT_L10

L0_CADOUT_H9

L0_CADOUT_L9

L0_CADOUT_H8

L0_CADOUT_L8

L0_CADOUT_H7

L0_CADOUT_L7

L0_CADOUT_H6

L0_CADOUT_L6

L0_CADOUT_H5

L0_CADOUT_L5

L0_CADOUT_H4

L0_CADOUT_L4

L0_CADOUT_H3

L0_CADOUT_L3

L0_CADOUT_H2

L0_CADOUT_L2

L0_CADOUT_H1

L0_CADOUT_L1

L0_CADOUT_H0

L0_CADOUT_L0 L0_CLKOUT_H1

L0_CLKOUT_L1

L0_CLKOUT_H0

L0_CLKOUT_L0

VLDT_B3 VLDT_B2 VLDT_B1 VLDT_B0

AE5 AE4 AE3 AE2

T4 T3 V5 U5 V4 V3 Y5 W5 AB5 AA5 AB4 AB3 AD5 AC5 AD4 AD3 T1 R1 U2 U3 V1 U1 W2 W3 AA2 AA3 AB1 AA1 AC2 AC3 AD1 AC1

Y4 Y3 Y1 W1

C307

4.7u_6V_0603

HT_CADOUT15_P HT_CADOUT15_N HT_CADOUT14_P HT_CADOUT14_N HT_CADOUT13_P HT_CADOUT13_N HT_CADOUT12_P HT_CADOUT12_N HT_CADOUT11_P HT_CADOUT11_N HT_CADOUT10_P HT_CADOUT10_N HT_CADOUT9_P HT_CADOUT9_N HT_CADOUT8_P HT_CADOUT8_N HT_CADOUT7_P HT_CADOUT7_N HT_CADOUT6_P HT_CADOUT6_N HT_CADOUT5_P HT_CADOUT5_N 10 HT_CADOUT4_P HT_CADOUT4_N HT_CADOUT3_P HT_CADOUT3_N HT_CADOUT2_P HT_CADOUT2_N HT_CADOUT1_P HT_CADOUT1_N 10 HT_CADOUT0_P HT_CADOUT0_N

HT_CLKOUT1_P HT_CLKOUT1_N HT_CLKOUT0_P HT_CLKOUT0_N

10

10 10

10

10 10

10

AMD check list 4-24~4-27

C378

4.7u_6V_0603

+VLDT

0.22u_10V_0402_NC

C374

4.7u_6v_0603

C153

180pF_50v_0402_NC

C151

0.22u_10V_0402

C157

C156

180pF_50v_0402

LAYOUT: Place bypass cap on topside of board

NEAR HT POWER PINS THAT ARE NOT CONNECTED DIRECTLY TO DOWNSTREAM HT DEVICE, BUT CONNECTED INTERNALLY TO OTHER HT POWER PINS PLACE CLOSE TO VLDT0 POWER PINS

5

HT_CTLIN1_P HT_CTLIN1_N

P3 P4

N1 P1

L0_CTLIN_H1 L0_CTLIN_L1

L0_CTLIN_H0 L0_CTLIN_L0

Athlon 64 S1 Processor Socket

L0_CTLOUT_H1

L0_CTLOUT_L1

L0_CTLOUT_H0

L0_CTLOUT_L0

4

R27

R27 R28

A A

R28

51_0402

51_0402 51_0402

51_0402

HT_CTLIN0_P10 HT_CTLIN0_N10

HT_CPU_CTLOUT1_P

T5

HT_CPU_CTLOUT1_N

R5 R2

R3

HT_CTLOUT0_P HT_CTLOUT0_N

3

TP26TP26 TP27TP27

10

MICRO-STAR INT'L CO.,LTD.

Title

SOCKET S1 HT I/F

Size Document Number Rev

Custom

Date: Sheet of

MS-171B1

2

45

1

0Friday, March 30, 2007

A

B

C

D

E

VDD_VTT_SUS_CPU IS CONNECTED TO THE VDD_VTT_SUS POWER SUPPLY THROUGH THE PACKAGE OR ON THE DIE. IT IS ONLY CONNECTED

ON THE BOARD TO DECOUPLING NEAR THE CPU PACKAGE

4 4

CPU_VDDIO_SUS

CPU_VTT_SUS

R198

39.2_0402 1%

R203

39.2_0402 1%

PLACE THEM CLOSE TO CPU WITHIN 1"

MEM_MA_ADD[15..0]8,9

3 3

2 2

CPU_M_VREF_SUS

C59

1n_50v_0402 _NC

MEM_MA0_CS#38,9 MEM_MA0_CS#28,9 MEM_MA0_CS#18,9 MEM_MA0_CS#08,9

MEM_MB0_CS#38,9 MEM_MB0_CS#28,9 MEM_MB0_CS#18,9 MEM_MB0_CS#08,9

MEM_MB_CKE18,9 MEM_MB_CKE08,9 MEM_MA_CKE18,9 MEM_MA_CKE08,9

MEM_MA_BANK28,9 MEM_MA_BANK18,9 MEM_MA_BANK08,9

MEM_MA_RAS#8,9 MEM_MA_CAS#8,9 MEM_MA_WE#8,9

SNS_+0.9VTT

M_ZN M_ZP

MEM_MA_ADD15 MEM_MA_ADD14 MEM_MA_ADD13 MEM_MA_ADD12 MEM_MA_ADD11 MEM_MA_ADD10 MEM_MA_ADD9 MEM_MA_ADD8 MEM_MA_ADD7 MEM_MA_ADD6 MEM_MA_ADD5 MEM_MA_ADD4 MEM_MA_ADD3 MEM_MA_ADD2 MEM_MA_ADD1 MEM_MA_ADD0

W17

AE10 AF10

W24

M19 M20 M24 M22

Y10

V19 J22 V22 T19

Y26 J24

U23 H26

J23 J20 J21

K19 K20 V24 K24 L20 R19 L19 L22 L21

N22 N21 R21

K22 R20 T22

T20 U20 U21

MEMVREF VTT_SENSE

MEMZN MEMZP

MA0_CS_L3 MA0_CS_L2 MA0_CS_L1 MA0_CS_L0

MB0_CS_L3 MB0_CS_L2 MB0_CS_L1 MB0_CS_L0

MB_CKE1 MB_CKE0 MA_CKE1 MA_CKE0

MA_ADD15 MA_ADD14 MA_ADD13 MA_ADD12 MA_ADD11 MA_ADD10 MA_ADD9 MA_ADD8 MA_ADD7 MA_ADD6 MA_ADD5 MA_ADD4 MA_ADD3 MA_ADD2 MA_ADD1 MA_ADD0

MA_BANK2 MA_BANK1 MA_BANK0

MA_RAS_L MA_CAS_L MA_WE_L

U17B

MA0_CLK_H2

MA0_CLK_L2

MA0_CLK_H1

MA0_CLK_L1

MB0_CLK_H2

MB0_CLK_L2

MB0_CLK_H1

MB0_CLK_L1

MB0_ODT1 MB0_ODT0 MA0_ODT1 MA0_ODT0

MB_ADD15 MB_ADD14 MB_ADD13 MB_ADD12 MB_ADD11 MB_ADD10

MB_ADD9 MB_ADD8 MB_ADD7 MB_ADD6 MB_ADD5 MB_ADD4 MB_ADD3 MB_ADD2 MB_ADD1 MB_ADD0

MB_BANK2 MB_BANK1 MB_BANK0

MB_RAS_L MB_CAS_L

MB_WE_L

DDR II: CMD/CTRL/CLK

Athlon 64 S1 Processor Socket

VTT1 VTT2 VTT3 VTT4 VTT5 VTT6 VTT7 VTT8 VTT9

D10 C10 B10 AD10 W10 AC10 AB10 AA10 A10

Y16 AA16 E16 F16

AF18 AF17 A17 A18

W23 W26 V20 U19

MEM_MB_ADD15

J25

MEM_MB_ADD14

J26

MEM_MB_ADD13

W25

MEM_MB_ADD12

L23

MEM_MB_ADD11

L25

MEM_MB_ADD10

U25

MEM_MB_ADD9

L24

MEM_MB_ADD8

M26

MEM_MB_ADD7

L26

MEM_MB_ADD6

N23

MEM_MB_ADD5

N24

MEM_MB_ADD4

N25

MEM_MB_ADD3

N26

MEM_MB_ADD2

P24

MEM_MB_ADD1

P26

MEM_MB_ADD0

T24 K26

T26 U26

U24 V26 U22

CPU_VTT_SUS

1A

MEM_MA0_CLK2_P MEM_MA0_CLK2_N MEM_MA0_CLK1_P MEM_MA0_CLK1_N

MEM_MB0_CLK2_P MEM_MB0_CLK2_N MEM_MB0_CLK1_P MEM_MB0_CLK1_N

MEM_MB0_ODT1 MEM_MB0_ODT0 MEM_MA0_ODT1 MEM_MA0_ODT0

MEM_MB_ADD[15..0]

MEM_MB_BANK2 MEM_MB_BANK1 MEM_MB_BANK0 8,9

MEM_MB_RAS# MEM_MB_CAS# MEM_MB_WE#

8 8 8 8

8,9 8,9 8,9 8,9

8,9

8,9 8,9

8,9

MEM_MB_DATA[63..0]8

VDD_VREF_SUS_CPU

CPU_VDDIO_SUS

R24

R24 1K_0402 1%

1K_0402 1%

R23

1K_0402 1%

1 1

C65

1nf_50v_0402

LAYOUT:PLACE CLOSE TO CPU

A

CPU_M_VREF_SUS

C64

1nF_50v_0402 _NC

MEM_MB0_CLK2_P8

MEM_MB0_CLK2_N8 MEM_MB0_CLK1_P8

MEM_MB0_CLK1_N8

AMD check list 2-1

MEM_MA0_CLK2_P8

MEM_MA0_CLK2_N8 MEM_MA0_CLK1_P8

MEM_MA0_CLK1_N8

B

C309

1.5p_50v_0402

PLACE CLOSE TO PROCESSOR WITHIN 1.5 INCH

C375

1.5p_50v_0402

C57

1.5p_50v_0402

PLACE CLOSE TO PROCESSOR WITHIN 1.5 INCH

C144

1.5p_50v_0402

C

Processor DDR2 Memory Interface

MEM_MB_DATA63 MEM_MB_DATA62 MEM_MB_DATA61 MEM_MB_DATA60 MEM_MB_DATA59 MEM_MB_DATA58 MEM_MB_DATA57 MEM_MB_DATA56 MEM_MB_DATA55 MEM_MB_DATA54 MEM_MB_DATA53 MEM_MB_DATA52 MEM_MB_DATA51 MEM_MB_DATA50 MEM_MB_DATA49 MEM_MB_DATA48 MEM_MB_DATA47 MEM_MB_DATA46 MEM_MB_DATA45 MEM_MB_DATA44 MEM_MB_DATA43 MEM_MB_DATA42 MEM_MB_DATA41 MEM_MB_DATA40 MEM_MB_DATA39 MEM_MB_DATA38 MEM_MB_DATA37 MEM_MB_DATA36 MEM_MB_DATA35 MEM_MB_DATA34 MEM_MB_DATA33 MEM_MB_DATA32 MEM_MB_DATA31 MEM_MB_DATA30 MEM_MB_DATA29 MEM_MB_DATA28 MEM_MB_DATA27 MEM_MB_DATA26 MEM_MB_DATA25 MEM_MB_DATA24 MEM_MB_DATA23 MEM_MB_DATA22 MEM_MB_DATA21 MEM_MB_DATA20 MEM_MB_DATA19 MEM_MB_DATA18 MEM_MB_DATA17 MEM_MB_DATA16 MEM_MB_DATA15 MEM_MB_DATA14 MEM_MB_DATA13 MEM_MB_DATA12 MEM_MB_DATA11 MEM_MB_DATA10 MEM_MB_DATA9 MEM_MB_DATA8 MEM_MB_DATA7 MEM_MB_DATA6 MEM_MB_DATA5 MEM_MB_DATA4 MEM_MB_DATA3 MEM_MB_DATA2 MEM_MB_DATA1

MEM_MB_DM[7..0]8

MEM_MB_DQS7_P8 MEM_MB_DQS7_N8 MEM_MB_DQS6_P8 MEM_MB_DQS6_N8 MEM_MB_DQS5_P8 MEM_MB_DQS5_N8 MEM_MB_DQS4_P8 MEM_MB_DQS4_N8 MEM_MB_DQS3_P8 MEM_MB_DQS3_N8 MEM_MB_DQS2_P8 MEM_MB_DQS2_N8 MEM_MB_DQS1_P8 MEM_MB_DQS1_N8 MEM_MB_DQS0_P8 MEM_MB_DQS0_N8

MEM_MB_DATA0

MEM_MB_DM7 MEM_MB_DM6 MEM_MB_DM5 MEM_MB_DM4 MEM_MB_DM3 MEM_MB_DM2 MEM_MB_DM1 MEM_MB_DM0

A1

Athlon 64 S1g1

uPGA638 Top View

AF1

AD11 AF11 AF14 AE14

AB11 AC12 AF13 AF15 AF16 AC18 AF19 AD14 AC14 AE18 AD18 AD20 AC20 AF23 AF24 AF20 AE20 AD22 AC22 AE25 AD26 AA25 AA26 AE24 AD24 AA23 AA24

AD12 AC16 AE22 AB26

AF12 AE12 AE16 AD16 AF21 AF22 AC25 AC26

Y11

G24 G23 D26 C26 G26 G25 E24 E23 C24 B24 C20 B20 C25 D24 A21 D20 D18 C18 D14 C14 A20 A19 A16 A15 A13 D12 E11 G11 B14 A14 A11 C11

E25 A22 B16 A12

F26 E26 A24 A23 D16 C16 C12 B12

MB_DATA63 MB_DATA62 MB_DATA61 MB_DATA60 MB_DATA59 MB_DATA58 MB_DATA57 MB_DATA56 MB_DATA55 MB_DATA54 MB_DATA53 MB_DATA52 MB_DATA51 MB_DATA50 MB_DATA49 MB_DATA48 MB_DATA47 MB_DATA46 MB_DATA45 MB_DATA44 MB_DATA43 MB_DATA42 MB_DATA41 MB_DATA40 MB_DATA39 MB_DATA38 MB_DATA37 MB_DATA36 MB_DATA35 MB_DATA34 MB_DATA33 MB_DATA32 MB_DATA31 MB_DATA30 MB_DATA29 MB_DATA28 MB_DATA27 MB_DATA26 MB_DATA25 MB_DATA24 MB_DATA23 MB_DATA22 MB_DATA21 MB_DATA20 MB_DATA19 MB_DATA18 MB_DATA17 MB_DATA16 MB_DATA15 MB_DATA14 MB_DATA13 MB_DATA12 MB_DATA11 MB_DATA10 MB_DATA9 MB_DATA8 MB_DATA7 MB_DATA6 MB_DATA5 MB_DATA4 MB_DATA3 MB_DATA2 MB_DATA1 MB_DATA0

MB_DM7 MB_DM6 MB_DM5 MB_DM4 MB_DM3 MB_DM2 MB_DM1 MB_DM0

MB_DQS_H7 MB_DQS_L7 MB_DQS_H6 MB_DQS_L6 MB_DQS_H5 MB_DQS_L5 MB_DQS_H4 MB_DQS_L4 MB_DQS_H3 MB_DQS_L3 MB_DQS_H2 MB_DQS_L2 MB_DQS_H1 MB_DQS_L1 MB_DQS_H0 MB_DQS_L0

A26

D

U17C

DDR: DATA

Athlon 64 S1 Processor Socket

MA_DATA63 MA_DATA62 MA_DATA61 MA_DATA60 MA_DATA59 MA_DATA58 MA_DATA57 MA_DATA56 MA_DATA55 MA_DATA54 MA_DATA53 MA_DATA52 MA_DATA51 MA_DATA50 MA_DATA49 MA_DATA48 MA_DATA47 MA_DATA46 MA_DATA45 MA_DATA44 MA_DATA43 MA_DATA42 MA_DATA41 MA_DATA40 MA_DATA39 MA_DATA38 MA_DATA37 MA_DATA36 MA_DATA35 MA_DATA34 MA_DATA33 MA_DATA32 MA_DATA31 MA_DATA30 MA_DATA29 MA_DATA28 MA_DATA27 MA_DATA26 MA_DATA25 MA_DATA24 MA_DATA23 MA_DATA22 MA_DATA21 MA_DATA20 MA_DATA19 MA_DATA18 MA_DATA17 MA_DATA16 MA_DATA15 MA_DATA14 MA_DATA13 MA_DATA12 MA_DATA11 MA_DATA10

MA_DATA9 MA_DATA8 MA_DATA7 MA_DATA6 MA_DATA5 MA_DATA4 MA_DATA3 MA_DATA2 MA_DATA1 MA_DATA0

MA_DM7 MA_DM6 MA_DM5 MA_DM4 MA_DM3 MA_DM2 MA_DM1 MA_DM0

MA_DQS_H7

MA_DQS_L7

MA_DQS_H6

MA_DQS_L6

MA_DQS_H5

MA_DQS_L5

MA_DQS_H4

MA_DQS_L4

MA_DQS_H3

MA_DQS_L3

MA_DQS_H2

MA_DQS_L2

MA_DQS_H1

MA_DQS_L1

MA_DQS_H0

MA_DQS_L0

MEM_MA_DATA63

AA12

MEM_MA_DATA62

AB12

MEM_MA_DATA61

AA14

MEM_MA_DATA60

AB14

MEM_MA_DATA59

W11

MEM_MA_DATA58

Y12

MEM_MA_DATA57

AD13

MEM_MA_DATA56

AB13

MEM_MA_DATA55

AD15

MEM_MA_DATA54

AB15

MEM_MA_DATA53

AB17

MEM_MA_DATA52

Y17

MEM_MA_DATA51

Y14

MEM_MA_DATA50

W14

MEM_MA_DATA49

W16

MEM_MA_DATA48

AD17

MEM_MA_DATA47

Y18

MEM_MA_DATA46

AD19

MEM_MA_DATA45

AD21

MEM_MA_DATA44

AB21

MEM_MA_DATA43

AB18

MEM_MA_DATA42

AA18

MEM_MA_DATA41

AA20

MEM_MA_DATA40

Y20

MEM_MA_DATA39

AA22

MEM_MA_DATA38

Y22

MEM_MA_DATA37

W21

MEM_MA_DATA36

W22

MEM_MA_DATA35

AA21

MEM_MA_DATA34

AB22

MEM_MA_DATA33

AB24

MEM_MA_DATA32

Y24

MEM_MA_DATA31

H22

MEM_MA_DATA30

H20

MEM_MA_DATA29

E22

MEM_MA_DATA28

E21

MEM_MA_DATA27

J19

MEM_MA_DATA26

H24

MEM_MA_DATA25

F22

MEM_MA_DATA24

F20

MEM_MA_DATA23

C23

MEM_MA_DATA22

B22

MEM_MA_DATA21

F18

MEM_MA_DATA20

E18

MEM_MA_DATA19

E20

MEM_MA_DATA18

D22

MEM_MA_DATA17

C19

MEM_MA_DATA16

G18

MEM_MA_DATA15

G17

MEM_MA_DATA14

C17

MEM_MA_DATA13

F14

MEM_MA_DATA12

E14

MEM_MA_DATA11

H17

MEM_MA_DATA10

E17

MEM_MA_DATA9

E15

MEM_MA_DATA8

H15

MEM_MA_DATA7

E13

MEM_MA_DATA6

C13

MEM_MA_DATA5

H12

MEM_MA_DATA4

H11

MEM_MA_DATA3

G14

MEM_MA_DATA2

H14

MEM_MA_DATA1

F12

MEM_MA_DATA0

G12

MEM_MA_DM7

Y13

MEM_MA_DM6

AB16

MEM_MA_DM5

Y19

MEM_MA_DM4

AC24

MEM_MA_DM3

F24

MEM_MA_DM2

E19

MEM_MA_DM1

C15

MEM_MA_DM0

E12 W12

W13 Y15 W15 AB19 AB20 AD23 AC23 G22 G21 C22 C21 G16 G15 G13 H13

Title

SOCKET S1 DDR2 MEMORY I/F

Size Document Number Rev

Custom

Date: Sheet of

MEM_MA_DATA[63..0]

MEM_MA_DM[7..0]

MEM_MA_DQS7_P MEM_MA_DQS7_N MEM_MA_DQS6_P MEM_MA_DQS6_N 8 MEM_MA_DQS5_P 8 MEM_MA_DQS5_N 8 MEM_MA_DQS4_P 8 MEM_MA_DQS4_N 8 MEM_MA_DQS3_P 8 MEM_MA_DQS3_N 8 MEM_MA_DQS2_P 8 MEM_MA_DQS2_N 8 MEM_MA_DQS1_P 8 MEM_MA_DQS1_N 8 MEM_MA_DQS0_P 8 MEM_MA_DQS0_N 8

MICRO-STAR INT'L CO.,LTD.

MS-171B1

8

8 8 8

E

A

550Friday, March 30, 2007

A

5

LAYOUT: ROUTE VDDA TRACE APPROX. 50 mils WIDE (USE 2x25 mil TRACES TO

+3VRUN

+1.8VRUN

R249

300_0402 _NC

D D

C C

B B

A A

SB_CPUPWRGD17

300_0402_NC

LDT_STOP#12,17

300_0402_NC

LDT_RST#17 VDD_PG32,35

+3VSUS

Cap close to thermal sensor

CPU_TEST4_THERMDA

CPU_TEST5_THERMDC

T_CRIT_CPU#32

+1.8VRUN

R245

+1.8VRUN

R247

RN20

8P4R-10K_RN0402

1 3 5 7

C379

2200p_50V_0402

0R36

12

0R_NC

2 4 6 8

0.1u_10V_0402

CPU_VDDIO_SUS

4.7K_0402_NC

R250

2 1

CPU_VDDIO_SUS

2 1

CPU_VDDIO_SUS

2 1

T_CRIT_CPU# CPU_THRM_ALERTSMB_THRMCPU_DATA SMB_THRMCPU_CLK

+3VSUS

C377

5

0.1u_10v_0402 _NC

C382

4

U22

NC7SZ08M5X _NC

3 5

0.1u_10v_0402_NC

C383

R241

4

U23

NC7SZ08M5X _NC

3 5

0.1u_10v_0402 _NC

C384

R242

4

U24

NC7SZ08M5X _NC

3 5

R246

R246 680ohm_0402

680ohm_0402

U21

1

VDD

2

D+

3

D-

4

T_CRIT_A#

LM86CIMMXNOPB_MSOP8-RH

Close to CPU socket

EXIT BALL FIELD) AND 500 mils LONG.

CPU_VDDA_2.5_RUN

0R_0402 _NC

R240

0R_0402_NC

0R_0402

R381

R0402_6 ==> SHORT PAD FOOTPRINT

SMBCLK

SMBDATA

ALERT#

CPU_LDTSTOP#

CPU_HT_RESET#

8 7 6 5

GND

CPU_ALL_PWROK

0R33

R244

R244 680ohm_0402

680ohm_0402

CPU_PROCHOT#_1.8

SMB_THRMCPU_CLK SMB_THRMCPU_DATA

0R35

12

R248

R248 680ohm_0402

680ohm_0402

0R_NC

12

4

CPU_VDDIO_SUS

0R_NC

CPU_SIC_R17

CPU_SID_R17

place them to CPU within 1"

C386

CPUCLK15

C387

CPUCLK#15

4

C387

CPU_VDDIO_SUS

R185

R185 10K_0402

10K_0402

CPU_PH_G

B

E C

Q23

Q23 SMBT3904

SMBT3904

SMB_THRMCPU_CLK SMB_THRMCPU_DATA CPU_THRM_ALERT-

R192

R192 R193

R193

3.9n_50V_0603

+3VRUN

R177

4.7K_0402

+VDDA

1A

AMD check list 4-22

300_0402_NC

+VLDT

R243

R243 169_0402 1%

169_0402 1%

maximun 40 ohm

L14

10L1000m_50_0402

4.7u_6V_0603

R29

R29 R25

R25

CPU_CLKIN_SC_P CPU_CLKIN_SC_N

SB_TALERT#

31

3

C137

C135

3300p_50V_0402

CPU_HT_RESET# CPU_ALL_PWROK

R21

44.2_0603 1%

CPU_VDD_RUN_FB_H35 CPU_VDD_RUN_FB_L35

19

CPU_SIC_R

CPU_LDTSTOP#

CPU_SID_R

CPU_VDDIO_SUS_FB_H CPU_VDDIO_SUS_FB_L

CPU_DBRDY

CPU_TMS CPU_TCK CPU_TRST# CPU_TDI

3

300_0402

TP24TP24 TP18TP18

TP28TP28

CPU_TEST25_H_BYPASSCLK_H CPU_TEST25_L_BYPASSCLK_L

CPU_TEST5_THERMDC CPU_TEST4_THERMDA

ATHLON Control and Debug

0.22u_10V_0402

C145

U17D

VDDA2 VDDA1

RESET_L PWROK LDTSTOP_L

SIC SID

HT_REF1 HT_REF0

VDD_FB_H VDD_FB_L

VDDIO_FB_H VDDIO_FB_L

CLKIN_H CLKIN_L

DBRDY TMS

TCK TRST_L TDI

TEST25_HE9TEST29_H TEST25_L TEST19 TEST18 TEST13 TEST9 TEST17 TEST16 TEST15 TEST14 TEST12

TEST7 TEST6 THERMDC THERMDA TEST3 TEST2

RSVD0 RSVD1 RSVD2 RSVD3

RSVD4 RSVD5 RSVD6 RSVD7

THERMTRIP_L

PROCHOT_L

CPU_PRESENT_L

DBREQ_L

JTAC

TEST29_L

TEST28_H

TEST28_L

MISC

AMD NPT S1 SOCKET Processor Socket

VID5 VID4 VID3 VID2 VID1 VID0

PSI_L

TDO

TEST24 TEST23 TEST22 TEST21 TEST20

TEST27 TEST26 TEST10

TEST8

RSVD8 RSVD9

RSVD10 RSVD11

RSVD12 RSVD13 RSVD14

RSVD15 RSVD16 RSVD17 RSVD18 RSVD19 RSVD20

TP31TP31 TP32TP32 TP30TP30 TP33TP33 TP11TP11

CPU_HTREF1 CPU_HTREF0

TEST19 TEST18

G10 AA9

AC9 AD9

AA7

AC8

AA6

AB6

F10 AF4

AF5

AF9

H10

P20 P19 N20 N19

R26 R25 P22 R22

F8 F9

B7 A7

P6

R6

F6 E6

W9

Y9 A9

A8

E8

G9

C2 D7

E7 F7

C7

C3 W7

W8

Y6

2

CPU_VDDIO_SUS

300_0402

CPU_THERMTRIP#_R

AF6

CPU_PROCHOT#_1.8

AC7

CPU_VID5

A5

CPU_VID4

C6

CPU_VID3

A6

CPU_VID2

A4

CPU_VID1

C5

CPU_VID0

B5

CPU_PRESENT#

AC6

CPU_PSI#

A3

CPU_DBREQ#

E10

CPU_TDO

AE9

CPU_TEST29_H_FBCLKOUT_P

C9

CPU_TEST29_L_FBCLKOUT_N

C8

AE7 AD7 AE8 AB8 AF7

J7 H8 AF8 AE6 K8 C4

H16 B18

B3 C1

H6 G6 D5

R24 W18 R23 AA8 H18 H19

TEST21

TEST26

TP8TP8 TP10TP10 TP6TP6

TP7TP7

2

R181

R194

300_0402

CPU_PSI# 35

TP9TP9

TEST26

CPU_DBREQ# CPU_TMS CPU_TCK CPU_TRST# CPU_TDI

CPU_PRESENT# CPU_TEST25_H_BYPASSCLK_H

CPU_TEST25_L_BYPASSCLK_L

TEST18

TEST19

TEST21

Title

Size Document Number Rev

Size

Date: Sheet

1

CPU_VDDIO_SUS

+3VSUS

R191

R191 10K_0402

R237

300_0402

Custom

10K_0402

R186

4.7K_0402 _NC

B

E C

Q24

Q24 SMBT3904

SMBT3904

80.6_0402 1%

R39

ROUTE AS 80 Ohm DIFFERENTIAL PAIR PLACE IT CLOSE TO CPU WITHIN 1"

Trace impedance 80ohm

ERRATA#133

SOCKET S1 CTRL

Document Number Rev

MS-171B1

4.7K_0402 _NC

CPU_THERMTRIP#

35

CPU_VID5 CPU_VID4

35 35

CPU_VID3 CPU_VID2

35 35

CPU_VID1

35

CPU_VID0

CPU_VDDIO_SUS

300_0402

R195

R195 R38

R38

510_0402 _NC

510_0402 _NC 510_0402 _NC

510_0402 _NC

R200

R200 R199

R199

510_0402 _NC

R197

510_0402_NC

510_0402_NC 510_0402_NC

510_0402_NC

R178

1K_0402

R196

R196 R239

R239

510_0402

R238

510_0402

510_0402 300_0402

300_0402

R33

R33 R34

R34

300_0402

R22

300_0402

MICRO-STAR INT'L CO.,LTD.

18

65

1

A

0Friday, March 30, 2007

of

5

AA4 AA11 AA13 AA15

CPU_VDD_RUN CPU_VDD_RUN

D D

C C

B B

A1

AC4 AD2

J11 J13

K10 K12 K14

L11 L13

M10

N11 P10

R11

T10 T12 T14

U11 U13

V10

35A

G4 H2

J9

K6

L4 L7 L9

M2 M6 M8

N7 N9

P8 R4

R7 R9

T2 T6 T8

U7 U9

V6 V8

VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18 VDD19 VDD20 VDD21 VDD22 VDD23 VDD24 VDD25 VDD26 VDD27 VDD28 VDD29 VDD30 VDD31 VDD32 VDD33 VDD34 VDD35 VDD36 VDD37 VDD38 VDD39 VDD40 VDD41 VDD42

U17E

POWER

Athlon 64 S1 Processor Socket

VDD43 VDD44 VDD45 VDD46 VDD47 VDD48 VDD49 VDD50 VDD51 VDD52 VDD53 VDD54

VDDIO1 VDDIO2 VDDIO3 VDDIO4 VDDIO5 VDDIO6 VDDIO7 VDDIO8

VDDIO9 VDDIO10 VDDIO11 VDDIO12 VDDIO13 VDDIO14 VDDIO15 VDDIO16 VDDIO17 VDDIO18 VDDIO19 VDDIO20 VDDIO21 VDDIO22 VDDIO23 VDDIO24 VDDIO25 VDDIO26 VDDIO27

V12 V14 W4 Y2 J15 K16 L15 M16 P16 T16 U15 V16

H25 J17 K18 K21 K23 K25 L17 M18 M21 M23 M25 N17 P18 P21 P23 P25 R17 T18 T21 T23 T25 U17 V18 V21 V23 V25 Y25

CPU_VDDIO_SUS

A26

8A

Athlon 64 S1g1

uPGA638

AA17 AA19

AB2 AB7

AB9 AB23 AB25 AC11 AC13 AC15 AC17 AC19 AC21

AD6

AD8 AD25 AE11 AE13 AE15 AE17 AE19 AE21 AE23

B11 B13 B15 B17 B19 B21 B23 B25

D11

D13

D15

D17

D19

D21

D23

D25

F11 F13 F15 F17 F19 F21 F23 F25

H21

H23

B4 B6 B8 B9

D6 D8 D9

E4 F2

H7 H9

J4

Top View

AF1

VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65

4

U17F

GROUND

Athlon 64 S1 Processor Socket

VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98

VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129

J6 J8 J10 J12 J14 J16 J18 K2 K7 K9 K11 K13 K15 K17 L6 L8 L10 L12 L14 L16 L18 M7 M9 M11 M17 N4 N8 N10 N16 N18 P2 P7 P9 P11 P17 R8 R10 R16 R18 T7 T9 T11 T13 T15 T17 U4 U6 U8 U10 U12 U14 U16 U18 V2 V7 V9 V11 V13 V15 V17 W6 Y21 Y23 N6

3

2

BOTTOMSIDE DECOUPLING

CPU_VDD_RUN

22u_6V_0805

CPU_VDD_RUN

C115

0.22u_10V_0402

22u_6V_0805

C100

C87

22u_6V_0805

0.22u_10V_0402

0.22u_10V_0402 C66

C66

C77

0.01u_16V_0402

22u_6V_0805

C111

22u_6V_0805

C122

22u_6V_0805

C121

C112

22u_6V_0805

C99

C86

C71

C71 22u_6V_0805

22u_6V_0805

0.22U*2pcs+0.01U*1pcs+190P*1pcs

C78

180pF_50v_0402

AMD check list 4-16~4-20

DECOUPLING BETWEEN PROCESSOR AND DIMMs PLACE CLOSE TO PROCESSOR AS POSSIBLE

CPU_VDDIO_SUS

22u_6V_0805

C114

0.22u_10V_0402

C126

C120

C83

0.22u_10V_0402

22U*2pcs+ 0.22u*2pcs

CPU_VTT_SUS

4.7u_6V_0603

C27

C26

C27

4.7u_6V_0603

C163

4.7u_6V_0603

CPU_VDDIO_SUS

4.7u_6V_0603

C84

4.7u_6V_0603

4.7u_6V_0603 C85

C85

C109

4.7u_6V_0603

4.7u_6V_0603 C110

C110

0.22u_10V_0402

C116

0.22u_10V_0402

C75

0.22u_10V_0402

4.7U*4pcs+0.22U*4pcs+0.01U*2pcs+180P*2pcs

AMD Check list 4-1~4-5

4.7U*4pcs+0.22U*4pcs+1N*4pcs+180P*4pcs

4.7u_6V_0603

C166

0.22u_10V_0402

C152

0.22u_10V_0402

C34

C159

0.22u_10V_0402

C30

C161

1n_50V_0402

C158

22U*9pcs

0.22u_10V_0402

C94

C102

1n_50V_0402

C32

C46

1n_50V_0402

0.01u_16V_0402

C130

0.01u_16V_0402

180pF_50v_0402

C37

C150

180pF_50v_0402

C134

180pF_50v_0402

C154

180pF_50v_0402

C117

1

180pF_50v_0402

C131

180pF_50v_0402

C52

A A

PROCESSOR POWER AND GROUND

5

4

3

AMD check list 4-6~4-8,4-11

MICRO-STAR INT'L CO.,LTD.

Title

SOCKET S1 PWR & GND

Size

Document Number Rev

Size Document Number Rev

B

Date: Sheet

2

Date: Sheet

MS-171B1

MICRO-STAR INT'L CO.,LTD.

of

750Wednesday, January 24, 2007

1

A

5

CPU_VDDIO_SUS

MEM_MA_ADD[15..0]5,9

D D

MEM_MA_BANK[2..0]5,9

MEM_MA_DM[7..0]5

MEM_MA_DQS0_P5 MEM_MA_DQS1_P5 MEM_MA_DQS2_P5 MEM_MA_DQS3_P5

C244

47u_1210

MEM_MA_DQS4_P5 MEM_MA_DQS5_P5 MEM_MA_DQS6_P5 MEM_MA_DQS7_P5

MEM_MA_DQS0_N5 MEM_MA_DQS1_N5 MEM_MA_DQS2_N5 MEM_MA_DQS3_N5 MEM_MA_DQS4_N5 MEM_MA_DQS5_N5 MEM_MA_DQS6_N5 MEM_MA_DQS7_N5

C245

47u_1210

C C

B B

CPU_VDDIO_SUS

A A

MEM_MA0_CLK1_P5

MEM_MA0_CLK1_N5

MEM_MA0_CLK2_P5

MEM_MA0_CLK2_N5

MEM_MA0_CS#05,9 MEM_MA0_CS#15,9

+3VRUN

5

MEM_MA_CKE05,9 MEM_MA_CKE15,9

MEM_MA_RAS#5,9 MEM_MA_CAS#5,9

MEM_MA0_ODT05,9 MEM_MA0_ODT15,9

MEM_MA_ADD0 MEM_MA_ADD1 MEM_MA_ADD2 MEM_MA_ADD3 MEM_MA_ADD4 MEM_MA_ADD5 MEM_MA_ADD6 MEM_MA_ADD7

MEM_MA_ADD9 MEM_MA_ADD10 MEM_MA_ADD11 MEM_MA_ADD12 MEM_MA_ADD13 MEM_MA_ADD14 MEM_MA_ADD15

MEM_MA_BANK0 MEM_MA_BANK1 MEM_MA_BANK2

MEM_MA_DM0 MEM_MA_DM1 MEM_MA_DM2 MEM_MA_DM3 MEM_MA_DM4 MEM_MA_DM5 MEM_MA_DM6 MEM_MA_DM7

MEM_MA_WE#5,9

R20

SDATA015,18

SCLK015,18

+3VRUN

MEM_M_VREF_SUS

4.7K_0402

102

A0

101

A1

99 98 97 94 92 93 91

90 89

86 84

85 10

26 52 67

13 31 51 70

11 29 49 68

30 32

79 80

12 15 18 21 24 27 28 33 34 39 40 41 42 47 48 53 54

1 2

3 8 9

A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14/NC A15/NC

BA0 BA1 BA2

DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7

DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7

CK0 CK0 CK1 CK1

CKE0 CKE1

RAS CAS WE S0 S1

ODT0 ODT1

SA0 SA1

SDA SCL

VDDspd VREF VSS0

VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20

VDD081VDD182VDD287VDD388VDD495VDD596VDD6

SO-DIMM

5

4

3

2

1

VSS2

72

71

66

65

60

59

100

105

116

107 106

130 147 170 185

131 148 169 188

129 146 167 186

164 166

108 113 109 110 115

114 119

198 200

195 197

199

103

111

104

112

VDD8

VDD7

VDD9

(RVS)

0

9

8

7

6

VSS3

VSS2

78

77

122

121

4

117

118

J1

5

DQ0

7

DQ1

17

DQ2

VDD10

VDD11

19

DQ3

4

DQ4

6

DQ5

14

DQ6

16

DQ7

23

DQ8

25

DQ9

35

DQ10

37

DQ11

20

DQ12

22

DQ13

36

DQ14

38

DQ15

43

DQ16

45

DQ17

55

DQ18

57

DQ19

44

DQ20

46

DQ21

56

DQ22

58

DQ23

61

DQ24

63

DQ25

73

DQ26

75

DQ27

62

DQ28

64

DQ29

74

DQ30

76

DQ31

123

DQ32

125

DQ33

135

DQ34

137

DQ35

124

DQ36

126

DQ37

134

DQ38

136

DQ39

141

DQ40

143

DQ41

151

DQ42

153

DQ43

140

DQ44

142

DQ45

152

DQ46

154

DQ47

157

DQ48

159

DQ49

173

DQ50

175

DQ51

158

DQ52

160

DQ53

174

DQ54

176

DQ55

179

DQ56

181

DQ57

189

DQ58

191

DQ59

180

DQ60

182

DQ61

192

DQ62

194

DQ63

50

NC1

69

NC2

83

NC3

120

NC4

163

NC/TEST

201

GND_PAD1

202

GND_PAD2

196

VSS56

193

VSS55

190

VSS54

187

VSS53

184

VSS52

183

VSS51

178

VSS50

177

VSS49

172

VSS48

171

VSS47

168

VSS46

165

VSS45

162

VSS44

161

VSS43

156

VSS42

155

VSS41

150

VSS40

149

VSS39

145

VSS38

144

VSS37

139

3

2

1

VSS36

138

VSS35

133

VSS34

VSS3

DDR2_SODIMM_RVS_H=5.2mm

132

128

127

4

MEM_MA_DATA0 MEM_MA_DATA1 MEM_MA_DATA2 MEM_MA_DATA3 MEM_MA_DATA4 MEM_MA_DATA5 MEM_MA_DATA6 MEM_MA_DATA7 MEM_MA_DATA8MEM_MA_ADD8 MEM_MA_DATA9 MEM_MA_DATA10 MEM_MA_DATA11 MEM_MA_DATA12 MEM_MA_DATA13 MEM_MA_DATA14 MEM_MA_DATA15 MEM_MA_DATA16 MEM_MA_DATA17 MEM_MA_DATA18 MEM_MA_DATA19 MEM_MA_DATA20 MEM_MA_DATA21 MEM_MA_DATA22 MEM_MA_DATA23 MEM_MA_DATA24 MEM_MA_DATA25 MEM_MA_DATA26 MEM_MA_DATA27 MEM_MA_DATA28 MEM_MA_DATA29 MEM_MA_DATA30 MEM_MA_DATA31 MEM_MA_DATA32 MEM_MA_DATA33 MEM_MA_DATA34 MEM_MA_DATA35 MEM_MA_DATA36 MEM_MA_DATA37 MEM_MA_DATA38 MEM_MA_DATA39 MEM_MA_DATA40 MEM_MA_DATA41 MEM_MA_DATA42 MEM_MA_DATA43 MEM_MA_DATA44 MEM_MA_DATA45 MEM_MA_DATA46 MEM_MA_DATA47 MEM_MA_DATA48 MEM_MA_DATA49 MEM_MA_DATA50 MEM_MA_DATA51 MEM_MA_DATA52 MEM_MA_DATA53 MEM_MA_DATA54 MEM_MA_DATA55 MEM_MA_DATA56 MEM_MA_DATA57 MEM_MA_DATA58 MEM_MA_DATA59 MEM_MA_DATA60 MEM_MA_DATA61 MEM_MA_DATA62 MEM_MA_DATA63

MEM_MA0_CS#2 MEM_MA0_CS#3

3

MEM_MB_ADD[15..0]5,9

MEM_MA_DATA[63..0]

5,9 5,9

5

MEM_MB_BANK[2..0]5,9

MEM_MB_DM[7..0]5

MEM_VREF_SUS

CPU_VDDIO_SUS

R48

R48 1K_0402 1%

1K_0402 1%

R47

R47 1K_0402 1%

1K_0402 1%

LAYOUT: PLACE CLOSE TO DIMMs

3

MEM_M_VREF_SUS

C171

0.1u_10V_0402

MEM_MB_DQS0_P5 MEM_MB_DQS1_P5 MEM_MB_DQS2_P5 MEM_MB_DQS3_P5 MEM_MB_DQS4_P5 MEM_MB_DQS5_P5 MEM_MB_DQS6_P5 MEM_MB_DQS7_P5

MEM_MB_DQS0_N5 MEM_MB_DQS1_N5 MEM_MB_DQS2_N5 MEM_MB_DQS3_N5 MEM_MB_DQS4_N5 MEM_MB_DQS5_N5 MEM_MB_DQS6_N5 MEM_MB_DQS7_N5

MEM_MB0_CLK1_P5

MEM_MB0_CLK1_N5

MEM_MB0_CLK2_P5

MEM_MB0_CLK2_N5

MEM_MB0_CS#05,9 MEM_MB0_CS#15,9

C170

1n_50v_0402

MEM_MB_CKE05,9 MEM_MB_CKE15,9

MEM_MB_RAS#5,9 MEM_MB_CAS#5,9

MEM_MB_WE#5,9

MEM_MB0_ODT05,9 MEM_MB0_ODT15,9

SDATA015,18

SCLK015,18

+3VRUN

MEM_M_VREF_SUS

CPU_VDDIO_SUS

MEM_MB_ADD0 MEM_MB_ADD1 MEM_MB_ADD2 MEM_MB_ADD3 MEM_MB_ADD4 MEM_MB_ADD5 MEM_MB_ADD6 MEM_MB_ADD7 MEM_MB_ADD8 MEM_MB_ADD9 MEM_MB_ADD10 MEM_MB_ADD11 MEM_MB_ADD12 MEM_MB_ADD13 MEM_MB_ADD14 MEM_MB_ADD15

MEM_MB_BANK0 MEM_MB_BANK1 MEM_MB_BANK2

MEM_MB_DM0 MEM_MB_DM1 MEM_MB_DM2 MEM_MB_DM3 MEM_MB_DM4 MEM_MB_DM5 MEM_MB_DM6 MEM_MB_DM7

0R25

12 12

0R24

0R_NC

0R_NC 0R_NC

0R_NC

2

103

111

104

112

117

118

J2

MEM_MB_DATA0

102

A0

101

A1

VDD081VDD182VDD287VDD388VDD495VDD596VDD6

100

A2

99

A3

98

A4

97

A5

94

A6

92

A7

93

A8

91

A9

105

A10

90

A11

89

A12

116

A13

86

A14/NC

84

A15/NC

107

BA0

106

BA1

85

BA2

10

DM0

26

DM1

52

DM2

67

DM3

130

DM4

147

DM5

170

DM6

185

DM7

13

DQS0

31

DQS1

51

DQS2

70

DQS3

131

DQS4

148

DQS5

169

DQS6

188

DQS7

11

DQS0

29

DQS1

49

DQS2

68

DQS3

129

DQS4

146

DQS5

167

DQS6

186

DQS7

30

CK0

32

CK0

164

CK1

166

CK1

79

CKE0

80

CKE1

108

RAS

113

CAS

109

WE

110

S0

115

S1

114

ODT0

119

ODT1

198

SA0

200

SA1

195

SDA

197

SCL

199

VDDspd

1

VREF

2

VSS0

3

VSS1

8

VSS2

9

VSS3

12

VSS4

15

VSS5

18

VSS6

21

VSS7

24

VSS8

27

VSS9

28

VSS10

33

VSS11

34

VSS12

39

VSS13

40

VSS14

41

VSS15

42

VSS16

47

VSS17

48 53 54

2

1

VSS18 VSS19 VSS20

VSS2

60

59

2

VDD8

VDD7

VDD9

SO-DIMM(RVS)

0

9

8

7

4

3

VSS3

VSS2

VSS2672VSS2571VSS2

VSS2

78

77

66

65

127

122

121

5

DQ0

MEM_MB_DATA1

7

DQ1

MEM_MB_DATA2

17

DQ2

VDD10

VDD11

NC/TEST

GND_PAD1 GND_PAD2

3

2

1

VSS3

132

128

Title

Size

Size Document Number Rev

Custom

Date: Sheet

MEM_MB_DATA3

19

DQ3

MEM_MB_DATA4

4

DQ4

MEM_MB_DATA5

6

DQ5

MEM_MB_DATA6

14

DQ6

MEM_MB_DATA7

16

DQ7

MEM_MB_DATA8

23

DQ8

MEM_MB_DATA9

25

DQ9

MEM_MB_DATA10

35

DQ10

MEM_MB_DATA11

37

DQ11

MEM_MB_DATA12

20

DQ12

MEM_MB_DATA13

22

DQ13

MEM_MB_DATA14

36

DQ14

MEM_MB_DATA15

38

DQ15

MEM_MB_DATA16

43

DQ16

MEM_MB_DATA17

45

DQ17

MEM_MB_DATA18

55

DQ18

MEM_MB_DATA19

57

DQ19

MEM_MB_DATA20

44

DQ20

MEM_MB_DATA21

46

DQ21

MEM_MB_DATA22

56

DQ22

MEM_MB_DATA23

58

DQ23

MEM_MB_DATA24

61

DQ24

MEM_MB_DATA25

63

DQ25

MEM_MB_DATA26

73

DQ26

MEM_MB_DATA27

75

DQ27

MEM_MB_DATA28

62

DQ28

MEM_MB_DATA29

64

DQ29

MEM_MB_DATA30

74

DQ30

MEM_MB_DATA31

76

DQ31

MEM_MB_DATA32

123

DQ32

MEM_MB_DATA33

125

DQ33

MEM_MB_DATA34

135

DQ34

MEM_MB_DATA35

137

DQ35

MEM_MB_DATA36

124

DQ36

MEM_MB_DATA37

126

DQ37

MEM_MB_DATA38

134

DQ38

MEM_MB_DATA39

136

DQ39

MEM_MB_DATA40

141

DQ40

MEM_MB_DATA41

143

DQ41

MEM_MB_DATA42

151

DQ42

MEM_MB_DATA43

153

DQ43

MEM_MB_DATA44

140

DQ44

MEM_MB_DATA45

142

DQ45

MEM_MB_DATA46

152

DQ46

MEM_MB_DATA47

154

DQ47

MEM_MB_DATA48

157

DQ48

MEM_MB_DATA49

159

DQ49

MEM_MB_DATA50

173

DQ50

MEM_MB_DATA51

175

DQ51

MEM_MB_DATA52

158

DQ52

MEM_MB_DATA53

160

DQ53

MEM_MB_DATA54

174

DQ54

MEM_MB_DATA55

176

DQ55

MEM_MB_DATA56

179

DQ56

MEM_MB_DATA57

181

DQ57

MEM_MB_DATA58

189

DQ58

MEM_MB_DATA59

191

DQ59

MEM_MB_DATA60

180

DQ60

MEM_MB_DATA61

182

DQ61

MEM_MB_DATA62

192

DQ62

MEM_MB_DATA63

194

DQ63

50

NC1

69

NC2

83

NC3

120

NC4

163 203

204 196

VSS56

193

VSS55

190

VSS54

187

VSS53

184

VSS52

183

VSS51

178

VSS50

177

VSS49

172

VSS48

171

VSS47

168

VSS46

165

VSS45

162

VSS44

161

VSS43

156

VSS42

155

VSS41

150

VSS40

149

VSS39

145

VSS38

144

VSS37

139

VSS36

138

VSS35

133

VSS34

DDR2_SODIMM_RVS_H=9.2mm

DDR2 SODIMMS A/B CHANNEL

Document Number Rev

MS-171B1

1

MEM_MB_DATA[63..0]

MEM_MB0_CS#2 MEM_MB0_CS#3

CPU_VDDIO_SUS

47u_1210

MICRO-STAR INT'L CO.,LTD.

1

5,9 5,9

C246

C247

47u_1210

85

of

0Friday, March 30, 2007

A

5

MEM_MA_ADD[15..0]5,8

D D

MEM_MA_BANK[2..0]5,8

C C

MEM_MB_ADD[15..0]5,8

B B

MEM_MB_BANK[2..0]5,8

A A

MEM_MA_ADD[15..0]

MEM_MA_BANK[2..0]

MEM_MA_CAS#5,8 MEM_MA_WE#5,8 MEM_MA_RAS#5,8

MEM_MA0_CS#05,8 MEM_MA0_CS#15,8 MEM_MA0_CS#25,8 MEM_MA0_CS#35,8

MEM_MA0_ODT05,8 MEM_MA0_ODT15,8

MEM_MA_CKE15,8 MEM_MA_CKE05,8

MEM_MB_BANK[2..0]

MEM_MB0_CS#05,8

5

MEM_MB_ADD[15..0]

MEM_MB_CAS#5,8 MEM_MB_WE#5,8 MEM_MB_RAS#5,8

MEM_MB0_CS#15,8 MEM_MB0_CS#25,8 MEM_MB0_CS#35,8

MEM_MB0_ODT05,8 MEM_MB0_ODT15,8

MEM_MB_CKE15,8 MEM_MB_CKE05,8

MEM_MA_ADD15 MEM_MA_ADD14 MEM_MA_ADD13 MEM_MA_ADD12 MEM_MA_ADD11 MEM_MA_ADD10 MEM_MA_ADD9 MEM_MA_ADD8 MEM_MA_ADD7 MEM_MA_ADD6 MEM_MA_ADD5 MEM_MA_ADD4 MEM_MA_ADD3 MEM_MA_ADD2 MEM_MA_ADD1 MEM_MA_ADD0

MEM_MA_BANK2 MEM_MA_BANK1 MEM_MA_BANK0

MEM_MA_CAS# MEM_MA_WE# MEM_MA_RAS#

MEM_MA0_CS#0 MEM_MA0_CS#1 MEM_MA0_CS#2 MEM_MA0_CS#3

MEM_MA0_ODT0 MEM_MA0_ODT1

MEM_MA_CKE1 MEM_MA_CKE0

MEM_MB_ADD15 MEM_MB_ADD14 MEM_MB_ADD13 MEM_MB_ADD12 MEM_MB_ADD11 MEM_MB_ADD10 MEM_MB_ADD9 MEM_MB_ADD8 MEM_MB_ADD7 MEM_MB_ADD6 MEM_MB_ADD5 MEM_MB_ADD4 MEM_MB_ADD3 MEM_MB_ADD2 MEM_MB_ADD1 MEM_MB_ADD0

MEM_MB_BANK2 MEM_MB_BANK1 MEM_MB_BANK0 MEM_MB_ADD15

MEM_MB_CAS# MEM_MB_WE# MEM_MB_RAS#

MEM_MB0_CS#0 MEM_MB0_CS#1 MEM_MB0_CS#2 MEM_MB0_CS#3

MEM_MB0_ODT0 MEM_MB0_ODT1

MEM_MB_CKE1 MEM_MB_CKE0

4

8P4R-47_RN0402

8P4R-47_RN0402 8P4R-47_RN0402

8P4R-47_RN0402

MEM_MA_CKE0 MEM_MA_ADD12 MEM_MA_BANK2 MEM_MA_ADD8 MEM_MA_ADD9 MEM_MA_ADD3 MEM_MA_ADD5 MEM_MA_ADD2 MEM_MA_BANK0 MEM_MA_ADD10 MEM_MA_WE# MEM_MA_CAS# MEM_MA_ADD13 MEM_MA0_CS#3 MEM_MA0_ODT1

MEM_MA_ADD15 MEM_MA_ADD14 MEM_MA_CKE1 MEM_MA0_CS#2 MEM_MA_ADD6 MEM_MA_ADD4 MEM_MA_ADD11 MEM_MA_ADD7

8P4R-47_RN0402

MEM_MA_RAS# MEM_MA_BANK1 MEM_MA_ADD0 MEM_MA_ADD1

MEM_MA0_ODT0 MEM_MA0_CS#1 MEM_MA0_CS#0

8P4R-47_RN0402

8P4R-47_RN0402 8P4R-47_RN0402

8P4R-47_RN0402

MEM_MB_CKE0 MEM_MB0_CS#2 MEM_MB_BANK2 MEM_MB_ADD12 MEM_MB_ADD9 MEM_MB_ADD7 MEM_MB_ADD8 MEM_MB_ADD3 MEM_MB_ADD5 MEM_MB_ADD1 MEM_MB_BANK0 MEM_MB_WE# MEM_MB0_CS#1 MEM_MB0_ODT1 MEM_MB_CAS#

MEM_MB_ADD11 MEM_MB_ADD14

MEM_MB_CKE1 MEM_MB_ADD0 MEM_MB_ADD2 MEM_MB_ADD6 MEM_MB_ADD4

8P4R-47_RN0402

MEM_MB0_CS#0 MEM_MB_RAS# MEM_MB_ADD10 MEM_MB_BANK1

MEM_MB0_CS#3 MEM_MB_ADD13 MEM_MB0_ODT0

8P4R-47_RN0402

3

CPU_VTT_SUS

2

1

1A

RN12

1 3 5 7 1 3 5 7 1 3 5 7 1 3 5 7

1 3 5 7 1 3 5 7

1 3 5 7

1 3 5 7 1 3 5 7 1 3 5 7 1 3 5 7

1 3 5 7 1 3 5 7

RN12

2 4 6 8

RN9

2 4 6 8

RN4

2 4 6 8

RN3

2 4 6 8

RN16

2 4 6 8

RN13

2 4 6 8

RN11

2 4 6 8

RN7

2 4 6 8

RN14

2 4 6 8

RN10

2 4 6 8

RN6

2 4 6 8

RN1

2 4 6 8

RN15

2 4 6 8

RN8

2 4 6 8

RN5

2 4 6 8

RN2

2 4 6 8

3

C79 0.1u_10V_0402C79 0.1u_10V_0402 C97 0.1u_10V_0402C97 0.1u_10V_0402 C40

C40 C68

C68 C53

C53 C62

C62 C63

C63 C82

C82

C104

C104 C80

C80 C101

C101

C33

C90

C58

C58 C105

C105

C49

CPU_VTT_SUS

C103

C103 C98

C98 C69

C69 C93

C93 C51

C51 C48

C48 C70

C70 C72

C72

C92

C92 C61

C61 C50

C50 C47

C47

C73

C113

C113 C81

C81

C74

0.1u_10V_0402

CPU_VDDIO_SUS

Title

Size Document Number Rev

Size

Date: Sheet

2

MICRO-STAR INT'L CO.,LTD.

DDR2 SODIMMS TERMINATIONS

Document Number Rev

Custom

MS-171B1

95

1

A

of

0Friday, March 30, 2007

5

4

3

2

1

A11 FOR DVT

U18A

D D

C C

B B

HT_CADOUT15_P4 HT_CADOUT15_N4 HT_CADOUT14_P4 HT_CADOUT14_N4 HT_CADOUT13_P4 HT_CADOUT13_N4 HT_CADOUT12_P4 HT_CADOUT12_N4 HT_CADOUT11_P4 HT_CADOUT11_N4 HT_CADOUT10_P4 HT_CADOUT10_N4 HT_CADOUT9_P4 HT_CADOUT9_N4 HT_CADOUT8_P4 HT_CADOUT8_N4

HT_CADOUT7_P4 HT_CADOUT7_N4 HT_CADOUT6_P4 HT_CADOUT6_N4 HT_CADOUT5_P4 HT_CADOUT5_N4 HT_CADOUT4_P4 HT_CADOUT4_N4 HT_CADOUT3_P4 HT_CADOUT3_N4 HT_CADOUT2_P4 HT_CADOUT2_N4 HT_CADOUT1_P4 HT_CADOUT1_N4 HT_CADOUT0_P4 HT_CADOUT0_N4

HT_CLKOUT1_P4 HT_CLKOUT1_N4

HT_CLKOUT0_P4 HT_CLKOUT0_N4

HT_CTLOUT0_P4 HT_CTLOUT0_N4

HT_RXCALP HT_RXCALN

VDDHT_PKG

49.9_0402

R226

R226 R218 49.9_0402R218 49.9_0402

49.9_0402

R19 R18 R21 R22 U22 U21 U18

U19 W19 W20

AC21

AB22 AB20 AA20 AA19

Y19

T24

R25

U25

U24

V23

U23

V24

V25

AA25 AA24 AB23 AA23 AB24

AB25 AC24 AC25

W21 W22

Y24

W25

P24 P25

A24 C24

HT_RXCAD15P HT_RXCAD15N HT_RXCAD14P HT_RXCAD14N HT_RXCAD13P HT_RXCAD13N HT_RXCAD12P HT_RXCAD12N HT_RXCAD11P HT_RXCAD11N HT_RXCAD10P HT_RXCAD10N HT_RXCAD9P HT_RXCAD9N HT_RXCAD8P HT_RXCAD8N

HT_RXCAD7P HT_RXCAD7N HT_RXCAD6P HT_RXCAD6N HT_RXCAD5P HT_RXCAD5N HT_RXCAD4P HT_RXCAD4N HT_RXCAD3P HT_RXCAD3N HT_RXCAD2P HT_RXCAD2N HT_RXCAD1P HT_RXCAD1N HT_RXCAD0P HT_RXCAD0N

HT_RXCLK1P HT_RXCLK1N

HT_RXCLK0P HT_RXCLK0N

HT_RXCTLP HT_RXCTLN

HT_RXCALP HT_RXCALN

PART 1 OF 6

HYPER TRANSPORT CPU I/F

HT_TXCAD15P HT_TXCAD15N HT_TXCAD14P HT_TXCAD14N HT_TXCAD13P HT_TXCAD13N HT_TXCAD12P HT_TXCAD12N HT_TXCAD11P HT_TXCAD11N HT_TXCAD10P HT_TXCAD10N

HT_TXCAD9P HT_TXCAD9N HT_TXCAD8P HT_TXCAD8N

HT_TXCAD7P HT_TXCAD7N HT_TXCAD6P HT_TXCAD6N HT_TXCAD5P HT_TXCAD5N HT_TXCAD4P HT_TXCAD4N HT_TXCAD3P HT_TXCAD3N HT_TXCAD2P HT_TXCAD2N HT_TXCAD1P HT_TXCAD1N HT_TXCAD0P HT_TXCAD0N

HT_TXCLK1P

HT_TXCLK1N

HT_TXCLK0P

HT_TXCLK0N

HT_TXCTLP HT_TXCTLN

HT_TXCALP

HT_TXCALN

P21 P22 P18 P19 M22 M21 M18 M19 L18 L19 G22 G21 J20 J21 F21 F22

N24 N25 L25 M24 K25 K24 J23 K23 G25 H24 F25 F24 E23 F23 E24 E25

L21 L22

J24 J25

N23 P23

C25 D24

HT_TXCALP

HT_TXCALN

HT_CADIN15_P HT_CADIN15_N HT_CADIN14_P HT_CADIN14_N HT_CADIN13_P HT_CADIN13_N HT_CADIN12_P HT_CADIN12_N HT_CADIN11_P HT_CADIN11_N HT_CADIN10_P HT_CADIN10_N HT_CADIN9_P HT_CADIN9_N HT_CADIN8_P HT_CADIN8_N

HT_CADIN7_P HT_CADIN7_N HT_CADIN6_P HT_CADIN6_N HT_CADIN5_P HT_CADIN5_N HT_CADIN4_P HT_CADIN4_N HT_CADIN3_P HT_CADIN3_N HT_CADIN2_P HT_CADIN2_N 4 HT_CADIN1_P HT_CADIN1_N HT_CADIN0_P HT_CADIN0_N

HT_CLKIN1_P HT_CLKIN1_N

HT_CLKIN0_P HT_CLKIN0_N

HT_CTLIN0_P HT_CTLIN0_N

R217

4

4 4

4

4 4

4

100_0402

RS690T

A A

Title

RS690T HT LINK I/F

Size Document Number Rev

Date: Sheet

5

4

3

Date: Sheet

RS690T HT LINK I/F

Custom

MS-171B1

2

MICRO-STAR INT'L CO.,LTD.

50Friday, March 30, 2007

of

10

1

A

5

D D

U18B

G5

GFX_RX0P

G4

GFX_RX0N

J8

GFX_RX1P

J7

GFX_RX1N

J4

GFX_RX2P

J5

GFX_RX2N

L8

GFX_RX3P

L7

GFX_RX3N

L4

GFX_RX4P

L5

GFX_RX4N

M8

GFX_RX5P

M7

GFX_RX5N

M4

GFX_RX6P

M5

C C

A_RX2P17 A_RX2N17

A_RX3P17 A_RX3N17

GPP_RX2P24 GPP_RX2N24

GPP_RX3P25 GPP_RX3N25

GPP_RX0P30 GPP_RX0N30

B B

GPP_RX1P30 GPP_RX1N30

A_RX0P17 A_RX0N17 A_RX1P17 A_RX1N17

GFX_RX6N

P8

GFX_RX7P

P7

GFX_RX7N

Y4

SB_RX2P(GPP_RX0P)

Y5

SB_RX2N(GPP_RX0N)

W4

SB_RX3P(GPP_RX1P)

W5

SB_RX3N(GPP_RX1N)

P4

GPP_RX2P

P5

GPP_RX2N

R4

GPP_RX3P

R5

GPP_RX3N

R7

GPP_RX0P(NC)

R8

GPP_RX0N(NC)

U4

GPP_RX1P(NC)

U5

GPP_RX1N(NC)

AB7

SB_RX0P

AB6

SB_RX0N

V9

SB_RX1P

W9

SB_RX1N

AC4

NC(PCE_ISET)

AD4

NC(PCE_TXISET)

4

PART 2 OF 6

PCIE I/F GFX

SB_TX2P(GPP_TX0P)

SB_TX2N(GPP_TX0N)

SB_TX3P(GPP_TX1P)

SB_TX3N(GPP_TX1N)

PCIE I/F GPP

PCIE I/F SB

PCE_CALRP(PCE_PCAL)

PCE_CALRN(PCE_NCAL)

GFX_TX0P

GFX_TX0N

GFX_TX1P

GFX_TX1N

GFX_TX2P

GFX_TX2N

GFX_TX3P

GFX_TX3N

GFX_TX4P

GFX_TX4N

GFX_TX5P

GFX_TX5N

GFX_TX6P

GFX_TX6N

GFX_TX7P

GFX_TX7N

GPP_TX2P GPP_TX2N

GPP_TX3P GPP_TX3N

GPP_TX0P(NC)

GPP_TX0N(NC)

GPP_TX1P(NC)

GPP_TX1N(NC)

SB_TX0P SB_TX0N SB_TX1P SB_TX1N

J1 H2 K2 K1 K3 L3 L1 L2 N2 N1 P2 P1 P3 R3 R1 R2

AA1 AA2

Y2 Y3

U2 U1

V2 V1

V3 W3

W1 W2

AC1 AC2 AB1 AB2

AE4 AE3

3

HDMI_D2P HDMI_D2N HDMI_D1P HDMI_D1N HDMI_D0P HDMI_D0N HDMI_CP HDMI_CN

C1000

C1000 C1001

C1001 C1002

C1002 C1003

C1003 C1004

C1004 C1005

C1005 C1006

C1006 C1007

C1007

2

0.1u_10V_0402

HDMI_DATA2P HDMI_DATA2N HDMI_DATA1P HDMI_DATA1N HDMI_DATA0P HDMI_DATA0N HDMI_CLKP HDMI_CLKN

Place these Caps close to HDMI connect

A_TX2P_C A_TX2N_C

A_TX3P_C A_TX3N_C

GPP_TX2P_C GPP_TX2N_C

GPP_TX3P_C GPP_TX3N_C

GPP_TX0P_C GPP_TX0N_C

GPP_TX1P_C GPP_TX1N_C

A_TX0P_C A_TX0N_C A_TX1P_C A_TX1N_C

R1000

R1000 R1001

R1001

C1008

C1008 C1009

C1009 C1010

C1010 C1011

C1011

C1012

C1014

C1016

C1018

C1020

C1020 C1022

C1022

562_0402 1%

562_0402 1% 2K_1%_0402

2K_1%_0402

0.1u_10V_0402

C1013

0.1u_10V_0402

C1015

0.1u_10V_0402

C1017

0.1u_10V_0402

C1019

0.1u_10V_0402

C1021

0.1u_10V_0402

C1023

VDDA12_PKG2

A_TX2P A_TX2N

A_TX3P A_TX3N

0.1u_10V_0402

17 17

GPP_TX2P GPP_TX2N

GPP_TX3P GPP_TX3N

GPP_TX0P GPP_TX0N

GPP_TX1P GPP_TX1N

A_TX0P A_TX0N A_TX1P A_TX1N

24

25

25 30

30

17 17 17 17

1

16

RS690T

A A

5

4

R1000 562Ohm R1001 2KOhm

3

MICRO-STAR INT'L CO.,LTD.

Title

RS690T PCI-E LINK&HDMI I/F

Size Document Number Rev

Date: Sheet

RS690T PCI-E LINK&HDMI I/F

A

MS-171B1

2

11

50Friday, March 30, 2007

of

1

A

5

CON31

SPEAKER_CONN

N32-1050050-H06

150_0402 1%

STRP_DATA

CON31

1 2 3 4 567

10K_0402

+1.8VRUN

D D

10u_6V_0603

+1.8VRUN

10u_6V_0603

C C

R224

4.7K_0402

B B

AVDDQ

L16

1 2

300L300m

10u_6V_0603

1 2

300L300m

L9

1 2

300L300mL9300L300m

+3VRUN

4.7K_0402

4.7K_0402 R222

R222

+1.2VRUN PLLVDD12

PLLVDD

L17

HTPVDD

4.7K_0402

R233

L18

1 2

300L300m

C368

C155

C143

I2C_CLK

I2C_DATA

DDC_DATA

0.625A

C364

2.2u_6V_0603

C367

2.2u_6V_0603

C365

2.2u_6V_0603

C138

C138 1u_6.3V_0402

1u_6.3V_0402

0.2A

C_R Y_G COMP_B

R16 G16 B16

LDT_STOP#6,17

+3VRUN

R232

2.2K_0402_NC

ATI CHANGE 0C VERSION

R223

2.2K_0402 _NC

R35

+1.8VRUN

R42

E C

Q10

Q10 SMBT3904

SMBT3904

4

R36

R32

150_0402 1%

+1.2VRUN VDDPLL

+3VRUN

R41

R41 10K_0402

10K_0402

B

CLK can not run in A11

L999

300L600m

4.7u_6V_0603

HTREFCLK15

NB_OSC15

NBSRC_CLKP15 NBSRC_CLKN15

SBLINK_CLKP15 SBLINK_CLKN15

To LCD panel

+1.8VRUN

CAN CHANGE 0R

To CRT

C1024

NB_PWRGD32

+3VRUN

L15

300L600m

0.625A

DAC_SDAT16

C1025

C1025 1u_6.3V_0402

1u_6.3V_0402

I2C_CLK16

I2C_DATA16

R229 4.7K_0402R229 4.7K_0402

AVDDQ

DAC_SCL16

SUS_STAT#18

PLLVDD12

AVDD

0.25A

C146

2.2u_6V_0603

C369

2.2u_6V_0603

PLEASE CLOSE TO NB

VSYNC#16 HSYNC#16

R221 33_0402R221 33_0402

0.625A

PLLVDD

0.625A

HTPVDD

LDT_STOP#_NB

R1002

+3VRUN

BMREQ#17

TMDS_HPD16

DDC_DATA16

3

C_R Y_G

COMP_B

R40

R116

R117

150_0402 1%

PART 3 OF 6

CRT/TVOUT

LVDDR33_1(LVDDR18A_1) LVDDR33_2(LVDDR18A_2)

PLL PWR

PM

OCKs

OCKs CL

CL

MIS.

150_0402 1%

U18C

B22

AVDD1

C22

AVDD2

G17

AVSSN1

H17

AVSSN2

A20

AVDDDI

B20

AVSSDI

A21

AVDDQ

A22

1%

AVSSQ

C21

C_R

C20

Y_G

D19

COMP_B

E19

RED

F19

GREEN

G19

BLUE

C6

DACVSYNC

A5

DACHSYNC

B21

RSET

B6

DACSCL

A6

DACSDA

A10

PLLVDD18(PLLVDD)

B10

PLLVSS

B24

HTPVDD

B25

HTPVSS

E7

VDDPLL_1(VDDA12)

F7

VDDPLL_2(VDDA12)

F9

VSSPLL_1(VSSA12)

G9

VSSPLL_2(VSSA12)

C10

SYSRESET#

C11

POWERGOOD

C5

LDTSTOP#

B5

ALLOW_LDTSTOP

C23

HTTSTCLK

B23

HTREFCLK

C2

TVCLKIN

B11

OSCIN

A11

PLLVDD12(OSCOUT)

F2

GFX_CLKP

E1

GFX_CLKN

G1

SB_CLKP

G2

SB_CLKN

B2

BMREQb

A2

I2C_CLK

B4

I2C_DATA

AD5

THERMALDIODE_P

AE5

THERMALDIODE_N

C14

TMDS_HPD

B3

DDC_DATA

C3

TESTMODE

A3

STRP_DATA

RS690T

C_R Y_G COMP_B

R227

715_0402

NB_RST#14,17

ALLOW_LDTSTOP17

R225

10K_0402

4.7K_0402

R4370RR437

0R

R228

33_0402

STRP_DATA

2

TXOUT_L0P

TXOUT_L0N

TXOUT_L1P

TXOUT_L1N

TXOUT_L2P

TXOUT_L2N

TXOUT_L3P

TXOUT_L3N TXOUT_U0P

TXOUT_U0N TXOUT_U1P TXOUT_U1N TXOUT_U2P TXOUT_U2N TXOUT_U3P TXOUT_U3N

TXCLK_LP TXCLK_LN TXCLK_UP TXCLK_UN

LPVDD LPVSS

LVDDR18D_1 LVDDR18D_2

LVSSR1 LVSSR3 LVSSR5 LVSSR6 LVSSR7 LVSSR8

LVSSR12 LVSSR13

LVDS_DIGON

LVDS_BLON LVDS_BLEN

DFT_GPIO0 DFT_GPIO1 DFT_GPIO2 DFT_GPIO3 DFT_GPIO4 DFT_GPIO5

B14 B15 B13 A13 H14 G14 D17 E17

A15 B16 C17 C18 B17 A17 A18 B18

E15 D15 H15 G15

0.2A

D14 E14

0.2A

A12 B12 C12 C13

A16 A14 D12 C19 C15 C16

F14 F15

E12 G12 F12

TP19TP19

LVDS_L_TXL0P LVDS_L_TXL0N LVDS_L_TXL1P LVDS_L_TXL1N LVDS_L_TXL2P LVDS_L_TXL2N

LVDS_U_TXL0P LVDS_U_TXL0N LVDS_U_TXL1P LVDS_U_TXL1N LVDS_U_TXL2P LVDS_U_TXL2N

LVDS_L_TXLCKP LVDS_L_TXLCKN LVDS_U_TXLCKP LVDS_U_TXLCKN

C371

0.1u_10V_0402 _NC

0.2A

C149

2.2u_6V_0603

LVDS_DIGON LVDS_BLON 16

16

GPIO0 Pull down 3.0K to enable Side Port

DFT_GPIO0

R231

D6 D7 C8 C7 B8 A8

R231

LOAD_ROM#

R230 3K_0402 _NCR230 3K_0402 _NC

DFT_GPIO2

R219

DFT_GPIO3

R235

DFT_GPIO4

R234

DFT_GPIO5

R220

3K_0402

3K_0402 3K_0402 _NC

3K_0402 _NC 3K_0402_NC

3K_0402_NC 3K_0402 _NC

3K_0402 _NC 3K_0402 _NC

3K_0402 _NC

16 16 16 16 16 16

16

16 16 16

1 2

C370

300L300m

2.2u_6V_0603

1 2

C148

0.1u_10V_0402

1

RS690: LVDDR18A=3.3V

+1.8VRUN

L10

L11

300L300m

0.1u_10V_0402

+1.8VRUN

C363

+3VRUN

300L300m

1 2

4.7u_6V_0603

L13

C366

RS485/RS690

DFT_GPIO1

5

Bypass the loading of EEPROM straps and use Hardware default values

DEFAULT

I2C Master can load strap values from EEPROM if connected, or use default values if not connected

PULL HIGH (internally pulled

A A

high)

PULL LOW

DFT_GPIO0

Memory side port not available

Memory side port available

DEFAULT

DFT_GPIO[4:2]

These pin straps are used to configure PCI-E GPP mode: 111: register defined (register default to Config E)

110: 4-0-0-0-0 Config A 101: 4-4 Config B 100: 4-2-2 Config C 011: 4-2-1-1 Config D 010: 4-1-1-1-1 Config E others: register defined (register default to Config E)

RS690 only (NC for RS485)

4

Enable debug bus via the memory IO pads, if available in the package

DEFAULT

use default values

use the memory data bus to output the debug bus

DFT_GPIO5

3

DEFAULT

LOAD_ROM#: LOAD ROM STRAP ENABLE

High, LOAD ROM STRAP DISABLE Low, LOAD ROM STRAP ENABLE

MICRO-STAR INT'L CO.,LTD.

Title

RS690T SYSTEM I/F&CLK

Size

Document Number Rev

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

MICRO-STAR INT'L CO.,LTD.

MS-171B1

1

A

of

12 50Friday, March 30, 2007

5

4

3

2

1

C133

C91

+1.2VRUN

C141

C141 10u_6V_0603

10u_6V_0603

C95

0.1u_10V_0402

C136

C89

VCC_NB

C124

0.1u_10V_0402

L12

L6

L5

80L6_30_0805

+1.2VRUN

L4

D D

+1.2VRUN

C C

MEM_VDDQ

220L3AL4220L3A

+1.8VRUN

220L3A

10u_6V_0603

L7

300L600m

1u_6.3V_0402

L2

80L6_30_0805

L140

C1026

10u_6V_0603

C42

C125

C43

10u_6V_0603

C1027

1u_6.3V_0402

C41

VDD18

C127

C127 1u_6.3V_0402

1u_6.3V_0402

10u_6V_0603

C44

1u_6.3V_0402

C1034

1u_6.3V_0402

C1028

C1035

+3VRUN

L8

1u_6.3V_0402

C56

C1029

C1036

1u_6.3V_0402

1 2

300L300m

C29

1u_6.3V_0402

C1037

1u_6.3V_0402

VDDR3

1u_6.3V_0402

C67

C39

1u_6.3V_0402

C1030

C142

2.2u_6V_0603

VDDA18

C1031

C88

C88 1u_6.3V_0402

1u_6.3V_0402

0.5A

C1038

C1038 1u_6.3V_0402

1u_6.3V_0402

VDDHT_PKG VDDA12_PKG2

0.6A

0.05A

5A

VDDR

2A

C1032

C1032 1u_6.3V_0402

1u_6.3V_0402

For Side Port

U18D

AE24

VDD_HT1

AD24

VDD_HT2

AE25

VDD_HT3

AE22

VDD_HT4

AD22

VDD_HT5

AE23

VDD_HT6

AD23

VDD_HT7

D22

VDDHT_PKG

J14

VDD18_1

J15

VDD18_2

E11

VDDR3_2

D11

VDDR3_1

AC5

VDDA12_13(VDDA18_1)

AB3

VDDA12_14(VDDA18_2)

U7

VDDA12_15(VDDA18_3)

W7

VDDA12_16(VDDA18_4)

AB4

VDDA12_17(VDDA18_5)

AC3

VDDA12_18(VDDA18_6)

AD2

VDDA12_19(VDDA18_7)

AE2

VDDA12_20(VDDA18_8)

AD6

VDD_MEM1(VDD_DVO1)

AC7

VDD_MEM2(VDD_DVO2)

AC8

VDD_MEM3(VDD_DVO3)

AA9

VDD_MEM4(VDD_DVO4)

AD7

VDD_MEM5(VDD_DVO5)

AB9

VDD_MEM6(VDD_DVO6)

AE6

VDD_MEM7(VDD_DVO7)

AE8

VDD_MEM8(VDD_DVO8)

AE7

VDD_MEM9(VDD_DVO9)

AD8

VDD_MEM10(VDD_DVO10)

RS690T

PART 4 OF 6

VDDA_12_1 VDDA_12_2 VDDA_12_3 VDDA_12_4 VDDA_12_5 VDDA_12_6 VDDA_12_7 VDDA_12_8

VDDA_12_9 VDDA_12_10 VDDA_12_11 VDDA_12_12

VDDA12_PKG2 VDDA12_PKG1

VDDC_1 VDDC_2 VDDC_3 VDDC_4 VDDC_5 VDDC_6 VDDC_7 VDDC_8

POWER

VDDC_9 VDDC_10 VDDC_11 VDDC_12 VDDC_13 VDDC_14 VDDC_15 VDDC_16 VDDC_17 VDDC_18 VDDC_19 VDDC_20 VDDC_21 VDDC_22 VDDC_23 VDDC_24 VDDC_25 VDDC_26 VDDC_27 VDDC_28 VDDC_29 VDDC_30 VDDC_31 VDDC_32

D1 G7 E2 C1 E3 D2 M9 F4 B1 D3 L9 E6 AD3 M1

L11 L13 L15 M12 R15 M14 N11 N13 N15 J11 H11 P12 P14 R11 R13 A19 B19 U11 U14 P17 L17 J19 D20 G20 A9 B9 C9 D9 A7 A4 U12 U15

0.5A

VDDA12

C106

1u_6.3V_0402

C1033

0.1u_6V_0603

5A

1u_6.3V_0402

C118

1u_6.3V_0402

C76

10u_6V_0603

C128

1u_6.3V_0402

10u_6V_0603

C119

10u_6V_0603

C129

0.1u_10V_0402

C147

C107

0.1u_10V_0402

TOTAL +1.2VRUN FOR NB IS 18.474ATOTAL +1.2VRUN FOR NB IS 18.474A

B B

Y1

VSSA23

VSS23

VSS25

VSS24

B7

L24

VSS26

P13

VSS27

P20

W6

VSS28

P15

R12

VSSA29

VSS29

VSS30

R14

R20

GROUND

VSS31

VSS32

VSS33

VSS34

VSS35

Y25

U20

H25

W23

AD25

3

VSS36

VSS37

W24

VSS38

Y22

AC12

VSS66

VSS39

AC23

AC10

VSS65

VSS40

D25

V14

VSS64

VSS41

4 G2

W17

VSS62

VSS42

AA14

AE18

AB19

VSS63

VSS43

H12

AC22

AE14

VSS60

VSS61

VSS44

VSS45

R23

M13

AA7

VSS59

VSS58

VSS46C4VSS47

Y12

D4

VSS57

VSS48

T23

F17

VSS56

VSS49

T25

A23

AC6

VSS55

VSS50

V11

R17

M17

VSS54

VSS53

VSS52

VSS51

H23

U18E

RS690T

MICRO-STAR INT'L CO.,LTD.

Title

RS690T POWER & GND

Size

Document Number Rev

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

MS-171B1

MICRO-STAR INT'L CO.,LTD.

13

1

50Tuesday, February 06, 2007

of

A

VSS17

VSS18

M11

VSS19

M20

VSS20

M23

M25

VSS21

VSS22

N12

R9

N14

Y7

AA3

G3

AD1

AE1

G6

M3

VSSA2P9VSSA5F3VSSA7A1VSSA8H1VSSA9

VSSA6

VSSA4

VSSA3

VSSA1

PAR 5 OF 6

A A

VSS1

VSS2

VSS3

VSS4E9VSS5

F11

A25

D23

5

4

VSSA10J2VSSA11H3VSSA13J6VSSA15F1VSSA16L6VSSA17M2VSSA18M6VSSA19J3VSSA20P6VSSA21T1VSSA22N3VSSA24R6VSSA25T2VSSA26T3VSSA27U3VSSA28U6VSSA30

VSSA14

VSSA12

VSS6

VSS7

VSS8

VSS9

VSS10

VSS11

VSS12

VSS13

VSS14

VSS15

1

Y23

P11

R24

G1

M15

AC18

VSS16

3

2

J2

J1

L12

L14

L20

L23

G2

5

4

3

2

8P4R-47_RN0402

8P4R-47_RN0402 8P4R-47_RN0402

8P4R-47_RN0402

MEM_VTT

1

0.5A

L57

C327

2.2u_6V_0603

C1043

WE# MEM_BA0 MEM_A5 MEM_A9 MEM_BA2

CKE MEM_BA1 MEM_A1 MEM_A3 MEM_A10 MEM_A12 MEM_A7 MEM_A2 MEM_A4 MEM_A11 MEM_A8 CAS# RAS#

MEM_A6 MEM_A0

CS#

ODT

300L300m

C1044

10u_6V_0603

12

+1.8VRUN

1 3 5 7 1 3 5 7 1 3 5 7 1 3 5 7 1 3 5 7 1 3 5 7

U18F

U100

D D

C C

B B

MEM_BA0 MEM_DQ0 MEM_BA1

MEM_A12 MEM_A11 MEM_A10 MEM_A9 MEM_A8 MEM_A7 MEM_A6 MEM_A5 MEM_A4 MEM_A3

MEM_A1 MEM_A0

MEM_CLKN MEM_CLKP

CKE

CS# WE# RAS# CAS# MEM_DM0

MEM_DM1

ODT

MEM_DQS0P MEM_DQS0N

MEM_DQS1P MEM_DQS1N

MEM_VREF

MEM_BA2

U100

L2

BA0

L3

BA1

R2

A12

P7

A11

M2

A10/AP

P3

A9

P8

A8

P2

A7

N7

A6

N3

A5

N8

A4

N2

A3

M7

A2

M3

A1

M8

A0

K8

CK

J8

CK

K2

CKE

L8

CS

K3

WE RAS CAS LDM

UDM

ODT

LDQS LDQS

UDQS UDQS

VREF NC#A2

NC#E2 NC#L1 NC#R3 NC#R7 NC#R8

VDDQ10

K7 L7

F3 B3

K9

F7 E8

B7 A8

J2

A2 E2 L1 R3 R7 R8

HY5PS561621AFP-25(400MHz)

DQ15 DQ14 DQ13 DQ12 DQ11 DQ10

DQ9 DQ8 DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0

VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8 VDDQ9

VDD1 VDD2 VDD3 VDD4 VDD5

VDDL

VSSDL

VSSQ1 VSSQ2 VSSQ3 VSSQ4 VSSQ5 VSSQ6 VSSQ7 VSSQ8 VSSQ9

VSSQ10

VSS1 VSS2 VSS3 VSS4 VSS5

MEM_DQ15

B9

MEM_DQ11

B1

MEM_DQ13

D9

MEM_DQ12

D1

MEM_DQ8

D3

MEM_DQ10

D7

MEM_DQ9

C2

MEM_DQ14

C8

MEM_DQ3

F9

MEM_DQ7

F1

MEM_DQ1

H9

MEM_DQ6

H1

MEM_DQ5

H3

MEM_DQ0

H7

MEM_DQ4

G2

MEM_DQ2

G8

A9 C1 C3 C7 C9 E9 G1 G3 G7 G9

A1 E1 J9 M9 R1

J1 J7

A7 B2 B8 D2 D8 E7 F2 F8 H2 H8

A3 E3 J3 N1 P9

MEM_VDDQ

1A

L55

300L300m

1 2

C1039

2.2u_6V_0603

MEM_CLKN

68ohm_0402 5%

MEM_A0 MEM_A1 MEM_A2 MEM_A3 MEM_A4 MEM_A5 MEM_A6 MEM_A7 MEM_A8 MEM_A9 MEM_A10 MEM_A11 MEM_A12 MEM_A13MEM_A2

TP20TP20

MEM_BA0 MEM_BA1 MEM_BA2

RAS# CAS# WE# CS#

CKE ODT

MEM_CLKP MEM_VREF1 MEM_CLKN

MEM_DM0 MEM_DM1

MEM_DQS0P MEM_DQS0N MEM_DQS1P MEM_DQS1N

R1004

MEM_CLKP

U18F

W12

MEM_A0(NC)

AD10

MEM_A1(NC)

AB12

MEM_A2(NC)

AB11

MEM_A3(NC)

W14

MEM_A4(NC)

AB15

MEM_A5(NC)

AB14

MEM_A6(NC)

AE9

MEM_A7(NC)

AA12

MEM_A8(NC)

AC9

MEM_A9(NC)

AE10

MEM_A10(NC)

Y14

MEM_A11(NC)

AD9

MEM_A12(NC)

AA11

MEM_A13(NC)

AC11

MEM_BA0(NC)

AE11

MEM_BA1(NC)

AD11

MEM_BA2(NC)

AA15

MEM_RASb(NC)

Y15

MEM_CASb(NC)

AC14

MEM_WEb(NC)

V12

MEM_CSb(NC)

AD12

MEM_CKE(NC)

Y9

MEM_ODT(NC)

W15

MEM_CKP(NC)

V15

MEM_CKN(NC)

AC16

MEM_DM0(NC)

AD19

MEM_DM1/DVO_D8(DVO_D8)

AE17

MEM_DQS0P/DVO_IDCKP(DVO_IDCKP)

AD17

MEM_DQS0N/DVO_IDCKN(DVO_IDCKN)

AD21

MEM_DQS1P(NC)

AC20

MEM_DQS1N(NC)

RS690T

PAR 6 OF 6

MEM_DQ0/DVO_VSYNC(DVO_VSYNC) MEM_DQ1/DVO_HSYNC(DVO_HSYNC)

SBD_MEM/DVO_I/F

RUND26,29,34,36

MEM_DQ2/DVO_DE(DVO_DE)

MEM_DQ3/DVO_D0(DVO_D0)

MEM_DQ4(NC) MEM_DQ5/DVO_D1(DVO_D1) MEM_DQ6/DVO_D2(DVO_D2) MEM_DQ7/DVO_D4(DVO_D4) MEM_DQ8/DVO_D3(DVO_D3) MEM_DQ9/DVO_D5(DVO_D5)

MEM_DQ10/DVO_D6(DVO_D6) MEM_DQ11/DVO_D7(DVO_D7)

MEM_DQ12(NC)

MEM_DQ13/DVO_D9(DVO_D9) MEM_DQ14/DVO_D10(DVO_D10) MEM_DQ15/DVO_D11(DVO_D11)

MEM_COMPP(NC) MEM_COMPN(NC)

MEM_VREF(NC)

IOPLLVDD18(NC)

IOPLLVSS(NC)

IOPLLVDD12(NC)

AD13

MEM_DQ1

AE13

MEM_DQ2

AC13

MEM_DQ3

AD14

MEM_DQ4

AC15

MEM_DQ5

AD15

MEM_DQ6

AE15

MEM_DQ7

AE16

MEM_DQ8

AD16

MEM_DQ9

AC17

MEM_DQ10

AD18

MEM_DQ11

AE19

MEM_DQ12

AC19

MEM_DQ13

AE20

MEM_DQ14

AD20

MEM_DQ15

AE21

R378

Y11

R377 40.2_1%_0402R377 40.2_1%_0402

W11 AE12 AA17 Y17 AB17

CPU_VDDIO_SUS

N-AO3404_SOT23-3-RH

C288

2.2u_6V_0603

Q41

D S

40.2_1%_0402

L56

300L300m

G

0.1u_10V_0402

12

C1042

MEM_VDDQ

VDDA12

MEM_VDDQ

0.1u_10V_0402

C287

RN25

2 4 6 8

RN26

2 4 6 8

RN21

2 4 6 8

RN22

2 4 6 8

RN23

2 4 6 8

RN24

2 4 6 8

C293

C293 C304

C304 C301

C301 C314

C314 C313

C313 C310

C310 C306

C306

C318

C318 C317

C317 C316

C316 C315

C315

0.1u_10V_0402

MEM_VDDQ

CKE

D19

BAS40WS_NC

MEM_VDDQ

R376

10K_0402 _NC

AC

3

MEM_VDDQ MEM_VDDQ

0.1u_10V_0402

A A

C322

1K_0402 1%

MEM_VREF

R375

1K_0402 1%

5

0.1u_10V_0402

R374

C321

0.1u_10V_0402

C323

C324

R210

1K_0402 1%

MEM_VREF1

R373

1K_0402 1%

NB_RST#12,17

4

CPU_VTT_SUS

D S

N-AO3404_SOT23-3-RH

MEM_VTT

Q40

C1040

C1041

G

C1045

0.1u_10V_0402

2

C1041

10u_6V_0603

MICRO-STAR INT'L CO.,LTD.

Title

SIDE MEMORY

Size Document Number Rev

Custom

Date: Sheet

Date: Sheet of

MICRO-STAR INT'L CO.,LTD.

MS-171B1

1

A

14 50Friday, March 30, 2007

A

of

5

4

3

2

1

+3VRUN

L19

300L600m

D D

C C

B B

26OHM@100Mhz

1- PLACE ALL SERIAL TERMINATION RESISTORS CLOSE TO U11

2- PUT DECOUPLING CAPS CLOSE TO U11 POWER PIN

CLK_VDD

22u_6V_0805

C419

0.1u_10V_0402

C403

C402

0.1u_10V_0402

C401

CLK_VDD

C400

0.1u_10V_0402

R258

R258 10K_0402

10K_0402

0.1u_10V_0402

C414

C413

0.1u_10V_0402

1 2

300L300m

1 2

300L300m

33p_50V_0402

Y1

33p_50V_0402

C413

1 2

C412

+3VRUN

L28

+3VRUN

L27

Parallel Resonance Crystal

C190

14.31818MHZ20P_S-2

14.31818MHZ20P_S-2 C180

C180

Ioh = 5 * Iref (2.32mA)

Voh = 0.71V @ 60 ohm

C207

2.2u_6V_0603

C206

2.2u_6V_0603

R76

1M_0402 _NC

SDATA08,18

SCLK08,18

CLK_VDD

0.4A

R256

R256 475_0402

475_0402

1%

U3

54

VDDCPU

14

VDD_SRC1

23

VDD_SRC2

28

VDD_SRC3

44

VDD_SRC4

5

VDD_48

39

VDD_ATIG

2

VDD_REF

60

VDDHTT

53

GND_CPU

15

GND_SRC1

22

GND_SRC2

29

GND_SRC3

45

GND_SRC4

8

GND_48

38

GND_ATIG

1

GND_REF

58

GNDHTT

3

XIN

4

XOUT

11

RESET_IN#

61

NC

9

SMBCLK

10

SMBDAT

48

IREF

ICS951462AGLFT_TSSOP64-RH

VDDA

GNDA

CPUCLK8T0

CPUCLK8C0

CPUCLK8T1

CPUCLK8C1

SRCCLKT0 SRCCLKC0 ATIGCLKT0

ATIGCLKC0

ATIGCLKT1

ATIGCLKC1

ATIGCLKT2

ATIGCLKC2

ATIGCLKT3

ATIGCLKC3

SRCCLKT1 SRCCLKC1 SRCCLKT2 SRCCLKC2 SRCCLKT3 SRCCLKC3 SRCCLKT4 SRCCLKC4 SRCCLKT5 SRCCLKC5 SRCCLKT6 SRCCLKC6 SRCCLKT7 SRCCLKC7

CLKREQA# CLKREQB# CLKREQC#

48MHz_1 48MHz_0

FS1/REF1 FS0/REF0 FS2/REF2

HTTCLK0

50 49

56 55 52 51

16 17 41 40 37 36 35 34 30 31 18 19 20 21 24 25 26 27 47 46 43 42 12 13

57 32 33

7 6

63 64 62 59

CLK_VDDA

0.1u_10V_0402

CPUCLK_EXT_R CPUCLK#_EXT_R

SBLINK_CLKP_R SBLINK_CLKN_R NBSRC_CLKP_R NBSRC_CLKN_R

SBSRC_CLKP_R SBSRC_CLKN_R GPP_CLK0P_R GPP_CLK0N_R GPP_CLK1P_R GPP_CLK1N_R GPP_CLK2P_R GPP_CLK2N_R GPP_CLK3P_R GPP_CLK3N_R

TP35TP35 TP36TP36 TP34TP34

CLK_48M_USB_R

C177

47.5_0402

R61

R61 R62

R62

47.5_0402

R79

R79 R80

R80 R72

R72 R73

R73

Need the same length(NB/SB)

R81

R81 R82

R82 R83 33_0402R83 33_0402 R84

R84 R85

R85 R86

R86 R87

R87 R88

R88 R68

R68 R69

R69

CLKREQA~C Internal PU

R78

33_0402

LPC_OSCIN_R

SB_OSCIN_R NB_OSCIN_R HTREFCLK_R

0.4A

C172

C172 22u_6V_0805

22u_6V_0805

L20

1 2

300L300m

R57

33_0402

33_0402 33_0402

33_0402

33_0402 33_0402

33_0402

CLK_48M_USB

261_0402

1%

5

5 R5

R5

R64

R64 R63

R63 R59

R59 R65

R65 R66

R66 R67

R67

1%

4

4 R5

R5

49.9_0402

18

1%

9

9 R9

R9

49.9_0402

+3VRUN

1%

8

8 R9

R9

49.9_0402

8.2K_0402

8.2K_0402 33_0402

33_0402 33_0402

33_0402

7

7 R9

R9

49.9_0402

2.2K_0402

R60

49.9_0402

1%

1%1%1%

5

6

R9

49.9_0402

CLK_VDD

R50

HTREFCLK

6

CPUCLK

6

CPUCLK#

1%

3

2

4

R9

49.9_0402

2.2K_0402

2.2K_0402 R49

R49

R58

12

10p_50V_0402_NC

C484

1%

1

2

R9

R5

49.9_0402

2.2K_0402

SB_OSCIN

NB_OSC

10p_50V_0402_NC

C489

1%

0

0 R9

R9

49.9_0402

18 12

SBLINK_CLKP SBLINK_CLKN NBSRC_CLKP NBSRC_CLKN

SBSRC_CLKP SBSRC_CLKN GPP_CLK0P GPP_CLK0N GPP_CLK1P GPP_CLK1N GPP_CLK2P GPP_CLK2N GPP_CLK3P GPP_CLK3N

14.318MHz

12 12 12 12

17 17

30

24

25

A A

MICRO-STAR INT'L CO.,LTD.

Title

CLOCK GENERATOR

Size Document Number Rev

Custom

Date: Sheet

5

4

3

2

Date: Sheet

MICRO-STAR INT'L CO.,LTD.

MS-171B1

1

A

of

50Friday, March 30, 2007

15

MSI MS-171B1 Schematics rev.A

Specifications and Main Features

Frequently Asked Questions

User Manual