MSI Emerald Bay Schematics REV 0.5

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Emerald Bay

Table of Contents

Page Description

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1

TITLE PAGE

2

NOTES

3

MCP (1 of 7)

4

MCP (2 of 7)

5

MCP (3 of 7)

6

MCP (4 of 7)

7

MCP (5 of 7)

8

MCP (6 of 7)

9

MCP (7 of 7)

10

FAN HEADERS

11

XDP (MCP)

12

PROCESSOR STRAPS

13

DDR3 SODIMM0

14

DDR3 SODIMM1

15

IBEXPEAK (1 of 9)

16

IBEXPEAK (2 of 2)

17

IBEXPEAK (3 of 9)

18

IBEXPEAK (4 of 9)

19

IBEXPEAK (5 of 9)

20

IBEXPEAK (6 of 9)

21

IBEXPEAK (7 of 9)

22

IBEXPEAK (8 of 9)

23

IBEXPEAK (9 of 9)

24

DISPLAYPORT+HDMI

25

LVDS

26

BRAIDWOOD

27

USB 2.0 (1 of 2)

28

USB 2.0 (2 of 2)

29

MINICARD

30

SATA

31

IHDA

32

LAN HANKSVILLE

33

C C

SPI

34

CK505

35

IBEXPEAK-M XDP

36

F71859 SIO

37

PCIE x16 TPS51125 SYSTEM POWER VR

38

+12V &DDR3 VR

39

V1.1 VR

40

GRAPHICS CORE VR

41

IMVP-6.5

42

DISCHARGE CIRCUITS

43

START UP SEQUENCE

44

SLEEP CONTROL

45

POWER SEQUENCE LOGIC

46

POWER UP SEQUENCE

47

PCH STRAPS

48

VGA

49

PCIE TO SATA

50

REVISION HISTORY

51

REVISION HISTORY1

52

REVISION HISTORY2

53

CALPELLA ON DESKTOP ENABLING BOARD

Merom

AUBURNDALE/CLARKSFIELD-IBEXPEAK-M

Fab A

REV 0.5

B B

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CALPELLA ON DESKTOP ENABLING BOARD

SCHEMATIC ANNOTATIONS AND BOARD INFORMATION

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Voltage Rails

+V12A +V12S +V5A +V5 +V5S +V3.3A +V3.3M +V3.3M_CK505 +V3.3 +V3.3S +V1.5 +V1.5S +V1.05M +V1.05S +V0.75 +VCC_CORE +VCC_GFXCORE

VOLTAGE DESCRIPTIONACTIVE INPOWER PLANE

12V 12V 5V 5V 5V

3.3V

1.8V

1.5V

1.05V

0.9V

0.35V-1.5V

0.7V-1.25V

S0/M0, (S3-S5)/M1, (S3-S5)/M-off S0/M0 S0/M0, (S3-S5)/M1, (S3-S5)/M-off S0/M0, S3/M1, S3/M-off S0/M0 S0/M0, (S3-S5)/M1, (S3-S5)/M-off S0/M0, (S3-S5)/M1, S3/(M-off w/WOL_EN) S0/M0, (S3-S5)/M1 S0/M0, S3/M1, S3/M-off S0/M0 S0/M0, (S3-S5)/M1, S3/M-off S0/M0 S0/M0, (S3-S5)/M1 S0/M0 S0/M0, (S3-S5)/M1, S3/M-off S0/M0 S0/M0

LAN Clock, MCH

DDR core

GMCH, ICH core, and FSB rail DDR command & control pull up. CPU core rail GMCH Graphics core rail

C C

Net Naming Conventions

Suffix # = Active Low Signal

Prefix H = Host M = DDR Memory TP = Test Point (does not connect anywhere else)

PCB Footprints

1

2

SOT-23

3

As seen from top

5

1

2

4

3

SOT23-5

Power States

SLP_S3#

S4_STATE#

SLP_S4#

SLP_S5#

HIGH

S0 (Full on)/M0

S3 (Suspend to RAM)/M1

S3 (Suspend to RAM)/Moff

B B

S3 (Suspend to RAM)/Moff w/WOL_EN

S4 (Suspend to Disk)/M1

S5 (Soft Off)/M1

S4 (Suspend to Disk)/Moff

S5 (Soft Off)/Moff

LOW

HIGH

LOW

HIGH

LOW

HIGH

LOW

HIGH

LOW

SLP_M# HIGH

HIGH

LOW

HIGH

LOW

+V*A ON

ON

+V3.3M_WOL ON

ON

OFF

ON

OFF

A A

5

4

+V1.05M ON

ON

OFF

ON

OFF

+V3.3M ON

ON

OFF

ON

OFF

+V1.5/+V0.75 ON

ON

OFF

+V5/+V3.3 ON

ON

OFF

+V*S ON

OFF

Clocks ON

only MCH BCLK

OFF

only MCH BCLK

OFF

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U1A

DMI_TXN0(17) DMI_TXN1(17) DMI_TXN2(17) DMI_TXN3(17)

DMI_TXP0(17) DMI_TXP1(17) DMI_TXP2(17) DMI_TXP3(17)

DMI_RXN0(17) DMI_RXN1(17) DMI_RXN2(17) DMI_RXN3(17)

DMI_RXP0(17) DMI_RXP1(17) DMI_RXP2(17) DMI_RXP3(17)

FDI_TXN[7:0](17)

C C

FDI_TXP[7:0](17)

FDI_FSYNC0(17) FDI_FSYNC1(17)

FDI_INT(17)

FDI_LSYNC0(17) FDI_LSYNC1(17)

FDI_TXN0 FDI_TXN1 FDI_TXN2 FDI_TXN3 FDI_TXN4 FDI_TXN5 FDI_TXN6 FDI_TXN7

FDI_TXP0 FDI_TXP1 FDI_TXP2 FDI_TXP3 FDI_TXP4 FDI_TXP5 FDI_TXP6 FDI_TXP7

A24 C23 B22 A21

B24 D23 B23 A22

D24 G24 F23 H23

D25 F24 E23 G23

E22 D21 D19 D18 G21 E19 F21 G18

D22 C21 D20 C18 G22 E20 F20 G19

F17 E17

C17 F18

D17

DMI_RX#[0] DMI_RX#[1] DMI_RX#[2] DMI_RX#[3]

DMI_RX[0] DMI_RX[1] DMI_RX[2] DMI_RX[3]

DMI_TX#[0] DMI_TX#[1] DMI_TX#[2] DMI_TX#[3]

DMI_TX[0] DMI_TX[1] DMI_TX[2] DMI_TX[3]

FDI_TX#[0] FDI_TX#[1] FDI_TX#[2] FDI_TX#[3] FDI_TX#[4] FDI_TX#[5] FDI_TX#[6] FDI_TX#[7]

FDI_TX[0] FDI_TX[1] FDI_TX[2] FDI_TX[3] FDI_TX[4] FDI_TX[5] FDI_TX[6] FDI_TX[7]

FDI_FSYNC[0] FDI_FSYNC[1]

FDI_INT FDI_LSYNC[0]

FDI_LSYNC[1]

B B

IC,AUB_CFD_rPGA,R0P9

PEG_ICOMPI

PEG_ICOMPO

PEG_RCOMPO

PEG_RBIAS PEG_RX#[0]

PEG_RX#[1]

DMI Intel(R) FDI

PEG_RX#[2] PEG_RX#[3] PEG_RX#[4] PEG_RX#[5] PEG_RX#[6] PEG_RX#[7] PEG_RX#[8]

PEG_RX#[9] PEG_RX#[10] PEG_RX#[11] PEG_RX#[12] PEG_RX#[13] PEG_RX#[14] PEG_RX#[15]

PEG_RX[0] PEG_RX[1] PEG_RX[2] PEG_RX[3] PEG_RX[4] PEG_RX[5] PEG_RX[6] PEG_RX[7] PEG_RX[8]

PEG_RX[9] PEG_RX[10] PEG_RX[11] PEG_RX[12] PEG_RX[13] PEG_RX[14] PEG_RX[15]

PEG_TX#[0] PEG_TX#[1] PEG_TX#[2] PEG_TX#[3] PEG_TX#[4] PEG_TX#[5] PEG_TX#[6] PEG_TX#[7] PEG_TX#[8] PEG_TX#[9]

PEG_TX#[10] PEG_TX#[11] PEG_TX#[12] PEG_TX#[13] PEG_TX#[14]

PCI EXPRESS -- GRAPHICS

PEG_TX#[15]

PEG_TX[0]

PEG_TX[1]

PEG_TX[2]

PEG_TX[3]

PEG_TX[4]

PEG_TX[5]

PEG_TX[6]

PEG_TX[7]

PEG_TX[8]

PEG_TX[9] PEG_TX[10] PEG_TX[11] PEG_TX[12] PEG_TX[13] PEG_TX[14] PEG_TX[15]

PEG_IRCOMP_R

B26 A26 B27 A25

K35 J34 J33 G35 G32 F34 F31 D35 E33 C33 D32 B32 C31 B28 B30 A31

J35 H34 H33 F35 G33 E34 F32 D34 F33 B33 D31 A32 C30 A28 B29 A30

L33 M35 M33 M30 L31 K32 M29 J31 K29 H30 H29 F29 E28 D29 D27 C26

L34 M34 M32 L30 M31 K31 M28 H31 K28 G30 G29 F28 E27 D28 C27 C25

EXP_RBIAS PEG_RXN0

PEG_RXN1 PEG_RXN2 PEG_RXN3 PEG_RXN4 PEG_RXN5 PEG_RXN6 PEG_RXN7 PEG_RXN8 PEG_RXN9 PEG_RXN10 PEG_RXN11 PEG_RXN12 PEG_RXN13 PEG_RXN14 PEG_RXN15

PEG_RXP0 PEG_RXP1 PEG_RXP2 PEG_RXP3 PEG_RXP4 PEG_RXP5 PEG_RXP6 PEG_RXP7 PEG_RXP8 PEG_RXP9 PEG_RXP10 PEG_RXP11 PEG_RXP12 PEG_RXP13 PEG_RXP14 PEG_RXP15

PEG_TXN0 PEG_TXN1 PEG_TXN2 PEG_TXN3 PEG_TXN4 PEG_TXN5 PEG_TXN6 PEG_TXN7 PEG_TXN8 PEG_TXN9 PEG_TXN10 PEG_TXN11 PEG_TXN12 PEG_TXN13 PEG_TXN14 PEG_TXN15

PEG_TXP0 PEG_TXP1 PEG_TXP2 PEG_TXP3 PEG_TXP4 PEG_TXP5 PEG_TXP6 PEG_TXP7 PEG_TXP8 PEG_TXP9 PEG_TXP10 PEG_TXP11 PEG_TXP12 PEG_TXP13 PEG_TXP14 PEG_TXP15

R1 49.9R1%0402R1 49.9R1%0402

R2 750R1%0402R2 750R1%0402

PEG_RXN[15:0] (37)

PEG_RXP[15:0] (37)

PEG_TXN[15:0] (37)

PEG_TXP[15:0] (37)

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TP9TP9

H_PECI(20)

H_PROCHOT_L(42)

H_THRMTRIP_L(20)

H_CPURST_L(11)

H_PM_SYNC(17)

C C

BUF_PLT_RST_L(19,36)

H_CPUPWRGD(11,20)

PM_DRAM_PWRGD(17)

H_VTTPWRGD(46)

H_PWRGD_XDP(11)

R603

24.9KR1%0402

H_PROCHOT_L

H_THRMTRIP_L

R6 0R0402R6 0R0402

H_CPURST_L

PM_DRAM_PWRGD

R10

12.4KR1%0402

4

H_COMP3 H_COMP2 H_COMP1 H_COMP0

TP_SKTOCC_L

H_CATERR_L

VCCPWRGOOD_R

PLT_RST_LBUF_PLT_RST_L

U1B

AT23

COMP3

AT24

COMP2

G16

COMP1

AT26

COMP0

AH24

SKTOCC#

AK14

CATERR#

AT15

PECI

AN26

PROCHOT#

AK15

THERMTRIP#

AP26

RESET_OBS#

AL15

PM_SYNC

AN14

VCCPWRGOOD_1

AN27

VCCPWRGOOD_0

AK13

SM_DRAMPWROK

AM15

VTTPWRGOOD

AM26

TAPPWRGOOD

AL14

RSTIN#

IC,AUB_CFD_rPGA,R0P9

3

MISC THERMAL

CLOCKS

DDR3

MISC

DDR3

MISC

PWR MANAGEMENT

JTAG & BPM

BCLK

BCLK#

BCLK_ITP

BCLK_ITP#

PEG_CLK

PEG_CLK#

DPLL_REF_SSCLK

DPLL_REF_SSCLK#

SM_DRAMRST#

SM_RCOMP[0] SM_RCOMP[1] SM_RCOMP[2]

PM_EXT_TS#[0] PM_EXT_TS#[1]

PRDY#

PREQ#

TCK TMS

TRST#

TDO

TDI_M

TDO_M

DBR#

BPM#[0] BPM#[1] BPM#[2] BPM#[3] BPM#[4] BPM#[5] BPM#[6] BPM#[7]

TDI

A16 B16

AR30 AT30

E16 D16

A18 A17

F6 AL1

AM1 AN1

AN15 AP15

AT28 AP27

AN28 AP28 AT27

AT29 AR27 AR29 AP29

AN25

AJ22 AK22 AK24 AJ24 AJ25 AH22 AK23 AH23

CK_BCK1 CK_BCK1_L

DDR3_DRAMRST_L

SM_RCOMP_0 SM_RCOMP_1 SM_RCOMP_2

PM_EXTTS_L0 PM_EXTTS_L1

Layout Note: All resistors need to be close to Processor (AUB/CFD) to avoid stubs

R69 0R0402R69 0R0402 R425 0R0402R425 0R0402

DDR3_DRAMRST_L (13,14)

XDP_TDI_R XDP_TDO_R XDP_TDI_M XDP_TDO_M

XDP_DBRESET_L

XDP_OBS0 XDP_OBS1 XDP_OBS2 XDP_OBS3 XDP_OBS4 XDP_OBS5 XDP_OBS6 XDP_OBS7

XDP_PRDY_L (11)

XDP_PREQ_L (11) XDP_TCLK (11)

XDP_TMS (11) XDP_TRST_L (11)

2

CLK_MCP_BCLK (20) CLK_MCP_BCLK_L (20)

BCLK_ITP BCLK_ITP_L

CLK_MCH_PEG (16) CLK_MCH_PEG_L (16)

CLK_DP_P (16) CLK_DP_N (16)

+V1.1S_VTT(6,7,11,20,21,22,34,40,41,42,43)

R3 10KR0402R310KR0402

R4 10KR0402R410KR0402

NO_STUFF

R5

R5 X_12.4KR1%0402

X_12.4KR1%0402

XDP_DBRESET_L (11,35) XDP_OBS[0:7] (11)

1

BCLK_ITP (11) BCLK_ITP_L (11)

PM_EXTTS_L0 (10) PM_EXTTS_L1 (10,13,14)

CAD Note: TCLK: Provide a scope test point at the Processor socket breakout via to verify signal integrity of the first platforms.

NO_STUFF

R7 X_51R1%0402R7 X_51R1%0402

XDP_TMS

R8 X_51R1%0402R8 X_51R1%0402

XDP_TDI_R XDP_PREQ_L

R9 X_51R1%0402R9 X_51R1%0402

R11 X_51R1%0402R11 X_51R1%0402

XDP_TCLK

+V1.1S_VTT(6,7,11,20,21,22,34,40,41,42,43)

B B

PM_DRAM_PWRGD

Processor Pullups

+V1.1S_VTT7,11,20,21,22,34,40,41,42,43

A A

R25

R26

5

68R0402

R26 X_68R0402

X_68R0402

NO_STUFF

49.9R1%0402

H_CATERR_L

H_PROCHOT_L

H_CPURST_L

R24

20R1%0402

Processor Compensation Signals

H_COMP3 H_COMP2

R20

R21

R21 20R1%0402

20R1%0402

+V3.3A(15,16,17,19,20,22,27,28,29,32,34,36,37,38,39,45,46)

R22

49.9R1%0402

R15

R15 2KR1%0402-1

2KR1%0402-1

R18

R18 1KR1%0402

1KR1%0402

4

H_COMP1

H_COMP0

R23

49.9R1%0402

DDR3 Compensation Signals

SM_RCOMP_2 SM_RCOMP_1 SM_RCOMP_0

R28

24.9R1%0402

R27

100R1%0402

3

R29

130R1%0402

Layout Note: Place these resistors near Processor

XDP_TDI_R

XDP_TDO_M

R12 0R0402R12 0R0402

R13 X_0R0402R13 X_0R0402

XDP_TDI (11)

XDP_TDO (11)

NO_STUFF

R16

R16 0R0402

0R0402

XDP_TDI_M

XDP_TDO_R

Scan Chain (Default)

CPU Only

GMCH Only

EMERALD BAY

Title

MCP (2 of 7)

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NO_STUFF

R17 X_0R0402R17 X_0R0402

R19 0R0402R19 0R0402

STUFF -> R2R13, R2D6, R3D13 NO STUFF -> R3D9, R2R9

STUFF -> R2R13, R3D9 NO STUFF -> R2D6, R2R9, R3D13

STUFF -> R2R9, R3D13 NO STUFF -> R2R13, R3D9, R2D6

2

XDP_TRST_L

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U1D

AM6 AN2

AM4 AM3

AN5 AN6

AN4 AN3

AN7

AR10 AT10

AF3 AG1 AJ3 AK1 AG4 AG3 AJ4 AH4 AK3 AK4

AK5 AK2

AP3 AT4

AT5 AT6

AP6 AP8 AT9 AT7 AP9

AB1

AC5 AC6

M1

M4

W5

B5 A5 C3 B3 E4 A6 A4 C4 D1 D2 F2 F1 C2 F5

F3 G4 H6 G2

J6

J3 G1 G5

J2

J1

J5 K2

L3 K5

K4 N5

R7

Y7

U1D

SB_DQ[0] SB_DQ[1] SB_DQ[2] SB_DQ[3] SB_DQ[4] SB_DQ[5] SB_DQ[6] SB_DQ[7] SB_DQ[8] SB_DQ[9] SB_DQ[10] SB_DQ[11] SB_DQ[12] SB_DQ[13] SB_DQ[14] SB_DQ[15] SB_DQ[16] SB_DQ[17] SB_DQ[18] SB_DQ[19] SB_DQ[20] SB_DQ[21] SB_DQ[22] SB_DQ[23] SB_DQ[24] SB_DQ[25] SB_DQ[26] SB_DQ[27] SB_DQ[28] SB_DQ[29] SB_DQ[30] SB_DQ[31] SB_DQ[32] SB_DQ[33] SB_DQ[34] SB_DQ[35] SB_DQ[36] SB_DQ[37] SB_DQ[38] SB_DQ[39] SB_DQ[40] SB_DQ[41] SB_DQ[42] SB_DQ[43] SB_DQ[44] SB_DQ[45] SB_DQ[46] SB_DQ[47] SB_DQ[48] SB_DQ[49] SB_DQ[50] SB_DQ[51] SB_DQ[52] SB_DQ[53] SB_DQ[54] SB_DQ[55] SB_DQ[56] SB_DQ[57] SB_DQ[58] SB_DQ[59] SB_DQ[60] SB_DQ[61] SB_DQ[62] SB_DQ[63]

SB_BS[0] SB_BS[1] SB_BS[2]

SB_CAS# SB_RAS# SB_WE#

W8

SB_CK[0]

W9

SB_CK#[0]

M3

SB_CKE[0]

V7

SB_CK[1]

V6

SB_CK#[1]

M2

SB_CKE[1]

AB8

SB_CS#[0]

AD6

SB_CS#[1]

AC7

SB_ODT[0]

AD1

SB_ODT[1]

M_B_DM0

D4

SB_DM[0] SB_DM[1] SB_DM[2] SB_DM[3] SB_DM[4] SB_DM[5] SB_DM[6] SB_DM[7]

SB_DQS#[0] SB_DQS#[1] SB_DQS#[2] SB_DQS#[3] SB_DQS#[4] SB_DQS#[5] SB_DQS#[6] SB_DQS#[7]

SB_DQS[0] SB_DQS[1] SB_DQS[2] SB_DQS[3] SB_DQS[4] SB_DQS[5] SB_DQS[6] SB_DQS[7]

DDR SYSTEM MEMORY - B

SB_MA[0] SB_MA[1] SB_MA[2] SB_MA[3] SB_MA[4] SB_MA[5] SB_MA[6] SB_MA[7] SB_MA[8]

SB_MA[9] SB_MA[10] SB_MA[11] SB_MA[12] SB_MA[13] SB_MA[14] SB_MA[15]

E1 H3 K1 AH1 AL2 AR4 AT8

D5 F4 J4 L4 AH2 AL4 AR5 AR8

C5 E3 H4 M5 AG2 AL5 AP5 AR7

U5 V2 T5 V3 R1 T8 R2 R6 R4 R5 AB5 P3 R3 AF7 P5 N1

M_B_DM1 M_B_DM2 M_B_DM3 M_B_DM4 M_B_DM5 M_B_DM6 M_B_DM7

M_B_DQS_L0 M_B_DQS_L1 M_B_DQS_L2 M_B_DQS_L3 M_B_DQS_L4 M_B_DQS_L5 M_B_DQS_L6 M_B_DQS_L7

M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7

M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15

M_CLK_DDR2 (14) M_CLK_DDR2_L (14) M_CKE2 (14)

M_CLK_DDR3 (14) M_CLK_DDR3_L (14) M_CKE3 (14)

M_CS_L2 (14) M_CS_L3 (14)

M_ODT2 (14) M_ODT3 (14)

M_B_DM[7:0] (14)

M_B_DQS_L[7:0] (14)

M_B_DQS[7:0] (14)

M_B_A[15:0] (14)

U1C

M_B_DQ[63:0](14)

D D

C C

B B

M_A_DQ[63:0](13)

M_A_BS0(13) M_A_BS1(13) M_A_BS2(13)

M_A_CAS_L(13) M_A_RAS_L(13) M_A_WE_L(13)

M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4

M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63

M_A_CAS_L M_A_RAS_L M_A_WE_L

AJ10 AL10

AK12

AK11

AM10 AR11

AL11

AT11

AP12 AM12 AN12 AM13

AT14

AT12

AL13 AR14

AP14

A10 C10

B10 D10 E10

H10

G10

AH5 AF5 AK6 AK7 AF6 AG5

AK8 AL7

AL8 AN8

AM9 AN9

AC3 AB2

AE1 AB3 AE9

F10

J10

AJ7 AJ6

AJ9

C7 A7

A8 D8

E6 F7 E9 B7 E7 C6

G8 K7 J8 G7

J7

L7 M6 M8

L9

L6

K8 N8

P9

U7

SA_DQ[0] SA_DQ[1] SA_DQ[2] SA_DQ[3] SA_DQ[4] SA_DQ[5] SA_DQ[6] SA_DQ[7] SA_DQ[8] SA_DQ[9] SA_DQ[10] SA_DQ[11] SA_DQ[12] SA_DQ[13] SA_DQ[14] SA_DQ[15] SA_DQ[16] SA_DQ[17] SA_DQ[18] SA_DQ[19] SA_DQ[20] SA_DQ[21] SA_DQ[22] SA_DQ[23] SA_DQ[24] SA_DQ[25] SA_DQ[26] SA_DQ[27] SA_DQ[28] SA_DQ[29] SA_DQ[30] SA_DQ[31] SA_DQ[32] SA_DQ[33] SA_DQ[34] SA_DQ[35] SA_DQ[36] SA_DQ[37] SA_DQ[38] SA_DQ[39] SA_DQ[40] SA_DQ[41] SA_DQ[42] SA_DQ[43] SA_DQ[44] SA_DQ[45] SA_DQ[46] SA_DQ[47] SA_DQ[48] SA_DQ[49] SA_DQ[50] SA_DQ[51] SA_DQ[52] SA_DQ[53] SA_DQ[54] SA_DQ[55] SA_DQ[56] SA_DQ[57] SA_DQ[58] SA_DQ[59] SA_DQ[60] SA_DQ[61] SA_DQ[62] SA_DQ[63]

SA_BS[0] SA_BS[1] SA_BS[2]

SA_CAS# SA_RAS# SA_WE#

DDR SYSTEM MEMORY A

SA_CK[0] SA_CK#[0] SA_CKE[0]

SA_CK[1] SA_CK#[1] SA_CKE[1]

SA_CS#[0] SA_CS#[1]

SA_ODT[0] SA_ODT[1]

SA_DM[0]

SA_DM[1]

SA_DM[2]

SA_DM[3]

SA_DM[4]

SA_DM[5]

SA_DM[6]

SA_DM[7]

SA_DQS#[0] SA_DQS#[1] SA_DQS#[2] SA_DQS#[3] SA_DQS#[4] SA_DQS#[5] SA_DQS#[6] SA_DQS#[7]

SA_DQS[0] SA_DQS[1] SA_DQS[2] SA_DQS[3] SA_DQS[4] SA_DQS[5] SA_DQS[6] SA_DQS[7]

SA_MA[0]

SA_MA[1]

SA_MA[2]

SA_MA[3]

SA_MA[4]

SA_MA[5]

SA_MA[6]

SA_MA[7]

SA_MA[8]

SA_MA[9] SA_MA[10] SA_MA[11] SA_MA[12] SA_MA[13] SA_MA[14] SA_MA[15]

AA6 AA7 P7

Y6 Y5 P6

AE2 AE8

AD8 AF9

B9 D7 H7 M7 AG6 AM7 AN10 AN13

C9 F8 J9 N9 AH7 AK9 AP11 AT13

C8 F9 H9 M9 AH8 AK10 AN11 AR13

Y3 W1 AA8 AA3 V1 AA9 V8 T1 Y9 U6 AD4 T2 U3 AG8 T3 V9

M_CKE0

M_CKE1M_A_DQ5

M_A_DM0 M_A_DM1 M_A_DM2 M_A_DM3 M_A_DM4 M_A_DM5 M_A_DM6 M_A_DM7

M_A_DQS_L0 M_A_DQS_L1 M_A_DQS_L2 M_A_DQS_L3 M_A_DQS_L4 M_A_DQS_L5 M_A_DQS_L6 M_A_DQS_L7

M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15

M_CLK_DDR0 (13) M_CLK_DDR0_L (13) M_CKE0 (13)

M_CLK_DDR1 (13) M_CLK_DDR1_L (13) M_CKE1 (13)

M_CS_L0 (13) M_CS_L1 (13)

M_ODT0 (13) M_ODT1 (13)

M_A_DM[7:0] (13)

M_A_DQS_L[7:0] (13)

M_A_DQS[7:0] (13)

M_A_A[15:0] (13)

M_B_BS0(14) M_B_BS1(14) M_B_BS2(14)

M_B_CAS_L(14) M_B_RAS_L(14) M_B_WE_L(14)

M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63

M_B_CAS_L M_B_RAS_L M_B_WE_L

IC,AUB_CFD_rPGA,R0P9

A A

5

4

3

IC,AUB_CFD_rPGA,R0P9

Intel Confidential

EMERALD BAY

Title

MCP (3 of 7)

Size Document Number Rev

A

Date: Sheet

2

Intel Confidential

of

553Thursday, September 25, 2008

1

A

5

4

3

2

1

AUBURNDALE/CLARKSFIELD PROCESSOR (POWER)

U1F

+VCC_CORE(42,43)

AG35

VCC1

AG34

VCC2

AG33

VCC3

D D

C C

B B

A A

AG32

VCC4

AG31

VCC5

AG30

VCC6

AG29

VCC7

AG28

VCC8

AG27

VCC9

AG26

VCC10

AF35

VCC11

AF34

VCC12

AF33

VCC13

AF32

VCC14

AF31

VCC15

AF30

VCC16

AF29

VCC17

AF28

VCC18

AF27

VCC19

AF26

VCC20

AD35

VCC21

AD34

VCC22

AD33

VCC23

AD32

VCC24

AD31

VCC25

AD30

VCC26

AD29

VCC27

AD28

VCC28

AD27

VCC29

AD26

VCC30

AC35

VCC31

AC34

VCC32

AC33

VCC33

AC32

VCC34

AC31

VCC35

AC30

VCC36

AC29

VCC37

AC28

VCC38

AC27

VCC39

AC26

VCC40

AA35

VCC41

AA34

VCC42

AA33

VCC43

AA32

VCC44

AA31

VCC45

AA30

VCC46

AA29

VCC47

AA28

VCC48

AA27

VCC49

AA26

VCC50

Y35

VCC51

Y34

VCC52

Y33

VCC53

Y32

VCC54

Y31

VCC55

Y30

VCC56

Y29

VCC57

Y28

VCC58

Y27

VCC59

Y26

VCC60

V35

VCC61

V34

VCC62

V33

VCC63

V32

VCC64

V31

VCC65

V30

VCC66

V29

VCC67

V28

VCC68

V27

VCC69

V26

VCC70

U35

VCC71

U34

VCC72

U33

VCC73

U32

VCC74

U31

VCC75

U30

VCC76

U29

VCC77

U28

VCC78

U27

VCC79

U26

VCC80

R35

VCC81

R34

VCC82

R33

VCC83

R32

VCC84

R31

VCC85

R30

VCC86

R29

VCC87

R28

VCC88

R27

VCC89

R26

VCC90

P35

VCC91

P34

VCC92

P33

VCC93

P32

VCC94

P31

VCC95

P30

VCC96

P29

VCC97

P28

VCC98

P27

VCC99

P26

VCC100

IC,AUB_CFD_rPGA,R0P9

CPU CORE SUPPLY

POWER

1.1V RAIL POWER

PROC_DPRSLPVR

CPU VIDS

VTT_SELECT

VCC_SENSE VSS_SENSE

VTT_SENSE

VSS_SENSE_VTT

SENSE LINES

VTT0_1 VTT0_2 VTT0_3 VTT0_4 VTT0_5 VTT0_6 VTT0_7 VTT0_8

VTT0_9 VTT0_10 VTT0_11 VTT0_12 VTT0_13 VTT0_14 VTT0_15 VTT0_16 VTT0_17 VTT0_18 VTT0_19 VTT0_20 VTT0_21 VTT0_22 VTT0_23 VTT0_24 VTT0_25 VTT0_26 VTT0_27 VTT0_28 VTT0_29 VTT0_30 VTT0_31 VTT0_32

VTT0_33 VTT0_34 VTT0_35 VTT0_36 VTT0_37 VTT0_38 VTT0_39 VTT0_40 VTT0_41 VTT0_42 VTT0_43 VTT0_44

VID[0] VID[1] VID[2] VID[3] VID[4] VID[5] VID[6]

ISENSE

PSI#

5

AH14 AH12 AH11 AH10 J14 J13 H14 H12 G14 G13 G12 G11 F14 F13 F12 F11 E14 E12 D14 D13 D12 D11 C14 C13 C12 C11 B14 B12 A14 A13 A12 A11

AF10 AE10 AC10 AB10 Y10 W10 U10 T10 J12 J11 J16 J15

AN33

AK35 AK33 AK34 AL35 AL33 AM33 AM35

PM_DPRSLPVR_R

AM34

G15

AN35

AJ34 AJ35

B15

TP_VSS_SENSE_VTT

A15

+V1.1S_VCCTT(4,7,11,20,21,22,34,40,41,42,43)

PSI_L

H_VID0 H_VID1 H_VID2 H_VID3 H_VID4 H_VID5 H_VID6

H_VTTVID1

TP_VTT_SENSE

C2

C1

C10u6.3X50805-RH-2C2C10u6.3X50805-RH-2

C10u6.3X50805-RH-2C1C10u6.3X50805-RH-2

C13

C13 C22u6.3X50805-RH

C22u6.3X50805-RH

PSI_L (42) H_VID[0:6] (42)

R32 0R0402R32 0R0402

IMVP_IMON (42)

TP7TP7

TP8TP8

+VTT_43 +VTT_44

H_VTTVID1 (40)

+VCC_CORE(42,43)

4

C4

C10u6.3X50805-RH-2C4C10u6.3X50805-RH-2

R33

R33 100R0402

100R0402

R34

R34 100R0402

100R0402

C3

C14

C14 C22u6.3X50805-RH

C22u6.3X50805-RH

C6

C10u6.3X50805-RH-2C3C10u6.3X50805-RH-2

C10u6.3X50805-RH-2C6C10u6.3X50805-RH-2

R30 0R0402R30 0R0402 R31 0R0402R31 0R0402

PM_DPRSLPVR (42)

VCCSENSE (42) VSSSENSE (42)

C7

C5

C10u6.3X50805-RH-2C5C10u6.3X50805-RH-2

+V1.1S_VTT(4,7,11,20,21,22,34,40,41,42,43)

C8

C10u6.3X50805-RH-2C7C10u6.3X50805-RH-2

X_C10u6.3X50805-RH-2C8X_C10u6.3X50805-RH-2

+VCC_CORE(42,43)

+V1.1S_VTT(4,7,11,20,21,22,34,40,41,42,43)

NO_STUFF

C505

C505 C22u6.3X50805-RH

C22u6.3X50805-RH

C521

C521 C10u6.3X50805-RH-3

C10u6.3X50805-RH-3

+VCC_CORE(42,43)

C506

C506 C22u6.3X50805-RH

C22u6.3X50805-RH

C522

C522 C10u6.3X50805-RH-3

C10u6.3X50805-RH-3

C533

C533 C10u6.3X50805-RH-3

C10u6.3X50805-RH-3

3

C507

C507 C22u6.3X50805-RH

C22u6.3X50805-RH

C523

C523 C10u6.3X50805-RH-3

C10u6.3X50805-RH-3

C534

C534 C10u6.3X50805-RH-3

C10u6.3X50805-RH-3

22u*12

C508

C508 C22u6.3X50805-RH

C22u6.3X50805-RH

C524

C524 C10u6.3X50805-RH-3

C10u6.3X50805-RH-3

C535

C535 C10u6.3X50805-RH-3

C10u6.3X50805-RH-3

C509

C509 C22u6.3X50805-RH

C22u6.3X50805-RH

C525

C525 C10u6.3X50805-RH-3

C10u6.3X50805-RH-3

C536

C536 C10u6.3X50805-RH-3

C10u6.3X50805-RH-3

C513

C510

C510 C22u6.3X50805-RH

C22u6.3X50805-RH

C511

C511 C22u6.3X50805-RH

C22u6.3X50805-RH

C512

C512 C22u6.3X50805-RH

C22u6.3X50805-RH

C513 C22u6.3X50805-RH

C22u6.3X50805-RH

C514

C514 C22u6.3X50805-RH

C22u6.3X50805-RH

10u*16

C528

C527

C526

C526 C10u6.3X50805-RH-3

C10u6.3X50805-RH-3

C527 C10u6.3X50805-RH-3

C10u6.3X50805-RH-3

EMERALD BAY

Title

Size Document Number Rev

Custom

Date: Sheet

2

C528 C10u6.3X50805-RH-3

C10u6.3X50805-RH-3

MCP (4 of 7)

C529

C529 C10u6.3X50805-RH-3

C10u6.3X50805-RH-3

C530

C530 C10u6.3X50805-RH-3

C10u6.3X50805-RH-3

C515

C515 C22u6.3X50805-RH

C22u6.3X50805-RH

C531

C531 C10u6.3X50805-RH-3

C10u6.3X50805-RH-3

653Thursday, September 25, 2008

1

Intel Confidential

of

C516

C516 C22u6.3X50805-RH

C22u6.3X50805-RH

C532

C532 C10u6.3X50805-RH-3

C10u6.3X50805-RH-3

A

5

4

3

2

1

AUBURNDALE/CLARKSFIELD PROCESSOR (GRAPHICS POWER)

C22u6.3X50805-RH

C40

C22u6.3X50805-RH

C22

C10u6.3X50805-RH-2

C35

C22u6.3X50805-RH

+V1.1S_VCC_PEG_DMI(4,6,11,20,21,22,34,40,41,42,43)

+VGFX_CORE(41,43)

C23

C10u6.3X50805-RH-2

AT21 AT19 AT18 AT16 AR21 AR19 AR18 AR16 AP21 AP19 AP18 AP16 AN21 AN19 AN18

AN16 AM21 AM19 AM18 AM16

AL21

AL19

AL18

AL16

AK21

AK19

AK18

AK16

AJ21

AJ19

AJ18

AJ16 AH21 AH19 AH18 AH16

U1G

VAXG1 VAXG2 VAXG3 VAXG4 VAXG5 VAXG6 VAXG7 VAXG8 VAXG9 VAXG10 VAXG11 VAXG12 VAXG13 VAXG14 VAXG15 VAXG16 VAXG17 VAXG18 VAXG19 VAXG20 VAXG21 VAXG22 VAXG23 VAXG24 VAXG25 VAXG26 VAXG27 VAXG28 VAXG29 VAXG30 VAXG31 VAXG32 VAXG33 VAXG34 VAXG35 VAXG36

J24

VTT1_45

J23

VTT1_46

H25

VTT1_47

K26

VTT1_48

J27

VTT1_49

J26

VTT1_50

J25

VTT1_51

H27

VTT1_52

G28

VTT1_53

G27

VTT1_54

G26

VTT1_55

F26

VTT1_56

E26

VTT1_57

E25

VTT1_58

GRAPHICS

FDI PEG & DMI

POWER

VAXG_SENSE

VSSAXG_SENSE

SENSE

LINES

SENSE

LINES

GFX_VR_EN

GFX_DPRSLPVR

GRAPHICS VIDs

DDR3 - 1.5V RAILS

1.1V1.8V

GFX_VID[0] GFX_VID[1] GFX_VID[2] GFX_VID[3] GFX_VID[4] GFX_VID[5] GFX_VID[6]

GFX_IMON

VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8

VDDQ9 VDDQ10 VDDQ11 VDDQ12 VDDQ13 VDDQ14 VDDQ15 VDDQ16 VDDQ17 VDDQ18

VTT0_59 VTT0_60 VTT0_61 VTT0_62

VTT1_63 VTT1_64 VTT1_65 VTT1_66 VTT1_67 VTT1_68

VCCPLL1 VCCPLL2 VCCPLL3

AR22 AT22

AM22 AP22 AN22 AP23 AM23 AP24 AN24

AR25

GFXVR_DPRSLPVR_R

AT25 AM24

AJ1 AF1 AE7 AE4 AC1 AB7 AB4 Y1 W7 W4 U1 T7 T4 P1 N7 N4 L1 H1

P10 N10 L10 K10

J22 J20

+V1.1S_VCC_SA (4,6,11,20,21,22,34,40,41,42,43) +V1.1S_VTT(4,6,11,20,21,22,34,40,41,42,43)

J18 H21 H20 H19

+V1.8S_VCCSFR (21,26,40,43,46,48) +V1.8S(21,26,40,43,46,48)

L26 L27 M26

VCC_AXG_SENSE (41) VSS_AXG_SENSE (41)

GFXVR_VID_0 (41) GFXVR_VID_1 (41) GFXVR_VID_2 (41) GFXVR_VID_3 (41) GFXVR_VID_4 (41) GFXVR_VID_5 (41) GFXVR_VID_6 (41)

GFXVR_EN

R35 0R0402R35 0R0402

C26

C27

C1u10X50402-RH

C44

C45

C1u10X50402-RH

C28

C1u10X50402-RH

C46

GFXVR_EN (46) GFXVR_DPRSLPVR (41)

GFXVR_IMON (41)

C29

C30

C31

C1u10X50402-RH

C31

C22u6.3X50805-RH

C1u10X50402-RH

C47

C2.2u6.3X5

C4.7u6.3X5-1

GFXVR_EN

C32

C22u6.3X50805-RH

C48

C48 C22u6.3X50805-RH

C22u6.3X50805-RH

+

12

R591 X_4.7KR0402R591 X_4.7KR0402

NO_STUFF

+V1.5(13,14,39,43,45)

EC40

EC40 C330u2.5SO-RH

C330u2.5SO-RH

+V1.1S_VTT(4,6,11,20,21,22,34,40,41,42,43)+V1.1S_VCCTTA_DDR(4,6,11,20,21,22,34,40,41,42,43)

D D

+VCC_GFXCORE (41,43)

+

12

EC24

EC24 C330u2.5SO-RH

C330u2.5SO-RH

+

12

EC25

EC25 C330u2.5SO-RH

C330u2.5SO-RH

+

12

EC26

EC26 X_C330u2.5SO-RH

X_C330u2.5SO-RH

C21

C22u6.3X50805-RH

NO_STUFF

C15

C22u6.3X50805-RH

C C

+V1.1S_VTT(4,6,11,20,21,22,34,40,41,42,43) +V1.1S_VCC_FDI(4,6,11,20,21,22,34,40,41,42,43)

C34

+V1.1S_VTT(4,6,11,20,21,22,34,40,41,42,43)

C39

C38

C22u6.3X50805-RH

B B

C22u6.3X50805-RH

IC,AUB_CFD_rPGA,R0P9

+VCC_GFXCORE(41,43)

C470

C467

C467 C10u6.3X50805-RH-3

C10u6.3X50805-RH-3

A A

5

4

C470 C10u6.3X50805-RH-3

C10u6.3X50805-RH-3

3

Intel Confidential

EMERALD BAY

Title

MCP (5 of 7)

Size Document Number Rev

A

Date: Sheet

2

Intel Confidential

of

753Thursday, September 25, 2008

1

A

5

4

3

2

1

AUBURNDALE/CLARKSFIELD PROCESSOR (GND)

D D

C C

B B

AT20 AT17 AR31 AR28 AR26 AR24 AR23 AR20 AR17 AR15 AR12

AR9 AR6

AR3 AP20 AP17 AP13 AP10

AP7

AP4

AP2 AN34 AN31 AN23 AN20 AN17 AM29 AM27 AM25 AM20 AM17 AM14 AM11

AM8

AM5

AM2

AL34 AL31 AL23 AL20 AL17 AL12

AL9

AL6

AL3 AK29 AK27 AK25 AK20 AK17

AJ31 AJ23 AJ20 AJ17 AJ14 AJ11

AH35 AH34 AH33 AH32 AH31 AH30 AH29 AH28 AH27 AH26 AH20 AH17 AH13

AH9

AH6

AH3 AG10

AF8

AF4

AF2 AE35

U1H

VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56

AJ8

VSS57

AJ5

VSS58

AJ2

VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80

VSS

VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98

VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158 VSS159 VSS160

AE34 AE33 AE32 AE31 AE30 AE29 AE28 AE27 AE26 AE6 AD10 AC8 AC4 AC2 AB35 AB34 AB33 AB32 AB31 AB30 AB29 AB28 AB27 AB26 AB6 AA10 Y8 Y4 Y2 W35 W34 W33 W32 W31 W30 W29 W28 W27 W26 W6 V10 U8 U4 U2 T35 T34 T33 T32 T31 T30 T29 T28 T27 T26 T6 R10 P8 P4 P2 N35 N34 N33 N32 N31 N30 N29 N28 N27 N26 N6 M10 L35 L32 L29 L8 L5 L2 K34 K33 K30

U1I

K27

VSS161

K9

VSS162

K6

VSS163

K3

VSS164

J32

VSS165

J30

VSS166

J21

VSS167

J19

VSS168

H35

VSS169

H32

VSS170

H28

VSS171

H26

VSS172

H24

VSS173

H22

VSS174

H18

VSS175

H15

VSS176

H13

VSS177

H11

VSS178

H8

VSS179

H5

VSS180

H2

VSS181

G34

VSS182

G31

VSS183

G20

VSS184

G9

VSS185

G6

VSS186

G3

VSS187

F30

VSS188

F27

VSS189

F25

VSS190

F22

VSS191

F19

VSS192

F16

VSS193

E35

VSS194

E32

VSS195

E29

VSS196

E24

VSS197

E21

VSS198

E18

VSS199

E13

VSS200

E11

VSS201

E8

VSS202

E5

VSS203

E2

VSS204

D33

VSS205

D30

VSS206

D26

VSS207

D9

VSS208

D6

VSS209

D3

VSS210

C34

VSS211

C32

VSS212

C29

VSS213

C28

VSS214

C24

VSS215

C22

VSS216

C20

VSS217

C19

VSS218

C16

VSS219

B31

VSS220

B25

VSS221

B21

VSS222

B18

VSS223

B17

VSS224

B13

VSS225

B11

VSS226

B8

VSS227

B6

VSS228

B4

VSS229

A29

VSS230

A27

VSS231

A23

VSS232

A9

VSS233

VSS

NCTF

VSS_NCTF1 VSS_NCTF2 VSS_NCTF3 VSS_NCTF4 VSS_NCTF5 VSS_NCTF6 VSS_NCTF7

TP_MCP_VSS_NCTF1

AT35

TP_MCP_VSS_NCTF2

AT1 AR34 B34 B2

TP_MCP_VSS_NCTF6

B1

TP_MCP_VSS_NCTF7

A35

TP10TP10 TP11TP11

TP12TP12 TP13TP13

IC,AUB_CFD_rPGA,R0P9

A A

5

4

3

EMERALD BAY

Title

Size Document Number Rev

A

Date: Sheet

IC,AUB_CFD_rPGA,R0P9

MCP (6 of 7)

2

Intel Confidential

A

of

853Thursday, September 25, 2008

1

5

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1

AUBURNDALE/CLARKSFIELD PROCESSOR (RESERVED)

U1E

RSVD32

TP14TP14

TP_RSVD1 TP_RSVD2

TP15TP15

TP_RSVD3

TP16TP16 TP17TP17

D D

CFG7

M_VREF_DQ_DIMM0(13) M_VREF_DQ_DIMM1(14)

R663

3KR0402

M_VREF_DQ_DIMM0 M_VREF_DQ_DIMM1

R585 X_0RR585 X_0R R586 X_0RR586 X_0R

TP_RSVD9 TP_RSVD10

CFG[0:18](11,12)

TP18TP18 TP19TP19 TP20TP20 TP21TP21

TP24TP24 TP25TP25 TP26TP26 TP27TP27

TP_RSVD4 TP_RSVD5 TP_RSVD6 TP_RSVD7 TP_RSVD8

TP_RSVD11 TP_RSVD12 TP_RSVD13 TP_RSVD14

C C

TP28TP28

R39 0R0402R39 0R0402 R38 0R0402R38 0R0402

B B

TP29TP29

TP30TP30 TP31TP31

TP32TP32 TP33TP33

TP34TP34 TP35TP35

TP36TP36 TP37TP37

TP38TP38 TP39TP39

TP40TP40 TP41TP41

TP_RSVD15 TP_RSVD16

H_RSVD17_R H_RSVD18_R

TP_RSVD19 TP_RSVD20

TP_RSVD21 TP_RSVD22

TP_RSVD24

TP_RSVD26 TP_RSVD27

TP_RSVD28 TP_RSVD29

TP_RSVD30 TP_RSVD31

CFG0 CFG1 CFG2 CFG3 CFG4 CFG5 CFG6 CFG7 CFG8 CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15 CFG16 CFG17 CFG18

AP25

AL25 AL24 AL22 AJ33

AG9 M27

H17 G25 G17

AM30 AM28 AP31

AL32

AL30 AM31 AN29 AM32 AK32 AK31 AK28

AJ28 AN30 AN32

AJ32

AJ29

AJ30 AK30

L28

J17

E31 E30

H16

B19 A19

A20 B20

U9 T9

AC9 AB9

C1 A3

J29 J28

A34 A33

C35 B35

RSVD1 RSVD2 RSVD3 RSVD4 RSVD5 RSVD6 RSVD7 RSVD8 RSVD9 RSVD10 RSVD11 RSVD12 RSVD13 RSVD14

CFG[0] CFG[1] CFG[2] CFG[3] CFG[4] CFG[5] CFG[6] CFG[7] CFG[8] CFG[9] CFG[10] CFG[11] CFG[12] CFG[13] CFG[14] CFG[15] CFG[16] CFG[17] RSVD_TP_86

RSVD15 RSVD16

RSVD17 RSVD18

RSVD19 RSVD20

RSVD21 RSVD22

RSVD_NCTF_23 RSVD_NCTF_24

RSVD26 RSVD27

RSVD_NCTF_28 RSVD_NCTF_29

RSVD_NCTF_30 RSVD_NCTF_31

RESERVED

RSVD33

RSVD34 RSVD35

RSVD36

RSVD_NCTF_37

RSVD38 RSVD39

RSVD_NCTF_40 RSVD_NCTF_41

RSVD_NCTF_42 RSVD_NCTF_43

RSVD45 RSVD46 RSVD47 RSVD48 RSVD49 RSVD50 RSVD51 RSVD52

RSVD53 RSVD_NCTF_54 RSVD_NCTF_55 RSVD_NCTF_56 RSVD_NCTF_57

RSVD58

RSVD_TP_59 RSVD_TP_60

KEY RSVD62 RSVD63 RSVD64 RSVD65

RSVD_TP_66 RSVD_TP_67 RSVD_TP_68 RSVD_TP_69 RSVD_TP_70 RSVD_TP_71 RSVD_TP_72 RSVD_TP_73 RSVD_TP_74 RSVD_TP_75

RSVD_TP_76 RSVD_TP_77 RSVD_TP_78 RSVD_TP_79 RSVD_TP_80 RSVD_TP_81 RSVD_TP_82 RSVD_TP_83 RSVD_TP_84 RSVD_TP_85

VSS

AJ13 AJ12

AH25 AK26

AL26 AR2

AJ26 AJ27

AP1 AT2

AT3 AR1

AL28 AL29 AP30 AP32 AL27 AT31 AT32 AP33 AR33 AT33 AT34 AP35 AR35 AR32

E15 F15 A2 D15 C15 AJ15 AH15

AA5 AA4 R8 AD3 AD2 AA2 AA1 R9 AG7 AE3

V4 V5 N2 AD5 AD7 W3 W2 N3 AE5 AD9

AP34

TP_RSVD32 TP_RSVD33

TP_RSVD34 TP_RSVD35

TP_RSVD36 TP_RSVD37

TP_RSVD38 TP_RSVD39

TP_RSVD40 TP_RSVD41

TP_RSVD42 TP_RSVD43

TP_RSVD45 TP_RSVD46 TP_RSVD47 TP_RSVD48 TP_RSVD49 TP_RSVD50 TP_RSVD51 TP_RSVD52 TP_RSVD53 TP_RSVD54 TP_RSVD55 TP_RSVD56 TP_RSVD57 TP_RSVD58

TP_RSVD59 TP_RSVD60 TP_RSVD61 TP_RSVD62 TP_RSVD63 RSVD64_R RSVD65_R

TP_RSVD66 TP_RSVD67 TP_RSVD68 TP_RSVD69 TP_RSVD70 TP_RSVD71 TP_RSVD72 TP_RSVD73 TP_RSVD74 TP_RSVD75TP_RSVD23

TP_RSVD76 TP_RSVD77 TP_RSVD78 TP_RSVD79 TP_RSVD80 TP_RSVD81 TP_RSVD82 TP_RSVD83 TP_RSVD84 TP_RSVD85

TP_RSVD86

TP62TP62

TP82TP82 TP83TP83

TP84TP84 TP85TP85

TP86TP86 TP87TP87

TP88TP88 TP89TP89

TP91TP91 TP90TP90

TP92TP92 TP93TP93

TP72TP72 TP71TP71 TP64TP64 TP63TP63 TP65TP65 TP66TP66 TP69TP69 TP70TP70 TP67TP67 TP68TP68 TP73TP73 TP74TP74 TP75TP75 TP76TP76

TP77TP77 TP78TP78 TP79TP79 TP80TP80

TP81TP81 R37 0R0402R37 0R0402 R36 0R0402R36 0R0402

TP42TP42

TP43TP43

TP45TP45

TP44TP44

TP47TP47

TP46TP46

TP53TP53

TP52TP52

TP49TP49

TP48TP48

TP50TP50

TP51TP51

TP59TP59

TP58TP58

TP55TP55

TP54TP54

TP56TP56

TP57TP57

TP60TP60

TP61TP61

IC,AUB_CFD_rPGA,R0P9

A A

5

4

3

EMERALD BAY

Title

MCP (7 of 7)

Size Document Number Rev

A

Date: Sheet

2

Intel Confidential

A

of

953Thursday, September 25, 2008

1

5

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1

On Board DDR3 Thermal Sensor

+V3.3S (11,13,14,15,16,17,19,20,21,22,24,25,26,29,30,31,34,35,36,37,40,41,42,43,45,46,49,50)

U2

EC35

U2

1

VDD

2

D+

3

D-

4

THERM

SNSR-ADM1032ARMZ-REEL7-RH

Layout Note: Place U3F1 under DIMM 0

+V12S(16,25,30,31,37,39,43)

C627 C4.7u16X0805-RHC627 C4.7u16X0805-RH

NO_STUFF

DS

R647

G

R647 X_0R0805

X_0R0805

+

12

SCLK SDATA ALERT

GND

CPU_PFAN

8 7 6 5

SMB_CLK_S3 SMB_DATA_S3 PM_EXTTS_L1

D24

1N4148WS-7-F_SOD323-RH

FAN1

4 3 2 1

BH1X4B-FR_WHITE

FAN2

4 3 2 1

BH1X4B-FR_WHITE

D24

F_PWM04

MEC1

SMB_CLK_S3 (11,13,14,16,34,35,36,37,39) SMB_DATA_S3 (11,13,14,16,34,35,36,37,39) PM_EXTTS_L1 (4,13,14)

+V12S(16,25,30,31,37,39,43)

R40

4.7KR0402

R41

27KR1%0402-RH

R42

R42 10KR1%0402

10KR1%0402

CPU_TACHO_FAN

C50

C50 X_C0.047u16Y0402

X_C0.047u16Y0402

CPU_TACHO_FAN (36)

NO_STUFF

Layout Note: Place Q1 near minicard

D D

PM_EXTTS_L0(4)

CPU Fan Power Control

C49

C0.1u16Y0402

C C

CPU_PWM_FAN(36)

C0.1u16Y0402

CPU_PWM_FAN

+V12S(16,25,30,31,37,39,43)

U46A

3

+

1

2

-

LM358DR2G_SOIC8

4 8

R600

R599

3.9KR1%0402

NO_STUFF

R600

10KR1%0402

CPU_PFAN

F_PWM02 F_PWM03

R646 X_100R0402R646 X_100R0402

N-SST3904_SOT23

E

B

C

Q1

F_PWM01

DDR_THERM1

DDR_THERM2

PM_EXTTS_L0

Q85

P-P1604EDG_TO252-RH

CD100u16EL5-RH

PWM FAN : Stuff R646,R647

B B

No Stuff U46,R600,R599,Q85

System Fan Control

+V12S(16,25,30,31,37,39,43)

U46B

5

+

SYS_PWM_FAN(36)

SYS_PWM_FAN

+

6

-

LM358DR2G_SOIC8

4 8

R601

R602

3.9KR1%0402

R601

10KR1%0402

F_PWM06 F_PWM07

F_PWM05

7

P-FDS6679_SOIC8

CD100u16EL5-RH

A A

NO_STUFF

R648 X_100R0402R648 X_100R0402

SYS_PFANSYS_PWM_FAN

PWM FAN : Stuff R648,R649

No Stuff U46,R601,R602,Q87

5

4

+V12S(16,25,30,31,37,39,43)

C628 C4.7u16X0805-RHC628 C4.7u16X0805-RH

1N4148WS-7-F_SOD323-RH

4

3

1

R649

Q87

7 2

685

+

12

EC36

R649 X_0R0805

X_0R0805

NO_STUFF

1N4148WS-7-F_SOD323-RH

SYS_PFAN

D25

FAN3

4 3 2 1

3

+V12S(16,25,30,31,37,39,43)

MEC1

BH1X4B_BROWN-RH

R43

4.7KR0402

R44

27KR1%0402-RH

EMERALD BAY

Title

Size Document Number Rev

A

Date: Sheet

SYS_TACHO_FANF_PWM08

R45

R45 10KR1%0402

10KR1%0402

FAN HEADERS

2

C52

C52 X_C0.047u16Y0402

X_C0.047u16Y0402

NO_STUFF

SYS_TACHO_FAN (36)

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1 3 5 7

9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61

XDP

J1

VSS BPM5# BPM4# VSS BPM3# BPM2# VSS BPM1# BPM0# VSS BPM5#1 BPM4#1 VSS BPM3#1 BPM2#1 VSS BPM1#1 BPM0#1 VSS PWRGD NC1 VTT NC2 NC3 VSS SDA SCL TCK1 TCK0 VSS 61

X_BTB60PF-RH

VSS NC4 NC5 VSS NC6 NC7 VSS NC8 NC9

VSS NC10 NC11

VSS NC12 NC13

VSS NC14 NC15

VSS

ITP_CLKP ITP_CLKN

VTT

RESET_IN#

RESET_OUT#

VSS

TDO

TRST#

TMS

VSS

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56

TDI

58 60 62

62

XDP_RST_R

CFG8 (9) CFG9 (9)

CFG0 (9,12) CFG1 (9)

CFG2 (9) CFG3 (9,12)

CFG10 (9) CFG11 (9)

CFG4 (9,12) CFG5 (9)

CFG6 (9) CFG7 (9)

R51 1KR0402R51 1KR0402

XDP_TRST_L (4) XDP_TDI (4) XDP_TMS (4)

R53 X_0R0402R53 X_0R0402

T-spec req#100: Default is CPURST# routed to XDP. Would like a stuff option to have PLTRST routed to XDP instead.

XDP_DBRESET_L(4,35) PM_SYSRST_L (17,44)

NO_STUFF

BCLK_ITP (4) BCLK_ITP_L (4)

+V1.1S_VTT(4,6,7,20,21,22,34,40,41,42,43)

NO_STUFF

C54

C54 X_C0.1u16Y0402

X_C0.1u16Y0402

H_CPURST_L (4)

PLT_RST_L (19,29,32,35,36,37,45,50)

NO_STUFF

R63 0R0402R63 0R0402 R64 X_0R0402R64 X_0R0402

NO_STUFF

+V3.3S (10,13,14,15,16,17,19,20,21,22,24,25,26,29,30,31,34,35,36,37,40,41,42,43,45,46,49,50)

R48

R62

R62 X_1KR0402

X_1KR0402

R48 1KR0402

1KR0402

R47

R47 51R1%0402

51R1%0402

+V3.3S(10,13,14,15,16,17,19,20,21,22,24,25,26,29,30,31,34,35,36,37,40,41,42,43,45,46,49,50)

XDP_DBRESET_L (4,35)

XDP_TDO (4)

Note: Provision for XDP_DBRESET# to toggle both PM_SYSRST# & Delay VR Powergood

Default: DBRESET toggles PM_SYSRST# Stuff - R6D1, R7P3 (page#23), No-Stuff - R6D2, R6D3 DBRESET toggles Delay VR Powergood Stuff- R6D2, R6D3 , No-Stuff- R6D1, R7P3 (page#23)

Delay_VR_PWRGOOD (42,46)

D D

XDP_PREQ_L(4) XDP_PRDY_L(4)

+V1.1S_VTT(4,6,7,20,21,22,34,40,41,42,43)

CFG17(9)

C53

X_C0.1u16Y0402

NO_STUFF

H_CPUPWRGD(4,20)

C C

CFG16(9) XDP_OBS4(4)

XDP_OBS5(4) XDP_OBS6(4)

XDP_OBS7(4)

PM_PWRBTN_L(17,35,36,44)

H_PWRGD_XDP(4)

SMB_DATA_S3(10,13,14,16,34,35,36,37,39) SMB_CLK_S3(10,13,14,16,34,35,36,37,39)

XDP_TCLK(4)

XDP_OBS[3:0](4)

CFG[12:15](9)

B B

CFG18(9)

XDP_OBS0_R XDP_OBS1_R

XDP_OBS2_R XDP_OBS3_R

R46 1KR0402R46 1KR0402

R49 0R0402R49 0R0402 R50 0R0402R50 0R0402

XDP_OBS0

1

XDP_OBS1

3

XDP_OBS2

5

XDP_OBS3

7

CFG15

1

CFG13

3

CFG14

5

CFG12

7

NO_STUFF

R61 X_0R0402R61 X_0R0402

NO_STUFF

+V1.1S_VTT(4,6,7,20,21,22,34,40,41,42,43)

R65 X_51R1%0402R65 X_51R1%0402

H_CPUPWRGD_XDP

PM_PWRBTN_XDP H_PWGD_XDP

RN8

2 4 6 8

8P4R-0R0402-2

RN9

2 4 6 8

X_8P4R-0R0402-2

XDP_OBS3_R XDP_OBS1_R XDP_OBS2_R XDP_OBS0_R

PM_PWRBTN_XDPCFG18

PM_PWRBTN_XDP

NO_STUFF

A A

5

4

3

EMERALD BAY

Title

XDP (MCP)

Size Document Number Rev

A

Date: Sheet

2

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D D

CFG0(9,11)

PCI-Express Configuration Select

CFG0 1:Single PEG

C C

CFG3 - PCI-Express Static Lane Reversal

CFG3

CFG4 - Display Port Presence

0:Bifurcation enabled

1 :Normal Operation 0 :Lane Numbers Reversed 15 -> 0, 14 -> 1, ...

CFG4

CFG3(9,11)

CFG4(9,11)

1:Disabled; No Physical Display Port attached to Embedded Display Port

0:Enabled; An external Display Port device is connected to the Embedded Display Port

CFG0

CFG3

CFG4

NO_STUFF

R66

R66 X_3.01KR1%0402

X_3.01KR1%0402

NO_STUFF

R67

R67 X_3.01KR1%0402

X_3.01KR1%0402

R68

R68 X_3.01KR1%0402

X_3.01KR1%0402

NO_STUFF

Layout Note: Location of all CFG strap resistors needs to be close to trace to minimize stub

B B

A A

5

4

3

EMERALD BAY

Title

PROCESSOR STRAPS

Size Document Number Rev

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2

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Channel A High :9.2mm

DIMM1A

M_A_A[15:0](5)

D D

M_A_BS0(5) M_A_BS1(5) M_A_BS2(5) M_CS_L0(5) M_CS_L1(5) M_CLK_DDR0(5) M_CLK_DDR0_L(5) M_CLK_DDR1(5) M_CLK_DDR1_L(5) M_CKE0(5) M_CKE1(5) M_A_CAS_L(5) M_A_RAS_L(5) M_A_WE_L(5)

M_ODT0(5) M_ODT1(5)

SODIMM0_1_SMB_CLK_R SODIMM0_1_SMB_DATA_R

SMB_CLK_S2(10,11,14,16,34,35,36,37,39) SMB_DATA_S2(10,11,14,16,34,35,36,37,39)

M_A_DM[7:0](5)

C C

M_A_DQS[7:0](5)

M_A_DQS_L[7:0](5)

M_CS_L0 M_CS_L1

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15

SA0_DIM0 SA1_DIM0

M_A_DM0 M_A_DM1 M_A_DM2 M_A_DM3 M_A_DM4 M_A_DM5 M_A_DM6 M_A_DM7

M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7 M_A_DQS_L0 M_A_DQS_L1 M_A_DQS_L2 M_A_DQS_L3 M_A_DQS_L4 M_A_DQS_L5 M_A_DQS_L6 M_A_DQS_L7

DIMM1A

98

A0

97

A1

96

A2

95

A3

92

A4

91

A5

90

A6

86

A7

89

A8

85

A9

107

A10/AP

84

A11

83

A12/BC#

119

A13

80

A14

78

A15

109

BA0

108

BA1

79

BA2

114

S0#

121

S1#

101

CK0

103

CK0#

102

CK1

104

CK1#

73

CKE0

74

CKE1

115

CAS#

110

RAS#

113

WE#

197

SA0

201

SA1

202

SCL

200

SDA

116

ODT0

120

ODT1

11

DM0

28

DM1

46

DM2

63

DM3

136

DM4

153

DM5

170

DM6

187

DM7

12

DQS0

29

DQS1

47

DQS2

64

DQS3

137

DQS4

154

DQS5

171

DQS6

188

DQS7

10

DQS#0

27

DQS#1

45

DQS#2

62

DQS#3

135

DQS#4

152

DQS#5

169

DQS#6

186

DQS#7

DDRIIISODIMM-204PS_BLACK-RH-1

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8

DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63

M_A_DQ0

5

M_A_DQ1

7

M_A_DQ2

15

M_A_DQ3

17

M_A_DQ4

4

M_A_DQ5

6

M_A_DQ6

16

M_A_DQ7

18

M_A_DQ8

21

M_A_DQ9

23

M_A_DQ10

33

M_A_DQ11

35

M_A_DQ12

22

M_A_DQ13

24

M_A_DQ14

34

M_A_DQ15

36

M_A_DQ16

39

M_A_DQ17

41

M_A_DQ18

51

M_A_DQ19

53

M_A_DQ20

40

M_A_DQ21

42

M_A_DQ22

50

M_A_DQ23

52

M_A_DQ24

57

M_A_DQ25

59

M_A_DQ26

67

M_A_DQ27

69

M_A_DQ28

56

M_A_DQ29

58

M_A_DQ30

68

M_A_DQ31

70

M_A_DQ32

129

M_A_DQ33

131

M_A_DQ34

141

M_A_DQ35

143

M_A_DQ36

130

M_A_DQ37

132

M_A_DQ38

140

M_A_DQ39

142

M_A_DQ40

147

M_A_DQ41

149

M_A_DQ42

157

M_A_DQ43

159

M_A_DQ44

146

M_A_DQ45

148

M_A_DQ46

158

M_A_DQ47

160

M_A_DQ48

163

M_A_DQ49

165

M_A_DQ50

175

M_A_DQ51

177

M_A_DQ52

164

M_A_DQ53

166

M_A_DQ54

174

M_A_DQ55

176

M_A_DQ56

181

M_A_DQ57

183

M_A_DQ58

191

M_A_DQ59

193

M_A_DQ60

180

M_A_DQ61

182

M_A_DQ62

192

M_A_DQ63

194

M_A_DQ[63:0] (5)

+V3.3S(10,11,14,15,16,17,19,20,21,22,24,25,26,29,30,31,34,35,36,37,40,41,42,43,45,46,49,50)

C55

C0.1u16Y0402

M_VREF_DQ_DIMM0(39)

C57

C0.1u16Y0402

M_VREF_DQ_DIMM0(39)

C59

C0.1u16Y0402

VRefCA on both SO-DIMMs can be connected by a single M_VREF_MCH trace

VRefDQ on both SO-DIMMs can be shared by a second separate M_VREF_MCH trace

+V0.75S(14,39,43)

C61

C61 C1u10Y0402-RH

C1u10Y0402-RH

C56

C2.2u6.3X5

DDR3_DRAMRST_L(4,14)

M_VREF_DQ_DIMM0

C58

M_VREF_DQ_DIMM0

C60

C62

C62 C1u10Y0402-RH

C1u10Y0402-RH

PM_EXTTS_L1(4,10,14)

C2.2u6.3X5

C63

C63 C1u10Y0402-RH

C1u10Y0402-RH

+V1.5(7,14,39,43,45)

C64

C64 C1u10Y0402-RH

C1u10Y0402-RH

DIMM1B

75

VDD

76

VDD

81

VDD

82

VDD

87

VDD

88

VDD

93

VDD

94

VDD

99

VDD

100

VDD

105

VDD

106

VDD

111

VDD

112

VDD

117

VDD

118

VDD

123

VDD

124

VDD

199

VDDSPD

77

NC1

122

NC2

125

NCTEST

198

EVENT#

30

RESET#

1

VREF_DQ

126

VREF_CA

2

VSS

3

VSS

8

VSS

9

VSS

13

VSS

14

VSS

19

VSS

20

VSS

25

VSS

26

VSS

31

VSS

32

VSS

37

VSS

38

VSS

43

VSS

DDRIIISODIMM-204PS_BLACK-RH-1

Place near Vtt pins

DIMM1B

44

VSS

48

VSS

49

VSS

54

VSS

55

VSS

60

VSS

61

VSS

65

VSS

66

VSS

71

VSS

72

VSS

127

VSS

128

VSS

133

VSS

134

VSS

138

VSS

139

VSS

144

VSS

145

VSS

150

VSS

151

VSS

155

VSS

156

VSS

161

VSS

162

VSS

167

VSS

168

VSS

172

VSS

173

VSS

178

VSS

179

VSS

184

VSS

185

VSS

189

VSS

190

VSS

195

VSS

196

VSS

MEC1

MEC2

203

VTT

204

VTT

205

206

Place these caps close to VTT1 and VTT2. Place C21 on common path for both DIMM's

+V0.75S(14,39,43)

B B

,21,22,24,25,26,29,30,31,34,35,36,37,40,41,42,43,45,46,49,5

Note: If SA0_DIM0 = 0, SA1_DIM0 = 0 SO-DIMM0 SPD Address is 0xA0 SO-DIMM0 TS Address is 0x30

If SA0_DIM0 = 1, SA1_DIM0 = 0

A A

SO-DIMM0 SPD Address is 0xA2 SO-DIMM0 TS Address is 0x32

5

+V3.3S

NO_STUFF

R70

R70 X_10KR0402

X_10KR0402

R71

R71 10KR0402

10KR0402

SA0_DIM0 SA1_DIM0

R72

R72 10KR0402

10KR0402

+V1.5(7,14,39,43,45)

C65

C65 C10u6.3X50805-1

C10u6.3X50805-1

C66

C66 C10u6.3X50805-1

C10u6.3X50805-1

4

C67

C67 C10u6.3X50805-1

C10u6.3X50805-1

C68

C68 C10u6.3X50805-1

C10u6.3X50805-1

C69

C69 C10u6.3X50805-1

C10u6.3X50805-1

3

C70

C70 C10u6.3X50805-1

C10u6.3X50805-1

+

12

EC22

EC22 C330u2.5SO-RH

C330u2.5SO-RH

Place two capacitors close to the VR Layout Note: Place these Caps near SO-DIMM1.

+V1.5(7,14,39,43,45)

C72

C72 C1u10Y0402-RH

C1u10Y0402-RH

EMERALD BAY

Title

DDR3 SODIMM0

Size Document Number Rev

A

Date: Sheet

2

and one between the two DIMMs

C74

C73

C73 C1u10Y0402-RH

C1u10Y0402-RH

C74 C1u10Y0402-RH

C1u10Y0402-RH

C75

C75 C1u10Y0402-RH

C1u10Y0402-RH

13 53Thursday, September 25, 2008

Intel Confidential

1

of

A

5

)

0

4

3

2

1

Channel B High :5.2mm

DIMM2A

M_B_A[15:0](5)

D D

M_B_BS0(5) M_B_BS1(5) M_B_BS2(5) M_CS_L2(5)

M_CS_L3(5) M_CLK_DDR2(5) M_CLK_DDR2_L(5) M_CLK_DDR3(5) M_CLK_DDR3_L(5) M_CKE2(5) M_CKE3(5) M_B_CAS_L(5) M_B_RAS_L(5) M_B_WE_L(5)

0,11,13,16,34,35,36,37,39 0,11,13,16,34,35,36,37,39

C C

SMB_CLK_S2

SMB_DATA_S2

M_ODT2(5)

M_ODT3(5)

M_B_DM[7:0](5)

M_B_DQS[7:0](5)

M_B_DQS_L[7:0](5)

M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15

SA0_DIM1 SA1_DIM1

M_B_DM0 M_B_DM1 M_B_DM2 M_B_DM3 M_B_DM4 M_B_DM5 M_B_DM6 M_B_DM7

M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7 M_B_DQS_L0 M_B_DQS_L1 M_B_DQS_L2 M_B_DQS_L3 M_B_DQS_L4 M_B_DQS_L5 M_B_DQS_L6 M_B_DQS_L7

B B

Note: SO-DIMM1 SPD Address is 0xA4 SO-DIMM1 TS Address is 0x34

DIMM2A

98

A0

97

A1

96

A2

95

A3

92

A4

91

A5

90

A6

86

A7

89

A8

85

A9

107

A10/AP

84

A11

83

A12/BC#

119

A13

80

A14

78

A15

109

BA0

108

BA1

79

BA2

114

S0#

121

S1#

101

CK0

103

CK0#

102

CK1

104

CK1#

73

CKE0

74

CKE1

115

CAS#

110

RAS#

113

WE#

197

SA0

201

SA1

202

SCL

200

SDA

116

ODT0

120

ODT1

11

DM0

28

DM1

46

DM2

63

DM3

136

DM4

153

DM5

170

DM6

187

DM7

12

DQS0

29

DQS1

47

DQS2

64

DQS3

137

DQS4

154

DQS5

171

DQS6

188

DQS7

10

DQS#0

27

DQS#1

45

DQS#2

62

DQS#3

135

DQS#4

152

DQS#5

169

DQS#6

186

DQS#7

DDRIIISODIMM-204PS_BLACK-RH

DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9

M_B_DQ1

7

M_B_DQ2

15

M_B_DQ3

17

M_B_DQ4

4

M_B_DQ5

6

M_B_DQ6

16

M_B_DQ7

18

M_B_DQ8

21

M_B_DQ9

23

M_B_DQ10

33

M_B_DQ11

35

M_B_DQ12

22

M_B_DQ13

24

M_B_DQ14

34

M_B_DQ15

36

M_B_DQ16

39

M_B_DQ17

41

M_B_DQ18

51

M_B_DQ19

53

M_B_DQ20

40

M_B_DQ21

42

M_B_DQ22

50

M_B_DQ23

52

M_B_DQ24

57

M_B_DQ25

59

M_B_DQ26

67

M_B_DQ27

69

M_B_DQ28

56

M_B_DQ29

58

M_B_DQ30

68

M_B_DQ31

70

M_B_DQ32

129

M_B_DQ33

131

M_B_DQ34

141

M_B_DQ35

143

M_B_DQ36

130

M_B_DQ37

132

M_B_DQ38

140

M_B_DQ39

142

M_B_DQ40

147

M_B_DQ41

149

M_B_DQ42

157

M_B_DQ43

159

M_B_DQ44

146

M_B_DQ45

148

M_B_DQ46

158

M_B_DQ47

160

M_B_DQ48

163

M_B_DQ49

165

M_B_DQ50

175

M_B_DQ51

177

M_B_DQ52

164

M_B_DQ53

166

M_B_DQ54

174

M_B_DQ55

176

M_B_DQ56

181

M_B_DQ57

183

M_B_DQ58

191

M_B_DQ59

193

M_B_DQ60

180

M_B_DQ61

182

M_B_DQ62

192

M_B_DQ63

194

SO-DIMM1 is placed farther from the Processor than SO-DIMM0

M_B_DQ0

5

M_B_DQ[63:0] (5)

+V1.5(7,13,39,43,45)

+V3.3S(10,11,13,15,16,17,19,20,21,22,24,25,26,29,30,31,34,35,36,37,40,41,42,43,45,46,49,50)

C77

C76

C76 C0.1u16Y0402

C0.1u16Y0402

M_VREF_DQ_DIMM1(39)

C78

C78 C0.1u16Y0402

C0.1u16Y0402

M_VREF_DQ_DIMM1(39)

C80

C80 C0.1u16Y0402

C0.1u16Y0402

VRefCA on both SO-DIMMs can be connected by a single M_VREF_MCH trace

VRefDQ on both SO-DIMMs can be shared by a second separate M_VREF_MCH trace

+V0.75S(13,39,43)

C83

C82

C82 C1u10Y0402-RH

C1u10Y0402-RH

C83 C1u10Y0402-RH

C1u10Y0402-RH

C77

C2.2u6.3X5

C79

C2.2u6.3X5

C81

C2.2u6.3X5

C84

C84 C1u10Y0402-RH

C1u10Y0402-RH

DDR3_DRAMRST_L(4,13)

PM_EXTTS_L1(4,10,13)

C85

C85 C1u10Y0402-RH

C1u10Y0402-RH

75

VDD

76

VDD

81

VDD

82

VDD

87

VDD

88

VDD

93

VDD

94

VDD

99

VDD

100

VDD

105

VDD

106

VDD

111

VDD

112

VDD

117

VDD

118

VDD

123

VDD

124

VDD

199

VDDSPD

77

NC1

122

NC2

125

NCTEST

198

EVENT#

30

RESET#

1

VREF_DQ

126

VREF_CA

2

VSS

3

VSS

8

VSS

9

VSS

13

VSS

14

VSS

19

VSS

20

VSS

25

VSS

26

VSS

31

VSS

32

VSS

37

VSS

38

VSS

43

VSS

DDRIIISODIMM-204PS_BLACK-RH

Place near Vtt pins

DIMM2B

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

MEC1 MEC2

VTT VTT

205 206

44 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 196

MEC1 MEC2

203 204

205 206

+V0.75S(13,39,43)

+V1.5(7,13,39,43,45)

,15,16,17,19,20,21,22,24,25,26,29,30,31,34,35,36,37,40,41,42,43,45,46,49,5

A A

5

+V3.3S

R73

R73 10KR0402

10KR0402

SA1_DIM1 SA0_DIM1

R74

R74 10KR0402

10KR0402

+V1.5(7,13,39,43,45)

C93

C93 C1u10Y0402-RH

C1u10Y0402-RH

C94

C94 C0.1u16Y0402

C0.1u16Y0402

C95

C95 C0.1u16Y0402

C0.1u16Y0402

C96

C96 C0.1u16Y0402

C0.1u16Y0402

4

3

C86

C86 C10u6.3X50805-1

C10u6.3X50805-1

C87

C87 C10u6.3X50805-1

C10u6.3X50805-1

C88

C88 C10u6.3X50805-1

C10u6.3X50805-1

EMERALD BAY

Title

Size Document Number Rev

A

Date: Sheet

C89

C89 C10u6.3X50805-1

C10u6.3X50805-1

DDR3 SODIMM1

2

C90

C90 C10u6.3X50805-1

C10u6.3X50805-1

C91

C91 C10u6.3X50805-1

C10u6.3X50805-1

+

12

EC23

EC23 C330u2.5SO-RH

C330u2.5SO-RH

Layout Note: Place these Caps near SO-DIMM1.

Intel Confidential

of

14 53Thursday, September 25, 2008

1

A

5

4

3

2

1

+V3.3A_RTC(22,36)+V3.3A,36,37,38,39,45,46

C97

Y

D1

Z

S-BAT54C_SOT23

D D

C C

B B

X

BAT_D

R80

R80 1KR0402

1KR0402

BAT

1 2

R333 X_8.2KR0402R333 X_8.2KR0402

SPI_SI

PCH_JTAG_TMS PCH_JTAG_TDI PCH_JTAG_TDO

PCH_JTAG_RST_L

PCH_JTAG_TCK

SPI_CLK

34

BH1X2HS-1.25PITCH-RH

NO_STUFF

C350 X_C10p25N0402-RH-3C350 X_C10p25N0402-RH-3

RTC Circuitry

R76 20KR1%0402R76 20KR1%0402

R78

R78 1MR0402

1MR0402

JRTC1

R640 51R0402R640 51R0402 R641 51R0402R641 51R0402 R642 51R0402R642 51R0402

R643 10KR0402R643 10KR0402 R644 X_51R0402R644 X_51R0402

NO_STUFF

R645 4.75KR1%0402R645 4.75KR1%0402

NO_STUFF

+V1.1M(22,40,43,46)

C97 C1u10Y0402-RH

C1u10Y0402-RH

R75 20KR1%0402R75 20KR1%0402

C100

C1u10Y0402-RH

iTPM Enable/Disable

Enable iTPM : R333 stuff Disable iTPM : R333 no stuff

SPI_SI

Layout Toplogy for SPI CLK and MOSI

L1 = 1-5"

L2 or L3 = 0.5-2"

L2 +/- L3 <= 0.1"

A A

PCH

L1

MISO Topology Open

SPI Device 1

L2

L3

SPI Device 2

5

J5F4 - CMOS SETTING SAVE CMOS -- (1- X) DEFAULT CLEAR CMOS -- (1-2)

J2

C99

C1u10Y0402-RH

J2

1

H1X2M_BLACK-RH

2

+V3.3A_RTC(22,36)

INTVRMEN - Integrated SUS

1.1V VRM Enable ?HIGH

SPI_SO(33)

4

C98 C18p50N0402C98 C18p50N0402

32.768KHZ12.5P_S

C101 C18p50N0402C101 C18p50N0402

HDA_SDOUT(31)

PCH_JTAG_TCK(35)

PCH_JTAG_TMS(35) PCH_JTAG_TDI(35)

PCH_JTAG_TDO(35)

PCH_JTAG_RST_L(35)

SPI_CLK(33)

SPI_CS_L0(33) SPI_CS_L1(33)

SPI_SI(33)

+V3.3S(10,11,13,14,16,17,19,20,21,22,24,25,26,29,30,31,34,35,36,37,40,41,42,43,45,46,49,50)

R90

R90 100KR0402

100KR0402

X1

Cap values depend on Xtal

HDA_BIT_CLK(31)

HDA_SYNC(31)

HDA_RST_L(31)

HDA_SDIN0(31)

TP255TP255 TP256TP256 TP257TP257

TP239TP239

SPI_CLK SPI_CS_L0 SPI_CS_L1

SPI_SI

R82 33R0402R82 33R0402

R86

R86 X_1KR0402

X_1KR0402

R88 10KR1%0402R88 10KR1%0402

HDA_DOCK_EN_L

HDA_DOCK_EN# Low = Enabled (default)

GPIO33

R77

R77 10MR1%0402

10MR1%0402

1 2

R79

330KR0402

HDA_SDOUT

HDA_DOCK_EN_L TP_HDA_DOCK_RST_L

PCH_JTAG_TCK PCH_JTAG_TMS PCH_JTAG_TDI PCH_JTAG_TDO PCH_JTAG_RST_L

NO_STUFF

INT_SERIRQ

Flash Descriptor Security Override

High = Disabled

RTC_X1 RTC_X2

RTC_RST_L SRTC_RST_L SM_INTRUDER_L PCH_INTVRMEN

HDA_SPKR

HDA_SDIN0 HDA_SDIN1 HDA_SDIN2 HDA_SDIN3

SPIMISOSPI_SO

J2(1-X)

JUMPER-1X2A_green

U3A

B13

RTCX1

D13

RTCX2

C14

RTCRST#

D17

SRTCRST#

A16

INTRUDER#

A14

INTVRMEN

A30

HDA_BCLK

D29

HDA_SYNC

P1

SPKR

C30

HDA_RST#

G30

HDA_SDIN0

F30

HDA_SDIN1

E32

HDA_SDIN2

F32

HDA_SDIN3

B29

HDA_SDO

H32

HDA_DOCK_EN# / GPIO33

J30

HDA_DOCK_RST# / GPIO13

M3

JTAG_TCK

K3

JTAG_TMS

K1

JTAG_TDI

J2

JTAG_TDO

J4

JTAG_RST#

BA2

SPI_CLK

AV3

SPI_CS0#

AY3

SPI_CS1#

AY1

SPI_MOSI

AV1

SPI_MISO

IbexPeak-M_Rev0_9

No Reboot Strap R86

HDA_SPKR

3

HDA_SPKR

No stuff = Default Stuff = No Reboot

RTCIHDA

SPI JTAG

FWH0 / LAD0 FWH1 / LAD1 FWH2 / LAD2 FWH3 / LAD3

FWH4 / LFRAME#

LDRQ1# / GPIO23

LPC

SATA

SATAICOMPO

SATAICOMPI

SATA0GP / GPIO21 SATA1GP / GPIO19

D33 B33 C32 A32

C34 A34

LDRQ0#

F34 AB9

SERIRQ

AK7

SATA0RXN

AK6

SATA0RXP

AK11

SATA0TXN

AK9

SATA0TXP

AH6

SATA1RXN

AH5

SATA1RXP

AH9

SATA1TXN

AH8

SATA1TXP

AF11

SATA2RXN

AF9

SATA2RXP

AF7

SATA2TXN

AF6

SATA2TXP

AH3

SATA3RXN

AH1

SATA3RXP

AF3

SATA3TXN

AF1

SATA3TXP

AD9

SATA4RXN

AD8

SATA4RXP

AD6

SATA4TXN

AD5

SATA4TXP

AD3

SATA5RXN

AD1

SATA5RXP

AB3

SATA5TXN

AB1

SATA5TXP

AF16 AF15

T3

SATALED#

Y9 V1

PCH_SATA_LED_L

EMERALD BAY

Title

IBEXPEAK (1 of 9)

Size Document Number Rev

A

Date: Sheet

LDRQ0_L LDRQ1_L

SATA_RXN0_C SATA_RXP0_CHDA_SYNC SATA_TXN0_C SATA_TXP0_C

SATA_RXN1_C SATA_RXP1_C SATA_TXN1_C SATA_TXP1_C

SATA_RXN2_C SATA_RXP2_C SATA_TXN2_C SATA_TXP2_C

SATA_RXN3_C SATA_RXP3_C SATA_TXN3_C SATA_TXP3_C

SATA_RXN4_C SATA_RXP4_C SATA_TXN4_C SATA_TXP4_C

TP_SATA_RXN5 TP_SATA_RXP5 TP_SATA_TXN5 TP_SATA_TXP5

SATACOMP

PCH_SATA_LED_L

SATA_DET_L0

SATA_DET_L1_R

C102 C0.01u10X0402-RHC102 C0.01u10X0402-RH C103 C0.01u10X0402-RHC103 C0.01u10X0402-RH C104 C0.01u10X0402-RHC104 C0.01u10X0402-RH C105 C0.01u10X0402-RHC105 C0.01u10X0402-RH

C106 C0.01u10X0402-RHC106 C0.01u10X0402-RH C107 C0.01u10X0402-RHC107 C0.01u10X0402-RH C108 C0.01u10X0402-RHC108 C0.01u10X0402-RH C109 C0.01u10X0402-RHC109 C0.01u10X0402-RH

C110 C0.01u10X0402-RHC110 C0.01u10X0402-RH C111 C0.01u10X0402-RHC111 C0.01u10X0402-RH C112 C0.01u10X0402-RHC112 C0.01u10X0402-RH C113 C0.01u10X0402-RHC113 C0.01u10X0402-RH

C114 C0.01u10X0402-RHC114 C0.01u10X0402-RH C115 C0.01u10X0402-RHC115 C0.01u10X0402-RH C116 C0.01u10X0402-RHC116 C0.01u10X0402-RH C117 C0.01u10X0402-RHC117 C0.01u10X0402-RH

C180 C0.01u10X0402-RHC180 C0.01u10X0402-RH C215 C0.01u10X0402-RHC215 C0.01u10X0402-RH C218 C0.01u10X0402-RHC218 C0.01u10X0402-RH C220 C0.01u10X0402-RHC220 C0.01u10X0402-RH

TP234TP234

TP235TP235

TP236TP236

TP237TP237

R81 37.4R1%0402-RHR81 37.4R1%0402-RH

SATA_DET_L0 (30,35)

R84 10KR0402R84 10KR0402

SATA_DET_L1_R (35)

PCH_SATA_LED_L (44)

2

LPC_AD0 (36) LPC_AD1 (36) LPC_AD2 (36) LPC_AD3 (36)

LPC_FRAME_L (36)

TP94TP94 TP95TP95

INT_SERIRQ (36)

SATA_RXN0 (30) SATA_RXP0 (30) SATA_TXN0 (30) SATA_TXP0 (30)

SATA_RXN1 (30) SATA_RXP1 (30) SATA_TXN1 (30) SATA_TXP1 (30)

SATA_RXN2 (30) SATA_RXP2 (30) SATA_TXN2 (30) SATA_TXP2 (30)

SATA_RXN3 (30) SATA_RXP3 (30) SATA_TXN3 (30) SATA_TXP3 (30)

SATA_RXN4 (30) SATA_RXP4 (30) SATA_TXN4 (30) SATA_TXP4 (30)

+V1.1S(16,17,21,22,40,42,43,46)

+V3.3S(10,11,13,14,16,17,19,20,21,22,24,25,26,29,30,31,34,35,36,37,40,41,42,43,45,46,49,50)

Distance between the PCH and cap on the "P" signal should be identical distance between the PCH and cap on the "N" signal for same pair.

+V3.3S(10,11,13,14,16,17,19,20,21,22,24,25,26,29,30,31,34,35,36,37,40,41,42,43,45,46,49,50)

R85

R85 X_10KR0402

X_10KR0402

U4

VCC

1

A

2

B

GND

R89 X_0R0402R89 X_0R0402

NO_STUFF

15 53Thursday, September 25, 2008

1

C118

C118 X_C0.1u16Y0402

X_C0.1u16Y0402

12

LED1

5

VCC

4

Y

X_74AHC1G08GW_SOT353-RH

3

SATA_LED_L

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X_LED04-B-25mA4.3V_20125-RH

5

PCIE_RXN1(29)

PCIE_RXP1(29) PCIE_TXN1(29) PCIE_TXP1(29)

PCIE_RXN2(29)

PCIE_RXP2(29) PCIE_TXN2(29)

D D

PCIE_TXP2(29)

PCIE_RXN3(50)

PCIE_RXP3(50)

PCIE_TXN3(50) PCIE_TXP3(50)

PCIE_RXN6_LAN(32)

PCIE_RXP6_LAN(32) PCIE_TXN6_LAN(32) PCIE_TXP6_LAN(32)

C C

CLK_PCIE_MINICARD1_L(29)

CLK_PCIE_MINICARD1(29)

CLK_PCIE_MINICARD2_L(29)

CLK_PCIE_MINICARD2(29)

CLK_PCIE_MINICARD1_L CK_PEG1_N CLK_PCIE_MINICARD1

CLK_MINICARD1_OE_L(29,35)

CLK_PCIE_MINICARD2_L CK_PEG2_N CLK_PCIE_MINICARD2

CLK_MINICARD2_OE_L(29,35)

B B

CLK_PCIE_LAN_L(32) CLK_PCIE_LAN(32)

CLK_PCIE_LAN_REQ_L(32)

SMB_CLK SMB_DATA

A A

C119 C0.1u10X0402C119 C0.1u10X0402 C122 C0.1u10X0402C122 C0.1u10X0402

C120 C0.1u10X0402C120 C0.1u10X0402 C121 C0.1u10X0402C121 C0.1u10X0402

PCIE_RXN3 PCIE_RXP3

C629 C0.1u10X0402C629 C0.1u10X0402 C630 C0.1u10X0402C630 C0.1u10X0402

TP220TP220 TP221TP221 TP218TP218 TP219TP219

TP224TP224 TP225TP225 TP222TP222 TP223TP223

R91 0R0402R91 0R0402 R92 0R0402R92 0R0402 C123 C0.1u10X0402C123 C0.1u10X0402 C124 C0.1u10X0402C124 C0.1u10X0402

TP228TP228 TP229TP229 TP226TP226 TP227TP227

TP232TP232 TP233TP233 TP230TP230 TP231TP231

+V3.3A(4,15,17,19,20,22,27,28,29,32,34,36,37,38,39,45,46)

CLK_PCIE_LAN_L CLK_PCIE_LAN

Q2

Q2 N-2N7002LT1G_SOT23

N-2N7002LT1G_SOT23

D

S

G

+V5A(22,27,28,31,33,38,39,40,45) +V5A(22,27,28,31,33,38,39,40,45)

Q4

Q4 N-2N7002LT1G_SOT23

N-2N7002LT1G_SOT23

D

S

G

+V12S (10,25,30,31,37,39,43) +V12S (10,25,30,31,37,39,43)

TP106TP106 TP107TP107

R95 10KR0402R95 10KR0402

R568 0R0402R568 0R0402 R569 0R0402R569 0R0402

CLK_MINICARD1_OE_L

R570 0R0402R570 0R0402 R571 0R0402R571 0R0402

CLK_MINICARD2_OE_L

TP105TP105 TP104TP104

R97 10KR0402R97 10KR0402

TP103TP103 TP102TP102

R98 10KR0402R98 10KR0402

TP101TP101 TP100TP100

R100 10KR0402R100 10KR0402

R445 0R0402R445 0R0402 R473 0R0402R473 0R0402

SMB_CLK_A1 SMB_DATA_A1

SMB_CLK_S3 SMB_DATA_S3

PCIE_TXN1_C PCIE_TXP1_C

PCIE_TXN2_C

PCIE_TXP2_C

PCIE_TXN3_C PCIE_TXP3_C

PCIE_RXN4 PCIE_RXP4 PCIE_TXN4 PCIE_TXP4

PCIE_RXN5 PCIE_RXP5 PCIE_TXN5 PCIE_TXP5

PCIE_RXN6_R PCIE_RXP6_R PCIE_TXN6_C PCIE_TXP6_C

PCIE_RXN7 PCIE_RXP7 PCIE_TXN7 PCIE_TXP7

PCIE_RXN8 PCIE_RXP8 PCIE_TXN8 PCIE_TXP8

TP_CLKOUT_PCIE0N TP_CLKOUT_PCIE0P

PCH_SRC0_CLKREQ_L

CK_PEG1_P

CK_PEG2_P

TP_CLKOUT_PCIE3N TP_CLKOUT_PCIE3P

PCH_SRC3_CLKREQ_L

TP_CLKOUT_PCIE4N TP_CLKOUT_PCIE4P

PCH_SRC4_CLKREQ_L

TP_CLKOUT_PCIE5N TP_CLKOUT_PCIE5P

SMB_CLK_A1 (29) SMB_DATA_A1 (29)

SMB_CLK_S2 (10,11,13,14,34,35,36,37,39) SMB_DATA_S2 (10,11,13,14,34,35,36,37,39)

SMB_CLK_S3 (10,11,13,14,34,35,36,37,39) SMB_DATA_S3 (10,11,13,14,34,35,36,37,39)

5

CK_PEGB_N CK_PEGB_P

4

U3B

BG30

PERN1

BJ30

PERP1

BF29

PETN1

BH29

PETP1

AW30

PERN2

BA30

PERP2

BC30

PETN2

BD30

PETP2

AU30

PERN3

AT30

PERP3

AU32

PETN3

AV32

PETP3

BA32

PERN4

BB32

PERP4

BD32

PETN4

BE32

PETP4

BF33

PERN5

BH33

PERP5

BG32

PETN5

BJ32

PETP5

BA34

PERN6

AW34

PERP6

BC34

PETN6

BD34

PETP6

AT34

PERN7

AU34

PERP7

AU36

PETN7

AV36

PETP7

BG34

PERN8

BJ34

PERP8

BG36

PETN8

BJ36

PETP8

AK48

CLKOUT_PCIE0N

AK47

CLKOUT_PCIE0P

P9

PCIECLKRQ0# / GPIO73

AM43

CLKOUT_PCIE1N

AM45

CLKOUT_PCIE1P

U4

PCIECLKRQ1# / GPIO18

AM47

CLKOUT_PCIE2N

AM48

CLKOUT_PCIE2P

N4

PCIECLKRQ2# / GPIO20

AH42

CLKOUT_PCIE3N

AH41

CLKOUT_PCIE3P

A8

PCIECLKRQ3# / GPIO25

AM51

CLKOUT_PCIE4N

AM53

CLKOUT_PCIE4P

M9

PCIECLKRQ4# / GPIO26

AJ50

CLKOUT_PCIE5N

AJ52

CLKOUT_PCIE5P

H6

PCIECLKRQ5# / GPIO44

AK53

CLKOUT_PEG_B_N

AK51

CLKOUT_PEG_B_P

P13

PEG_B_CLKRQ# / GPIO56

IbexPeak-M_Rev0_9

4

SMBALERT# / GPIO11

SML0ALERT# / GPIO60

SML1ALERT# / GPIO74

SMBus

PCI-E*

Link

Controller

PEG_A_CLKRQ# / GPIO47

PEG

CLKOUT_DP_N / CLKOUT_BCLK1_N

CLKOUT_DP_P / CLKOUT_BCLK1_P

From CLK BUFFER

CLKIN_SATA_N / CKSSCD_N

CLKIN_SATA_P / CKSSCD_P

CLKIN_PCILOOPBACK

CLKOUTFLEX0 / GPIO64

CLKOUTFLEX1 / GPIO65

CLKOUTFLEX2 / GPIO66

CLKOUTFLEX3 / GPIO67

Clock Flex

Q3

Q3 N-2N7002LT1G_SOT23

N-2N7002LT1G_SOT23

D

S

G

Q5

Q5 N-2N7002LT1G_SOT23

N-2N7002LT1G_SOT23

SMB_DATA_S2SMB_CLK_S2

SMB_DATA_S2

D

S

G

SMBCLK

SMBDATA

SML0CLK

SML0DATA

SML1CLK / GPIO58

SML1DATA / GPIO75

CL_CLK1 CL_DATA1 CL_RST1#

CLKOUT_PEG_A_N CLKOUT_PEG_A_P

CLKOUT_DMI_N CLKOUT_DMI_P

CLKIN_DMI_N CLKIN_DMI_P

CLKIN_BCLK_N CLKIN_BCLK_P

CLKIN_DOT_96N CLKIN_DOT_96P

REFCLK14IN

XTAL25_IN

XTAL25_OUT

XCLK_RCOMP

B9 H14 C8

J14 C6 G8

M14 E10 G12

T13 T11 T9

H1

AD43 AD45

AN4 AN2

AT1 AT3

AW24 BA24

AP3 AP1

F18 E18

AH13 AH12

P41

J42

AH51 AH53

AF38

T45

P43

T42

N50

3

PCH_GPIO11 SMB_CLK SMB_DATA

PCH_UPEK_INIT_L

PCH_GPIO74

CK_PEG_N CK_PEG_P

CK_DMI_N CK_DMI_P

CK_DP0_N CK_DP0_P

CLK_BUF_DOT96_N CLK_BUF_DOT96_P

CLK_BUF_CKSSCD_N CLK_BUF_CKSSCD_P

CLK_BUF_REF14

CLK_PCI_FB

25M_PCH01 XTAL25_OUT

XCLK_RCOMP

TP_CLK_FLEX0

TP_CLK_FLEX1PCH_SRC5_CLKREQ_L

TP_CLK_FLEX2

TP_CLK_FLEX3

SML1_CLK SML1_DATA

PEG_CLKREQ_L

R437 0R0402R437 0R0402 R438 0R0402R438 0R0402

R440 0R0402R440 0R0402 R444 0R0402R444 0R0402

R435 0R0402R435 0R0402 R436 0R0402R436 0R0402

R99 90.9R1%0402R99 90.9R1%0402

TP97TP97

TP98TP98

TP99TP99

2

SML0_CLK (32) SML0_DATA (32)

CL_CLK (29) CL_DATA (29)

CL_RST_L (29)

PEG_CLKREQ_L (37)

CLK_PEGA_N CLK_PEGA_P

CLK_MCH_PEG_L CLK_MCH_PEG

CLK_DP_N CLK_DP_P

CLK_BUF_EXP_N (34) CLK_BUF_EXP_P (34)

CLK_BUF_CPU_BCLK_L (34) CLK_BUF_CPU_BCLK (34)

CLK_BUF_DOT96_N (34) CLK_BUF_DOT96_P (34)

CLK_BUF_CKSSCD_N (34) CLK_BUF_CKSSCD_P (34)

CLK_BUF_REF14 (34)

CLK_PCI_FB (19)

R574 0R0402R574 0R0402

TP96TP96

EMERALD BAY

Title

IBEXPEAK (2 of 9)

Size Document Number Rev

A

Date: Sheet

CLK_PEGA_N (37) CLK_PEGA_P (37)

CLK_MCH_PEG_L (4) CLK_MCH_PEG (4)

CLK_DP_N (4) CLK_DP_P (4)

+V1.1S(15,17,21,22,40,42,43,46)

SMB_CLK_S2

SMB_DATA_S2

XTAL25_IN

X2 : D04-1001100-T16 D04-1001100-T02

R112 10KR0402R112 10KR0402 R114 10KR0402R114 10KR0402

PEG_CLKREQ_L

CLK_BUF_REF14

CLK_PCI_FB

+V3.3S(10,11,13,14,15,17,19,20,21,22,24,25,26,29,30,31,34,35,36,37,40,41,42,43,45,46,49,50)

C125 C27p50N0402C125 C27p50N0402

12

X2

X2 25MHZ20p_S-RH-2

25MHZ20p_S-RH-2

C126 C27p50N0402C126 C27p50N0402

PCH_GPIO74 PCH_GPIO11

PCH_UPEK_INIT_L

SMB_CLK SMB_DATA SML0_CLK SML0_DATA SMB_CLK_A1 SMB_DATA_A1 SML1_CLK SML1_DATA

2

1

R96 10KR0402R96 10KR0402

C272 X_C10p25N0402-RH-3C272 X_C10p25N0402-RH-3

C273 X_C10p25N0402-RH-3C273 X_C10p25N0402-RH-3

NO_STUFF

Cap values depend on Xtal

16 53Thursday, September 25, 2008

1

+V3.3A(4,15,17,19,20,22,27,28,29,32,34,36,37,38,39,45,46)

R101 10KR0402R101 10KR0402 R102 10KR0402R102 10KR0402 R103 10KR0402R103 10KR0402 R104 2.2KR0402R104 2.2KR0402 R105 2.2KR0402R105 2.2KR0402 R106 4.7KR0402R106 4.7KR0402 R107 4.7KR0402R107 4.7KR0402 R109 10KR0402R109 10KR0402 R111 10KR0402R111 10KR0402 R113 10KR0402R113 10KR0402 R115 10KR0402R115 10KR0402

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DMI_RXN0(3) DMI_RXN1(3) DMI_RXN2(3)

D D

+V1.1S_VCC_EXP(15,16,21,22,40,42,43,46)

R116

49.9R1%0402

DMI_COMP_R

DMI_RXN3(3) DMI_RXP0(3)

DMI_RXP1(3) DMI_RXP2(3) DMI_RXP3(3)

DMI_TXN0(3) DMI_TXN1(3) DMI_TXN2(3) DMI_TXN3(3)

DMI_TXP0(3) DMI_TXP1(3) DMI_TXP2(3) DMI_TXP3(3)

4

U3C

BC24

DMI0RXN

BJ22

DMI1RXN

AW20

DMI2RXN

BJ20

DMI3RXN

BD24

DMI0RXP

BG22

DMI1RXP

BA20

DMI2RXP

BG20

DMI3RXP

BE22

DMI0TXN

BF21

DMI1TXN

BD20

DMI2TXN

BE18

DMI3TXN

BD22

DMI0TXP

BH21

DMI1TXP

BC20

DMI2TXP

BD18

DMI3TXP

BH25

BF25

DMI_ZCOMP DMI_IRCOMP

DMI

FDI

3

FDI_RXN0 FDI_RXN1 FDI_RXN2 FDI_RXN3 FDI_RXN4 FDI_RXN5 FDI_RXN6 FDI_RXN7

FDI_RXP0 FDI_RXP1 FDI_RXP2 FDI_RXP3 FDI_RXP4 FDI_RXP5 FDI_RXP6 FDI_RXP7

FDI_INT FDI_FSYNC0 FDI_FSYNC1 FDI_LSYNC0 FDI_LSYNC1

BA18 BH17 BD16 BJ16 BA16 BE14 BA14 BC12

BB18 BF17 BC16 BG16 AW16 BD14 BB14 BD12

BJ14 BF13 BH13 BJ12 BG14

FDI_INT FDI_FSYNC0 FDI_FSYNC1 FDI_LSYNC0 FDI_LSYNC1

FDI_TXN0 FDI_TXN1 FDI_TXN2 FDI_TXN3 FDI_TXN4 FDI_TXN5 FDI_TXN6 FDI_TXN7

FDI_TXP0 FDI_TXP1 FDI_TXP2 FDI_TXP3 FDI_TXP4 FDI_TXP5 FDI_TXP6 FDI_TXP7

2

FDI_TXN0 (3) FDI_TXN1 (3) FDI_TXN2 (3) FDI_TXN3 (3) FDI_TXN4 (3) FDI_TXN5 (3) FDI_TXN6 (3) FDI_TXN7 (3)

FDI_TXP0 (3) FDI_TXP1 (3) FDI_TXP2 (3) FDI_TXP3 (3) FDI_TXP4 (3) FDI_TXP5 (3) FDI_TXP6 (3) FDI_TXP7 (3)

FDI_INT (3) FDI_FSYNC0 (3) FDI_FSYNC1 (3) FDI_LSYNC0 (3) FDI_LSYNC1 (3)

1

C C

PM_PCH_PWROK

R594

R594 X_10KR0402

X_10KR0402

NO_STUFF

AUXPWROK_R

NO_STUFF

R120

R120 X_0R0402

X_0R0402

B B

A A

5

PM_SYSRST_L(11,44)

SYS_PWROK_L(46)

PM_PCH_PWROK(46)

PM_MPWROK(46)

PM_DRAM_PWRGD(4)

PM_RSMRST_L(36)

TP6TP6

PM_PWRBTN_L(11,35,36,44)

PM_SYSRST_L

SYS_PWROK_L

PM_PCH_PWROK

R118 0R0402R118 0R0402

R119 0R0402R119 0R0402

PM_RSMRST_L

SUS_PWR_ACK

PM_PWRBTN_L

AC_PRESENT

PM_BATLOW_L

PM_RI_L

PM_CLKRUN_L

4

MPWROK_R

AUXPWROK_R

R123

8.2KR0402

R125 10KR0402R125 10KR0402

T6

SYS_RESET#

M6

SYS_PWROK

B17

PWROK

K5

MEPWROK

A10

LAN_RST#

D9

DRAMPWROK

C16

RSMRST#

M1

SUS_PWR_ACK / GPIO30

P5

PWRBTN#

P7

ACPRESENT / GPIO31

A6

BATLOW# / GPIO72

F14

RI#

IbexPeak-M_Rev0_9

+V3.3S(10,11,13,14,15,16,19,20,21,22,24,25,26,29,30,31,34,35,36,37,40,41,42,43,45,46,49,50)

J12

WAKE#

SLP_S4#

SLP_S3#

SLP_M#

TP23

PMSYNCH

SLP_LAN#

3

Y1

P8

TP_SUS_CLK

F3

E4

H7

P12

K8

TP_PM_SLP_DSWL

N2

BJ10

F6

+V3.3A(4,15,16,19,20,22,27,28,29,32,34,36,37,38,39,45,46)

R121 10KR0402R121 10KR0402

R122 10KR0402R122 10KR0402

R124 10KR0402R124 10KR0402

R126

8.2KR0402

R127 1KR0402R127 1KR0402

R128 10KR0402R128 10KR0402

R597 10KR0402R597 10KR0402

CLKRUN# / GPIO32

SUS_STAT# / GPIO61

SUSCLK / GPIO62

SLP_S5# / GPIO63

System Power Management

SUS_PWR_ACK

AC_PRESENT

PM_RI_L

PM_BATLOW_LPM_RSMRST_L

PCIE_WAKE_L

PM_SLP_LAN_L

PM_SYSRST_L

PCIE_WAKE_L

PM_CLKRUN_L

TP_PM_SUS_STAT_L

TP108TP108

PM_SLP_S5_L

PM_SLP_S4_L

PM_SLP_S3_L

PM_SLP_M_L

TP109TP109

H_PM_SYNC

PM_SLP_LAN_L

EMERALD BAY

Title

Size Document Number Rev

A

Date: Sheet

TP4TP4

IBEXPEAK (3 of 9)

PCIE_WAKE_L (29,37)

TP110TP110

TP5TP5

PM_SLP_S4_L (36,39,43,45)

PM_SLP_S3_L (27,28,36,39,40,43,45)

PM_SLP_M_L (43,45)

H_PM_SYNC (4)

PM_SLP_LAN_L (40,43,45)

2

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D D

L_BKLT_EN(25)

LVDS_VDD_EN(25) L_BKLT_CTRL(25) LVDS_DDC_CLK(25)

LVDS_DDC_DATA(25)

Place near PCH

C C

B B

R129

2.37KR1%0402-RH

LVDSA_CLK_L(25) LVDSA_CLK(25)

LVDSA_DATA0_L(25) LVDSA_DATA1_L(25) LVDSA_DATA2_L(25) LVDSA_DATA3_L(25)

LVDSA_DATA0(25) LVDSA_DATA1(25) LVDSA_DATA2(25) LVDSA_DATA3(25)

LVDSB_CLK_L(25) LVDSB_CLK(25)

LVDSB_DATA0_L(25) LVDSB_DATA1_L(25) LVDSB_DATA2_L(25) LVDSB_DATA3_L(25)

LVDSB_DATA0(25) LVDSB_DATA1(25) LVDSB_DATA2(25) LVDSB_DATA3(25)

CRT_BLUE(49) CRT_GREEN(49) CRT_RED(49)

CRT_DDC_CLK(49) CRT_DDC_DATA(49)

CRT_HSYNC(49) CRT_VSYNC(49)

4

L_BKLT_EN LVDS_VDD_EN

L_BKLT_CTRL LVDS_DDC_CLK

LVDS_DDC_DATA

TP3TP3 TP1TP1

TP_LVDS_VBG

TP2TP2

LVDSA_CLK_L

LVDSA_DATA0 LVDSA_DATA1 LVDSA_DATA2 LVDSA_DATA3

LVDSB_DATA0 LVDSB_DATA1 LVDSB_DATA2 LVDSB_DATA3

R130 30.1R1%0402R130 30.1R1%0402 R131 30.1R1%0402R131 30.1R1%0402

L_CTRL_CLK L_CTRL_DATA

LVDS_IBG

HSYNC VSYNC

DAC_IREF_R

R132

R132 1KR1%0402

1KR1%0402

LO note: Place near PCH

T48 T47

Y48

AB48

Y45

AB46

V48

AP39 AP41

AT43 AT42

AV53 AV51

BB47 BA52 AY48 AV47

BB48 BA50 AY49 AV48

AP48 AP47

AY53 AT49

AU52

AT53 AY51

AT48

AU50

AT51

AA52 AB53

AD53

V51 V53

Y53 Y51

AD48

AB51

IbexPeak-M_Rev0_9

U3D

L_BKLTEN L_VDD_EN

L_BKLTCTL L_DDC_CLK

L_DDC_DATA L_CTRL_CLK

L_CTRL_DATA LVD_IBG

LVD_VBG LVD_VREFH

LVD_VREFL

LVDSA_CLK# LVDSA_CLK

LVDSA_DATA#0 LVDSA_DATA#1 LVDSA_DATA#2 LVDSA_DATA#3

LVDSA_DATA0 LVDSA_DATA1 LVDSA_DATA2 LVDSA_DATA3

LVDSB_CLK# LVDSB_CLK

LVDSB_DATA#0 LVDSB_DATA#1 LVDSB_DATA#2 LVDSB_DATA#3

LVDSB_DATA0 LVDSB_DATA1 LVDSB_DATA2 LVDSB_DATA3

CRT_BLUE CRT_GREEN CRT_RED

CRT_DDC_CLK CRT_DDC_DATA

CRT_HSYNC CRT_VSYNC

DAC_IREF CRT_IRTN

3

SDVO_INTN SDVO_INTP

DDPB_HPD

DDPB_0N DDPB_0P DDPB_1N DDPB_1P DDPB_2N DDPB_2P DDPB_3N DDPB_3P

DDPC_HPD

DDPC_0N DDPC_0P DDPC_1N DDPC_1P DDPC_2N DDPC_2P DDPC_3N DDPC_3P

DDPD_HPD

DDPD_0N DDPD_0P DDPD_1N DDPD_1P DDPD_2N DDPD_2P DDPD_3N DDPD_3P

BJ46 BG46

BJ48 BG48

BF45 BH45

T51 T53

BG44 BJ44 AU38

BD42 BC42 BJ42 BG42 BB40 BA40 AW38 BA38

Y49 AB49

BE44 BD44 AV40

BE40 BD40 BF41 BH41 BD38 BC38 BB36 BA36

U50 U52

BC46 BD46 AT38

BJ40 BG40 BJ38 BG38 BF37 BH37 BE36 BD36

SDVO_TVCLKINN

SDVO_TVCLKINP

SDVO_STALLN SDVO_STALLP

SDVO_CTRLCLK

SDVO_CTRLDATA

DDPB_AUXN DDPB_AUXP

LVDS

DDPC_CTRLCLK

DDPC_CTRLDATA

DDPC_AUXN

DDPC_AUXP

Digital Display Interface

DDPD_CTRLCLK

DDPD_CTRLDATA

DDPD_AUXN

DDPD_AUXP

CRT

SDVO_TVCKN SDVO_TVCKP

SDVO_STALLN SDVO_STALLP

SDVO_INTN SDVO_INTP

SDVO_CTRL_CLK SDVO_CTRL_DATA

DPB_HPD

SDVOR-DPB_LANE0_N SDVOR-DPB_LANE0_P SDVOG-DPB_LANE1_N SDVOG-DPB_LANE1_P SDVOB-DPB_LANE2_N SDVOB-DPB_LANE2_P SDVOCLK-DPB_LANE3_N SDVOCLK-DPB_LANE3_P

DPC_AUXN DPC_AUXP

DPC_HPD

DPD_CTRLCK DPD_CTRLDAT

DPD_AUX_N DPD_AUX_P

DPD_HPD_Q

TP111TP111 TP112TP112

TP113TP113 TP114TP114

TP115TP115 TP116TP116

TP244TP244 TP245TP245

TP247TP247 TP246TP246

2

TP258TP258 TP259TP259

TP260TP260 TP261TP261

TP262TP262 TP263TP263 TP264TP264 TP265TP265 TP266TP266 TP267TP267 TP268TP268

DPC_CTRL_CLK (24) DPC_CTRL_DATA (24)

DPC_HPD (24)

DPC_LANE0_N (24) DPC_LANE0_P (24) DPC_LANE1_N (24) DPC_LANE1_P (24) DPC_LANE2_N (24) DPC_LANE2_P (24) DPC_LANE3_N (24) DPC_LANE3_P (24)

DPD_AUX_N (24) DPD_AUX_P (24)

DPD_LANE0_N (24) DPD_LANE0_P (24) DPD_LANE1_N (24) DPD_LANE1_P (24) DPD_LANE2_N (24) DPD_LANE2_P (24) DPD_LANE3_N (24) DPD_LANE3_P (24)

1

+V5S (21,22,24,25,27,28,31,41,42,43,44,45,46,49,50)

G

S

D

DPD_HPD_Q DPD_HPD_R DPD_HPD

R134

R134 100KR0402

CRT_BLUE

R135 150R1%0402R135 150R1%0402

CRT_GREEN

R136 150R1%0402R136 150R1%0402

A A

DPB_HPD DPC_HPD

R55 100KR0402R55 100KR0402 R332 100KR0402R332 100KR0402

5

R137 150R1%0402R137 150R1%0402

CRT_RED

Place the 3 resistors close to PCH

4

3

100KR0402

EMERALD BAY

Title

Size Document Number Rev

A

Date: Sheet

D

Q8

Q8 N-BSS138LT1G_SOT23-3-RH

N-BSS138LT1G_SOT23-3-RH

IBEXPEAK (4 of 9)

2

R133 0R0402R133 0R0402

DPD_HPD (24)

18 53Thursday, September 25, 2008

1

Intel Confidential

of

A

5

TP177TP177 TP178TP178 TP179TP179 TP180TP180 TP183TP183 TP184TP184 TP181TP181 TP182TP182 TP187TP187 TP192TP192 TP185TP185 TP186TP186

D D

TP190TP190 TP191TP191 TP188TP188 TP189TP189 TP195TP195 TP200TP200 TP193TP193 TP194TP194 TP198TP198 TP199TP199 TP196TP196 TP197TP197 TP203TP203 TP208TP208 TP201TP201 TP202TP202 TP206TP206 TP207TP207 TP204TP204 TP205TP205

TP211TP211 TP212TP212 TP209TP209 TP210TP210

C C

PCH_GPIO53(48) PCI_GNT_L3(48)

B B

CLK_PCI_SIO(36) CLK_PCI_FB(16)

CLK_PCIF_PORT80(36)

CLK_PCI_SIO CLK_PCI_FB

CLK_PCIF_PORT80

PLT_RST_L(11,29,32,35,36,37,45,50)

C252

C271

X_C10p25N0402-RH-3

PCH_GPIO53 PCI_GNT_L3

TP213TP213

R142 47R0402R142 47R0402 R143 51R1%0402R143 51R1%0402

R145 47R0402R145 47R0402 C249

C249

X_C10p25N0402-RH-3

PLT_RST_L

4

AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31

C_BE0 C_BE1 C_BE2 C_BE3

INT_PIRQA_L INT_PIRQB_L INT_PIRQC_L INT_PIRQD_L

PCI_REQ_L0 PCI_REQ_L1 PCI_REQ_L2 PCI_REQ_L3

PCI_GNT_L0 PCI_GNT_L1

INT_PIRQE_L INT_PIRQF_L INT_PIRQG_L INT_PIRQH_L

PCIRST_L

PCI_SERR_L PCI_PERR_L

PCI_IRDY_L PCI_DEVSEL_L

PCI_FRAME_L PCI_LOCK_L PCI_STOP_L

PCI_TRDY_L PCI_PME_L

CLKOUT_PCI0 CLKOUT_PCI1

CLKOUT_PCI3

H40 N34 C44

A38

C36

J34 A40

D45

E36

H48

E40 C40 M48 M45

F53 M40 M43

J36

K48

F40 C42

K46 M51

J52

K51

L34

F42

J40 G46

F44 M47 H36

J50 G42 H47 G34

G38 H51

B37

A44

F51

A46

B45 M53

F48

K45

F36 H53

B41

K53

A36

A48

K6

E44

E50

A42 H44

F46 C46

D49 D41

C48

M7 D5

N52

P53

P46

P51

P48

AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31

C/BE0# C/BE1# C/BE2# C/BE3#

PIRQA# PIRQB# PIRQC# PIRQD#

REQ0# REQ1# / GPIO50 REQ2# / GPIO52 REQ3# / GPIO54

GNT0# GNT1# / GPIO51 GNT2# / GPIO53 GNT3# / GPIO55

PIRQE# / GPIO2 PIRQF# / GPIO3 PIRQG# / GPIO4 PIRQH# / GPIO5

PCIRST# SERR#

PERR#

IRDY# PAR DEVSEL# FRAME#

PLOCK# STOP#

TRDY# PME# PLTRST# CLKOUT_PCI0

CLKOUT_PCI1 CLKOUT_PCI2 CLKOUT_PCI3 CLKOUT_PCI4

U3E

IbexPeak-M_Rev0_9

PCI

NV_CE#0 NV_CE#1 NV_CE#2 NV_CE#3

NV_DQS0 NV_DQS1

NV_DQ0 / NV_IO0 NV_DQ1 / NV_IO1 NV_DQ2 / NV_IO2 NV_DQ3 / NV_IO3 NV_DQ4 / NV_IO4 NV_DQ5 / NV_IO5 NV_DQ6 / NV_IO6 NV_DQ7 / NV_IO7 NV_DQ8 / NV_IO8

NV_DQ9 / NV_IO9 NV_DQ10 / NV_IO10 NV_DQ11 / NV_IO11

NVRAM

NV_DQ12 / NV_IO12 NV_DQ13 / NV_IO13 NV_DQ14 / NV_IO14 NV_DQ15 / NV_IO15

NV_ALE NV_CLE

NV_RCOMP

NV_RB#

NV_WR#0_RE# NV_WR#1_RE#

NV_WE#_CK0 NV_WE#_CK1

USBP0N

USBP0P

USBP1N

USBP1P

USBP2N

USBP2P

USBP3N

USBP3P

USBP4N

USBP4P

USBP5N

USBP5P

USBP6N

USBP6P

USBP7N

USBP7P

USBP8N

USBP8P

USBP9N

USBP9P

USB

USBP10N USBP10P USBP11N USBP11P USBP12N USBP12P USBP13N USBP13P

USBRBIAS#

USBRBIAS

OC0# / GPIO59 OC1# / GPIO40 OC2# / GPIO41 OC3# / GPIO42 OC4# / GPIO43

OC5# / GPIO9 OC6# / GPIO10 OC7# / GPIO14

AY9 BD1 AP15 BD8

AV9 BG8

AP7 AP6 AT6 AT9 BB1 AV6 BB3 BA4 BE4 BB6 BD6 BB7 BC8 BJ8 BJ6 BG6

BD3 AY6

AU2 AV7 AY8

AY5 AV11

BF5

H18 J18 A18 C18 N20 P20 J20 L20 F20 G20 A20 C20 M22 N22 B21 D21 H22 J22 E22 F22 A22 C22 G24 H24 L24 M24 A24 C24

B25 D25

N16 J16 F16 L16 E14 G16 F12 T15

3

NV_CE_L0 NV_CE_L1 NV_CE_L2 NV_CE_L3

NV_DQS0 NV_DQS1

NV_DQ0 NV_DQ1 NV_DQ2 NV_DQ3 NV_DQ4 NV_DQ5 NV_DQ6 NV_DQ7 NV_DQ8 NV_DQ9 NV_DQ10 NV_DQ11 NV_DQ12 NV_DQ13 NV_DQ14 NV_DQ15

NV_RCOMP

NV_R_B_L

NV_WEL_CK0 NV_WEL_CK1

USB_PN0 USB_PP0 USB_PN1 USB_PP1 USB_PN2 USB_PP2 USB_PN3 USB_PP3 USB_PN4 USB_PP4 USB_PN5 USB_PP5 USB_PN6 USB_PP6 USB_PN7 USB_PP7 USB_PN8

USB_PP8 USB_PN9 USB_PP9 USB_PN10 USB_PP10 USB_PN11 USB_PP11 USB_PN12 USB_PP12

USB_BIAS

USB_OC_L0 USB_OC_L1 USB_OC_L2 USB_OC_L3 USB_OC_L4 USB_OC_L5 USB_OC_L6 USB_OC_L7

2

NV_CE_L0 (26) NV_CE_L1 (26) NV_CE_L2 (26) NV_CE_L3 (26)

NV_DQS0 (26) NV_DQS1 (26)

NV_DQ0 (26) NV_DQ1 (26) NV_DQ2 (26) NV_DQ3 (26) NV_DQ4 (26) NV_DQ5 (26) NV_DQ6 (26) NV_DQ7 (26) NV_DQ8 (26) NV_DQ9 (26) NV_DQ10 (26) NV_DQ11 (26) NV_DQ12 (26) NV_DQ13 (26) NV_DQ14 (26) NV_DQ15 (26)

NV_ALE (26,48) NV_CLE (26,48)

NV_R_B_L (26) NV_RE_WRL0 (26)

NV_RE_WRL1 (26) NV_WEL_CK0 (26)

NV_WEL_CK1 (26)

USB_PN0 (27) USB_PP0 (27) USB_PN1 (27) USB_PP1 (27) USB_PN2 (28) USB_PP2 (28) USB_PN3 (28) USB_PP3 (28) USB_PN4 (28) USB_PP4 (28) USB_PN5 (28) USB_PP5 (28) USB_PN6 (29) USB_PP6 (29) USB_PN7 (29) USB_PP7 (29) USB_PN8 (27) USB_PP8 (27)

TP238TP238 TP248TP248 TP249TP249 TP250TP250 TP251TP251 TP252TP252 TP253TP253 TP254TP254

USB_OC_L0 (27,35) USB_OC_L1 (28,35) USB_OC_L2 (35) USB_OC_L3 (28,35) USB_OC_L4 (28,35) USB_OC_L5 (28,35) USB_OC_L6 (35) USB_OC_L7 (27,35)

R138

32.4R1%0402-RH

to rear IO

to PIN header

to mini pcie to rear IO

R139

22.6R1%0402

USB_OC_L6

USB_OC_L5

1

+V3.3A(4,15,16,17,20,22,27,28,29,32,34,36,37,38,39,45,46)

R140 10KR0402R140 10KR0402

R144 10KR0402R144 10KR0402

NO_STUFF

PCI_GNT_L0

Boot BIOS LocationPCI_GNT_L0 LPC0 Reserved PCI

PCI_GNT_L1

R147

R147 X_1KR0402

X_1KR0402

NO_STUFF

19 53Thursday, September 25, 2008

1

R146

R146 X_1KR0402

X_1KR0402

Intel Confidential

of

A

+V3.3S (10,11,13,14,15,16,17,20,21,22,24,25,26,29,30,31,34,35,36,37,40,41,42,43,45,46,49,50)

5

U5

VCC

4

Y

GND

74AHC1G08GW_SOT353-RH

3

A

B

PLT_RST_L

1 2

EMERALD BAY

Title

Size Document Number Rev

A

Date: Sheet

3

Boot BIOS Strap

PCI_GNT_L1

0 1 1 1 SPI

IBEXPEAK (5 of 9)

2

0 1 0

10KR0402

+V3.3S(10,11,13,14,15,16,17,20,21,22,24,25,26,29,30,31,34,35,36,37,40,41,42,43,45,46,49,50)

2 4 6 8 2 4 6 8 2 4 6 8

2 4 6 8 2 4 6 8

BUF_PLT_RST_L(4,36)

Buffer to reduce loading on PLT_RST#.

C127

C127 C0.1u16Y0402

C0.1u16Y0402

R148

R148 100KR0402

100KR0402

4

PCI_IRDY_L INT_PIRQD_L PCI_REQ_L2 PCI_REQ_L1 PCI_SERR_L PCI_DEVSEL_L PCI_LOCK_L PCI_PERR_L PCI_REQ_L0 INT_PIRQB_L INT_PIRQF_L

A A

PCI_REQ_L3 INT_PIRQA_L

PCI_FRAME_L PCI_TRDY_L INT_PIRQH_L INT_PIRQG_L INT_PIRQC_L INT_PIRQE_L PCI_STOP_L

PCI_PME_L

RN1 8P4R-8.2KR0402-1RN1 8P4R-8.2KR0402-1

1 3 5 7

RN2 8P4R-8.2KR0402-1RN2 8P4R-8.2KR0402-1

1 3 5 7

RN3 8P4R-8.2KR0402-1RN3 8P4R-8.2KR0402-1

1 3 5 7

RN4 8P4R-8.2KR0402-1RN4 8P4R-8.2KR0402-1

1 3 5 7

RN5 8P4R-8.2KR0402-1RN5 8P4R-8.2KR0402-1

1 3 5 7

R149

5

GPIO1

DGPU_HPD_INTR_L

GPIO7 HOST_ALERT_L2 PM_LANPHY_ENABLE HOST_ALERT_L1

GPIO16 GPIO17 BIOS_REC TP_GPIO24

SPI_CS_L2 STP_PCI_L

GPIO36 GPIO37

GPIO49

TP_VSS_NCTF1 TP_VSS_NCTF2 TP_VSS_NCTF3 TP_VSS_NCTF4 TP_VSS_NCTF5 TP_VSS_NCTF6 TP_VSS_NCTF7 TP_VSS_NCTF8 TP_VSS_NCTF9 TP_VSS_NCTF10 TP_VSS_NCTF11 TP_VSS_NCTF12 TP_VSS_NCTF13 TP_VSS_NCTF14 TP_VSS_NCTF15 TP_VSS_NCTF16 TP_VSS_NCTF17 TP_VSS_NCTF18 TP_VSS_NCTF19 TP_VSS_NCTF20 TP_VSS_NCTF21 TP_VSS_NCTF22 TP_VSS_NCTF23 TP_VSS_NCTF24 TP_VSS_NCTF25 TP_VSS_NCTF26 TP_VSS_NCTF27 TP_VSS_NCTF28 TP_VSS_NCTF29 TP_VSS_NCTF30 TP_VSS_NCTF31

GPIO0

GPIO27

GPIO35

MFG_MODE CRB_SV_DET

SV_SET_UP

GPIO57

AB12

AB13

BE53 BF53

BH52 BH53

GPIO0(35)

HOST_ALERT_L2(29)

PM_LANPHY_ENABLE(32)

R161

R161 10KR0402

10KR0402

HOST_ALERT_L1(29)

SPI_CS_L2(35) STP_PCI_L(34)

R162

R162 10KR0402

10KR0402

PCH_GPIO45

PCH_GPIO46

GPIO16(35)

GPIO36(35) GPIO37(35)

GPIO49(35)

TP145TP145 TP146TP146 TP147TP147

TP155TP155 TP156TP156 TP157TP157 TP158TP158

TP165TP165 TP166TP166 TP167TP167 TP168TP168

TP173TP173

TP176TP176

TP148TP148 TP149TP149 TP150TP150 TP151TP151 TP152TP152

TP154TP154

TP159TP159

TP162TP162 TP163TP163 TP164TP164

TP169TP169 TP170TP170

TP172TP172 TP174TP174

TP175TP175

PLL On DIE VR Enable R156

D D

Stuff : Disable PLL On DIE

GPIO27

No Stuff : Enable PLL On DIE

NO_STUFF

R156

R156 X_10KR0402

X_10KR0402

,28,29,32,34,36,37,38,39,45,46

+V3.3A

C C

B B

4

U3F

Y3

BMBUSY# / GPIO0

C38

TACH1 / GPIO1

D37

TACH2 / GPIO6

J32

TACH3 / GPIO7

F10

GPIO8

K9

LAN_PHY_PWR_CTRL / GPIO12

T7

GPIO15

AA2

SATA4GP / GPIO16

F38

TACH0 / GPIO17

Y7

SCLOCK / GPIO22

H10

MEM_LED / GPIO24 GPIO27

V13

GPIO28

M11

STP_PCI# / GPIO34

V6

SATACLKREQ# / GPIO35

AB7

SATA2GP / GPIO36 SATA3GP / GPIO37

V3

SLOAD / GPIO38

P3

SDATAOUT0 / GPIO39

H3

PCIECLKRQ6# / GPIO45

F1

PCIECLKRQ7# / GPIO46

AB6

SDATAOUT1 / GPIO48

AA4

SATA5GP / GPIO49

F8

GPIO57

A4

VSS_NCTF_1

A49

VSS_NCTF_2

A5

VSS_NCTF_3

A50

VSS_NCTF_4

A52

VSS_NCTF_5

A53

VSS_NCTF_6

B2

VSS_NCTF_7

B4

VSS_NCTF_8

B52

VSS_NCTF_9

B53

VSS_NCTF_10

BE1

VSS_NCTF_11 VSS_NCTF_12

BF1

VSS_NCTF_13 VSS_NCTF_14

BH1

VSS_NCTF_15

BH2

VSS_NCTF_16 VSS_NCTF_17 VSS_NCTF_18

BJ1

VSS_NCTF_19

BJ2

VSS_NCTF_20

BJ4

VSS_NCTF_21

BJ49

VSS_NCTF_22

BJ5

VSS_NCTF_23

BJ50

VSS_NCTF_24

BJ52

VSS_NCTF_25

BJ53

VSS_NCTF_26

D1

VSS_NCTF_27

D2

VSS_NCTF_28

D53

VSS_NCTF_29

E1

VSS_NCTF_30

E53

VSS_NCTF_31

IbexPeak-M_Rev0_9

MISC

CLKOUT_BCLK0_N / CLKOUT_PCIE8N

CLKOUT_BCLK0_P / CLKOUT_PCIE8P

GPIO

CPU

NCTF

RSVD

CLKOUT_PCIE6N CLKOUT_PCIE6P

CLKOUT_PCIE7N CLKOUT_PCIE7P

A20GATE

PECI

RCIN#

PROCPWRGD

THRMTRIP#

TP10 TP11 TP12 TP13 TP14 TP15 TP16 TP17 TP18 TP19 NC_1 NC_2 NC_3 NC_4 NC_5

INIT3_3V#

TP24

3

TP_CLKOUT_SRC6N

AH45

TP_CLKOUT_SRC6P

AH46

TP_CLKOUT_SRC7N

AF48

TP_CLKOUT_SRC7P

AF47

U2

CK_BCK0_N

AM3 AM1

H_PECI_R

BG10 T1 BE10 BD10

BA22

TP1

AW22

TP2

BB22

TP3

AY45

TP4

AY46

TP5

AV43

TP6

AV45

TP7

AF13

TP8

M18

TP9

N18 AJ24 AK41 AK42 M32 N32 M30 N30 H12 AA23 AB45 AB38 AB42 AB41 T39

P6 C10

R572 0R0402R572 0R0402

CK_BCK0_P CLK_MCP_BCLK

R573 0R0402R573 0R0402 R153 0R0402R153 0R0402

H_RCIN_L

PCH_THRMTRIPL_R

TP1_PCH TP2_PCH TP3_PCH TP4_PCH TP5_PCH TP6_PCH TP7_PCH TP8_PCH TP9_PCH TP10_PCH TP11_PCH TP12_PCH TP13_PCH TP14_PCH TP15_PCH TP16_PCH TP17_PCH TP18_PCH TP19_PCH TP_PCH_NC1 TP_PCH_NC2 TP_PCH_NC3 TP_PCH_NC4 TP_PCH_NC5

INIT3_3V_L TP_PCH_SST

TP117TP117 TP118TP118

TP119TP119 TP120TP120

TP121TP121 TP122TP122 TP123TP123 TP124TP124 TP125TP125 TP126TP126 TP127TP127 TP128TP128 TP129TP129 TP130TP130 TP131TP131 TP132TP132

TP133TP133 TP134TP134 TP135TP135 TP136TP136 TP137TP137 TP138TP138 TP139TP139 TP140TP140 TP141TP141 TP142TP142 TP143TP143TP171TP171

TP240TP240 TP144TP144

CLK_MCP_BCLK_L

NO_STUFF

R172

R172 X_3.01KR1%0402

X_3.01KR1%0402

H_A20GATE (36)

CLK_MCP_BCLK_L (4) CLK_MCP_BCLK (4)

H_PECI (4)

H_RCIN_L (36)

H_CPUPWRGD (4,11)

2

HOST_ALERT_L1

HOST_ALERT_L2

SPI_CS_L2

+V1.1S_VTT(4,6,7,11,21,22,34,40,41,42,43)

R155

56R0402

R15754.9R1%0402 R15754.9R1%0402

H_THRMTRIP_L (4)

GPIO57

H_RCIN_L

GPIO36 DGPU_HPD_INTR_L GPIO37 GPIO35 GPIO16 GPIO0 MFG_MODE SV_SET_UP GPIO1 GPIO7 GPIO49

GPIO17

CRB_SV_DET

NO_STUFF

R173

R173 X_100KR0402

X_100KR0402

1

+V3.3A(4,15,16,17,19,22,27,28,29,32,34,36,37,38,39,45,46)

R150 10KR0402R150 10KR0402

R151 10KR0402R151 10KR0402

R152 10KR0402R152 10KR0402 R154 10KR0402R154 10KR0402

+V3.3S(10,11,13,14,15,16,17,19,21,22,24,25,26,29,30,31,34,35,36,37,40,41,42,43,45,46,49,50)

R158 10KR0402R158 10KR0402

R159 1KR0402R159 1KR0402 R160 10KR0402R160 10KR0402 R163 10KR0402R163 10KR0402 R164 10KR0402R164 10KR0402 R165 10KR0402R165 10KR0402 R166 10KR0402R166 10KR0402 R167 10KR0402R167 10KR0402 R168 10KR0402R168 10KR0402 R169 10KR0402R169 10KR0402 R170 10KR0402R170 10KR0402 R636 10KR0402R636 10KR0402

R171 10KR0402R171 10KR0402

+V3.3S(10,11,13,14,15,16,17,19,21,22,24,25,26,29,30,31,34,35,36,37,40,41,42,43,45,46,49,50)

R83 10KR0402R83 10KR0402

+V3.3S(10,11,13,14,15,16,17,19,21,22,24,25,26,29,30,31,34,35,36,37,40,41,42,43,45,46,49,50)

R174

R174 10KR0402

10KR0402

J4

1 2

A A

J4(1-X)

JUMPER-1X2A_red

5

H1X2M_BLACK-RH

4

BIOS_REC

J4 - BIOS RECOVERY DISABLE -- (1- X) DEFAULT ENABLE -- (1-2)

Intel Confidential

EMERALD BAY

Title

IBEXPEAK (6 of 9)

Size Document Number Rev

A

Date: Sheet

3

2

Intel Confidential

A

of

20 53Thursday, September 25, 2008

1

5

)

0

4

3

2

1

D D

+V1.1S(15,16,17,22,40,42,43,46)

+V1.1S_VCCAPLL_EXP_R1

C C

+V3.3S

6,49,5

+V1.1S

3,46

B B

+V1.1S(15,16,17,22,40,42,43,46)

L4

L4 X_1u400mA-RH

X_1u400mA-RH

NO_STUFF

C136

C136 C10u6.3X50805-1

C10u6.3X50805-1

C143

C143 X_C10u6.3X50805-1

X_C10u6.3X50805-1

C137

C137 C0.1u16Y0402

C0.1u16Y0402

+V1.1S(15,16,17,22,40,42,43,46)

L3

L3 X_1u400mA-RH

X_1u400mA-RH

NO_STUFF

+V1.1S_VCC_EXP(15,16,17,22,40,42,43,46)

C138

C138 C0.1u16Y0402

C0.1u16Y0402

C142

C0.1u16Y0402

+V1.5S_1.8S (22)

+V1.1S_VCCAPLL_FDI

C139

C139 C0.1u16Y0402

C0.1u16Y0402

+V1.1S_PCH_VCC

C128

C128 C0.1u16Y0402

C0.1u16Y0402

+V1.1S_VCCAPLL_EXP

C134

C134 X_C10u6.3X50805-1

X_C10u6.3X50805-1

C140

C140 C0.1u16Y0402

C0.1u16Y0402

U3G

AB24 AB26 AB28 AD26 AD28 AF26 AF28 AF30 AF31 AH26 AH28 AH30 AH31

AJ30 AJ31

AK24

BJ24

AN20 AN22 AN23 AN24 AN26 AN28

BJ26

BJ28 AT26 AT28 AU26 AU28 AV26 AV28

AW26 AW28

BA26 BA28 BB26 BB28 BC26 BC28 BD26 BD28 BE26 BE28 BG26 BG28 BH27

AN30 AN31

AN35

AT22

BJ18

AM23

IbexPeak-M_Rev0_9

U3G

VCCCORE[1] VCCCORE[2] VCCCORE[3] VCCCORE[4] VCCCORE[5] VCCCORE[6] VCCCORE[7] VCCCORE[8] VCCCORE[9] VCCCORE[10] VCCCORE[11] VCCCORE[12] VCCCORE[13] VCCCORE[14] VCCCORE[15]

VCCIO[24]

VCCAPLLEXP

VCCIO[25] VCCIO[26] VCCIO[27] VCCIO[28] VCCIO[29] VCCIO[30] VCCIO[31] VCCIO[32] VCCIO[33] VCCIO[34] VCCIO[35] VCCIO[36] VCCIO[37] VCCIO[38] VCCIO[39] VCCIO[40] VCCIO[41] VCCIO[42] VCCIO[43] VCCIO[44] VCCIO[45] VCCIO[46] VCCIO[47] VCCIO[48] VCCIO[49] VCCIO[50] VCCIO[51] VCCIO[52] VCCIO[53]

VCCIO[54] VCCIO[55]

VCC3_3[1]

VCCVRM[1] VCCFDIPLL VCCIO[1]

POWER

VCC CORE

PCI E*

FDI

+V1.1S(15,16,17,22,40,42,43,46) +V1.5S_1.8S (22)

R176 X_0R0805R176 X_0R0805

VCCADAC[1] VCCADAC[2]

VSSA_DAC[1]

CRTLVDS

VSSA_DAC[2]

VCCALVDS

VSSA_LVDS

VCCTX_LVDS[1] VCCTX_LVDS[2] VCCTX_LVDS[3] VCCTX_LVDS[4]

VCC3_3[2] VCC3_3[3] VCC3_3[4]

HVCMOS

VCCVRM[2]

VCCDMI[1]

DMI

VCCDMI[2]

VCCPNAND[1] VCCPNAND[2] VCCPNAND[3] VCCPNAND[4] VCCPNAND[5] VCCPNAND[6] VCCPNAND[7] VCCPNAND[8] VCCPNAND[9]

VCCME3_3[1]

NAND / SPI

VCCME3_3[2] VCCME3_3[3] VCCME3_3[4]

AE50 AE52 AF53 AF51

AH38 AH39

AP43 AP45 AT46 AT45

AB34 AB35 AD35

AT24

AT16 AU16

AM16 AK16 AK20 AK19 AK15 AK13 AM12 AM13 AM15

AM8 AM9 AP11 AP9

C135

C1u10Y0402-RH

C141

C1u10Y0402-RH

C144

C1u10Y0402-RH

C145

C1u10Y0402-RH

+VCCA_DAC_1_2

C129

C129 C0.01u10X0402-RH

C0.01u10X0402-RH

VCCTX_LVD_J

C131

C131 C0.01u10X0402-RH

C0.01u10X0402-RH

C130

C130 C0.1u16Y0402

C0.1u16Y0402

+V3.3S(10,11,13,14,15,16,17,19,20,22,24,25,26,29,30,31,34,35,36,37,40,41,42,43,45,46,49,50)

C221

C221 C0.01u10X0402-RH

C0.01u10X0402-RH

L1 10u100mA_0805-RHL1 10u100mA_0805-RH

+V1.5S_1.8S (22)

+V1.1S_VTT(4,6,7,11,20,22,34,40,41,42,43)

+V1.8S (7,26,40,43,46,48)

+V3.3M(32,33,43,45,46)

C1u10Y0402-RH

NO_STUFF

+V3.3S_LDO

L2

0.1u300mA-RH

C133

C133 C22u6.3X50805-RH

C22u6.3X50805-RH

+V5S (18,22,24,25,27,28,31,41,42,43,44,45,46,49,50)

C146

+V1.8S (7,26,40,43,46,48)

+V3.3S(10,11,13,14,15,16,17,19,20,22,24,25,26,29,30,31,34,35,36,37,40,41,42,43,45,46,49,50)

4

5

IN

OUT

SHDN1GND2ADJ

3

LDO_ADJ2

LDO_SHDN

R177

R177 100R0402

100R0402

U6

SC1563ISK-2.5TRT_SOT23-5-RH

R175

17.8KR1%0402

R178

R178 10KR1%0402

10KR1%0402

C147

C147 C22u6.3X50805-RH

C22u6.3X50805-RH

+V3.3S_LDO

C148

C148 C0.1u16Y0402

C0.1u16Y0402

A A

5

4

+V1.5S (29,31,43,45,46)

+V1.8S(7,26,40,43,46,48)

NO_STUFF

R179 X_0R0805R179 X_0R0805

R180 0R0805R180 0R0805

+V1.5S_1.8S (22)

3

EMERALD BAY

Title

IBEXPEAK (7 of 9)

Size Document Number Rev

A

Date: Sheet

2

Intel Confidential

A

of

21 53Thursday, September 25, 2008

1

5

0

+V1.1S(15,16,17,21,40,42,43,46)

L5 X_10u100mA_0805-RHL5 X_10u100mA_0805-RH

C149

+V1.1M(15,40,43,46)

C157

TP241TP241

C149 X_C10u6.3X50805-1

X_C10u6.3X50805-1

NO_STUFF

+V1.1M(15,40,43,46)

C152

C152 C0.1u16Y0402

D D

+V1.1M(15,40,43,46)

C0.1u16Y0402

C155

C155 C0.1u16Y0402

C0.1u16Y0402

+V1.5S_1.8S(21)

+V1.1S_VCCA_CLK

TP_PCH_DSW

C159

C159 C0.1u16Y0402

C0.1u16Y0402

C150

C150 X_C1u6.3Y0402-RH

X_C1u6.3Y0402-RH

+VCCRTCEXT

C C

C0.1u16Y0402

C168

C0.1u16Y0402

+V1.1S_VCCA_A_DPL

+V1.1S_VCCA_B_DPL

C163

C164

C1u10Y0402-RH

+VCCSST

+V1.1A_INT_VCCSUS

C169

+V1.1S(15,16,17,21,40,42,43,46)

C162

C1u10Y0402-RH

+V3.3A(4,15,16,17,19,20,27,28,29,32,34,36,37,38,39,45,46)

C0.1u16Y0402

B B

C175

C0.1u16Y0402

+V3.3S

C0.1u16Y0402

C171

C0.1u16Y0402

C173

C0.1u16Y0402

C174

C0.1u16Y0402

C176

+V3.3S_VCCPCORE

1,24,25,26,29,30,31,34,35,36,37,40,41,42,43,45,46,49,5

+V1.1S_VTT(4,6,7,11,20,21,34,40,41,42,43)

C172

C4.7u6.3X5-1

+V3.3A_RTC(15,36)

A A

5

AP51 AP53

AF23 AF24

Y20

AD38 AD39 AD41 AF43 AF41 AF42

V39 V41 V42 Y39 Y41 Y42

V9

AU24

BB51 BB53

BD51 BD53

AH23

AJ35

AH35 AF34 AH34 AF32

V12

Y22

P18 U19 U20 U22

V15

V16

Y16

AT18

AU18

A12

IbexPeak-M_Rev0_9

4

U3J

VCCACLK[1] VCCACLK[2]

VCCLAN[1] VCCLAN[2]

DCPSUSBYP

VCCME[1] VCCME[2] VCCME[3] VCCME[4] VCCME[5] VCCME[6] VCCME[7] VCCME[8] VCCME[9] VCCME[10] VCCME[11] VCCME[12]

DCPRTC

VCCVRM[3]

VCCADPLLA[1] VCCADPLLA[2]

VCCADPLLB[1] VCCADPLLB[2]

VCCIO[21] VCCIO[22] VCCIO[23]

VCCIO[2] VCCIO[3] VCCIO[4] DCPSST

DCPSUS

VCCSUS3_3[29] VCCSUS3_3[30] VCCSUS3_3[31] VCCSUS3_3[32]

VCC3_3[5] VCC3_3[6] VCC3_3[7]

V_CPU_IO[1]

V_CPU_IO[2]

VCCRTC

+V1.1S(15,16,17,21,40,42,43,46)

4

POWER

V24

VCCIO[5]

V26

VCCIO[6]

Y24

VCCIO[7]

Y26

VCCIO[8]

VCCIO[56]

V5REF_SUS

V5REF

VCC3_3[8]

VCC3_3[9] VCC3_3[10] VCC3_3[11] VCC3_3[12] VCC3_3[13]

VCC3_3[14]

VCCIO[9]

VCCVRM[4]

VCCIO[10]

VCCIO[11]

VCCIO[12]

VCCIO[13]

VCCIO[14]

VCCIO[15]

VCCIO[16]

VCCIO[17]

VCCIO[18]

VCCIO[19]

VCCIO[20] VCCME[13]

VCCME[14] VCCME[15] VCCME[16]

V28 U28 U26 U24 P28 P26 N28 N26 M28 M26 L28 L26 J28 J26 H28 H26 G28 G26 F28 F26 E28 E26 C28 C26 B27 A28 A26

U23 V23 F24

K49

J38 L38 M36 N36 P36 U35

AD13

AK3 AK1

AH22

AT20

AH19 AD20 AF22 AD19

AF20 AF19 AH20

AB19 AB20 AB22 AD22

AA34 Y34 Y35 AA35

L30

VCCSUS3_3[1] VCCSUS3_3[2] VCCSUS3_3[3] VCCSUS3_3[4] VCCSUS3_3[5] VCCSUS3_3[6] VCCSUS3_3[7] VCCSUS3_3[8]

VCCSUS3_3[9] VCCSUS3_3[10] VCCSUS3_3[11] VCCSUS3_3[12] VCCSUS3_3[13]

USB

VCCSUS3_3[14] VCCSUS3_3[15] VCCSUS3_3[16] VCCSUS3_3[17] VCCSUS3_3[18] VCCSUS3_3[19] VCCSUS3_3[20] VCCSUS3_3[21] VCCSUS3_3[22] VCCSUS3_3[23] VCCSUS3_3[24] VCCSUS3_3[25] VCCSUS3_3[26] VCCSUS3_3[27]

VCCSUS3_3[28]

Clock and Miscellaneous

PCI/GPIO/LPC

VCCSATAPLL[1] VCCSATAPLL[2]

SATA

PCI/GPIO/LPC

CPU

HDA

VCCSUSHDA

+

12

EC27

EC27 C220u2.5SO-RH-1

C220u2.5SO-RH-1

+

12

EC28

EC28 C220u2.5SO-RH-1

C220u2.5SO-RH-1

RTC

L7 10u100mA_0805-RHL7 10u100mA_0805-RH

L8 10u100mA_0805-RHL8 10u100mA_0805-RH

C151

C1u10Y0402-RH

C153

C153 C0.022u16X0402

C0.022u16X0402

+V5A_PCH_VCC5REFSUS

C160

C160 C0.1u16Y0402

C0.1u16Y0402

C165

C0.1u16Y0402

+V1.5S_1.8S(21)

C177

C1u10Y0402-RH

+V1.1S_VCCA_A_DPL

C179

C1u10Y0402-RH

+V1.1S_VCCA_B_DPL

C181

C1u10Y0402-RH

3

C0.1u16Y0402

3

+V3.3A(4,15,16,17,19,20,27,28,29,32,34,36,37,38,39,45,46)

C161

+V1.1S_VCCAPLL_L

C166

C166 X_C1u6.3Y0402-RH

X_C1u6.3Y0402-RH

+V1.1M(15,40,43,46)

+V1.1S_VCCUSBCORE

C154

C154 C0.1u16Y0402

C0.1u16Y0402

C156

C156 C0.1u16Y0402

C0.1u16Y0402

+V5S_PCH_VCC5REF

C167

C167 X_C10u6.3X50805-1

X_C10u6.3X50805-1

C158

L6

+V1.1S(15,16,17,21,40,42,43,46)

+V3.3A(4,15,16,17,19,20,27,28,29,32,34,36,37,38,39,45,46)

+V1.1S(15,16,17,21,40,42,43,46)

X_10u100mA_0805-RH

2

+V3.3S(10,11,13,14,15,16,17,19,20,21,24,25,26,29,30,31,34,35,36,37,40,41,42,43,45,46,49,50)

+V3.3A(4,15,16,17,19,20,27,28,29,32,34,36,37,38,39,45,46)

D3

D3 S-BAT54A_SOT23

S-BAT54A_SOT23

YZX

+V3.3S(10,11,13,14,15,16,17,19,20,21,24,25,26,29,30,31,34,35,36,37,40,41,42,43,45,46,49,50)

+V5A (16,27,28,31,33,38,39,40,45)

R181

10R0402-1

+V1.1S_VCCAPLL

+V1.1S(15,16,17,21,40,42,43,46)

D2

D2 S-BAT54A_SOT23

S-BAT54A_SOT23

YZX

1

R182

10R0402-1

+V5S(18,21,24,25,27,28,31,41,42,43,44,45,46,49,50)

NO_STUFF

+V1.1S_VCC_SATA

C170

C1u10Y0402-RH

+V3.3A(4,15,16,17,19,20,27,28,29,32,34,36,37,38,39,45,46)

EMERALD BAY

Title

IBEXPEAK (8 of 9)

Size Document Number Rev

A

Date: Sheet

2

+V1.1S(15,16,17,21,40,42,43,46)

Intel Confidential

of

22 53Thursday, September 25, 2008

1

A

5

U3H

AB16

VSS[0]

AA19

VSS[1]

AA20

VSS[2]

AA22

VSS[3]

AM19

VSS[4]

AA24

VSS[5]

AA26

VSS[6]

AA28

VSS[7]

AA30

VSS[8]

AA31

VSS[9]

D D

C C

B B

AA32

VSS[10]

AB11

VSS[11]

AB15

VSS[12]

AB23

VSS[13]

AB30

VSS[14]

AB31

VSS[15]

AB32

VSS[16]

AB39

VSS[17]

AB43

VSS[18]

AB47

VSS[19]

AB5

VSS[20]

AB8

VSS[21]

AC2

VSS[22]

AC52

VSS[23]

AD11

VSS[24]

AD12

VSS[25]

AD16

VSS[26]

AD23

VSS[27]

AD30

VSS[28]

AD31

VSS[29]

AD32

VSS[30]

AD34

VSS[31]

AU22

VSS[32]

AD42

VSS[33]

AD46

VSS[34]

AD49

VSS[35]

AD7

VSS[36]

AE2

VSS[37]

AE4

VSS[38]

AF12

VSS[39]

Y13

VSS[40]

AH49

VSS[41]

AU4

VSS[42]

AF35

VSS[43]

AP13

VSS[44]

AN34

VSS[45]

AF45

VSS[46]

AF46

VSS[47]

AF49

VSS[48]

AF5

VSS[49]

AF8

VSS[50]

AG2

VSS[51]

AG52

VSS[52]

AH11

VSS[53]

AH15

VSS[54]

AH16

VSS[55]

AH24

VSS[56]

AH32

VSS[57]

AV18

VSS[58]

AH43

VSS[59]

AH47

VSS[60]

AH7

VSS[61]

AJ19

VSS[62]

AJ2

VSS[63]

AJ20

VSS[64]

AJ22

VSS[65]

AJ23

VSS[66]

AJ26

VSS[67]

AJ28

VSS[68]

AJ32

VSS[69]

AJ34

VSS[70]

AT5

VSS[71]

AJ4

VSS[72]

AK12

VSS[73]

AM41

VSS[74]

AN19

VSS[75]

AK26

VSS[76]

AK22

VSS[77]

AK23

VSS[78]

AK28

VSS[79]

IbexPeak-M_Rev0_9

VSS[80] VSS[81] VSS[82] VSS[83] VSS[84] VSS[85] VSS[86] VSS[87] VSS[88] VSS[89] VSS[90] VSS[91] VSS[92] VSS[93] VSS[94] VSS[95] VSS[96] VSS[97] VSS[98]

VSS[99] VSS[100] VSS[101] VSS[102] VSS[103] VSS[104] VSS[105] VSS[106] VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158]

AK30 AK31 AK32 AK34 AK35 AK38 AK43 AK46 AK49 AK5 AK8 AL2 AL52 AM11 BB44 AD24 AM20 AM22 AM24 AM26 AM28 BA42 AM30 AM31 AM32 AM34 AM35 AM38 AM39 AM42 AU20 AM46 AV22 AM49 AM7 AA50 BB10 AN32 AN50 AN52 AP12 AP42 AP46 AP49 AP5 AP8 AR2 AR52 AT11 BA12 AH48 AT32 AT36 AT41 AT47 AT7 AV12 AV16 AV20 AV24 AV30 AV34 AV38 AV42 AV46 AV49 AV5 AV8 AW14 AW18 AW2 BF9 AW32 AW36 AW40 AW52 AY11 AY43 AY47

4

BG12 BB12 BB16 BB20 BB24 BB30 BB34 BB38 BB42 BB49

BC10 BC14 BC18

BC22 BC32 BC36 BC40 BC44 BC52

BD48 BD49

BE12 BE16 BE20 BE24 BE30 BE34 BE38 BE42 BE46 BE48 BE50

BF49 BF51 BG18 BG24

BG50 BH11 BH15 BH19 BH23 BH31 BH35 BH39 BH43 BH47

AF39

AY7 B11 B15 B19 B23 B31 B35 B39 B43 B47

BB5

BC2

BH9

BD5

BE6 BE8 BF3

BG4

BH7 C12 C50 D51 E12 E16 E20 E24 E30 E34 E38 E42 E46 E48

F49 G10

G14 G18

G22 G32 G36 G40 G44 G52

H16 H20 H30 H34 H38 H42

3

U3I

VSS[159] VSS[160] VSS[161] VSS[162] VSS[163] VSS[164] VSS[165] VSS[166] VSS[167] VSS[168]

B7

VSS[169] VSS[170] VSS[171] VSS[172] VSS[173] VSS[174] VSS[175] VSS[176] VSS[177] VSS[178] VSS[179] VSS[180] VSS[181] VSS[182] VSS[183] VSS[184] VSS[185] VSS[186] VSS[187] VSS[188] VSS[189] VSS[190] VSS[191] VSS[192] VSS[193] VSS[194] VSS[195] VSS[196] VSS[197] VSS[198] VSS[199] VSS[200] VSS[201] VSS[202] VSS[203] VSS[204] VSS[205] VSS[206] VSS[207] VSS[208] VSS[209] VSS[210] VSS[211] VSS[212] VSS[213] VSS[214] VSS[215] VSS[216] VSS[217] VSS[218] VSS[219] VSS[220] VSS[221] VSS[222] VSS[223] VSS[224] VSS[225] VSS[226] VSS[227] VSS[228] VSS[229] VSS[230] VSS[231] VSS[232] VSS[233] VSS[234] VSS[235] VSS[236] VSS[237]

E6

VSS[238]

E8

VSS[239] VSS[240]

F5

VSS[241] VSS[242] VSS[243] VSS[244]

G2

VSS[245] VSS[246] VSS[247] VSS[248] VSS[249] VSS[250] VSS[251] VSS[252] VSS[253] VSS[254] VSS[255] VSS[256] VSS[257] VSS[258]

VSS[259] VSS[260] VSS[261] VSS[262] VSS[263] VSS[264] VSS[265] VSS[266] VSS[267] VSS[268] VSS[269] VSS[270] VSS[271] VSS[272] VSS[273] VSS[274] VSS[275] VSS[276] VSS[277] VSS[278] VSS[279] VSS[280] VSS[281] VSS[282] VSS[283] VSS[284] VSS[285] VSS[286] VSS[287] VSS[288] VSS[289] VSS[290] VSS[291] VSS[292] VSS[293] VSS[294] VSS[295] VSS[296] VSS[297] VSS[298] VSS[299] VSS[300] VSS[301] VSS[302] VSS[303] VSS[304] VSS[305] VSS[306] VSS[307] VSS[308] VSS[309] VSS[310] VSS[311] VSS[312] VSS[313] VSS[314] VSS[315] VSS[316] VSS[317] VSS[318] VSS[319] VSS[320] VSS[321] VSS[322] VSS[323] VSS[324] VSS[325] VSS[326] VSS[327] VSS[328] VSS[329] VSS[330] VSS[331] VSS[332] VSS[333] VSS[334] VSS[335] VSS[336] VSS[337] VSS[338] VSS[339] VSS[340] VSS[341] VSS[342] VSS[343] VSS[344] VSS[345] VSS[346] VSS[347] VSS[348] VSS[349] VSS[350] VSS[351] VSS[352] VSS[353] VSS[354] VSS[355] VSS[356] VSS[366]

H49 H5 J24 K11 K43 K47 K7 L14 L18 L2 L22 L32 L36 L40 L52 M12 M16 M20 N38 M34 M38 M42 M46 M49 M5 M8 N24 P11 AD15 P22 P30 P32 P34 P42 P45 P47 R2 R52 T12 T41 T46 T49 T5 T8 U30 U31 U32 U34 P38 V11 P16 V19 V20 V22 V30 V31 V32 V34 V35 V38 V43 V45 V46 V47 V49 V5 V7 V8 W2 W52 Y11 Y12 Y15 Y19 Y23 Y28 Y30 Y31 Y32 Y38 Y43 Y46 P49 Y5 Y6 Y8 P24 T43 AD51 AT8 AD47 Y47 AT12 AM6 AT13 AM5 AK45 AK39 AV14

2

1

IbexPeak-M_Rev0_9

A A

5

4

3

EMERALD BAY

Title

IBEXPEAK (9 of 9)

Size Document Number Rev

A

Date: Sheet

2

Intel Confidential

A

of

23 53Thursday, September 25, 2008

1

5

DISPLAY PORT

DPD_HPD(18)

DPD_LANE0_P DPD_LANE0_N

DPD_LANE1_P DPD_LANE1_N

DPD_LANE2_P DPD_LANE2_N

DPD_LANE3_P DPD_LANE3_N

DPD_AUX_P DPD_AUX_N

DPD_HPD

X_100KR1%0402-RH

NO_STUFF

C194 C0.1u10X0402C194 C0.1u10X0402 C195 C0.1u10X0402C195 C0.1u10X0402

100KR1%0402-RH

R183 0R0402R183 0R0402

R184

DPD_LANE0_P(18) DPD_LANE0_N(18)

DPD_LANE1_P(18) DPD_LANE1_N(18)

DPD_LANE2_P(18) DPD_LANE2_N(18)

DPD_LANE3_P(18) DPD_LANE3_N(18)

D D

DPD_AUX_P(18) DPD_AUX_N(18)

C182 C0.1u10X0402C182 C0.1u10X0402 C183 C0.1u10X0402C183 C0.1u10X0402

C184 C0.1u10X0402C184 C0.1u10X0402 C189 C0.1u10X0402C189 C0.1u10X0402

C190 C0.1u10X0402C190 C0.1u10X0402 C191 C0.1u10X0402C191 C0.1u10X0402

C192 C0.1u10X0402C192 C0.1u10X0402 C193 C0.1u10X0402C193 C0.1u10X0402

DPD_OB_HPD

+V3.3S(10,11,13,14,15,16,17,19,20,21,22,25,26,29,30,31,34,35,36,37,40,41,42,43,45,46,49,50)

R185

R185 100KR1%0402-RH

100KR1%0402-RH

R186

R187

R187 X_100KR1%0402-RH

X_100KR1%0402-RH

C C

DPD_AUXE_P DPD_AUXE_N

NO_STUFF

DPD_L0_P DPD_L0_N

DPD_L1_P DPD_L1_N

DPD_L2_P DPD_L2_N

DPD_L3_P DPD_L3_N

4

DPD_L0_P

DPD_L0_N

DPD_L1_P

DPD_L1_N

DPD_L2_P DPD_OB_LANE2_P

DPD_L3_P DPD_OB_LANE3_P

DPD_AUXE_P DPD_OB_AUX_P

4

1

3

2

4

1

3

2

4

1

3

2

4

1

3

2

3

2

4

1

L9

L9 CMC-L02-9008014-T34

CMC-L02-9008014-T34

L10

L10 CMC-L02-9008014-T34

CMC-L02-9008014-T34

L11

L11 CMC-L02-9008014-T34

CMC-L02-9008014-T34

L12

L12 CMC-L02-9008014-T34

CMC-L02-9008014-T34

CMC-L02-9008014-T34 L13

L13

DPD_OB_LANE0_P

DPD_OB_LANE0_N

DPD_OB_LANE1_P

DPD_OB_LANE1_N

DPD_OB_LANE2_NDPD_L2_N

DPD_OB_LANE3_NDPD_L3_N

DPD_OB_AUX_NDPD_AUXE_N

3

2

+V3.3S(10,11,13,14,15,16,17,19,20,21,22,25,26,29,30,31,34,35,36,37,40,41,42,43,45,46,49,50)

NO_STUFF

C185

C186

X_C0.1u16Y0402

DPD_OB_LANE0_P DPD_OB_LANE0_N

DPD_OB_LANE2_P DPD_OB_LANE3_P

DPD_OB_AUX_P DPD_OB_AUX_N

C187

X_C0.1u16Y0402

614

52

U7 ESD-IP4220U7ESD-IP4220

52

U8 ESD-IP4220U8ESD-IP4220

52

U9 ESD-IP4220U9ESD-IP4220

1

C188

DPD_OB_LANE1_P DPD_OB_LANE1_N

3

DPD_OB_LANE3_NDPD_OB_LANE2_N

3

DPD_OB_HPD

3

ESD DIODE

HDMI LEVEL SHIFTER

U10

+V3.3S(10,11,13,14,15,16,17,19,20,21,22,25,26,29,30,31,34,35,36,37,40,41,42,43,45,46,49,50)

R189

R188

2.2KR0402

DPC_CTRL_CLK(18)

DPC_CTRL_DATA(18)

DPC_HPD(18)

+V3.3S(10,11,13,14,15,16,17,19,20,21,22,25,26,29,30,31,34,35,36,37,40,41,42,43,45,46,49,50)

R193

4.7KR0402

J2A1 (1-2) DEFAULT

4.7KR0402

B B

+V3.3S(10,11,13,14,15,16,17,19,20,21,22,25,26,29,30,31,34,35,36,37,40,41,42,43,45,46,49,50)

R195

R198

R201

X_4.7KR0402

R205

X_4.7KR0402

R199

R200

X_4.7KR0402

R206

R207

X_4.7KR0402

C204 C0.1u10X0402C204 C0.1u10X0402 C205 C0.1u10X0402C205 C0.1u10X0402

C206 C0.1u10X0402C206 C0.1u10X0402 C207 C0.1u10X0402C207 C0.1u10X0402

C208 C0.1u10X0402C208 C0.1u10X0402 C209 C0.1u10X0402C209 C0.1u10X0402

C210 C0.1u10X0402C210 C0.1u10X0402 C211 C0.1u10X0402C211 C0.1u10X0402

R201

R208

X_4.7KR0402

NO_STUFF

R196

R197

4.7KR0402

X_4.7KR0402

HDMIC_LS_I2C_EN_L HDMIC_LS_RT_EN_L HDMIC_LS_PC0 HDMIC_LS_PC1 HDMIC_LS_REXT HDMIC_LS_TEST0 HDMIC_LS_TEST1

A A

DPC_LANE2_P(18) DPC_LANE2_N(18)

DPC_LANE1_P(18) DPC_LANE1_N(18)

DPC_LANE0_P(18) DPC_LANE0_N(18)

DPC_LANE3_P(18) DPC_LANE3_N(18)

X_4.7KR0402

R204

R203

R202

X_4.7KR0402

DPC_HPD

R346

R346 X_4.7KR0402

X_4.7KR0402

NO_STUFF

HDMIC_DATA2_P HDMIC_DATA2_N

HDMIC_DATA1_P HDMIC_DATA1_N

HDMIC_DATA0_P HDMIC_DATA0_N

HDMIC_CLK_P HDMIC_CLK_N

5

HDMIC_DATA2_P HDMIC_DATA2_N

HDMIC_DATA1_P HDMIC_DATA1_N

HDMIC_DATA0_P HDMIC_DATA0_N

HDMIC_CLK_P HDMIC_CLK_N

DPC_CTRL_CLK DPC_CTRL_DATA

R192 0R0402R192 0R0402

HDMIC_LS_OE_L

HDMIC_HPD_LS

HDMIC_LS_I2C_EN_L

HDMIC_LS_RT_EN_L HDMIC_LS_PC0

HDMIC_LS_PC1 HDMIC_LS_REXT

HDMIC_LS_TEST1 HDMIC_LS_TEST0

4

U10

39

IN_D1+

38

IN_D1-

42

IN_D2+

41

IN_D2-

45

IN_D3+

44

IN_D3-

48

IN_D4+

47

IN_D4-

9

SCL_SRC

8

SDA_SRC

7

HPD_SRC

25

OE#

32

DDC_EN

10

OC3

3

OC0

4

OC1

6

OC2/REXT

35

EQ1

34

EQ0

PI3VDP411LSTZDE

OUT_D1+ OUT_D1-

OUT_D2+ OUT_D2-

OUT_D3+ OUT_D3-

OUT_D4+ OUT_D4-

SCL_SINK

SDA_SINK HPD_SINK

GND_PAD

HDMI_L2_P

22

HDMI_L2_N

23

HDMI_L1_P

19

HDMI_L1_N

20

HDMI_L0_P

16

HDMI_L0_N

17

HDMI_CK_P

13

HDMI_CK_N

14 28

29

HDMIC_OB_HPD

30 2

VCC

11

VCC

15

VCC VCC VCC VCC VCC VCC

GND GND GND GND GND GND GND GND GND GND

C196

21 26

C0.1u16Y0402

33 40 46

1 5 12 18 24 27 31 36 37 43 49

HDMI_L2_P

2

HDMI_L2_N

1

HDMI_L1_P

2

HDMI_L1_N

1

HDMI_L0_P

2

HDMI_L0_N

1

HDMI_CK_P

2

HDMI_CK_N

1

2.2KR0402

C197

C197 C0.1u16Y0402

C0.1u16Y0402

3

CMC-L02-9008014-T34

CMC-L02-9008014-T34 L14

L14

4

3

CMC-L02-9008014-T34

CMC-L02-9008014-T34 L15

L15

4

3

CMC-L02-9008014-T34

CMC-L02-9008014-T34 L16

L16

4

3

CMC-L02-9008014-T34

CMC-L02-9008014-T34 L17

L17

4

+V5S (18,21,22,25,27,28,31,41,42,43,44,45,46,49,50)

R190

R191

2.2KR0402

HDMIC_OB_SCL HDMIC_OB_SDA

C199

C198

C0.1u16Y0402

HDMIC_OB_DATA2_P

HDMIC_OB_DATA2_N

HDMIC_OB_DATA1_P

HDMIC_OB_DATA1_N

HDMIC_OB_DATA0_P

HDMIC_OB_DATA0_N

HDMIC_OB_CLK_P

HDMIC_OB_CLK_N

3

C22u6.3X50805-RH

CN1

R194

R194 20KR1%0402

20KR1%0402

H19 H18 H17 H16 H15 H14 H13 H12 H11 H10

H9 H8 H7 H6 H5 H4 H3 H2 H1

CN1

D2+ D2_SHIELD D2D1+ D1_SHIELD D1D0+ D0_SHIELD D0CK+ CK_SHIELD CKCE Remote NC DDC CLK DDC DATA GND +5V HDMI_HP DET

DP+HDMI

HDMIC_OB_DATA2_P

HDMIC_OB_DATA2_N HDMIC_OB_DATA1_P

HDMIC_OB_DATA1_N

+V3.3S(10,11,13,14,15,16,17,19,20,21,22,25,26,29,30,31,34,35,36,37,40,41,42,43,45,46,49,50)

+V5S(18,21,22,25,27,28,31,41,42,43,44,45,46,49,50)

C200

C201

C22u6.3X50805-RH

HDMIC_OB_DATA0_P HDMIC_OB_DATA0_N

HDMIC_OB_CLK_P HDMIC_OB_CLK_N

TP_HDMID_OB_CEC HDMIC_OB_SCL

HDMIC_OB_SDA

HDMIC_OB_HPD

Up:DISPLAYPORTDown:HDMI

SHELL1S1SHELL2S2SHELL3S3SHELL4

L0_SHIELD

L1_SHIELD

L2_SHIELD

L3_SHIELD

AUX_CH+

AUX_CH_SHIELD

AUX_CH-

DP_HP DET

RETURN_DP_PWR

DP_PWR

S4

EMERALD BAY

Title

Size Document Number Rev

B

Date: Sheet

D3

L0-

D4

L1+

D5 D6

L1-

D7

L2+

D8 D9

L2-

D10

L3+

D11 D12

L3-

D13

GND

D14

GND

D15 D16 D17 D18 D19 D20

DISPLAY PORT

DPD_OB_LANE0_N DPD_OB_LANE1_P

DPD_OB_LANE1_N DPD_OB_LANE2_P

DPD_OB_LANE2_N DPD_OB_LANE3_P

DPD_OB_LANE3_N

DPD_OB_AUX_P DPD_OB_AUX_N

DPD_OB_HPD

DPD_OB_LANE0_P

D1

L0+

D2

2

+V3.3S(10,11,13,14,15,16,17,19,20,21,22,25,26,29,30,31,34,35,36,37,40,41,42,43,45,46,49,50)

C22u6.3X50805-RH

C202

C203

C203 C22u6.3X50805-RH

C22u6.3X50805-RH

Intel Confidential

A

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24 53Thursday, September 25, 2008

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5

4

Note: MSI to add LVDS connector and circuitry

3

2

1

LVDSA_DATA0_L(18) LVDSA_DATA0(18)

D D

LVDSA_DATA1_L(18) LVDSA_DATA1(18)

LVDSA_DATA2_L(18) LVDSA_DATA2(18)

LVDSA_DATA3_L(18) LVDSA_DATA3(18)

LVDSA_CLK_L(18) LVDSA_CLK(18)

LVDSB_DATA0_L(18)

LVDSB_DATA0(18)

LVDSB_DATA1_L(18)

LVDSB_DATA1(18)

LVDSB_DATA2_L(18)

LVDSB_DATA2(18)

LVDSB_DATA3_L(18)

LVDSB_DATA3(18)

LVDSB_CLK_L(18)

LVDSB_CLK(18)

C C

LVDS_DDC_CLK(18) LVDS_DDC_DATA(18)

LVDS_VDD_EN(18)

L_BKLT_EN(18)

L_BKLT_CTRL(18)

LVDSA_DATA0_L LVDSA_DATA0

LVDSA_DATA1_L LVDSA_DATA1

LVDSA_DATA2_L LVDSA_DATA2

LVDSA_DATA3_L LVDSA_DATA3

LVDSA_CLK_L LVDSA_CLK

LVDSB_DATA0_L LVDSB_DATA0

LVDSB_DATA1_L LVDSB_DATA1

LVDSB_DATA2_L LVDSB_DATA2

LVDSB_DATA3_L LVDSB_DATA3

LVDSB_CLK_L LVDSB_CLK

LVDS_DDC_CLK LVDS_DDC_DATA

LVDS_VDD_EN L_BKLT_EN

L_BKLT_CTRL

L_BKLT_EN

+V12S(10,16,30,31,37,39,43) +V12S(10,16,30,31,37,39,43)

LCD_VDD

LVDS_DDC_DATA LVDS_VDD_EN

LVDSA_DATA0 LVDSA_DATA1 LVDSA_DATA2 LVDSA_CLK LVDSA_DATA3

LVDSB_DATA0 LVDSB_DATA1 LVDSB_DATA2 LVDSB_CLK LVDSB_DATA3

+V5S(18,21,22,24,25,27,28,31,41,42,43,44,46,49,50)

R295

4.7KR0402

LBKLT_ENL INV_ON INV_ON

D

Q62

G

S

N-2N7002LT1G_SOT23

+V5S (18,21,22,24,25,27,28,31,41,42,43,44,46,49,50)

R589

4.7KR0402

D

Q63

G

S

N-2N7002LT1G_SOT23

JLVDS1

1

2

34 56 78 9

10

11

12

1314

16 15

1718 19

20 22

21

24

23

26

25

28

27

30

29

32

31

34

33

36

35

38

37

40 39

BH2X20S_white-1pitch-RH

41 42

+V3.3S (10,11,13,14,15,16,17,19,20,21,22,24,26,29,30,31,34,35,36,37,40,41,42,43,45,46,49,50)

LVDS_DDC_CLK L_BKLT_CTRL

L_BKLT_EN LVDSA_DATA0_L LVDSA_DATA1_L LVDSA_DATA2_L LVDSA_CLK_L LVDSA_DATA3_L

LVDSB_DATA0_L LVDSB_DATA1_L LVDSB_DATA2_L LVDSB_CLK_L LVDSB_DATA3_L

LCD_VDD

C9

C0.1u25XC9C0.1u25X

+V5S(18,21,22,24,25,27,28,31,41,42,43,44,46,49,50)

+VAC_IN(39,40,41,42,45)

C0.1u16Y0402

J19

L_BKLT_CTRL

C10

1 2 3 4 5 6

BH1X6-2.5PITCH_WHITE-RH

LVDS PIN HEADER

B B

+V3.3S(10,11,13,14,15,16,17,19,20,21,22,24,26,29,30,31,34,35,36,37,40,41,42,43,45,46,49,50)

+V5S(18,21,22,24,27,28,31,41,42,43,44,45,46,49,50)

R211

R211 1MR0402

1MR0402

D

Q10

LVDS_VDD_EN(18)

A A

LVDS_VDD_EN

R214

100KR0402

Q10

G

S

N-2N7002LT1G_SOT23

LCD_SRC

C212

C0.01U25X0402

R212

100KR0402

5

+V5S (18,21,22,24,27,28,31,41,42,43,44,45,46,49,50)

R348

R3470RR347

X_0R

0R

NO_STUFF

Q9

AO3415Q9AO3415

DS

G

LVDSVDRLVDS_VDDEN_L

C213

C0.1u16Y0402

LVDS_A01

LVDS_VDDEN_L

4

LVDS POWER

1.1A-microSMD110-S

POLY SWITCH

C214

C214 C22U6.3X0805

C22U6.3X0805

LCD_VDD

FS1

R213

R213 47R1206

47R1206

LVDS_A02

D

Q11

G

S

N-2N7002LT1G_SOT23

+V3.3S(10,11,13,14,15,16,17,19,20,21,22,24,26,29,30,31,34,35,36,37,40,41,42,43,45,46,49,50)

R209

R210

2.2KR0402

LVDS_DDC_CLK LVDS_DDC_DATA

Intel Confidential

EMERALD BAY

Title

LVDS

Size Document Number Rev

A

Date: Sheet

3

2

Intel Confidential

A

of

25 53Thursday, September 25, 2008

1

5

4

3

2

1

+V3.3S(10,11,13,14,15,16,17,19,20,21,22,24,25,29,30,31,34,35,36,37,40,41,42,43,45,46,49,50)

+

12

EC29

X_C100u4SO-RH

NV_DQS0(19)

NV_RE_WRL0(19)

NV_CE_L0(19)

X_C100u4SO-RH

NO_STUFF

NV_DQ0(19) NV_DQ1(19)

NV_DQ4(19) NV_DQ5(19)

NV_DQ8(19) NV_DQ9(19)

NV_DQS1(19)

NV_DQ12(19) NV_DQ13(19)

TP_NV_DQS_L0

TP_NV_RFU_1 TP_NV_RFU_2

NV_CLE NV_ALE

NV_CE_L1

TP_NV_DQS_L1

NV_CE_L3

1

VCC3

2

VCC3

3

VCC3

4

CE_4#

5

VSS

6

DQ0

7

DQ1

8

VSS

9

DQS_0#

10

DQS_0

11

VSS

12

DQ4

13

DQ5

14

VSS

15

RFU_1

16

RFU_2

17

VSS

18

CLE_0

19

ALE_0

20

VSS

21

W/R_0#/RE_0#

22

CE_1#

23

VSS

24

CE_0#

25

CE_2#

26

VSS

27

VSS

28

DQ8

29

DQ9

30

VSS

31

DQS_1#

32

DQS_1

33

VSS

34

DQ12

35

DQ13

36

VSS

37

CE_5#

38

VCCQ

39

VCCQ

79

GND

NVRAM

CN2

MEC1

CK_0/WE_0#

W/R_1#/RE_1#

CK_1/WE_1#

MEC2

VCC3 VCC3 VCC3

CE_6#

CK_0#

R/B# WP#

CLE_1 ALE_1

CE_3#

RFU_3 RFU_4

DQ10 DQ11

CK_1#

DQ14 DQ15

CE_7#

VREF VCCQ

GND

VSS DQ2

DQ3 VSS

VSS DQ6

DQ7 VSS

VSS

VSS VSS

VSS

40 41 42

43 44 45

46 47 48

49 50 51

52 53 54

55 56 57

58 59 60

61 62 63

64 65

66 67

68 69 70

71 72 73

74 75 76 77

78 80

NV_CE_L2NV_CE_L2

NV_R_B_L TP_NV_WPL0

NV_CE_L1

TP_NV_RFU_3 TP_NV_RFU_4

TP_NV_CK_L1

NV_CE_L3 TP_NV_VREF

NV_CE_L2 (19)

NV_DQ2 (19) NV_DQ3 (19)

NV_DQ6 (19) NV_DQ7 (19)

NV_RE_WRL1 (19)

NV_DQ10 (19) NV_DQ11 (19)

NV_WEL_CK1 (19)

NV_DQ14 (19) NV_DQ15 (19)

NV_CE_L3 (19)

NV_WEL_CK0 (19)

NV_R_B_L (19)

NV_CLE (19,48) NV_ALE (19,48)

NV_CE_L1 (19)

+V3.3S(10,11,13,14,15,16,17,19,20,21,22,24,25,29,30,31,34,35,36,37,40,41,42,43,45,46,49,50)

D D

C C

B B

Notes: BRAIDWOOD right angled Connector (1.8V keyed). 3.3V not supported.

Compatible BRAIDWOOD Modules

1.8V Mobile NVM Module, 4Gbyte, uses Intel HSNAND (Fast Flash)NVCOMHS0004G3ES-Mini Horizontal 31.60mm x

21.5mm

1.8V Mobile NVM Module, 8Gbyte, uses Intel HSNAND (Fast Flash); main SKU-Mini Horizontal 31.60mm x 21.5mm

1.8V Mobile NVM Module, 16Gbyte, uses Intel HSNAND (Fast Flash);NVCOMMS0016G3ES-Medium Horizontal,

31.60mm x 32.5mm

+V1.8S(7,21,40,43,46,48)

NO_STUFF

C216

C216 X_C22u6.3X50805-RH

X_C22u6.3X50805-RH

R215

R215 330R0402

330R0402

NVRAM_R_W_LED_PU

+V3.3S(10,11,13,14,15,16,17,19,20,21,22,24,25,29,30,31,34,35,36,37,40,41,42,43,45,46,49,50)

BRAIDWOOD R/B# LED

R216

2.2KR0402

A A

NV_R_B_L

5

4

NV_R_BL_Q

Q13

D

G

S

N-2N7002LT1G_SOT23

G

S

3

CR7G1

CR7G1 LED04-G-30mA2V_1608-RH-1

LED04-G-30mA2V_1608-RH-1

NVRAM_R_W_LED_CR

Q12

D

N-2N7002LT1G_SOT23

Intel Confidential

EMERALD BAY

Title

BRAIDWOOD

Size Document Number Rev

Date: Sheet

2

Intel Confidential

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26 53Thursday, September 25, 2008

1

A

5

)

4

3

2

1

USB PORTS: 0,1,2

+V5A (16,22,28,31,33,38,39,40,45)

+V3.3A(4,15,16,17,19,20,22,28,29,32,34,36,37,38,39,45,46)

D D

R217 10KR1%0402R217 10KR1%0402

28,36,39,40,43,45

PM_SLP_S3_L

+V5A(16,22,28,31,33,38,39,40,45)

R219 1KR0402R219 1KR0402

80 mils

USB_S3_L1 USB_OC_L0 +V5A_USBPWR_PN0

EN1_A

+V5S(18,21,22,24,25,28,31,41,42,43,44,45,46,49,50)

U11

5

S3#

6

OC#

4

EN

2

1

5VSB

5VCC

GND

3

C217

C217 C0.1u16Y0402

C0.1u16Y0402

7

VOUT1

8

VOUT2

UP7533AM8_SOT23-8-RH

30L3A-15_0805-RH-1

L18

EC30

C220u6.3pSO-1

+

12

R218 10KR1%0402R218 10KR1%0402

C219

C219 C470p50X0402

C470p50X0402

USB_OC_L0

+V5A_L_USBPWR_PN0

USB_OC_L0 (19,35)

USB_PN0(19) USB_PP0(19)

C C

B B

28,36,39,40,43,45

PM_SLP_S3_L

USB_PN8(19) USB_PP8(19)

R221 10KR1%0402R221 10KR1%0402

+V5A(16,22,28,31,33,38,39,40,45)

R223 1KR0402R223 1KR0402

USB_PN8 USB_PP8

USB_PN0 USB_PP0

L19

EN1_B

L19

1 2

3 4

CMC-L12-900D017-RH

+V5S(18,21,22,24,25,28,31,41,42,43,44,45,46,49,50)

U12

5

S3#

6

OC#

4

EN

3

2

CMC-L02-9008014-T34

CMC-L02-9008014-T34 L21

L21

4

1

USB_PN1 USB_PP1

USB_PN0 USB_PP0

USB_PN1(19) USB_PP1(19)

USB_PN1 USB_PP1

USB_S3_L2

USB_OC_L7 +V5A_USBPWR_PN2

USBB-

5

USBB+

6

USBA-

7

USBA+

8

+V5A (16,22,28,31,33,38,39,40,45)

C222

C0.1u16Y0402

2

5VSB

5VCC

GND

3

C0.1u16Y0402

7

VOUT1

8

VOUT2

UP7533AM8_SOT23-8-RH

+V5A_USBPWR_PN2

Layout Note: Place ESD diodes as close to the USB connectors as possible.

12

USBAUSBA+

USBBUSBB+

USBCUSBC+

D8

D8 ESD-VPORT0603100KV05

ESD-VPORT0603100KV05

L22

30L3A-15_0805-RH-1

EC34

C220u6.3pSO-1

12

D9

D9 ESD-VPORT0603100KV05

ESD-VPORT0603100KV05

+V5A_L_USBPWR_PN0

USBA+

Layout Note: Place ESD diodes as close to the USB connectors as possible.

+V5A_L_USBPWR_PN0 USBAUSBA+

+V5A_L_USBPWR_PN2

+

12

C223

C223 C470p50X0402

C470p50X0402

USBA-

+V5A_L_USBPWR_PN2 USBCUSBC+

52

6 1

U50

U50 ESD-IP4220

ESD-IP4220

CN3

9

5

1 2

UP

3 4

1

10

DOWN

USBAX2M_BLACK-RH-1

4 3

11 5

6 7 8

12

CN4A

U1

U1 S1

UP

U2 U3 U4

USB+E-SATA

USBB+ USBB-

+V5A_L_USBPWR_PN0

S2 S3 S4

USBBUSBB+

A A

+V3.3A(4,15,16,17,19,20,22,28,29,32,34,36,37,38,39,45,46)

R222 10KR1%0402R222 10KR1%0402

5

4

USB_OC_L7

Layout Note: Place ESD diodes as close to the USB connectors as possible.

USB_OC_L7 (19,35)

3

Intel Confidential

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Title

USB 2.0 (1 of 2)

Size Document Number Rev

<Doc>

A

<Doc>

A

<Doc>

A

Date: Sheet

2

A

5

4

3

2

1

USB PORTS: 4,5,6,7

+V3.3A(4,15,16,17,19,20,22,27,29,32,34,36,37,38,39,45,46)

R225

10KR1%0402

+

12

EC32

1 2

3 4

L23

1 2

3 4

CMC-L12-900D017-RH

10KR1%0402

C220u6.3pSO-1

L20

5 6

7 8

CMC-L12-900D017-RH

+

12

EC33

C220u6.3pSO-1

5 6

7 8

USB_OC_L1

+V5A_L_USBPWR_PN4_PN5

C226

C226 C470p50X0402

C470p50X0402

USB2USB2+

USB3USB3+

+V3.3A(4,15,16,17,19,20,22,27,29,32,34,36,37,38,39,45,46)

R228

10KR1%0402

USB_OC_L5

+V5A_L_USBPWR_PN6_PN7+V5A_USBPWR_PN6_PN7

C230

C230 C470p50X0402

C470p50X0402

USB4USB4+USB_PP4

USB5+

USB_OC_L1 (19,35)

USB_OC_L5 (19,35)

USB2USB2+

+V5A_L_USBPWR_PN4_PN5

1 2 3 4 5 7 8

DIP 2.0mm

+V5A_L_USBPWR_PN6_PN7

USB4USB4+

DIP 2.0mm

JUSB1

USB3USB3+

6 10

H2X5[9]M-2PITCH_BLACK-RH

JUSB2

1 2 3 4

6

5 7 8

10

H2X5[9]M-2PITCH_BLACK-RH

USB5USB5+

+V5A (16,22,27,31,33,38,39,40,45)

+V5S(18,21,22,24,25,27,31,41,42,43,44,45,46,49,50)

U13

R229 1KR0402R229 1KR0402

USB_S3_L3

USB_OC_L1

EN1_C

USB_OC_L5

USB_S3_L4PM_SLP_S3_L

EN1_D

5

S3#

6

OC#

4

EN

USB_PN2

USB_PN2(19)

USB_PP2

USB_PP2(19)

USB_PN3

USB_PN3(19)

USB_PP3

USB_PP3(19)

+V5S(18,21,22,24,25,27,31,41,42,43,44,45,46,49,50)

U14

5

S3#

6

OC#

4

EN

PM_SLP_S3_L

D D

PM_SLP_S3_L(17,27,36,39,40,43,45)

R227 10KR1%0402R227 10KR1%0402

+V5A(16,22,27,31,33,38,39,40,45)

R226 1KR0402R226 1KR0402

R230 10KR1%0402R230 10KR1%0402

+V5A(16,22,27,31,33,38,39,40,45)

C C

USB_PN4(19) USB_PP4(19)

USB_PN5(19) USB_PP5(19)

C227

C227 C0.1u16Y0402

C0.1u16Y0402

2

1

5VSB

5VCC

GND

3

+V5A (16,22,27,31,33,38,39,40,45)

2

1

5VSB

5VCC

GND

3

USB_PN4 USB_PP4

USB_PN5 USB_PP5

7

VOUT1

8

VOUT2

UP7533AM8_SOT23-8-RH

C228

C0.1u16Y0402

7

VOUT1

8

VOUT2

UP7533AM8_SOT23-8-RH

+V5A_USBPWR_PN4_PN5

L24

30L3A-15_0805-RH-1

USB_PN2 USB_PP2

USB_PN3 USB_PP3

L27

30L3A-15_0805-RH-1

USB_PN4

USB_PN5 USB5USB_PP5

+V3.3A(4,15,16,17,19,20,22,27,29,32,34,36,37,38,39,45,46)

R627

10KR1%0402

USB_OC_L3

USB_OC_L3 (19,35)

B B

+V3.3A(4,15,16,17,19,20,22,27,29,32,34,36,37,38,39,45,46)

R630

10KR1%0402

USB_OC_L4

USB_OC_L4 (19,35)

A A

EMERALD BAY

Title

USB 2.0 (2 of 2)

Size Document Number Rev

Date: Sheet

5

4

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mini-PCIE H:9.0 mm

D D

PCIE_WAKE_L(17,37)

CLK_MINICARD1_OE_L(16,35)

CLK_PCIE_MINICARD1_L(16)

CLK_PCIE_MINICARD1(16)

PCIE_RXN1(16) PCIE_RXP1(16)

PCIE_TXN1(16) PCIE_TXP1(16)

CL_CLK(16) CL_DATA(16) CL_RST_L(16)

Clink supported on

C C

Minicard 1 only

+V3.3S(10,11,13,14,15,16,17,19,20,21,22,24,25,26,30,31,34,35,36,37,40,41,42,43,45,46,49,50)

R231

10KR0402

CLK_PCIE_MINICARD1_L CLK_PCIE_MINICARD1

CL_CLK CL_DATA CL_RST_L

PCIE_WAKE_L

CLK_MINICARD1_OE_L

PCIE_RXN1 PCIE_RXP1

PCIE_TXN1 PCIE_TXP1

Minicard 1

MINIPCIE1

WAKE#1+3.3V_1 RSVD13GND7 RSVD25+1.5V_1

7

CLKREQ#

9

GND1

11

REFCLK-

13

REFCLK+

15

GND2

17

RSVD3

19

RSVD4

21

GND3

23

PER_N0

25

PER_P0

27

GND4

29

GND5

31

PET_N0

33

PET_P0

35

GND6

37

RSVD5

39

RSVD6

41

RSVD7

43

RSVD8

45

RSVD9

47

RSVD10

49

RSVD11

51

RSVD12

53

GNDM1

55

NC1

56

NC2

MINI_PCIE

KEY

+3.3_AUX

SMB_CLK

SMB_DATA

LED_WWAN#

LED_WLAN# LED_WPAN#

RSVD13 RSVD14 RSVD15 RSVD16 RSVD17

GND8 RSVD18 PERST#

GND9

+1.5V_2

GND10

USB_D-

USB_D+

GND11

+1.5V_3

GND12

+3.3V_2 GNDM2

mini-PCIE H:4.85 mm

+V3.3S(10,11,13,14,15,16,17,19,20,21,22,24,25,26,30,31,34,35,36,37,40,41,42,43,45,46,49,50)

R232

10KR0402

B B

PCIE_WAKE_L(17,37)

CLK_MINICARD2_OE_L(16,35) CLK_PCIE_MINICARD2_L(16)

CLK_PCIE_MINICARD2(16)

PCIE_RXN2(16) PCIE_RXP2(16)

PCIE_TXN2(16) PCIE_TXP2(16)

PCIE_WAKE_L

CLK_MINICARD2_OE_L

CLK_PCIE_MINICARD2_L CLK_PCIE_MINICARD2

PCIE_RXN2 PCIE_RXP2

PCIE_TXN2 PCIE_TXP2

Minicard 2

MINIPCIE2

WAKE#1+3.3V_1 RSVD13GND7 RSVD25+1.5V_1

7

CLKREQ#

9

GND1

11

REFCLK-

13

REFCLK+

15

GND2

17

RSVD3

19

RSVD4

21

GND3

23

PER_N0

25

PER_P0

27

GND4

29

GND5

31

PET_N0

33

PET_P0

35

GND6

37

RSVD5

39

RSVD6

41

RSVD7

43

RSVD8

45

RSVD9

47

RSVD10

49

RSVD11

51

RSVD12

53

GNDM1

55

NC1

56

NC2

MINI_PCIE

KEY

SMB_DATA

LED_WWAN#

LED_WLAN#

LED_WPAN#

+3.3_AUX

SMB_CLK

RSVD13 RSVD14 RSVD15 RSVD16 RSVD17

GND8 RSVD18 PERST#

GND9 +1.5V_2

GND10 USB_DUSB_D+

GND11

+1.5V_3

GND12 +3.3V_2

GNDM2

TOP

+V3.3A(4,15,16,17,19,20,22,27,28,32,34,36,37,38,39,45,46)

C232

C234

C234 C22u6.3X50805-RH

C22u6.3X50805-RH

Wake up LAN

R87 0R0402R87 0R0402 R93 0R0402R93 0R0402

C232 C0.1u16Y0402

C0.1u16Y0402

+V1.5S(21,31,43,45,46)

C235

C235 C0.1u16Y0402

C0.1u16Y0402

HOST_ALERT_L2 (20) PLT_RST_L (11,19,32,35,36,37,45,50)

SMB_CLK_A1 (16) SMB_DATA_A1 (16)

USB_PN6 (19) USB_PP6 (19)

C233

C233 C0.1u16Y0402

C0.1u16Y0402

C236

C236 C0.1u16Y0402

C0.1u16Y0402

C237

C237 C22u6.3X50805-RH

C22u6.3X50805-RH

H1

Spacer

Spacer Support

Support

E2B-1024030-RH

1

+V3.3A(4,15,16,17,19,20,22,27,28,32,34,36,37,38,39,45,46)

C238

C238 C0.1u16Y0402

C0.1u16Y0402

C231

C231 C22u6.3X50805-RH

C22u6.3X50805-RH

2 4 6 8 10 12 14 16

18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52

54

HOST_ALERT_L2 PLT_RST_L

SMB_CLK_A1 SMB_DATA_A1

USB_PN6_L USB_PP6_L

BOTTOM

+V3.3A(4,15,16,17,19,20,22,27,28,32,34,36,37,38,39,45,46)

C240

C239

C239 C22u6.3X50805-RH

C22u6.3X50805-RH

C242

2 4 6 8 10 12 14 16

18 20 22 24 26 28

SMB_CLK_A1

30

SMB_DATA_A1

32 34 36 38 40 42 44 46 48 50 52

54

C242 C22u6.3X50805-RH

C22u6.3X50805-RH

Wake up LAN

HOST_ALERT_L1 PLT_RST_L

SMB_CLK_A1 (16) SMB_DATA_A1 (16)

USB_PN7_L USB_PP7_L

R94 0R0402R94 0R0402 R334 0R0402R334 0R0402

C240 C0.1u16Y0402

C0.1u16Y0402

C243

C243 C0.1u16Y0402

C0.1u16Y0402

HOST_ALERT_L1 (20) PLT_RST_L (11,19,32,35,36,37,45,50)

C241

C241 C0.1u16Y0402

C0.1u16Y0402

C244

C244 C0.1u16Y0402

C0.1u16Y0402

C245

C245 C22u6.3X50805-RH

C22u6.3X50805-RH

USB_PN7 (19) USB_PP7 (19)

+V1.5S(21,31,43,45,46)

+V3.3A(4,15,16,17,19,20,22,27,28,32,34,36,37,38,39,45,46)

C246

C246 C0.1u16Y0402

C0.1u16Y0402

H2

Spacer

Spacer Support

Support

E2B-1024020-A89

1

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MINICARDS

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SATA PORTS (0,1, 2, and 3 )

D D

SATA_TXP0(15) SATA_TXN0(15)

SATA_RXN0(15) SATA_RXP0(15)

SATA_TXP0 SATA_TXN0

SATA_RXN0 SATA_RXP0

SATA Port 0

SATA0

GND

9

GND

TX+

1 2

TX-

3

GND GND

4

RX-

5

RX+

6 7

GND

8

SATA7PM_BLACK-P-RH

SATA_TXP1(15) SATA_TXN1(15)

SATA_RXP1(15) SATA_RXP2(15)

SATA_TXP1 SATA_TXN1

SATA_RXN1 SATA_RXP1

SATA Port 1

SATA7PM_BLACK-P-RH

SATA Signal Connectors

SATA1

GND

9

GND

TX+

1 2

TX-

3

GND GND

4

RX-

5

RX+

6 7

GND

8

SATA Port 2

SATA2

GND

9

GND

TX+

SATA_TXP2(15) SATA_TXN2(15)

SATA_RXN2(15)SATA_RXN1(15)

SATA_TXP2 SATA_TXN2

SATA_RXN2 SATA_RXP2

1 2

TX-

3

GND GND

4

RX-

5

RX+

6 7

GND

8

SATA7PM_BLACK-P-RH

C C

e-SATA

SATA4

GND

9

GND

TX+

SATA_TXP3(15) SATA_TXN3(15)

SATA_RXN3(15) SATA_RXP3(15)

SATA_TXP3 SATA_TXN3

SATA_RXN3 SATA_RXP3

1 2

TX-

3

GND GND

4

RX-

5

RX+

6 7

GND

8

SATA7PM_BLACK-P-RH

SATA_TXP4(15) SATA_TXN4(15)

SATA_RXN4(15) SATA_RXP4(15)

+V3.3S(10,11,13,14,15,16,17,19,20,21,22,24,25,26,29,31,34,35,36,37,40,41,42,43,45,46,49,50)

SATA_TXP4 SATA_TXN4

SATA_RXN4 SATA_RXP4

SATA Port 3

CN4B

P1

DOWN

P1

P2 P3 P4 P5 P6 P7

S6

USB+E-SATA

S5

B B

R233

R233 43KR1%0402

43KR1%0402

FOR SATA POWER CONN

+V12S(10,16,25,31,37,39,43)

+V5 (39,43,45)

J8

1 2 3 4

BH1X4B-2PITCH_WHITE

SATA_DET_L0(15,35)

J7 - SATA DEVICE STATUS (1-2) DEFAULT

J7

1 2

X_H1X2M_BLACK-RH

This jumper simulates the drive status. For proper function of the hot plug, this jumper must be "No Shunt" when drive is removed and "Shunt" after the drive is plugged in.

A A

FOR SATA POWER CONN

+V12S(10,16,25,31,37,39,43)

+V5 (39,43,45)

5

J18

1 2 3 4

BH1X4B-2PITCH_WHITE

4

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SATA

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3

2

1

Realtek ALC888 CODEC

NOTE: MSI to add Audio Codec solution

D D

Trace Width 20mils.

C253

C10U6.3X50805

LINE_2L LINE_2R

MICIN_2LF_MIC2_L

C260

MICIN_2R

R257

R257 X_22K_0402

X_22K_0402

X_C22P50N0402

A_SDO A_BITCK

A_SDI0 A_SYNC

A_RST

C264

2 1

X_C22P50N0402

X_22K_0402

C267

2 1

R258

HDA_SDOUT(15)

HDA_BIT_CLK(15)

HDA_SDIN0(15) HDA_SYNC(15)

HDA_RST_L(15)

R592 33R0402R592 33R0402 R243 33R0402R243 33R0402

R244 22R0402R244 22R0402 R593 33R0402R593 33R0402

R245 33R0402R245 33R0402

NO_STUFF

C C

F_LINE2_L F_LINE2_R

F_MIC2_R

L3475L34

75

L3675L36

75

L3775L37

75

L4075L40

75

R256

X_22K_0402

C254

C255

C0.1u16Y0402

C261

2 1

X_C22P50N0402

C276 C4.7u6.3X5-1C276 C4.7u6.3X5-1 C279 C4.7u6.3X5-1C279 C4.7u6.3X5-1

R259

R259 X_22K_0402

X_22K_0402

SPDIFO

0A to 10 Modify

+V3.3S(10,11,13,14,15,16,17,19,20,21,22,24,25,26,29,30,34,35,36,37,40,41,42,43,45,46,49,50)

+V1.5S(21,29,43,45,46)

SENSE_A

+

EC52C47u16SO-RH+EC52C47u16SO-RH

12

+

EC53C47u16SO-RH+EC53C47u16SO-RH

12

X5R

48

47

45

46

U16

SIDE_R

SPDIFO

1

DVDD

2

GPIO0

SPDIFI / EAPD

3

GPIO1

4

DVSS1

5

SDATA_OUT

6

BCLK

7

DVSS2

8

SDATA_IN

9

DVDD_IO

10

SYNC

11

RESET#

12

PCBEEP

SENSE A13LINE2_L14LINE2_R15MIC2_L16MIC2_R17CD_L18CD_GND19CD_R20MIC1_L21MIC1_R22LINE1_L23LINE1_R

LINE2LLINE2L LINE2RLINE2R

MIC2_IN_L MIC2_IN_R

SIDE_L

NO_STUFF

B B

AVDD5

AUD_JDREF

43

44

39

41

42

40

LFE

AVSS2

JDREF

SURR_L

CENTER

SURR_R

REALTEK

ALC888

R236 20KR1%0402R236 20KR1%0402

GNDF

37

38

AVDD2

FRONT_R

FRONT_L

PIN37_VREFO

SENSE B

NC

MIC1_VREFO_R

LINE2_VREFO MIC2_VREFO

LINE1_VREFO

MIC1_VREFO_L

VREF

AVSS1

AVDD1

ALC888GR-VC2

24

MIC1_IN_R

C277 C4.7u6.3X5-1C277 C4.7u6.3X5-1

MIC1_IN_L

C278 C4.7u6.3X5-1C278 C4.7u6.3X5-1

36 35

34 33

32 31

30 29

28 27 26

25

C256

C256 C0.1u16Y0402

C0.1u16Y0402

SENSE_B

LINE2_VREF MIC2VREFO

MIC1_VREF_L

VREF_OUT

AVDD5

C265

C0.1u16Y0402

X5R X5R

+

F_LINEOR

EC13

1 2

C47u16SO-RH

+

EC51

1 2

C47u16SO-RH

AVDD5

NO_STUFF

R241

R241 X_10KR0402

X_10KR0402

06.06.06'

C257

C257 C0.1u16Y0402

C0.1u16Y0402

C262

C262 C0.1u16Y0402

C0.1u16Y0402

R631 1KR0402R631 1KR0402 R632 1KR0402R632 1KR0402

R612 20KR1%0402R612 20KR1%0402

R613 39.2KR1%0402R613 39.2KR1%0402

R240 22KR0402R240 22KR0402 R238 22KR0402R238 22KR0402

R250 4.7KR0402R250 4.7KR0402 R251 4.7KR0402R251 4.7KR0402

FOR ALC883

F_JD

C263

C0.1u16Y0402

R631,R632 : 1Kohm , Support Re-tasking R631,R632 :75 ohm , Support Fixed

SENSE_B MIC2_JD

R242 X_47R1%0402R242 X_47R1%0402

AUDIO_PWM03

MIC1_VREF_R

C266

C10u6.3X50805

MICIN_1L

LINE_OUTR

LINE_OUTL

75

R247

R247 20KR1%0402

20KR1%0402

LINE_OUT_R

L3075L30

LINE_OUT_LF_LINEOL

L3175L31

SENSE_A

R246

5.1KR1%0402

SW_DSW_B

MIC1_VREF_L MIC1_VREF_R

MIC_IN_RMICIN_1R MIC_IN_L

MIC2VREFO

LINE2_VREF

LINE2_JD

+V12S(10,16,25,30,37,39,43)

1N5817

D10

AUDIO_PWM02

C251

C0.1u16Y0402

MIC_IN_R MIC_IN_L

LINE_OUT_R LINE_OUT_L

SPDIFO SPDIF_DO

R249 0R0402R249 0R0402

C275

X_C100p16X0402

VREF_MIC2L

Y

Z

VREF_MIC2R

X

D12

S-BAT54A_SOT23

VREF_LINE2R

Y

Z

VREF_LINE2L

X

D13

S-BAT54A_SOT23

R254

4.7KR0402

F_MIC2_L F_MIC2_R F_LINE2_R

F_LINE2_L

AUDIO CODE REGULATORS

U15

VIN3VOUT

ADJ

1

LT1087S_SOT89

AUD_PWM01

C258

C259

C470P50X0402

C268

C269

C470P50X0402

C1u10Y0402-RH

NO_STUFF

R252

R253

4.7KR0402

R255

4.7KR0402

F_JD

2

SW_B

SW_D

C274

JAUD1

1

5 7

H2X5[8]M_BLACK-RH

R262

R262 0R0402

0R0402

R237

R237 100R1%0402

100R1%0402

R638

R638 324R1%0402-RH

324R1%0402-RH

6 1 4 5 7

SPDIFO+AUDIO

6 1 4 5 7

SPDIFO+AUDIO

+V5S(18,21,22,24,25,27,28,41,42,43,44,45,46,49,50)

C

VIN

B

VCC

A

GND

SPDIFO+AUDIO

MIC MICPWR3PRESENCE#

LINE NEXT R

FLINE OUTR HPON FLINE OUTL9LINE NEXT L

C364

AVDD5

+V5A (16,22,27,28,33,38,39,40,45)

D11

1N5817

C250

C250 C10u10Y0805

C10u10Y0805

CN8A

S1

S2

CN7A

S1

S2

Headphone+SPDIF Out

CN7B

MEC2

LED

DRIVE

IC

MEC1

Front Audio Connector

2

GND

4

MIC2_JD

6

8

LINE2_JD

10

R260

X_39.2KR1%0402

NO_STUFF

R261

R261 X_20KR1%0402

X_20KR1%0402

C270 C0.1u16Y0402C270 C0.1u16Y0402

R234 0R0402R234 0R0402 R235 0R0402R235 0R0402

SP1

X_Short PAD 0603

NO_STUFF

X_C1000p16X0402

C470P50X0402

F_MIC2_L F_MIC2_R

C282

C283

C283 C470P50X0402

C470P50X0402

F_LINE2_R F_LINE2_L

C470P50X0402

C281

C280

C470P50X0402

FOR EMI 0619

A A

Intel Confidential

EMERALD BAY

Title

IHDA

Size Document Number Rev

B

Date: Sheet

5

4

3

2

Date: Sheet

1

Intel Confidential

A

of

31 53Thursday, September 25, 2008

5

CLK_PCIE_LAN_REQ_L(16)

D D

PM_LANPHY_ENABLE(20)

SMBus Device Addresses 0xC8

C C

Make LAN_XTAL1/2 as short and as wide as possible.

PCIE_RXP6_LAN(16) PCIE_RXN6_LAN(16)

R271 0R0402R271 0R0402

C293

C27p50N0402

C297

C27p50N0402

+V3.3A(4,15,16,17,19,20,22,27,28,29,34,36,37,38,39,45,46)

R266

R266 10KR0402

10KR0402

12

NO_STUFF

R272

R272 X_10KR0402

X_10KR0402

+V3.3M_LAN

LAN_XTAL1

X3

X3 25MHZ20p_S-RH-2

25MHZ20p_S-RH-2

LAN_XTAL2

X3 : D04-1001100-T16 D04-1001100-T02

PCIE_RXN6_LAN LAN_PET_N

SML0_CLK(16) SML0_DATA(16)

NO_STUFF

R274 X_10KR0402R274 X_10KR0402 R276 X_10KR0402R276 X_10KR0402

PLT_RST_L(11,19,29,35,36,37,45,50)

CLK_PCIE_LAN(16) CLK_PCIE_LAN_L(16)

PCIE_TXP6_LAN(16) PCIE_TXN6_LAN(16)

R248 0R0402R248 0R0402

4

C286 C0.1u10X0402C286 C0.1u10X0402 C287 C0.1u10X0402C287 C0.1u10X0402

R267 0R0402R267 0R0402 R268 0R0402R268 0R0402

+V3.3A(4,15,16,17,19,20,22,27,28,29,34,36,37,38,39,45,46)

R263

R263 10KR0402

10KR0402

CLK_PCIE_LAN_REQ_L PLT_RST_L

CLK_PCIE_LAN CLK_PCIE_LAN_L

PCIE_TXP6_LAN PCIE_TXN6_LAN

TP242TP242 TP243TP243

LAN_TEST_EN

R281

R281 1KR0402

1KR0402

LAN_PET_PPCIE_RXP6_LAN

SML0_CLK_R SML0_DATA_R

LAN_DISABLE_N

LAN_LED_LNK_ACT_L LAN_LED_100_L LAN_LED_1000_L

TP_LAN_JTAG_TDI TP_LAN_JTAG_TDO LAN_JTAG_TMS LAN_JTAG_TCK

25M_LAN01

RES_BIAS

R282

3.01KR1%0402

48

CLK_REQ_N

36

PE_RST_N

44

PE_CLKP

45

PE_CLKN

38

PETp

39

PETn

41

PERp

42

PERn

28

SMB_CLK

31

SMB_DATA

3

LAN_DISABLE_N

26

LED0

27

LED1

25

LED2

32

JTAG_TDI

34

JTAG_TDO

33

JTAG_TMS

35

JTAG_TCK

9

XTL_OUT

10

XTL_IN

30

TEST_EN

12

RBIAS

U17

82577LM-HF

JTAG LED

3

PCIE

SMBUS

MDI_PLUS0

MDI_MINUS0

MDI_PLUS1

MDI_MINUS1

MDI_PLUS2

MDI_MINUS2

MDI

MDI_PLUS3

MDI_MINUS3

VCT

RSVD_VCC3P3#1 RSVD_VCC3P3#2

VDD3P3_IN

VDD3P3_OUT

VDD3P3 VDD3P3 VDD3P3

VDD1P0 VDD1P0 VDD1P0

CTRL_1P0

VSS_EPAD

2

LAN_MDI0P

13

LAN_MDI0N

14

LAN_MDI1P

17

LAN_MDI1N

18

LAN_MDI2P

20

LAN_MDI2N

21

LAN_MDI3P

23

LAN_MDI3N

24

6

LAN_RSVD1

1

LAN_RSVD2

2 5

4 15

19 29

V1.0M_LAN_4

47 46 37

V1.0M_LAN_3 LAN_CTRL_C

43

V1.0M_LAN_2

11 40

22 16 8

7 49

+LAN_VCT

+V3.3M_LAN

R269 3.01KR1%0402R269 3.01KR1%0402 R270 3.01KR1%0402R270 3.01KR1%0402

+V1.0M_LAN

R273 0RR273 0R

R277 0RR277 0R

R279 0RR279 0R

+V3.3M_LAN_OUT

C290

C1u10Y0402-RH

NO_STUFF

X_C0.1u16Y0402

CTRL_1P0

C294

+V3.3M(21,33,43,45,46)

+V1.1_LAN_M(40,43)

R275

R275 X_0R

X_0R

R280

R280 X_4.99KR1%0402-1

X_4.99KR1%0402-1

P-BCP69_SOT223

R264 0R0805R264 0R0805

C284

C10u6.3X50805-1

+V1.0M_LAN should not exceed 1.13 V

R265

0R0805

+V3.3M_LAN

1

4

0R0805

+V3.3M_LAN_R

Q14

2 3

V_LAN1.0V

C10u6.3X50805-1

R278

R278 0R0805

0R0805

C288

C291

C291 C0.1u16Y0402

C0.1u16Y0402

C295

C295 C4.7u6.3X5-1

C4.7u6.3X5-1

R575 X_0R0805R575 X_0R0805

NO_STUFF

1

+V3.3M_LAN

+V1.0M_LAN

C292

C292 C10u6.3X50805-1

C10u6.3X50805-1

C296

C296 C4.7u6.3X5-1

C4.7u6.3X5-1

C285

C285 C0.1u16Y0402

C0.1u16Y0402

C289

C289 C0.1u16Y0402

C0.1u16Y0402

+V1.0M_LAN

+LAN_VCT

B B

A A

LAN_MDI0P LAN_MDI0N

LAN_MDI1P LAN_MDI1N

LAN_MDI2P LAN_MDI2N

LAN_MDI3P LAN_MDI3N

C300

X_C0.01u16X0402

R285X_49.9R1%0402 R285X_49.9R1%0402

R287X_49.9R1%0402 R287X_49.9R1%0402

R286X_49.9R1%0402 R286X_49.9R1%0402

R288X_49.9R1%0402 R288X_49.9R1%0402

MDI0_TERM MDI2_TERM MDI3_TERMMDI1_TERM

C301

X_C0.01u16X0402

R290X_49.9R1%0402 R290X_49.9R1%0402

R289X_49.9R1%0402 R289X_49.9R1%0402

C302

X_C0.01u16X0402

5

Place .1 uF near each center tap

C298

C1u10Y0402-RH

R291X_49.9R1%0402 R291X_49.9R1%0402

R292X_49.9R1%0402 R292X_49.9R1%0402

C303

X_C0.01u16X0402

+LAN_VCT

R2830RR283

LAN_MDI3N LAN_MDI3P LAN_MDI2N LAN_MDI2P

LAN_MDI1N LAN_MDI1P LAN_MDI0N LAN_MDI0P

0R

V_LAN010

C299

C299 C0.1u16Y0402

C0.1u16Y0402

10

9 8 7 6 5 4 3 2 1

LAN_LED_LNK_ACT_L LAN_LED_1000_L LAN_LED_100_L

18

15 16

17 18

C304X_C470p50X0402 C304X_C470p50X0402

C305X_C470p50X0402 C305X_C470p50X0402

C306X_C470p50X0402 C306X_C470p50X0402

CN5

CN5 RJ45_LEDX2-RH-8

RJ45_LEDX2-RH-8

LAN_LED_100_L

14

LAN_LED_1000_L

13

LAN_ACT_ANODE

12

LAN_LED_LNK_ACT_L

11

Speed LED: Orange: 100 Mbps Green: 1000Mbps/1Gbps

Activity LED: Yellow: Link Up Blinking: TX/RX Avtivity

NO_STUFF

4

3

+V3.3M(21,33,43,45,46)

R28475R284 75

Place TVS arrays close to RJ45 connector

Intel Confidential

EMERALD BAY

Title

LAN HANKSVILLE

Size Document Number Rev

A

Date: Sheet

2

Intel Confidential

of

32 53Thursday, September 25, 2008

1

A

5

+V3.3M(21,32,43,45,46)

D D

SPI_OE_L1

R293 100R0402R293 100R0402

+V3.3M_SPI_CON

C307 C0.1u16Y0402C307 C0.1u16Y0402

SPI_SO(15)

SPI_CLK(15)

SPI_SI(15)

SPI_SO SPI_CLK

SPI_SI SPI_SO_SW SPI_CLK_SW

SPI_SI_SW

4

+V5A (16,22,27,28,31,38,39,40,45)

U18

14

VCC

2

1A

5

2A

9

3A

12

4A

3

1B

6

2B

8

GND

3B

11

4B

SN74CBT3125DR_SOIC14

OE1 OE2 OE3 OE4

SPI_OE_L1

1 4 10 13

7

3

2

+V3.3M_SPI_CON +V3.3M_SPI_CON

SPI0_SO_SW SPI0_SI_SW SPI_CS

SPI_WP_L

JSPI1

1 2 3 4 5 7 8 9

H2X5(10)_black-RH

SPI0_CLK_SW

6

1

C308 C0.1u16Y0402C308 C0.1u16Y0402

U19

SPI_CS_L0(15)

SPI_OE_L1 SPI_CSL0_CON SPI_CSL1_CON

C C

VCC

HOLD

CLK

VCC

HOLD

CLK

DIO

+V3.3M_SPI_CON

8

SPI0_HD

7

SPI0_CLK_R

6

SPI0_SI_R

5

+V3.3M_SPI_CON

8

SPI1_HD

7

SPI1_CLK_R

6

SPI1_SI_R

5

U20

SPI_CSL0_CON SPI0_SO_R SPI_WP_L

B B

SPI_CSL1_CON SPI1_SO_R SPI_WP_L

U20

1

CS

2

DO

3

WP

4

GND

W25X80VSSIG-RH

U21

1

CS

2

DO

3

WP

4

GND

W25X80VSSIG-RH

U19

1

OE1#

2

1A

3

1B GND42A

74CBT3306

R296 3.3KR0402R296 3.3KR0402

R302 3.3KR0402R302 3.3KR0402

VCC

OE2#

2B

C310 C0.1u16Y0402C310 C0.1u16Y0402

+V5A (16,22,27,28,31,38,39,40,45)

8 7 6 5

C311 C0.1u16Y0402C311 C0.1u16Y0402

C309 C0.1u16Y0402C309 C0.1u16Y0402

SPI_OE_L1SPI_CS_L0

SPI_CS_L1

+V3.3M_SPI_CON

R294 3.3KR0402R294 3.3KR0402

SPI_CS_L1 (15)

SPI_WP_L

SPI1_SI_R SPI0_SI_R SPI0_SO_R SPI1_SO_R SPI0_CLK_R SPI1_CLK_R

SPI_CSL0_CON SPI_CS SPI_CSL1_CON

R297 0R0402R297 0R0402 R298 0R0402R298 0R0402 R299 0R0402R299 0R0402 R300 0R0402R300 0R0402 R301 0R0402R301 0R0402 R303 0R0402R303 0R0402

J9

1 2 3

H1X3M_BLACK-RH

J9(1-X)

JUMPER-1X2A_red

SPI_SI_SW

SPI_SO_SW

SPI_CLK_SW

A A

5

4

3

EMERALD BAY

Title

SPI

Size Document Number Rev

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Date: Sheet

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Intel Confidential

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33 53Thursday, September 25, 2008

1

5

0

+V3.3S(10,11,13,14,15,16,17,19,20,21,22,24,25,26,29,30,31,35,36,37,40,41,42,43,45,46,49,50)

L41

30L3A-40_0805-RH

C312

C312 C10u6.3X50805

C10u6.3X50805

4

V_CK0

C313

C313 C0.1u16Y0402

C0.1u16Y0402

C314

C314 C0.1u16Y0402

C0.1u16Y0402

3

2

1

D D

U22

C316

SMB_DATA_S2 SMB_CLK_S2

C316 C0.1u16Y0402

C0.1u16Y0402

C319

C319 C0.1u16Y0402

C0.1u16Y0402

C322

C322 C10u6.3X50805

C10u6.3X50805

R52 33R0402R52 33R0402 R54 33R0402R54 33R0402

VR_PWRGD_CLKEN_L

C317

C317 C0.1u16Y0402

C0.1u16Y0402

C320

C320 C0.1u16Y0402

C0.1u16Y0402

XTLI_CK XTLO_CK

CK_PWR_OK

IO_VOUT

SMB_DAT SMB_CK

C315

C315 C0.1u16Y0402

+VDDIO_CLK

C323 C22P50N0402C323 C22P50N0402

C324 C22P50N0402C324 C22P50N0402

1 2

C C

5,36,37,40,41,42,43,45,46,49,5

B B

+VDDIO_CLK

XTLI_CK

X4

14.31818MHZ20P_S-2

XTLO_CK

+V3.3S

R323

R323 15R1%

15R1%

IO_VOUT_R_Q

Q15

C

IO_VOUT_R

B

E

N-SST3904_SOT23

R326 33R0402R326 33R0402

C326

C326 C100p50N0402

C100p50N0402

SMB_DATA_S2(10,11,13,14,16,35,36,37,39)

IO_VOUT

SMB_CLK_S2(10,11,13,14,16,35,36,37,39)

C0.1u16Y0402

C318

C318 C0.1u16Y0402

C0.1u16Y0402

C321

C321 C0.1u16Y0402

C0.1u16Y0402

VR_PWRGD_CLKEN_L(42)

U22

47

VDD_CPU

31

VDD_SRC

16

VDD_PLL3

2

VDD_PCI

9

VDD_48

53

VDD_REF

41

VDD_CPU_IO

12

VDD_IO

37

VDD_SRC_IO

26

VDD_SRC_IO

20

VDD_PLL3_IO

52

XTAL_IN

51

XTAL_OUT

48

CKPWRGD/PD#

55

SDA

56

SCL

40

IO_VOUT

44

Vss_CPU

15

Vss_IO

34

Vss_SRC

23

Vss_SRC

19

Vss_PLL3

11

VSS_48

8

Vss_PCI

50

Vss_REF

IDTCV184-2APAG8_TSSOP56-RH

U23

1

NC

VCC

2

A GND3Y

LVC1G14DCKR_SC70-RH

SRCC0/DOT96C

PCI_STOP#/SRCT5

CPU_STOP#/SRCC5

SRCT8/CPU_ITPT

SRCC8/CPU_ITPC

FS_B/TEST_MODE

REF/FS_C/TESTSEL

+V3.3A(4,15,16,17,19,20,22,27,28,29,32,36,37,38,39,45,46)

C325 C0.1u16Y0402C325 C0.1u16Y0402

5

4

CPUC0 CPUC1

SRCT0/DOT96T

SRCT1/SE1

SRCC1/SE2

SATAT/SRCT2 SATAC/SRCC2

SRCT3/CR#_C SRCC3/CR#_D

SRCC4

SRCC6

SRCT7/CR#_F

SRCC7/CR#_E

PCI0/CR#_A PCI1/CR#_B

PCI2/TME

PCI3/CFGP

PCI4/SRC5_EN

PCIF5/ITP_EN

USB48/FS_A

CK_PWR_OK

CPUT0 CPUT1

SRCT4

SRCT6

46 45 43 42

13 14

17 18

21 22

24 25

27 28

30 29

33 32

36 35

39 38

1 3 4 5 6 7

10 49

54

CK505_CPU0 CK505_CPU0_L

CK505_SRC0 CK505_SRC0_L

CK505_SRC1_L

CK505_SRC2_L

CK505_SRC4_L

STP_PCI_L CPU_STOP_L

PCI2_TME

PCI4_SRC5_EN

PCIF5_ITP_EN FSA FSB

FSC

BCLK Frequency Select:

133 MHz DEFAULT

R304 33R0402R304 33R0402 R305 33R0402R305 33R0402

R306 33R0402R306 33R0402 R307 33R0402R307 33R0402

R310 33R0402R310 33R0402 R311 33R0402R311 33R0402

R308 33R0402R308 33R0402 R309 33R0402R309 33R0402

R511 33R0402R511 33R0402 R512 33R0402R512 33R0402

R317 10KR0402-1R317 10KR0402-1 R318 10KR0402-1R318 10KR0402-1

R319 10KR0402-1R319 10KR0402-1 R320 33R0402R320 33R0402

CLK_BUF_CPU_BCLK CLK_BUF_CPU_BCLK_L

CLK_BUF_DOT96_P CLK_BUF_DOT96_N

CLK_BUF_CKSSCD_PCK505_SRC1 CLK_BUF_CKSSCD_N

CLK_BUF_EXP_PCK505_SRC2 CLK_BUF_EXP_N

CLK_PCIE_SATACK505_SRC4 CLK_PCIE_SATA_L

STP_PCI_L (20)

J6F2 -> 1-2 J6F3 -> 1-2 J6G1 -> 1-2

CLK_BSEL0 CLK_BSEL1

CLK_BSEL2

CLK_BUF_REF14

+V1.1S_VTT(4,6,7,11,20,21,22,40,41,42,43)

CLK_BUF_CPU_BCLK (16) CLK_BUF_CPU_BCLK_L (16)

CLK_BUF_DOT96_P (16) CLK_BUF_DOT96_N (16)

CLK_BUF_CKSSCD_P (16) CLK_BUF_CKSSCD_N (16)

CLK_BUF_EXP_P (16) CLK_BUF_EXP_N (16)

CLK_PCIE_SATA (50) CLK_PCIE_SATA_L (50)

CLK_BUF_REF14 (16)

CLK_BSEL0

R322 1KR0402R322 1KR0402

CLK_BSEL1

R324 1KR0402R324 1KR0402

CLK_BSEL2

R325 1KR0402R325 1KR0402

1

J11

H1X2M_BLACK-RH

1

J12

H1X2M_BLACK-RH

1

J13

H1X2M_BLACK-RH

2

BSL_CK0

STP_PCI_L CPU_STOP_L

PCI2_TME PCIF5_ITP_EN PCI4_SRC5_EN

R321

56R0402

R312 10KR0402R312 10KR0402 R313 10KR0402R313 10KR0402

R314 10KR0402R314 10KR0402 R315 10KR0402R315 10KR0402 R316 10KR0402R316 10KR0402

+V1.1S_VTT(4,6,7,11,20,21,22,40,41,42,43)

J11(1-X)

JUMPER-1X2A_red

J12(1-X)

JUMPER-1X2A_red

J13(1-X)

JUMPER-1X2A_red

+V3.3S(10,11,13,14,15,16,17,19,20,21,22,24,25,26,29,30,31,35,36,37,40,41,42,43,45,46,49,50)

Intel Confidential

EMERALD BAY

A A

5

4

3

EMERALD BAY

Title

CK 505

Size Document Number Rev

A

Date: Sheet

2

Intel Confidential

A

of

34 53Thursday, September 25, 2008

1

5

4

3

2

1

IBEXPEAK DEBUG

D D

USB_OC_L0(19,27) USB_OC_L1(19,28) USB_OC_L2(19) USB_OC_L3(19,28) USB_OC_L4(19,28) USB_OC_L5(19,28) USB_OC_L6(19)

CLK_MINICARD2_OE_L(16,29)

CLK_MINICARD1_OE_L(16,29) SATA_DET_L0(15,30) SATA_DET_L1_R(15)

CLK_MINICARD2_OE_L CLK_MINICARD1_OE_L SATA_DET_L0 SATA_DET_L1_R

GPIO36(20) GPIO37(20) GPIO16(20) GPIO49(20)

C C

+V3.3S(10,11,13,14,15,16,17,19,20,21,22,24,25,26,29,30,31,34,36,37,40,41,42,43,45,46,49,50)

B B

ALL_SYS_PWRGD(46)

PM_PWRBTN_L(11,17,36,44)

R350 0R0402R350 0R0402

USB_OC_L7(19,27)

GPIO36 GPIO37 GPIO16 GPIO49 GPIO36

SPI_CS_L2(20)

GPIO0(20)

PCH_JTAG_TCK(15)

XDP_FN0 XDP_FN1

XDP_FN2 XDP_FN3

XDP_FN5 XDP_FN6

XDP_FN7

XDP_PWRBTN_R

SMB_DATA_S3(10,11,13,14,16,34,36,37,39)

SMB_CLK_S3(10,11,13,14,16,34,36,37,39)

PCH_JTAG_TMS(15)

PCH_JTAG_TDI(15)

PCH_JTAG_TDO(15)

PCH_JTAG_RST_L(15)

SATA_DET_L1_R SATA_DET_L0 CLK_MINICARD1_OE_L CLK_MINICARD2_OE_L

GPIO49 GPIO16 GPIO37

1 3 5 7

9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61

PCH MONITOR PORT

NO_STUFF

RN11 X_8P4R-33R0402RN11 X_8P4R-33R0402

1 3 5 7

RN12 X_8P4R-33R0402RN12 X_8P4R-33R0402

1 3 5 7

RN13 X_8P4R-33R0402RN13 X_8P4R-33R0402

1 3 5 7

RN14 X_8P4R-33R0402RN14 X_8P4R-33R0402

1 3 5 7

R343 X_33R0402R343 X_33R0402 R344 X_33R0402R344 X_33R0402

RN10

1 3 5 7

R349 X_0R0402R349 X_0R0402

NO_STUFF

PCH XDP

J14

VSS BPM5# BPM4# VSS BPM3# BPM2# VSS BPM1# BPM0# VSS BPM5#1 BPM4#1 VSS BPM3#1 BPM2#1 VSS BPM1#1 BPM0#1 VSS PWRGD NC1 VTT NC2 NC3 VSS SDA SCL TCK1 TCK0 VSS 61

X_BTB60PF-RH

VSS NC4 NC5 VSS NC6 NC7 VSS NC8 NC9

VSS NC10 NC11

VSS NC12 NC13

VSS NC14 NC15

VSS

ITP_CLKP ITP_CLKN

RESET_IN#

RESET_OUT#

VSS

TDO

TRST#

TMS

VSS

VTT

TDI

62

2 4 6 8 2 4 6 8 2 4 6 8 2 4 6 8

2 4 6 8

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62

8P4R-0R0402-2

XDP_FN16 XDP_FN17

XDP_FN8 XDP_FN9

XDP_FN10 XDP_FN11

XDP_FN12XDP_FN4 XDP_FN13

XDP_FN14 XDP_FN15

PCH_JTAG_TDO_R PCH_JTAG_RST_R PCH_JTAG_TDI_R PCH_JTAG_TMS_RPCH_JTAG_TCK_R

XDP_FN0 XDP_FN1 XDP_FN2 XDP_FN3 XDP_FN4 XDP_FN5 XDP_FN6 XDP_FN7 XDP_FN11 XDP_FN10 XDP_FN9 XDP_FN8 XDP_FN15 XDP_FN14 XDP_FN13 XDP_FN12 XDP_FN16 XDP_FN17

PCH_JTAG_TCK_R PCH_JTAG_TMS_R PCH_JTAG_TDI_R PCH_JTAG_TDO_R

PCH_JTAG_RST_R

RST_SNS2

XDP_DBRESET_L

+V3.3S(10,11,13,14,15,16,17,19,20,21,22,24,25,26,29,30,31,34,36,37,40,41,42,43,45,46,49,50)

R351 1KR0402R351 1KR0402

PLT_RST_L (11,19,29,32,36,37,45,50)

XDP_DBRESET_L (4,11)

A A

5

4

3

EMERALD BAY

Title

IBEXPEAK-M XDP

Size Document Number Rev

A

Date: Sheet

2

Intel Confidential

A

of

35 53Thursday, September 25, 2008

1

5

0

4

3

2

1

+V3.3S(10,11,13,14,15,16,17,19,20,21,22,24,25,26,29,30,31,34,35,37,40,41,42,43,45,46,49,50)

Port80 header

CLK_PCIF_PORT80(19)

BUF_PLT_RST_L(4,19)

CLK_PCIF_PORT80

D D

C0.1u16Y0402

BUF_PLT_RST_L

C602

1 2 3 4 5 7 8 9 10

J16

H2X5M-2PITCH_BLACK-RH

6

LPC_AD0

LPC_AD1

LPC_AD2

LPC_AD3

LPC_FRAME_L

LPC_AD0 (15) LPC_AD1 (15) LPC_AD2 (15) LPC_AD3 (15) LPC_FRAME_L (15)

MSI to verify with Fintek on connection

+V3.3S(10,11,13,14,15,16,17,19,20,21,22,24,25,26,29,30,31,34,35,37,40,41,42,43,45,46,49,50)

PLT_RST_L(11,19,29,32,35,37,45,50)

F_RST1

F_RST2

F_RST3

PM_SLP_S3_L(17,27,28,39,40,43,45)

PM_SLP_S4_L(17,39,43,45)

C C

B B

+V3.3A(4,15,16,17,19,20,22,27,28,29,32,34,37,38,39,45,46)

37

PME#/HW_IRQ#

38

PM_PWRBTN_L(11,17,35,44)

C328

C328 C0.1u16Y0402

C0.1u16Y0402

+V3.3A_RTC(15,22)

C329

C329 C0.1u16Y0402

C0.1u16Y0402

IMVP_VR_ON(42)

PM_RSMRST_L(17)

PM_PWRBTN_L

F_KCLK F_KDATA F_MCLK F_MDATA

PLT_RST_L(11,19,29,32,35,37,45,50)

LPC_FRAME_L(15)

CLK_PCI_SIO(19)

INT_SERIRQ(15)

LPC_AD0(15) LPC_AD1(15) LPC_AD2(15) LPC_AD3(15)

PWROK

+V3.3A_RTC

PS_OUT#

39

PS_IN#

40

VSB3V

41

KCLK

42

KDATA

43

MCLK/SMBCLK5

44

MDATA/SMBDATA5

45

GND

46

PWROK

47

RSMRST#

48

VBAT

CLK_PCI_SIO

F_RST4

32

29

30

34

31

36

S3#35S4#

LED1

S3GATE33PS_ON#

LED2/DTR#

PCIRST4#/RI#

CTS#/SMBDATA1/PECI_RQ

LRESET#1LFRAM#2LAD03LAD14LAD25LAD36PCICLK7SERIRQ8VCC3V9PECI/SMBCLK110FAN_CTL111FAN_CTL2/SMBCLK2

26

25

VCC3V

PCIRST1#27PCIRST2#28PCIRST3#

RTS#/SMBDATA4

DSR#/HW_IRQ#

KBRST#/SMDATA3

RSTIN#/DCD#/PECI_AV

GA20/SMBCLK4

SOUT/SMBDATA2

FANIN2/CLKIN24_48

SIN/SMBCLK3

12

C327

C327 C0.1u16Y0402

C0.1u16Y0402

24

D2+

23

D1+

22

GND(D-)

21 20

PIN19

19

PIN18

18 17 16

PIN15

15 14

FANIN1

13

U24

U24 F71859

F71859

SYS_PWM_FAN (10) CPU_PWM_FAN (10)

SMB_CLK_S3 (10,11,13,14,16,34,35,37,39)

+V3.3S(10,11,13,14,15,16,17,19,20,21,22,24,25,26,29,30,31,34,35,37,40,41,42,43,45,46,49,50)

F_STRAP

R352

8.2KR0402

H_RCIN_L (20) H_A20GATE (20)

SMB_DATA_S3 (10,11,13,14,16,34,35,37,39)

SYS_TACHO_FAN (10) CPU_TACHO_FAN (10)

C330

C330 C0.1u16Y0402

C0.1u16Y0402

,21,22,24,25,26,29,30,31,34,35,37,40,41,42,43,45,46,49,5

A A

5

+V3.3S

RN6

1 3 5 7

8P4R-4.7KR0402

8P4R-4.7KR0402 RN7

RN7

1 3 5 7

8P4R-4.7KR0402

R595

NO_STUFF

R596

2 4 6 8

X_4.7KR0402

4.7KR0402

F_RST1 F_RST2 F_RST3 F_RST4

F_KCLK

F_KDATA

F_MCLK

F_MDATA

F_STRAP

STRAP

4

CLK_PCI_SIO

C349 X_C10p25N0402-RH-3C349 X_C10p25N0402-RH-3

NO_STUFF

R595 R596

2E Disable KBC4EEnable KBC

Intel Confidential

EMERALD BAY

Title

F71859 SIO

Size Document Number Rev

A

Date: Sheet

3

2

Intel Confidential

A

of

36 53Thursday, September 25, 2008

1

5

4

3

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1

PEG

+12V4 +12V5

GND6 JTAG2 JTAG3 JTAG4 JTAG5 +3.3V2 +3.3V3

PWRGD

GND7

GND8

HSIP_0

HSIN_0

GND9

RSVD5 GND16 HSIP_1

HSIN_1

GND17 GND18 HSIP_2

HSIN_2

GND19 GND20 HSIP_3

HSIN_3

GND21 RSVD6 RSVD7 GND30 HSIP_4

HSIN_4

GND31 GND32 HSIP_5

HSIN_5

GND33 GND34 HSIP_6

HSIN_6

GND35 GND36 HSIP_7

HSIN_7

GND37 RSVD8 GND54 HSIP_8

HSIN_8

GND55 GND56 HSIP_9

HSIN_9

GND57

GND58 HSIP_10 HSIN_10

GND59

GND60 HSIP_11 HSIN_11

GND61

GND62 HSIP_12 HSIN_12

GND63

GND64 HSIP_13 HSIN_13

GND65

GND66 HSIP_14 HSIN_14

GND67

GND68 HSIP_15 HSIN_15

GND69

+V12S(10,16,25,30,31,39,43)

+V3.3S (10,11,13,14,15,16,17,19,20,21,22,24,25,26,29,30,31,34,35,36,40,41,42,43,45,46,49,50)

A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11

A12 A13 A14 A15

PEG_RXP0

A16

PEG_RXN0

A17 A18

PEG_RSVD5

A19 A20

PEG_RXP1

A21

PEG_RXN1

A22 A23 A24

PEG_RXP2

A25

PEG_RXN2

A26 A27 A28

PEG_RXP3

A29

PEG_RXN3

A30 A31

PEG_RSVD6

A32

PEG_RSVD7

A33 A34

PEG_RXP4

A35

PEG_RXN4

A36 A37 A38

PEG_RXP5

A39

PEG_RXN5

A40 A41 A42

PEG_RXP6

A43

PEG_RXN6

A44 A45 A46

PEG_RXP7

A47

PEG_RXN7

A48 A49

PEG_RSVD8

A50 A51

PEG_RXP8

A52

PEG_RXN8

A53 A54 A55

PEG_RXP9

A56

PEG_RXN9

A57 A58 A59

PEG_RXP10

A60

PEG_RXN10

A61 A62 A63

PEG_RXP11

A64

PEG_RXN11

A65 A66 A67

PEG_RXP12

A68

PEG_RXN12

A69 A70 A71

PEG_RXP13

A72

PEG_RXN13

A73 A74 A75

PEG_RXP14

A76

PEG_RXN14

A77 A78 A79

PEG_RXP15

A80

PEG_RXN15

A81 A82

PEG_CLKREQ_L (16)

PEG_SLT_RST_L

CLK_PEGA_P (16)PEG_TXP[15:0](3)

R353 0R0402R353 0R0402

PEG_RXP[15:0] (3) PEG_RXN[15:0] (3)

+V12S(10,16,25,30,31,39,43)

12

+

EC37

EC37 C180u16SO-RH-2

C180u16SO-RH-2

PLT_RST_L (11,19,29,32,35,36,45,50)

+V3.3S(10,11,13,14,15,16,17,19,20,21,22,24,25,26,29,30,31,34,35,36,40,41,42,43,45,46,49,50)

C16

C16 C22u6.3X50805-RH

C22u6.3X50805-RH

C365

C0.1u16Y0402

C372

C372 C22u6.3X50805-RH

C22u6.3X50805-RH

C366

C366 C0.1u16Y0402

C0.1u16Y0402

+V3.3A(4,15,16,17,19,20,22,27,28,29,32,34,36,38,39,45,46)

C354

C354 C0.1u16Y0402

C0.1u16Y0402

C373

C373 C0.1u16Y0402

C0.1u16Y0402

C353

C353 C0.1u16Y0402

C0.1u16Y0402

+V12S(10,16,25,30,31,39,43)

J15

B10 B11

B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 B33 B34 B35 B36 B37 B38 B39 B40 B41 B42 B43 B44 B45 B46 B47 B48 B49 B50 B51 B52 B53 B54 B55 B56 B57 B58 B59 B60 B61 B62 B63 B64 B65 B66 B67 B68 B69 B70 B71 B72 B73 B74 B75 B76 B77 B78 B79 B80 B81 B82

B1 B2 B3 B4 B5 B6 B7 B8 B9

J15

+12V1 +12V2 +12V3 GND1 SMCLK SMDAT GND2 +3.3V1 JTAG1

3.3VAUX WAKE#

RSVD2 GND3 HSOP_0 HSON_0 GND4 PRSNT2# GND5 HSOP_1 HSON_1 GND10 GND11 HSOP_2 HSON_2 GND12 GND13 HSOP_3 HSON_3 GND14 RSVD3 PRSNT2#1 GND15 HSOP_4 HSON_4 GND22 GND23 HSOP_5 HSON_5 GND24 GND25 HSOP_6 HSON_6 GND26 GND27 HSOP_7 HSON_7 GND28 PRSNT2#2 GND29 HSOP_8 HSON_8 GND38 GND39 HSOP_9 HSON_9 GND40 GND41 HSOP_10 HSON_10 GND42 GND43 HSOP_11 HSON_11 GND44 GND45 HSOP_12 HSON_12 GND46 GND47 HSOP_13 HSON_13 GND48 GND49 HSOP_14 HSON_14 GND50 GND51 HSOP_15 HSON_15 GND52 PRSNT2#3 RSVD4

Key

PCIE_X16

PRSNT1#

REFCLK+

REFCLK-

+V3.3S(10,11,13,14,15,16,17,19,20,21,22,24,25,26,29,30,31,34,35,36,40,41,42,43,45,46,49,50)

D D

SMB_CLK_S3(10,11,13,14,16,34,35,36,39) SMB_DATA_S3(10,11,13,14,16,34,35,36,39)

PCIE_WAKE_L(17,29)

PEG_TXP0

PEG_TXN[15:0](3) CLK_PEGA_N (16)

C C

B B

PEG_TXN0

PEG_TXP1 PEG_TXN1

PEG_TXN2

PEG_TXP3 PEG_TXN3

PEG_TXP4 PEG_TXN4

PEG_TXP5 PEG_TXN5

PEG_TXP6 PEG_TXN6

PEG_TXP7 PEG_TXN7

PEG_TXP8 PEG_TXN8

PEG_TXP9 PEG_TXN9

PEG_TXP10 PEG_TXN10

PEG_TXP11 PEG_TXN11

PEG_TXP12 PEG_TXN12

PEG_TXP13 PEG_TXN13

PEG_TXP14 PEG_TXN14

PEG_TXP15 PEG_TXN15

C332 C0.1u10X0402C332 C0.1u10X0402 C331 C0.1u10X0402C331 C0.1u10X0402

C333 C0.1u10X0402C333 C0.1u10X0402 C334 C0.1u10X0402C334 C0.1u10X0402

C335 C0.1u10X0402C335 C0.1u10X0402 C336 C0.1u10X0402C336 C0.1u10X0402

C337 C0.1u10X0402C337 C0.1u10X0402 C338 C0.1u10X0402C338 C0.1u10X0402

C339 C0.1u10X0402C339 C0.1u10X0402 C340 C0.1u10X0402C340 C0.1u10X0402

C341 C0.1u10X0402C341 C0.1u10X0402 C342 C0.1u10X0402C342 C0.1u10X0402

C343 C0.1u10X0402C343 C0.1u10X0402 C344 C0.1u10X0402C344 C0.1u10X0402

C345 C0.1u10X0402C345 C0.1u10X0402 C346 C0.1u10X0402C346 C0.1u10X0402

C347 C0.1u10X0402C347 C0.1u10X0402 C348 C0.1u10X0402C348 C0.1u10X0402

C355 C0.1u10X0402C355 C0.1u10X0402 C356 C0.1u10X0402C356 C0.1u10X0402

C357 C0.1u10X0402C357 C0.1u10X0402 C358 C0.1u10X0402C358 C0.1u10X0402

C359 C0.1u10X0402C359 C0.1u10X0402 C360 C0.1u10X0402C360 C0.1u10X0402

C361 C0.1u10X0402C361 C0.1u10X0402 C362 C0.1u10X0402C362 C0.1u10X0402

C363 C0.1u10X0402C363 C0.1u10X0402 C367 C0.1u10X0402C367 C0.1u10X0402

C368 C0.1u10X0402C368 C0.1u10X0402 C369 C0.1u10X0402C369 C0.1u10X0402

C370 C0.1u10X0402C370 C0.1u10X0402 C371 C0.1u10X0402C371 C0.1u10X0402

TP_PEG_RSVD2

PEG_C_TXP0

PEG_C_TXN0

PEG_C_TXP1

PEG_C_TXN1

PEG_C_TXP2PEG_TXP2

PEG_C_TXN2

PEG_C_TXP3

PEG_C_TXN3

TP_PEG_RSVD3

PEG_C_TXP4

PEG_C_TXN4

PEG_C_TXP5

PEG_C_TXN5

PEG_C_TXP6

PEG_C_TXN6

PEG_C_TXP7

PEG_C_TXN7

PEG_C_TXP8

PEG_C_TXN8

PEG_C_TXP9

PEG_C_TXN9

PEG_C_TXP10

PEG_C_TXN10

PEG_C_TXP11

PEG_C_TXN11

PEG_C_TXP12

PEG_C_TXN12

PEG_C_TXP13

PEG_C_TXN13

PEG_C_TXP14

PEG_C_TXN14

PEG_C_TXP15

PEG_C_TXN15

TP_PEG_RSVD4

+V3.3A(4,15,16,17,19,20,22,27,28,29,32,34,36,38,39,45,46)

Intel Confidential

EMERALD BAY

A A

5

4

3

EMERALD BAY

Title

PCIE x16

Size Document Number Rev

A

Date: Sheet

2

Intel Confidential

of

37 53Thursday, September 25, 2008

1

5

D D

C C

Imax=8A OCP=10

C220u6.3pSO-1

CHOKE7

1 2

EC4

CH-2.2u-RH-1

+

12

EC31

C386

C10u10Y0805

CH-2.2u-RH-1

+

12

C220u6.3pSO-1

C385

C0.1u16Y0402

PWM_3V01

R357

2.2R

C389

C389 1000p_0402

1000p_0402

B B

4

Place these CAPs close to FETs

C375

0.1u/25V/4

C376

C10U25X51206-RH

72

658

4

3

72

658

4

3

0.1u/25V/4

C377

PWM_3V05

Q16

1

N-AO4468_SOIC8-RH

Q18

N-AO4456_SOIC8-RH

1

PWM_3V06

2200p_0402

C378

+VAC_IN(39,40,41,42,45)

EC1

C10u25X51206-RH

R355

4.7RST_0603

R58

13KR1%0402

12

+3VALW

VREG3

PWM_3V04

R354

4.7RST_0603

VIN

C374

C374 C1u25X5-RH

C1u25X5-RH

20KR1%0402

PWM_3V07 PWM_5V07

PWM_3V08 PWM_5V08

R60

R60 110K

110K

PU1

7

VO2

8

VREG3

PWM_3V03

9

VBST2

C383C0.1u25X C383C0.1u25X

10

PWM_3V02

10U6.3X0805

DRVH2

11

LL2

12

DRVL2

25

SGND

PC2

0R0402

3

C24

C24 C0.22u6.3X50402

C0.22u6.3X50402

R56

R652

VREG3

R57

R57 20KR1%0402

20KR1%0402

VREF

R108

0R0402

PWM_5V10

3

5

2

6

13

VREG3

1

4

VFB2

VFB1

VREF

TONSEL

ENTRIP2

PC3

PC3 10U6.3X0805

10U6.3X0805

SKIPSEL

NO_STUFF

R653

R653 X_0R0402

X_0R0402

JP1JP1

VREF

R110

R110 110K

110K

ENTRIP1

24

VO1

23

PGOOD

22

VBST1

21

DRVH1

20

LL1

19

DRVL1

VCLK18VREG517VIN16GND15SKIPSEL14EN0

TPS51125RGER_QFN24-RH

VIN

VREG5

+5VALW

R59 30KR1%0402R59 30KR1%0402

1 2

PWM_5V03

C384C0.1u25X C384C0.1u25X

PWM_5V04

R356 4.7RST_0603R356 4.7RST_0603

PWM_5V05

PWM_5V06

PWM_5V02

N-AO4456_SOIC8-RH

4

Q19

4

R362 0R0402R362 0R0402

658

3

658

3

EC2

72

C10U25X51206-RH

Q17

N-AO4468_SOIC8-RH

1

C379

PWM_5V01

0.1u/25V/4

R358

2.2R

C390

C390 1000p_0402

1000p_0402

2

+VAC_IN(39,40,41,42,45)

C382

EC3

C381

C380

0.1u/25V/4

2200p_0402

C10U25X51206-RH

CHOKE8

1 2

CH-2.2u-RH-1

+V3.3A (4,15,16,17,19,20,22,27,28,29,32,34,36,37,39,45,46)

R361

R361 100K

100K

+V5A3A_MBL_PWRGDPWM_5V09

C387

C0.1u16Y0402

1

+5VSUS

+V5A(16,22,27,28,31,33,39,40,45)+V3.3A (4,15,16,17,19,20,22,27,28,29,32,34,36,37,39,45,46)

C220u6.3pSO-1

Imax=8A OCP=10

EC47

C388

C10u10Y0805

C220u6.3pSO-1

EC5

+

12

C388

EC47

+

12

Intel Confidential

EMERALD BAY

A A

5

4

3

2

EMERALD BAY

Title

TPS51125 SYSTEM POWER VR

Size Document Number Rev

Custom

Date: Sheet

1

Intel Confidential

A

of

38 53Thursday, September 25, 2008

A

5

4

3

2

1

C400

C0.1u25X

R367

2.2R

PWM1_1P5V01

C404

C404 1000p_0402

1000p_0402

C0.22u25X-RH

+VAC_IN(38,40,41,42,45)

Place these CAPs close to FETs

C398

C399

C220p50N0402

C399

C10U25X51206-RH

22.1A

CHOKE11 CH-1.5U33A-4.2mohmsCHOKE11 CH-1.5U33A-4.2mohms

1 2

SP14

SP15

X_PAD_0402

PWM1_1P5V02

NO_STUFF

R327

R327 2KR1%0402

2KR1%0402

R508

5.1KR1%0402

C405

+VAC_IN(38,40,41,42,45)

R328

4.7RST_0603

VIN11

C408

C408 C1u25X5-RH

C1u25X5-RH

+VAC_IN(38,40,41,42,45)

M_VREF_DQ_DIMM0 (13)

C396

C10U25X51206-RH

10A

+V1.5(7,13,14,43,45)

12

+

EC6

EC12

C220u2.5-RH-2

SKIPSEL1 SKIPSEL2

R141

R666

0R_0402

VREF2

AUTO SKIP

R668

R668 909R1%0402

909R1%0402

EN

1.8V

R669

90.9R1%0402

+VAC_IN(38,40,41,42,45)

Power Rail Active in (Min. Requirements)

-----------------------------------------------------------------------+V5BATA S0/M0, S4/Mx +V5A S0/M0, S4/Mx +V5 S0/M0, S3/Mx +V3.3 S0/M0, S3/Mx +V1.5 S0/M0, S3/Mx

PM_SLP_S4_L(17,36,43,45)

Title

Size Document Number Rev

Date: Sheet of

Date: Sheet

2

DDR VTT Power

+V1.5(7,13,14,43,45)

+V5A(16,22,27,28,31,33,38,40,45)

U26

8

VIN

NC3

7

NC2

GND

6

REFEN

VCNTL

5

NC1

VOUT

GND

RT9199PSP_SOIC8-RH

C413

C413 C0.1u16Y0402

C0.1u16Y0402

M_VREF_DQ_DIMM1(14)

M_VREF_DQ_DIMM0(13)

L57

80L6A-30_0805-RH

80L6A-30_0805-RH L58

L58

80L6A-30_0805-RH

80L6A-30_0805-RH L28

L28

80L6A-30_0805-RH

PM_SLP_S4_L WEN051

EMERALD BAY

DDR3 VR

A

Custom

A

Custom

A

Custom

M_VREF_DQ_DIMM1

M_VREF_DQ_DIMM0

+V5A(16,22,27,28,31,33,38,40,45)

U45

8

NC3

7

NC2

6

REFEN

VCNTL

5

NC1

VOUT

RT9199PSP_SOIC8-RH

C433

C433 C0.1u16Y0402

C0.1u16Y0402

VAC_BRCK_IN VAC_BRCK_IN

R587

10KR0402

1 2 3 4 9

C414

+V1.5(7,13,43,45)

1

VIN

2

GND

3 4 9

GND

C418

CN6

2 4

+V0.75S(13,14,43)

DDR_DVREF

C415

C10u6.3X50805

R5840RR584

0R R5830RR583

0R

DDRM1_VREF

C419

C10u6.3X50805

1011 1 3

56789

MINIDIN4P-RH-5

+V5A (16,22,27,28,31,33,38,40,45)

R342

R342 10KR0402

10KR0402

PP_S4GT

Q90

D

G

S

N-2N7002LT1G_SOT23

39 53Thursday, September 25, 2008

1

C416

WEN052

C0.1u16Y0402

C420

C0.1u16Y0402

+V1.5(7,13,14,43,45)

R370

R370 1KR1%0402

1KR1%0402

R375

R375 1KR1%0402

1KR1%0402

+V1.5(7,13,43,45)

R345

R345 1MR0402

1MR0402

Intel Confidential

of

R581

R581 1KR1%0402

1KR1%0402

R582

R582 1KR1%0402

1KR1%0402

Place these CAPs close to FETs

C394

C392

C395

C391

C220p50N0402

C0.1u25X

C10U25X51206-RH

D D

9.7A

3A

+V12S(10,16,25,30,31,37,43)

CHOKE2 4.7uH-10A-40mohmsCHOKE2 4.7uH-10A-40mohms

1 2

CT1

SP12

+

X_PAD_0402

CD270U16V

NO_STUFF

C0.15u16X-RH-1

R664

R507

R507 1KR1%0402

1KR1%0402

R374

SP13

X_PAD_0402

2.2R

PWM1_12V01

PWM1_12V02

C412

1000p_0402

5.1KR1%0402

C351

C C

B B

A A

DDRQ_VR_PWRGD(46)

SMB_CLK_S2(10,11,13,14,16,34,35,36,37) SMB_DATA_S2(10,11,13,14,16,34,35,36,37)

SMB_CLK_S2 SMB_DATA_S2

+V3.3 (43,45)

C229

C1u10Y0402-RH

U49

1

VDD

3

SCL

4

SDA

2

GND

ISL90727WIE627Z-TK_SC70-6-RH

5

+VAC_IN(38,40,41,42,45)

C397

C10U25X51206-RH

C10u6.3X50805

C410C0.1u25X C410C0.1u25X

PWM1_12VPHASE

R331

10KR1%0402

PM_SLP_S3_L(17,27,28,36,40,43,45)

C225

C1u10Y0402-RH

U48B

7

LM393DR_SOIC8

PWM1_12VBSTPWM1_12V03

1 2 3 4 5 6 7 8

C403

DRVH1 V5SW RF EN1 PGOOD1 SKIPSEL1 CSP1 CSN1

EN

12V_FB

C407

100P_50X0402

VREG51

29

32

30

27

28

31

26

SW1

GND

VBST1

VBST2

DRVL1

DRVL2

VREG5

VREF213EN12IMON111COMP110VFB19VFB2

COMP215TRIP

14

C406

C0.22u6.3X50402

PWM1_CMP1

R220

10KR1%0402

VREF2

PM_SLP_S3_L

R360

10KR0402

+V5 (30,43,45)

U48A

3

+

1

2

-

LM393DR_SOIC8

4 8

VREF_OPAMP_POT0

R338

2.2R

PP_S4GT

PWM1_1P5VBST

U25

25

TPS51221

SW2

DRVH2

VIN

VREG3

EN2

PGOOD2

SKIPSEL2

CSP2 CSN2

GNDA

16

33

PWM2_TRIP

PWM1_CMP2

C409

100P_50X0402

R579

10KR0402

C132

C1u10Y0402-RH

VREF_OPAMP_POT1_R

R339

R339 10R0402-1

10R0402-1

DDRVREF_R02

Q7

D

G

S

N-2N7002LT1G_SOT23

PWM2_DRVH

24 23 22 21 20 19 18 17

1P5V_FB

R368

10KR1%0402

SLP3_S3

N-SST3904_SOT23

PP_S4GT

PWM1_1P5VPHASE PWM2_DRVL

NO_STUFF

Q24

876

N-AO4468_SOIC8

4

R371

2

351

4.7RST_0603

876

Q25

R373 0R0603R373 0R0603

N-AO4456_SOIC8-RH

2

351

PWM1_DRV_L

R369 0R0603R369 0R0603

PWM1_DRV_H VIN11

f=300k

R372 330KR1%0402R372 330KR1%0402

PWM1_DRVH

VREG51 EN1

PGOOD1 SKIPSEL1 PWM_CSP1 PWM_CSN1

PWM1_DRVL

PWM1_RF

EN>1.2V LDO ON

IMON1

R329 20KR1%0402R329 20KR1%0402

C411

C411 C0.1u16Y0402

C0.1u16Y0402

R359

100KR0402

DDRQ_VR_PWRGD PM_SLP_S4_L SLP_S4

+V3.3 (43,45)

U27

1

RW

RH

+V1.5(7,13,14,43,45)

5 6

VDD

3

SCL

4

SDA

2

GND

ISL90727WIE627Z-TK_SC70-6-RH

SMB_CLK_S2 SMB_DATA_S2

+V3.3A(4,15,16,17,19,20,22,27,28,29,32,34,36,37,38,45,46)

C92

C1u10Y0402-RH

RW

RH

R336

12.1KR1%0402

VREF_RW_POT1

R337

12.1KR1%0402

5 6

+V12A(40)

+V1.5(7,13,14,43,45)

PWM1_IMON

R330 110KR1%0402R330 110KR1%0402

FB=1V

PM_SLP_S4_L(17,36,43,45)

R376

12.1KR1%0402

VREF_RW_POT0

R377

12.1KR1%0402

+V5 (30,43,45)

5

+

6

-

4 8

VREF_OPAMP_POT1

4

R363 0R0603R363 0R0603

PWM2_1P5V03

C401C0.1u25X C401C0.1u25X

R366 0R0603R366 0R0603

DDRQ_VR_PWRGD SKIPSEL2

PWM_CSP2 PWM_CSN2

R365 0R_0402R365 0R_0402

N-SST3904_SOT23

+V3.3A(4,15,16,17,19,20,22,27,28,29,32,34,36,37,38,45,46)

Q20

B

R117

2.2R

DDRVREF_R01

D

G

S

NO_STUFF

R341

X_0R

C247

C247 X_C1u10Y0402-RH

X_C1u10Y0402-RH

PWM2_DRV_H

R364 4.7RST_0603R364 4.7RST_0603

PWM2_DRV_L

C402

VREG31

EN2

C10u6.3X50805

VREG51

+V1.5(7,13,14,43,45)

R665

10KR1%0402

FB=1V

R224

20KR1%0402

+V3.3A (4,15,16,17,19,20,22,27,28,29,32,34,36,37,38,45,46)

R580

+V3.3A(4,15,16,17,19,20,22,27,28,29,32,34,36,37,38,45,46)

Q91

C

B

E

R576

R576 10KR0402

10KR0402

SLP4_EN

C

E

VREF_OPAMP_POT0_R

R335

R335 10R0402-1

10R0402-1

Q6

N-2N7002LT1G_SOT23

R580 10KR0402

10KR0402

R578

R578 10KR0402

10KR0402

SLP3_EN

EN1

Q92

D

G

S

N-2N7002LT1G_SOT23

+V3.3A (4,15,16,17,19,20,22,27,28,29,32,34,36,37,38,45,46)

R577

R577 10KR0402

10KR0402

EN2

Q21

D

G

S

N-2N7002LT1G_SOT23

NO_STUFF

R340

X_0R

C224

C224 X_C1u10Y0402-RH

X_C1u10Y0402-RH

NO_STUFF

M_VREF_DQ_DIMM1

Q22

5

N-NTMFS4841NHT1G_SO8-RH

234

1

N-NTMFS4835NT1G_SO8-RH

Q23

5

234

1

M_VREF_DQ_DIMM0

M_VREF_DQ_DIMM1 (14)

3

C417

5

4

3

2

1

FB=0.75V

+VAC_IN(38,39,41,42,45)

+V5A(16,22,27,28,31,33,38,39,45)

D D

PM_1.5S1.1SMPWRGD(46)

+V1.1S_VTT_PWRGD(46)

0R0402R379 0R0402R379

100KR0402

R381

C1u10Y0402-RH

PG_1P5

R382

330R0402

C426

PWM_1P1V06

PWM_1P1V01

U28

1

EN_PSV

2

TON

3

VOUT

4

V5FILT

5

VFB

6

PGOOD

7

GND

R378

GND

15

249KR0402_1%

PWM_1P1V04

14

VBST

13

DRVH

12

LL

11

TRIP

10

V5DRV

9

DRVL

8

PGND

TPS51117RGYR_QFN14-RH

PWM_1P1V03

H_VTTVID1(6)

PWM_1P1V05

R380 4.7R0603R380 4.7R0603

R383 9.1KR1%0402R383 9.1KR1%0402

C425

C0.1u25X

DDR_DRVH

DDR_LL

DDR_DRVL

FB=0.75V

Q26

4 3 2 1

Q27 NTMFS4835Q27 NTMFS4835

+V3.3S(10,11,13,14,15,16,17,19,20,21,22,24,25,26,29,30,31,34,35,36,37,41,42,43,45,46,49,50)

R239 4.7KR0402R239 4.7KR0402

C421

5

NTMFS4841

5

R615 1KR0402R615 1KR0402

C424

C423

C422

C0.1u25X

C2200P50X0402

C10U25X51206-RH

R385

2.2R1%

PWM_1P1V07

C427

C427 1000p_0402

1000p_0402

PWM_1P1V02

C10U25X51206-RH

CHOKE1 0.68u_25ACHOKE1 0.68u_25A

P_W01

D

P_W02H_VTTVID1

G

S

C569

C10U25X51206-RH

R384

10KR0402-1

R386

20.5KR0402_1%

R614

5.49KR1%0402-1

Q86

Q86 N-2N7002LT1G_SOT23

N-2N7002LT1G_SOT23

1.1V / 18A

1.05V / 18A

+V1.1S_VTT(4,6,7,11,20,21,22,34,41,42,43)

C330U2.5POS-1

+

12

+

12

+

12

EC7

EC8

EC9

C C

FB=0.75V

+VAC_IN(38,39,41,42,45)

+V5A(16,22,27,28,31,33,38,39,45)

PM_SLP_LAN_L(17,43,45)

+V1.1_LAN_VR_PWRGD(46)

0R0402R388 0R0402R388

100KR0402

R390

C1u10Y0402-RH

R391

330R0402

C434

PWM_1P05V03

PG_SLPLAN

PWM_1P05V01

B B

U29

1

EN_PSV

2

TON

3

VOUT

4

V5FILT

5

VFB

6

PGOOD

7

GND

R387

GND

15

249KR0402_1%

14

VBST

13

DRVH

12

LL

PWM_1P05V02

11

TRIP

10

V5DRV

9

DRVL

8

PGND

TPS51117RGYR_QFN14-RH

PWM_1P05V04

PWM_1P05V05

R389 4.7R0603R389 4.7R0603

R392 5.1KR1%0402R392 5.1KR1%0402

C432

DDR_DRVH1

DDR_DRVL1

FB=0.75V

C0.1u25X

DDR_LL1

C428

C430

C431

C10U25X51206-RH

CHOKE9

1 2

CH-2.2u-RH-1

C431

C10U25X51206-RH

8.2KR1%0402

Q29

8 7 2

5

4

R396

R396 100K_0402

100K_0402

1.1S_delay

D

Q32

S

N-2N7002LT1G_SOT23

+V1.1M(15,22,43,46)

316

N-AO4468_SOIC8-RH

+V1.1_LAN_M(32,43)

C71

C71 C0.1u25Y

C0.1u25Y

+

12

EC48

EC48 C330u2.5pSO-1

C330u2.5pSO-1

Q31

8 7 2

5

4

V1.1M_SWITCH (45)

+V1.1S(15,16,17,21,22,42,43,46)

316

N-AO4468_SOIC8-RH

12

+

EC49

EC49 C330u2.5pSO-1

C330u2.5pSO-1

12

+

EC50

EC50 C330u2.5pSO-1

C330u2.5pSO-1

1.05V / 7A

+V1.1_LAN_M(32,43)

C330U2.5POS-1

+

12

R393

R395

20.5KR1%0402-RH

EC10

PS_S3CNTRL(45,46)

+V1.1_LAN_M(32,43)

+

12

EC15

+V12A(39)

PS_S3CNTRL

G

C429

C0.1u25X

C2200P50X0402

Q28

876

4

N-AO4468_SOIC8

2

351

R394

PWM_1P05V06

R394

2.2R1%

C435

C435 1000p_0402

1000p_0402

Q30

4

876

N-AO4456_SOIC8-RH

2

351

PWM_1P05V07

+VAC_IN(38,39,41,42,45)

EC11

C10U25X51206-RH

C439

C0.1u25X

C440

C0.1u25X

A A

R651

R651 10KR0402

10KR0402

F_PWM10

Q40

Q40 N-2N7002LT1G_SOT23

N-2N7002LT1G_SOT23

+VAC_IN(38,39,41,42,45)

D

Q42

G

N-2N7002LT1G_SOT23

S

R397

R397 100K_0402

100K_0402

F_PWM11

PWM_1P8V05

C441

C441 C0.1u10X0402

C0.1u10X0402

4

PM_SLP_S3_L(17,27,28,36,39,43,45)

PM_SLP_S3_L SLP3_V1P8

R650 10KR0402R650 10KR0402

5

+VAC_IN(38,39,41,42,45)

D

G

S

2

U30

7

EN

IN

SS8FB

GND

4

X_C0.1u10X0402

PWM_1P8V02

1

SW

BS

COMP

TH PAD

MP2307DN-LF-Z_SOIC8-RH

6

9

PWM_1P8V01

C443

PWM_1P8V03

3

FB=0.925

5

R400

6.8K_0402

PWM_1P8V06

3.9n_0402

C438

PWM_1P8V04

C444

C0.01u25X0402

CHOKE10

1 2

CH-4.7u10A40mS-RH-1

9.53K_0402

R399

R399 10KR0402

10KR0402

1A

+V1.8S(7,21,26,43,46,48)

R398

C0.1u10X0402

C25

C33

C442

3

C33

C22u6.3X50805-RH

EMERALD BAY

Title

V1.1/V1.05 VR

Size Document Number Rev

Custom

Date: Sheet

2

1

Intel Confidential

A

of

40 53Thursday, September 25, 2008

5

0

D D

GFXVR_VID_0(7)

GFXVR_VID_1(7) GFXVR_VID_2(7) GFXVR_VID_3(7) GFXVR_VID_4(7)

GFXVR_VID_5(7) GFXVR_VID_6(7)

GFXVR_EN_R(46)

GFXVR_DPRSLPVR(7)

Confirm Power

R406

1.91KR1%

+V3.3S(10,11,13,14,15,16,17,19,20,21,22,24,25,26,29,30,31,34,35,36,37,40,42,43,45,46,49,50)

C C

C10p25N0402-RH-3

R408

R408 X_0R

+VCC_GFXCORE(7,43)

R412

R412 10R

10R

R417

0R_0402

VCC_AXG_SENSE(7)

VSS_AXG_SENSE(7)

0R_0402

R420 0R_0402R420 0R_0402

R421

R421 10R

10R

X_0R

C464

C464 C330p50X

C330p50X

412KR1%

R409

C459

C459 C330p50X

C330p50X

C4631nC463 1n

B B

C452

PWM_GF07

GFXVR_IMON(7)

C10p25N0402-RH-3

PWM_GF05

150p

150p C453

C453

VCC_GFSEN

VSS_GFSEN

SP10

X_PAD_0402

4

GFXVR_DPRSLPVR

F=330KHz

R407 8.06KR1%R407 8.06KR1%

C461

C0.22u25X-RH

GVR_PWRGD

C454

C454 390p

390p

PWM_GF06

R415

4.32KR1%

R424

47KR1%

C0.22u25X-RH

C4511n C4511n

PWM_GF04

R422

8.25KR1%

PWM_GFBIAS

C447

PWM_GF03

R410

562R1%

3

+VAC_IN(38,39,40,42,45) +V5S (18,21,22,24,25,27,28,31,42,43,44,45,46,49,50) +VAC_IN(38,39,40,42,45)

R402

R401

1R0805

0R0603

PWM_GF01

C448

C0.1u16Y0402

2 20 21 22 23 24 25 26

27 28

1

4

5

6

7

8

13

U31

PGOOD VID0 VID1 VID2 VID3 VID4 VID5 VID6

VR_ON DPRSLPVR

CLK_EN#

VW

COMP

FB

VSEN

RTN

IMON

C0.1u16Y0402

12

VIN

ISL62881

PWM_GF02

11

VDD

VCCP BOOT

UGATE

PHASE LGATE

VSSP

ISUM+

ISUM-

C449

C449 C0.1u16Y0402

C0.1u16Y0402

19 14 15 16

18 17

10

9

PWM_GF10 PWM_GF11

PWM_GF20

C462

C462 1nF

1nF

R403

C455

0.22uF

PWM_GF16

PWM_GF12

4.7R0805

PWM_GF19

R4180RR418 0R

PWM_GF22

PWM_GF23

C456

C457

C0.022u16X-RH

R419

X_C0.015u16X0402-RH

1KR1%0402

R423 100R1%0402R423 100R1%0402

C450 C0.22u25X-RHC450 C0.22u25X-RH

R404 0R_0805R404 0R_0805

R405 0R_0805R405 0R_0805

R413

82.5R1%

PWM_GF13

C458

C458 C0.01u25X0402

C0.01u25X0402

PWM_GF17

R416

11KR1%

PWM_GF18

RT1 Place close CHOKE1

3

RBIAS

PAD

29

PWM_GF14

PWM_GF21

R414

2.61KR1%

RT1

10KRT1%

C460

C460 C0.1u25X

C0.1u25X

2

Q33

4 3 2 1

Q34 NTMFS4833Q34 NTMFS4833

PWM_GF15

+

12

5

NTMFS4841

5

R411

3.65KR1%

EC14

EC14 330u

330u

C10U25X51206-RH

+VCC_GFXCORE(7,43)

C445

PWM_GF08

PWM_GF09

C446

C10U25X51206-RH

SP2

X_PAD_0402

1

IMAX=14A

+VCC_GFXCORE(7,43)

CHOKE3

CH-0.36u60A1.2mS-RH

1 2

SP3

X_PAD_0402

10,11,13,14,15,16,17,19,20,21,22,24,25,26,29,30,31,34,35,36,37,40,42,43,45,46,49,5

A A

5

+V3.3S

R426

R426 10KR0402

10KR0402

GVR_PWRGD

+V1.1S_VTT(4,6,7,11,20,21,22,34,40,42,43)

GFXVR_IMON

4

+V_GFX_CLAMP

3

+

2

-

4 8

C473

C473 C0.1u16Y0402

C0.1u16Y0402

U32A

GFX_CLAMP_OUT

1

LM358DR2G_SOIC8

+V3.3S(10,11,13,14,15,16,17,19,20,21,22,24,25,26,29,30,31,34,35,36,37,40,42,43,45,46,49,50)

R427

10R0402-1

1.1V Clamp for IMON signal

YZX

D27

D27 S-BAT54A_SOT23

S-BAT54A_SOT23

GFXVR_IMON (7)

3

Intel Confidential

EMERALD BAY

Title

GRAPHICS CORE VR

Size Document Number Rev

A

Date: Sheet

2

Intel Confidential

of

41 53Thursday, September 25, 2008

1

A

5

4

3

2

1

R656

R656 10KR

10KR

11KR1%

11KR1% R468

R468

R657

R657 10KR

10KR

+

12

EC38

EC38 C330u2.5SO-RH

C330u2.5SO-RH

+VAC_IN(38,39,40,41,45)

5

Q35

4 3 2 1

NTMFS4841

5

4 3 2 1

Q37 NTMFS4833Q37 NTMFS4833

+VAC_IN(38,39,40,41,45)

5

Q39 NTMFS4841Q39 NTMFS4841

4 3 2 1

5

4 3 2 1

Q41 NTMFS4833Q41 NTMFS4833

R465

2.61KR1%

PWM_CR26

RT2

10KRT1%

C502

C502 C0.1u25X

C0.1u25X

C10U25X51206-RH

VSUM+

VSUM-

C475

C474

C10U25X51206-RH

C482

C10U25X51206-RH

PWM_CR13

C485

C10U25X51206-RH

C1u10Y0402-RH

R621

R621 0R0603

0R0603

CH-0.36u30A1.1mS-RH

1 2

SP4

10KR1%

ISEN2

VSUM+

VSUM-

C0.22u25X-RH

PWM3

PWM_CR31

5V_PWH3

R434

R442

3.65KR1%

3.65KR1% R439

R439

1R1%

R454

10KR1%

10KR1% R457

R457

3.65KR1%

SP4 X_PAD_0402

X_PAD_0402

PWM_CR38

PWM_CR37

CH-0.36u30A1.1mS-RH

1 2

SP6

SP6 X_PAD_0402

X_PAD_0402

PWM_CR35

R462

1R1%

C0.22u6.3X50402

R433

2.2R

ISEN1

VSUM+

PWM_CR15

C481

VSUM-

1000p_0402

R453

2.2R

PWM_CR21

C494

C494 1000p_0402

1000p_0402

C178

R618

5V_PWH3

6 3 7 4

2.2R

PWM_CR29

U47

FCCM GND PHASE LGATE

PWM_CR30

9

2

9

PWM

1

BOOT

8

UGATE

5

VCC

ISL6208CRZ-T_QFN8-RH

PWM_CR27 PWM_CR28

+V5S(18,21,22,24,25,27,28,31,41,43,44,45,46,49,50)

C51

CHOKE4

SP5

SP5 X_PAD_0402

X_PAD_0402

R443

X_10KR1%

+VCC_CORE(6,43)

CHOKE5

SP7

SP7 X_PAD_0402

X_PAD_0402

R460

X_10KR1%

PWM_CR36

+VAC_IN(38,39,40,41,45)

5

Q36 NTMFS4841Q36 NTMFS4841

4 3 2 1

5

4 3 2 1

Q38 NTMFS4833Q38 NTMFS4833

R658

R658 10KR

10KR

ISL_PW3 PWM3

ISEN3

C571

+VCC_CORE(6,43)

51A

ISEN2

ISEN1

C483

C476

C10U25X51206-RH

PWM_CR32

C10U25X51206-RH

R655

2.2R

C570

C570 1000p_0402

1000p_0402

ISEN3

VSUM+

CH-0.36u30A1.1mS-RH

R622

10KR1%

10KR1% R616

R616

3.65KR1%

3.65KR1% R617

R617

1R1%

CHOKE6

1 2

SP9

SP9 X_PAD_0402

X_PAD_0402

PWM_CR34

+VCC_CORE(6,43)

SP8

SP8 X_PAD_0402

X_PAD_0402

ISEN1

R619

R619 X_1R1%

X_1R1%

ISEN2

R620

R620 X_1R1%

X_1R1%

PWM_CR33VSUM-

+VAC_IN(38,39,40,41,45)

RN18 8P4R-0R0402-2RN18 8P4R-0R0402-2

1

H_VID0(6) H_VID1(6) H_VID2(6) H_VID3(6) H_VID4(6) H_VID5(6)

D D

H_VID6(6)

2

3

4

5

6

7

8

RN19 8P4R-0R0402-2RN19 8P4R-0R0402-2

1

2

3

4

5

6

7

8

C C

HVID_0 HVID_1 HVID_2 HVID_3 HVID_4 HVID_5 HVID_6

DELAY_VR_PWRGOOD(11,46)

IMVP_IMON(6)

C484

R441

C0.22u25X-RH

VSSSENSE(6)

VR_PWRGD_CLKEN_L(34)

+VCC_CORE(6,43)

R459

R459 10R

10R

R461 0R_0402R461 0R_0402

VCCSENSE(6)

R463 0R_0402R463 0R_0402

VSSSENSE(6)

SP11

X_PAD_0402

R466

R466 10R

10R

8.25KR1%

IMVP_VR_ON(36)

PM_DPRSLPVR(6)

R451

R451 X_0R

X_0R

324KR1%0402-RH

VCC_CORESENSE

C499

C499 C330p50X

C330p50X

H_PROCHOT_L(4)

PSI_L(6)

R449

1.91KR1%

+V3.3S(10,11,13,14,15,16,17,19,20,21,22,24,25,26,29,30,31,34,35,36,37,40,41,43,45,46,49,50)

COMP

C490 C33p50N0402C490 C33p50N0402

R455

PWM_CR10

C491

C495

C495 C330p50X

C330p50X

C5001nC500 1n

C0.01u25X0402

R446 0R_0402R446 0R_0402 R447 0R_0402R447 0R_0402

R450 8.06KR1%R450 8.06KR1%

150p

VSS_CORESENSE

C504

+V3.3S(10,11,13,14,15,16,17,19,20,21,22,24,25,26,29,30,31,34,35,36,37,40,41,43,45,46,49,50)

R432

R432 10KR0402

10KR0402

HVID_0 HVID_1 HVID_2 HVID_3 HVID_4 HVID_5 HVID_6

C4881n C4881n

PWM_CR08

C492 390pC492 390p

2.37KR1%0402-RH

H_PROCHOT_L

PWM_CR02

C0.22u25X-RH

PWM_CR05 PWM_CR06

PWM_CR07

PWM_CR09

R458

PWM_CR01

RT3

RT3 470KRT1%

470KRT1%

R472

4.02KR1%0402

C477

F=330KHz

R456

R456 562R1%

562R1%

PWM_COREBIAS

PWM_CR03

1

PGOOD

31

VID0

32

VID1

33

VID2

34

VID3

35

VID4

36

VID5

37

VID6

2

PSI#

18

IMON

38

VR_ON

39

DPRSLPVR

40

CLK_EN#

6

VW

7

COMP

8

FB

12

VSEN

13

RTN

4

VR_TT#

5

NTC

3

RBIAS

ISL62883

R471

147KR1%0402-RH

+V5S (18,21,22,24,25,27,28,31,41,43,44,45,46,49,50)

R428

R428 0R0603

0R0603

C0.1u16Y0402

17

VIN

+V5S (18,21,22,24,25,27,28,31,41,43,44,45,46,49,50)

R429

R429 1R0805

1R0805

C478

C480

C0.1u16Y0402

PWM_CR04

16

25

VCCP

VDD

19

BOOT1

20

UGATE1

21

PHASE1

23

LGATE1

22

VSSP1

11

ISEN1

30

BOOT2

29

UGATE2

28

PHASE2

26

LGATE2

27

VSSP2

10

ISEN2

24

PWM3/LGATE1B

9

ISEN3/FB2

15

ISUM+

14

ISUM-

PAD

U33

41

R430

R430 0R0603

0R0603

R431

PWM_CR40

2.2R

PWM_CR12

PWM_CR11

PWM_CR39

ISEN1

C486

C0.22u25X-RH

ISEN2ISEN2

C489

C0.22u25X-RH

ISEN3

C496

C0.22u25X-RH

R467

0R_0402

PWM_CR23

C5031nC503

1n

RT2 PLACE NEAR CHOKE1

PWM_CR14

PWM_CR17

R448 2.2RR448 2.2R

PWM_CR16

PWM_CR18

PWM_CR19

PWM_CR20

+V5S (18,21,22,24,25,27,28,31,41,43,44,45,46,49,50)

ISL_PW3

C497

C497 C0.015u16X0402-RH

C0.015u16X0402-RH

C498

C0.022u16X-RH

PWM_CR22

R469

R469 604R1%0402

604R1%0402

PWM_CR24

R470

R470 100R1%

100R1%

C479

C0.22u25X-RH

R452

R452 X_0R_0402

X_0R_0402

R464

82.5R1%

PWM_CR25

C501

C0.01u25X0402

C487

C0.22u25X-RH

RT1 PLACE NEAR CHOKE1

B B

+VCC_CORE(6,43)

+

12

EC17

EC17 C330u2.5SO-RH

C330u2.5SO-RH

+

12

EC18

EC18 C330u2.5SO-RH

C330u2.5SO-RH

+

12

EC19

EC19 C330u2.5SO-RH

C330u2.5SO-RH

330u*6

+

12

EC20

EC20 C330u2.5SO-RH

C330u2.5SO-RH

+

12

EC21

EC21 C330u2.5SO-RH

C330u2.5SO-RH

+V1.1S(15,16,17,21,22,40,43,46)

A A

+V1.1S_VTT(4,6,7,11,20,21,22,34,40,41,43)

R478

R478 68R0402

68R0402

H_PROCHOT_L

R474

1KR0402

H_VID0(6) H_VID1(6) H_VID2(6) H_VID5(6)

PM_DPRSLPVR(6)

5

R475

1KR0402

R476

R477

R479

1KR0402

R479 1KR0402

1KR0402

R484

R484 X_1KR0402

X_1KR0402

NO_STUFF

1KR0402

4

PSI_L(6) H_VID6(6) H_VID4(6) H_VID3(6)

POC set for Auburndale

1KR0402

R480

R481

3

R481 1KR0402

1KR0402

R482

R482 1KR0402

1KR0402

R483

R483 1KR0402

1KR0402

Intel Confidential

EMERALD BAY

Title

IMVP-6 .5

Size Document Number Rev

B

Date: Sheet

2

Date: Sheet

1

Intel Confidential

A

of

42 53Thursday, September 25, 2008

A

5

4

3

SLP_S3# DISCHARGE CKT DESIGNED FOR ~100ms DISCHARGE ON ALL S3 RAILS.

2

SLP_S4# DISCHARGE CKT DESIGNED FOR ~100ms DISCHARGE ON ALL S4 RAILS.

1

+V5 (30,39,45)

R485

97.6R1%

+V12S(10,16,25,30,31,37,39)

D D

D15

D15 S-BAT54A_SOT23

S-BAT54A_SOT23

PP_V5DIS

D

Q43

G

S

N-2N7002LT1G_SOT23

YZX

V12A_DISCHARGE

+V5S(18,21,22,24,25,27,28,31,41,42,44,45,46,49,50)

R486

R486 100K_0402

100K_0402

PM_SLP_S3

R491

Q46

R491 1MR0402

1MR0402

R488

97.6R1%

PP_V5SDIS

D

Q44

G

S

N-2N7002LT1G_SOT23

PM_SLP_S3_L(17,27,28,36,39,40,45)

C575

C22u16Y1210

N-2N7002LT1G_SOT23

D

G

S

C C

PM_SLP_S3

+V1.1S(15,16,17,21,22,40,42,46)

R495

R495 470R0402

470R0402

PM_SLP_S3_BUF_R

D

Q52

G

S

N-2N7002LT1G_SOT23

+V1.1S_VTT(4,6,7,11,20,21,22,34,40,41,42)

R496

R496 470R0402

470R0402

PM_SLP_S3_11VTTBUF_R

D

Q53

G

S

N-2N7002LT1G_SOT23

+V1.8S(7,21,26,40,46,48)

R497

R497 470R0402

470R0402

PM_SLP_S3_18VBUF_R

D

Q54

G

S

N-2N7002LT1G_SOT23

R493

R493 47R0402

47R0402

PP_V1.5SDIS

D

Q49

G

S

N-2N7002LT1G_SOT23

+V0.75S(13,14,39)

R489

R489 220R0402

220R0402

PP_V0.75DIS

D

Q47

G

S

N-2N7002LT1G_SOT23

+V3.3S(10,11,13,14,15,16,17,19,20,21,22,24,25,26,29,30,31,34,35,36,37,40,41,42,45,46,49,50)

PP_V3SDIS

D

G

S

R498

97.6R1%

Q50

Q50 N-2N7002LT1G_SOT23

N-2N7002LT1G_SOT23

R490

R490 100KR0402-RH

100KR0402-RH

D

Q48

G

S

N-2N7002LT1G_SOT23

PP_S4GT

R492

R492 1MR0402

1MR0402

+V3.3 (39,45)

R487

97.6R1%

PP_V3DIS

D

Q45

G

S

N-2N7002LT1G_SOT23

S

N-2N7002LT1G_SOT23

+V1.5(7,13,14,39,45)+V1.5S(21,29,31,45,46)

R494

R494 68R0402

68R0402

PP_V1.5DIS

D

Q51

G

S

N-2N7002LT1G_SOT23

PM_SLP_S4_L(17,36,39,45)

+V3.3M(21,32,33,45,46)

B B

+VCC_CORE(6,42)

R502

R502 47R0402

47R0402

PP_VIMVPDIS

D

Q57

G

S

N-2N7002LT1G_SOT23

+VCC_GFXCORE(7,41)

R503

R503 47R0402

47R0402

PP_VGFXDIS

D

Q58

G

S

N-2N7002LT1G_SOT23

R505

R505 100KR0402-RH

100KR0402-RH

PM_SLP_M_L(17,45)

Q61

N-2N7002LT1G_SOT23

R499

R501

R501 100KR0402-RH

+V1.1M(15,22,40,46)

R504

R504 470R0402

470R0402

PP_V11M_DIS

Q59

D

PM_SLP_M

R506

R506 1MR0402

D

G

S

1MR0402

D

G

S

N-2N7002LT1G_SOT23

PM_SLP_LAN_L(17,40,45)

100KR0402-RH

Q60

D

G

S

N-2N7002LT1G_SOT23

R499

97.6R1%

PP_V3MDIS

Q55

D

G

S

N-2N7002LT1G_SOT23

PM_SLP_LAN

+V1.1_LAN_M(32,40)

R500

97.6R1%

PP_V11LANDIS

Q56

D

G

S

N-2N7002LT1G_SOT23

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EMERALD BAY

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EMERALD BAY

Title

DISCHARGE CIRCUITS

Size Document Number Rev

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Date: Sheet

2

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1

D D

+V5S(18,21,22,24,25,27,28,31,41,42,43,45,46,49,50)

C C

PCH_SATA_LED_L(15)

PM_SYSRST_L(11,17)

R634 330R0402R634 330R0402

D26

PCH_SATA_LED_L

PM_SYSRST_L M_RST

Y X

R637 330R0402R637 330R0402

M_HDDLED_L

Z

S-BAT54A_SOT23

M_HDDLED_H

JFP1

1 3

7 9

PLED

HDD+

SLED

HDDRESET-5PWSW+ RESET+

PWSW-

NC

H2X5[1]M-2PITCH_BLACK-RH

POWER ON and S5 ENTER/EXIT Button

M_PON

2 4 6 8

R635 330R0402R635 330R0402

M_PBT PM_PWRBTN_L

R633 100R0402R633 100R0402

S1

S1 SW-TACTS-RH-1

SW-TACTS-RH-1

1 2

12

3 4

34

MEC1 MEC2

+V5S(18,21,22,24,25,27,28,31,41,42,43,45,46,49,50)

PM_PWRBTN_L

R588 10KR0402R588 10KR0402

PM_PWRBTN_L (11,17,35,36)

+V3.3A (15,16,17,19,20,22,27,28,29,32,34,36,37,38,39,45,46)

B B

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Title

START UP SEQUENCE

Size Document Number Rev

A

Date: Sheet

Thursday, September 25, 2008

2

5

0

4

3

2

1

+V3.3A(4,15,16,17,19,20,22,27,28,29,32,34,36,37,38,39,46)

Q65A

PP-AO4805_SO8

+V5A(16,22,27,28,31,33,38,39,40)

D D

PS_S3CNTRL(40,46)

PM_SLP_S3_L(17,27,28,36,39,40,43)

100KR0402

PS_S3CNTRL

Q70

D

G

S

N-2N7002LT1G_SOT23

R515

100KR0402

C0.1u16Y0402

R516

R517

PS_S4CNTRL

Q73

D

G

C C

PM_SLP_S4_L(17,36,39,43)

G

S

N-2N7002LT1G_SOT23

PP-AO4805_SO8

1 7

8

C580

2

PS_S3CNTRL_R

100KR0402

+V5A (16,22,27,28,31,33,38,39,40)

PP-AO4805_SO8

Q65B

3 5

C584

C0.1u16Y0402

R519

100KR0402

4

PS_S4CNTRL_R

+V5 (30,39,43)

6

+V5S(18,21,22,24,25,27,28,31,41,42,43,44,46,49,50)

+VAC_IN(38,39,40,41,42) +VAC_IN(38,39,40,41,42)

R513

R513 100KR0402

100KR0402

PS_S3CNTRL_3.3S

Q68

D

G

S

N-2N7002LT1G_SOT23

+VAC_IN(38,39,40,41,42)

R518

R518 100KR0402

100KR0402

Q66

8 7 2 6 5

N-AO4468_SOIC8-RH

4

C582

C0.01u10X0402-RH

+V3.3A(4,15,16,17,19,20,22,27,28,29,32,34,36,37,38,39,46)

1 3

R514

R514 100KR0402

100KR0402

S3_V12A_INV

Q69

D

PS_S3CNTRL

Q71

8 7 2 6 5

4

+V3.3 (39,43)

1 3

N-AO4468_SOIC8-RH

D

G

S

N-2N7002LT1G_SOT23

SLPS4_CONTROL

Q72

D

G

S

N-2N7002LT1G_SOT23

C585

C0.1u16Y0402

+V1.5(7,13,14,39,43)

8 7 2 6 5

C583

C0.01u10X0402-RH

+V3.3S(10,11,13,14,15,16,17,19,20,21,22,24,25,26,29,30,31,34,35,36,37,40,41,42,43,46,49,50)

Q67

4

+V1.5S(21,29,31,43,46)

1 3

N-AO4468_SOIC8-RH

C581

C0.33u16Y

+V3.3A(4,15,16,17,19,20,22,27,28,29,32,34,36,37,38,39,46)

1 3

N-AO4468_SOIC8-RH

4

C586

C0.01u10X0402-RH

+V3.3M(21,32,33,43,46)

Q74

8 7 2 6

+V3.3S,19,20,21,22,24,25,26,29,30,31,34,35,36,37,40,41,42,43,46,49,5

12

LED2

LED2 LED04-B-25mA4.3V_20125-RH

LED04-B-25mA4.3V_20125-RH

PM_SLP_S3_L(17,27,28,36,39,40,43)

System Power Good

SYS_STATUS_CR

Q78

D

G

B B

PLT_RST_L(11,19,29,32,35,36,37,50)

G

S

N-2N7002LT1G_SOT23

+V3.3 (39,43)

P-SI2301BDS_SOT23

G

Q75

D S

S3_STATUS_CR

12

LED3

LED3 LED04-B-25mA4.3V_20125-RH

LED04-B-25mA4.3V_20125-RH

PM_SLP_LAN_L(17,40,43)

+VAC_IN(38,39,40,41,42)

R521

R521 100KR0402

100KR0402

Q77

D

G

S

N-2N7002LT1G_SOT23

R520 100KR0402R520 100KR0402

V3M_G_SWITCH_OR

V3M_G_SWITCH

G

5

Q76

D

S

N-2N7002LT1G_SOT23

+VAC_IN(38,39,40,41,42)

75 ohms chosen for ~16mA of LED current

SLPM_INV(46)

PM_SLP_M_L(17,43)

A A

5

4

3

R522 100KR0402R522 100KR0402

R523

R523 100KR0402

100KR0402

Q80

D

G

S

N-2N7002LT1G_SOT23

EMERALD BAY

Title

Size Document Number Rev

A

Date: Sheet

Q79

D

G

S

N-2N7002LT1G_SOT23

SLEEP CONTROL

2

V1.1M_SWITCH (40)

C587

C587 C0.01u16X0402

C0.01u16X0402

Intel Confidential

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45 53Thursday, September 25, 2008

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PWRGD Comparators: V5S, V3.3S, V3.3M, V1.8S

+V3.3A(4,15,16,17,19,20,22,27,28,29,32,34,36,37,38,39,45) +V3.3S(10,11,13,14,15,16,17,19,20,21,22,24,25,26,29,30,31,34,35,36,37,40,41,42,43,45,49,50)

+V3.3M(21,32,33,43,45)

+V5S(18,21,22,24,25,27,28,31,41,42,43,44,45,49,50)

R526

C589

R526 100KR0402

100KR0402

1 2 3 4 5 6 7 8

PM_SYS_PWRGD

U34

OUTB

OUTC

OUTA

OUTD

V+

HYST

INA-

IND+

INA+

IND-

INB-

INC+

INB+

INC-

REF

V-

Pad

LTC1444

17

PP_REFIN

VREF = 1.221V

16 15 14 13 12 11 10 9

10KR1%0402

+V1.8S_PWRGD

R538

R525

R528

24.9KR1%0402

D D

VRPWRGD_3.3M_WOL

Adds 3.3M_WOL to the MPWROK tree.

R525

13KR1%0402

+V5S_PWRGD

R529

R529 100KR0402

100KR0402

+V3.3M_WOL_PWRGD

C0.1u16Y0402

R536

R535

10KR1%0402

R536 10KR1%0402

10KR1%0402

PWRGD Comparators: V1.1M, V1.1S, V1.5S

PP_HYST

+V3.3S_PWRGD

R539

R539 2MR

2MR

+V1.8S(7,21,26,40,43,48)

+V3.3A(4,15,16,17,19,20,22,27,28,29,32,34,36,37,38,39,45)

R530

3.32KR1%0402

R537

R537 10KR1%0402

10KR1%0402

R527

13KR1%0402

R532

R532 10KR1%0402

10KR1%0402

DELAY_VR_PWRGOOD(11,42)

ALL_SYS_PWRGD

+V3.3A(4,15,16,17,19,20,22,27,28,29,32,34,36,37,38,39,45)

C590

C590 C0.1u16Y0402

C0.1u16Y0402

5

U36

VCC

DDRQ_VR_PWRGD

DDRQ_VR_PWRGD(39)

DDRQ_VR_PWRGD

VCC

1

A

2

B

GND

74AHC1G08GW_SOT353-RH

3

+V3.3A(4,15,16,17,19,20,22,27,28,29,32,34,36,37,38,39,45)

R540

C C

R540 100KR0402

100KR0402

+V1.1S1.5S_PWRGD

+V1.1S(15,16,17,21,22,40,42,43)

R543

U40

X_0R0402

+V3.3A(4,15,16,17,19,20,22,27,28,29,32,34,36,37,38,39,45)

R542

147KR1%0402-RH

147KR1%0402-RH C596

C596

C0.1u16Y0402

R547

100KR1%0402-RH

U42

NO_STUFF

R552

R552 X_0R0402

X_0R0402

C599

C599 C0.022u16X0402

C0.022u16X0402

U42

1

OUTA GND +INA

LT6700-3

OUTB

+INB

Vs

2 3

VREF=400mv VREF=400mv

+V1.1M_PWRGD

+V1.1M(15,22,40,43)

R551

147KR1%0402-RH

B B

100KR1%0402-RH

R553

+V1.1M_PWRGD_R

6 5 4

100KR1%0402-RH

X_0R0402

NO_STUFF

+V1.1S_PWRGD_R

1

OUTA

2

GND

3

+INA

C597

C597 C0.022u16X0402

C0.022u16X0402

LT6700-3

OUTB

Vs

+INB

C0.01u10X0402-RH

6 5 4

C593

C593 C0.1u16Y0402

C0.1u16Y0402

R544

R544 X_0R0402

X_0R0402

NO_STUFF

+V1.5S_PWRGD_R

C598

+V1.5S(21,29,31,43,45)

R545

R545 237KR1%0402

237KR1%0402

R548

R548 100KR1%0402-RH

100KR1%0402-RH

PM_MPWROK_R

C594

C0.1u16Y0402

DDR_SYS_1.1S1.5SPWRGD

U39

1

A

2

B

PS_S3CNTRL(40,45)

+V1.1S_VTT_PWRGD(40)

5

VCC

4

Y

GND

74AHC1G08GW_SOT353-RH

3

iAMT PWROK Logic

+V3.3A(4,15,16,17,19,20,22,27,28,29,32,34,36,37,38,39,45)

C601

R556

R556 100KR0402

100KR0402

+V1.1_LAN_VR_PWRGD(40)

+V1.1M_PWRGD

U43

1

A

2

B

A A

Q84

D

G

S

N-2N7002LT1G_SOT23

SLPM_INV (45)

5

C0.1u16Y0402

5

VCC

4

Y

GND

74AHC1G08GW_SOT353-RH

3

Adds 3.3M to the MPWROK tree. Needed to support G3->M3 and Moff to M3 transitions.

+V1.1M_PWRGD_AND

VRPWRGD_3.3M_WOL

4

+V3.3A(4,15,16,17,19,20,22,27,28,29,32,34,36,37,38,39,45)

5

U44

VCC

1

A

2

B

GND

74AHC1G08GW_SOT353-RH

3

PM_PCH_PWROK(17)

C600

C0.1u16Y0402

4

Y

R557 0R0402R557 0R0402

R558 X_0R0402R558 X_0R0402

MPWROK drives PCH MPWROK and AUXPWROK

3

PM_MPWROK (17)

EMERALD BAY

Title

Size Document Number Rev

A

Date: Sheet

Main S0 PWROK Logic

+V3.3S(10,11,13,14,15,16,17,19,20,21,22,24,25,26,29,30,31,34,35,36,37,40,41,42,43,45,49,50)

DDRQ_TERM_PWRGD

4

Y

PM_1.5S1.1SMPWRGD_R

R541

POWER SEQUENCE LOGIC

R531

R531 2KR1%0402

2KR1%0402

U35

1

A

2

B

PM_SYS_PWRGD

1KR0402

Q81

D

G

S

N-2N7002LT1G_SOT23

2

+V3.3A(4,15,16,17,19,20,22,27,28,29,32,34,36,37,38,39,45)

5

VCC

Y

GND

74AHC1G08GW_SOT353-RH

3

1 2

+V3.3A (4,15,16,17,19,20,22,27,28,29,32,34,36,37,38,39,45)

U41

VCC

1

A

2

B

GND

ALL_SYS_PWRGD(35)

C588

C588 C0.1u16Y0402

C0.1u16Y0402

4

R533 0R0402R533 0R0402

DELAYVRSYSPWRGD

stuff R5G2 only when using CK505 clock

R534 X_0R0402R534 X_0R0402

NO_STUFF

+V3.3A(4,15,16,17,19,20,22,27,28,29,32,34,36,37,38,39,45)

C592

C592 C0.1u16Y0402

C0.1u16Y0402

5

U37

VCC

A

B

GND

PM_DDR_SYSPWRGD

4

Y

+V1.1S1.5S_PWRGD

74AHC1G08GW_SOT353-RH

3

PM_1.5S1.1SMPWRGD (40)

C595

C595 C0.1u16Y0402

C0.1u16Y0402

5

ALL_SYS_PWRGD

4

Y

74AHC1G08GW_SOT353-RH

3

stuff R4G1 only when using internal clock

R546 0R0402R546 0R0402

R549 2KR1%0402R549 2KR1%0402

R550

R550 1KR1%0402

1KR1%0402

Optional Gfx VR_EN Delay

+V3.3A(4,15,16,17,19,20,22,27,28,29,32,34,36,37,38,39,45)

R555

R555 100KR0402

100KR0402

+V1.1S_VTT_PWRGD_INV

Q83

D

G

S

X_N-2N7002LT1G_SOT23

R554 1KR0402R554 1KR0402

Q82

D

G

S

X_N-2N7002LT1G_SOT23

R524 10KR1%0402R524 10KR1%0402

To PCH: SYS_PWROK

SYS_PWROK_L (17) PM_PCH_PWROK (17)

+V3.3A(4,15,16,17,19,20,22,27,28,29,32,34,36,37,38,39,45)

C591

C591 C0.1u16Y0402

C0.1u16Y0402

5

U38

VCC

1

A

4

Y

2

B

GND

74AHC1G08GW_SOT353-RH

3

ALL_SYS_PWRGD (35)

To PCH: PCH PWROK.

PM_PCH_PWROK (17)

H_VTTPWRGD (4)

CPU 1.1V version of VTT_PWRGD

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46 53Thursday, September 25, 2008

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DDR_SYS_1.1S1.5SPWRGD

GFXVR_EN (7)

GFXVR_EN_R (41)

A

1

A A

Intel Confidential

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Title

Size Document Number Rev

Date: Sheet

1

Date: Sheet

POWER UP SEQUENCE

A

5

PCH PInHW Strap Purpose

No Reboot RSVD A16 swap override Integrated VRM Enable/Disable Boot BIOS Strap bit [1] BBS[1] Boot BIOS Strap bit[0] BBS[0] ESI Strap (Server only)

D D

C C

B B

Intel Anti-Theft Technology Enable Flash Descriptor Security Override TPM Functionality Disable DMI Termination Voltage RSVD RSVD RSVD RSVD RSVD

DMI Termination Voltage

NV_CLE

Intel Anti-Theft Technology Enable

NV_ALE High = Enabled Stuff PU

Set to Vcc when LOW

Set to Vcc/2 when HIGH

NV_CLE(19,26)

Low = Disabled Unstuff PU (Default)

NV_ALE(19,26)

SPKR GPIO[34] GNT[3]#/ GPIO[55] INTVRMEN GNT[1]#/ GPIO[51] GNT[0]# GNT[2]#/ GPIO[53] NV_ALE GPIO33/DOCK_EN# SPI_MOSI NV_CLE HDA_SDO GPIO[8] GPIO[27] HDA_SYNC GPIO[15]

+V1.8S(7,21,26,40,43,46)

NO_STUFF

R560

R560 X_1KR0402

X_1KR0402

NO_STUFF

R562

R562 X_10KR0402

X_10KR0402

4

3

FM1

X

X_FM

PCH_GPIO53(19)

FM2

X

X_FM

2

FM3

X

X_FM

FM4

X

X_FM

FM5

X

X_FM

FM6

X

X_FM

1

NO_STUFF

ESI Strap (Server only)

PCH_GPIO53

A16 swap override Strap/Top-Block Swap Override jumper

PCI_GNT#3 Low = A16 swap

override/Top-Block Swap Override enabled High = Default

Low = Enabled

High = Disabled

PCI_GNT_L3(19)

Simulation

Layer1 Layer3

SIP1

L1_50ohm L3_50ohm

X_PIN1*2

4 mil 50ohm 4.5 mil 55ohm

SIP2

X_PIN1*2

R559

R559 X_10KR0402

X_10KR0402

NO_STUFF

R561

R561 X_10KR0402

X_10KR0402

9 2

MH1MH1

9 2

MH3MH3

PCB1

7431-0A

7

9 2

MH2MH2

9 2

MH4MH4

8

6 5

3

4

7

8

6 5

3

4

JRTC2

BAT-BT-CR2032-RH

7

8

6 5

3

4

7

8

6 5

3

4

RTC Battery

SIP5

L3_85ohm_N

HK1

HK_31X31

A A

5

HK2

4

HK_61x61

L3_85ohm_P

85 ohm

3

X_PIN1*2

Intel Confidential

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Title

PCH STRAPS

Size Document Number Rev

A

B

A

B

A

B

Date: Sheet

2

Date: Sheet

1

5

4

3

2

1

+V5S(18,21,22,24,25,27,28,31,41,42,43,44,45,46,50)

R660

2.2KR0402

Q88

+V3.3S(10,11,13,14,15,16,17,19,20,21,22,24,25,26,29,30,31,34,35,36,37,40,41,42,43,45,46,50)

D D

CRT_DDC_CLK(18) CRT_DDC_DATA(18)

L44

CRT_RED(18)

CRT_GREEN(18)

C C

CRT_BLUE(18)

R565

R565 150R1%0402

150R1%0402

R566

R566 150R1%0402

150R1%0402

R567

R567 150R1%0402

150R1%0402

L44

60L3A-40

C603

C603 C10p25N0402-RH-3

C10p25N0402-RH-3

L47

60L3A-40

C606

C606 C10p25N0402-RH-3

C10p25N0402-RH-3

L50

60L3A-40

C609

C609 C10p25N0402-RH-3

C10p25N0402-RH-3

CRT_L_RED

CRT_L_GREEN

CRT_L_BLUE

C604

C604 C22p50N0402

C22p50N0402

C607

C607 C22p50N0402

C22p50N0402

C610

C610 C22p50N0402

C22p50N0402

L45

60L3A-40

L48

60L3A-40

L51

60L3A-40

C605

C605 C10p25N0402-RH-3

C10p25N0402-RH-3

CRT_L2_RED CRT_L2_RED

CRT_L2_GREEN CRT_L2_GREEN

CRT_L2_BLUE CRT_L2_BLUE

C608

C608 C10p25N0402-RH-3

C10p25N0402-RH-3

CRT_VSYNC(18) CRT_HSYNC(18)

C611

C611 C10p25N0402-RH-3

C10p25N0402-RH-3

CRT_DDC_CLK CRT_DDC_DATA

R563

2.2KR0402

R564

2.2KR0402

C613

X_C33p50N0402

C614

C614 X_C33p50N0402

X_C33p50N0402

Q88 N-2N7002LT1G_SOT23

N-2N7002LT1G_SOT23

CRT_DDC_CLK CRT5V_DDC_CLK

CRT_VSYNC CRT_HSYNC

D

S

G

R661

WEN053

10KR0402

+V3.3S (10,11,13,14,15,16,17,19,20,21,22,24,25,26,29,30,31,34,35,36,37,40,41,42,43,45,46,50)

CRT_DDC_DATA CRT5V_DDC_DATA

+V5S(18,21,22,24,25,27,28,31,41,42,43,44,45,46,50)

R659

2.2KR0402

Q89

Q89 N-2N7002LT1G_SOT23

N-2N7002LT1G_SOT23

D

S

G

WEN050

R662

+V3.3S (10,11,13,14,15,16,17,19,20,21,22,24,25,26,29,30,31,34,35,36,37,40,41,42,43,45,46,50)

10KR0402

1617

VGA1

6 1

11

CRT5V_DDC_DATA

CRT_VSYNC CRT5V_DDC_CLK

DSUB-VGAF_BLUE-RH-2

7 2

12

8 3

13

9 4

14

10 5

15

CRT_L2_RED CRT_L2_GREEN CRT_L2_BLUECRT_HSYNC

+V5S_DVI

C248

C248 C0.1u16Y0402

C0.1u16Y0402

ESD DIODE

CRT_L2_RED CRT_L2_BLUE

B B

CRT_L2_GREEN CRT_HSYNC CRT_VSYNC

12

D19

D19 ESD-VPORT0603100KV05

ESD-VPORT0603100KV05

CRT_L2_BLUE CRT_HSYNC

+V5S_DVI

52

614

3

ESD-IP4220

U51

CRT_L2_GREENCRT_L2_RED

+V5S(18,21,22,24,25,27,28,31,41,42,43,44,45,46,50)

F1

1 2

F-MICROSMD110F-RH

V_DVI

L25

80L6A-30_0805-RH

+V5S_DVI

A A

Intel Confidential

EMERALD BAY

Title

DVI-I (1 of 2)

Size Document Number Rev

B

Date: Sheet

5

4

3

2

Date: Sheet

1

Intel Confidential

0.5

of

49 53Thursday, September 25, 2008

5

4

3

2

1

+1.8V_SATA

TRSTN_SATA SATA_SCAN XTALO_SATA XTALI_SATA

D D

PSATA0

9

GND

1

P_RXP0

GND

2

TX+

RX+

SATA7PSM_BLUE-P-RH-2

PSATA1

C C

TX+

RX+

SATA7PSM_BLUE-P-RH-2

TX-

RX-

GND

TX-

RX-

GND

GNDGND

GND

GNDGND

P_RXN0

3 4

P_TXN0

5

P_TXP0

6 7 8

9 1

P_RXP1

2

P_RXN1

3 4

P_TXN1

5

P_TXP1

6 7 8

C633 C0.01u10X0402-RHC633 C0.01u10X0402-RH C632 C0.01u10X0402-RHC632 C0.01u10X0402-RH

C634 C0.01u10X0402-RHC634 C0.01u10X0402-RH C635 C0.01u10X0402-RHC635 C0.01u10X0402-RH

C637 C0.01u10X0402-RHC637 C0.01u10X0402-RH C638 C0.01u10X0402-RHC638 C0.01u10X0402-RH

C639 C0.01u10X0402-RHC639 C0.01u10X0402-RH C640 C0.01u10X0402-RHC640 C0.01u10X0402-RH

PSATARXP0 PSATARXN0

PSATATXN0 PSATATXP0

PSATARXP1 PSATARXN1

PSATATXN1 PSATATXP1

+1.8V_SATA

CLK_PCIE_SATA(34) CLK_PCIE_SATA_L(34)

VDDSPLL

PSATARXP1 PSATARXN1

PSATATXN1 PSATATXP1

PSATATXP0 PSATATXN0

PSATARXN0 PSATARXP0

CLK_PCIE_SATA CLK_PCIE_SATA_L

89

1 2 3 4 5 6 7 8

9 10 11 12 13 14 15 16 17 18 19 20 21 22

86

87

88

85

VSSX

XTALO

XTALI/CLKI

89 VSSSPLL VDDSPLL VDDSRX RX1+ RX1VSSRX VDDSTX TX1TX1+ VDDSTX#10 VSSTX VDDSTX#12 TX0+ TX0VDDSTX#15 VSSRX#16 RX0RX0+ VDDSRX#19 REFCLK+ REFCLKVSSREF

VDDPRXPLL

24

23

VDDX

83

84

VSSD#84

I2C_SCLK

VDDPRX27PRX-26PRX+25VSSA#24

28

+1.8V_SATA

+V3.3S (10,11,13,14,15,16,17,19,20,21,22,24,25,26,29,30,31,34,35,36,37,40,41,42,43,45,46,49)

+V3.3S(10,11,13,14,15,16,17,19,20,21,22,24,25,26,29,30,31,34,35,36,37,40,41,42,43,45,46,49)

C631

U52

VSSD#66

VSSD#60

VDDD#54

VSSD#48

67

VDDO#67

FL_ADDR1568FL_ADDR1669FL_ADDR1770FL_ADDR18

U52 [SIL3132-0.2]

[SIL3132-0.2]

66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45

82

I2C_SDAT

76

79

74

72

71

73

78

77

81

TDI

TCK

TMS

TDO

TRSTN

FL_CS_N

FL_RD_N

VDDD#75

FL_WR_N

SCAN_MODE

FL_ADDR14 FL_ADDR13 FL_ADDR12 FL_ADDR11 FL_ADDR10

FL_ADDR09 FL_ADDR08 FL_ADDR07 FL_ADDR06 FL_ADDR05

FL_ADDR04 FL_ADDR03 FL_ADDR02 FL_ADDR01 FL_ADDR00

FL_DATA7 FL_DATA6 FL_DATA5

75

80

C631 C0.1u10X0402

C0.1u10X0402

+1.8V_SATA

SATA_SCAN

SATA_L0 SATA_L1

TRSTN_SATA

+1.8V_SATA VDDSPLL

30L500mA-200-RH

R671 X_1KR0402R671 X_1KR0402

R670 4.7KR0402R670 4.7KR0402 R672 4.7KR0402R672 4.7KR0402

R673

4.7KR0402

L59

30L500mA-200-RH

L60

C641

C641 C0.1u10X0402

C0.1u10X0402

NO_STUFF

VDDPPLL

C636

C636 C0.1u10X0402

C0.1u10X0402

C642

C642 C0.1u10X0402

C0.1u10X0402

VDDO44FL_DATA443FL_DATA342FL_DATA241FL_DATA140FL_DATA039VDDD38LED037LED136VSSD35PERST N34VDDPTXPLL33VDDPTX32VSSA31PTX+30PTX-29VSSA#28

+V3.3S(10,11,13,14,15,16,17,19,20,21,22,24,25,26,29,30,31,34,35,36,37,40,41,42,43,45,46,49)

VDDPPLL

C643

C643 C0.1u10X0402

B B

+1.8V_SATA

PCIE_RXN3_C

PCIE_RXP3_C

SATA_L0 SATA_L1

PLT_RST_L

C644 C0.1u10X0402C644 C0.1u10X0402 C645 C0.1u10X0402C645 C0.1u10X0402

C648

C648 C0.1u10X0402

C0.1u10X0402

C656

C656 C0.1u10X0402

C0.1u10X0402

PCIE_TXN3 PCIE_TXP3

C649

C649 C0.1u10X0402

C0.1u10X0402

C657

C657 C0.1u10X0402

C0.1u10X0402

C651

C651 C0.1u10X0402

C0.1u10X0402

C658

C658 C0.1u10X0402

C0.1u10X0402

C352

C0.1u16Y0402

+V3.3S

+1.8V_SATA

U53

1

VIN

3

EN

GND

2

5

VOUT

FB

UP7707M5-00_SOT23-5-RH

4

R509

R509 16R1%0402-RH

16R1%0402-RH

+

12

EC54

EC54 C330u2.5pSO-1

C330u2.5pSO-1

PSATA_PWM0

R510

R510 22R1%0402

22R1%0402

5

4

+1.8V_SATA

C646

C646 C0.1u10X0402

C0.1u10X0402

+1.8V_SATA

C654

C654 C0.1u10X0402

C0.1u10X0402

C647

C647 C0.1u10X0402

C0.1u10X0402

C655

C655 C0.1u10X0402

C0.1u10X0402

3

0,41,42,43,45,46,49)

A A

C0.1u10X0402

D28

Y X

PSATA_L P_SATA01

Z

S-BAT54A_SOT23

PLT_RST_L (11,19,29,32,35,36,37,45)

PCIE_RXP3 (16) PCIE_RXN3 (16)

PCIE_TXN3 (16) PCIE_TXP3 (16)

C652

C652 C0.1u10X0402

C0.1u10X0402

EMERALD BAY

Title

C659

2

C659 C0.1u10X0402

C0.1u10X0402

Size Document Number Rev

B

Date: Sheet

LED4

LED04-B-25mA4.3V_20125-RH

DVI-I (1 of 2)

12

XTALO_SATA

1 2

C650

C650 C27p50N0402

C27p50N0402

R674

330R0402

R675

XTALI_SATA

1MR0402

1MR0402 X5

X5

34

25MHZ20P_S-RH-1

50 53Thursday, September 25, 2008

1

+V5S(18,21,22,24,25,27,28,31,41,42,43,44,45,46,49)

C653

C653 C27p50N0402

C27p50N0402

Intel Confidential

of

0.5

5

Rev 0.5

07-10-08 Initial release

Rev A

07-21-08

01.Revise All Page Titleblock Rev: A , Page number

D D

02.Revise All Page Part Number ,Part symbol and Footprint from MSI Database

03.Page 10 : FAN1 and FAN2 Change to MSI Symbol and footprint

04.Page 11 : J1 Change to MSI Symbol and footprint ,Pin Defination is same as reference design

05.Page 13 : DIMM1 Change to MSI Symbol and footprint ,Pin Defination is same as reference design

06.Page 13 : DIMM2 Change to MSI Symbol and footprint ,Pin Defination is same as reference design

07.Page 16 : SMBus Hub IC U6E1 Change to Use 2N7002

08.Page 24 : HDMI + Display Port is new part , The Part needs to confirm Vendor again************

09.Page 24 : HDMI Differential Signal increase Common Chock and ESD Part

10.Page 24 : Rev 0.5 Page 55 HDMI and Page 24 Display Port are combined

11.Page 25 : Increase LVDS schematic , LVDS connector follow MSI

12.Page 26 : CN2 Change to MSI footprint and Symbol , Pin Defination is same as reference design

13.Page 27 : USB Differential Signal increases Common Chock

14.Page 27 : CN3 is new Part , the Part has three USB Vertical combined .

15.Page 28 : USB Differential Signal increases Common Chock

16.Page 29 : Top of Board is MINIPCIE1(MiniPCIE 9.0mm) that support Wireless LAN Card

17.Page 29 : Bottom of Board is MINIPCIE2(MiniPCIE 4.85mm)

C C

18.Page 30 : J6J3 Change to E-SATA Vertical CN4

19.Page 31 : Increase ALC888 HD Audio Codec , The Realtek Vendor will confirm schematic

20.Page 32 : Del T1E1 and J1E1 , Increase CN5 , Because transformer is intergrade

21.Page 33 : SPI ROM Programmable header changes to MSI SPI Progrmaing tooling

22.Page 34 : Clock GEN Changes to IDTCV-184 , the part Package is 56 pin

23.Page 11 : J14 Change to MSI Symbol and footprint ,Pin Defination is same as reference design

24.Page 38,39,40,41,42 : They changes MSI Power Solution

25.Page 49 : Increase screw hold , Optical point , and JRTC2 .The JRTC2 is external battery

26.Page 51 : DVI Connecctor Change to MSI footprint and Symbol.

27.Page 51 : DVI Differential Signal Increase Comm Chock

07-23-08

From Intel

01.Page 19 : R142 , R145 From 22 ohm Chabge to 47 ohm

02.Page 19 : R143 From 22 ohm Chabge to 51 ohm 1%

03.Page 18 : R132 From 1.02K ohm 1% Chabge to 1K ohm 1%

B B

04.Page 07 : Net Name : GFXVR_EN add 4.7K ohm to GND

05.Page 31 : R243 , R245 From 22 ohm Change to 33 ohm

06.Page 31 : Net name : HDA_SYNC and HDA_SDOUT add R592 33 ohm and R593 33 ohm series termination

07.Page 17 : Net name : PM_PCH_PWROK add R594 10K ohm to GND

08.Page 04 : R18 From 1.8K ohm 1% Change to 1K ohm 1%

09.Page 04 : VDDPWRGOOD_R ckt should tie to +V1.1S_VTT not +V3.3A

10.Page 04 : VDDPWRGOOD_R should be changed to PM_DRAM_PWRGD

11.Page 04 : R20,R21 From 20 ohm 1% 0402 Change to 49.9 ohm 1% 0402

12.Page 04 : R22,R23 From 49.9 ohm 1% 0402 Change to 20 ohm 1% 0402

13.Page 17 : R117 not need . Then Net name :FDI_LSYNC0 connect U3 Pin BJ12

14.Page 01 : Revise Title Diagram

15.Page 17 : Net name : PM_SYSRST# add R597 4.7K pull-up +V3.3A

16.Page 04 : Net name : BUF_PLT_RST# add R603 24.9K serial resistor after pull-down resistor

17. About U28 , U29 and Net : H_VTTVID1 , Waiting for Power Team Solution *********************

18. About POWER UP SEQUENCE, Waiting for Power Solution *********************

A A

From Fintek

01.Page 36 : Pin 27,28,29,30 of U24 not use , it needs to PU (RN6)to +V3.3S

02.Page 36 : Pin 41,42,43,44 of U24 not use , it needs to PU (RN7)to +V3.3S

03.Page 36 : Pin 17 of U24 is H/W Strapping , Pu is Disable KBC , Pd is Enable KBC

From Thermal

01.Page 10 : MSI FAN use DC FAN , So Modify it to DC FAN Solution

02.Page 10 : There are Three FAN Connector , Add FAN3

5

4

3

Change Cap. for Quality

01.Page 07 : C16,C24,C25 From 330uF EC Change EC24,EC25,EC26 330uF/2.5V Solid Cap.

02.Page 13 : C71 From 330uF EC Change EC22 330uF/2.5V Solid Cap.

03.Page 13 : C92 From 330uF EC Change EC23 330uF/2.5V Solid Cap.

04.Page 22 : C178,C180 From 220uF EC Change EC27,EC28 220uF/2.5V Solid Cap.

05.Page 26 : C215 From 100uF EC Change EC29 100uF/4V Solid Cap.

06.Page 27 : C218,C220,C224 From 100uF EC Change EC30,EC31,EC34 220uF/16V EC

07.Page 28 : C225,C229 From 100uF EC Change EC32 and EC33 220uF/16V EC

08.Page 43 : C569,C570,C571,C572,C573,C574 From 470uF Change to 820uF/2.5V Solid Cap.

09.Page 45 : C577,C578,C579 From 15uF Change to 22uF .

07-24-08

01.Page 04 : R20,R21 From 20 ohm change to 49.9 ohm; R22,R23 From 49.9 ohm change to 20 ohm

02.Page 04 : Net Name : H_COMP0 connect U1 Pin AT26

03.Page 04 : Net Name : H_COMP1 connect U1 Pin G16

04.Page 04 : Net Name : H_COMP2 connect U1 Pin AT24

05.Page 04 : Net Name : H_COMP3 connect U1 Pin AT23

06.Page 04 : R603 Change to other side of pull-down

07.Page 04 : near Net name : PM_DRAM_PWRGD text be deleted

08.Page 04 : R15 From +V1.1S_VTT change to +V3.3A -- From Intel suggestion

09.Page 07 : C130 From 10uF/6.3V Change to 0.1uF-- From Intel suggestion

10.Page 51 : R563,R564 From 10K ohm Change to 2.2K ohm -- From Intel suggestion

07-25-08

01.Page 10 : FAN1 , FAN2 , FAN3 From Pin 1X3 Change Pin 1X4 ---- From Intel suggestion

02.Page 15 : Net Name : HDA_SDIN1,HDA_SDIN2,HDA_SDIN3 Add Module Port

03.Page 01 : Revise Table of contents on title page

04.Page 31 : U16 Pin 2 no connect , so delete net name :AMP_CODEC_EN

05.Page 31 : C275 From no stuff 470P Change to no stuff 100P ---- From Realtek suggestion

06.Page 31 : C247,C248 not use , so delete it ---- From Realtek suggestion

07.Page 31 : C270,C272,L33,L35 not use , so delete it ---- From Realtek suggestion

08.Page 31 : R250,R251 Connect trace after L38,L39 ---- From Realtek suggestion

09.Page 31 : R242 From 0 ohm 0402 Change to 47 ohm 0402 ---- From Realtek suggestion

10.Page 31 : R241 ,R248 no stuff ---- From Realtek suggestion

11.Page 31 : R329 From 300 ohm 1% Change to 324 ohm 1 % ---- From Realtek suggestion

12.Page 31 : Net name : SW_D connect CONN1 Pin 4 ---- From Realtek suggestion

13.Page 31 : Net name : D11 From 1N4148S Change to 1N5817 ---- From Realtek suggestion

14.Page 31 : Net name : SENSE_B connect R612,R613 For Jack sensing ---- From Realtek suggestion

15.Page 31 : Add C270 For GND Shielding ---- From Realtek suggestion

16.Page 31 : Add JHDA1 for External Audio Amplifer Card

07-29-08

01.Page 40 : Net name : +V1.1S_VTT add a selection schematic by H_VTTVID1, It selects 1.05V or 1.1V

02.Page 40 : Net name : +V1.1_LAN_M should be 1.05V , R395 From 20K ohm % Change to 5.49K oh 1%

03.Page 19,28 : USB Port add Module line - Port 9,10,11,12 -For MSI System

04.Page 42 : IMVP-6.5 add a Phase-3 For 65A CPU ---- From Intel suggestion

05.Page 42 : IMVP-6.5 add a Phase-3 For 65A CPU ---- From Intel suggestion

06.Page 15,30 : Add SATA port 4 ---- From Intel suggestion

07-29-08 Part 2

01.Page 31 :R256,R257,R258,R259 move between bead and Cap. ---- From Realtek suggestion

02.Page 31 : R242 no stuff , Delete L38,L39 and increase R631,R632---- From Realtek suggestion

02.Page 17 :U3 Pin J12 not connect F71859 , Add Test Point on this Pin ---- From Fintek suggestion

07-30-08

01.Page 04 :Net name :H_COMP0 and H_COMP1 pull 49.9 ohm 1% , R22 and R23 From 20 ohm 1% Change to 49.9 ohm 1% ---From Intel suggestion

02.Page 04 :Net name :H_COMP2 and H_COMP3 pull 20 ohm 1% , R20 and R21 From 49.9 ohm 1% Change to 20 ohm 1% ---From Intel suggestion

EMERALD BAY

Title

Size Document Number Rev

A

Date: Sheet

3

2

REVISION HISTORY

2

51 53Thursday, September 25, 2008

1

Intel Confidential

of

A

5

07-30-08

03.Page 45 :Add Pin Header 2x5 Pin for Power On , HDD LED , Reset Function---- From MSI System

04.Page 20 :Add GPIO49 Pull-High 10Kohm 0402 to +V3.3S

05.Page 49 :Add PCB impedance coupon trace

06.Page 30 :Add J18 SATA Power Connector

07-31-08

01.Page 36 : Add +V3.3A_RTC Voltage connect to U24 Pin 48 ---- From Fintek System

02.Page 39 : Change CN6 for 11A DC Jack

D D

03.Page 27,28 : U11,U12,U13,U14,U48,U49 From TPS2052B Change to UP7533

04.Page 27 : CN3 From USBx3 Vertical Change to Dual USB Port

05.Page 27,30 : Add USB Port + E-SATA -- CN4

06.Page 10 : Add DC FAN and PWM FAN Co-Lay

07.Page 40 : +VAC_IN of Q26 add a Cap : C569 --- From Power Suggestion

08.Page 40 :+V1.1S needs to delay , add C71 0.1uF --- From Demo design Suggestion

09.Page 40 :+V1.8S needs a control signal by PM_SLP_S3# --- From Power Sequence REV:0.71 Suggestion

10.Page 39 : --- Q22 From AO4458 change NTMFS4841NHT1G , Q23 From AO4458 change NTMFS4835NT1G

----Fromm Power Suggestion

11.Page 38 :Net Name : +V5A add a Cap. EC47 220uF/6.3V --- From Power Suggestion

12.Page 38 :Net Name : +V3.3A add a Cap. EC31220uF/6.3V --- From Power Suggestion

13.Page 38 : PU1 Pin 14 add resistor(R652 and R653) for Freq. Selection --- From Power Suggestion

14.Page 38 : Net name : VR_ALW_ENABLE add a resistor R654 20K to GND --- From Power Suggestion

15.Page 42 : Add R655 2,2 ohm , C570 1000PF --- From Power Suggestion

16.Page 42 : C490 from 10PF change 33PF , R458 from 2.87K ohm change 2.49K ohm --- From Power Suggestion

17.Page 42 : C496 from 0.33uF change 0.22uF , C497 from 27nF ohm change 47nF , R469 from 1.5K ohm change 806 ohm--- From Power Suggestion

C C

18.Page 42 :Net Name :ISEN3 add C571 0.22uF to GND --- From Power Suggestion

19.Page 42 :LGATE MOSFET add a puul-down 10Kohm to GND on Pin G --- From Power Suggestion

08-01-08

01.Page 15 : Net Name :PCH_JTAG_TMS add R640 51 ohm pull-high to +V1.1M--- From Intel Suggestion

02.Page 15 : Net Name :PCH_JTAG_TDI add R641 51 ohm pull-high to +V1.1M--- From Intel Suggestion

03.Page 15 : Net Name :PCH_JTAG_TDO add R642 51 ohm pull-high to +V1.1M--- From Intel Suggestion

04.Page 15 : Net Name :PCH_JTAG_RST# add R643 10K ohm pull-high to +V1.1M and add R644(no stuff) pull-down to GND--- From Intel Suggestion

05.Page 15 : Net Name :PCH_JTAG_TCK add R645 4.75K ohm 1% pull-down to GND-- From Intel Suggestion

08-05-08

01.Page 51 : Net Name :CRT_DDC_CLK and CRT_DDC_DATA add level shift circuit--- From Intel Suggestion

02.Page 09 : Net Name :CFG7 add a 3K ohm pull-down to GND --- From Intel Suggestion

08-07-08

01.Page 01-54 : Net Name has #,[x] and space , then change net name definition --- From Layout Suggestion

B B

02.Page 42 : R656,R657,R658 change to connect High side Gate ----- From Power Suggestion

03.Page 04 : Added test point symbol in net TP_SKTOCC#

04.Page 08 : Added test point symbol in U1I pin AT35,AT1,B1,A35

05.Page 08 : Added test point symbol in all TP_.* net

06.Page 14 : (R52/54/55/56) & (R57/58/59/60) combine use RN(0402)

07.Page 15 : eSATA signal (sata3) should be swap with SATA4 signal (RAID Mode issue)

08.Page 15 : Added test point symbol in net TP_SATA_* , TP_HDA_DOCK_RST#, U3A pin A34,F34

09.Page 15 : U4,R85,C118,LED1 should be no_stuff by default

10.Page 34 : U22 pin 55,56 added Series resistor (33 ohm)

11.Page 37 : EC37 change C16 22uF/6.3V 0805 and C372 change 22uF/6.3V 0805

12.Page 37 : C349,C350,C351,C352 can be change use one 270uF/16V solid Cap (OS-CON)

13.Page 50 : The port 80 connector can be remove to Page36

14.Page 50 : The VGA Connector ESD protect(Vport) can be change to use ESD-IP4220(D0G-0422003-P03)

15.Page 5,17,31,32 : C47,C276,C277,C278,C279,C172,C295,C296 From 4.7uF/6.3V(0805) change to 0603 pkg (C11-4757013-M09)

16.Page 5,13,14 : C46,C56,C58,C60,C77,C79,C81 From 2.2uF(0805) change to use 0603 pkg(C11-2257013-W08)

A A

08-13-08

01.Page 18 : Add R55,R332 on net name : DPD_HPD and DPC_HPD ---- From Intel checklist

02.Page 20 : R156 From 10K ohm Change 1K ohm ---- From RED FORT Suggestion

03.Page 16 :Net name - CLK_MINICARD1_OE_L and CLK_MINICARD2_OE_L connect 10Kohm to +V3.3S---From Check list Suggestion

5

4

3

08-15-08

01.Page 27 : Change EC30,EC34 package - D type

02.Page 27 : Change EC32,EC33,EC38,EC39,EC31,EC5,EC4,EC47 package - D type

03.Page 31 : Change EC51,EC52,EC53 package - D type ,, 47uF/16V

08-18-08

2

1

Page28: remove JUSB3 & JUSB4 connector (to save more space for PCB) Page52: added R87,R93,R94,R334 * modify all 100uF CAP. Library Page31: Remove JHDA1 (to save more space for PCB)

08-19-08

01.Page 49,50 : DVI connector Change VGA connector ---- From Intel Suggestion

02.Page 04 : Stuff R10 ---- From Intel Check list

03.Page 15 : Remove R82,R83 ---- From Intel Check list

04.Page 15 : Add R82 33 ohm on SPI_MISO ---- From Intel Check list

05.Page 33 : R296,R302 From 1K ohm Change 3.3K ohm ---- From Intel Check list

06.Page 20 : Add R83 10K ohm pull-up +3.3S , and no stuff R173 ---- From Intel Check list

07.Page 20 : MiniPCIE1 and MiniPCIE2 wake up on LAN control by GPIO1 and GPIO7 ,, Change GPIO8 and GPIO15

08.Page 42 : 100 ohm ±1% pull-up to VCCSENSE and VSSSENSE ?? -- Intersil reference design for NB solution pull-up 10 ohm on VCCSENSE and pull-down 10 ohm on VSSSENSE ------------ From Intersil Suggestion

08-20-08

01.Page 40 : U29 Pin 13 net name from DDR_DRVH Chabge DDR_DRVH1

02.Page 40 : U29 Pin 12 net name from DDR_LL Chabge DDR_LL1

03.Page 40 : U29 Pin 9 net name from DDR_DRVL Chabge DDR_DRL1

04.Page 37 : EC37 From DIP change to SMD

08-21-08

01.Page 04 : Add serial resistor on net name - BCLK_ITP and BCLK_ITP_L ---- From EMI Suggestion

02.Page 16 : Add serial resistor on net name - CLK_DP_P and CLK_DP_P_L ---- From EMI Suggestion

03.Page 16 : Add serial resistor on net name - CLK_MCH_PEG and CLK_MCH_PEG_L ---- From EMI Suggestion

04.Page 16 : Add serial resistor on net name - CLK_PEGA_P and CLK_PEGA_N ---- From EMI Suggestion

05.Page 16 : Add serial resistor on net name - CLK_PCIE_LAN and CLK_PCIE_LAN_L ---- From EMI Suggestion

06.Page 16 : Add serial resistor on net name - CLK_PCIE_MINICARD1 and CLK_PCIE_MINICARD1_L ---- From EMI Suggestion

07.Page 16 : Add serial resistor on net name - CLK_PCIE_MINICARD2 and CLK_PCIE_MINICARD2_L ---- From EMI Suggestion

08.Page 19 : Add Cap.(No Stuff) to GND on net name - CLK_PCI_SIO ---- From EMI Suggestion

09.Page 19 : Add Cap.(No Stuff) to GND on net name - CLK_PCI_FB ---- From EMI Suggestion

10.Page 19 : Add Cap.(No Stuff) to GND on net name - CLK_PCIF_PORT80 ---- From EMI Suggestion

11.Page 16 : Add Cap.(No Stuff) to GND on net name - CLK_BUF_REF14 ---- From EMI Suggestion

12.Page 16 : Add Cap.(No Stuff) to GND on net name - CLK_PCI_FB ---- From EMI Suggestion

13.Page 36 : Add Cap.(No Stuff) to GND on net name - CLK_PCI_SIO ---- From EMI Suggestion

14.Page 15 : Add Cap.(No Stuff) to GND on net name - SPI_CLK ---- From EMI Suggestion

08-22-08

01.Page 34 : Net Name - CLK_BUF_DOT96_P and CLK_BUF_DOT96_N From U22 Pin 24 ,25 Change to U22 Pin17,18 ---- From Intel Suggestion

02.Page 32 : Add a serial resistor on Net name - LAN_XTAL2 connect to U17 Pin 10 ---- From Intel Suggestion

03.Page 30 : SATA1 Change name - SATA0 ---- From RAID tool Requirement

04.Page 30 : SATA2 Change name - SATA1 ---- From RAID tool Requirement

05.Page 30 : SATA3 Change name - SATA2 ---- From RAID tool Requirement

08-25-08

01.Page 32 : Stuff R265 , and Add R575 no stuff resistor ---- From Intel Suggestion

08-26-08

01.Page 39 : Revise Power Solution for Energy Star ---- From Power Suggestion

02.Page 45 : Revise +V12A to +V12S ---- From Power Suggestion

Intel Confidential

EMERALD BAY

Title

REVISION HISTORY

Size Document Number Rev

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Date: Sheet

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08-27-08

5

01.Page 26 : Revise CN2 footprint for 1.8V ONFI

4

3

2

1

09-19-08

01.Page 48 : Change PCB color ,, From Coffee color change Blue color , change material number

02.Page 13,14 : C72,C73,C74,C75,C93 From 0.1uF change to 1uF ---- From Design guide Suggestion

03.Page 50 : Stuff Page 50 PCIE to SATA on ES1 chip

04.Page 01 : Revise BLock Diagram

08-28-08

01.Page 38 : Revise R665 From 120K ohm 1% change to 10K ohm 1% ---- From Power Suggestion

02.Page 40 : Revise R383 From 16.9K ohm 1% change to 9.1K ohm 1% ---- From Power Suggestion

D D

03.Page 40 : Revise R392 From 16.9K ohm 1% change to 5.1K ohm 1% ---- From Power Suggestion

04.Page 40 : Revise R393 From 10K ohm 1% change to 8.2K ohm 1% ---- From Power Suggestion

05.Page 40 : Revise R395 From 5.49K ohm 1% change to 20.5K ohm 1% ---- From Power Suggestion

06.Page 39 : Add U45 regulator ---- From Intel DOC 400755 Suggestion

07.Page 7 : Add U1 Pin J17 connect M_VREF_DQ_DIMM0 and U1 Pin H17 connect M_VREF_DQ_DIMM1

---- From Intel DOC 400755 Suggestion

09-01-08

01.Page 03~09 : Update U1 Symbol ---- From Intel Suggestion

02.Page 15~23 : Update U3 Symbol ---- From Intel Suggestion

03.Page 26 : Update CN2 footprint

04.Page 41 : U31 Pin 29 Change connect Digital GND ---- From Power Suggestion

05.Page 39 : U25 Pin 33 Change connect Digital GND ---- From Power Suggestion

06.Page 46 : Update U40,U42 footprint

09-03-08

01.Page 48 : Add Heatsink HK1 for U3

02.Page 46 : Update U34 Layout Footprint

C C

03.Page 39 : Update U25 Layout Footprint

04.Page 34 : Update U22 Material data

09-04-08

01.Page 24 : Swap trace on Pin of L13 , L17 ---- From Layout Suggestion

02.Page 11 : Swap trace on Pin of RN9 ---- From Layout Suggestion

03.Page 36 : Swap trace on Pin of RN6 ---- From Layout Suggestion

09-08-08

01.Page 42 : Remove R642 ,R623 ; Then Net Name : ISL_PW3 directly connect PWM3 ---- From Power Suggestion

02.Page 11 : Change RN8 , RN9 Net connect for layout ---- From Layout Suggestion

03.Page 19 : Change RN2 Net connect for layout ---- From Layout Suggestion

04.Page 35 : Change RN14 Net connect for layout ---- From Layout Suggestion

05.Page 35 : Change RN13 Net connect for layout ---- From Layout Suggestion

06.Page 48 : Add HK2(CPU Bottom) on U1

09-09-08

01.Page 49 : VGA1 from N51-15F0391-K06 change to N51-15F0391-A10 ---- From Purchaser Suggestion

09-10-08

B B

01.Page 31 : CON8 Pin 4 from MIC_IN_R change MIC_IN_L ; Pin 1 from MIC_IN_L change MIC_IN_R

02.Page 31 : CON7 Pin 4 from LINE_OUT_R change LINE_OUT_L ; Pin 1 from LINE_OUT_L change LINE_OUT_R

03.Page 44 : Net Name : PM_PWRBTN_L add a 10K ohm pull-high to +V3.3A

04.Page 42 : Remove C493 and net name : COMP ---- From Power Suggestion

09-11-08

01.Page 30 : CN4 Pin S5 , S6 is NPTH via hole , not connect

02.Page 48 : MH3 from connect net : GND Change to connect GNDF ---- From Layout Suggestion

09-12-08

01.Page 25 : Add J19 for LVDS Panel light control

02.Page 33 : Revise R294 connect SPI_WP_L

03.Page 48 : Revise MH3 net change to No connect

04.Page 16, 32 : X2 , X3 From D04-1001100-E24 Change to D04-1001100-F07(AVL:D04-1001100-T16,D04-1001100-T02) ---- From Puschaser Suggestion

05.Page 48 : Del SIP3 , SIP4 , SIP6

06.Page 44 : JFP1 Change package Pitch 2.0mm

07.Page 36 : J16 Change package Pitch 2.0mm

A A

09-13-08

01.Page 24 : C194 pin 1 and 2 connect together , Change net name

02.Page 24 : C195 pin 1 and 2 connect together , Change net name

09-14-08

01.Page 48 : Add Optical point FM5 and FM6 ---- From Factory Suggestion

01.Page 32 : R283 change net - +LAN_VCT ---- From Intel Suggestion

09-18-08

01.Page 48 : Add PCB Material number

5

EMERALD BAY

Title

REVISION HISTORY

Size Document Number Rev

Custom

Date: Sheet

4

3

2

Date: Sheet

1

53 53Thursday, September 25, 2008

Intel Confidential

of

A

MSI Emerald Bay Schematics REV 0.5

Specifications and Main Features

Frequently Asked Questions

User Manual