MCM6343
1
MOTOROLA FAST SRAM
Product Preview
256K x 16 Bit 3.3 V Asynchronous
Fast Static RAM
The MCM6343 is a 4,194,304–bit static random access memory organized as
262,144 words of 16 bits. Static design eliminates the need for external clocks
or timing strobes.
The MCM6343 is equipped with chip enable (E
), write enable (W), and output
enable (G
) pins, allowing for greater system flexibility and eliminating bus con-
tention problems. Separate byte enable controls (LB
and UB) allow individual
bytes to be written and read. LB
controls the lower bits DQ0 to DQ7, while UB
controls the upper bits DQ8 to DQ15.
The MCM6343 is available in a 400 mil, 44–lead small–outline SOJ package
and a 44–lead TSOP Type II package.
• Single 3.3 V ± 0.3 V Power Supply
• Fast Access Time: 12/15 ns
• Equal Address and Chip Enable Access Time
• All Inputs and Outputs are TTL Compatible
• Data Byte Control
• Fully Static Operation
• Power Operation: 250/240/230 mA Maximum, Active AC
• Commercial and Standard Industrial Temperature Option: – 40 to + 85°C
BLOCK DIAGRAM
OUTPUT
ENABLE
BUFFER
ADDRESS
BUFFERS
WRITE
ENABLE
BUFFER
BYTE
ENABLE
BUFFER
ROW
DECODER
COLUMN
DECODER
256K x 16
BIT
MEMORY
ARRAY
HIGH
BYTE
OUTPUT
BUFFER
8
HIGH
BYTE
WRITE
DRIVER
LOW
BYTE
OUTPUT
BUFFER
LOW
BYTE
WRITE
DRIVER
SENSE
AMPS
G
W
LB
8
8
8
8
88
8
9
A
CHIP
ENABLE
BUFFER
E
UB
9
HIGH BYTE OUTPUT ENABLE
LOW BYTE OUTPUT ENABLE
HIGH BYTE WRITE ENABLE
LOW BYTE WRITE ENABLE
16
18
This document contains information on a product under development. Motorola reserves the right to change or discontinue this product without notice.
Order this document
by MCM6343/D
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
MCM6343
YJ PACKAGE
400 MIL SOJ
CASE 919–01
PIN ASSIGNMENT
A0 – A17 Address Input. . . . . . . . . . . . . . . . .
E
Chip Enable. . . . . . . . . . . . . . . . . . . . . . . . .
W
Write Enable. . . . . . . . . . . . . . . . . . . . . . .
G
Output Enable. . . . . . . . . . . . . . . . . . . . . .
UB
Upper Byte. . . . . . . . . . . . . . . . . . . . . . . .
LB
Lower Byte. . . . . . . . . . . . . . . . . . . . . . . . .
DQ0 – DQ15 Data Input/Output. . . . . . . . . .
V
DD
+ 3.3 V Power Supply. . . . . . . . . . . . . .
V
SS
Ground. . . . . . . . . . . . . . . . . . . . . . . . . .
NC No Connection. . . . . . . . . . . . . . . . . . . . .
PIN NAMES
5
4
3
2
1
10
9
8
7
6
11
36
37
38
39
40
41
42
35
43
44
34
E
A
A
A
A
DQ1
DQ0
A
V
DD
DQ3
DQ2
UB
G
A
A
A
DQ12
DQ13
DQ14
V
SS
DQ15
LB
25
26
27
28
29
30
31
24
32
33
23
12
13
14
15
16
17
18
19
20
21
22
DQ8
DQ9
DQ10
DQ11
V
DD
A
A
A
A
A
NCW
DQ6
DQ5
DQ4
V
SS
A
A
DQ7
A
A
A
TS PACKAGE
TSOP TYPE II
CASE 924A–02
REV 2
2/10/98
Motorola, Inc. 1998