MOTOROLA MC14541BCP, MC14541BFL1, MC14541BFR2, MC14541BF, MC14541BD Datasheet

 Semiconductor Components Industries, LLC, 2000

March, 2000 – Rev. 6

1 Publication Order Number:

MC14541B/D

MC14541B

Programmable Timer

The MC14541B programmable timer consists of a 16–stage binary
counter, an integrated oscillator for use with an external capacitor and
two resistors, an automatic power–on reset circuit, and output control
logic.

Timing is initialized by turning on power , whereupon the power–on
reset is enabled and initializes the counter, within the specified V

DD

range. With the power already on, an external reset pulse can be
applied. Upon release of the initial reset command, the oscillator will
oscillate with a frequency determined by the external RC network. The
16–stage counter divides the oscillator frequency (f

osc

) with the n

th

stage frequency being f

osc

/2n.

• A vailable Outputs 2

8

, 210, 213 or 2

16

• Increments on Positive Edge Clock Transitions

• Built–in Low Power RC Oscillator (± 2% accuracy over temperature

range and ± 20% supply and ± 3% over processing at < 10 kHz)

• Oscillator May Be Bypassed if External Clock Is A vailable (Apply

external clock to Pin 3)

• External Master Reset Totally Independent of Automatic Reset

Operation

• Operates as 2

n

Frequency Divider or Single Transition Timer

• Q/Q Select Provides Output Logic Level Flexibility

• Reset (auto or master) Disables Oscillator During Resetting to

Provide No Active Power Dissipation

• Clock Conditioning Circuit Permits Operation with Very Slow Clock

Rise and Fall Times

• Automatic Reset Initializes All Counters On Power Up

• Supply Voltage Range = 3.0 Vdc to 18 Vdc with Auto Reset

Supply Voltage Range = Disabled (Pin 5 = V

DD

)

Supply Voltage Range = 8.5 Vdc to 18 Vdc with Auto Reset
Supply Voltage Range = Enabled (Pin 5 = VSS)

MAXIMUM RATINGS (Voltages Referenced to V

SS

) (Note 2.)

Symbol

Parameter Value Unit

V

DD

DC Supply Voltage Range –0.5 to +18.0 V

Vin, V

out

Input or Output Voltage Range

(DC or Transient)

–0.5 to VDD + 0.5 V

I

in

Input Current (DC or Transient) ±10 (per Pin) mA

I

out

Output Current (DC or Transient) ±45 (per Pin) mA

P

D

Power Dissipation,

per Package (Note 3.)

500 mW

T

A

Ambient Temperature Range –55 to +125 °C

T

stg

Storage Temperature Range –65 to +150 °C

T

L

Lead Temperature

(8–Second Soldering)

260 °C

2. Maximum Ratings are those values beyond which damage to the device
may occur.

3. Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C T o 125_C

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A = Assembly Location
WL or L = Wafer Lot
YY or Y = Year
WW or W = Work Week

Device Package Shipping

ORDERING INFORMATION

MC14541BCP PDIP–14 2000/Box
MC14541BD SOIC–14 55/Rail
MC14541BDR2 SOIC–14 2500/Tape & Reel

1. For ordering information on the EIAJ version of
the SOIC packages, please contact your local
ON Semiconductor representative.

MC14541BDTR2 TSSOP–14 2500/Tape & Reel

MC14541BDT TSSOP–14 96/Rail

MC14541BF SOEIAJ–14 See Note 1.

This device contains protection circuitry to guard
against damage due to high static voltages or electric
fields. However, precautions must be taken to avoid ap­plications of any voltage higher than maximum rated
voltages to this high–impedance circuit. For proper
operation, V

in

and V

out

should be constrained to the

range V

SS

v (Vin or V

out

) v VDD.

Unused inputs must always be tied to an appropriate
logic voltage level (e.g., either V

SS

or VDD). Unused out-

puts must be left open.

MC14541BFEL SOEIAJ–14 See Note 1.

MARKING

DIAGRAMS

1

14

PDIP–14

P SUFFIX

CASE 646

MC14541BCP

AWLYYWW

SOIC–14

D SUFFIX

CASE 751A

TSSOP–14
DT SUFFIX

CASE 948G

1

14

14541B

AWLYWW

14

541B

ALYW

1

14

SOEIAJ–14

F SUFFIX

CASE 965

1

14

MC14541B

AWLYWW

MC14541B

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2

PIN ASSIGNMENT

NC = NO CONNECTION

11

12

13

14

8

9

105

4

3

2

1

7

6

MODE

NC

A

B

V

DD

Q

Q/Q

SEL

NC

R

S

C

tc

R

tc

V

SS

MR

AR

ELECTRICAL CHARACTERISTICS (Voltages Referenced to V

SS

)

V

DD

– 55_C 25_C 125_C

Characteristic Symbol

Vdc

Min Max Min Typ

(4.)

Max Min Max

Unit

Output Voltage “0” Level

V

in

= VDD or 0

V

OL

5.0
10
15

—
—
—

0.05

0.05

0.05

—
—
—

0
0
0

0.05

0.05

0.05

—
—
—

0.05

0.05

0.05

Vdc

“1” Level

V

in

= 0 or V

DD

V

OH

5.0
10
15

4.95

9.95

14.95

—
—
—

4.95

9.95

14.95

5.0
10
15

—
—
—

4.95

9.95

14.95

—
—
—

Vdc

Input Voltage “0” Level

(V

O

= 4.5 or 0.5 Vdc)

(V

O

= 9.0 or 1.0 Vdc)

(V

O

= 13.5 or 1.5 Vdc)

V

IL

5.0
10
15

—
—
—

1.5

3.0

4.0

—
—
—

2.25

4.50

6.75

1.5

3.0

4.0

—
—
—

1.5

3.0

4.0

Vdc

“1” Level

(V

O

= 0.5 or 4.5 Vdc)

(V

O

= 1.0 or 9.0 Vdc)

(V

O

= 1.5 or 13.5 Vdc)

V

IH

5.0
10
15

3.5

7.0
11

—
—
—

3.5

7.0
11

2.75

5.50

8.25

—
—
—

3.5

7.0
11

—
—
—

Vdc

Output Drive Current

(V

OH

= 2.5 Vdc) Source

(V

OH

= 9.5 Vdc)

(V

OH

= 13.5 Vdc)

I

OH

5.0
10
15

– 7.96
– 4.19
– 16.3

—
—
—

– 6.42
– 3.38
– 13.2

– 12.83

– 6.75

– 26.33

—
—
—

– 4.49
– 2.37
– 9.24

—
—
—

mAdc

(VOL = 0.4 Vdc) Sink
(V

OL

= 0.5 Vdc)

(V

OL

= 1.5 Vdc)

I

OL

5.0
10
15

1.93

4.96

19.3

—
—
—

1.56

4.0

15.6

3.12

8.0

31.2

—
—
—

1.09

2.8

10.9

—
—
—

mAdc

Input Current I

in

15 — ± 0.1 — ±0.00001 ± 0.1 — ± 1.0 µAdc

Input Capacitance

(V

in

= 0)

C

in

— — — — 5.0 7.5 — — pF

Quiescent Current

(Pin 5 is High)

Auto Reset Disabled

I

DD

5.0
10
15

—
—
—

5.0
10
20

—
—
—

0.005

0.010

0.015

5.0
10
20

—
—
—

150
300
600

µAdc

Auto Reset Quiescent Current

(Pin 5 is low)

I

DDR

10
15

—
—

250
500

—
—

30
82

250
500

—
—

1500
2000

µAdc

Supply Current

(5.) (6.)

(Dynamic plus Quiescent)

I

D

5.0
10
15

ID = (0.4 µA/kHz) f + I

DD

ID = (0.8 µA/kHz) f + I

DD

ID = (1.2 µA/kHz) f + I

DD

µAdc

4. Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.

5. The formulas given are for the typical characteristics only at 25_C.

6. When using the on chip oscillator the total supply current (in µAdc) becomes: IT = ID + 2 Ctc VDD f x 10–3 where ID is in µA, Ctc is in pF,
V

DD

in Volts DC, and f in kHz. (see Fig. 3) Dissipation during power–on with automatic reset enabled is typically 50 µA @ VDD = 10 Vdc.

MC14541B

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3

SWITCHING CHARACTERISTICS

(7.)

(C

L

= 50 pF, T

A

= 25_C)

Characteristic

Symbol V

DD

Min Typ

(8.)

Max Unit

Output Rise and Fall Time

t

TLH

, t

THL

= (1.5 ns/pF) CL + 25 ns

t

TLH

, t

THL

= (0.75 ns/pF) CL + 12.5 ns

t

TLH

, t

THL

= (0.55 ns/pF) CL + 9.5 ns

t

TLH

,

t

THL

5.0
10
15

—
—
—

100

50
40

200
100

80

ns

Propagation Delay, Clock to Q (28 Output)

t

PLH

, t

PHL

= (1.7 ns/pF) CL + 3415 ns

t

PLH

, t

PHL

= (0.66 ns/pF) CL + 1217 ns

t

PLH

, t

PHL

= (0.5 ns/pF) CL + 875 ns

t

PLH

t

PHL

5.0
10
15

—
—
—

3.5

1.25

0.9

10.5

3.8

2.9

µs

Propagation Delay, Clock to Q (216 Output)

t

PHL

, t

PLH

= (1.7 ns/pF) CL + 5915 ns

t

PHL

, t

PLH

= (0.66 ns/pF) CL + 3467 ns

t

PHL

, t

PLH

= (0.5 ns/pF) CL + 2475 ns

t

PHL

t

PLH

5.0
10
15

—
—
—

6.0

3.5

2.5

18
10

7.5

µs

Clock Pulse Width t

WH(cl)

5.0
10
15

900
300
225

300
100

85

—
—
—

ns

Clock Pulse Frequency (50% Duty Cycle) f

cl

5.0
10
15

—
—
—

1.5

4.0

6.0

0.75

2.0

3.0

MHz

MR Pulse Width t

WH(R)

5.0
10
15

900
300
225

300
100

85

—
—
—

ns

Master Reset Removal Time t

rem

5.0
10
15

420
200
200

210
100
100

—
—
—

ns

7. The formulas given are for the typical characteristics only at 25_C.

8. Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.

Figure 1. Power Dissipation Test Circuit

and Waveform

Figure 2. Switching Time Test Circuit

and Waveforms

PULSE

GENERATOR

V

DD

C

L

Q

R

S

AR
Q/Q

SELECT
MODE
A
B
MR

V

SS

20 ns 20 ns

90%

50%

10%

50%

DUTY CYCLE

(Rtc AND Ctc OUTPUTS ARE LEFT OPEN)

PULSE

GENERATOR

V

DD

R

S

AR
Q/Q

SELECT
MODE
A
B
MR

V

SS

C

L

Q

20 ns

90%

50%

20 ns

10%

R

S

Q

t

PLH

50%

90%

50%

10%

50%

t

TLH

t

THL

t

PHL