Motorola MC12038BP, MC12038AD, MC12038AP, MC12038BD Datasheet

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Order this document by MC12038A/D
SEMICONDUCTOR
TECHNICAL DATA
MECL PLL COMPONENTS
÷127/128, ÷255/256
DUAL MODULUS PRESCALER
P SUFFIX
CASE 626
PIN CONNECTIONS
D SUFFIX
CASE 751
(SO–8)
8
1
1
8
IN
(Top View)
8
IN
V
CC
SW
OUT
NC MC
Gnd
7 6 5
1 2 3 4
Device
Operating
Temperature Range
Package
ORDERING INFORMATION
MC12038AD MC12038AP
TA = – 40° to +85°C
SO–8
Plastic
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The MC12038A can be used with CMOS synthesizers requiring positive edges to trigger internal counters such as Motorola’s MC145XXX series in a PLL to provide tuning signals up to 1.1 GHz in programmable frequency steps.
A Divide Ratio Control (SW) permits selection of a 127/128 or 255/256 divide ratio as desired.
The Modulus Control (MC) selects the proper divide number after SW has been biased to select the desired divide ratio.
1.1 GHz Toggle Frequency
Supply Voltage of 4.5 to 5.5 V
Low–Power 4.8 mA Typical
Operating Temperature Range of –40 to 85°C
Short Setup Time (t
set
) 16ns Maximum @ 1.1 GHz
Modulus Control Input Level Is Compatible With Standard
CMOS and TTL
On–Chip Output Termination
FUNCTIONAL TABLE
SW MC Divide Ratio
H H 127 H L 128 L H 255 L L 256
NOTES: 1. SW: H = VCC, L = Open. A logic L can also be applied by grounding this pin,
but this is not recommended due to increased power consumption.
2.MC: H = 2.0 V to VCC, L = GND to 0.8 V.
DESIGN GUIDE
Criteria Value Unit
Internal Gate Count* 67 ea Internal Gate Propagation Delay 200 ps Internal Gate Power Dissipation 0.75 mW Speed Power Product 0.15 pJ
NOTE: * Equivalent to a two–input NAND gate
MAXIMUM RATINGS
Characteristic Symbol Range Unit
Power Supply Voltage, Pin 2 V
CC
–0.5 to 7.0 Vdc
Operating Temperature Range T
A
–40 to 85 °C
Storage Temperature Range T
stg
–65 to 150 °C
Modulus Control Input, Pin 6 MC –0.5 to 6.5 Vdc
NOTE: ESD data available upon request.
Motorola, Inc. 1997 Rev 2
MC12038A
2
MOTOROLA RF/IF DEVICE DATA
ELECTRICAL CHARACTERISTICS
(VCC = 4.5 to 5.5V; TA = –40 to 85°C, unless otherwise noted.)
Characteristic
Symbol Min Typ Max Unit
Toggle Frequency (Sine Wave Input) f
t
0.1 1.4 1.1 GHz
Supply Current Output Unloaded (Pin 2) at 5.0 Vdc I
CC
4.8 6.5 mA
Modulus Control Input High (MC) V
IH1
2.0 V
CC
V
Modulus Control Input Low (MC) V
IL1
0.8 V
Divide Ratio Control Input High (SW) V
IH2
V
CC
V
CC
V
CC
Vdc
Divide Ratio Control Input Low (SW) V
IL2
Open Open Open
Output Voltage Swing (CL = 8.0 pF) V
out
1.0 1.6 V
pp
Modulus Setup Time MC to Out t
set
11 16 ns
Input Voltage Sensitivity 250–1100 MHz
100–250 MHz
V
in(min)
100 400
– –
1500 1500
mVpp
A
HGFED
In
MC
In
SW
Out
Q
S
Q
C
QBD
QC
QBD
QBC
QD
C
QBD
QBC
QD
QBC
QD
B
QBC
QD
C
QB
C
QD
M
Modulus setup time MC to out is the MC setup or MC release plus the prop delay.
Prop. Delay
In
Out
MC
MC Setup
MC Release
Figure 1. Logic Diagram (MC12038A) Figure 2. Modulus Setup Time
Figure 3. Typical Output Waveforms
(÷128, 1.1 GHz Input Frequency, VCC = 5.0 V, TA = 25°C, Output Loaded)
500 m
20 ns
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