SEMICONDUCTOR TECHNICAL DATA
" !# #
The MC10H350 is a member of Motorola’s 10H family of high performance
ECL logic. It consists of 4 translators with differential inputs and TTL outputs.
The 3–state outputs can be disabled by applying a HIGH TTL logic level on the
common OE input.
The MC10H350 is designed to be used primarily in systems incorporating
both ECL and TTL logic operating off a common power supply. The separate
VCC power pins are not connected internally and thus isolate the noisy TTL V
runs from the relatively quiet ECL VCC runs on the printed circuit board. The
differential inputs allow the H350 to be used as an inverting or noninverting
translator, or a dif ferential line receiver . The H350 can also drive CMOS with the
addition of a pullup resistor.
• Propagation Delay, 3.5 ns Typical • MECL 10K–Compatible
MAXIMUM RATINGS
Characteristic Symbol Rating Unit
Power Supply (VEE = Gnd) V
Operating T emperature Range T
Storage T emperature Range — Plastic
— Ceramic
CC
A
T
stg
7.0 Vdc
0 to +75 °C
–55 to +150
–55 to +165
ELECTRICAL CHARACTERISTICS (VCC = 5.0 V ±5%) (See Note 1)
TA = 0°C to 75°C
Characteristic Symbol Min Max Unit
Power Supply Current TTL
Input Current High Pin 9
Input Current Low Pin 9
Input Voltage High Pin 9 V
Input Voltage Low Pin 9 V
Differential Input Voltage (1)
Voltage Common Mode
Output Voltage High
IOH = 3.0 mA
Output Voltage Low
IOL = 20 mA
Short Circuit Current
V
= 0 V
OUT
Output Disable Current High
V
= 2.7 V
OUT
Output Disable Current Low
V
= 0.5 V
OUT
(1) Common mode input voltage to pins 3–4, 5–6, 1 1–12, 13–14 must be between the values of 2.8
V and 5.0 V. This common mode input voltage range includes the differential input swing.
(2) For single ended use, apply 3.75 V (VBB) to either input depending on output polarity required.
Signal level range to other input is 3.3 V to 4.2 V.
(3) Any unused gates should have the inverting inputs tied to VCC and the non–inverting inputs tied
to ground to prevent output glitching.
(4) 1.0 V to 2.0 V w/50 pF into 500 ohms.
*Positive Emitter Coupled Logic
Pins 3–6, 11–14 (1)
Pins 3–6, 11–14
ECL
Others
Others
I
I
I
V
DIFF
V
V
V
I
I
OZH
I
OZL
CC
I
IH
INH
I
IL
INL
IH
IL
CM
OH
OL
OS
—
—
—
—
—
—
2.0 — Vdc
— 0.8 Vdc
350 — mV
2.8 V
2.7 — Vdc
— 0.5 Vdc
–60 –150 mA
— 50 µA
— –50 µA
20
12
20
50
–0.6
50
CC
CC
°C
°C
mA
µA
mA
µA
Vdc
L SUFFIX
CERAMIC PACKAGE
CASE 620–10
P SUFFIX
PLASTIC PACKAGE
CASE 648–08
FN SUFFIX
PLCC
CASE 775–02
LOGIC DIAGRAM
9
3
4
5
6
11
12
13
14
VCC (+5.0 VDC) = PINS 1 AND 16
GND = PIN 8
DIP
PIN ASSIGNMENT
ECL V
CC
A
OUT
A
IN
A
IN
B
IN
B
IN
B
OUT
GND
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion
T ables on page 6–11 of the Motorola MECL Data
1
2
3
4
5
6
7
8
Book (DL122/D).
16
15
14
13
12
11
10
9
2
7
10
15
TTL V
C
OUT
C
IN
C
IN
D
IN
D
IN
D
OUT
OE
CC
9/96
Motorola, Inc. 1996
2–57
REV 6
MC10H350
ELECTRICAL CHARACTERISTICS (VCC = 5.0 V ±5%) (See Notes 1 & 4)
TA = 0°C to 75°C
Characteristic Symbol Min Max Unit
AC PARAMETERS (CL = 50 pF) (VCC = 5.0 ± 5%) (TA = 0°C to 75°C)
Propagation Delay
Data
Rise Time t
Fall Time t
Output Disable Time t
Output Enable Time t
t
pdLZ
t
pdHZ
pdZL
t
pdZH
pd
r
f
1.5 5.0 ns
0.3 1.6 ns
0.3 1.6 ns
2.0
2.0
2.0
2.0
6.0
6.0
8.0
8.0
3–STATE SWITCHING WAVEFORMS
ns
ns
V
OUT
OE
3–STATE OUTPUT LOW ENABLE AND
DISABLE TIMES
1.5 V1.5 V
T
PZL
T
PLZ
1.5 V
0.3 V
D.U.T
.
OE
V
V
OL
OUT
TEST LOAD
+7.0 V OPEN
500
500
ALL OTHERT
Ω
Ω
PZL
50 PF
, T
PLZ
, O, C,
3–STATE OUTPUT HIGH ENABLE AND
DISABLE TIMES
1.5 V1.5 V
T
PZH
T
1.5 V
0.3 V
PHZ
Q
VOH≈ 3.5 V
*INCLUDES JIG AND PROBE CAPACITANCE
Application Note: Pin 9 is an OE and the 10H350 is disabled when OE is at VIH or higher.
MOTOROLA MECL Data
2–58
DL122 — Rev 6