Motorola MC10170L Datasheet

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SEMICONDUCTOR TECHNICAL DATA

3–103

REV 6

 Motorola, Inc. 1996

9/96

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The MC10170 is a 11–bit parity circuit, which is segmented into 9 data bits

and 2 control bits.

Output A generates odd parity on 9 bits; that is, Output A goes high for an

odd number of high logic levels on the bit inputs in only 2 gate delays.

The Control Inputs can be used to expand parity to larger numbers of bits
with minimal delay or can be used to generate even parity. To expand parity to
larger words, the MC10170 can be used with the MC10160 or other
MC10170’s. The MC10170 can generate both even and odd parity.

PD= 300 mW typ/pkg (No Load)
tpd= 2.5 ns typ(Control Inputs to B Output)

4.0 ns typ (Data Inputs to A Output)

6.0 ns typ (Data Inputs to B Output)

tr,tf= 2.0 ns typ (20%–80%)

LOGIC DIAGRAM

V

CC1

= PIN 1

V

CC2

= PIN 16

VEE= PIN 8

2 A
ODD PARITY

15 B
EVEN PARITY

13 HIGH

14 LOW

3D0
4D1
5D2
6D3
7D4

9D5
10D6
11D7
12D8

CONTROL

INPUTS

INPUTS OUTPUTS

Sum of

Odd Parit

yEven

Parit

y

D Inputs

at High Level

Output A Output B

Even Low High

Odd High Low



PIN ASSIGNMENT

V

CC1

A
D0
D1
D2
D3
D4

V

EE

V

CC2

B
LOW
HIGH
D8
D7
D6
D5

16
15
14
13
12
11
10

9

1
2
3
4
5
6
7
8

L SUFFIX

CERAMIC PACKAGE

CASE 620–10

P SUFFIX

PLASTIC PACKAGE

CASE 648–08

MC10170

MOTOROLA MECL Data

DL122 — Rev 6

3–104

ELECTRICAL CHARACTERISTICS

Test Limits

Pin

Under

–30°C +25°C +85°C

Characteristic Symbol

Under

Test

Min Max Min Typ Max Min Max

Unit

Power Supply Drain Current I

E

8 78 57 71 78 mAdc

Input Current I

inH

3
5

350
350

200
220

220
220

µAdc

I

inL

3 0.5 0.5 0.3 µAdc

Output Voltage Logic 1 V

OH

2

15

–1.060
–1.060

–0.890
–0.890

–0.960
–0.960

–0.810
–0.810

–0.890
–0.890

–0.700
–0.700

Vdc

Output Voltage Logic 0 V

OL

2

15

–1.890
–1.890

–1.675
–1.675

–1.850
–1.850

–1.650
–1.650

–1.825
–1.825

–1.615
–1.615

Vdc

Threshold Voltage Logic 1 V

OHA

2

15

–1.080
–1.080

–0.980
–0.980

–0.910
–0.910

Vdc

Threshold Voltage Logic 0 V

OLA

2

15

–1.655
–1.655

–1.630
–1.630

–1.595
–1.595

Vdc

Switching Times (50Ω Load) ns
Propagation Delay t

13+15+

t

14–15–

t

3+2–

t

3–15+

15
15

2

15

1.5

1.5

2.0

4.0

4.2

4.2

6.6

9.5

1.5

1.5

2.0

4.0

2.5

2.5

4.0

6.0

4.0

4.0

6.0

8.8

1.5

1.5

2.0

4.0

4.4

4.4

6.6

9.5

Rise Time (20 to 80%) t

2+

2 1.5 4.3 1.5 2.0 3.9 1.5 4.3

Fall Time (20 to 80%) t

2–

2 1.5 4.3 1.5 2.0 3.9 1.5 4.3