Motorola MC10154P, MC10154L Datasheet



SEMICONDUCTOR TECHNICAL DATA

3–57

REV 5

 Motorola, Inc. 1996

3/93

 

The MC10154 is a four–bit counter capable of divide–by–two, divide–by–

four, divide–by–eight or a divide–by–sixteen function.

Clock inputs trigger on the positive going edge of the clock pulse. Set and
Reset inputs override the clock, allowing asynchronous “set” or “clear.”
Individual Set and common Reset inputs are provided, as well as complemen–
tary outputs for the first and fourth bits. True outputs are available at all bits.

PD= 370 mW typ/pkg (No Load)

f

toggle

= 150 MHz (typ)
tpd= 3.5 ns typ (C to Q0)
tpd= 11 ns typ (C to Q3)

LOGIC DIAGRAM

V

CC1

= PIN 1

V

CC2

= PIN 16

VEE= PIN 8

11

S0 Q0

Q

0

14

9

10

12

Clock 1
Clock 2

Reset

D

C1
C2

R

Q’

Q

Q’

Q

S

15 7

S1 Q1

D

C1

R

Q’

Q

Q’

S

13 6

S2 Q2

D

C1

R

Q’

Q

Q’

S

4 5

S3 Q3

Q

3

3

D

C1

R

Q

Q’

Q

S

2

TRUTH TABLE

INPUTS OUTPUTS

R S0 S1 S2 S3 C1 C2 Q0 Q1 Q2 Q3

H

L

L
H

L
H

L
H

L
H

X
X

X
X

L
H

L
H

L
H

L
H

L
L

L
L

L
L

L
L

L
L

H
X

X
H

No Count
No Count

L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L

L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L

L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L

L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L

L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L

*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*

*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*

H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L

H
H

L

L
H
H

L

L
H
H

L

L
H
H

L

L

H
H
H
H
L
L
L
L
H
H
H
H
L
L
L
L

H
H
H
H
H
H
H
H
L
L
L
L
L
L
L
L

* Clock transitions from VIL to VIH may be applied to C1 or C2 or

both for same effect.



PIN ASSIGNMENT

V

CC1

Q3
Q3
Q2

S3
S2
S1

V

EE

V

CC2

Q0
Q0
Q1
CLOCK 1
S0
CLOCK 2
RESET

16
15
14
13
12
11
10

9

1
2
3
4
5
6
7
8

L SUFFIX

CERAMIC PACKAGE

CASE 620–10

P SUFFIX

PLASTIC PACKAGE

CASE 648–08

V

IH

V

IL

MC10154

MOTOROLA MECL Data

DL122 — Rev 6

3–58

ELECTRICAL CHARACTERISTICS

Test Limits

Pin

Under

–30°C +25°C +85°C

Characteristic Symbol

Under

Test

Min Max Min Typ Max Min Max

Unit

Power Supply Drain Current I

E

8 97 88 97 mAdc

Input Current I

inH

12
11

9

390
350
650

245
220
410

245
220
410

µAdc

I

inL

* 0.5 0.5 0.3 µAdc

Output Voltage Logic 1 V

OH

14
15

–1.060
–1.060

–0.890
–0.890

–0.960
–0.960

–0.810
–0.810

–0.890
–0.890

–0.700
–0.700

Vdc

Output Voltage Logic 0 V

OL

14
15

–1.890
–1.890

–1.675
–1.675

–1.850
–1.850

–1.650
–1.650

–1.825
–1.825

–1.615
–1.615

Vdc

Threshold Voltage Logic 1 V

OHA

3
14
15

–1.080
–1.080
–1.080

–0.980
–0.980
–0.980

–0.910
–0.910
–0.910

Vdc

Threshold Voltage Logic 0 V

OLA

3
14
15

–1.655
–1.655
–1.655

–1.630
–1.630
–1.630

–1.595
–1.595
–1.595

Vdc

Switching Times (50Ω Load) ns
Clock Input

Propagation Delay

t

12+15+

t

12–13–
t

12+4–

t

12–3+

15
13

4

3

1.4

1.9

2.9

3.9

5.0

9.4

12.3

14.9

1.5

2.0

3.0

4.0

3.5

6.0

8.5

11.0

4.8

9.2

12.0

14.5

1.5

2.0

3.0

4.0

5.3

9.8

12.8

15.5

Rise Time (20 to 80%) t

15+

15 1.1 4.7 1.1 2.5 4.5 1.1 5.0

Fall Time (20 to 80%) t

15–

15 1.1 4.7 1.1 2.5 4.5 1.1 5.0

Set Input
Reset Input

t

11–15+

t

9–15+

15
15

1.4

1.4

5.2

5.2

1.5

1.5

5.0

5.0

1.5

1.5

5.5

5.5

Counting Frequency f

count

15 125 125 150 125 MHz

* Individually test each input applying VIL to input under test.

MC10154

3–59 MOTOROLAMECL Data

DL122 — Rev 6

ELECTRICAL CHARACTERISTICS (continued)

TEST VOLTAGE VALUES (Volts)

@ Test Temperature V

IHmax

V

ILmin

V

IHAminVILAmax

V

EE

–30°C –0.890 –1.890 –1.205 –1.500 –5.2
+25°C –0.810 –1.850 –1.105 –1.475 –5.2
+85°C –0.700 –1.825 –1.035 –1.440 –5.2

Pin

TEST VOLTAGE APPLIED TO PINS LISTED BELOW

Characteristic Symbol

Und

er

Test

V

IHmax

V

ILmin

V

IHAminVILAmax

V

EE

(VCC)

Gnd

Power Supply Drain Current I

E

8 9 8 1, 16

Input Current I

inH

12

11

9

12
11

9

8
8
8

1, 16
1, 16
1, 16

I

inL

* * 8 1, 16

Output Voltage Logic 1 V

OH

14
15

9

11

8
8

1, 16
1, 16

Output Voltage Logic 0 V

OL

14
15

11

9

8
8

1, 16
1, 16

Threshold Voltage Logic 1 V

OHA

3
14
15

5

11

9

8
8
8

1, 16
1, 16
1, 16

Threshold Voltage Logic 0 V

OLA

3
14
15

5

11

9

8
8
8

1, 16
1, 16

1, 16
Switching Times (50Ω Load) Pulse In Pulse Out –3.2 V +2.0V
Clock Input

Propagation Delay

t

12+15+

t

12–13–
t

12+4–

t

12–3+

15
13

4
3

12
12
12
12

15
13

4
3

8
8
8
8

1, 16

1, 16

1, 16

1, 16
Rise Time (20 to 80%) t

15+

15 12 15 8 1, 16

Fall Time (20 to 80%) t

15–

15 12 15 8 1, 16

Set Input
Reset Input

t

11–15+
t

9–15+

15
15

11

9

15
15

8
8

1, 16

1, 16
Counting Frequency f

count

15 12 15 8 1, 16

* Individually test each input applying VIL to input under test.
Each MECL 10,000 series circuit has been designed to meet the dc specifications shown in the test table, after thermal equilibrium has been

established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 linear fpm is maintained.
Outputs are terminated through a 50–ohm resistor to –2.0 volts. Test procedures are shown for only one gate. The other gates are tested in the
same manner.

MC10154

MOTOROLA MECL Data

DL122 — Rev 6

3–60

OUTLINE DIMENSIONS

P SUFFIX

PLASTIC DIP PACKAGE

CASE 648–08

ISSUE R

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.

2. CONTROLLING DIMENSION: INCH.

3. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.

4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.

5. ROUNDED CORNERS OPTIONAL.

–A–

B

F

C

S

H

G

D

J

L

M

16 PL

SEATING

18

916

K

PLANE

–T–

M

A

M

0.25 (0.010) T

DIM MIN MAX MIN MAX

MILLIMETERSINCHES

A 0.740 0.770 18.80 19.55
B 0.250 0.270 6.35 6.85
C 0.145 0.175 3.69 4.44
D 0.015 0.021 0.39 0.53
F 0.040 0.70 1.02 1.77
G 0.100 BSC 2.54 BSC
H 0.050 BSC 1.27 BSC
J 0.008 0.015 0.21 0.38
K 0.110 0.130 2.80 3.30
L 0.295 0.305 7.50 7.74
M 0 10 0 10
S 0.020 0.040 0.51 1.01

____

L SUFFIX

CERAMIC DIP PACKAGE

CASE 620–10

ISSUE V

NOTES:

1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.

2. CONTROLLING DIMENSION: INCH.

3. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.

4. DIMENSION F MAY NARROW TO 0.76 (0.030)
WHERE THE LEAD ENTERS THE CERAMIC
BODY.

–A–

–B–

–T–

F

E

G

N

K

C

SEATING
PLANE

16 PLD

S

A

M

0.25 (0.010) T

16 PLJ

S

B

M

0.25 (0.010) T

M

L

DIM MIN MAX MIN MAX

MILLIMETERSINCHES

A 0.750 0.785 19.05 19.93
B 0.240 0.295 6.10 7.49
C ––– 0.200 ––– 5.08
D 0.015 0.020 0.39 0.50
E 0.050 BSC 1.27 BSC
F 0.055 0.065 1.40 1.65
G 0.100 BSC 2.54 BSC
H 0.008 0.015 0.21 0.38
K 0.125 0.170 3.18 4.31
L 0.300 BSC 7.62 BSC
M 0 15 0 15
N 0.020 0.040 0.51 1.01

____

16 9

18

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MC10154/D

*MC10154/D*

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