MOTOROLA MC10107P, MC10107FN, MC10107FNR2 Datasheet
SEMICONDUCTOR TECHNICAL DATA
3–30
REV 5
Motorola, Inc. 1996
3/93
The MC10107 is a triple–2 input exclusive OR/NOR gate.
PD= 40 mW typ/gate (No Load)
tpd= 2.8 ns typ
tr, tf= 2.5 ns typ (20%–80%)
LOGIC DIAGRAM
V
CC1
= PIN 1
V
CC2
= PIN 16
VEE= PIN 8
15
13
14
9
4
12
10
11
3
2
7
5
3 = (4 •5) + (4 • 5)
2 = (4
•5) + (4 • 5)
DIP
PIN ASSIGNMENT
V
CC1
A
OUT
A
OUT
A
IN
A
IN
*NC
B
IN
V
EE
V
CC2
C
IN
C
IN
C
OUT
C
OUT
B
OUT
B
OUT
B
IN
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
*NC = No Connection
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion
T ables on page 6–11 of the Motorola MECL Data
Book (DL122/D).
L SUFFIX
CERAMIC PACKAGE
CASE 620–10
P SUFFIX
PLASTIC PACKAGE
CASE 648–08
FN SUFFIX
PLCC
CASE 775–02
MC10107
3–31 MOTOROLAMECL Data
DL122 — Rev 6
ELECTRICAL CHARACTERISTICS
Test Limits
Pin
Under
–30°C +25°C +85°C
Characteristic Symbol
Under
Test
Min Max Min Typ Max Min Max
Unit
Power Supply Drain Current I
E
8 31 28 31 mAdc
Input Current I
inH
4, 9, 14
5, 7, 15
425
350
265
220
265
220
µAdc
I
inL
* 0.5 0.5 0.3 µAdc
Output Voltage Logic 1 V
OH
2
2
3
3
–1.060
–1.060
–1.060
–1.060
–0.890
–0.890
–0.890
–0.890
–0.960
–0.960
–0.960
–0.960
–0.810
–0.810
–0.810
–0.810
–0.890
–0.890
–0.890
–0.890
–0.700
–0.700
–0.700
–0.700
Vdc
Output Voltage Logic 0 V
OL
2
2
3
3
–1.890
–1.890
–1.890
–1.890
–1.675
–1.675
–1.675
–1.675
–1.850
–1.850
–1.850
–1.850
–1.650
–1.650
–1.650
–1.650
–1.825
–1.825
–1.825
–1.825
–1.615
–1.615
–1.615
–1.615
Vdc
Threshold Voltage Logic 1 V
OHA
2
2
3
3
–1.080
–1.080
–1.080
–1.080
–0.980
–0.980
–0.980
–0.980
–0.910
–0.910
–0.910
–0.910
Vdc
Threshold Voltage Logic 0 V
OLA
2
2
3
3
–1.655
–1.655
–1.655
–1.655
–1.630
–1.630
–1.630
–1.630
–1.595
–1.595
–1.595
–1.595
Vdc
Switching Times (50Ω Load) Min Typ Max ns
Propagation Delay t++
t+ –
t–+
t– –
Inputs
4,9 or 14
to either
Output
–1.1
1.1
1.1
1.1
3.8
3.8
3.8
3.8
1.1
1.1
1.1
1.1
2.0
2.0
2.0
2.0
3.7
3.7
3.7
3.7
1.1
1.1
1.1
1.1
4.0
4.0
4.0
4.0
t++
t+ –
t–+
t– –
Inputs
5,7 or 15
to either
Output
1.1
1.1
1.1
1.1
3.8
3.8
3.8
3.8
1.1
1.1
1.1
1.1
2.8
2.8
2.8
2.8
3.7
3.7
3.7
3.7
1.1
1.1
1.1
1.1
4.0
4.0
4.0
4.0
Rise Time (20 to 80%) t+ ** 1.1 3.5 1.1 2.5 3.5 1.1 3.8
Fall Time (20 to 80%) t– ** 1.1 3.5 1.1 2.5 3.5 1.1 3.8
* Individually test each input applying VIH or VIL to input under test.
** Any Output.
Loading...