SEMICONDUCTOR TECHNICAL DATA
Order this document
by BS108/D
N–Channel Enhancement Mode
This TMOS FET is designed for high voltage, high speed
switching applications such as line drivers, relay drivers, CMOS
logic, microprocessor or TTL to high voltage interface and high
voltage display drivers.
• Low Drive Requirement, VGS = 3.0 V max
• Inherent Current Sharing Capability Permits Easy Paralleling of
many Devices
2
GATE
3 SOURCE
MAXIMUM RATINGS
Rating Symbol Value Unit
Drain–Source Voltage V
Gate–Source Voltage V
Drain Current
Continuous
Pulsed
Total Power Dissipation
@ TA = 25°C
Derate above TA = 25°C
Operating and Storage Temperature Range TJ, T
1. The Power Dissipation of the package may result in a lower continuous drain current.
2. Pulse Test: Pulse Width v 300 µs, Duty Cycle v 2.0%.
(1)
(2)
DSS
GS
I
D
I
DM
P
D
stg
200 Vdc
±20 Vdc
250
500
350
6.4
–55 to +150 °C
mAdc
mW/°C
1 DRAIN
mW
200 VOLTS
N–CHANNEL TMOS
POWER FET
LOGIC LEVEL
1
2
3
CASE 29–04, STYLE 30
TO–92
TMOS is a registered trademark of Motorola, Inc.
Motorola, Inc. 1997
BS108
ELECTRICAL CHARACTERISTICS
Characteristic
(TA = 25°C unless otherwise noted)
OFF CHARACTERISTICS
Drain–Source Breakdown Voltage
(VGS = 0, ID = 10 µA)
Zero Gate Voltage Drain Current
(V
= 130 Vdc, VGS = 0)
DSS
Gate–Body Leakage Current
(VGS = 15 Vdc, VDS = 0)
ON CHARACTERISTICS
Gate Threshold Voltage
(ID = 1.0 mA, VDS = VGS)
Static Drain–to–Source On–Resistance
(VGS = 2.0 Vdc, ID = 50 mA)
(VGS = 2.8 Vdc, ID = 100 mA)
Drain Cutoff Current
(VGS = 0.2 V, VDS = 70 V)
(2)
DYNAMIC CHARACTERISTICS
Input Capacitance
(VDS = 25 V, VGS = 0, f = 1.0 MHz)
Output Capacitance
(VDS = 25 V, VGS = 0, f = 1.0 MHz)
Reverse Transfer Capacitance
(VDS = 25 V, VGS = 0, f = 1.0 MHz)
SWITCHING CHARACTERISTICS
Turn–On Time (See Figure 1) t
Turn–Off T ime (See Figure 1) t
2. Pulse Test: Pulse Width ≤ 300 µs, Duty Cycle = 2.0%.
Symbol Min Typ Max Unit
V
(BR)DSS
I
DSS
I
GSSF
V
GS(th)
r
DS(on)
I
DSX
C
iss
C
oss
C
rss
d(on)
d(off)
200 — —
— — 30
— — 10
0.5 — 1.5
—
—
— — 25
— — 150
— — 30
— — 10
— — 15 ns
— — 15 ns
—
—
10
8.0
Ohms
Vdc
nAdc
nAdc
Vdc
m
A
pF
pF
pF
PULSE GENERAT OR
50
2
+25 V
23
V
in
50
40 pF
1.0 M
50
Ω
Figure 1. Switching Test Circuit
RESISTIVE SWITCHING
TO SAMPLING SCOPE
50
20 dB
ATTENUATOR
Motorola Small–Signal Transistors, FETs and Diodes Device Data
Ω
INPUT
V
OUTPUT
INVERTED
INPUT
out
t
on
90% 90%
V
out
90%
10 V
V
in
50%
10%
PULSE
WIDTH
50%
Figure 2. Switching Waveforms
t
off
10%