Motorola BD V3i A3 C Diagram
RX MID CHANNELS
850: CH190 -- 881,6
GSM: CH 62 -- 947,4 MHz
EGSM: CH 37 -- 942,4Mhz
DCS: CH 700 -- 1842,8MHz
PCS: CH 661 -- 1960MHz
TX_HB
TX_LB
1900 MHZ
1800 MHz
900 MHz
850 MHz
BP
DCS/PCS OUT
9
1
2
5
2
1
2
U50
PA + Antenna Switch
GSM850/
GSM900 OUT
from Neptune
( Frontend Control
and Digital Modulation)
MCLK
Internal
Antenna
A1
ANT_DET_B
Mechanical
VSENSE
( to Atlas )
J40
Antenna Switch
(PA_DET to U800)
3
21
1
3
16
15
14
Power and
Antenna
Control
6
4
7
3
8
13
TX_START
(Transmitt Enable)
(NC)
TXIMSMDI
(PA Power Control)
RAMP
(Band select)
TX_EN
CNTRL_2
CNTRL_3
CNTRL_1
(Transmitt Enable)
(Receive Enable)
TX_START
RX_ANT_EN
(indicates mechanical Antenna connection to U800)
(to U250)
( Frontend Control
and Digital Modulation)
(Data In /OUT)
(PA_DET from U50)
(Clock )
(Reset )
MCLK
MS
MDI
VSENSE
NEPTUNE LTS
U800
T9
SPI
W10
U9
U6
L1 Timer
V8
PA Control
B10
DSP Peripherals
accelerator, encryption
Timer, Interupts
DSP
UltraLite
104 MHz
Shared Memory
1Mbit RAM
DSP
Memory
Power
SIM
Interface
H1
A11
E2
V5
VSIM
K2
SIM DIO
K3
SIM RST
J4
SIM CLK
L1
SIM_PD
R1
M1
DATA BUS
ADDRESS BUS
(VCC + 2.775V)
IO_REG
PERIPH_IO_REG
(VCC + 1,575V)
REF_REG
(VCC + 1,875V)
VBUCK
(from Atlas )
(Data In /OUT)
(Reset )
(Clock )
(from Atlas )
VSIM_EN
(to Atlas)
D0-15
(VCC + 2.775V)
J4
SIM
6
Connector
1.8 or 3V
2
SIM Card
1
A0-24
(from
Atlas
(from
Atlas
)
)
VSIM
5
GND
4
VSIM
3
D2
C3
D6 G5
G8
D7E8E7
A2
SAW/ LNA
LNA
Matching
A3
SAW/ LNA
LNA
Matching
A5
SAW/ LNA
LNA
Matching
A6
SAW/ LNA
LNA
Matching
G1
F1
Quadrature
Mixer
Quadrature
Generator
Polyphase
Filter
DC
Correct
( VCO Feedback )
( VCO Tuning)
VCO1 (TX_LB)
VCO2 (TX_HB)
TX_EN
IIN
RX/TX
IBIN
Switch
(100KHz)
QBIN
RX/TX
QIN
Switch
U250
GSM/ EDGE
TRANCEIVER
FIN
ADC
13 bit
ADC
13 bit
Loop Filter
Sync
Filter
Sync
Filter
Digital TX
Interface
GMSK
Modulator
Devider
Phase Det.
Anti
Drop
(100KHz)
Anti
Drop
EDGE
Modulator
GMSK/ EDGE Select
CP
Anti
Alias
Anti
Alias
EDGE
FIR
Filter
Pre-Distortion
Filter
DAC1
Chanel
Filter
Chanel
Filter
Anti
Alias
PA Control
B7
GPIO
DAC
12 bit
DAC
12 bit
Reference
Devider
Serial
Interface
C2
E6
LPF
LPF
Oscilator and
ADC
Voltage
Reg.
F8
ENR
F7
CLKR
F6
Clock Generator
Interface
H7
D8
G7
E5
C5
C6
F4
F5
G4
G3
H3
G7..
C1..
FSR
DRI
26MHZ_OSCO
PERIPH_IO_REG
OSCM
1
Y201
3
26MHz
RF_DATA
RF_CLK
RF_CS
LDTO
( Lock Detect Out)
VCO_REG
PERIPH_IO_REG
RF_REG
(VCC’s from Atlas)
(Clock enable)
2
(NC)
(Clock )
OSCO_F
(U250 Control Bus)
Output Mixer
Serial
(Data In /OUT)
(Chip select)
W7
G12
VoiceBand
A13
N10
26 MHz
A4
Oscillator
U8
V7
SPI
W9
UART / USB
Interface
A17
C15
C16
B16
D15
A16
Keypad
Interface
F3....
F2....
W13
MCU
ARM7
52 MHz
MCU
Memory
Clock Generator
On
Off
T11
V12
MQSPI
W12
V11
B14
D18
T10
B
aseBand
U13
One
Serial Audio
Wire
Port Interface
Bus
W11
D13
(rx)
A12
T13
E3
W5
Timer
Interface
V13
V6
G8
B12
UART2
Universal
Asynchron.
(tx)
Rx /Tx
B13
N13
D16
N17
V16
External
Memory
Interface
MQSPI
Display
GPIO
BT
D19
B15
W18
V17
T18
G17
K16
J19
T16
T19
L16
N18
P2
N3
M4
P1
L3...
U12
U10
G11
C14
C18
E1
CS0B
CS1B
CS2B
EB1B
EB0B
R WB
OEB
BURSTCLK
LBAB
ECBB
LCD_RS
LCD_CS
LCD_CLK_DATA6
LCD_SDATA_DATA7
LCD DATA (0 - 5)
ANT_DET_B
TOUT12
EL_EN
HS INT
LT_SNS_CTL
ADC DATA
K1
U700
G8
D6
F3
FLASH
C2
F5,D5
J2,H1,H8
C6
E5
G7
(indicates mechanical Antenna connection to U800)
(Bias output for THERM signal)
(EL Backlight Enable via J2)
( Bias for Light Sensor
to J2
( analog Light Sensor value
from J2- Keyboard Connector)
E4...
8MB SRam
32 MB Flash
(LCD Control via J1300)
F4
Hall Effect
Switch
4
U1401
RESET OUT
VBUCK
(Flip Open/ Cl o s e
2
(from Neptune)
(from
Atlas
)
Detect)
PERIPH_IO_REG
OSCM
U802
4
2
1
USB_VPIN
USB_XRXD_RTS
USB_VPOUT_TXD
USB_VMIN_RXD
USB_TXENB
Neptune Atlas
USB/ RS232
Communication
USB_SE0
ESD
(from Neptune GPIO)
STANDBY_GATEB
KBC1-2
VRBB1
VRBB2
CLK 13 MHz
KBR0, 3-6
(13 MHz)
BB_SPI_MISO
BB_SPI_MOSI
AUL_CS
BB_SPI_CLK
Neptune Atlas
Neptune Display Diver
Communication
AUL_INT
GRAPH_SPI_CS
GRAPH_INT
STANDBY_1_5V
2
U801
Level
Shift
4
(Watchdog)
(clock)
(framesync)
OWB
BB_SAP_FS
BB_SAP_CLK
(from/ to Neptune
Serial Audio for Ringtone
and Voic e Audio)
One Wire data from Battery
RXD2
BB_SAP_RX
BB_SAP_TX
Communication and Wakeup)
RTS2
TXD2
CTS2
BLUE_HOST_WAKEB
(from/ to U301 BT, J1300
Neptune - BT - Neptune
BLUE_WAKEB
Revision Overview
Rev. 1.0: Initial Block Diagram
V3i /Razor05
ATI_RESETB_2_7V
RESETB
RESET OUT
CLK 32KHZ
WDOG
STANDBY_GATEB
STANDBY
(Keyboard Matrix Signals via J2)
and BT))
(to J1300)
(from Atlas)
(to U700)
(to Atlas)
(to Atlas and
U802)
(from/ to Atlas
Servive, Engineering & Optimization 2005.07.18
LEVEL 3 AL Block Diagram Rev. 1.0
V3 (Razor05) / V3i
Alexander Buehler, Michael Mauderer Page 1of 2
Mini USB
1
4
2
J1
3
5
G1-G4
(Shield)
ESD
VR960
VR950
VR920
VR920
ALERT
Internal
VBUS
Bluetooth
(from/ to U301 BT,
Neptune - BT - Neptune
Communication and Wakeup)
PCB
Pads
(to J2)
4
MIC
3
(to Charging Circuit)
BLUE_WAKEB
BLUE_HOST_WAKEB
(from Neptune/ Atlas)
(from Atlas)
(from/ to Neptune
Serial Audio for Ringtone
and Voice Audio)
ESD
FL1400
(from Atlas)
(PPD device support)
(Accessory Detection signal)
TXD2
RXD2
CTS2
RTS2
RESET_B
CLK_32KHZ
BB_SAP_RX
BB_SAP_FS
BB_SAP_CLK
BB_SAP_TX
ALERTM
ALERTP
HAND_SPKRM
HAND_SPKRP
MICBIAS1
MICINM
VBOOST
VBUS
USB_ID
DM_TXD
DP_RXD
Bluetooth
5
33
29
31
11
9
22
12
(framesync)
(clock)
V10
U8
T6
R7
P9
T9
NC
NC
NC
B4
D2
H8
F3
E3
U300
28
27
BB_SAP_FS
BB_SAP_CLK
R5
P4
13 Bit
Alert
Amplifier
Handset
Amplifier
Microphone
Supply
Amplifier
Headset
Amplifier
Stereo
Det.
Headset
Det.
VBUS 5V
Pass FET
U
E
Interface
30
(tx)
BB_SAP_RX
M
B
S
32
(rx)
R3
SAP
U
K11
BB_SAP_TX
VSIM
(on PCB)
Strip Line
Antenna
25
10
21
16
15
R4
CODEC
16 BIT
STEREO
RF REG
H3
N5
BT_ANTENNA
PERIPH_IO_REG
BTRF_REG
1
Y301
3
(tx) (rx)
BT REG
CAMERA
K2
REG
H4
(from Atlas)
Neptune Atlas
USB/ RS232
Communication
USB_VPIN
USB_XRXD_RTS
C4
B2
USB/RS232
NeptuneAtlas
(communication)
IO REG
REF REG
K17
L16
USB_VPOUT_TXD
F4
GRAPH
M18
USB_VMIN_RXD
USB_TXENB
B3
B1
B+ Sense
REG
AUDIO
U6
USB_SE0
E4
Logic
U900
ATLAS UL
REG
Switcher
PERIPH
IO REG
F16
H2
Neptune Atlas
Communication
BB_SPI_MISO
BB_SPI_MOSI
BB-SPI_CLK
T17
T18
U16
PRI SPI
CNTL.
LOGIC
Neptune Atlas
Communication
Switcher
Buck 350mA
Boost 300mA
G16
AUL CS
U18
VCO
V2
AUL_INT
N14
REG
T-Flash
(V3i only)
(Chip Select/ Enable)
(from Neptune)
RTCK
SPI_CS0
MMC_D0
MMC_2_OUT
MMC_3_CMD_IN
F3,E13........
4
U2001
6
1
(Single Speed)
1
2
7
2
3
M4
U2000
D0
D3
CMD
Motor
to Vibrator
P2
J5
CLK
VCC
ON
LOGIC
VIB REG
5
4
Trans Flash
Card Reader
5
MMC_CLK
4
8
D1
1
D2
6 + 10
(from J2)
PWR_SW
F14
CONV.
CHARGE
CONTR.
TIMER
(from Atlas)
PERIPH_IO_REG
NC
NC
GND
AD
D/A
LED
CNTL.
(VCC)
T14
C15
P13
D14
U14
F13 (Charge Current - )
E15
B16
B12
B14
B10 LEDB1
D12
V17
V16
R16
P16
V12
K10
U15
F12
E12
SIM_PD
CHRGRAW
THERM
BATTP
ISNS_PM
ISNS_PM
CHRGISNSP_PM
CHRGCTRL_PM
BATTFET_PM
BPFET_PM
(to Display Backlight via V2)
RTC_BATT
Y900
CLK_32KHZ
CLK_32KHZ_2_7V
CLK 13 MHZ
(from Neptune)
WDOG
TX_START
STANDBY
RESETB
Flip Connector
ATI_RESETB_2_7V
(from Atlas)
(Current Control)
(to J1300)
BB_SPI_MISO
BB_SPI_MOSI
BB_SPI_CLK
GRAPH_SPI_CS
PERIPH_IO_REG
GRAPH_INT
LCD_SDATA_DATA7
LCD_RS
LCD_DATA3
LCD_DATA5
LCD_CS
LCD_DATA2
LCD_CLK_DATA6
LCD_DATA1
LCD_DATA0
LCD_DATA4
KBR6
KBR4
KBR3
KBR5
KBR7
KBC0
KBR2
KBR1
Q905 (M1)
G
(from/ to Neptune)
(from/ to Neptune)
(toNeptune)
(VBUS Sense)
(Battery Sense)
(Batt Current)
(Charger Current + )
Q906 (M2)
(from J1300)
(to Neptune and U301 BT)
(from Neptune)
(from Neptune, Tx Mode indication for Atlas)
(from U800)
(from/ to Neptune and U700)
FLIP CONNECTOR
Charger and Power-
source Control
Charger
(from Acesory Connector)
(EXT Power)
VBUS
R904
THERM
S
G
D
S
J2
50
48
46
44
42
40
38
36
34
32
30
28
26
24
22
20
18
16
14
12
10
8
6
4
2
g1- g4
(One Wire Bus
to Neptune)
OWB
R910
G
49
47
45
43
41
39
37
35
33
31
29
27
25
23
21
19
17
15
13
11
9
7
5
3
1
BATT CONN.
2
(Bias)
PERIPH REG
D1426
R911
D
Q904 (M3)
S
Battery to BPLUS
Switch
(from Atlas)
GND
REG_3V
RTC_BAT
IO_REG_FLIP
GND
(from Neptune)
EL_EN
(from Atlas)
REG_3V
GND
GND
HAND_SPKRM
HAND_SPKRP
GND
CLK_32KHZ_2_7V
GND
VBUCK_FLIP
GRAPH_REG
GND
LTS_SNS_CNTL
GND
ADC_DATA
LEDB1
PWR_SW
KBC1
(from/ to Neptune)
KBR0
KBC2
GND
J3
3
1
4
VR50
BATTP
Color definition only for this section !
D
G
D902
S
Q903 (M4)
VBUS to BP
IO_REG
VBUCK
(from/ to Atlas)
(from Q960)
(from Atlas)
(from Atlas)
(from Q960)
GRAPH_REG_AUL
(Bias from Neptune)
(toNeptune)
(to Atlas)
GND
TOUT12
Main Charge Path
B+ support without Ext Charger
B+ support with Ext Charger
(Main Source
BP
Switch
VBUS
B4
C4
C2
A4
A2
C3
A3
(Bias Voltage from
Neptune)
for Atlas)
(from Mini USB Connector)
(EXT Power)
(VCC)
(from Atlas)
C1
A1
Q960
NC
NC
V3i /Razor05
4
4
Q910
3
1
VCO_DRV
Q943
3
1
VVIB
VBTPADRV
( 1,3V )
VSIM_EN
( 2,775V ) RF_REG
( 1,8/ 3V ) V_SIM
( 1,875V ) BTRF_REG
(to U250)
(to U300)
(to Neptune amd J4)
( 2,775 ) IO_REG
( 3,10V ) REG_3V
( 1,575V ) REF_REG
(to J2)
(to Neptune)
(to Atlas, Neptune, Q960)
( 2,775V ) PERIPH_IO_ REG
( 2,775V ) AUD_ REG
( 1,275 ) GRAPH_REG_AUL
(to J2)
(Atlas internal and
(only used in Atlas)
( 5,5V ) VBOOST
( 1,875V ) VBUCK
AL circuit)
( Atlas, Neptune,
U700, Q960,U801)
(only used in Atlas)
BP
( 2,775V ) VCO_REG
(to U250)
(Main Source- from Q904)
( 3,00V ) VCC_BTPA
(only used
in Atlas)
2
Revision Overview
Rev. 1.0: Initial Block Diagram
Vib. Motor
1
Servive, Engineering & Optimization 2005.07.18
LEVEL 3 AL Block Diagram Rev. 1.0
V3 (Razor05) / V3i
Alexander Buehler, Michael Mauderer Page 2of 2
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