KIT
EVALUATION
AVAILABLE
250ksps, +3V, 8-/4-Channel, 10-Bit ADCs with +2.5V Reference and Parallel Interface
General Description
The MAX1091/MAX1093 low-power, 10-bit analog-to- digital converters (ADCs) feature a successive-approxi- mation ADC, automatic power-down, fast wake-up (2µs), an on-chip clock, +2.5V internal reference, and a high-speed, byte-wide parallel interface. They operate with a single +3V analog supply and feature a VLOGIC pin that allows them to interface directly with a +1.8V to +3.6V digital supply.
Power consumption is only 5.7mW (VDD = VLOGIC) at the maximum sampling rate of 250ksps. Two softwareselectable power-down modes enable the MAX1091/ MAX1093 to be shut down between conversions; accessing the parallel interface returns them to normal operation. Powering down between conversions can cut supply current to under 10µA at reduced sampling rates.
Both devices offer software-configurable analog inputs for unipolar/bipolar and single-ended/pseudo-differen- tial operation. In single-ended mode, the MAX1091 has eight input channels and the MAX1093 has four input channels (four and two input channels, respectively, when in pseudo-differential mode).
Excellent dynamic performance and low power combined with ease of use and small package size make these converters ideal for battery-powered and dataacquisition applications or for other circuits with demanding power consumption and space requirements.
The MAX1091 is available in a 28-pin QSOP package, while the MAX1093 is available in a 24-pin QSOP. For pin-compatible +5V, 10-bit versions, refer to the MAX1090/MAX1092 data sheet.
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Applications |
Industrial Control Systems |
Data Logging |
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Energy Management |
Patient Monitoring |
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Data-Acquisition Systems |
Touch Screens |
Ordering Information
PART |
TEMP. RANGE |
PIN-PACKAGE |
INL |
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(LSB) |
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MAX1091ACEI |
0°C to +70°C |
28 QSOP |
±0.5 |
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MAX1091BCEI |
0°C to +70°C |
28 QSOP |
±1 |
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MAX1091AEEI |
-40°C to +85°C |
28 QSOP |
±0.5 |
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MAX1091BEEI |
-40°C to +85°C |
28 QSOP |
±1 |
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Ordering Information continued at end of data sheet.
Features
♦10-Bit Resolution, ±0.5LSB Linearity
♦+3V Single-Supply Operation
♦User-Adjustable Logic Level (+1.8V to +3.6V)
♦Internal +2.5V Reference
♦Software-Configurable, Analog Input Multiplexer 8-Channel Single-Ended/
4-Channel Pseudo-Differential (MAX1091)
4-Channel Single-Ended/
2-Channel Pseudo-Differential (MAX1093)
♦Software-Configurable, Unipolar/Bipolar Inputs
♦Low Power: 1.9mA (250ksps)
1.0mA (100ksps) 400µA (10ksps) 2µA (Shutdown)
♦Internal 3MHz Full-Power Bandwidth Track/Hold
♦Byte-Wide Parallel (8+2) Interface
♦Small Footprint: 28-Pin QSOP (MAX1091)
24-Pin QSOP (MAX1093)
Pin Configurations
TOP VIEW
HBEN |
1 |
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24 |
VLOGIC |
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D7 |
2 |
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23 |
VDD |
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D6 |
3 |
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22 |
REF |
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D5 |
4 |
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21 |
REFADJ |
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D4 |
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20 |
GND |
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MAX1093 |
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D3 |
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19 |
COM |
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D2 |
7 |
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18 |
CH0 |
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D1/D9 |
8 |
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17 |
CH1 |
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D0/D8 |
9 |
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16 |
CH2 |
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INT |
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10 |
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15 |
CH3 |
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RD |
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11 |
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14 |
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CS |
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WR |
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12 |
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13 |
CLK |
QSOP
Pin Configurations continued at end of data sheet.
Typical Operating Circuits appear at end of data sheet.
________________________________________________________________ Maxim Integrated Products 1
MAX1091/MAX1093
For free samples and the latest literature, visit www.maxim-ic.com or phone 1-800-998-8800. For small orders, phone 1-800-835-8769.
MAX1091/MAX1093
250ksps, +3V, 8-/4-Channel, 10-Bit ADCs with +2.5V Reference and Parallel Interface
ABSOLUTE MAXIMUM RATINGS
VDD to GND .............................................................. |
-0.3V to +6V |
VLOGIC to GND......................................................... |
-0.3V to +6V |
CH0–CH7, COM to GND ............................ |
-0.3V to (VDD + 0.3V) |
REF, REFADJ to GND ................................ |
-0.3V to (VDD + 0.3V) |
Digital Inputs to GND ............................................... |
-0.3V to +6V |
Digital Outputs (D0–D9, INT) to GND..... |
-0.3V to (VLOGIC + 0.3V) |
Continuous Power Dissipation (TA = +70°C) |
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24-Pin QSOP (derate 9.5mW/°C above +70°C) ........... |
762mW |
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28-Pin QSOP (derate 8.00mW/°C above +70°C) |
.........667mW |
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Operating Temperature Ranges |
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MAX1091_C_ _/MAX1093_C_ _........................... |
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0°C to +70°C |
MAX1091_E_ _/MAX1093_E_ _ ........................ |
-40°C to +85°C |
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Storage Temperature Range ............................. |
-65°C to +150°C |
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Lead Temperature (soldering, 10s) ................................. |
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+300°C |
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VDD = VLOGIC = +2.7V to +3.6V, COM = GND, REFADJ = VDD, VREF = +2.5V, 4.7µF capacitor at REF pin, fCLK = 4.8MHz (50% duty cycle), TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.)
PARAMETER |
SYMBOL |
CONDITIONS |
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MIN |
TYP |
MAX |
UNITS |
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DC ACCURACY (Note 1) |
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Resolution |
RES |
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10 |
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Bits |
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Relative Accuracy (Note 2) |
INL |
MAX109_A |
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±0.5 |
LSB |
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MAX109_B |
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±1 |
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Differential Nonlinearity |
DNL |
No missing codes over temperature |
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±1 |
LSB |
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Offset Error |
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±2 |
LSB |
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Gain Error (Note 3) |
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±2 |
LSB |
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Gain Temperature Coefficient |
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±2.0 |
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ppm/°C |
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Channel-to-Channel Offset |
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±0.1 |
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LSB |
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Matching |
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DYNAMIC SPECIFICATIONS (fIN(sine wave) = 50kHz, VIN = 2.5Vp-p, 250ksps, external fCLK = |
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4.8MHz, bipolar input mode) |
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Signal-to-Noise Plus Distortion |
SINAD |
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60 |
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dB |
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Total Harmonic Distortion |
THD |
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-72 |
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dB |
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(including 5th-order harmonic) |
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Spurious-Free Dynamic Range |
SFDR |
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72 |
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dB |
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Intermodulation Distortion |
IMD |
fIN1 = 49kHz, fIN2 = 52kHz |
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76 |
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Channel-to-Channel Crosstalk |
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fIN = 125kHz, VIN = 2.5Vp-p (Note 4) |
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-78 |
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dB |
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Full-Linear Bandwidth |
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SINAD > 56dB |
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250 |
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kHz |
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Full-Power Bandwidth |
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-3dB rolloff |
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3 |
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MHz |
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CONVERSION RATE |
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External clock mode |
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3.3 |
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Conversion Time (Note 5) |
tCONV |
External acquisition/internal clock mode |
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2.5 |
3.0 |
3.5 |
µs |
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Internal acquisition/internal clock mode |
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3.2 |
3.6 |
4.1 |
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Track/Hold Acquisition Time |
tACQ |
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625 |
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Aperture Delay |
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External acquisition or external clock mode |
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Aperture Jitter |
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External acquisition or external clock mode |
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<50 |
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ps |
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Internal acquisition/internal clock mode |
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<200 |
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External Clock Frequency |
fCLK |
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0.1 |
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4.8 |
MHz |
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Duty Cycle |
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30 |
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% |
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2 _______________________________________________________________________________________
250ksps, +3V, 8-/4-Channel, 10-Bit ADCs with +2.5V Reference and Parallel Interface
ELECTRICAL CHARACTERISTICS (continued)
(VDD = VLOGIC = +2.7V to +3.6V, COM = GND, REFADJ = VDD, VREF = +2.5V, 4.7µF capacitor at REF pin, fCLK = 4.8MHz (50% duty cycle), TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.)
PARAMETER |
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SYMBOL |
CONDITIONS |
MIN |
TYP |
MAX |
UNITS |
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ANALOG INPUTS |
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Analog Input Voltage Range |
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Unipolar, VCOM = 0 |
0 |
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VREF |
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Single-Ended and Differential |
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VIN |
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V |
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Bipolar, VCOM = VREF/2 |
-VREF/2 |
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+VREF/2 |
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Multiplexer Leakage Current |
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On/off-leakage current, VIN = 0 or VDD |
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±0.01 |
±1 |
µA |
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Input Capacitance |
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CIN |
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12 |
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pF |
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INTERNAL REFERENCE |
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REF Output Voltage |
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2.49 |
2.5 |
2.51 |
V |
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REF Short-Circuit Current |
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15 |
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mA |
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REF Temperature Coefficient |
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TCREF |
TA = 0°C to +70°C |
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±20 |
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ppm/°C |
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REFADJ Input Range |
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For small adjustments |
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±100 |
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mV |
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REFADJ High Threshold |
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To power down the internal reference |
VDD - 1.0 |
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V |
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Load Regulation (Note 7) |
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0 to 0.5mA output load |
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0.2 |
0.5 |
mV/mA |
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Capacitive Bypass at REFADJ |
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0.01 |
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µF |
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Capacitive Bypass at REF |
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4.7 |
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µF |
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EXTERNAL REFERENCE AT REF |
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REF Input Voltage Range |
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VREF |
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1.0 |
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VDD + |
V |
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50mV |
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REF Input Current |
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IREF |
VREF = 2.5V, fSAMPLE = 250ksps |
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200 |
300 |
µA |
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Shutdown mode |
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2 |
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DIGITAL INPUTS AND OUTPUTS |
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Input High Voltage |
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VIH |
VLOGIC = 2.7V |
2.0 |
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V |
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VLOGIC = 1.8V |
1.5 |
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Input Low Voltage |
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VIL |
VLOGIC = 2.7V |
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0.8 |
V |
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VLOGIC = 1.8V |
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0.5 |
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Input Hysteresis |
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VHYS |
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mV |
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Input Leakage Current |
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IIN |
VIN = 0 or VDD |
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±0.1 |
±1 |
µA |
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Input Capacitance |
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CIN |
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15 |
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pF |
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Output Low Voltage |
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VOL |
ISINK = 1.6mA |
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0.4 |
V |
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Output High Voltage |
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VOH |
ISOURCE = 1mA |
VLOGIC - 0.5 |
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V |
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Three-State Leakage Current |
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ILEAKAGE |
CS = VDD |
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±0.1 |
±1 |
µA |
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Three-State Output Capacitance |
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COUT |
CS = VDD |
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15 |
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pF |
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MAX1091/MAX1093
_______________________________________________________________________________________ 3
MAX1091/MAX1093
250ksps, +3V, 8-/4-Channel, 10-Bit ADCs with +2.5V Reference and Parallel Interface
ELECTRICAL CHARACTERISTICS (continued)
(VDD = VLOGIC = +2.7V to +3.6V, COM = GND, REFADJ = VDD, VREF = +2.5V, 4.7µF capacitor at REF pin, fCLK = 4.8MHz (50% duty cycle), TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.)
PARAMETER |
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SYMBOL |
CONDITIONS |
MIN |
TYP |
MAX |
UNITS |
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POWER REQUIREMENTS |
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Analog Supply Voltage |
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VDD |
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2.7 |
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3.6 |
V |
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Digital Supply Voltage |
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VLOGIC |
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1.8 |
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VDD + 0.3 |
V |
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Operating mode, |
Internal reference |
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2.3 |
2.6 |
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fSAMPLE = 250ksps |
External reference |
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1.9 |
2.3 |
mA |
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Positive Supply Current |
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IDD |
Standby mode |
Internal reference |
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0.9 |
1.2 |
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External reference |
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0.5 |
0.8 |
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Shutdown mode |
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2 |
10 |
µA |
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VLOGIC Current |
ILOGIC |
CL = 20pF |
fSAMPLE = 250ksps |
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150 |
µA |
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Not converting |
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2 |
10 |
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Power-Supply Rejection |
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PSR |
VDD = 3V ±10%, full-scale input |
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±0.4 |
±0.7 |
mV |
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TIMING CHARACTERISTICS
(VDD = VLOGIC = +2.7V to +3.6V, COM = GND, REFADJ = VDD, VREF = +2.5V, 4.7µF capacitor at REF pin, fCLK = 4.8MHz (50% duty cycle), TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.)
PARAMETER |
SYMBOL |
CONDITIONS |
MIN |
TYP |
MAX |
UNITS |
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CLK Period |
tCP |
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208 |
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CLK Pulse Width High |
tCH |
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40 |
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CLK Pulse Width Low |
tCL |
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40 |
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Data Valid to WR Rise Time |
tDS |
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40 |
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WR Rise to Data Valid Hold Time |
tDH |
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0 |
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WR to CLK Fall Setup Time |
tCWS |
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40 |
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CLK Fall to WR Hold Time |
tCWH |
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40 |
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CS to CLK or WR |
tCSWS |
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Setup Time |
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CLK or WR to CS |
tCSWH |
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Hold Time |
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CS Pulse Width |
tCS |
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100 |
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WR Pulse Width (Note 8) |
tWR |
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60 |
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CS Rise to Output Disable |
tTC |
CLOAD = 20pF, Figure 1 |
20 |
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100 |
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4 _______________________________________________________________________________________
250ksps, +3V, 8-/4-Channel, 10-Bit ADCs with +2.5V Reference and Parallel Interface
TIMING CHARACTERISTICS (continued)
(VDD = VLOGIC = +2.7V to +3.6V, COM = GND, REFADJ = VDD, VREF = +2.5V, 4.7µF capacitor at REF pin, fCLK = 4.8MHz (50% duty cycle), TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.)
PARAMETER |
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CONDITIONS |
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UNITS |
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20 |
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70 |
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RD Rise to Output Disable |
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tTR |
CLOAD = 20pF, Figure 1 |
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ns |
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RD Fall to Output Data Valid |
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tDO |
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CLOAD = 20pF, Figure 1 |
20 |
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70 |
ns |
HBEN to Output Data Valid |
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tDO1 |
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CLOAD = 20pF, Figure 1 |
20 |
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110 |
ns |
RD Fall to INT High Delay |
tINT1 |
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CLOAD = 20pF, Figure 1 |
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100 |
ns |
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CS Fall to Output Data Valid |
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tDO2 |
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CLOAD = 20pF, Figure 1 |
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110 |
ns |
Note 1: Tested at VDD = +3V, COM = GND, unipolar single-ended input mode.
Note 2: Relative accuracy is the deviation of the analog value at any code from its theoretical value after offset and gain errors have been removed.
Note 3: Offset nulled.
Note 4: On channel is grounded; sine wave applied to off channels.
Note 5: Conversion time is defined as the number of clock cycles times the clock period; clock has 50% duty cycle. Note 6: Input voltage range referenced to negative input. The absolute range for the analog inputs is from GND to VDD. Note 7: External load should not change during conversion for specified accuracy.
Note 8: When bit 5 is set low for internal acquisition, WR must not return low until after the first falling clock edge of the conversion.
MAX1091/MAX1093
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VLOGIC |
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3k |
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DOUT |
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CLOAD |
DOUT |
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3k |
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CLOAD |
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20pF |
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20pF |
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a) HIGH-Z TO VOH AND VOL TO VOH |
b) HIGH-Z TO VOL AND VOH TO VOL |
Figure 1. Load Circuits for Enable/Disable Times
_______________________________________________________________________________________ 5
MAX1091/MAX1093
250ksps, +3V, 8-/4-Channel, 10-Bit ADCs with +2.5V Reference and Parallel Interface
Typical Operating Characteristics
(VDD = VLOGIC = +3V, VREF = +2.500V, fCLK = 4.8MHz, CL = 20pF, TA = +25°C, unless otherwise noted.)
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INTEGRAL NONLINEARITY |
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DIFFERENTIAL NONLINEARITY |
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SUPPLY CURRENT |
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0.4 |
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vs. OUTPUT CODE |
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0.25 |
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vs. OUTPUT CODE |
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vs. SAMPLE FREQUENCY |
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TOC01MAX1091/93 |
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TOC02MAX1091/93 |
10,000 |
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MAX1291/93toc03 |
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0.2 |
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0.20 |
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0.3 |
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0.15 |
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0.10 |
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WITH INTERNAL |
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0.1 |
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REFERENCE |
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(LSB) |
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(LSB) |
0.05 |
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( A) |
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INL |
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WITH EXTERNAL |
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REFERENCE |
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-0.15 |
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-0.3 |
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-0.20 |
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-0.4 |
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-0.25 |
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1 |
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0 |
200 |
400 |
600 |
800 |
1000 |
1200 |
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0 |
200 |
400 |
600 |
800 |
1000 |
1200 |
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0.1 |
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1 |
10 |
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100 |
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1k |
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10k |
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100k |
1M |
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OUTPUT CODE |
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OUTPUT CODE |
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fSAMPLE (Hz) |
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SUPPLY CURRENT vs. SUPPLY VOLTAGE
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2.10 |
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toc04 |
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RL = ∞ |
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2.05 |
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CODE = 1010100000 |
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MAX1291/93 |
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(mA) |
2.00 |
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1.95 |
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DD |
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I |
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1.90 |
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1.85 |
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1.80 |
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2.7 |
3.0 |
3.3 |
3.6 |
VDD (V)
|
STANDBY CURRENT vs. TEMPERATURE |
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930 |
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MAX1291/3 toc07 |
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( A) |
920 |
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910 |
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DD |
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I |
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STANDBY |
900 |
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890 |
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880 |
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-40 |
-15 |
10 |
35 |
60 |
85 |
TEMPERATURE (°C)
|
|
SUPPLY CURRENT vs. TEMPERATURE |
|
STANDBY CURRENT vs. SUPPLY VOLTAGE |
|||||||||||||||||||||||||||
|
2.2 |
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toc05 |
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930 |
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toc06 |
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RL = ∞ |
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2.1 |
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920 |
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|||||
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CODE = 1010100000 |
|
MAX1291/3 |
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MAX1291/3 |
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|||||
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2.0 |
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A) |
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(mA) |
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( |
910 |
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I |
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I |
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DD |
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1.9 |
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STANDBY |
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DD |
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900 |
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1.8 |
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890 |
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1.7 |
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1.6 |
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880 |
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|
-40 |
-15 |
10 |
35 |
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60 |
85 |
|
2.7 |
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3.0 |
|
3.3 |
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|
3.6 |
||||||||||||||
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|
TEMPERATURE (°C) |
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|
VDD (V) |
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||||||||
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|
POWER-DOWN CURRENT |
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POWER-DOWN CURRENT |
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|||||||||||||||||||
|
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|
|
vs. SUPPLY VOLTAGE |
|
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|
vs. TEMPERATURE |
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|
||||||||||||||
|
1.50 |
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|
MAX1291/3 toc08 |
|
1.2 |
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|
MAX1291/3 toc09 |
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||||
( A) |
1.25 |
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( A) |
1.1 |
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DD |
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DD |
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I |
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I |
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DOWN-POWER |
1.00 |
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DOWN-POWER |
1.0 |
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0.75 |
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0.9 |
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0.50 |
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0.8 |
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2.7 |
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3.0 |
|
3.3 |
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|
3.6 |
|
-40 |
-15 |
10 |
35 |
|
60 |
85 |
||||||||||||||
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VDD (V) |
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TEMPERATURE (°C) |
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|
6 _______________________________________________________________________________________