Loading...Maxim DS1672U-2, DS1672U-3, DS1672U-33, DS1672-2, DS1672-3 Schematic [ru]
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DS1672
I2C 32-Bit Binary Counter RTC
www.maxim-ic.com
GENERAL DESCRIPTION
The DS1672 incorporates a 32-bit counter and power-monitoring functions. The 32-bit counter is designed to count seconds and can be used to derive time-of-day, week, month, month, and year by using a software algorithm. A precision, temperature-compensated reference and comparator circuit monitors the status of VCC. When an out-of-tolerance condition occurs, an internal power-fail signal is generated that forces the reset to the active state. When VCC returns to an in-tolerance condition, the reset signal is kept in the active state for a period of time to allow the power supply and processor to stabilize.
FEATURES
32-Bit Counter I2C* Serial Interface
Automatic Power-Fail Detect and Switch Circuitry
Power-Fail Reset Output
Low-Voltage Oscillator Operation (1.3V min)
Trickle-Charge Capability
Underwriters Laboratory (UL) Recognized
-40°C to +85°C Operating Temperature Range
TYPICAL OPERATING CIRCUIT |
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PIN CONFIGURATION |
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TOP VIEW |
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1 |
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X1 |
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8 |
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VCC |
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X2 |
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2DS16727 |
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RST |
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VBACKUP |
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3 |
6 |
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SCL |
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GND |
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5 |
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SDA |
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DIP |
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SO |
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µSOP |
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*Purchase of I2C components from Maxim Integrated Products, |
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Inc., or one of its sublicensed Associated Companies, conveys a |
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license under the Philips I2C Patent Rights to use these |
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components in an I2C system, provided that the system conforms |
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to the I2C Standard |
Specification |
defined by Philips. |
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1 of 15 |
REV: 031406 |
DS1672
ORDERING INFORMATION
PART |
TEMP RANGE |
VOLTAGE (V) |
PIN-PACKAGE |
TOP MARK* |
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DS1672-2 |
-40°C to +85°C |
2.0 |
8 |
DIP (300 mils) |
DS1672-2 |
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DS1672-3 |
-40°C to +85°C |
3.0 |
8 |
DIP (300 mils) |
DS1672-3 |
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DS1672-33 |
-40°C to +85°C |
3.3 |
8 |
DIP (300 mils) |
DS1672-33 |
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DS1672S-2 |
-40°C to +85°C |
2.0 |
8 |
SO (150 mils) |
DS1672-2 |
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DS1672S-2+ |
-40°C to +85°C |
2.0 |
8 |
SO (150 mils) |
D1672-2 |
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DS1672S-3 |
-40°C to +85°C |
3.0 |
8 |
SO (150 mils) |
DS1672-3 |
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DS1672S-3+ |
-40°C to +85°C |
3.0 |
8 |
SO (150 mils) |
D1672-3 |
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DS1672S-33 |
-40°C to +85°C |
3.3 |
8 |
SO (150 mils) |
DS167233 |
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DS1672S-33+ |
-40°C to +85°C |
3.3 |
8 |
SO (150 mils) |
D167233 |
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DS1672S-3/T&R |
-40°C to +85°C |
3.0 |
8 |
SO (150 mils)/Tape |
DS1672-3 |
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and Reel |
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DS1672S-3+T&R |
-40°C to +85°C |
3.0 |
8 |
SO (150 mils)/Tape |
D1672-3 |
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and Reel |
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DS1672S-33/T&R |
-40°C to +85°C |
3.3 |
8 |
SO (150 mils)/Tape |
DS167233 |
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and Reel |
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DS1672S-33+T&R |
-40°C to +85°C |
3.3 |
8 |
SO (150 mils)/Tape |
D167233 |
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and Reel |
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DS1672U-2 |
-40°C to +85°C |
2.0 |
8 |
µSOP (3mm) |
1672 |
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rr -2 |
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DS1672U-2+ |
-40°C to +85°C |
2.0 |
8 |
µSOP (3mm) |
1672 |
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rr -2 |
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DS1672U-3 |
-40°C to +85°C |
3.0 |
8 |
µSOP (3mm) |
1672 |
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rr -3 |
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DS1672U-3+ |
-40°C to +85°C |
3.0 |
8 |
µSOP (3mm) |
1672 |
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rr -3 |
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DS1672U-33 |
-40°C to +85°C |
3.3 |
8 |
µSOP (3mm) |
1672 |
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rr -33 |
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DS1672U-33+ |
-40°C to +85°C |
3.3 |
8 |
µSOP (3mm) |
1672 |
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rr -33 |
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DS1672U-33/T&R |
-40°C to +85°C |
3.3 |
8 |
µSOP (3mm)/Tape |
1672 |
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and Reel |
rr -33 |
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DS1672U-33+T&R |
-40°C to +85°C |
3.3 |
8 |
µSOP (3mm)/Tape |
1672 |
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and Reel |
rr -33 |
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+ Denotes a lead-free/RoHS-compliant device.
* A “+” anywhere on the top mark denotes a lead-free device. rr = 2-digit alphanumeric revision code.
2 of 15
DS1672
ABSOLUTE MAXIMUM RATINGS
Voltage Range on Any Pin Relative to Ground……………………………………………..-0.5V to +6.0V Operating Temperature Range (noncondensing) ...…………………………………………-40°C to +85°C Storage Temperature Range……………………………………………………………….-55°C to +125°C Soldering Temperature………………………………………….See IPC/JEDEC J-STD-020 Specification
This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operation sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods of time can affect device reliability.
RECOMMENDED DC OPERATING CONDITIONS
(TA = -40°C to +85°C)
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PARAMETER |
SYMBOL |
MIN |
TYP |
MAX |
UNITS |
NOTES |
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Supply |
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DS1672-2 |
VCC |
1.8 |
2.0 |
2.2 |
V |
1 |
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DS1672-3 |
VCC |
2.7 |
3.0 |
3.3 |
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Voltage |
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DS1672-33 |
VCC |
2.97 |
3.3 |
3.63 |
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Logic 1 |
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VIH |
0.7 x VCC |
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VCC + 0.5 |
V |
1 |
Logic 0 |
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VIL |
-0.5 |
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+0.3 x VCC |
V |
1 |
Backup Supply Voltage |
VBACKUP |
1.3 |
3.0 |
3.63 |
V |
1 |
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DC ELECTRICAL CHARACTERISTICS
(VCCMIN < VCC < VCCMAX, TA = -40°C to +85°C.)
PARAMETER |
SYMBOL |
MIN |
TYP |
MAX |
UNITS |
NOTES |
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Active Supply Current |
ICCA |
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600 |
µA |
2 |
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Standby Current |
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ICCS |
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500 |
µA |
3 |
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Power-Fail Voltage |
VPF |
2.70 |
2.88 |
2.97 |
V |
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2.45 |
2.6 |
2.7 |
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1.58 |
1.7 |
1.8 |
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VBACKUP Leakage Current |
IBACKUPLKG |
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25 |
50 |
nA |
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Logic 0 Output (VOL = 0.4V) |
IOL |
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3 |
mA |
1, 4 |
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Logic 0 |
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(VCC > 2V; |
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3 |
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VOL = 0.4V) |
IOL |
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mA |
1, 4 |
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Output |
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(VCC < 2V; |
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(DS1672-2) |
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3 |
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VOL = 0.2 x VCC) |
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Note 1: All voltages referenced to ground.
Note 2: ICCA specified with SCL clocking at max frequency (400kHz), trickle charger disabled.
Note 3: ICCS specified with VCC = VCCTYP and SDA, SCL = VCCTYP, trickle charger disabled.
Note 4: SDA and RST.
3 of 15
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DS1672 |
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DC ELECTRICAL CHARACTERISTICS |
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(VCC = 0V, TA = -40°C to +85°C.) |
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PARAMETER |
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MIN |
TYP |
MAX |
UNITS |
NOTES |
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VBACKUP Current (Oscillator On) |
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IBACKUPOSC |
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0.425 |
1 |
µA |
5 |
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VBACKUP Current (Oscillator Off) |
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IBACKUP |
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200 |
nA |
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Note 5: Using the recommended crystal on X1 and X2.
CRYSTAL SPECIFICATIONS*
PARAMETER |
SYMBOL |
MIN |
TYP |
MAX |
UNITS |
NOTES |
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Nominal Frequency |
fO |
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32.768 |
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kHz |
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Series Resistance |
ESR |
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45 |
kΩ |
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Load Capacitance |
CL |
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6 |
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pF |
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*The crystal, traces, and crystal input pins should be isolated from RF generating signals. Refer to Application Note 58: Crystal Considerations for Dallas Real-Time Clocks for additional specifications
4 of 15
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DS1672 |
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AC ELECTRICAL CHARACTERISTICS |
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(VCC = 0V, TA = -40°C to +85°C.) |
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PARAMETER |
SYMBOL |
CONDITIONS |
MIN |
TYP |
MAX |
UNITS |
NOTES |
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SCL Clock |
fSCL |
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Fast mode |
100 |
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400 |
kHz |
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Frequency |
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Standard mode |
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100 |
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Bus Free Time |
tBUF |
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Fast mode |
1.3 |
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Between a STOP and |
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µs |
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Standard mode |
4.7 |
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START Condition |
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Hold Time |
tHD:STA |
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Fast mode |
0.6 |
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6 |
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(Repeated) START |
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µs |
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Standard mode |
4.0 |
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Condition |
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LOW Period of SCL |
tLOW |
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Fast mode |
1.3 |
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µs |
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Clock |
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Standard mode |
4.7 |
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HIGH Period of SCL |
tHIGH |
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Fast mode |
0.6 |
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µs |
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Clock |
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Standard mode |
4.0 |
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Setup Time for a |
tSU:STA |
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Fast mode |
0.6 |
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Repeated START |
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µs |
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Standard mode |
4.7 |
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Condition |
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Data Hold Time |
tHD:DAT |
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Fast mode |
0 |
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0.9 |
µs |
7, 8 |
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Standard mode |
0 |
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Data Setup Time |
tSU:DAT |
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Fast mode |
100 |
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9 |
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Standard mode |
250 |
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Rise Time of Both |
tR |
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Fast mode |
20 + 0.1CB |
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300 |
ns |
10 |
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SDA and SCL |
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Standard mode |
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1000 |
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Signals |
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Fall Time of Both |
tF |
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Fast mode |
20 + 0.1CB |
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300 |
ns |
10 |
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SDA and SCL |
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Standard mode |
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300 |
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Signals |
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Setup Time for STOP |
tSU:STO |
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Fast mode |
0.6 |
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µs |
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Condition |
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Standard mode |
4.0 |
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Capacitive Load for |
CB |
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400 |
pF |
10 |
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Each Bus Line |
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I/O Capacitance |
CI/O |
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10 |
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pF |
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Note 6: After this period, the first clock pulse is generated.
Note 7: A device must internally provide a hold time of at least 300ns for the SDA signal (referenced to the VIHMIN of the SCL signal) in order to bridge the undefined region of the falling edge of SCL.
Note 8:The maximum tHD:DAT has only to be met if the device does not stretch the LOW period (tLOW) of the SCL signal.
Note 9: A fast-mode device can be used in a standard-mode system, but the requirement tSU:DAT ≥ to 250ns must then be met. This will automatically be the case if the device does not stretch the LOW period of the SCL signal. If such a device does stretch the LOW period of the SCL signal, it must output the next data bit to the SDA line tR max + tSU:DAT = 1000 + 250 = 1250ns before the SCL line is released.
Note 10: CB–Total capacitance of one bus line in pF.
5 of 15
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