Available in 8-Pin miniDIP, Plastic TO-220
and Tiny 3mm × 3mm × 0.75mm 8-Pin DFN
Packages
U
APPLICATIO S
■
Boost Op Amp Output
■
Isolate Capacitive Loads
■
Drive Long Cables
■
Audio Amplifiers
■
Video Amplifiers
■
Power Small Motors
■
Operational Power Supply
■
FET Driver
The LT®1010 is a fast, unity-gain buffer that can increase
the output capability of existing IC op amps by more than
an order of magnitude. This easy-to-use part makes fast
amplifiers less sensitive to capacitive loading and reduces
thermal feedback in precision DC amplifiers.
Designed to be incorporated within the feedback loop, the
buffer can isolate almost any reactive load. Speed can be
improved with a single external resistor. Internal operating currents are essentially unaffected by the supply
voltage range. Single supply operation is also practical.
This monolithic IC is supplied in 8-pin miniDIP, plastic
TO-220 and 8-pin DFN packages. The low thermal resistance power package is an aid in reducing operating
junction temperatures.
, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
TYPICAL APPLICATIO
Very Low Distortion Buffered Preamplifier
+
V
18V
R1
1k
R2
1M
NOTE 1: ALL RESISTORS 1% METAL FILM
NOTE 2: SUPPLIES WELL BYPASSED AND LOW Z
C1
22pF
R3
1k
–18V
3
+
LT1056CN8LT1010CT
2
–
+
V
C2
22pF
7
4
R4
10k
LM334
O
I
= 2mA
SET
U
R7
50Ω
+
R6
100Ω
6
+
V
–
V
V
INOUT
R
SET
33.2Ω
1%
BOOST
–
V
1010 TA01
R8
100Ω
OUTPUT
1010fc
1
LT1010
WWWU
ABSOLUTE AXI U RATI GS
(Note 1)
Total Supply Voltage .............................................. ± 22V
Continuous Output Current .............................. ±150mA
Input Current (Note 3) ....................................... ±40mA
Operating Junction Temperature Range
LT1010C ............................................... 0°C to 100°C
Storage Temperature Range ................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
UU
W
PACKAGE/ORDER I FOR ATIO
TOP VIEW
NC
V
+
1
2
3
4
N8 PACKAGE
8-LEAD PDIP
TOP VIEW
+
1V
BIAS
2
OUT
3
NC
4
8-LEAD (3mm × 3mm) PLASTIC DFN
T
JMAX
EXPOSED PAD (PIN 9) V
TO REDUCE THERMAL RESISTANCE (NOTE 7)
DD PACKAGE
= 100°C, θJC = 3°C/W, θJA = 40°C/W
–
CAN BE SOLDERED TO PCB
8
INPUT
NC
7
9
V
6
NC
5
–
BIAS
OUT
T
= 100°C, θJC = 45°C/W, θJA = 100°C/W
JMAX
U
UU
PRECO DITIO I G
100% Thermal Limit Burn In–LT1010CT
FRONT VIEW
8
INPUT
7
NC
–
6
V
5
NC
–
V
5-LEAD PLASTIC TO-220
T
= 125°C, θJC = 3°C/W, θJA = 50°C/W
JMAX
5
4
3
2
1
T PACKAGE
OUTPUT
BIAS
–
(TAB)
V
+
V
INPUT
ORDER PART
NUMBER
LT1010CDDLBWZ
DD PART
MARKING
ORDER PART
NUMBER
ORDER PART
NUMBER
LT1010CN8LT1010CT
Order Options Tape and Reel: Add #TR
Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF
Lead Free Part Marking: http://www.linear.com/leadfree/
Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
temperature range, otherwise specifications are at T
The ● indicates specifications which apply over the full operating
= 25°C. (See Note 4. Typical values in curves.)
A
SYMBOLPARAMETERCONDITIONS (Note 4)MINTYPMAXUNITS
V
OS
Output Offset Voltage(Note 4)0150mV
●
–20220mV
VS = ± 15V, VIN = 0V20100mV
I
B
A
V
R
OUT
Input Bias CurrentI
Large-Signal Voltage Gain
Output ResistanceI
= 0mA0250µA
OUT
≤ 150mA0500µA
I
OUT
= ±1mA510Ω
OUT
I
= ±150mA510Ω
OUT
●
●
●
0800µA
0.9951.00V/V
12Ω
Slew RateVS = ±15V, VIN = ±10V,75V/µs
= ±8V, RL = 100Ω
V
OUT
1010fc
2
LT1010
ELECTRICAL CHARACTERISTICS
temperature range, otherwise specifications are at T
The ● indicates specifications which apply over the full operating
= 25°C. (See Note 4. Typical values in curves.)
A
SYMBOLPARAMETERCONDITIONS (Note 4)MINTYPMAXUNITS
+
V
SOS
V
SOS
R
SAT
V
BIAS
I
S
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: For case temperatures above 25°C, dissipation must be derated
based on a thermal resistance of 25°C/W for the T package, 130°C/W for
the N8 package and 40°C/W for the DD package for
above 25°C. See Applications Information.
Note 3: In current limit or thermal limit, input current increases sharply
with input-output differentials greater than 8V; so input current must be
limited. Input current also rises rapidly for input voltages 8V above V
0.5V below V
Note 4: Specifications apply for 4.5V ≤ V
–
+ 0.5V ≤ VIN ≤ V+ – 1.5V and I
V
Temperature range is 0°C ≤ T
Positive Saturation OffsetI
–
Negative Saturation OffsetI
Saturation ResistanceI
Bias Terminal VoltageR
Supply CurrentI
–
.
≤ 40V,
S
= 0, unless otherwise stated.
OUT
≤ 100°C, TC ≤ 100°C.
J
ambient
= 0 (Note 5)1.0V
OUT
= 0 (Note 5)0.2V
OUT
= ±150mA (Note 5)22Ω
OUT
= 20Ω (Note 6)700840mV
BIAS
OUT
= 0, I
= 09mA
BIAS
●
●
●
●
560880mV
●
1.1V
0.3V
28Ω
10mA
Note 5: The output saturation characteristics are measured with 100mV
output clipping. See Applications Information for determining available
output swing and input drive requirements for a given load.
Note 6: The output stage quiescent current can be increased by
connecting a resistor between the BIAS pin and V
+
. The increase is
equal to the bias terminal voltage divided by this resistance.
temperatures
Note 7: Thermal resistance varies depending upon the amount of PC board
metal attached to the pin (Pin 9) of the device. θ
is specified for a certain
JA
amount of 1oz copper metal trace connecting to Pin 9 as described in the
+
or
thermal resistance tables in the Applications Information section.
1010fc
3
LT1010
FREQUENCY (MHz)
25
5
10
PHASE LAG (DEGREES)
20
50
1020
1010 G03
RL = 50Ω
R
L
= 200Ω
CL = 100pF
R
S
= 50Ω
R
BIAS
= 20Ω
T
J
= 25°C
UW
TYPICAL PERFOR A CE CHARACTERISTICS
BandwidthPhase LagPhase Lag
50
50
40
30
20
FREQUENCY (MHz)
10
0
0
QUIESCENT CURRENT (mA)
10
RL = 200Ω
RL = 50Ω
20
= 100mV
V
IN
CL 100pF
= –3dB
A
V
= 25°C
T
J
30
P-P
1010 G01
20
RL = 50Ω
10
PHASE LAG (DEGREES)
5
40
25
Small-Step ResponseOutput Impedance
150
RL = 100Ω
= 25°C
T
J
100
50
INPUTOUTPUT
0
–50
VOLTAGE CHANGE (mV)
–100
100
I
= 0
BIAS
= 25°C
T
J
10
OUTPUT IMPEDANCE (Ω)
R
= 200Ω
L
FREQUENCY (MHz)
CL = 100pF
= 50Ω
R
S
= 0
I
BIAS
= 25°C
T
J
1020
1010 G02
Capacitive Loading
10
RS = 50Ω
= 0
I
BIAS
= 25°C
T
J
0
–10
VOLTAGE GAIN (dB)
0.1µF
100pF3nF
–150
0
1020
TIME (ns)
30
1010 G04
Slew Response
20
15
POSITIVE
VS = ±15V
= 100Ω
R
L
= 25°C
T
J
f ≤ 1MHz
NEGATIVE
200
1010 G07
250
10
5
0
–5
OUTPUT VOLTAGE (V)
–10
–15
–20
–50
4
050150
= 0
I
BIAS
R
= 20Ω
BIAS
100
TIME (ns)
1
0.1
Negative Slew Rate
400
VS = ±15V
≥ –10V
0 ≥ V
IN
300
200
SLEW RATE (V/µs)
100
0
0
10
QUIESCENT CURRENT (mA)
110100
FREQUENCY (MHz)
20
1010 G05
RL = 200Ω
RL = 100Ω
RL = 50Ω
30
1010 G08
–20
0.1
110100
FREQUENCY (MHz)
1010 G06
Supply Current
80
VS = ±15V
= ±10V
V
IN
= 0
I
L
= 25°C
T
C
60
40
SUPPLY CURRENT (mA)
20
40
0
1235
0
FREQUENCY (MHz)
4
1010 G09
1010fc
UW
FREQUENCY (Hz)
10
100
NOISE VOLTAGE (nV/√Hz)
150
200
1001k10k
1010 G15
50
0
TJ = 25°C
RS = 1k
RS = 50Ω
TYPICAL PERFOR A CE CHARACTERISTICS
Output Offset VoltageInput Bias CurrentInput Bias Current