LG Display LC420EUS-SCA1 Specification

LC420EUS

Product Specification

SPECIFICATION

FOR

APPROVAL

)

(

(

Preliminary Specification

●

)

Final Specification

Title 42.0” WUXGA TFT LCD

BUYER General

MODEL

APPROVED BY

/

/

/

SIGNATURE

DATE

SUPPLIER LG.Display Co., Ltd.

*MODEL LC420EUS

SUFFIX SCA1 (RoHS Verified)

*When you obtain standard approval,

please use the above model name without suffix

APPROVED BY

J. T Eo / Team Leader

REVIEWED BY

S. W Yu / Project Leader

PREPARED BY

J. T Jung / Engineer

SIGNATURE

DATE

Please return 1 copy for your confirmation with

your signature and comments.

Ver. 1.0

TV Products Development Dept.

LG. Display LCD Co., Ltd

0 /35

Product Specification

CONTENTS

LC420EUS

Number ITEM

COVER 1

CONTENTS

RECORD OF REVISIONS

1 GENERAL DESCRIPTION

2 ABSOLUTE MAXIMUM RATINGS

3 ELECTRICAL SPECIFICATIONS

3-1 ELECTRICAL CHARACTERISTICS

3-2 INTERFACE CONNECTIONS

3-3 SIGNAL TIMING SPECIFICATIONS

3-4 DATA MAPPING AND TIMING

3-5 PANEL PIXEL STRUCTURE

3-6 POWER SEQUENCE

4 OPTICAL SPECIFICATIONS

5 MECHANICAL CHARACTERISTICS

Page

2

3

4

5

6

6

12

15

18

19

20

21

25

6 RELIABILITY

7 INTERNATIONAL STANDARDS

7-1 SAFETY

7-2 ENVIRONMENT

8 PACKING

8-1 INFORMATION OF LCM LABEL

8-2 PACKING FORM

9 PRECAUTIONS

9-1 MOUNTING PRECAUTIONS

9-2 OPERATING PRECAUTIONS

9-3 ELECTROSTATIC DISCHARGE CONTROL

9-4 PRECAUTIONS FOR STRONG LIGHT EXPOSURE

9-5 STORAGE

9-6 HANDLING PRECAUTIONS FOR PROTECTION FILM

Ver. 1.0

28

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1 /35

Product Specification

RECORD OF REVISIONS

Revision No. Revision Date Page Description

0.0 Feb, 8, 2010 - Preliminary Specification (First Draft)

0.1 Mar.1.2010 7,8 Updated the electrical Spec.

18 Updated the Optical Spec.

23,24 Updated the mechanical drawing.

0.2 Mar.29.2010 18 Updated the Optical Spec.

33 Updated the Appendix III

Final Specification-Mar.29.20101.0

LC420EUS

Ver. 1.0

2 /35

LC420EUS

Product Specification

1. General Description

The LC420EUS is a Color Active Matrix Liquid Crystal Display with an integral Light Emitting Diode (LED)
bac kl i gh t s y s te m . Th e mat r ix em p l o ys a -S i Thi n F i l m Tr a ns is t or a s the ac t iv e e lem e nt.
It is a transmissive type display operating in the normally black mode. It has a 42.02 inch diagonally measured
acti v e d i s pl a y a r e a w ith WUX G A re s o l u t i o n (1 0 8 0 ve r t ical b y 1 9 20 horizontal pixe l a r ray).
Each pixel is divided into Red, Green and Blue sub-pixels or dots which are arranged in vertical stripes.
Gray scale or the luminance of the sub-pixel color is determined with a 8-bit gray scale signal for each dot.
Therefore, it can present a palette of more than 16.7M(true) colors.
It is intended to support LCD TV, PCTV where high brightness, super wide viewing angle, high color gamut,
high color depth and fast response time are important.

Power (VCC, VDD, VGH, VGL)

Source Control Signal

Gate Control Signal

Gamma Reference Voltage

mini-LVDS (RGB) for Left drive

CN1

(60pin)

S1 S

G1

Source Driver Circuit

1920

Power (VCC, VDD, VGH, VGL)

Source Control Signal

Gate Control Signal

Gamma Reference Voltage

mini-LVDS (RGB) for Right drive

LED Anode

LED Cathode

CN2

(60pin)

CN1 (12pin)
CN2 (13pin)

G1080

TFT - LCD Panel

(

1920 × RGB × 1080 pixels)

[Gate In Panel]

H : 6 Block

V :

2Block

Local Dimming :

12 Block

General Features

Active Screen Size 42.02 inches(1067.31mm) diagonal

Outline Dimension 973.2(H) x 566.2 (V) x 10.8 mm(B)/25.3(D) (Typ.)

Pixel Pitch 0.4845 mm x 0.4845 mm

Pixel Format 1920 horiz. by 1080 vert. Pixels, RGB stripe arrangement

Color Depth 8-bit, 16.7 M colors (※ 1.06B colors @ 10 bit (D) System Output )

Drive IC Data Interface

Luminance, White 450 cd/m2 (Center 1point ,Typ.)

Viewing Angle (CR>10) Viewing angle free ( R/L 178 (Min.), U/D 178 (Min.))

Power Consumption

Weight 11.1Kg (Typ.)

Display Mode Transmissive mode, Normally black

Surface Treatment Hard coating (3H), Anti-glare treatment of the front polarizer (Haze 10%)

Source D-IC : 8-bit mini-LVDS, gamma reference voltage, and control signals
Gate D-IC : Line on Glass(LOG) Through Source D-IC

Total 111.2 W (Typ.)
(Logic=18.7 W with T-CON, Backlight=92.5W @ with Driver

Ver. 1.0

3 /35

LC420EUS

Product Specification

2. Absolute Maximum Ratings

The following items are maximum values which, if exceeded, may cause faulty operation or damage to the
LCD module.

Table 1. ABSOLUTE MAXIMUM RATINGS

Parameter Symbol

Logic Power Voltage VCC -0.5 +4.0 VDC

Gate High Voltage VGH +18.0 +30.0 VDC

Gate Low Voltage VGL -8.0 -4.0 VDC

Source D-IC Analog Voltage VDD -0.3 +18.0 VDC

Gamma Ref. Voltage (Upper) VGMH ½VDD-0.5 VDD+0.5 VDC

Gamma Ref. Voltage (Low) VGML -0.3 ½ VDD+0.5 VDC

LED Input Voltage Vf - +180.0 VDC

Panel Front Temperature TSUR - +68 °C 4

Operating Temperature TOP 0 +50 °C

Storage Temperature TST -20 +60 °C

Operating Ambient Humidity HOP 10 90 %RH

Storage Humidity HST 10 90 %RH

Note:

1. Ambient temperature condition (Ta = 25 ± 2 °C )

Value

Unit Note

Min Max

2. Temperature and relative humidity range are shown in the figure below. Wet bulb temperature

should be Max 39 °C and no condensation of water.

3. Gravity mura can be guaranteed below 40℃ condition.

4. The maximum operating temperature is based on the test condition that the surface temperature

of display area is less than or equal to 68 ℃ with LCD module alone in a temperature controlled
chamber. Thermal management should be considered in final product design to prevent the surface

temperature of display area from being over 68 ℃. The range of operating temperature may

degrade in case of improper thermal management in final product design.

90%

60

60%

1

2,3

Ver. 1.0

Wet Bulb
Temperature [°C]

20

10

0

10 20 30 40 50 60 70 800-20
Dry Bulb Temperature [°C]

30

40

50

40%

10%

Storage

Operation

Humidity

[(%)RH]

4 /35

LC420EUS

Product Specification

3. Electrical Specifications

3-1. Electrical Characteristics

It requires several power inputs. The VCC is the basic power of LCD Driving power sequence, Which is used
to logic power voltage of Source D-IC and Gate D-IC.

Table 2. ELECTRICAL CHARACTERISTICS

Parameter Symbol Condition MIN TYP MAX Unit Note

Logic Power Voltage VCC - 3.0 3.3 3.6

Logic High Level Input Voltage VIH 2.3 VCC VDC

Logic Low Level Input Voltage VIL 0 0.8

Source D-IC Analog Voltage VDD - 16.0 16.2 16.4 VDC

Half Source D-IC Analog
Voltage

Gamma Reference Voltage

Common Voltage Vcom - 5.75 6.05 6.35 V

Mini-LVDS Clock frequency CLK 3.0V≤VCC ≤3.6V 312 MHz

mini-LVDS input Voltage
(Center)

mini-LVDS input Voltage
Distortion (Center)

mini-LVDS differential
Voltage range

mini-LVDS differential
Voltage range Dip

Gate High Voltage VGH 26.7 27.0(TBD) 27.3 VDC

Gate Low Voltage VGL -5.2 -5.0(TBD) -4.8 VDC

Gate High Modulation Voltage VGHM - - 16.5 - VDC Fig.1

Total Power Current

Total Power Consumption

H_VDD - 7.85 8.1 8.35

V

GMH

V

GML

VIB

ΔVIB 0.8 V

VID 150 800 mV

ΔVID 25 800 mV

ILCD - - 1,555 mA 1,2

PLCD - - 18.66 Watt

(GMA1 ~ GMA9) ½*VDD VDD-0.2

(GMA10 ~ GMA18) 0.2 ½*VDD

0.7 +

(VID/2)

Mini-LVDS Clock

and Data

(VCC-1.2)

− VID / 2

VDC

VDC

VDC

V

5

Note:

1. The specified current and power consumption are under the VLCD=12V., 25 ± 2°C, fV=240Hz

condition whereas mosaic pattern(8 x 6) is displayed and fVis the frame frequency.

2. The above spec is based on the basic model.

3. All of the typical gate voltage should be controlled within 1% voltage level

4. Ripple voltage level is recommended under 10%

5. In case of mini-LVDS signal spec, refer to Fig 2 for the more detail.

6. Logic level Input Signal : SOE, POL, GSP, H_CONV, OPT_N

7. HVDD Voltage level is half of VDD and it should be between Gamma9 and Gamma10

Ver. 1.0

5 /35

VCM (0V)

VCM (0V)

VCM (0V) VCM (0V)

VGH

VGHM

GND

VGL

VID

VID

VIDVID

Product Specification

Without GPM With GPM

FIG. 1 Gate Output Wave form without GPM and with GPM

△△△△VID

VID

VID VID

△△△△VIB

VIB

VIBVIB

LC420EUS

VIB

VIB

VIB VIB

VID

VID

VIDVID

* Differential Probe

* Differential Probe

* Differential Probe* Differential Probe

△△△△VID

VID

VID VID

* Active Probe

* Active Probe

* Active Probe* Active Probe

FIG. 2 Description of VID, ΔΔΔΔVIB, ΔΔΔΔVID

*

* Source PCB

Source PCB

* *

Source PCBSource PCB

FIG. 3 Measure point

Ver. 1.0

6 /35

Product Specification

Table 3. ELECTRICAL CHARACTERISTICS (Continue)

LC420EUS

Parameter Symbol

Values

Unit Note

Min Typ Max

Backlight Assembly :

165 mAdc ±5%

384

mAdc 3D Mode

Forward Current

Anode I

F (anode)

(one array)

Cathode I

Forward Voltage V

Forward Voltage Variation △V

Power Consumption P

F (cathode)

F

F

BL

Burst Dimming Duty On duty

52.25 55 57.75

121.6 128 134.4

118.2

131.0

123.4

136.3

128.5

141.6 Vdc 3D Mode

1.7 Vdc

81.4 84.8

35.6 37.0 W 3D Mode

1 100

1 30 % 3D Mode

mAdc ±5%

mAdc 3D Mode

Vdc

W

%

Burst Dimming Frequency 1/T 95 252 Hz

LED Array : (APPENDIX-V)

Life Time 30,000 Hrs

Notes :

The design of the LED driver must have specifications for the LED array in LCD Assembly.
The electrical characteristics of LED driver are based on Constant Current driving type.
The performance of the LED in LCM, for example life time or brightness, is extremely influenced by the
characteristics of the LED Driver. So, all the parameters of an LED driver should be carefully designed.
When you design or order the LED driver, please make sure unwanted lighting caused by the mismatch of the
LED and the driver (no lighting, flicker, etc) has never been occurred. When you confirm it, the LCD–
Assembly should be operated in the same condition as installed in your instrument.

Ver. 1.0

7 /35

Product Specification

Notes :

1. Electrical characteristics are based on LED Array specification.

2. Specified values are defined for a Backlight Assembly. (IBL :

3. Each LED array has one anode terminal and three cathode terminals.
The forward current(IF) of the anode terminal is 165mA and it supplies 55mA into three strings, respectively

19 (LED Pakage / 1string)

4 LED array, 165mA/LED array)

LC420EUS

Anode

°°°° °°°° °°°°

°°°° °°°° °°°°

°

°

°

°
°

°

°

°
°

°

°

°

°°°° °°°° °°°°

Cathode #1

Cathode #2

Cathode #

3

3(LED String / 1 Array)

4. The forward voltage(VF) of LED array depends on ambient temperature (Appendix-V)

5. ΔVFmeans Max VF-Min VFin one Backlight. So VFvariation in a Backlight isn’t over Max. 1.7V

6. Maximum level of power consumption is measured at initial turn on.
Typical level of power consumption is measured after 1hrs aging at 25 ± 2°C.

7. The life time(MTTF) is determined as the time at which brightness of the LED is 50% compared to that of

initial value at the typical LED current on condition of continuous operating at 25 ± 2°C, based on duty 100%.

8. The reference method of burst dimming duty ratio.
It is recommended to use synchronous V-sync frequency to prevent waterfall
(Vsync x 1 =Burst Frequency)

Ver. 1.0

8 /35

LC420EUS

Product Specification

3-2. Interface Connections

This LCD module employs two kinds of interface connection, two 80-pin FFC connector are used for the
module electronics and

3-2-1. LCD Module

-LCD Connector (CN1): TF06L-80S-0.5SH (Manufactured by Hirose) or Equivalent

Table 4-1. MODULE CONNECTOR(CN1) PIN CONFIGURATION

No Symbol Description No Symbol Description

1 VDD Driver Power Supply Voltage 41 GND Ground

2 VDD Driver Power Supply Voltage 42 POL Polarity Output Signal

3 GND Ground 43 GSP Gate Start Pulse

4 VCC Logic Power Supply Voltage 44 H_CONV Horizontal 2 Inversion Signal

5 VCC Logic Power Supply Voltage 45 OPT_N

6 GND Ground 46 GND Ground

7 HVDD Half Driver Power Supply Voltage 47 LRV5 - Left Right Mini LVDS Receiver Signal(5-)

8 HVDD Half Driver Power Supply voltage 48 LRV5 + Left Right Mini LVDS Receiver Signal(5+)

9 GND Ground 49 LRV4 - Left Right Mini LVDS Receiver Signal(4-)

10 VGL Gate Low Voltage 50 LRV4 + Left Right Mini LVDS Receiver Signal(4+)

11 GND Ground 51 LRV3 - Left Right Mini LVDS Receiver Signal(3-)

12 GOE Gate Output Enable 52 LRV3 + Left Right Mini LVDS Receiver Signal(3+)

13 GSC Gate Shift Clock 53 GND Ground

14 GND Ground 54 LRVCLK - Left Right Mini LVDS Receiver Clock(-)

15 VGH Gate High Voltage 55 LRVCLK + Left Right Mini LVDS Receiver Clock(+)

16 GND Ground 56 GND Ground

17 LVCOM_FB Vcom Feedback 57 LRV2 - Left Right Mini LVDS Receiver Signal(2-)

18 VCOM_L Left Vcom Output 58 LRV2 + Left Right Mini LVDS Receiver Signal(2+)

19 GND Ground 59 LRV1 - Left Right Mini LVDS Receiver Signal(1-)

20 ZOUT LTD Output 60 LRV1 + Left Right Mini LVDS Receiver Signal(1+)

21 GND Ground 61 LRV0 - Left Right Mini LVDS Receiver Signal(0-)

22 GND Ground 62 LRV0 + Left Right Mini LVDS Receiver Signal(0+)

23 GMA18 Gamma Voltage 18 63 GND Ground

24 GMA17 Gamma Voltage 17 64 LLV5 - Left Left Mini LVDS Receiver Signal(5-)

25 GMA16 Gamma Voltage 16 65 LLV5 + Left Left Mini LVDS Receiver Signal(5+)

26 GMA15 Gamma Voltage 15 66 LLV4 - Left Left Mini LVDS Receiver Signal(4-)

27 GMA14 Gamma Voltage 14 67 LLV4 + Left Left Mini LVDS Receiver Signal(4+)

28 GMA13 Gamma Voltage 13 68 LLV3 - Left Left Mini LVDS Receiver Signal(3-)

29 GMA12 Gamma Voltage 12 69 LLV3 + Left Left Mini LVDS Receiver Signal(3+)

30 GMA10 Gamma Voltage 10 70 GND Ground

31 GMA9 Gamma Voltage 9 71 LLVCLK - Left Left Mini LVDS Receiver Clock(-)

32 GMA7 Gamma Voltage 7 72 LLVCLK + Left Left Mini LVDS Receiver Clock(+)

33 GMA6 Gamma Voltage 6 73 GND Ground

34 GMA5 Gamma Voltage 5 74 LLV2 - Left Left Mini LVDS Receiver Signal(2-)

35 GMA4 Gamma Voltage 4 75 LLV2 + Left Left Mini LVDS Receiver Signal(2+)

36 GMA3 Gamma Voltage 3 76 LLV1 - Left Left Mini LVDS Receiver Signal(1-)

37 GMA2 Gamma Voltage 2 77 LLV1 + Left Left Mini LVDS Receiver Signal(1+)

38 GMA1 Gamma Voltage 1 78 LLV0 - Left Left Mini LVDS Receiver Signal(0-)

39 GND Ground 79 LLV0 + Left Left Mini LVDS Receiver Signal(0+)

40 SOE Source Output Enable 80 GND Ground

four 3-pin Balance PCB connectors are used for the integral backlight system.

“H” Normal Display / “L” Rotation Display

Note :

Ver. 1.0

1. Please refer to application note for details (

Half VDD & Gamma Voltage setting).

9 /35

Product Specification

-LCD Connector (CN2): TF06L-80S-0.5SH (Manufactured by Hirose) or Equivalent

Table 4-2. MODULE CONNECTOR(CN2) PIN CONFIGURATION

No Symbol Description No Symbol Description

1 GND Ground 41 GSP Gate Start Pulse

2 RRV5 - Right Right Mini LVDS Receiver Signal(5-) 42 GND Ground

3 RRV5 + Right Right Mini LVDS Receiver Signal(5+) 43 GMA 18 Gamma Voltage 18

4 RRV4 - Right Right Mini LVDS Receiver Signal(4-) 44 GMA 17 Gamma Voltage 17

5 RRV4 + Right Right Mini LVDS Receiver Signal(4+) 45 GMA 16 Gamma Voltage 16

6 RRV3 - Right Right Mini LVDS Receiver Signal(3-) 46 GMA 15 Gamma Voltage 15

7 RRV3 + Right Right Mini LVDS Receiver Signal(3+) 47 GMA 14 Gamma Voltage 14

8 GND Ground 48 GMA 13 Gamma Voltage 13

9 RRVCLK - Right Right Mini LVDS Receiver Clock(-) 49 GMA 12 Gamma Voltage 12

10 RRVCLK + Right Right Mini LVDS Receiver Clock(+) 50 GMA 10 Gamma Voltage 10

11 GND Ground 51 GMA 9 Gamma Voltage 9

12 RRV2 - Right Right Mini LVDS Receiver Signal(2-) 52 GMA 7 Gamma Voltage 7

13 RRV2 + Right Right Mini LVDS Receiver Signal(2+) 53 GMA 6 Gamma Voltage 6

14 RRV1 - Right Right Mini LVDS Receiver Signal(1-) 54 GMA 5 Gamma Voltage 5

15 RRV1 + Right Right Mini LVDS Receiver Signal(1+) 55 GMA 4 Gamma Voltage 4

16 RRV0 - Right Right Mini LVDS Receiver Signal(0-) 56 GMA 3 Gamma Voltage 3

17 RRV0 + Right Right Mini LVDS Receiver Signal(0+) 57 GMA 2 Gamma Voltage 2

18 GND Ground 58 GMA 1 Gamma Voltage 1

19 RLV5 - Right Left Mini LVDS Receiver Signal(5-) 59 GND Ground

20 RLV5 + Right Left Mini LVDS Receiver Signal(5+) 60 ZOUT LTD Output

21 RLV4 – Right Left Mini LVDS Receiver Signal(4-) 61 GND Ground

22 RLV4 + Right Left Mini LVDS Receiver Signal(4+) 62 VCOM_R Right Vcom Output

23 RLV3 - Right Left Mini LVDS Receiver Signal(3-) 63

24 RLV3 + Right Left Mini LVDS Receiver Signal(3+) 64 GND Ground

25 GND Ground 65 VGH Gate High Voltage

26 RLVCLK - Right Left Mini LVDS Receiver Clock(-) 66 GND Ground

27 RLVCLK + Right Left Mini LVDS Receiver Clock(+) 67 GSC Gate Shift Clock

28 GND Ground 68 GOE Gate Output Enable

29 RLV2 - Right Left Mini LVDS Receiver Signal(2-) 69 GND Ground

30 RLV2 + Right Left Mini LVDS Receiver Signal(2+) 70 VGL Gate Low Voltage

31 RLV1 - Right Left Mini LVDS Receiver Signal(1-) 71 OPT_P

32 RLV1 + Right Left Mini LVDS Receiver Signal(1+) 72 GND Ground

33 RLV0 - Right Left Mini LVDS Receiver Signal(0-)

34 RLV0 + Right Left Mini LVDS Receiver Signal(0+)

35 GND Ground 75 GND Ground

36 OPT_N

37 H_CONV Horizontal 2 Inversion Signal 77 VCC Logic Power Supply Voltage

38 SOE Source Output Enable 78 GND Ground

39 GND Ground 79 VDD Driver Power Supply Voltage

40 POL Polarity Output Signal 80 VDD Driver Power Supply Voltage

“H” Normal Display / “L” Rotation Display 76 VCC Logic Power Supply Voltage

RVCOM_FB NC(TBD)

“L” Normal Display / “H” Rotation Display

73 HVDD Half Driver Power Supply Voltage

74 HVDD Half Driver Power Supply voltage

LC420EUS

Note :

1. Please refer to application note for details (

Source Right PCB

Ver. 1.0

CN 2

#1 #80

Half VDD & Gamma Voltage setting).

CN 1

Source Left PCB

#1 #80

10 /35