3-4LVDS Signal Specification
3-5Color Data Reference
3-6POWER SEQUENCE
5MECHANICAL CHARACTERISTICS
Page
0
1
2
3
4
5
5
7
9
10
13
14
20
6RELIABILITY
7INTERNATIONAL STANDARDS
7-1SAFETY
7-2EMI
7-3ENVIRONMENT
8PACKING
8-1INFORMATION OF LCM LABEL
8-2PACKING FORM
9PRECAUTIONS
9-1MOUNTING PRECAUTIONS
9-2OPERATING PRECAUTIONS
9-3ELECTROSTATIC DISCHARGE CONTROL
9-4PRECAUTIONS FOR STRONG LIGHT EXPOSURE
9-5STORAGE
9-6HANDLING PRECAUTIONS FOR PROTECTION FILM
23
24
24
24
24
25
25
25
26
26
26
27
27
27
27
Ver. 1.0
1 /46
Global LCD Panel Exchange Center
www.panelook.com
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
www.panelook.com
Revision No.Revision DatePageDescription
0.0July, 20, 2010-Preliminary Specification , Temporal Buyer Set Phase2 ES
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
www.panelook.com
+12.0V
1. General Description
The LC420EUQ is a Color Active Matrix Liquid Crystal Display with an integral Light Emitting Diode (LED)
backlight system. The matrix employs a-Si Thin Film Transistor as the active element.
It is a transmissive type display operating in the normally black mode. It has a 42.02 inch diagonally measured
active display area with WUXGA resolution (1080 vertical by 1920 horizontal pixel array).
Each pixel is divided into Red, Green and Blue sub-pixels or dots which are arranged in vertical stripes.
Gray scale or the luminance of the sub-pixel color is determined with a 10-bit gray scale signal for each dot.
Therefore, it can present a palette of more than 1.06Billon colors.
It is intended to support LCD TV, PCTV where high brightness, super wide viewing angle, high color gamut,
high color depth and fast response time are important.
LC420EUQ
Product Specification
Mini-LVDS(RGB)
G1
Gate Driver Circuit
G1080
Source Driver Circuit
S1S1920
TFT - LCD
Panel
(1920 × RGB × 1080
pixels)
3D Enable
LVDS Select
L/R Indicator
L/D Enable
LVDS(2Port)
Bit Select
CN3
(51pin)
Flash*2
MEMC*2
Shutter Glass Out
DDR2*2
EEPROM
SCL
SDA
Timing
Controller
(OPC+DGA+ODC)
Power Circuit
Block
VSYNC, SIN, SCLK, GND
3D Enable
+24.0V, GND, On/Off
ExtVBR-B
LED Driver
V :2Block
H :6 Block
Local Dimming : 12 Block
General Features
Active Screen Size42.02 inches(1067.31mm) diagonal
Outline Dimension973.2(H) x 566.2 (V) x 10.8 mm(B)/23.6(D) (Typ.)
Pixel Pitch0.4845 mm x 0.4845 mm
Pixel Format1920 horiz. by 1080 vert. Pixels, RGB stripe arrangement
Color Depth10bit(D), 1.06Billon colors
Luminance, White450 cd/m2 (Center 1point ,Typ.)
Viewing Angle (CR>10)Viewing angle free ( R/L 178 (Min.), U/D 178 (Min.))
Power Consumption
Weight11.3Kg (Typ.)
Display ModeTransmissive mode, Normally black
Surface TreatmentHard coating(3H), Anti-reflection treatment of the front polarizer (reflectance <2%)
Total 101.52 W (Typ.)
(Logic=10.32 W with T-CON, Backlight=91.2W @ with Driver
Ver. 1.0
3 /46
Global LCD Panel Exchange Center
www.panelook.com
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
www.panelook.com
Storage Humidity
HST1090%RH
StorageHumidity
HST1090%RH
2. Absolute Maximum Ratings
The following items are maximum values which, if exceeded, may cause faulty operation or permanent damage
to the LCD module.
Table 1. ABSOLUTE MAXIMUM RATINGS
LC420EUQ
Product Specification
ParameterSymbol
Power Input Voltage
Driver Control Voltage
T-Con Option Selection VoltageVLOGIC-0.3+4.0VDC
Operating TemperatureTOP0+50
Storage TemperatureTST-20+60
Panel Front Temperature TSUR-+68
Operating Ambient HumidityHOP1090%RH
1. Ambient temperature condition (Ta = 25 ± 2 °C )
2. Temperature and relative humidity range are shown in the figure below.
Wet bulb temperature should be Max 39°C, and no condensation of water.
3. Gravity mura can be guaranteed below 40°C condition.
4. The maximum operating temperatures is based on the test condition that the surface temperature
of display area is less than or equal to 68°C with LCD module alone in a temperature controlled chamber.
Thermal management should be considered in final product design to prevent the surface temperature of
display area from being over 68℃. The range of operating temperature may be degraded in case of
improper thermal management in final product design.
90%
1
2,3
4
2,3
60
60%
40
50
40%
Humidity [(%)RH]
10%
Wet Bulb
Temperature [°C]
30
20
10
0
10203040506070800-20
Dry Bulb Temperature [°C]
Ver. 1.0
Storage
Operation
4 /46
Global LCD Panel Exchange Center
www.panelook.com
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
www.panelook.com
1. The specified current and power consumption are under the V
=12.0V, Ta=25
±
2°C, fV=240Hz
Note
3. Electrical Specifications
3-1. Electrical Characteristics
Table 2. ELECTRICAL CHARACTERISTICS
LC420EUQ
Product Specification
ParameterSymbol
MinTypMax
Circuit :
Power Input VoltageVLCD10.812.013.2VDC
-8601118mA1
Power Input CurrentILCD
-15872063mA2
Power ConsumptionPLCD-10.3214.75Watt1
Rush currentIRUSH-
Value
-
LCD
UnitNote
15A3
condition whereas mosaic pattern(8 x 6) is displayed and fVis the frame frequency.
2. The current is specified at the maximum current pattern.
3. The duration of rush current is about 2ms and rising time of power input is 0.5ms (min.).
White : 1023 Gray
Black : 0 Gray
Mosaic Pattern(8 x 6)
Ver. 1.0
5 /46
Global LCD Panel Exchange Center
www.panelook.com
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
1. Electrical characteristics are determined after the unit has been ‘ON’ and stable for approximately 60
minutes at 25±2°C. The specified current and power consumption are under the typical supply Input voltage
24Vand VBR (ExtVBR-B : 100%), it is total power consumption.
2. The life time(MTTF) is determined as the time which luminance of the LED is 50% compared to that of initial
value at the typical LED current (ExtVBR-B :100%) on condition of continuous operating in LCM state at
25±2°C.
3. LGD recommend that the PWM freq. is synchronized with One time harmonic of V_sync signal of system.
Though PWM frequency is over 120Hz (max 252Hz), function of LED Driver is not affected.
4. The duration of rush current is about 10ms.
5. Even though inrush current is over the specified value, there is no problem if I2T spec of fuse is satisfied.
6. Ext_PWM Signal have to input available duty range.
Between 99% and 100% ExtVBR-B duty have to be avoided. ( 99% < ExtVBR-B < 100%)
But ExtVBR-B 0% and 100% are available.
High
Available duty range
Low
0%
1%
Ver. 1.0
99% 100%Ext_PWM Input Duty
6 /46
Global LCD Panel Exchange Center
www.panelook.com
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
www.panelook.com
11
GND
Ground
37
GND
Ground
Product Specification
3-2. Interface Connections
This LCD module employs one kind of interface connection, 51-pin connector is used for the module
electronics and 14-pin connector is used for the integral backlight system.
FIRST LVDS Receiver Signal (A-)38
FIRST LVDS Receiver Signal (A+)39
FIRST LVDS Receiver Signal (B-)40
FIRST LVDS Receiver Signal (C-)42
FIRST LVDS Receiver Signal (C+)43
Ground44GNDGround
FIRST LVDS Receiver Clock Signal(-)45GNDGround
Ground47NCNo connection
FIRST LVDS Receiver Signal (D-)48VLCDPower Supply +12.0V
FIRST LVDS Receiver Signal (D+)49VLCDPower Supply +12.0V
FIRST LVDS Receiver Signal (E-)50VLCDPower Supply +12.0V
FIRST LVDS Receiver Signal (E+)51VLCDPower Supply +12.0V
R2DN
R2DP
R2EN
R2EP
NC
NC
SECOND LVDS Receiver Signal (D-)
SECOND LVDS Receiver Signal (D+)
SECOND LVDS Receiver Signal (E-)
SECOND LVDS Receiver Signal (E+)
No connection
No connection
1. All GND(ground) pins should be connected together to the LCD module’s metal frame.
2. All VLCD (power input) pins should be connected together.
3. All Input levels of LVDS signals are based on the EIA 644 Standard.
4. Specific pins(pin No. #10) are used for Local Dimming function of the LCD module.
If 3D mode is operated, this pins are necessary ‘L’ status. (Please see the Appendix_ Ⅹ for more information.)
5. LVDS pin (pin No. #24,25,40,41) are used for 10Bit(D) of the LCD module.
6. Specific pins (pin No. #1) are used for selecting 3D/2mode.
7. Specific pins (pin No. #9) are output signal from the LCD module
8. Specific pin (pin No. #2, #3) is used for Controlling MEMC Chip register in the LCM Module.
9. Specific pin (pin No. #8) is reserved for 3D input (Frame Sequential Type) Control. (Please see the
Appendix_ Ⅹ for more information)
Ver. 1.0
7 /46
Global LCD Panel Exchange Center
www.panelook.com
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
www.panelook.com
3-2-2. Backlight Module
Master
-LED Driver Connector :
: 20022WR-14B1(Yeonho) or Equivalent
Notes : 1. GND should be connected to the LCD module’s metal frame.
2. High : on duty / Low : off duty, Pin#13 can be opened. ( if Pin #13 is open , EXTVBR-B is 100% )
3. Normal : Low (Under 0.7V)
Abnormal : High(Over 2.5V)
4. Each impedance of pin #12 and 13 is over 50 [KΩ].
1
◆ Rear view of LCM
PCB
14
…
…
1
<Master>
Ver. 1.0
8 /46
Global LCD Panel Exchange Center
www.panelook.com
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
www.panelook.com
3-3. Signal Timing Specifications
Table 6 shows the signal timing required at the input of the LVDS transmitter. All of the interface signal
timings should be satisfied with the following specification for normal operation.
Table 6. TIMING TABLE (DE Only Mode)
ITEMSymbolMinTypMaxUnitNote
LC420EUQ
Product Specification
Horizontal
Vertical
Frequency
Display
Period
BlanktHB80140400tCLK1
TotaltHP104011001260tCLK
Display
Period
BlanktVB
TotaltVP
ITEMSymbolMinTypMaxUnitNote
DCLKfCLK70.574.2575MHz2Pixel/CLK, 148.5MHz/2
HorizontalfH64.167.569KHz2
VerticalfV
tHV960960960tCLK1920 / 2
tVV108010801080Lines
20
(228)
1100
(1308)
57
(47.5)
45
(270)
1125
(1350)
60
(50)
86
(300)
1166
(1380)
60.6
(50.5)
Lines1
Lines
Hz
NTSC : 57~60.6Hz
(PAL : 47.5~50.5Hz)
2
Note: 1. The input of HSYNC & VSYNC signal does not have an effect on normal operation (DE Only Mode).
If you use spread spectrum of EMI, add some additional clock to minimum value for clock margin.
2. The performance of the electro-optical characteristics may be influenced by variance of the vertical
refresh rate and the horizontal frequency
※ Timing should be set based on clock frequency.
Ver. 1.0
9 /46
Global LCD Panel Exchange Center
www.panelook.com
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
www.panelook.com
Invalid data
3-4. LVDS Signal Specification
3-4-1. LVDS Input Signal Timing Diagram
LC420EUQ
Product Specification
DCLK
First data
Second data
Third data
Forth data
DE(Data Enable)
tCLK
0.5 VDD
Invalid data
Invalid data
Invalid data
DE, Data
Valid data
Pixel 0
Valid data
Pixel 1
Valid data
Pixel 2
Valid data
Pixel 3
Pixel 4
Pixel 5
Pixel 6
Pixel 7
0.7VDD
0.3VDD
Invalid data
Invalid data
Invalid data
Invalid data
DE(Data Enable)
Ver. 1.0
* tHB = tHFP + tWH +tHBP
* tVB = tVFP + tWV +tVBP
11080
tVV
tVP
10 /46
Global LCD Panel Exchange Center
www.panelook.com
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
www.panelook.com
A
3-4-2. LVDS Input Signal Characteristics
1) DC Specification
LVDS -
LVDS +
LC420EUQ
Product Specification
# VCM= {(LVDS +) + ( LVDS -)} /2
0V
V
CM
V
IN _ MAXVIN _ MIN
DescriptionSymbolMinMaxUnitNote
LVDS Common mode VoltageV
LVDS Input Voltage RangeV
CM
IN
1.01.5V-
0.71.8V-
Change in common mode Voltage∆VCM250mV-
2) AC Specification
T
clk
LVDS Clock
LVDS Data
(F
= 1/T
)
clk
A
LVDS 1’st Clock
LVDS 2nd/ 3rd/ 4thClock
tSKEW
t
SKEW_mintSKEW_max
tSKEW
clk
T
clk
80%
20%
t
RF
DescriptionSymbolMinMaxUnitNote
LVDS Differential Voltage
High Threshold
Low Threshold
LVDS Clock to Data Skewt
LVDS Clock/DATA Rising/Falling timet
Effective time of LVDSt
LVDS Clock to Clock Skew (Even to Odd)t
1. All Input levels of LVDS signals are based on the EIA 644 Standard.
Note
2. If tRFisn’t enough, t
. LVDS Differential Voltage is defined within t
3
should be meet the range.
eff
V
TH
V
TL
SKEW
RF
eff
SKEW_EO
Ver. 1.0
100300mV
-300-100mV
|(0.25*T
260|(0.3*T
)/7|ps-
clk
)/7|ps2
clk
|±360|
|1/7* T
clk|
eff
ps-
ps-
3
11 /46
Global LCD Panel Exchange Center
www.panelook.com
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
www.panelook.com
tui : Unit Interval
V+
LC420EUQ
Product Specification
360ps
V+
data
Vcm
Vdata
clk
Vcm
0.5tui
tui
VTH
VTL
360ps
teff
Vclk
Ver. 1.0
12 /46
Global LCD Panel Exchange Center
www.panelook.com
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
www.panelook.com
Yellow
1 1 1 1 1 1 1 1 1 1
1 1 1 1 1 1 1 1 1 1
0 0 0 0 0 0 0 0 0 0
3-5. Color Data Reference
The brightness of each primary color (red, green, blue) is based on the 10bit gray scale data input for the color.
The higher binary input, the brighter the color. Table 7 provides a reference for color versus data input.
1. Please avoid floating state of interface signal at invalid period.
2. When the power supply for LCD (VLCD) is off, be sure to pull down the valid and invalid data to 0V.
3. The T3 / T4 is recommended value, the case when failed to meet a minimum specification,
abnormal display would be shown. There is no reliability problem.
4. If the on time of signals(Interface signal and user control signals) precedes the on time of Power(V
t will be happened abnormal display. When T6 is NC status, T6 doesn’t need to be measured.
i
5. T5 should be measured after the Module has been fully discharged between power off and on
period.
6. It is recommendation specification that T8 has to be 100ms as a minimum value.
7. When the power for LCD (VLCD) is on, be sure to start only in 2D mode.
If it is started in 3Dmode, abnormal display may occur.
Ver. 1.0
),
LCD
14 /46
Loading...
+ 32 hidden pages
You need points to download manuals.
1 point = 1 manual.
You can buy points or you can get point for every manual you upload.