The LC420EUN is a Color Active Matrix Liquid Crystal Display with an integral Light Emitting Diode (LED)
backlight system. The matrix employs a-Si Thin Film Transistor as the active element.
It is a transmissive display type which is operating in the normally black mode. It has a 41.92 inch diagonally
measured active display area with WUXGA resolution (1080 vertical by 1920 horizontal pixel array).
Each pixel is divided into Red, Green and Blue sub-pixels or dots which are arrayed in vertical stripes.
Gray scale or the luminance of the sub-pixel color is determined with a 8-bit gray scale signal for each dot.
Therefore, it can present a palette of more than 16.7Milion colors.
It has been designed to apply the 8-bit 2-port LVDS interface.
It is intended to support LCD TV, PCTV where high brightness, super wide viewing angle, high color gamut,
high color depth and fast response time are important.
LVDS
EEPROM
EPI(RGB)
2Port
LVDS
Select
OPC
Enable
ExtVBR-B
+12.0V
PWM_OUT
1~3
+24.0V, GND, On/Off
CN1
(51pin)
CN2
(4 pin)
LVDS 1,2
Option
signal
I2C
PWM_OUT
1~3
SCL
SDA
Timing Controller
LVDS Rx + OPC + DGA
Integrated
Power Circuit
Block
LED Driver
G1
Control
Signals
G1080
Power Signals
S1S1920
General Features
Active Screen Size41.92 inches(1064.77m) diagonal
Outline Dimension958.0(H) × 559.1(V) X 9.9(B)/17.4 mm(D) (Typ.)
Source Driver Circuit
TFT - LCD Panel
(1920 × RGB × 1080 pixels)
[Gate In Panel]
Scanning Block 1
Scanning Block 2
Scanning Block 3
Pixel Pitch0.4833 mm x 0.4833 mm
Pixel Format1920 horiz. by 1080 vert. Pixels, RGB stripe arrangement
Power ConsumptionTotal 56.1W[Logic= 5.4W, LED Driver=50.7W (ExtVbr_B=100% )]
Weight9.0 Kg
Display ModeTransmissive mode, Normally black
Surface TreatmentHard coating(2H), Anti-glare treatment of the front polarizer (Haze <1%)
Ver. 1.0
4 /40
LC420EUN
Product Specification
2. Absolute Maximum Ratings
The following items are maximum values which, if exceeded, may cause faulty operation or permanent damage
to the LCD module.
Table 1. ABSOLUTE MAXIMUM RATINGS
ParameterSymbol
UnitNote
MinMax
LCD CircuitVLCD-0.3+14.0VDC
Power Input Voltage
DriverVBL-0.3+ 27.0VDC
ON/OFFVOFF / VON-0.3+5.5VDC
Driver Control Voltage
BrightnessEXTVBR-B-0.3+4.0VDC
T-Con Option Selection VoltageVLOGIC-0.3+4.0VDC
Operating TemperatureTOP0+50°C
Storage TemperatureTST-20+60°C
Panel Front Temperature TSUR-+68°C4
Operating Ambient HumidityHOP1090%RH
Storage HumidityHST1090%RH
Value
Note
1. Ambient temperature condition (Ta = 25 ± 2 °C )
2. Temperature and relative humidity range are shown in the figure below.
Wet bulb temperature should be Max 39°C, and no condensation of water.
3. Gravity mura can be guaranteed below 40°C condition.
4. The maximum operating temperatures is based on the test condition that the surface temperature
of display area is less than or equal to 68°C with LCD module alone in a temperature controlled chamber.
Thermal management should be considered in final product design to prevent the surface temperature of
display area from being over 68℃. The range of operating temperature may be degraded in case of
improper thermal management in final product design.
90%
1
2,3
2,3
Ver. 1.0
Wet Bulb
Temperature [°C]
20
10
0
10203040506070800-20
Dry Bulb Temperature [°C]
30
40
50
60
60%
40%
10%
Storage
Operation
Humidity [(%)RH]
5 /40
LC420EUN
Product Specification
3. Electrical Specifications
3-1. Electrical Characteristics
It requires two power inputs. One is employed to power for the LCD circuit. The other Is used for the LED
backlight and LED Driver circuit.
Table 2. ELECTRICAL CHARACTERISTICS
ParameterSymbol
Circuit :
Power Input VoltageVLCD10.812.013.2VDC
Power Input CurrentILCD
Power ConsumptionPLCD5.407.02Watt1
Rush currentIRUSH--5.0A3
ExtV
BR-B
Brightness Adjust for Back Light
ExtV
BR-B
Frequency
Pulse Duty Level
(PWM)
Note
1. The specified current and power consumption are under the V
High Level
Low Level
MinTypMax
-450585mA1
-685890mA2
5-100%
1-100%
4050/6080Hz
2.5-3.6Vdc
0-0.8Vdc
Value
UnitNote
=12.0V, Ta=25 ± 2°C, fV=60Hz
LCD
HIGH : on duty
LOW : off duty
condition, and mosaic pattern(8 x 6) is displayed and fVis the frame frequency.
2. The current is specified at the maximum current pattern.
3. The duration of rush current is about 2ms and rising time of power input is 0.5ms (min.).
4. ExtV
After Driver ON signal is applied, ExtV
After that, ExtV
signal have to input available duty range and sequence.
BR-B
1% and 100% is possible
BR-B
should be sustained from 5% to 100% more than 500ms.
BR-B
For more information, please see 3-6-2. Sequence for LED Driver.
5. Ripple voltage level is recommended under ±5% of typical voltage
On Duty
4
Ver. 1.0
White : 255 Gray
Black : 0 Gray
Mosaic Pattern(8 x 6)
6 /40
Product Specification
Table 3. ELECTRICAL CHARACTERISTICS (Continue)
Values
ParameterSymbol
MinTypMax
LED Driver :
Power Supply Input VoltageVBL22.824.025.2Vdc1
UnitNotes
LC420EUN
Power Supply Input Current IBL
Power Supply Input Current (In-Rush)In-rush--3.6A
Power ConsumptionPBL-
Input Voltage for
Control System
Signals
LED :
Life Time30,00050,000Hrs2
On/Off
OnV on2.5-5.0Vdc
OffV off-0.30.00.7Vdc
-
2.11
50.754.6
2.23
A1
VBL = 22.8V
Ext VBR-B = 100%
3
W1
Notes :
1. Electrical characteristics are determined after the unit has been ‘ON’ and stable for approximately 60
minutes at 25±2°C. The specified current and power consumption are under the typical supply Input voltage
24V and VBR (ExtVBR-B : 100%), it is total power consumption.
2. The life time (MTTF) is determined as the time which luminance of the LED is 50% compared to that of initial
value at the typical LED current (ExtVBR-B :100%) on condition of continuous operating in LCM state at
25±2°C.
3. The duration of rush current is about 200ms. This duration is applied to LED on time.
4. Even though inrush current is over the specified value, there is no problem if I2T spec of fuse is satisfied.
Ver. 1.0
7 /40
LC420EUN
Product Specification
3-2. Interface Connections
This LCD module employs two kinds of interface connection, 51-pin connector is used for the module
electronics and 14-pin connector is used for the integral backlight system.
3-2-1. LCD Module
-LCD Connector(CN1): FI-R51S-HF(manufactured by JAE) or GT05P-51S-H38(manufactured by LSM) or
-IS050-C51B-C39(manufactured by UJU)
- Mating Connector : FI-R51HL(JAE) or compatible
Table 4. MODULE CONNECTOR(CN1) PIN CONFIGURATION
NoSymbolDescriptionNoSymbolDescription
1
2
3
4
5
6
7
8
9
10
11GND
12R1AN
13R1AP
14R1BN
15
16R1CN
17R1CP
18GND
19R1CLKN
20
21GND
22R1DN
23R1DP
24
25
26
NC
NC
NC
NC
NC
NC
LVDS Select
ExtVBR-B
NC
OPC Enable‘H’ = Enable , ‘L’ or NC = Disable
R1BP
R1CLKP
NC
NC
NC or GND
No Connection (Note 4)
No Connection (Note 4)
No Connection (Note 4)
No Connection (Note 4)
No Connection (Note 4)
No Connection (Note 4)
‘H’ =JEIDA , ‘L’ or NC = VESA
External PWM (from System)
No Connection (Note 4)
Ground
FIRST LVDS Receiver Signal (A-)
FIRST LVDS Receiver Signal (A+)
FIRST LVDS Receiver Signal (B-)
FIRST LVDS Receiver Signal (B+)
FIRST LVDS Receiver Signal (C-)
FIRST LVDS Receiver Signal (C+)
Ground
FIRST LVDS Receiver Clock Signal(-)
FIRST LVDS Receiver Clock Signal(+)
Ground
FIRST LVDS Receiver Signal (D-)
FIRST LVDS Receiver Signal (D+)
No Connection
No Connection
No Connection or Ground
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
---
NC
R2AN
R2AP
R2BN
R2BP
R2CN
R2CP
GND
R2CLKN
R2CLKP
GND
R2DN
R2DP
NC
NC
NC or GND
NC or GND
GNDGround
GNDGround
GNDGround
NCNo connection
VLCDPower Supply +12.0V
VLCDPower Supply +12.0V
VLCDPower Supply +12.0V
VLCDPower Supply +12.0V
No Connection
SECOND LVDS Receiver Signal (A-)
SECOND LVDS Receiver Signal (A+)
SECOND LVDS Receiver Signal (B-)
SECOND LVDS Receiver Signal (B+)
SECOND LVDS Receiver Signal (C-)
SECOND LVDS Receiver Signal (C+)
Ground
SECOND LVDS Receiver Clock Signal(-)
SECOND LVDS Receiver Clock Signal(+)
Ground
SECOND LVDS Receiver Signal (D-)
SECOND LVDS Receiver Signal (D+)
No Connection
No Connection
No Connection or Ground
No Connection or Ground
Note
Ver. 1.0
1. All GND(ground) pins should be connected together to the LCD module’s metal frame.
2. All VLCD (power input) pins should be connected together.
3. All Input levels of LVDS signals are based on the EIA 644 Standard.
4. #1~#6 & #9 NC (No Connection): These pins are used only for LGD (Do not connect)
5. Specific pins(pin No. #10) are used for Scanning function of the LCD module.
If not used, these pins are no connection. (Please see the Appendix VI for more information.)
6. Specific pin No. #44 is used for “No signal detection” of system signal interface.
It should be GND for NSB(No Signal Black) during the system interface signal is not.
If this pin is “H”, LCD Module displays AGP(Auto Generation Pattern).
8 /40
Product Specification
3-2-2. Backlight Module
Master
-LED Driver Connector
: 20022WR - H14B2(Yeonho) or compatible
- Mating Connector
: 20022HS - 14B2(Yeonho) or compatible
Table 5. LED DRIVER CONNECTOR PIN CONFIGURATION
Pin NoSymbolDescriptionNote
LC420EUN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
VBLPower Supply +24.0V
VBLPower Supply +24.0V
VBLPower Supply +24.0V
VBLPower Supply +24.0V
VBLPower Supply +24.0V
GNDBacklight Ground
GNDBacklight Ground
GNDBacklight Ground
GNDBacklight Ground
GNDBacklight Ground
Status
ON/OFF
V
NC
NC
Back Light Status
Backlight ON/OFF control
Don’t care
Don’t care
Notes :1. GND should be connected to the LCD module’s metal frame.
2. Normal : Low (under 0.7V) / Abnormal : OPEN
3. Each impedance of pin #12 is over 50 [KΩ] .
1
2
◆ Rear view of LCM
1
Ver. 1.0
…
14
<Master>
PCB
◆ Status
1
14
…
9 /40
LC420EUN
Product Specification
3-3. Signal Timing Specifications
Table 6 shows the signal timing required at the input of the LVDS transmitter. All of the interface signal
timings should be satisfied with the following specification for normal operation.
Table 6. TIMING TABLE (DE Only Mode)
ITEMSymbolMinTypMaxUnitnotes
Horizontal
Vertical
Frequency
Display
Period
BlanktHB100140240tCLK1
TotaltHP106011001200tCLK
Display
Period
BlanktVB
TotaltVP
ITEMSymbolMinTypMaxUnitnotes
DCLKfCLK63.0074.2578.00MHz
HorizontalfH57.367.570KHz2
VerticalfV
tHV960960960tCLK1920 / 2
tVV108010801080Lines
20
(228)
1100
(1308)
57
(47)
45
(270)
1125
(1350)
60
(50)
69
(300)
1149
(1380)
63
(53)
Lines1
Lines
Hz
NTSC
(PAL)
2
notes: 1. The input of HSYNC & VSYNC signal does not have an effect on normal operation (DE Only Mode).
If you use spread spectrum of EMI, add some additional clock to minimum value for clock margin.
2. The performance of the electro-optical characteristics may be influenced by variance of the vertical
refresh rate and the horizontal frequency
※ Timing should be set based on clock frequency.
Ver. 1.0
10 /40
3-4. LVDS Signal Specification
3-4-1. LVDS Input Signal Timing Diagram
LC420EUN
Product Specification
DE, Data
DCLK
First data
Second data
0.7VDD
0.3VDD
tCLK
DE(Data Enable)
0.5 VDD
Invalid data
Invalid data
Valid data
Pixel 0,0Pixel 2,0
Valid data
Pixel 1,0Pixel 3,0
tHP
Invalid data
Invalid data
tHV
DE(Data Enable)
Ver. 1.0
11080
tVV
tVP
11 /40
3-4-2. LVDS Input Signal Characteristics
1) DC Specification
LVDS -
LVDS +
LC420EUN
Product Specification
# VCM= {(LVDS +) + ( LVDS - )} /2
0V
V
CM
V
IN _MAXVIN _MIN
DescriptionSymbolMinMaxUnitNote
LVDS Common mode VoltageV
LVDS Input Voltage RangeV
CM
IN
1.01.5V-
0.71.8V-
Change in common mode VoltageΔVCM-250mV-
2) AC Specification
T
clk
LVDS Clock
A
LVDS Data
( Fclk = 1/Tc lk )
T
clk
A
LVDS 1’st Clock
LVDS 2nd/ 3rd/ 4thClock
tSKEW
tSKEW
t
SKEW_mintSKEW_max
80%
20%
t
RF
DescriptionSymbolMinMaxUnitnotes
V
LVDS Differential Voltage
LVDS Clock to Data Skewt
LVDS Clock/DATA Rising/Falling timet
Effective time of LVDSt
LVDS Clock to Clock Skew (Even to Odd)t
1. All Input levels of LVDS signals are based on the EIA 644 Standard.
notes
2. If tRFisn’t enough, t
should be meet the range.
eff
TH
V
TL
SKEW
RF
eff
SKEW_EO
3. LVDS Differential Voltage is defined within t
Ver. 1.0
100600mV
-600-100mV
-|(0.2*T
260|(0.3*T
|±360|-ps-
-|1/7* T
eff
Tested with Differential Probe
)/7|ps-
clk
)/7|ps2
clk
|ps-
clk
3
12 /40
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