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backlight
system
The
matrix
employs
a-Si
Thin
Film
Transistor
as
the
active
element
g
gppp
Enable
signal
Power Consumption
Total 54.5W(TBD) [Logic= 8W(TBD), LED Driver=46.5W (TBD, ExtVbr_B=100% )]
1. General Description
The LC420EUN is a Color Active Matrix Liquid Crystal Display with an integral Light Emitting Diode (LED)
.
It is a transmissive display type which is operating in the normally black mode. It has a 42.02 inch diagonally
measured active display area with WUXGA resolution (1080 vertical by 1920 horizontal pixel array).
Each pixel is divided into Red, Green and Blue sub-pixels or dots which are arrayed in vertical stripes.
Gray scale or the luminance of the sub-pixel color is determined with a 8-bit gray scale signal for each dot.
Therefore, it can present a palette of more than 16.7Million colors.
It has been designed to apply the 8-bit 2-port LVDS interface.
It is intended to support LCD TV, PCTV where high brightness, super wide viewing angle, high color gamut,
h color depth and fast response time are important.
hi
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LC420EUN
Product Specification
.
LVDS
2Port
LVDS
Select
OPC
ExtV
BR-B
+12.0V
PWM_OUT
1~3
+24.0V, GND, On/Off
CN1
(51pin)
CN2
(8 pin)
LVDS 1,2
Option
I2C
PWM_OUT
1~3
EEPROM
SCL
Timing Controller
LVDS Rx + OPC + DGA
Power Circuit
SDA
Integrated
Block
LED Driver
Mini-LVDS(RGB)
Control
Signals
Power Signals
General Features
Active Screen Size42.02 inches(1067.31mm) diagonal
Outline Dimension
960.4(H) Ý 560.4(V) X 9.9(B)/17.4 mm(D) (Typ.)
Source Driver Circuit
S1S1920
G1
TFT - LCD Panel
(1920 Ý RGB Ý 1080 pixels)
[Gate In Panel]
G1080
Scanning Block 1
Scanning Block 2
Scanning Block 3
Pixel Pitch0.4845 mm x 0.4845 mm
Pixel Format1920 horiz. by 1080 vert. Pixels, RGB stripe arrangement
Surface TreatmentHard coating(2H), Anti-glare treatment of the front polarizer (Haze 10%)
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g
LCDCircuit
V
LCD
0.3
14.0
V
DC
g
p
gp
p
,
10
2. Absolute Maximum Ratings
The following items are maximum values which, if exceeded, may cause faulty operation or permanent damage
to the LCD module.
Table 1. ABSOLUTE MAXIMUM RATINGS
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LC420EUN
Product Specification
ParameterSymbol
Power Input Voltage
Driver Control Voltage
T-Con Option Selection VoltageVLOGIC-0.3+4.0VDC
Operating TemperatureTOP0+50
Stora
e TemperatureTST-20+60
Panel Front Temperature TSUR-+68
Operating Ambient HumidityH
Storage HumidityH
Note
1. Ambient temperature condition (Ta = 25 r 2 ¶C )
DriverV
ON/OFFV
BrightnessEXTVBR-B0.0+3.6VDC
BL-0.3+ 27.0VDC
OFF / VON-0.3+5.5VDC
OP1090%RH
ST1090%RH
Value
MinMax
-
+
UnitNote
¶C
¶C
¶C
2. Temperature and relative humidity range are shown in the figure below.
Wet bulb tem
erature should be Max 39¶C, and no condensation of water.
3. Gravity mura can be guaranteed below 40¶C condition.
4. The maximum operating temperatures is based on the test condition that the surface temperature
of display area is less than or equal to 68¶C with LCD module alone in a temperature controlled chamber.
Thermal management should be considered in final product design to prevent the surface temperature of
display area from being over 68к. The range of operating temperature may be degraded in case of
improper thermal management in final product design.
90%
1
2,3
4
2,3
60
60%
40
50
40%
Humidity [(%)RH]
10%
Wet Bulb
Temperature [
0
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¶C]
30
20
10203040506070800-20
Dry Bulb Temperature [¶C]
Storage
Operation
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3-1. Electrical Ch
y
y
ppp
LCD
V
3. Electrical Specifications
aracteristics
It requires two power inputs. One is employed to power for the LCD circuit. The other Is used for the LED
backlight and LED Driver circuit.
Table 2. ELECTRICAL CHARACTERISTICS
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LC420EUN
Product Specification
ParameterSymbol
Circuit :
Power Input VoltageV
Power Input CurrentILCD
Power ConsumptionP
Rush currentI
Brightness Adjust for Back Light
Note
1. The specified current and power consumption are under the V
LCD10.812.013.2VDC
LCD8.0(TBD)TBDWatt1
RUSH--5.0A3
Ext_PWM
Ext_PWM
Frequency
MinT
-TBDTBDmA 1
-TBDTBDmA 2
5 (TBD)-100%
1 (TBD)-100%
4050HzPAL
Value
pMax
6080HzNTSC
=12.0V, Ta=25 r 2¶C, f
condition, and mosaic pattern(8 x 6) is displayed and fVis the frame frequency.
2. The current is specified at the maximum current pattern.
3. The duration of rush current is about 2ms and rising time of power input is 0.5ms (min.).
4. ExtV
After Driver ON signal is applied, ExtV
After that, ExtV
signal have to input available duty range and sequence.
BR-B
1% and 100% is possible
BR-B
should be sustained from 5% to 100% more than 500ms.
BR-B
For more information, please see 3-6-2. Sequence for LED Driver.
5. Ripple voltage level is recommended under ·5% of typical voltage
UnitNote
4
On duty
=60Hz
White : 255 Gray
Black : 0 Gray
Mosaic Pattern(8 x 6)
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Table 3. ELECTRICAL CHARACTERISTICS (Continue)
ParameterSymbolUnitNotes
LED Driver :
Power Supply Input VoltageVBL22.824.025.2Vdc1
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LC420EUN
Product Specification
Values
MinTypMax
Power Supply Input Current IBL
Power Supply Input Current (In-Rush)In-rush--10(TBD)AExt VBR-B = 100%
Power ConsumptionPBL-
Input Voltage for
Control System
Signals
LED :
Life Time30,000Hrs2
On/Off
OnV on2.5-5.0Vdc
OffV off-0.30.00.7Vdc
1.9(TBD)
-
45.5(TBD) 49.8(TBD)
2.1(TBD)
A1
VBL = 22.8V
3
W1
Notes :
1. Electrical characteristics are determined after the unit has been ‘ON’ and stable for approximately 60
minutes at 25·2¶C. The specified current and power consumption are under the typical supply Input voltage
24V and V
BR (ExtVBR-B : 100%), it is total power consumption.
2. The life time (MTTF) is determined as the time which luminance of the LED is 50% compared to that of initial
value at the typical LED current (ExtVBR-B :100%) on condition of continuous operating in LCM state at
25·2¶C.
3. The duration of rush current is about 200ms. This duration is applied to LED on time.
4. Even though inrush current is over the specified value, there is no problem if I
2
T spec of fuse is satisfied.
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This LCD module employs two kinds of interface connection, 51
pin connector is used for the module
No
Symbol
Description
No
Symbol
Description
8
ExtVBR
B
Ext
PWM (f
)
34
GND
Ground
16
R1CN
FIRST LVDS Receiver Signal (C
)42NC or GND
No Connection or Ground
If not used, these pins are no connection. (Please see the
Appendix VI
for more information.)
3-2. Interface Connections
electronics and 14-pin connector is used for the integral backlight system.
3-2-1. LCD Module
- LCD Connector(CN1): FI-R51S-HF(manufactured by JAE) or compatible
- Mating Connector : FI-R51HL(JAE) or compatible
Table 4. MODULE CONNECTOR(CN1) PIN CONFIGURATION
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Product Specification
-
LC420EUN
1
2
3
4
5
6
7
9
10
11
12
13
14
15
17
18
19
20
21
22
23
24
25
26
NC
NC
NC
NC
NC
NC
LVDS Select
NC
OPC Enable‘H’ = Enable , ‘L’ or NC = Disable
GND
R1AN
R1AP
R1BN
R1BP
R1CP
GND
R1CLKN
R1CLKP
GND
R1DN
R1DP
NC
NC
NC or GND
No Connection (Note 4)
No Connection (Note 4)
No Connection (Note 4)
No Connection (Note 4)
No Connection (Note 4)
No Connection (Note 4)
ಫHಬ =JEIDA , ಫLಬ or NC = VESA
-
ernal
No Connection (Note 4)
Ground
FIRST LVDS Receiver Signal (A-)
FIRST LVDS Receiver Signal (A+)
FIRST LVDS Receiver Signal (B-)
FIRST LVDS Receiver Signal (B+)
FIRST LVDS Receiver Signal (C+)
Ground
FIRST LVDS Receiver Clock Signal(-)
FIRST LVDS Receiver Clock Signal(+)
Ground
FIRST LVDS Receiver Signal (D-)
FIRST LVDS Receiver Signal (D+)
No Connection
No Connection
No Connection or Ground
SECOND LVDS Receiver Signal (A+)
SECOND LVDS Receiver Signal (B-)
SECOND LVDS Receiver Signal (B+)
SECOND LVDS Receiver Signal (C-)
SECOND LVDS Receiver Signal (C+)
SECOND LVDS Receiver Clock Signal(-)
SECOND LVDS Receiver Clock Signal(+)
Ground
SECOND LVDS Receiver Signal (D-)
SECOND LVDS Receiver Signal (D+)
No Connection
No Connection
No Connection or Ground
Note
1. All GND(ground) pins should be connected together to the LCD module’s metal frame.
2. All V
LCD (power input) pins should be connected together.
3. All Input levels of LVDS signals are based on the EIA 644 Standard.
4. #1~#6 & #9 NC (No Connection): These pins are used only for LGD (Do not connect)
5. Specific pins(pin No. #10) are used for Scanning function of the LCD module.
6. Specific pin No. #44 is used for “No signal detection” of system signal interface.
It should be GND for NSB(No Signal Black) during the system interface signal is not.
If this pin is “H”, LCD Module displays AGP(Auto Generation Pattern).
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Mast
Pin No
Symbol
Description
Note
6
GND
3-2-2. Backlight Module
er
-LED Driver Connector
: 20022WR - H14B2(Yeonho) or Equivalent
- Mating Connector
: 20022HS - 14B2(Yeonho) or Equivalent
Table 5. LED DRIVER CONNECTOR PIN CONFIGURATION
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LC420EUN
Product Specification
1
2
3
4
5
7
8
9
10
11
12
13
14
VBLPower Supply +24.0V
VBLPower Supply +24.0V
VBLPower Supply +24.0V
VBLPower Supply +24.0V
VBLPower Supply +24.0V
Backlight Ground
GND
GND
GND
GND
Status
ON/OFF
V
NC
NC
Backlight Ground
Backlight Ground
Backlight Ground
Backlight Ground
Back Light Status
Backlight ON/OFF control
Don’t care
Don’t care
Notes :1. GND should be connected to the LCD module’s metal frame.
2. Normal : Low (under 0.7V) / Abnormal : OPEN
3. Each impedance of pin #12 is over TBD [K] .
1
2
◆ Rear view
of LCM
PCB
1
14
…
1
14
…
<Master>
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Horizontal
fH57.3
67.570KHz
2
If
EMI
dditi
3-3. Signal Timing Specifications
Table 6 shows the signal timing required at the input of the LVDS transmitter. All of the interface signal
timings should be satisfied with the following specification for normal operation.
Table 6. TIMING TABLE (DE Only Mode)
ITEMSymbolMinTypMaxUnitNote
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LC420EUN
Product Specification
Horizontal
Vertical
Frequency
Display
Period
Blankt
TotaltHP106011001200tCLK
Display
Period
Blankt
TotaltVP
ITEMSymbolMinTypMaxUnitNote
DCLKfCLK63.0074.2578.00MHz
VerticalfV
t
HV960960960tCLK1920 / 2
HB100140240tCLK1
t
VV108010801080Lines
VB
20
(228)
1100
(1308)
57
(47)
45
(270)
1125
(1350)
60
(50)
69
(300)
1149
(1380)
63
(53)
Lines1
Lines
Hz
NTSC : 57~63Hz
(PAL : 47~53Hz)
2
Note: 1. The input of HSYNC & VSYNC signal does not have an effect on normal operation (DE Only Mode).
you use spread spectrum of
, add some a
onal clock to minimum value for clock margin.
2. The performance of the electro-optical characteristics may be influenced by variance of the vertical
refresh rate and the horizontal frequency
ϡ Timing should be set based on clock frequency.
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0.5VDD
Valid data
t
3-4. LVDS Signal Specification
3-4-1. LVDS Input Signal Timing Diagram
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LC420EUN
Product Specification
DE, Data
DCLK
First data
Second data
0.7VDD
0.3VDD
tCLK
Invalid data
Invalid data
DE(Data Enable)
Valid data
Pixel 0,0Pixel 2,0
Pixel 1,0Pixel 3,0
tHP
Invalid data
Invalid data
tHV
DE(Data Enable)
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11080
VV
tVP
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1) DC S
ificati
# V
{(LVDS+)
(
LVDS-)}/
2
2) AC Specification
A
Effecti
LVDS
t
|·360|
3-4-2. LVDS Input Signal Characteristics
pec
on
LVDS -
LVDS +
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LC420EUN
Product Specification
V
CM
=
0V
CM
+
V
IN _MAXVIN _MIN
DescriptionSymbolMinMaxUnitNote
LVDS Common mode VoltageV
LVDS Input Voltage RangeV
CM
IN
1.01.5V-
0.71.8V-
Change in common mode VoltageVCM-250mV-
T
clk
LVDS Clock
A
LVDS Data
(F
= 1/T
)
clk
LVDS 1’st Clock
LVDS 2nd/ 3rd/ 4thClock
tSKEW
t
SKEW_mintSKEW_max
tSKEW
clk
T
clk
80%
20%
t
RF
DescriptionSymbolMinMaxUnitNote
High Threshold
LVDS Differential Voltage
Low Threshold
LVDS Clock to Data Skewt
LVDS Clock/DATA Rising/Falling timet
ve time of
LVDS Clock to Clock Skew (Even to Odd)t
Note
1. All Input levels of LVDS signals are based on the EIA 644 Standard.
2. If t
isn’t enough, t
RF
should be meet the range.
eff
3. LVDS Differential Voltage is defined within t
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V
TH
V
TL
SKEW
RF
eff
SKEW_EO
100300mV
-300-100mV
-|(0.25*T
260|(0.3*T
)/7|ps-
clk
)/7|ps2
clk
-ps-
-|1/7* T
eff
|ps-
clk
3
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