LG Display LC320DXN-SEU1 Specification
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LC320DXN
Product Specification
SPECIFICATION
FOR
APPROVAL
Title 32.0” WXGA TFT LCD
BUYER GENERAL
MODEL
APPROVED BY
/
/
SIGNATURE
DATE
SUPPLIER LG Display Co., Ltd.
*MODEL LC320DXN
SUFFIX SEU1
*When you obtain standard approval,
please use the above model name without suffix
APPROVED BY
J.Y.JEONG / Team Leader
REVIEWED BY
S.W. KWAG/ Project Leader
SIGNATURE
DATE
PREPARED BY
/
Please return 1 copy for your confirmation with
your signature and comments.
Ver. 0.0
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D.S.KIM / Engineer
TV Product Development Dept.
LG Display Co., Ltd
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LC320DXN
Product Specification
CONTENTS
Number ITEM
COVER
CONTENTS
RECORD OF REVISIONS
1 GENERAL DESCRIPTION
2 ABSOLUTE MAXIMUM RATINGS
3 ELECTRICAL SPECIFICATIONS
3-1 ELECTRICAL CHARACTERISTICS
3-2 INTERFACE CONNECTIONS
3-3 SIGNAL TIMING SPECIFICATIONS
3-4 LVDS SIGNAL SPECIFICATIONS
3-5 COLOR DATA REFERENCE
3-6 POWER SEQUENCE
4 OPTICAL SPECIFICATIONS
Page
1
2
3
4
5
6
6
8
10
11
14
15
17
5 MECHANICAL CHARACTERISTICS
6 RELIABILITY
7 INTERNATIONAL STANDARDS
7-1 SAFETY
7-2 EMC
7-3 ENVIRONMENT
8 PACKING
8-1 DESIGNATION OF LOT MARK
8-2 PACKING FORM
9 PRECAUTIONS
9-1 MOUNTING PRECAUTIONS
9-2 OPERATING PRECAUTIONS
9-3 ELECTROSTATIC DISCHARGE CONTROL
9-4 PRECAUTIONS FOR STRONG LIGHT EXPOSURE
9-5 STORAGE
23
26
27
27
27
27
28
28
28
29
29
29
30
30
30
9-6 HANDLING PRECAUTIONS FOR PROTECTION FILM
9-7 OPERATING GONDITION GUIDE
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Product Specification
RECORD OF REVISIONS
Revision No. Revision Date Page Description
0.0 Sep. 20, 2011 - Preliminary Specification (First Draft)
LC320DXN
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LC320DXN
Product Specification
1. General Description
The LC320DXN is a Color Active Matrix Liquid Crystal Display with an integral Light Emitting Diode (LED)
backlight system. The matrix employs a-Si Thin Film Transistor as the active element.
It is a transmissive display type which is operating in the normally black mode. It has a 31.51 inch diagonally
measured active display area with WXGA resolution (768 vertical by 1366 horizontal pixel array).
Each pixel is divided into Red, Green and Blue sub-pixels or dots which are arranged in Horizontal stripes.
Gray scale or the luminance of the sub-pixel color is determined with a 8-bit gray scale signal for each dot,
thus presenting a palette of more than 16.7M(6bit + A-FRC) colors.
It has been designed to apply the 8-bit 1-port LVDS interface.
It is intended to support LCD TV, PCTV where high brightness, super wide viewing angle, high color gamut,
high color depth and fast response time are important.
EEPROM
SDA
LVDS Select
LVDS 1Port
+12.0V
#9
CN1
(30pin)
SCL
Timing Controller
[LVDS Rx]
Power Circuit
Power Signals
+24.0V, GND, On/off
Ext VBR-B
Block
LED Driver
General Features
Active Screen Size 31.51 inches(800.4mm) diagonal
Control
Signals
RGB
Source Driver Circuit
S1 S1366
G1
TFT - LCD Panel
(1366 Ý 768 x RGB pixels)
[Gate In Panel]
G768
Back light Assembly
Outline Dimension 760.0 X 450.0 X 32.5(B) (Typ.)
Pixel Pitch 510.75༁ x 510.75༁ x R,G,B
Pixel Format 1366 horiz. by 768 vert. pixels RGB stripe arrangement
Color Depth 8bit(D), 16,7 M colors
Luminance, White 300 cd/m2(Center 1 point) (Typ.)
Viewing Angle (CR>10) Viewing angle free ( R/L 178(Min.), U/D 178(Min.))
Power Consumption Total 45.98 Watt (Logic=4.08 W , LED Driver =38.9W @ [ExtVbr_B=100%] )
Weight 4.8kg(Typ)
Display Operating Mode Transmissive mode, normally black
Surface Treatment Hard coating(2H), Anti-glare treatment of the front polarizer (Haze 1%)
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LC320DXN
Product Specification
2. Absolute Maximum Ratings
The following items are maximum values which, if exceeded, may cause faulty operation or permanent damage
to the LCD module.
Table 1. ABSOLUTE MAXIMUM RATINGS
Parameter Symbol
Power Input Voltage
Driver Control Voltage
T-Con Option Selection Voltage VLOGIC -0.3 +4.0 VDC
Operating Temperature TOP 0 +50 ¶C
Storage Temperature TST -20 +60 ¶C
Panel Front Temperature TSUR - +68 ¶C 4
Operating Ambient Humidity HOP 10 90 %RH
Storage Humidity HST 10 90 %RH
Note
1. Ambient temperature condition (Ta = 25 r 2 ¶C )
LCD Circuit VLCD -0.3 +14.0 VDC
Driver VBL -0.3 + 27.0 VDC
ON/OFF VOFF / VON -0.3 +5.5 VDC
Brightness EXTVBR-B 0.0 +5.5 VDC
Value
Unit Note
Min Max
2. Temperature and relative humidity range are shown in the figure below.
Wet bulb temperature should be Max 39¶C, and no condensation of water.
3. Gravity mura can be guaranteed below 40¶C condition.
4. The maximum operating temperatures is based on the test condition that the surface temperature
of display area is less than or equal to 68¶C with LCD module alone in a temperature controlled chamber.
Thermal management should be considered in final product design to prevent the surface temperature of
display area from being over 68. The range of operating temperature may be degraded in case of
improper thermal management in final product design.
1
2,3
2,3
90%
60
60%
Ver. 0.0
Wet Bulb
Temperature [
10
0
10 20 30 40 50 60 70 800-20
Dry Bulb Temperature [
¶C]
20
50
40
40%
30
Humidity [(%)RH]
10%
¶C]
Storage
Operation
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LC320DXN
Product Specification
3. Electrical Specifications
3-1. Electrical Characteristics
It requires two power inputs. One is employed to power for the LCD circuit. The other Is used for the LED
backlight and LED Driver circuit.
Table 2. ELECTRICAL CHARACTERISTICS
Value
Parameter Symbol
Min Typ Max
Circuit :
Unit Note
Power Input Voltage V
LCD
10.8 12.0 13.2 V
- 340 445 mA 1
Power Input Current I
Power Consumption P
Rush current I
Note
1. The specified current and power consumption are under the V
condition, and mosaic pattern(8 x 6) is displayed and f
LCD
LCD
RUSH
- 430 560 mA 2
- 4.08 5.30 Watt 1
- - 3.0 A 3
=12.0V, Ta=25 r 2¶C, fV=60Hz
LCD
is the frame frequency.
V
2. The current is specified at the maximum current pattern.
3. The duration of rush current is about 2ms and rising time of power input is 0.5ms (min.).
4. Ripple voltage level is recommended under ·5% of typical voltage
White : 255 Gray
Black : 0 Gray
DC
Mosaic Pattern(8 x 6)
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Product Specification
Table 3. ELECTRICAL CHARACTERISTICS (Continue)
LC320DXN
Parameter Symbol
Min Typ Max
LED Driver :
Power Supply Input Voltage VBL 22.8 24.0 25.2 Vdc 1
Power Supply Input Current IBL_A
Power Supply Input Current (In-Rush) Irush - -
Power Consumption PBL -
On/Off
Brightness Adjust ExtV
ExtVBR-B Frequency
On V on 2.5 - 5.0 Vdc
Off V off -0.3 0.0 0.7 Vdc
BR-B
PAL 100 Hz 3
NTSC 120 Hz 3
-
5
(TBD)
1
(TBD)
Values
1.6
(TBD)
38.9
(TBD)
- 100
- 100
1.7
(TBD)
6
(TBD)
41.2
(TBD)
Unit Notes
AExt V
A
WExt V
%
BR-B = 100%
BL = 22.8V
V
Ext V
BR-B = 100%
BR-B = 100%
On Duty
4
6
ExtVBR-B Level
High Level 2.5 - 5.0
Low Level 0.0 - 0.7
LED :
Life Time 30,000 50,000 Hrs 2
Vdc
Vdc
HIGH : on duty
LOW : off duty
Notes :
1. Electrical characteristics are determined after the unit has been ‘ON’ and stable for approximately 60
minutes at 25·2¶C. The specified current and power consumption are under the typical supply Input voltage
24Vand V
BR (ExtVBR-B : 100%), it is total power consumption.
2. The life time (MTTF) is determined as the time which luminance of the LED is 50% compared to that of initial
value at the typical LED current (ExtVBR-B :100%) on condition of continuous operating in LCM state at
25·2¶C.
3. LGD recommend that the PWM freq. is synchronized with One time harmonic of V_sync signal of system.
Though PWM frequency is over 120Hz (max 252Hz), function of LED Driver is not affected.
4. The duration of rush current is about 200ms. This duration is applied to LED on time.
2
5. Even though inrush current is over the specified value, there is no problem if I
6. ExtV
After Driver ON signal is applied, ExtV
After that, ExtV
signal have to input available duty range and sequence.
BR-B
1% and 100% is possible
BR-B
should be sustained from 5% to 100% more than 500ms.
BR-B
T spec of fuse is satisfied.
For more information, please see 3-6-2. Sequence for LED Driver.
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Product Specification
3-2. Interface Connections
This LCD module employs two kinds of interface connection, a 30-pin connector is used for the module
electronics and 14-pin connector is used for the integral backlight system.
3-2-1. LCD Module
- LCD Connector(CN1) : KDF71G-30S-1H(Hirose) or FI-X30SSL-HF(JAE)
- Mating Connector : : FI-X30C2L (Manufactured by JAE) or Equivalentb
Table 4. MODULE CONNECTOR(CN1) PIN CONFIGURATION
Pin No. Symbol Description Note
1 VLCD Power Supply +12.0V
2 VLCD Power Supply +12.0V
3 VLCD Power Supply +12.0V
4 VLCD Power Supply +12.0V
5 GND Ground
6 GND Ground
7 GND Ground
8 GND Ground
9
10
11 GND Ground
12 RA- LVDS Receiver Signal(-)
13 RA+ LVDS Receiver Signal(+)
14 GND Ground
15 RB- LVDS Receiver Signal(-)
16 RB+ LVDS Receiver Signal(+)
17 GND Ground
18 RC- LVDS Receiver Signal(-)
19 RC+ LVDS Receiver Signal(+)
20 GND Ground
21 RCLK- LVDS Receiver Clock Signal(-)
22 RCLK+ LVDS Receiver Clock Signal(+)
23 GND Ground
24 RD- LVDS Receiver Signal(-)
25 RD+ LVDS Receiver Signal(+)
26 GND Ground
27
28
29
30 GND Ground
LVDS Select ‘H’ =JEIDA , ‘L’ or NC = VESA
uj
uj
uj
uj
No Connection
No Connection
No Connection
No Connection 4
Appendix IV
LC320DXN
4
4
4
Notes :
1. All GND (Ground) pins should be connected together to the LCD module’s metal frame.
2. All VLCD (power input) pins should be connected together.
3. All Input levels of LVDS signals are based on the EIA 644 Standard.
4. These pins are used only for LGD (Do not connect)
5. Specific pin No. #30 is used for “No signal detection” of system signal interface.
It should be GND for NSB (No Signal Black) while the system interface signal is not.
If this pin is “H”, LCD Module displays AGP (Auto Generation Pattern).
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Product Specification
3-2-2. Backlight Module
Master
-LED Driver Connector
: 20022WR - H14B2(Yeonho)
-.Mating Connector
: 20022HS - 14B2 or compatible
Table 5. LED DRIVER CONNECTOR PIN CONFIGURATION
Pin No Symbol Description Note
LC320DXN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
VBL Power Supply +24.0V
VBL Power Supply +24.0V
VBL Power Supply +24.0V
VBL Power Supply +24.0V
VBL Power Supply +24.0V
GND Backlight Ground
GND Backlight Ground
GND Backlight Ground
GND Backlight Ground
GND Backlight Ground
Status
ON/OFF
V
NC
EXTVBR-B
Back Light Status
Backlight ON/OFF control
Don’t care
External PWM
1
2
Notes : 1. GND should be connected to the LCD module’s metal frame.
2. Normal : Low (under 0.7V) / Abnormal : open
3. High : on duty / Low : off duty, Pin#14 can be opened. ( if Pin #14 is open , EXTVBR-B is 100% )
4. Each impedance of pin #12 and 14 is over 50 [K˟] .
ଝ Rear view of LCM
ଝ Status
PCB
1
14
…
1
14
…
<Master>
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LC320DXN
Product Specification
3-3. Signal Timing Specifications
Table 6 shows the signal timing required at the input of the LVDS transmitter. All of the interface signal
timings should be satisfied with the following specification for normal operation.
ITEM Symbol Min Typ Max Unit Note
Horizontal
Vertical
Frequency
Display
Period
Blank t
Total t
Display
Period
Blank tVB
Total t
ITEM Symbol Min Typ Max Unit Note
DCLK f
Horizontal f
Vertical f
HV - 1366 - tclk
t
HB 90 162 410 tclk
HP 1456 1528 1776 tclk
VV - 768 - tHP
t
20
(126)
VP
CLK 63.0 72.4 80.0 MHz
H 45 47.4 55 KHz 2
V
788
(894)
57
(47)
22
(180)
790
(948)
60
(50)
240
(295)
1008
(1063)
63
(53)
t
HP 1
t
HP
NTSC :
Hz
57~63Hz
47~53Hz)
2
(PAL :
Note: 1. The input of HSYNC & VSYNC signal does not have an effect on normal operation (DE Only Mode).
If you use spread spectrum of EMI, add some additional clock to minimum value for clock margin.
2. The performance of the electro-optical characteristics may be influenced by variance of the vertical
refresh rate and the horizontal frequency
Timing should be set based on clock frequency.
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3-4. Signal Timing Waveforms
3-4-1. LVDS Input Signal Timing Diagram
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LC320DXN
Product Specification
DCLK
1366
tCLK
DE(Data Enable)
0.5 Vcc
Invalid data
DE, Data
Valid data
1
0.7VDD
tHV
0.3VDD
1366
Invalid data
DE(Data Enable)
768
tHT
1 768
tVV
tVT
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3-4-2. LVDS Input Signal Characteristics
1) DC Specification
LVDS -
LVDS +
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LC320DXN
Product Specification
0V
#VCM= {( LVDS +) + ( LVDS - )}/ 2
V
CM
V
IN _MAXVIN _MIN
Description Symbol Min Max Unit Note
LVDS Common mode Voltage V
LVDS Input Voltage Range V
CM
IN
1.0 1.5 V -
0.7 1.8 V -
Change in common mode Voltage ȟVCM - 250 mV -
2) AC Specification
T
clk
LVDS Clock
A
LVDS Data
(F
=1/T
)
clk
A
LVDS 1’st Clock
tSKEW
tSKEW
clk
T
clk
80%
LVDS 2nd/ 3rd/ 4thClock
t
SKEW_mintSKEW_max
Description Symbol Min Max Unit Note
High Threshold
LVDS Differential Voltage
Low Threshold
LVDS Clock to Data Skew t
LVDS Clock/DATA Rising/Falling time t
Effective time of LVDS t
LVDS Clock to Clock Skew (Even to Odd) t
Note
1. All Input levels of LVDS signals are based on the EIA 644 Standard.
2. If t
isn’t enough, t
RF
should be meet the range.
eff
3. LVDS Differential Voltage is defined within t
Ver. 0.0
V
TH
V
TL
SKEW
RF
eff
SKEW_EO
100 300 mV
-300 -100 mV
- |(0.20*T
260 |(0.3*T
)/7| ps -
clk
)/7| ps 2
clk
|·360| - ps -
- |1/7* T
eff
|ps -
clk
20%
t
RF
3
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