LENOVO Yoga 530-14ARR Schematics
A
1 1
B
C
D
E
LCFC Confidential
NM_B781 MB Schematics Document
2 2
AMD Raven Ridge with DDR4
2017-11
REV:1.0
3 3
4 4
Title
Title
Security Cl assification
Security Cl assification
Security Cl assification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF LC FUTURE CENTER.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF LC FUTURE CENTER.
C
2015/08/20
2015/08/20
2015/08/20
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
D
2016/08/20
2016/08/20
2016/08/20
Title
Cover Page
Cover Page
Cover Page
Size Document Number Re v
Size Document Number Re v
Size Document Number Re v
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
Friday, March 23, 2018
Friday, March 23, 2018
Friday, March 23, 2018
YOGA530-ARR
YOGA530-ARR
YOGA530-ARR
E
1 48
1 48
1 48
1.0
1.0
1.0
A
LCFC confidential
B
C
D
E
DDR4 Channel A
1.2V 2400 MT/s
1 1
NGFF
PEIe GFX[3:0]
NGFF
PEIe GPP[0]
SSD1
Page 4
WLAN&BT
Page 4
HDMI Conn.
2 2
Page 34
eDP Conn
Page 33
PCI-Express
4x Gen3
e x1
PCI
USB2.0-Port3
HDMI (DDI 1)
eDP x2 Lane(DP0)
AMD Raven Ridge
USB3.0
USB2.0
DDR4 Channel B
1.2V 2400 MT/s
Port1
Charger
TI SN1702001
port1
port2
Port2
Port0
Port0
Redriver
PS8713
DDR4-SO-DIMM X1
BANK 0, 1
UP TO 16G
Page 14~5
DDR4-SO-DIMM X1
BANK 0, 1
UP TO 16G
Left USB3.0 Conn
Type-C
Realtek RTS5448
Right USB3.0 Conn
e 41
Pag
Page 15~5
Type-C Conn
Page 43
Page 42
IO Board
Touch Screen
Page 33
SPK Conn.
Page 30
Realtek
HP&Mic
Combo Conn.
DMIC
Page 30
Page 33
3 3
ALC3 240
I2C Bus
HD Audio
Page 30
DMIC Board
BGA-1140
35mm*25mm
Page 3~16
USB2.0-Port5
SPI
I2C Bus
Port4
USB HUB
GL850G
SPI ROM (8MB)
W25Q64FWS SIQ
Touch Pad
RTS5 146
Page 45
C/R
Page 31
Page 07
SD Conn.
Int. Camera Conn.
Finger Print
Page 33
Page 45
I2CLPC
SMBUS
SMBUS
e 44
Pag
Thermistor
Page 25
G-Sensor
I2C x1
Redriver
NTSX2102
I2C x1
G-Sensor Board
4 4
edriver
R
NTSX2102
Page 36
G-Sensor
Page 36
EC SH I2C
HALL Sensor x2
AH9247
EC
ITE IT8396-VFBGA
Int.KBD
Page 45
Battery
Charger
Page 53
Page 54
Thermal Sensor
NCT7718W
Page 25
Sub-board
IO SUB
DMIC SUB
G Sensor SUB
IO Board
Title
Title
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C
2015/08/20
2015/08/20
2015/08/20
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
D
2016/08/20
2016/08/20
2016/08/20
Title
Block Diagram
Block Diagram
Block Diagram
Size Document Number Re v
Size Document Number Re v
Size Document Number Re v
Custom
Custom
Custom
Date : Sheet of
Date: Sheet of
Date: Sheet of
Friday, March 23, 2018
Friday, March 23, 2018
Friday, March 23, 2018
YOGA530-ARR
YOGA530-ARR
YOGA530-ARR
E
2 48
2 48
2 48
1.0
1.0
1.0
A
Voltage Rails
ower
plane
1 1
State
S0
S3
S5 S4/AC
S5 S4/ Battery only
2 2
S5 S4/AC & Battery
don't exist
( O --> Means ON , X --> Means OFF )
V20B+
+3VL
+5VLP
O
O
O
O
X
+5VALW
+3VALW
(
+3VALW_A PU)
+1.8VALW
+0.9VALW
+1.2V
O
O
O
X
O
X
X
X X X
+5VS
3VS
+
+1.8VS
+0.9VSp
+
0.6VS
2.5VS
+
+VDDC_VD D
+
VDDCR_SO C
SMBUS Control Table
SOURCE
EC_SMB_C K0
EC_SMB_D A0
EC_SMB_C K1
EC_SMB_D A1
EC_SMB_C K2
EC_SMB_D A2
EC_SMB_C K3
EC_SMB_D A3
3 3
EC_SMB_C K4
EC_SMB_D A4
IT8396
+3VS
IT8396
+3VL
IT8396
+3VL
IT8396
+3VS
IT8396
+3VS
X
X
V X
X X X
IT8396 APUThermal
X X
X
WLANSODIMMBATTGSENSOR
X
X
X
X
XX
X X
X X V
OO
X
X
X
Sensor
XX
V
+3VS
X
B
SID/SIC
C
STATE
S0 (Full ON)
S1 (Power On Suspend)
S3 (Suspend to RAM)
S4 (Suspend to Disk)
S5 (Soft OFF)
SIGNAL
SLP_S3# SLP_S 5# +V ALW +V +VS Clock
ON
ON
ON
ON
ON
ONONON ON
ON
OFF
OFF
HIGH HIGH
HIGHHIGH
HIGHLOW
LOW
LOW
LOW LOW
ON
OFF
OFF
OFF
LOW
OFF
OFF
OFF
Port List
HSIO Port
0
1
2
PP
G
GFX
Charger
V
X
X
PMIC
USB3 .0
X
XV VX
V
X
USB2 .0
3
4
5
6
7
0
1
2
3
4
5
6
7
0
1
2
3
4
0
1
2
3
4
5
evice
D
WLAN
N/A
N/A
N/A
N/A
N/A
SATA SSD
N
/A
GPU
N/A
RIGHT USB 3.0
LEFT USB 3.0
TYPE-C
N/A
N/A
RIGHT USB 2.0
LEFT USB 2.0
TYPE-C
BT
Card Reader
USB HUB(Camera,FP)
D
BOM Structure Table
@
ME@
EMC@
EMC_ NS@
RF@
RF_N S@
TS@
NTS@
SFH@
ECSH@
SATA@
PCIE@
BL@
NOKB L@
Rev@
USB_HUB@
HDT@
LST@
FP@
NFP@
FPEM C@
YOGA@
530S@
8396@
E
BTO ItemBOM Structure
Not stuff
Connect or
EMC Part
EMC reserve Part
RF Part
RF reserve Part
Touch Screen Part
Non-Touch Screen Part
AMD sensor fusion hub part
EC sensor fusion hub part
Reserve SATA Part
PCIE SSD Part
Keyboard backlight part
Non-Keyboard backlight part
Discharge part
USB HUB part
HDT Debug part
Level Shift part
Finger Print part
Non-Finger Print part
Finger Print EMC part
Yoga feature part
530S feature part
8396 feature part
XXXX X
X
X
VRAM
HDMI@
HDMI Logo
SOURCE
I2C0_CK APU
I2C0_DA
I2C1_CK
C1_DA
I2
I2C2_CK
4 4
I2C2_DA
I2C3_CK
I2C3_DA
VDD_ 18_ S5
VDD_ 18_ S5
APU
VDD _33
VDD_ 33_ S5
A
APU
APU
V
X
X X
TS WLANSODIMMTPIT8396
X
X
V
X
XX
X
X
X
X
X
V V
X X
V
B
EC SM Bus1 address
Device
Battery
Charger
Address
?
0001 0010 b
APU SM Bus address
DDR4 SO-DIMM
WLAN
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE S ECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE S ECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE S ECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CE NTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CE NTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CE NTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF LC FUTURE CENTER.
C
AddressDevice
?
RSVD
2013/08/15
2013/08/15
2013/08/15
EC SM Bus2 address
Device Address
PMIC
Thermal Sensor
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
D
0X34
1001_100xb (rese rve)
2013/08/15
2013/08/15
2013/08/15
EC SM Bus3 address
Device
GPU
APU SB-TSI
Title
Title
Title
Notes List
Notes List
Notes List
Size
Size
Size
Document Number Re v
Document Number Re v
Document Number Re v
C
C
C
Date: Sheet o f
Date: Sheet o f
Date: Sheet o f
Address
0x41(def ault)
releate to F3x1E4[SbiAddr] or
Address Select Pins setting
Friday, March 23, 2018
Friday, March 23, 2018
Friday, March 23, 2018
YOGA530-ARR
YOGA530-ARR
YOGA530-ARR
E
3 48
3 48
3 48
1.0
1.0
1.0
5
4
3
2
1
UC2B
M.2 SSD1
PCIE_CRX_DTX_P026
D D
C C
WLAN WLAN
B B
S
PCIE_CRX_DTX_N026
PCIE_CRX_DTX_P126
PCIE_CRX_DTX_N126
PCIE_CRX_DTX_P226
PCIE_CRX_DTX_N226
PCIE_CRX_DTX_P326
PCIE_CRX_DTX_N326
PCIE_PRX_DTX_P029
PCIE_PRX_DTX_N029 PCIE_PTX_C_DRX_N0 29
SATA_PRX_DTX_P024
ATA
SATA_PRX_DTX_N024
PCIE_CRX_DTX_P0
PCIE_CRX_DTX_N0
PCIE_CRX_DTX_P1
PCIE_CRX_DTX_N1
PCIE_CRX_DTX_P2
PCIE_CRX_DTX_N2
PCIE_CRX_DTX_P3
PCIE_CRX_DTX_N3
PCIE_PRX_DTX_P0
PCIE_PRX_DTX_N0
SATA_PRX_DTX_P0
SATA_PRX_DTX_N0 SATA_PTX_DRX_N0
P8
P_GFX_RXP0
P9
P_GFX_RXN0
N6
P_GFX_RXP1
N7
P_GFX_RXN1
M8
P_GFX_RXP2
M9
P_GFX_RXN2
L6
P_GFX_RXP3
L7
P_GFX_RXN3
K11
P_GFX_RXP4
J11
P_GFX_RXN4
H6
P_GFX_RXP5
H7
P_GFX_RXN5
G6
P_GFX_RXP6
F7
P_GFX_RXN6
G8
P_GFX_RXP7
F8
P_GFX_RXN7
N10
P_GPP_RXP0
N9
P_GPP_RXN0
L10
P_GPP_RXP1
L9
P_GPP_RXN1
L12
P_GPP_RXP2
M11
P_GPP_RXN2
P12
P_GPP_RXP3
P11
P_GPP_RXN3
V6
P_GPP_RXP4
V7
P_GPP_RXN4
T8
P_GPP_RXP5
T9
P_GPP_RXN5
R6
P_GPP_RXP6/SATA_RXP0
R7
P_GPP_RXN6/SATA_RXN0
R9
P_GPP_RXP7/SATA_RXP1
R10
P_GPP_RXN7/SATA_RXN1
@
PCIE
FP5 REV 0.90
PART 2 OF 13
P_GFX_TXP0
P_GFX_TXN0
P_GFX_TXP1
P_GFX_TXN1
P_GFX_TXP2
P_GFX_TXN2
P_GFX_TXP3
P_GFX_TXN3
P_GFX_TXP4
P_GFX_TXN4
P_GFX_TXP5
P_GFX_TXN5
P_GFX_TXP6
P_GFX_TXN6
P_GFX_TXP7
P_GFX_TXN7
P_GPP_TXP0
P_GPP_TXN0
P_GPP_TXP1
P_GPP_TXN1
P_GPP_TXP2
P_GPP_TXN2
P_GPP_TXP3
P_GPP_TXN3
P_GPP_TXP4
P_GPP_TXN4
P_GPP_TXP5
P_GPP_TXN5
P_GPP_TXP6/SATA_TXP0
P_GPP_TXN6/SATA_TXN0
P_GPP_TXP7/SATA_TXP1
P_GPP_TXN7/SATA_TXN1
AMD-RAVEN-FP5_BGA1140
PCIE_CTX_DRX_P0
N1
PCIE_CTX_DRX_N0
N3
PCIE_CTX_DRX_P1
M2
PCIE_CTX_DRX_N1
M4
PCIE_CTX_DRX_P2
L2
PCIE_CTX_DRX_N2
L4
PCIE_CTX_DRX_P3
L1
PCIE_CTX_DRX_N3
L3
K2
K4
J2
J4
H1
H3
H2
H4
PCIE_PTX_DRX_P0
N2
PCIE_PTX_DRX_N0
P3
P4
P2
R3
R1
T4
T2
W2
W4
W3
V2
SATA_PTX_DRX_P0
V1
V3
U2
U4
PCIE_CTX_DRX_P0 26
PCIE_CTX_DRX_N0 26
PCIE_CTX_DRX_P1 26
PCIE_CTX_DRX_N1 26
PCIE_CTX_DRX_P2 26
PCIE_CTX_DRX_N2 26
PCIE_CTX_DRX_P3 26
PCIE_CTX_DRX_N3 26
1 2
1 2
CC10.1U_0201_6.3V6-K
CC20.1U_0201_6.3V6-K
SATA_PTX_DRX_P0 24
SATA_PTX_DRX_N0 24
M.2 SSD1
PCIE_PTX_C_DRX_P0
PCIE_PTX_C_DRX_N0
PCIE_PTX_C_DRX_P0 29
A A
5
4
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
2013/08/15
2013/08/15
2013/08/15
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
3
2013/08/15
2013/08/15
2013/08/15
2
Titl e
Titl e
Titl e
FP5 (PCIE SATA I/F)
FP5 (PCIE SATA I/F)
FP5 (PCIE SATA I/F)
Size
Size
Size
Document N umber Re v
Document N umber Re v
Document N umber Re v
Custom
Custom
Custom
Friday, March 23, 2018
Friday, March 23, 2018
Dat e: Sheet o f
Dat e: Sheet o f
Dat e: Sheet o f
Friday, March 23, 2018
YOGA530-ARR
YOGA530-ARR
YOGA530-ARR
1
4 48
4 48
4 48
1.0
1.0
1.0
5
DDRA_MA_DM[0..7] 14
DDR_A_DQS#[0..7] 14
DDR_A_DQS[0..7] 14
DDR_A_D[0..63] 14
DDR_A_MA[0..13] 14
DDRA_MA_DM0
DDRA_MA_DM1
DDRA_MA_DM2
DDRA_MA_DM3
DDRA_MA_DM4
DDRA_MA_DM5
DDRA_MA_DM6
DDRA_MA_DM7
DDR_A_CS0#
DDR_A_CS1#
DDR_A_ODT0
DDR_A_ODT1
DDR_A_ALERT_N
DDR_A_EVENT#
DDR4_A_DRAMRST#
DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13
DDR_A_WE#
DDR_A_CAS#
DDR_A_RAS#
DDR_A_BA0
DDR_A_BA1
DDR_A_BG0
DDR_A_BG1
DDR_A_ACT_N
DDR_A_DQS0
DDR_A_DQS#0
DDR_A_DQS1
DDR_A_DQS#1
DDR_A_DQS2
DDR_A_DQS#2
DDR_A_DQS3
DDR_A_DQS#3
DDR_A_DQS4
DDR_A_DQS#4
DDR_A_DQS5
DDR_A_DQS#5
DDR_A_DQS6
DDR_A_DQS#6
DDR_A_DQS7
DDR_A_DQS#7
SA_CLK_DDR0
SA_CLK_DDR#0
SA_CLK_DDR1
SA_CLK_DDR#1
DDR_A_CKE0
DDR_A_CKE1
D D
DDR_A_WE#14
DDR_A_CAS#14
DDR_A_RAS#14
DDR_A_BA014
DDR_A_BA114
DDR_A_BG014
DDR_A_BG114
DDR_A_ACT_N14
C C
SA_CLK_DDR014
SA_CLK_DDR#014
SA_CLK_DDR114
SA_CLK_DDR#114
DDR_A_CS0#14
B B
DDR_A_CS1#14
DDR_A_CKE014
DDR_A_CKE114
DDR_A_ODT014
DDR_A_ODT114
DDR_A_ALERT_N14
DDR_A_EVENT#14
DDR4_A_DRAMRST#14
UC2A
AF25
MA_ADD0/MAB_CS0
AE23
MA_ADD1/RSVD
AD27
MA_ADD2/RSVD
AE21
MA_ADD3/RSVD
AC24
MA_ADD4/RSVD
AC26
MA_ADD5/RSVD
AD21
MA_ADD6/RSVD
AC27
MA_ADD7/MAA_CA3
AD22
MA_ADD8/MAA_CA4
AC21
MA_ADD9/MAA_CKE1
AF22
MA_ADD10/MAB_CKE0
AA24
MA_ADD11/MAA_CA5
AC23
MA_ADD12/MAA_CA2
AJ25
MA_ADD13_BANK2/RSVD
AG27
MA_WE_L_ADD14/MAB_CA2
AG23
MA_CAS_L_ADD15/MAB_CA4
AG26
MA_RAS_L_ADD16/MAB_CA3
AF21
MA_BANK0/MAB_CS1
AF27
MA_BANK1/MAB_CA0
AA21
MA_BG0/MAA_CS1
AA27
MA_BG1/MAA_CKE0
AA22
MA_ACT_L/MAA_CS0
F21
MA_DM0/MAA_DM1
G27
MA_DM1/MAA_DM0
N24
MA_DM2/MAA_DM2
N23
MA_DM3/MAA_DM3
AL24
MA_DM4/MAB_DM2
AN27
MA_DM5/MAB_DM3
AW25
MA_DM6/MAB_DM1
AT21
MA_DM7/MAB_DM0
T27
RSVD_36
F22
MA_DQS_H0/MAA_DQS_H1
G22
MA_DQS_L0/MAA_DQS_L1
H27
MA_DQS_H1/MAA_DQS_H0
H26
MA_DQS_L1/MAA_DQS_L0
N27
MA_DQS_H2/MAA_DQS_H2
N26
MA_DQS_L2/MAA_DQS_L2
R21
MA_DQS_H3/MAA_DQS_H3
P21
MA_DQS_L3/MAA_DQS_L3
AM26
MA_DQS_H4/MAB_DQS_H2
AM27
MA_DQS_L4/MAB_DQS_L2
AN24
MA_DQS_H5/MAB_DQS_H3
AN25
MA_DQS_L5/MAB_DQS_L3
AU23
MA_DQS_H6/MAB_DQS_H1
AT23
MA_DQS_L6/MAB_DQS_L1
AV20
MA_DQS_H7/MAB_DQS_H0
AW20
MA_DQS_L7/MAB_DQS_L0
V24
RSVD_41
V23
RSVD_40
AD25
MA_CLK_H0/MAA_CKT
AD24
MA_CLK_L0/MAA_CKC
AE26
MA_CLK_H1/MAB_CKT
AE27
MA_CLK_L1/MAB_CKC
AG21
MA_CS_L0/MAB_CKE1
AJ27
MA_CS_L1/RSVD
Y23
MA_CKE0/MAA_CA0
Y26
MA_CKE1/MAA_CA1
AG24
MA_ODT0/MAB_CA5
AJ22
MA_ODT1/RSVD
AA25
MA_ALERT_L/MA_TEST
AE24
MA_EVENT_L
Y24
MA_RESET_L
@
FP5 REV 0.90
PART 1 OF 13
MEMORY A
MA_DATA0/MAA_DATA8
MA_DATA1/MAA_DATA9
MA_DATA2/MAA_DATA13
MA_DATA3/MAA_DATA12
MA_DATA4/MAA_DATA11
MA_DATA5/MAA_DATA10
MA_DATA6/MAA_DATA15
MA_DATA7/MAA_DATA14
MA_DATA8/MAA_DATA0
MA_DATA9/MAA_DATA1
MA_DATA10/MAA_DATA5
MA_DATA11/MAA_DATA4
MA_DATA12/MAA_DATA7
MA_DATA13/MAA_DATA6
MA_DATA14/MAA_DATA2
MA_DATA15/MAA_DATA3
MA_DATA16/MAA_DATA17
MA_DATA17/MAA_DATA16
MA_DATA18/MAA_DATA23
MA_DATA19/MAA_DATA20
MA_DATA20/MAA_DATA19
MA_DATA21/MAA_DATA18
MA_DATA22/MAA_DATA21
MA_DATA23/MAA_DATA22
MA_DATA24/MAA_DATA30
MA_DATA25/MAA_DATA31
MA_DATA26/MAA_DATA26
MA_DATA27/MAA_DATA27
MA_DATA28/MAA_DATA28
MA_DATA29/MAA_DATA29
MA_DATA30/MAA_DATA24
MA_DATA31/MAA_DATA25
MA_DATA32/MAB_DATA16
MA_DATA33/MAB_DATA17
MA_DATA34/MAB_DATA22
MA_DATA35/MAB_DATA20
MA_DATA36/MAB_DATA19
MA_DATA37/MAB_DATA18
MA_DATA38/MAB_DATA23
MA_DATA39/MAB_DATA21
MA_DATA40/MAB_DATA30
MA_DATA41/MAB_DATA31
MA_DATA42/MAB_DATA26
MA_DATA43/MAB_DATA27
MA_DATA44/MAB_DATA28
MA_DATA45/MAB_DATA29
MA_DATA46/MAB_DATA24
MA_DATA47/MAB_DATA25
MA_DATA48/MAB_DATA11
MA_DATA49/MAB_DATA10
MA_DATA50/MAB_DATA15
MA_DATA51/MAB_DATA14
MA_DATA52/MAB_DATA12
MA_DATA53/MAB_DATA13
MA_DATA54/MAB_DATA9
MA_DATA55/MAB_DATA8
MA_DATA56/MAB_DATA5
MA_DATA57/MAB_DATA6
MA_DATA58/MAB_DATA2
MA_DATA59/MAB_DATA3
MA_DATA60/MAB_DATA7
MA_DATA61/MAB_DATA4
MA_DATA62/MAB_DATA1
MA_DATA63/MAB_DATA0
AMD-RAVEN-FP5_BGA1140
MA_PAROUT/MAB_CA1
SO-DIMM1
RSVD_34
RSVD_35
RSVD_51
RSVD_52
RSVD_27
RSVD_28
RSVD_43
RSVD_42
4
DDR_A_D0
J21
DDR_A_D1
H21
DDR_A_D2
F23
DDR_A_D3
H23
DDR_A_D4
G20
DDR_A_D5
F20
DDR_A_D6
J22
DDR_A_D7
J23
DDR_A_D8
G25
DDR_A_D9
F26
DDR_A_D10
L24
DDR_A_D11
L26
DDR_A_D12
L23
DDR_A_D13
F25
DDR_A_D14
K25
DDR_A_D15
K27
DDR_A_D16
M25
DDR_A_D17
M27
DDR_A_D18
P27
DDR_A_D19
R24
DDR_A_D20
L27
DDR_A_D21
M24
DDR_A_D22
P24
DDR_A_D23
P25
DDR_A_D24
M22
DDR_A_D25
N21
DDR_A_D26
T22
DDR_A_D27
V21
DDR_A_D28
L21
DDR_A_D29
M20
DDR_A_D30
R23
DDR_A_D31
T21
DDR_A_D32
AL27
DDR_A_D33
AL25
DDR_A_D34
AP26
DDR_A_D35
AR27
DDR_A_D36
AK26
DDR_A_D37
AK24
DDR_A_D38
AM24
DDR_A_D39
AP27
DDR_A_D40
AM23
DDR_A_D41
AM21
DDR_A_D42
AR25
DDR_A_D43
AU27
DDR_A_D44
AL22
DDR_A_D45
AL21
DDR_A_D46
AP24
DDR_A_D47
AP23
DDR_A_D48
AW26
DDR_A_D49
AV25
DDR_A_D50
AV22
DDR_A_D51
AW22
DDR_A_D52
AU26
DDR_A_D53
AV27
DDR_A_D54
AW23
DDR_A_D55
AT22
DDR_A_D56
AW21
DDR_A_D57
AU21
DDR_A_D58
AP21
DDR_A_D59
AN20
DDR_A_D60
AR22
DDR_A_D61
AN22
DDR_A_D62
AT20
DDR_A_D63
AR20
T24
T25
W25
W27
R26
R27
V27
V26
DDR_A_PARITY
AF24
DDR_A_PARITY 14
3
DDRB_MB_DM[0..7] 15
DDR_B_DQS#[0..7] 15
DDR_B_DQS[0..7] 15
DDR_B_D[0..63] 15
DDR_B_MA[0..13] 15
DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8
DDR_B_MA9
DDR_B_MA10
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13
DDR_B_WE#15
DDR_B_CAS#15
DDR_B_RAS#15
DDR_B_BA015
DDR_B_BA115
DDR_B_BG015
DDR_B_BG115
DDR_B_ACT_N15
SB_CLK_DDR015
SB_CLK_DDR#015
SB_CLK_DDR115
SB_CLK_DDR#115
DDR_B_CS0#15
DDR_B_CS1#15
DDR_B_CKE015
DDR_B_CKE115
DDR_B_ODT015
DDR_B_ODT115
DDR_B_ALERT_N15
DDR_B_EVENT#15
DDR4_B_DRAMRST#15
DDR_B_WE#
DDR_B_CAS#
DDR_B_RAS#
DDR_B_BA0
DDR_B_BA1
DDR_B_BG0
DDR_B_BG1
DDR_B_ACT_N
DDRB_MB_DM0
DDRB_MB_DM1
DDRB_MB_DM2
DDRB_MB_DM3
DDRB_MB_DM4
DDRB_MB_DM5
DDRB_MB_DM6
DDRB_MB_DM7
DDR_B_DQS0
DDR_B_DQS#0
DDR_B_DQS1
DDR_B_DQS#1
DDR_B_DQS2
DDR_B_DQS#2
DDR_B_DQS3
DDR_B_DQS#3
DDR_B_DQS4
DDR_B_DQS#4
DDR_B_DQS5
DDR_B_DQS#5
DDR_B_DQS6
DDR_B_DQS#6
DDR_B_DQS7
DDR_B_DQS#7
SB_CLK_DDR0
SB_CLK_DDR#0
SB_CLK_DDR1
SB_CLK_DDR#1
DDR_B_CS0#
DDR_B_CS1#
DDR_B_CKE0
DDR_B_CKE1
DDR_B_ODT0
DDR_B_ODT1
DDR_B_ALERT_N
DDR_B_EVENT#
DDR4_B_DRAMRST#
UC2I
AG30
MB_ADD0/MBB_CS0
AC32
MB_ADD1/RSVD
AC30
MB_ADD2/RSVD
AB29
MB_ADD3/RSVD
AB31
MB_ADD4/RSVD
AA30
MB_ADD5/RSVD
AA29
MB_ADD6/RSVD
Y30
MB_ADD7/MBA_CA3
AA31
MB_ADD8/MBA_CA4
W29
MB_ADD9/MBA_CKE1
AH29
MB_ADD10/MBB_CKE0
Y32
MB_ADD11/MBA_CA5
W31
MB_ADD12/MBA_CA2
AL30
MB_ADD13_BANK2/RSVD
AK30
MB_WE_L_ADD14/MBB_CA2
AK32
MB_CAS_L_ADD15/MBB_CA4
AJ30
MB_RAS_L_ADD16/MBB_CA3
AH31
MB_BANK0/MBB_CS1
AG32
MB_BANK1/MBB_CA0
V31
MB_BG0/MBA_CS1
V29
MB_BG1/MBA_CKE0
V30
MB_ACT_L/MBA_CS0
C21
MB_DM0/MBA_DM1
C25
MB_DM1/MBA_DM0
E32
MB_DM2/MBA_DM2
K30
MB_DM3/MBA_DM3
AP30
MB_DM4/MBB_DM2
AW31
MB_DM5/MBB_DM3
BB26
MB_DM6/MBB_DM1
BD22
MB_DM7/MBB_DM0
N32
RSVD_21
D22
MB_DQS_H0/MBA_DQS_H1
B22
MB_DQS_L0/MBA_DQS_L1
D25
MB_DQS_H1/MBA_DQS_H0
B25
MB_DQS_L1/MBA_DQS_L0
F29
MB_DQS_H2/MBA_DQS_H2
F30
MB_DQS_L2/MBA_DQS_L2
K31
MB_DQS_H3/MBA_DQS_H3
K29
MB_DQS_L3/MBA_DQS_L3
AR29
MB_DQS_H4/MBB_DQS_H2
AR31
MB_DQS_L4/MBB_DQS_L2
AW30
MB_DQS_H5/MBB_DQS_H3
AW29
MB_DQS_L5/MBB_DQS_L3
BC25
MB_DQS_H6/MBB_DQS_H1
BA25
MB_DQS_L6/MBB_DQS_L1
BC22
MB_DQS_H7/MBB_DQS_H0
BA22
MB_DQS_L7/MBB_DQS_L0
N31
RSVD_20
N29
RSVD_18
AC31
MB_CLK_H0/MBA_CKT
AD30
MB_CLK_L0/MBA_CKC
AD29
MB_CLK_H1/MBB_CKT
AD31
MB_CLK_L1/MBB_CKC
AE30
RSVD_89
AE32
RSVD_90
AF29
RSVD_91
AF31
RSVD_92
AJ31
MB_CS_L0/MBB_CKE1
AM31
MB_CS_L1/RSVD
AJ29
RSVD_95
AM29
RSVD_97
U29
MB_CKE0/MBA_CA0
T30
MB_CKE1/MBA_CA1
V32
RSVD_93
U31
RSVD_94
AL31
MB_ODT0/MBB_CA5
AM32
MB_ODT1/RSVD
AL29
RSVD_96
AM30
RSVD_98
W30
MB_ALERT_L/MB_TEST
AG29
MB_EVENT_L
T31
MB_RESET_L
@
2
FP5 REV 0.90
PART 9 OF 13
MEMORY B
MB_DATA0/MBA_DATA8
MB_DATA1/MBA_DATA9
MB_DATA2/MBA_DATA13
MB_DATA3/MBA_DATA12
MB_DATA4/MBA_DATA11
MB_DATA5/MBA_DATA10
MB_DATA6/MBA_DATA15
MB_DATA7/MBA_DATA14
MB_DATA8/MBA_DATA0
MB_DATA9/MBA_DATA1
MB_DATA10/MBA_DATA5
MB_DATA11/MBA_DATA4
MB_DATA12/MBA_DATA7
MB_DATA13/MBA_DATA6
MB_DATA14/MBA_DATA2
MB_DATA15/MBA_DATA3
MB_DATA16/MBA_DATA19
MB_DATA17/MBA_DATA18
MB_DATA18/MBA_DATA22
MB_DATA19/MBA_DATA23
MB_DATA20/MBA_DATA20
MB_DATA21/MBA_DATA21
MB_DATA22/MBA_DATA17
MB_DATA23/MBA_DATA16
MB_DATA24/MBA_DATA30
MB_DATA25/MBA_DATA31
MB_DATA26/MBA_DATA26
MB_DATA27/MBA_DATA27
MB_DATA28/MBA_DATA28
MB_DATA29/MBA_DATA29
MB_DATA30/MBA_DATA25
MB_DATA31/MBA_DATA24
MB_DATA32/MBB_DATA16
MB_DATA33/MBB_DATA17
MB_DATA34/MBB_DATA21
MB_DATA35/MBB_DATA20
MB_DATA36/MBB_DATA19
MB_DATA37/MBB_DATA18
MB_DATA38/MBB_DATA23
MB_DATA39/MBB_DATA22
MB_DATA40/MBB_DATA24
MB_DATA41/MBB_DATA25
MB_DATA42/MBB_DATA29
MB_DATA43/MBB_DATA28
MB_DATA44/MBB_DATA31
MB_DATA45/MBB_DATA30
MB_DATA46/MBB_DATA26
MB_DATA47/MBB_DATA27
MB_DATA48/MBB_DATA11
MB_DATA49/MBB_DATA10
MB_DATA50/MBB_DATA14
MB_DATA51/MBB_DATA15
MB_DATA52/MBB_DATA12
MB_DATA53/MBB_DATA13
MB_DATA54/MBB_DATA9
MB_DATA55/MBB_DATA8
MB_DATA56/MBB_DATA6
MB_DATA57/MBB_DATA7
MB_DATA58/MBB_DATA2
MB_DATA59/MBB_DATA3
MB_DATA60/MBB_DATA4
MB_DATA61/MBB_DATA5
MB_DATA62/MBB_DATA1
MB_DATA63/MBB_DATA0
MB_PAROUT/MBB_CA1
AMD-RAVEN-FP5_BGA1140
RSVD_17
RSVD_19
RSVD_26
RSVD_29
RSVD_16
RSVD_15
RSVD_25
RSVD_24
DDR_B_D0
B21
DDR_B_D1
D21
DDR_B_D2
B23
DDR_B_D3
D23
DDR_B_D4
A20
DDR_B_D5
C20
DDR_B_D6
A22
DDR_B_D7
C22
DDR_B_D8
D24
DDR_B_D9
A25
DDR_B_D10
D27
DDR_B_D11
C27
DDR_B_D12
C23
DDR_B_D13
B24
DDR_B_D14
C26
DDR_B_D15
B27
DDR_B_D16
C30
DDR_B_D17
E29
DDR_B_D18
H29
DDR_B_D19
H31
DDR_B_D20
A28
DDR_B_D21
D28
DDR_B_D22
F31
DDR_B_D23
G30
DDR_B_D24
J29
DDR_B_D25
J31
DDR_B_D26
L29
DDR_B_D27
L31
DDR_B_D28
H30
DDR_B_D29
H32
DDR_B_D30
L30
DDR_B_D31
L32
DDR_B_D32
AP29
DDR_B_D33
AP32
DDR_B_D34
AT29
DDR_B_D35
AU32
DDR_B_D36
AN30
DDR_B_D37
AP31
DDR_B_D38
AR30
DDR_B_D39
AT31
DDR_B_D40
AU29
DDR_B_D41
AV30
DDR_B_D42
BB30
DDR_B_D43
BA28
DDR_B_D44
AU30
DDR_B_D45
AU31
DDR_B_D46
AY32
DDR_B_D47
AY29
DDR_B_D48
BA27
DDR_B_D49
BC27
DDR_B_D50
BA24
DDR_B_D51
BC24
DDR_B_D52
BD28
DDR_B_D53
BB27
DDR_B_D54
BB25
DDR_B_D55
BD25
DDR_B_D56
BC23
DDR_B_D57
BB22
DDR_B_D58
BC21
DDR_B_D59
BD20
DDR_B_D60
BB23
DDR_B_D61
BA23
DDR_B_D62
BB21
DDR_B_D63
BA21
M31
N30
P31
R32
M30
M29
P30
P29
DDR_B_PARITY
AG31
1
DDR_B_PARITY 15
SO-DIMM2
A A
Title
Title
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE C USTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE C USTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE C USTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTU RE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTU RE CENTER.
5
4
3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTU RE CENTER.
2013/08/15
2013/08/15
2013/08/15
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2013/08/15
2013/08/15
2013/08/15
Title
FP5 (MEM)
FP5 (MEM)
FP5 (MEM)
Size
Size
Size
Document Number Re v
Document Number Re v
Document Number Re v
Custom
Custom
Custom
Date : Sheet of
Date : Sheet of
Date : Sheet of
Friday, March 23, 2018
Friday, March 23, 2018
Friday, March 23, 2018
1
YOGA530-ARR
YOGA530-ARR
YOGA530-ARR
5 48
5 48
5 48
1.0
1.0
1.0
5
4
3
2
1
G1
+3VALW
G1
G1
+3VALW
G
G
@
+3VALW
@
G
@
1 2
D1
S1
1 2
D1
S1
1 2
D1
S1
+3VS_APU
+3VS_APU
RC71
10K_0402_5%
G2
D
QC8A
S
DMN5L06DWK-7_SOT363-6
1 2
RC205 0_0402_5%@
+3VS_APU
RC73
10K_0402_5%
@
G2
@
D
QC9A
S
DMN5L06DWK-7_SOT363-6
1 2
RC206 0_0402_5%@
+3VS_APU
@
RC75
10K_0402_5%
G
G2
@
D
QC10A
S
DMN5L06DWK-7_SOT363-6
1 2
RC207 0_0402_5%@
2013/08/15
2013/08/15
2013/08/15
+1.8VS
RC3237
39.2_0402_1%
@
1 2
APU_TEST31
APU_TEST31
M_TEST CONNECTION TBD
RC3131
39.2_0402_1%
@
1 2
RC70 change to 470Ω f or 530S LG Panel i ssue
12
RC70
4.7K_0402_5%
PCH_EDP_PWM 22
D2S2
D
G
QC8B
S
DMN5L06DWK-7_SOT363-6
12
RC74
4.7K_0402_5%
@
D2S2
D
G
QC9B
S
DMN5L06DWK-7_SOT363-6
RC77
2.2K_0402_5%
1 2
D2S2
D
QC10B
S
DMN5L06DWK-7_SOT363-6
Title
Title
Title
FP5 (DP/JTAG/SIV2/MISC)
FP5 (DP/JTAG/SIV2/MISC)
FP5 (DP/JTAG/SIV2/MISC)
Size
Size
Size
Custom
Custom
Custom
Date: Sheet o f
Date: Sheet o f
Date: Sheet o f
PCH_ENVDD 22
PCH_ENBKL 22,33
Document Number Re v
Document Number Re v
Document Number Re v
Friday, March 23, 2018
Friday, March 23, 2018
Friday, March 23, 2018
+1.8VS
RC3101
1K_0402_5%
1 2
DP_STEREOSYNC
RC3102
1K_0402_5%
@
1 2
YOGA530-ARR
YOGA530-ARR
YOGA530-ARR
1
6 48
6 48
6 48
1.0
1.0
1.0
APU_EDP_TX0+22
+1.8VS
12
RC18
D D
C C
B B
300_0402_5%
APU_RST#
PLACE CC16 CAPS CLOSE TO APU,CRB reserve 27pf
1
CC16
56P_0201_50V8-J
2
@
+1.8VS
12
RC19
300_0402_5%
APU_PWROK
PLACE CC17 CAPS CLOSE TO APU,CRB reserve 27pf
1
CC17
56P_0201_50V8-J
2
@
+3VS_APU
RPC8
1 4
2 3
1K_0404_4P2R_5%
RPC51
1 4
2 3
1K_0404_4P2R_5%
+3VS_APU
1 2
RC22 1K_0402_1%
@
1 2
CC20 0.1U_0201_6.3V6-K
@
1 2
CC23 0.1U_0201_6.3V6-K
APU_SIC
APU_SID
APU_PROCHOT#_R
ALERT#
APU_THERMTRIP#
APU_THERMTRIP#
APU_PROCHOT#_R
APU_THERMTRIP#33
eDP
HDMI
EC_SMB_CK033
EC_SMB_DA033
H_PROCHOT#33,44
APU_SVC47
APU_SVD47
APU_SVT47
1
2
@
APU_EDP_TX0-22
APU_EDP_TX1+22
APU_EDP_TX1-22 APU_EDP_AUX 22
APU_HDMI_TX2+23
APU_HDMI_TX2-23
APU_HDMI_TX1+23
APU_HDMI_TX1-23
APU_HDMI_TX0+23
APU_HDMI_TX0-23
APU_HDMI_CLK+23
APU_HDMI_CLK-23
APU_PWROK47
1 2
RC3129 0_0402_5%@
1 2
RC3130 0_0402_5%@
1 2
RC31 0_0402_5%@
1 2
RC213 0_0402_5%@
1 2
RC215 0_0402_5%@
1 2
RC279 0_0402_5%@
APU_SVC APU_SVD
CC1281
1000P_0201_50V7-K
1
CC1283
1000P_0201_50V7-K
2
@
APU_EDP_TX0+
APU_EDP_TX0-
APU_EDP_TX1+
APU_EDP_TX1-
APU_HDMI_TX2+
APU_HDMI_TX2-
APU_HDMI_TX1+
APU_HDMI_TX1-
APU_HDMI_TX0+
APU_HDMI_TX0-
APU_HDMI_CLK+
APU_HDMI_CLK-
APU_TDI
APU_TDO
APU_TCK
APU_TMS
APU_TRST#
APU_DBREQ#
APU_RST#
APU_PWROK
APU_SIC
APU_SID
ALERT#
APU_THERMTRIP#
APU_PROCHOT#_R
APU_SVC_RA
APU_SVD_RA
APU_SVT_RA
APU_SVT
1
CC214
1000P_0201_50V7-K
2
@
AU2
AU4
AU1
AU3
AV3
AW3
AW4
AW2
H14
AP16
L19
F16
H16
C8
A8
D8
B8
B6
C7
C6
D6
E6
D5
E1
C1
F3
E4
F4
F2
J14
J15
J16
DP0_TXP0
DP0_TXN0
DP0_TXP1
DP0_TXN1
DP0_TXP2
DP0_TXN2
DP0_TXP3
DP0_TXN3
DP1_TXP0
DP1_TXN0
DP1_TXP1
DP1_TXN1
DP1_TXP2
DP1_TXN2
DP1_TXP3
DP1_TXN3
TDI
TDO
TCK
TMS
TRST_L
DBREQ_L
RESET_L
PWROK
SIC
SID
ALERT_L
THERMTRIP_L
PROCHOT_L
SVC0
SVD0
SVT0
@
DISPLAY/SVI2/JTAG/TEST
DP_STEREOSYNC
TEST31/RSVD
VDDP_SENSE
VDDCR_SOC_SENSE
VDDCR_SENSE
VSS_SENSE_A
FP5 REV 0.90
VSS_SENSE_B
PART 3 OF 13
AMD-RAVEN-FP5_BGA1140
DP_BLON
DP_DIGON
DP_VARY_BL
DP0_AUXP
DP0_AUXN
DP0_HPD
DP1_AUXP
DP1_AUXN
DP1_HPD
DP2_AUXP
DP2_AUXN
DP2_HPD
DP3_AUXP
DP3_AUXN
DP3_HPD
RSVD_4
RSVD_3
RSVD_2
TEST4
TEST5
TEST6
TEST14
TEST15
TEST16
TEST17
TEST41
TEST470
TEST471
SMU_ZVDD
CORETYPE
DP_ENBKL
G15
DP_ENVDD
F15
DP_EDP_PWM
L14
APU_EDP_AUX
D9
APU_EDP_AUX#
B9
APU_EDP_HPD
C10
APU_DDC_CLK
G11
APU_DDC_DATA
F11
APU_HDMI_HPD
G13
J12
H12
K13
J10
H10
K8
DP_STEREOSYNC
K15
F14
F12
F10
AP14
TEST4
AN14
TEST5
F13
APU_TEST14
G18
APU_TEST15
H19
APU_TEST16
F18
APU_TEST17
F19
APU_TEST31
W24
AR11
AJ21
TEST470
AK21
TEST471
SMU_ZVDDP
V4
AW11
CORETYPE
APU_VDDP_RUN_FB_H
AN11
VDDCR_SOC_VCC_SENSE
J19
VDDCR_VCC_SENSE
K18
VDDCR_VSS_SENSE
J18
VSS_SENSEB
AM11
12
12
12
12
1 2
eDP
HDMI
+1.8VS
+0.9VS
+3VALW_APU
12
APU_EDP_AUX# 22
APU_EDP_HPD 22
APU_DDC_CLK 23
APU_DDC_DATA 23
APU_HDMI_HPD 23
1
TC34@
1
TC33@
1
TC32@
1
TC204@
1
TC205@
1
TC206@
RC57 10K_0402_5%@
RC60 10K_0402_5%@
RC61 10K_0402_5%@
RC62 10K_0402_5%@
1
TC24@
1
TC23@
1
TC22@
1
TC21@
RC3 196_0402_1%
RC3113 1K_0402_5%@
1
TC35@
1
TC40@
UC2C
APU_DDC_CLK
APU_DDC_DATA
APU_EDP_HPD
VDDCR_SOC_VCC_SENSE 47
VDDCR_VCC_SENSE 47
VDDCR_VSS_SENSE 47
With HDT+ Header
+1.8VALW
RC7
1K_0402_5%
1 2
APU_TRST#
A A
5
2
CC84
0.01U_0201_10V6K
1
1 2
RC76 33_0402_5%HDT@
1 8
2 7
RPC17
10K_0804_8P4R_5%
HDT@
3 6
4 5
APU_TRST#_R
JHDT1
@
1
1
2
3
3
4
5
5
6
7
7
8
9
9
10
11
11
12
13
13
14
15
15
16
17
17
18
19
19
20
SAMTE_ASP-136446-07-B
2
4
6
8
10
12
14
16
RC273 33_0402_5%HDT@
18
20
4
APU_TCK
APU_TMS
APU_TDI
APU_TDO
APU_PWROK_BUF
APU_RST#_BUF
APU_DBRDY
1 2
APU_PLLTEST0
APU_PLLTEST1
APU_DBRDY 12
APU_DBREQ#
APU_PLLTEST0 12
APU_PLLTEST1 12
RPC5
1K_0804_8P4R_5%
2
CC213
0.01U_0201_10V6K
1
HDT@
+1.8VALW+1.8VALW
18
27
36
45
APU_PWROK
APU_RST#
APU_TDIAPU_DBREQ#
2
CC212
0.01U_0201_10V6K
1
@
3
CC25
0.1U_0201_6.3V6-K
HDT@
UC6
3
2A
2
GND
1
1A
+1.8VALW+1.8VALW
1
2
4
2Y
5
VCC
6
1Y
SN74LVC2G07YZPR_WCSP6HDT@
Security Classification LC Future Center Secret Data
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CU STODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CU STODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CU STODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FU TURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FU TURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FU TURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE C ENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE C ENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE C ENTER.
12
RC32
300_0402_5%
HDT@
12
RC36
300_0402_5%
HDT@
APU_PWROK_BUF
APU_RST#_BUF
2013/08/15
2013/08/15
2013/08/15
RPC18
1 4
2 3
2.2K_0404_4P2R_5%
1 2
RC35 100K_0402_5%
To EDP pa nel
PU FOR INTERNAL
PD FOR CUSTOMER
DP_EDP_PWM
12
RC11
100K_0402_5%
DP_ENVDD
12
RC13
100K_0402_5%
@
LCD Power IC can change for PCH_ENVDD for cost down
DP_ENBKL
12
RC14
100K_0402_5%
@
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
5
4
3
2
1
RC243 0_0402_5%@
B1
B2
8
7
6
5
+3VS_APU
+3VALW+1.8VALW
8
7
6
5
12
RC66
@
1
CC28
2
TSLST@
RB751V-40_SOD323-2 @
PBTN_OUT#33
SYS_RESET#13
PM_SLP_S3#33
PM_SLP_S5#13,33
AC_PRESENT33
HDA_SDIN019
12
RC1609
2K_0402_5%
FP@
RC1610
10K_0402_5%
NFP@
1 2
+3VS
12
12
RC52
RC50
0_0402_5%
@
1
2
CC260
CC261
.1U_0402_10V6-K
LST@
LST@
12
RC67
0_0402_5%
0_0402_5%
@
2
CC29
1
.1U_0402_10V6-K
.1U_0402_10V6-K
TSLST@
1 2
@
2
1
EC_RSMRST#33
Stuff RBoard ID
RC1616
RC39
RC1614
RC1613
RC1612
RC1611
RC1610
RC1609
RC1607
RC1608
RC123
RC1606
RC1613
2K_0402_5%
@
RC1614
10K_0402_5%
@
1
2
3
UC7
1
VCCA
2
A1
3
A2
GND4OE
TXS0102DQER_X2SON8_1X1P4
TSLST@
PCIE_RST0#_R
AGPIO69 S0 Power Domain
RC1611
10K_0402_5%
NOKBL@
1 2
12
RC1612
2K_0402_5%
BL@
UC4
VCCA
VCCB
A1
A2
GND4OE
TXS0102DQER_X2SON8_1X1P4
LST@
VCCB
B1
B2
RC3202 33_0402_5%
PLT_RST#26,29
D D
Descripti on
0
Board_ID0
1
0
Board_ID1
1
00KBL
Board_ID2
1
Board_ID3
C C
BOARD_ID19
BOARD_ID49
BOARD_ID59
B B
1
0
Board_ID4
1
0
Board_ID5
1
BOARD_ID0
BOARD_ID1
BOARD_ID2
BOARD_ID3
BOARD_ID4
BOARD_ID5
TP_I2C_SCL TP_I2C_SCL_R
TP_I2C_SDA
12
RC3201
100K_0402_5%
@
Reserved
Reserved
SATA SSD
PCIE SSD
NON-KBL
Non-FP
FP
Non-TS
TS
530S
YOGA
12
1 2
RC39
2K_0402_5%
@
RC1616
10K_0402_5%
@
1 2
1
CC1389
100P_0201_25V8J
2
12
1 2
12
RC51
0_0402_5%
@
1
2
CC259
.1U_0402_10V6-K
LST@
+1.8VALW +3VS+3VALW
12
RC65
0_0402_5%
@
APU_EC_SDA
A A
1
CC27
2
.1U_0402_10V6-K
TSLST@
5
DC1
PM_SLP_S3#
PM_SLP_S5#
+3VALW_APU
RC201 0_0402_5%@
RC1608
10K_0402_5%
TS@
1 2
1 2
12
RC1607
10K_0402_5%
NTS@
1 2
0_0402_5%
TP_I2C_SDA_R
RC56 10K_0402_5%
@
.1U_0402_10V6-K
SFH_SMB_CK0APU_EC_SCL
SFH_SMB_DA0
RC68 10K_0402_5%@
12
4
12
RC3198
10K_0402_5%
1
CC1316
0.1U_0201_6.3V6-K
2
RC191 0_0402_5%@
RC193 0_0402_5%@
RC194 0_0402_5%@
RC100 10K_0402_5%
1 2
RC1606
10K_0402_5%
YOGA@
RC123
2K_0402_5%
530S@
12
RSMRST#_R
+3VALW_APU
1 2
1 2
1 2
1 2
1 2
+1.8VALW
HDA_SDIN0_R
TC42 @
TC210 @
RC63
10K_0402_5%
@
+1.8VALW
1
CC31
10U_0603_6.3V6M
2
1
1
PCIE_RST0#_R
PCIE_RST1#_R
RSMRST#_R
PWRBTN#_RPBTN_OUT#
SYS_PWRGD_R
SYS_RESET#
PCIE_WAKE#_RA
PM_SLP_S3#_R
PM_SLP_S5#_R
BOARD_ID0
AC_PRESENT
BATLOW#
HDA_BITCLK
HDA_SDIN1
HDA_SDIN2
HDA_RST#
HDA_SYNC
HDA_SDOUT
AGPIO8
EC_SYS_PWRGD33
UC2D
BD5
PCIE_RST0_L/EGPIO26
BB6
PCIE_RST1_L/EGPIO27
AT16
RSMRST_L
AR15
PWR_BTN_L/AGPIO0
AV6
PWR_GOOD
AP10
SYS_RESET_L/AGPIO1
AV11
WAKE_L/AGPIO2
AV13
SLP_S3_L
AT14
SLP_S5_L
AR8
S0A3_GPIO/AGPIO10
AT10
AC_PRES/AGPIO23
AN6
LLB_L/AGPIO12
AW8
EGPIO42
AR2
AZ_BITCLK/TDM_BCLK_MIC
AP7
AZ_SDIN0/CODEC_GPI
AP1
AZ_SDIN1/SW_DATA1B/TDM_BCLK_PLAYBACK
AP4
AZ_SDIN2/SW_DATA2/TDM_DATA_PLAYBACK
AP3
AZ_RST_L/SW_DATA1A/SW_DATA3/TDM_DATA_MIC
AR4
AZ_SYNC/TDM_FRM_MIC
AR3
AZ_SDOUT/TDM_FRM_PLAYBACK
AT2
SW_MCLK/TDM_BCLK_BT
AT4
SW_DATA0/TDM_DOUT_BT
AR6
AGPIO7/FCH_ACP_I2S_SDIN_BT
AP6
AGPIO8/FCH_ACP_I2S_LRCLK_BT
@
HDA_SYNC_AUDIO19
HDA_BITCLK_AUDIO19
HDA_SDOUT_AUDIO19
TP_I2C_SCL
TP_I2C_SDA
APU_EC_SCL
APU_EC_SDA
RC3065 0_0402_5%@
+1.8VALW
12
1 2
TC1 @
ACPI/AUDIO/I2 C/GPI O/ MIS C
FP5 REV 0.90
PART 4 OF 13
1
1 8
2 7
3 6
4 5
+3VALW_APU
12
RC3199
10K_0402_5%
@
SYS_PWRGD_R
1
CC1314
0.1U_0201_6.3V6-K
2
EGPIO41/SFI_S5_EGPIO41
AGPIO39/SFI_S5_AGPIO39
I2C0_SCL/SFI0_I2C_SCL/EGPIO151
I2C0_SDA/SFI0_I2C_SDA/EGPIO152
I2C1_SCL/SFI1_I2C_SCL/EGPIO149
I2C1_SDA/SFI1_I2C_SDA/EGPIO150
I2C2_SCL/EGPIO113/SCL0
I2C2_SDA/EGPIO114/SDA0
I2C3_SCL/AGPIO19/SCL1
I2C3_SDA/AGPIO20/SDA1
AGPIO4/SATAE_IFDET
AGPIO5/DEVSLP0
AGPIO6/DEVSLP1
SATA_ACT_L/AGPIO130
INTRUDER_ALERT
GENINT1_L/AGPIO89
GENINT2_L/AGPIO90
FANOUT0/AGPIO85
AMD-RAVEN-FP5_BGA1140
RPC4
33_0804_8P4R_5%
RC260
@
PSA_I2C_SCL
PSA_I2C_SDA
AGPIO3
AGPIO9
AGPIO40
AGPIO69
AGPIO86
SPKR/AGPIO91
BLINK/AGPIO11
FANIN0/AGPIO84
1 2
1K_0402_5%
SYS_RESET#
CC38 close to APU
AW12
AU12
I2C0_SCL_APU
AR13
I2C0_SDA_APU
AT13
I2C1_SCL_APU
AN8
I2C1_SDA_APU
AN9
I2C2_SCL_APU
BC20
I2C2_SDA_APU APU_SMB_DATA
BA20
I2C3_SCL_APU I2C3_SCL
AM9
I2C3_SDA_APU
AM10
PSA_I2C_SCL
L16
PSA_I2C_SDA
M16
BOARD_ID2
AT15
AW10
PCH_SSD1_DEVSLP
AP9
PCH_SSD2_DEVSLP
AU10
AV15
AU7
APU_SSD_RST#
AU6
BOARD_ID3
AW13
RC34 0_0402_5%@
AW15
INTRUDER_ALERT
AU14
AU16
AV8
BLINK
PCH_TP_INT#
AW16
PCH_TS_IRQ
BD15
AR18
EC_SENSOR_INT
AT18
HDA_RST#
HDA_SYNC
HDA_BITCLK
HDA_SDOUT
RC262
RC261
1 2
1 2
1K_0402_5%
1K_0402_5%
@
@
Follow G320-APL 2 steps leve l shi ft to real ize 1 .8VALW power to +3VS device control JT0929
+1.8VALW
G1
S1
SGD
D1
QC1A
DMN5L06DWK-7_SOT363-6
DMN5L06DWK-7_SOT363-6
RPC9
2.2K_0404_4P2R_5%
TP_I2C_SCL_M TP_I2C_SCL_R
G2
G
TP_I2C_SDA_M
D2S2
S
D
QC1B
DC4
1 2
RB751V-40_SOD323-2
@
1
CC38
0.1U_0201_6.3V6-K
2
1 2
RC29 0_0402_5%@
RC30 0_0402_5%@
1 2
RC23 0_0402_5%@
1 2
RC24 0_0402_5%@
1 2
RC501 0_0402_5%@
1 2
RC500 0_0402_5%@
1 2
RC20 0_0402_5%@
1 2
1 2
RC21 0_0402_5%@
CRB connect to EC and PMIC
APU_SSD_RST# 26
1 2
RC3100 20M_0402_5%@
PCH_BEEP 19
PCH_TP_INT# 34
PCH_TS_IRQ 22
SSD_SATA_PCIE_DET1# 26
EC_SENSOR_INT 33
+3VALW_APU
1 4
2 3
2N7002KDWH_SOT363-6
12
6 1
plac ement cl ose to APU
+1.8VALW
G1
S1
SGD
D1
QC4A
DMN5L06DWK-7_SOT363-6
TS@
DMN5L06DWK-7_SOT363-6
Security Classificati on
Security Classificati on
Security Classificati on
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY O F THE COMPETENT D IVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CO NSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
G2
G
S
QC4B
TS@
+3VALW
RPC11
2.2K_0404_4P2R_5%
1 4
2 3
TS@
D2S2
D
placement close to APU
APU_EC_SCL
RC49 0_0402_5%
APU_EC_SDA
RC53 0_0402_5%
RC49/RC53 placement close to APU
LC Future Center Sec ret Data
LC Future Center Sec ret Data
LC Future Center Sec ret Data
2013/08/15
2013/08/15
2013/08/15
@
1 2
@
1 2
EC_SMB_CK4_M
EC_SMB_DA4_M
Deciphered Date
Deciphered Date
Deciphered Date
2
SYS_PWRGD_R
APU_EC_SCL
APU_EC_SDA
TP_I2C_SCL
TP_I2C_SDA
APU_SMB_CLK
I2C3_SDA
PCH_SSD1_DEVSLP 26
VCCRTC
+3VS
2
G
S
D
QC3A
3 4
D
QC3B
2N7002KDWH_SOT363-6
+3VS
6 1
D
QC5A
2N7002KDWH_SOT363-6
TS@
EC_SMB_CK4 22,33
EC_SMB_DA4 22,33
2013/08/15
2013/08/15
2013/08/15
PCIE_WAKE#_RA
RC88 0_0402_5%
1 2
AOAC_ON# 29
Touch Screen
Touch Pad
APU_SMB_CLK 14,15,29
APU_SMB_DATA 14,15,29
I2C3_SCL 13,22
I2C3_SDA 13,22
PSA_I2C_SCL
PSA_I2C_SDA
EC_SMI# 33
5
G
S
2
G
S
I2C2_SCL_APU
I2C2_SDA_APU
APU_SSD_RST#
EC_SMI#
PCH_TP_INT#
PCH_TS_IRQ
I2C3_SCL_APU
I2C3_SDA_APU
PBTN_OUT#
PCIE_WAKE#_RA
AC_PRESENT
APU_SSD_RST#
BLINK
PM_SLP_S3#
PM_SLP_S5#
PCH_SSD2_DEVSLP
PCH_TP_INT#
RSMRST#_R
SYS_PWRGD_R
PCIE_RST1#_R
+TP_PWR
14
23
RPC7
2.2K_0404_4P2R_5%
TP_I2C_SDA_R
+3VS
@
5
G
3 4
S
D
QC5B
2N7002KDWH_SOT363-6
TS@
Title
Title
Title
FP5 AZ/I2C/ACPI/GPIO
FP5 AZ/I2C/ACPI/GPIO
FP5 AZ/I2C/ACPI/GPIO
Size Document Number Re v
Size Document Number Re v
Size Document Number Re v
Custom
Custom
Custom
Friday, March 23, 2018
Friday, March 23, 2018
Friday, March 23, 2018
Date: Sheet of
Date: Sheet of
Date: Sheet of
@
I2C0_SCL_APU
I2C0_SDA_APU
I2C1_SCL_APU
I2C1_SDA_APU
SO-DIMM, WLAN
EC for Sensor
RC3126 4.7K_0402_5%@
RC3127 4.7K_0402_5%@
RC27 10K_0402_5%
RC3081 2.2K_0402_5%
RC3213 10K_0402_5%
RC9 10K_0402_5%
RC64 10K_0402_5%@
RC3119 10K_0402_5%@
RC203 2.2K_0402_5%@
RC208 2.2K_0402_5%@
RC249 10K_0402_5%@
RC248 10K_0402_5%@
RC87 100K_0402_5%
RC89 100K_0402_5%
RC3227 10K_0402_5%
14
23
RPC1
2.2K_0404_4P2R_5%
YOGA530-ARR
YOGA530-ARR
YOGA530-ARR
1
RPC3
2.2K_0404_4P2R_5%
RPC6
1 4
2 3
2.2K_0404_4P2R_5%
12
12
RPC21
23
14
2.2K_0404_4P2R_5%
1 2
1 2
1 2
1 2
TS@
RPC56
23
14
2.2K_0404_4P2R_5%
TS@
RPC15
1 8
2 7
3 6
4 5
10K_0804_8P4R_5%
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
TP_I2C_SCL_R 34
TP_I2C_SDA_R 34
SFH_SMB_CK0 22,25
SFH_SMB_DA0 22,25
PCIE_WAKE# 29
23
14
7 48
7 48
7 48
+1.8VALW
+1.8VS
+3VS_APU
+3VALW_APU
+3VALW_APU
1.0
1.0
1.0
5
+3VS_APU
D D
+3VS_APU
C C
1 2
RC3161 10K_0402_5%
1 2
RC12 10K_0402_5%
1 2
RC3163 10K_0402_5%
1 2
RC16 10K_0402_5%
1 2
RC17 10K_0402_5%
@
1 2
RC25 10K_0402_5%
@
1 2
RC26 10K_0402_5%
RC10 150_0402_1%@
RC6 150_0402_1%@
12
12
PCH_WLAN_OFF#
PCH_BT_OFF#
WLAN_CLKREQ#
SSD_1_CLKREQ#
SSD_2_CLKREQ#
PCH_TS_RST#
PCH_TS_RST#
XGBECLK0
XGBECLK1
PCIE CL K1
WLAN
PCIE CL K2 SSD1
PCIE CL K2
CLK_PCIE_WLAN29
CLK_PCIE_WLAN#29
CLK_PCIE_SSD26
CLK_PCIE_SSD#26
48MHz/10pF Crystal
1 2
B B
RC3204 1M_0402_5%
YC1
1
OSC1
NC12OSC2
1
48MHZ_10PF_7V48000017
CC1390
8P_0402_50V8-B
2
NC2
4
PCH_WLAN_OFF#29
WLAN_CLKREQ#29
SSD_1_CLKREQ#26
PCH_BT_OFF#29
1 2
SUSCLK26,29
RC119 0_0402_5%@
RC120 0_0402_5%@
RC121 0_0402_5%@
RC122 0_0402_5%@
CC21
10P_0402_50V8J
1 2
1 2
1 2
RC37 0_0402_5%@
CLK_PCIE_WLAN#
CLK_PCIE_SSD# CLK_PCIE_SSD#_R
X48M_X1
X48M_X2
Kevin H: change YC2 PN change to SJ10000MQ00,manual modify PN to SJ10000MQ00
4
3
1
CC1391
8P_0402_50V8-B
2
PCH_WLAN_OFF#
WLAN_CLKREQ#
SSD_1_CLKREQ#
SSD_2_CLKREQ#
PCH_BT_OFF#
1
TC41 @
1 2
RC45
1 2
20M_0402_5%
YC3
1 2
32.768KHZ 9PF 202934-PG14
1
2
CLK_PCIE_WLAN_RCLK_PCIE_WLAN
CLK_PCIE_WLAN#_R
CLK_PCIE_SSD_RCLK_PCIE_SSD
48M_OSC
X48M_X1
X48M_X2
XGBECLK0
XGBECLK1
RTCCLK
X32K_X1
X32K_X2
1
CC22
12P_0402_50V8-J
2
3
APU_LPC_RST#13,33
CLK/LPC/EMMC/SD/ SPI/eSP I/UART
AV18
CLK_REQ0_L/SATA_IS0_L/SATA_ZP0_L/AGPIO92
AN19
CLK_REQ1_L/AGPIO115
AP19
CLK_REQ2_L/AGPIO116
AT19
CLK_REQ3_L/SATA_IS1_L/SATA_ZP1_L/EGPIO131
AU19
CLK_REQ4_L/OSCIN/EGPIO132
AW18
CLK_REQ5_L/EGPIO120
AW19
CLK_REQ6_L/EGPIO121
AK1
GPP_CLK0P
AK3
GPP_CLK0N
AM2
GPP_CLK1P
AM4
GPP_CLK1N
AM1
GPP_CLK2P
AM3
GPP_CLK2N
AL2
GPP_CLK3P
AL4
GPP_CLK3N
AN2
GPP_CLK4P
AN4
GPP_CLK4N
AN3
GPP_CLK5P
AP2
GPP_CLK5N
AJ2
GPP_CLK6P
AJ4
GPP_CLK6N
AJ3
X48M_OSC
BB3
X48M_X1
BA5
X48M_X2
AF8
RSVD_76
AF9
RSVD_77
AW14
RTCCLK
AY1
X32K_X1
AY4
X32K_X2
@
PCH_SPI_CS0#
PCH_SPI_D1
PCH_SPI_D2
1
2
3
4
LPC_PD_L/SD_CMD/AGPIO21
LAD0/SD_DATA0/EGPIO104
LAD1/SD_DATA1/EGPIO105
LAD2/SD_DATA2/EGPIO106
LAD3/SD_DATA3/EGPIO107
LPC_CLKRUN_L/AGPIO88
LPC_RST_L/SD_WP_L/AGPIO32
LPC_PME_L/SD_PWR_CTRL/AGPIO22
SPI_ROM_REQ/EGPIO67
SPI_ROM_GNT/AGPIO76
ESPI_RESET_L/KBRST_L/AGPIO129
ESPI_ALERT_L/LDRQ0_L/EGPIO108
SPI_HOLD_L/ESPI_DAT3
SPI_CS2_L/ESPI_CS_L/AGPIO30
SPI_TPM_CS_L/AGPIO29
UART0_RTS_L/UART2_RXD/EGPIO137
UART0_CTS_L/UART2_TXD/EGPIO135
EGPIO142/UART1_RTS_L/UART3_RXD
EGPIO140/UART1_CTS_L/UART3_TXD
FP5 REV 0.90
PART 5 OF 13
AMD-RAVEN-FP5_BGA1140
UC3
/CS
DO(IO1)
/HOLDor/RESET(IO3)
/WP(IO2)
GND
W25Q64FWSSIQ_SO8
8MB(64Mb)
1 2
RC46 33_0402_5%
1
CC1318
150P_0402_50V8-J
2
UC2E
EGPIO70/SD_CLK
LPCCLK0/EGPIO74
LPCCLK1/EGPIO75
SERIRQ/AGPIO87
LFRAME_L/EGPIO109
AGPIO68/SD_CD
SPI_CLK/ESPI_CLK
SPI_DI/ESPI_DAT1
SPI_DO/ESPI_DAT0
SPI_WP_L/ESPI_DAT2
SPI_CS1_L/EGPIO118
SPI_CS3_L/AGPIO31
UART0_RXD/EGPIO136
UART0_TXD/EGPIO138
UART0_INTR/AGPIO139
EGPIO141/UART1_RXD
EGPIO143/UART1_TXD
AGPIO144/UART1_INTR
+1.8V_SPI
8
VCC
PCH_SPI_D3
7
PCH_SPI_CLK
6
CLK
PCH_SPI_D0
5
DI(IO0)
BD13
BB14
BB12
BC11
BB15
BC15
BA15
BC13
BB13
BC12
BA12
BD11
BA11
BA13
BC8
BB8
BB11
BC6
BB7
BA9
BB10
BA10
BC10
BC9
BA8
BA6
BD8
BA16
BB18
BC17
BA18
BD18
BC18
BA17
BC16
BB19
BB16
SPI_CLK
SPI_D1
SPI_D0
SPI_D2
SPI_D3
SPI_CS0#
AGPIO30
0.085 A
LPC_RST#_R
EGPIO70
LPCPD#
LAD0
LAD1
LAD2
LAD3
LPCCLK0
EGPIO75
LPC_RST#_R
KBRST#
APU_UART0_RXD
APU_UART0_TXD
APU_UART0_RTS#
APU_UART0_CTS#
APU_UART0_INTR
2
1 2
RC3208 10_0402_5%
1 2
RC3209 10_0402_5%
1 2
RC3210 10_0402_5%
1 2
RC3211 10_0402_5%
1 2
RC3141 0_0402_5%@
1 2
RC3083 10_0402_5%
1 2
RC3084 0_0402_5%@
1 2
RC3085 0_0402_5%@
1 2
RC3087 0_0402_5%@
1 2
RC3088 0_0402_5%@
1 2
RC3089 0_0402_5%@
PCH_TS_RST#
1 2
RC435 0_0402_5%@
1
CC220
0.1U_0201_6.3V6-K
2
LDRQ0#
PCH_SPI_CLK
PCH_SPI_D1
PCH_SPI_D0
PCH_SPI_D2
PCH_SPI_D3
PCH_SPI_CS0#
LPCPD# 13
LPC_AD0 13,33
LPC_AD1 13,33
LPC_AD2 13,33
LPC_AD3 13,33
LPC_CLKRUN# 13
SERIRQ 13,33
LPC_FRAME# 13,33
EC_SCI# 33
KBRST# 33
LDRQ0# 13
PCH_SPI_CLK 13
+1.8VALW+1.8V_SPI
LPCCLK0
LPCCLK0
RC3136
1 2
@
PCH_TS_RST# 22
12
RC282
0_0201_5%
EMC_NS@
1
CC219
22P_0201_25V8
EMC_NS@
2
RC126 3.3_0402_1%
LPC_FRAME#
KBRST#
EC_SCI#
+1.8VS
RC3140
RC3212
RC3139
RC3138
1 2
1 2
1 2
1 2
1K_0402_1%
1K_0402_1%
1K_0402_1%
1K_0402_1%
1K_0402_1%
@
@
@
@
EGPIO70
AGPIO30
EGPIO75
1
PCH_SPI_CLK
RC139
10_0402_5%
EMC_NS@
1 2
1
CC26
10P_0201_25V8G
EMC_NS@
EMC EM
12
2
CLK_PCI_EC 13,33
1 2
RC152 10K_0402_5%@
1 2
RC3063 10K_0402_5%
1 2
RC3091 10K_0402_5%@
@
1 2
1 2
1 2
C
+3VALW_APU
RC315710K_0402_5%
RC315810K_0402_5%
RC316010K_0402_5%
+3VS_APU
+1.8V_SPI
A A
5
4
3
1 2
RC1 10K_0402_5%
1 2
RC2 10K_0402_5%
1 2
RC4 10K_0402_5%@
1 2
RC5 10K_0402_5%@
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CE NTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CE NTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CE NTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
PCH_SPI_CS0#
PCH_SPI_D1
PCH_SPI_D2
PCH_SPI_D3
2013/08/15
2013/08/15
2013/08/15
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2013/08/15
2013/08/15
2013/08/15
Titl e
Titl e
Titl e
FP5 CLK/LPC/SD/EMMC/UART
FP5 CLK/LPC/SD/EMMC/UART
FP5 CLK/LPC/SD/EMMC/UART
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date : Sheet o f
Date : Sheet o f
Date : Sheet o f
Friday, March 23, 2018
Friday, March 23, 2018
Friday, March 23, 2018
YOGA530-ARR
YOGA530-ARR
YOGA530-ARR
1
8 48
8 48
8 48
1.0
1.0
1.0
5
4
3
2
1
USB30_TX_P032
RIGHT USB 3.0
D D
LEFT USB 3.0
Type C
C C
USB30_TX_N032
USB30_RX_P032
USB30_RX_N032
USB30_TX_P130
USB30_TX_N130
USB30_RX_P130
USB30_RX_N130
USB30_TX_P231
USB30_TX_N231
USB30_RX_P231
USB30_RX_N231
USB30_TX_P0
USB30_TX_N0 USB20_N0
USB30_RX_P0
USB30_RX_N0
USB30_TX_P1
USB30_TX_N1
USB30_RX_P1
USB30_RX_N1
USB30_TX_P2
USB30_TX_N2
USB30_RX_P2
USB30_RX_N2
AD2
USBC0_A2/USB_0_TXP0/DP3_TXP2
AD4
USBC0_A3/USB_0_TXN0/DP3_TXN2
AC2
USBC0_B11/USB_0_RXP0/DP3_TXP3
AC4
USBC0_B10/USB_0_RXN0/DP3_TXN3
AF4
USBC0_B2/DP3_TXP1
AF2
USBC0_B3/DP3_TXN1
AE3
USBC0_A11/DP3_TXP0
AE1
USBC0_A10/DP3_TXN0
AG3
USB_0_TXP1
AG1
USB_0_TXN1
AJ9
USB_0_RXP1
AJ8
USB_0_RXN1
AG4
USB_0_TXP2
AG2
USB_0_TXN2
AG7
USB_0_RXP2
AG6
USB_0_RXN2
AA2
USBC1_A2/USB_0_TXP3/DP2_TXP2
AA4
USBC1_A3/USB_0_TXN3/DP2_TXN2
Y1
USBC1_B11/USB_0_RXP3/DP2_TXP3
Y3
USBC1_B10/USB_0_RXN3/DP2_TXN3
AC1
USBC1_B2/DP2_TXP1
AC3
USBC1_B3/DP2_TXN1
AB2
USBC1_A11/DP2_TXP0
AB4
USBC1_A10/DP2_TXN0
AH4
USB_1_TXP0
AH2
USB_1_TXN0
AK7
USB_1_RXP0
AK6
USB_1_RXN0
@
USB
FP5 REV 0.90
PART 10 OF 13
USB_OC0_L/AGPIO16
USB_OC1_L/AGPIO17
USB_OC2_L/AGPIO18
USB_OC3_L/AGPIO24
AGPIO14/USB_OC4_L
AGPIO13/USB_OC5_L
AMD-RAVEN-FP5_BGA1140
UC2J
USB_0_DP0
USB_0_DM0
USB_0_DP1
USB_0_DM1
USB_0_DP2
USB_0_DM2
USB_0_DP3
USB_0_DM3
USB_1_DP0
USB_1_DM0
USB_1_DP1
USB_1_DM1
USBC_I2C_SCL
USBC_I2C_SDA
AE7
AE6
AG10
AG9
AF12
AF11
AE10
AE9
AJ12
AJ11
AD9
AD8
AM6
AM7
AK10
AK9
AL9
AL8
AW7
AT12
USB20_P0
USB20_P1
USB20_N1
USB20_P2
USB20_N2
USB20_P3
USB20_N3
USB20_P4
USB20_N4
USB20_P5_HUB
USB20_N5_HUB
USBC_I2C_SCL
USBC_I2C_SDA
USB_OC0#
USB_OC1#
USB_OC2#
BOARD_ID1
BOARD_ID5
BOARD_ID4
USB20_P0 32
USB20_N0 32
USB20_P1 30
USB20_N1 30
USB20_P2 31
USB20_N2 31
USB20_P3 29
USB20_N3 29
USB20_P4 32
USB20_N4 32
USB20_P5_HUB 20
USB20_N5_HUB 20
USB_OC0# 32
USB_OC1# 30
BOARD_ID1 7
BOARD_ID5 7
BOARD_ID4 7
RIGHT USB 3.0
LEFT USB 3.0
Type C
BT
Card Reader
USB HUB(BT,FP,Touch Screen)
USBC_I2C_SCL
USBC_I2C_SDA
1 2
RC28 0_0402_5%@
USB_OC1#
USB_OC0#
1 4
2 3
10K_0404_4P2R_5%
1 2
RC270 4.7K_0402_5%
1 2
RC3232 4.7K_0402_5%
TYPE_C_OCP# 31
+3VALW_APU
RP1
+1.8VALW
RSVD_62
RSVD_61
RSVD_65
RSVD_72
RSVD_67
RSVD_63
RSVD_33
RSVD_73
RSVD_53
RSVD_54
RSVD_45
RSVD_46
3
UC2L
AA9
AA8
AC6
AD11
AC9
AA11
T12
AD12
Y6
Y7
W8
W9
2013/08/15
2013/08/15
2013/08/15
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2013/08/15
2013/08/15
2013/08/15
Titl e
Titl e
Titl e
FP5 USB/WIFI
FP5 USB/WIFI
FP5 USB/WIFI
Size Document Number Re v
Size Document Number Re v
Size Document Number Re v
Custom
Custom
Custom
Date : S heet of
Date : S heet of
Date : S heet of
Friday, March 23, 2018
Friday, March 23, 2018
Friday, March 23, 2018
YOGA530-ARR
YOGA530-ARR
YOGA530-ARR
1
9 48
9 48
9 48
1.0
1.0
1.0
T11
RSVD_32
AC7
W11
W12
AA12
AC10
RSVD_66
Y9
RSVD_55
Y10
RSVD_56
RSVD_47
RSVD_48
V9
RSVD_38
V10
RSVD_39
RSVD_64
RSVD_68
@
B B
A A
5
4
RSVD
FP5 REV 0.90
PART 12 OF 13
AMD-RAVEN-FP5_BGA1140
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
5
D D
4
3
2
1
C C
B B
A18
CAM0_CSI2_CLOCKP
C18
CAM0_CSI2_CLOCKN
A15
CAM0_CSI2_DATAP0
C15
CAM0_CSI2_DATAN0
B16
CAM0_CSI2_DATAP1
C16
CAM0_CSI2_DATAN1
C19
CAM0_CSI2_DATAP2
B18
CAM0_CSI2_DATAN2
B17
CAM0_CSI2_DATAP3
D17
CAM0_CSI2_DATAN3
D12
CAM1_CSI2_CLOCKP
B12
CAM1_CSI2_CLOCKN
C13
CAM1_CSI2_DATAP0
A13
CAM1_CSI2_DATAN0
B11
CAM1_CSI2_DATAP1
C12
CAM1_CSI2_DATAN1
J13
RSVD_6
@
CAMERAS
FP5 REV 0.90
PART 13 OF 13
AMD-RAVEN-FP5_BGA1140
UC2M
CAM0_CLK
CAM0_I2C_SCL
CAM0_I2C_SDA
CAM0_SHUTDOWN
CAM1_CLK
CAM1_I2C_SCL
CAM1_I2C_SDA
CAM1_SHUTDOWN
CAM_PRIV_LED
CAM_IR_ILLU
B15
D15
C14
B13
B10
A11
C11
D11
D13
D10
A A
Title
Title
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE S ECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE S ECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE S ECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CE NTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CE NTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CE NTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF LC FUTURE CENTER.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF LC FUTURE CENTER.
3
2013/08/15
2013/08/15
2013/08/15
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2013/08/15
2013/08/15
2013/08/15
Title
FP5 CAM
FP5 CAM
FP5 CAM
Size
Size
Size
Document Number Re v
Document Number Re v
Document Number Re v
C
C
C
Date: Sheet o f
Date: Sheet o f
Date: Sheet o f
Friday, March 23, 2018
Friday, March 23, 2018
Friday, March 23, 2018
YOGA530-ARR
YOGA530-ARR
YOGA530-ARR
1
10 48
10 48
10 48
1.0
1.0
1.0
5
4
3
2
1
UC2F
VDDCR_1
VDDCR_2
VDDCR_3
VDDCR_4
VDDCR_5
VDDCR_6
VDDCR_7
VDDCR_8
VDDCR_9
VDDCR_10
VDDCR_11
VDDCR_12
VDDCR_13
VDDCR_14
VDDCR_15
VDDCR_16
VDDCR_17
VDDCR_18
VDDCR_19
VDDCR_20
VDDCR_21
VDDCR_22
VDDCR_23
VDDCR_24
VDDCR_25
VDDCR_26
VDDCR_27
VDDCR_28
VDDCR_29
VDDCR_30
VDDCR_31
VDDCR_32
VDDCR_33
VDDCR_34
VDDCR_35
VDDCR_36
VDDCR_37
VDDCR_38
VDDCR_39
VDDCR_40
VDDCR_41
VDDCR_42
VDDCR_43
VDDCR_44
VDDCR_45
VDDCR_46
VDDCR_47
VDDCR_48
VDDCR_49
VDDCR_50
VDDCR_51
VDDCR_52
VDDCR_53
VDDCR_54
VDDCR_55
VDDCR_56
VDDCR_57
VDDCR_58
VDDCR_59
VDDCR_60
VDDCR_61
VDDCR_62
VDDCR_63
VDDCR_64
VDDCR_65
VDDCR_66
VDDCR_67
VDDCR_68
VDDCR_69
VDDCR_70
VDDCR_71
VDDCR_72
VDDCR_73
VDDCR_74
VDDCR_75
VDDCR_76
VDDCR_77
VDDCR_78
VDDCR_79
VDDCR_80
VDDCR_81
VDDCR_82
VDDCR_83
G7
G10
G12
G14
H8
H11
H15
K7
K12
K14
L8
M7
M10
N14
P7
P10
P13
P15
R8
R14
R16
T7
T10
T13
T15
T17
U14
U16
V13
V15
V17
W7
W10
W14
W16
Y8
Y13
Y15
Y17
AA7
AA10
AA14
AA16
AA18
AB13
AB15
AB17
AB19
AC14
AC16
AC18
AD7
AD10
AD13
AD15
AD17
AD19
AE8
AE14
AE16
AE18
AF7
AF10
AF13
AF15
AF17
AF19
AG14
AG16
AG18
AH13
AH15
AH17
AH19
AJ7
AJ10
AJ14
AJ16
AJ18
AK13
AK15
AK17
AK19
+VDDC_VDD
35A
22U_0603_6.3V6-M
BU
BU
+VDD_AUD_ALW
1
CC1339
2
1
CC1327
2
180P_0402_50V8-J
0.1A
1
CC192
2
+VDDCR_SOC
6A
0.2A
1U_0201_6.3V6-K
0.25A
2A
0.5A
0.25A
1A
4A
0.22U_0201_6.3V6-K
10A
AA20
AA23
AA26
AA28
AA32
AC20
AC22
AC25
AC28
AD23
AD26
AD28
AD32
AE20
AE22
AE25
AE28
AF23
AF26
AF28
AF32
AG20
AG22
AG25
AG28
AK28
AL28
AL32
AP12
AL18
AM17
AL20
AM19
AL19
AM18
AL17
AM16
AL14
AL15
AM14
AL13
AM12
AM13
AN12
AN13
AT11
M15
M18
M19
N16
N18
N20
P17
P19
R18
R20
T19
U18
U20
V19
W18
W20
Y19
T32
V28
W28
W32
Y22
Y25
Y28
AJ20
AJ23
AJ26
AJ28
AJ32
VDDCR_SOC_1
VDDCR_SOC_2
VDDCR_SOC_3
VDDCR_SOC_4
VDDCR_SOC_5
VDDCR_SOC_6
VDDCR_SOC_7
VDDCR_SOC_8
VDDCR_SOC_9
VDDCR_SOC_10
VDDCR_SOC_11
VDDCR_SOC_12
VDDCR_SOC_13
VDDCR_SOC_14
VDDCR_SOC_15
VDDCR_SOC_16
VDDCR_SOC_17
VDDIO_MEM_S3_1
VDDIO_MEM_S3_2
VDDIO_MEM_S3_3
VDDIO_MEM_S3_4
VDDIO_MEM_S3_5
VDDIO_MEM_S3_6
VDDIO_MEM_S3_7
VDDIO_MEM_S3_8
VDDIO_MEM_S3_9
VDDIO_MEM_S3_10
VDDIO_MEM_S3_11
VDDIO_MEM_S3_12
VDDIO_MEM_S3_13
VDDIO_MEM_S3_14
VDDIO_MEM_S3_15
VDDIO_MEM_S3_16
VDDIO_MEM_S3_17
VDDIO_MEM_S3_18
VDDIO_MEM_S3_19
VDDIO_MEM_S3_20
VDDIO_MEM_S3_21
VDDIO_MEM_S3_22
VDDIO_MEM_S3_23
VDDIO_MEM_S3_24
VDDIO_MEM_S3_25
VDDIO_MEM_S3_26
VDDIO_MEM_S3_27
VDDIO_MEM_S3_28
VDDIO_MEM_S3_29
VDDIO_MEM_S3_30
VDDIO_MEM_S3_31
VDDIO_MEM_S3_32
VDDIO_MEM_S3_33
VDDIO_MEM_S3_34
VDDIO_MEM_S3_35
VDDIO_MEM_S3_36
VDDIO_MEM_S3_37
VDDIO_MEM_S3_38
VDDIO_MEM_S3_39
VDDIO_MEM_S3_40
VDDIO_AUDIO
VDD_33_1
VDD_33_2
VDD_18_1
VDD_18_2
VDD_18_S5_1
VDD_18_S5_2
VDD_33_S5_1
VDD_33_S5_2
VDDP_S5_1
VDDP_S5_2
VDDP_S5_3
VDDP_1
VDDP_2
VDDP_3
VDDP_4
VDDP_5
VDDBT_RTC_G
@
POWER
FP5 REV 0.90
PART 6 OF 13
AMD-RAVEN-FP5_BGA1140
+VDDC_VDD
D D
C C
B B
1
CC1382
2
180P_0402_50V8-J
+VDDCR_SOC
1U_0201_6.3V6-K
1
CC1372
2
+1.2V
12
12
CC1257
CC1341
22U_0603_6.3V6-M
CD@
CD@
All BU(on bottom side under SOC)
1
1
CC7
CC6
2
2
10U_0402_6.3V6M
1
CC1383
2
180P_0402_50V8-J
12
12
12
CC1345
CC1344
CC1343
1
CC9
2
1
CC169
2
CD@
DECOUPLING BETWEEN PROCESSOR AND DIMMs
ACROSS VDDIO AND VSS SPLIT
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
+1.2V
1
1
CC10
CC11
2
2
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
1
1
CC170
2
0.22U_0201_6.3V6-K
0.22U_0201_6.3V6-K
1
CC172
CC179
2
2
0.22U_0201_6.3V6-K
22U_0603_6.3V6-M
+1.2V
CC168
12
CC1342
22U_0603_6.3V6-M
1
CC8
2
10U_0402_6.3V6M
10U_0402_6.3V6M
1
2
0.22U_0201_6.3V6-K
@
+1.2V
+3VS
1 2
RC3112 0_0402_5%@
1
1
12
CD@
180P_0402_50V8-J
1
CC1348
2
22U_0603_6.3V6-M
1
CC176
2
180P_0402_50V8-J
@
CC1384
CC1374
CC1373
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
180P_0402_50V8-J
CD@
+1.8VS
+1.8VALW
+3VALW_APU
+0.9VALW
+0.9VS
BO(Bottom side outside SOC)
1
1
CC12
2
2
10U_0402_6.3V6M
1
12
CC1376
2
22U_0603_6.3V6-M
BO B U
1
12
2
CC1377
BO BU
22U_0603_6.3V6-M
1
12
2
CC1378
BO B U
22U_0603_6.3V6-M
1
CC1328
12
2
CC1379
CD@
22U_0603_6.3V6-M
BO BU
1
2
1
1
CC13
CC14
2
2
10U_0402_6.3V6M
10U_0402_6.3V6M
12
CC1375
22U_0603_6.3V6-M
1U_0201_6.3V6-K
1U_0201_6.3V6-K
1
CC1336
CC1335
1
2
2
CD@
1U_0201_6.3V6-K
1U_0201_6.3V6-K
1
CC1333
CC1334
CD@
2
1U_0201_6.3V6-K
1U_0201_6.3V6-K
1
CC1331
CC1332
1
CD@
2
2
1U_0201_6.3V6-K
1U_0201_6.3V6-K
1U_0201_6.3V6-K
CC1319
CC15
10U_0402_6.3V6M
1
1
CC1330
CC1329
2
2
CD@
1U_0201_6.3V6-K
1U_0201_6.3V6-K
1
1
1
CC1320
CC1321
2
2
2
+0.9VS
1
1
CC18
CC19
2
2
10U_0402_6.3V6M
10U_0402_6.3V6M
+3VS_APU
1U_0201_6.3V6-K
1
CC1337
2
BO
CC24
10U_0402_6.3V6M
CC32
10U_0402_6.3V6M
1U_0201_6.3V6-K
1U_0201_6.3V6-K
CC1322
1U_0201_6.3V6-K
1
CC1338
2
CD@
BU
1U_0201_6.3V6-K
1
CC1323
2
+RTCBATT
RC3128 1K_0402_5%
1U_0201_6.3V6-K
1
CC1324
2
BU
1 2
+1.8VS
RC3154
0_0402_5%
@
1 2
1U_0201_6.3V6-K
1
1
CC1325
2
2
+RTCBATT_APU
+1.8VALW
1 2
12
1U_0201_6.3V6-K
CC1326
CC1340
@
BO
1
2
RC3118
0_0402_5%
CC1385
1U_0402_6.3V6K
AP2138N-1.5TRG1_SOT23-3
1U_0402_6.3V6K
3
UC5
1
Vin
3
Vout
2
GND
+RTCBATT
1
CC194
2
1U_0402_6.3V6K
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CU STODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CU STODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CU STODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FU TURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FU TURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FU TURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE C ENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE C ENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE C ENTER.
1
JCMOS1
@
2013/08/15
2013/08/15
2013/08/15
12
RC8
470_0603_5%
@
13
D
QC7
EC_RTCRST#_ON
2
G
S
2N7002KW_SOT323-3
@
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
2
12
RC15
100K_0402_5%
@
Deciphered Date
Deciphered Date
Deciphered Date
EC_RTCRST#_ON 33
2013/08/15
2013/08/15
2013/08/15
Title
Title
Title
FP5 POWER
FP5 POWER
FP5 POWER
Size
Size
Size
Document Number Re v
Document Number Re v
Document Number Re v
Custom
Custom
Custom
Date: Sheet o f
Date: Sheet o f
Date: Sheet o f
Friday, March 23, 2018
Friday, March 23, 2018
Friday, March 23, 2018
YOGA530-ARR
YOGA530-ARR
YOGA530-ARR
1
11 48
11 48
11 48
1.0
1.0
1.0
VCCRTC
A A
5
4
1 2
RC231 10K_0402_5%
1
CC37
2
5
D D
4
3
2
1
UC2G
VSS_316
A3
VSS_1
A5
VSS_2
A7
VSS_3
A10
VSS_4
A12
VSS_5
A14
VSS_6
A16
VSS_7
A19
VSS_8
A21
VSS_9
A23
VSS_10
A26
VSS_11
A30
VSS_12
C3
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
E7
VSS_18
E8
VSS_19
E10
VSS_20
E11
VSS_21
E12
VSS_22
E13
VSS_23
E14
VSS_24
E15
VSS_25
E16
VSS_26
E18
VSS_27
E19
VSS_28
E20
VSS_29
E21
VSS_30
E22
VSS_31
E23
VSS_32
E25
VSS_33
E26
VSS_34
E27
VSS_35
F5
VSS_36
F28
VSS_37
G1
VSS_38
G5
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
H5
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
K1
VSS_54
K5
VSS_55
K16
VSS_56
K19
VSS_57
K21
VSS_58
K22
VSS_59
K26
VSS_60
K28
VSS_61
AMD-RAVEN-FP5_BGA1140
@
GND
FP5 REV 0.90
PART 7 OF 13
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
K32
L5
L13
L15
L18
L20
L25
L28
M1
M5
M12
M21
M23
M26
M28
M32
N4
N5
N8
N11
N13
N15
N17
N19
N22
N25
N28
P1
P5
P14
P16
P18
P20
P23
P26
P28
P32
R5
R11
R12
R13
R15
R17
R19
R22
R25
R28
R30
T1
T5
T14
T16
T18
T20
T23
T26
T28
U13
U15
U17
U19
V5
AA13
AA15
AA17
AA19
AB14
AB16
AB18
AB20
AC11
AC12
AC13
AC15
AC17
AC19
AD14
AD16
AD18
AD20
AE11
AE12
AE13
AE15
AE17
AE19
AF14
AF16
AF18
AF20
V8
VSS_124
V11
VSS_125
V12
VSS_126
V14
VSS_127
V16
VSS_128
V18
VSS_129
V20
VSS_130
V22
VSS_131
V25
VSS_132
W1
VSS_133
W5
VSS_134
W13
VSS_135
W15
VSS_136
W17
VSS_137
W19
VSS_138
W23
VSS_139
W26
VSS_140
Y5
VSS_141
Y11
VSS_142
Y12
VSS_143
Y14
VSS_144
Y16
VSS_145
Y18
VSS_146
Y20
VSS_147
AA1
VSS_148
AA5
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
AC5
VSS_158
AC8
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
VSS_165
AD1
VSS_166
AD5
VSS_167
VSS_168
VSS_169
VSS_170
VSS_171
AE5
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
AF1
VSS_179
AF5
VSS_180
VSS_181
VSS_182
VSS_183
VSS_184
AG5
VSS_185
@
N12
C32
D16
D18
D20
C C
G16
G19
G21
G23
G26
G28
G32
H13
H18
H20
H22
H25
H28
B B
UC2H
GND
VSS_186
VSS_187
VSS_188
VSS_189
VSS_190
VSS_191
VSS_192
VSS_193
VSS_194
VSS_195
VSS_196
VSS_197
VSS_198
VSS_199
VSS_200
VSS_201
VSS_202
VSS_203
VSS_204
VSS_205
VSS_206
VSS_207
VSS_208
VSS_209
VSS_210
VSS_211
VSS_212
VSS_213
VSS_214
VSS_215
VSS_216
VSS_217
VSS_218
VSS_219
VSS_220
VSS_221
VSS_222
VSS_223
VSS_224
VSS_225
VSS_226
VSS_227
VSS_228
VSS_229
VSS_230
VSS_231
VSS_232
VSS_233
VSS_234
VSS_235
VSS_236
VSS_237
VSS_238
VSS_239
VSS_240
VSS_241
VSS_242
VSS_243
VSS_244
VSS_245
VSS_246
VSS_247
FP5 REV 0.90
PART 8 OF 13
AMD-RAVEN-FP5_BGA1140
AG8
AG11
AG12
AG13
AG15
AG17
AG19
AH14
AH16
AH18
AH20
AJ1
AJ5
AJ13
AJ15
AJ17
AJ19
AK5
AK8
AK11
AK12
AK14
AK16
AK18
AK20
AK22
AK25
AL1
AL5
AL7
AL10
AL12
AL16
AL23
AL26
AM5
AM8
AM15
AM20
AM22
AM25
AM28
AN1
AN5
AN7
AN10
AN15
AN18
AN21
AN23
AN26
AN28
AN32
AP5
AP8
AP13
AP15
AP18
AP20
AP25
AP28
AR1
AR12
AR14
AR16
AR19
AR21
AR26
AR28
AR32
AU11
AU13
AU15
AU18
AU20
AU22
AU25
AU28
AV10
AV12
AV14
AV16
AV19
AV21
AV23
AV26
AV28
AV32
AW28
AY10
AY11
AY12
AY13
AY14
AY15
AY16
AY18
AY19
AY20
AY21
AY22
AY23
AY25
AY26
AY27
BB20
BB32
BD10
BD12
BD14
AR5
VSS_248
AR7
VSS_249
VSS_250
VSS_251
VSS_252
VSS_253
VSS_254
VSS_255
VSS_256
VSS_257
AU5
VSS_258
AU8
VSS_259
VSS_260
VSS_261
VSS_262
VSS_263
VSS_264
VSS_265
VSS_266
VSS_267
AV1
VSS_268
AV5
VSS_269
AV7
VSS_270
VSS_271
VSS_272
VSS_273
VSS_274
VSS_275
VSS_276
VSS_277
VSS_278
VSS_279
VSS_280
AW5
VSS_281
VSS_282
AY6
VSS_283
AY7
VSS_284
AY8
VSS_285
VSS_286
VSS_287
VSS_288
VSS_289
VSS_290
VSS_291
VSS_292
VSS_293
VSS_294
VSS_295
VSS_296
VSS_297
VSS_298
VSS_299
VSS_300
VSS_301
BB1
VSS_302
VSS_303
VSS_304
BD3
VSS_305
BD7
VSS_306
VSS_307
VSS_308
VSS_309
@
UC2K
GND/RSVD
VSS_310
VSS_311
VSS_312
VSS_313
VSS_314
VSS_315
RSVD_1
RSVD_5
RSVD_7
RSVD_8
RSVD_9
RSVD_10
RSVD_11
RSVD_12
RSVD_13
RSVD_22
RSVD_23
RSVD_30
RSVD_31
RSVD_37
RSVD_44
RSVD_49
RSVD_50
RSVD_57
RSVD_58
RSVD_59
RSVD_60
RSVD_69
RSVD_70
RSVD_71
RSVD_74
RSVD_75
RSVD_78
RSVD_79
RSVD_80
RSVD_81
RSVD_82
RSVD_83
RSVD_87
RSVD_88
RSVD_14
RSVD_84
RSVD_85
RSVD_86
FP5 REV 0.90
PART 11 OF 13
AMD-RAVEN-FP5_BGA1140
BD16
BD19
BD21
BD23
BD26
BD30
B20
G3
J20
K3
K6
K20
M3
M6
M13
P6
P22
T3
T6
T29
W6
W21
W22
Y21
Y27
AA3
AA6
AC29
AD3
AD6
AF3
AF6
AF30
AJ6
AJ24
AK23
AK27
AL3
AN29
AN31
M14
AL6
AL11
AN16
1 2
RC3103 0_0402_5%@
1 2
RC3104 0_0402_5%@
1 2
RC3105 0_0402_5%@
1 2
RC3106 0_0402_5%@
APU_PLLTEST0
APU_PLLTEST1
APU_DBRDY
TC2
1
@
APU_PLLTEST0 6
APU_PLLTEST1 6
APU_DBRDY 6
A A
Title
Title
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE S ECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE S ECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE S ECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CE NTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CE NTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CE NTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF LC FUTURE CENTER.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF LC FUTURE CENTER.
3
2013/08/15
2013/08/15
2013/08/15
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2013/08/15
2013/08/15
2013/08/15
Title
FP5 GND
FP5 GND
FP5 GND
Size
Size
Size
Document Number Re v
Document Number Re v
Document Number Re v
C
C
C
Date: Sheet o f
Date: Sheet o f
Date: Sheet o f
Friday, March 23, 2018
Friday, March 23, 2018
Friday, March 23, 2018
YOGA530-ARR
YOGA530-ARR
YOGA530-ARR
1
12 48
12 48
12 48
1.0
1.0
1.0
5
D D
PCH_SPI_CLK8 SYS_RESET#7
PCH_SPI_CLK
4
+1.8VS +1.8VALW +3VALW_APU
RC3134
10K_0402_5%@
12
RC3133
10K_0402_5%
12
RC3234
2K_0402_5%
@
12
RC156
10K_0402_5%
12
RC163
2K_0402_5%
@
12
3
2
1
STRAP PINS
PCH_SPI_CLK
C C
SYS_RESET#
1:USE 48MHZ CRYSTAL CLOCK AND
GENERATE BOTH INTERNAL AND EXTERNAL CLOCKS(DEFAULT)
0:USE 100MHZ PCIE CLOCK AS REFERENCE CLOCK AND
GENERATE INTERNAL CLOCKS ONLY
1:NORMAL RESET MODE(DEFAULT)
SYS_RESET#
0:SHORT RESET MODE
LPC ROM EMULATOR HEADER
+3VALW_APU +3VS_APU
15P_0402_50V8J
CC1387
B B
CLK_PCI_EC8,33
LPC_FRAME#8,33
APU_LPC_RST#8,33
LPC_AD38,33
LPC_AD08,33
I2C3_SCL7,22
LPCPD#8
@
CLK_PCI_EC
LPC_FRAME#
APU_LPC_RST#
LPC_AD3
LPC_AD0
LPCPD#
RC3147
UNNAMED_16_CAP_I116_B
1 2
12
33_0402_5%
@
RC40 0_0402_5%LPC@
RC43 0_0402_5%LPC@
0.1U_0201_6.3V6-K
CD42
LPC@
12
12
RC41
LPC@
12
0_0402_5%
LPC_RST#_H
1
2
RC42
12
LPC@
LPCRUNPWR
I2C3_SCL_LPC
1
2
0_0402_5%
PAD @
PAD @
PAD @
PAD @
PAD @
PAD @
PAD @
PAD @
PAD @
PAD @
CD43
0.1U_0201_6.3V6-K
LPC@
PIN4 should be removed as a Key
DAISY CHAIN ROUTING FOR LPC SIGNALS
1
IT9
1
IT10
1
IT11
1
IT12
1
IT13
1
IT14
1
IT15
1
IT16
1
IT17
1
IT18
1
PAD
IT20
@
1
PAD
IT21
@
1
PAD
IT22
@
1
PAD
IT24
@
1
PAD
IT25
@
1
PAD
IT26
@
1
PAD
IT27
@
@
RC44 0_0402_5%
LPC_AD1
I2C3_SDA_LPC
SERIRQ
LPC_CLKRUN#
LDRQ0#
12
RC3153 0_0402_5%LPC@
1 2
PM_SLP_S5#
LPC_AD2
PM_SLP_S5# 7,33
LPC_AD2 8,33
LPC_AD1 8,33
I2C3_SDA 7,22
SERIRQ 8,33
LPC_CLKRUN# 8
LDRQ0# 8
+3VS_APU
1 2
RC3214 10K_0402_5%LPC@
1 2
RC3215 10K_0402_5%@
1 2
A A
5
RC3216 100K_0402_5%LPC@
1 2
CC1392 150P_0402_50V8-J@
4
RC3152 RC3153 should be put on APU side to reduce stub when MP
LPCPD#
LPC_CLKRUN#
APU_LPC_RST#
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE S ECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE S ECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE S ECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CE NTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CE NTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CE NTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF LC FUTURE CENTER.
3
2013/08/15
2013/08/15
2013/08/15
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2013/08/15
2013/08/15
2013/08/15
Title
Title
Title
FP5 Straps
FP5 Straps
FP5 Straps
Size
Size
Size
Document Number Re v
Document Number Re v
Document Number Re v
C
C
C
Date: Sheet o f
Date: Sheet o f
Date: Sheet o f
Friday, March 23, 2018
Friday, March 23, 2018
Friday, March 23, 2018
YOGA530-ARR
YOGA530-ARR
YOGA530-ARR
1
13 48
13 48
13 48
1.0
1.0
1.0
5
D D
DDR_A_D5
DDR_A_D1
DDR_A_DQS#0
DDR_A_DQS0
DDR_A_D7
DDR_A_D3
DDR_A_D10
DDR_A_D13
DDRA_MA_DM1
DDR_A_D15
DDR_A_D14
DDR_A_D21
DDR_A_D17
DDR_A_DQS#2
DDR_A_DQS2
DDR_A_D23
DDR_A_D19
DDR_A_D29
DDR_A_D25
DDRA_MA_DM3
DDR_A_D30
DDR_A_D26
C C
+1.2V
1 2
RD273 240_0201_1%@
1 2
RD274 240_0201_1%@
DDR_A_CKE05
DDR_A_BG15
DDR_A_BG05
DDR_A_CKE0
DDR_A_BG1
DDR_A_BG0
DDR_A_MA12
DDR_A_MA9
DDR_A_MA8
DDR_A_MA6
+1.2V
JDDR1A
1
VSS_1
3
DQ5
5
VSS_3
7
DQ1
9
VSS_5
11
DQS0_C
13
DQS0_t
15
VSS_8
17
DQ7
19
VSS_10
21
DQ3
23
VSS_12
25
DQ13
27
VSS_14
29
DQ9
31
VSS_16
33
DM1_n/DBl1_n/NC
35
VSS_17
37
DQ15
39
VSS_19
41
DQ10
43
VSS_21
45
DQ21
47
VSS_23
49
DQ17
51
VSS_25
53
DQS2_c
55
DQS2_t
57
VSS_28
59
DQ23
61
VSS_30
63
DQ19
65
VSS_32
67
DQ29
69
VSS_34
71
DQ25
73
VSS_36
75
DM3_n/DBl3_n/NC
77
VSS_37
79
DQ30
81
VSS_39
83
DQ26
85
VSS_41
87
CB5/NC
89
VSS_43
91
CB1/NC
93
VSS_45
95
DQS8_c
97
DQS8_t
99
VSS_48
101
CB2/NC
103
VSS_50
105
CB3/NC
107
VSS_52
109
CKE0
111
VDD_1
113
BG1
115
BG0
117
VDD_3
119
A12
121
A9
123
VDD_5
125
A8
127
A6
129
VDD_7
ARGOS_D4AR0-26001-1P40
ME@
+1.2V
12
RD10
1K_0402_1%
VSS_2
VSS_4
VSS_6
DM0_n/DBIO_n/NC
VSS_7
VSS_9
VSS_11
VSS_13
VSS_15
DQS1_c
DQS1_t
VSS_18
VSS_20
VSS_22
VSS_24
VSS_26
DM2_n/DBl2_n/NC
VSS_27
VSS_29
VSS_31
VSS_33
VSS_35
DQS3_c
DQS3_t
VSS_38
VSS_40
VSS_42
CB4/NC
VSS_44
CB0/NC
VSS_46
DM8_n/DBI8_n/NC
VSS_47
CB6/NC
VSS_49
CB7/NC
VSS_51
RESET_n
VDD_2
ACT_n
ALERT_n
VDD_4
VDD_6
VDD_8
M_VREF_CA_DIMMA
2
4
DQ4
6
8
DQ0
10
12
14
16
DQ6
18
20
DQ2
22
24
DQ12
26
28
DQ8
30
32
34
36
38
DQ14
40
42
DQ11
44
46
DQ20
48
50
DQ16
52
54
56
58
DQ22
60
62
DQ18
64
66
DQ28
68
70
DQ24
72
74
76
78
80
DQ31
82
84
DQ27
86
88
90
92
94
96
98
100
102
104
106
108
110
CKE1
112
114
116
118
120
A11
122
A7
124
126
A5
128
A4
130
15mil
RD11
1
1
B B
1K_0402_1%
1 2
1U_0201_6.3V6-K
1
CD262
2
2
2
CD116
CD117
0.1U_0201_6.3V6-K
1000P_0201_50V7-K
+1.2V
DDR_A_D4
DDR_A_D0
DDRA_MA_DM0
DDR_A_D6
DDR_A_D2
DDR_A_D12
DDR_A_D8
DDR_A_DQS#1
DDR_A_DQS1
DDR_A_D9
DDR_A_D11
DDR_A_D20
DDR_A_D16
DDRA_MA_DM2
DDR_A_D22
DDR_A_D18
DDR_A_D28
DDR_A_D24
DDR_A_DQS#3
DDR_A_DQS3
DDR_A_D31
DDR_A_D27
DDR_A_CKE1
DDR_A_ACT_N
DDR_A_ALERT_N
DDR_A_MA11
DDR_A_MA7
DDR_A_MA5
DDR_A_MA4
4
DDRA_MA_DM[0..7] 5
DDR_A_D[0..63] 5
DDR_A_MA[0..13] 5
DDR_A_DQS#[0..7] 5
DDR_A_DQS[0..7] 5
+1.2V
12
RD9
1K_0201_1%
@
DDR4_A_DRAMRST# 5
DDR_A_CKE1 5
DDR_A_ACT_N 5
DDR_A_ALERT_N 5
1 2
RD276 0_0402_5%@
1
CD30
EMC_NS@
2
0.1U_0201_6.3V6-K
+3VS
3
+1.2V+2.5V
DDR_A_MA3
DDR_A_MA1
DDR_A_CS0#5
DDR_A_WE#5
DDR_A_ODT05
DDR_A_CS1#5
DDR_A_ODT15
DDR_A_BA15
1
CD28
0.1U_0201_6.3V6-K
2
SA_CLK_DDR0
SA_CLK_DDR#0
DDR_A_PARITY
DDR_A_BA1
DDR_A_CS0#
DDR_A_WE#
DDR_A_ODT0
DDR_A_CS1#
DDR_A_ODT1
DDR_A_D37
DDR_A_D33
DDR_A_DQS#4
DDR_A_DQS4
DDR_A_D38
DDR_A_D34
DDR_A_D44
DDR_A_D40
DDRA_MA_DM5
DDR_A_D46
DDR_A_D42
DDR_A_D52
DDR_A_D49
DDR_A_DQS#6
DDR_A_DQS6
DDR_A_D55
DDR_A_D51
DDR_A_D61
DDR_A_D60
DDRA_MA_DM7
DDR_A_D56
DDR_A_D57
APU_SMB_CLK
2
1
CD29
2.2U_0402_6.3V6M
SA_CLK_DDR05
SA_CLK_DDR#05
DDR_A_PARITY5
APU_SMB_CLK7,15,29
JDDR1B
131
A3
133
A1
135
VDD_9
137
CK0_t
139
CK0_c
141
VDD_11
143
Parity
145
BA1
147
VDD_13
149
CS0_n
151
WE_n/A14
153
VDD_15
155
ODT0
157
CS1_n
159
VDD_17
161
ODT1
163
VDD_19
165
C1/CS3_n/NC
167
VSS_53
169
DQ37
171
VSS_55
173
DQ33
175
VSS_57
177
DQS4_c
179
DQS4_t
181
VSS_60
183
DQ38
185
VSS_62
187
DQ34
189
VSS_64
191
DQ44
193
VSS_66
195
DQ40
197
VSS_68
199
DM5_n/DBl5_n/NC
201
VSS_69
203
DQ46
205
VSS_71
207
DQ42
209
VSS_73
211
DQ52
213
VSS_75
215
DQ49
217
VSS_77
219
DQS6_c
221
DQS6_t
223
VSS_80
225
DQ55
227
VSS_82
229
DQ51
231
VSS_84
233
DQ61
235
VSS_86
237
DQ56
239
VSS_88
241
DM7_n/DBl7_n/NC
243
VSS_89
245
DQ62
247
VSS_91
249
DQ58
251
VSS_93
253
SCL
255
VDDSPD
257
VPP_1
259
VPP_2
261
GND_1
ARGOS_D4AR0-26001-1P40
ME@
C0/CS2_n/NC
DM4_n/DBl4_n/NC
DM6_n/DBl6_n/NC
EVENT_n
VDD_10
CK1_t
CK1_c
VDD_12
A10/AP
VDD_14
RAS_n/A16
VDD_16
CAS_n/A15
VDD_18
VREFCA
VSS_54
VSS_56
VSS_58
VSS_59
VSS_61
VSS_63
VSS_65
VSS_67
DQS5_c
DQS5_t
VSS_70
VSS_72
VSS_74
VSS_76
VSS_78
VSS_79
VSS_81
VSS_83
VSS_85
VSS_87
DQS7_c
DQS7_t
VSS_90
VSS_92
VSS_94
GND_2
2
+1.2V
+0.6VS+1.2V
DDR_A_MA2
132
A2
134
136
SA_CLK_DDR1
138
SA_CLK_DDR#1
140
142
DDR_A_MA0
144
A0
BA0
A13
SA2
DQ36
DQ32
DQ39
DQ35
DQ45
DQ41
DQ47
DQ43
DQ53
DQ48
DQ54
DQ50
DQ60
DQ57
DQ63
DQ59
SDA
SA0
VTT
SA1
DDR_A_MA10
146
148
DDR_A_BA0
150
DDR_A_RAS#
152
154
DDR_A_CAS#
156
DDR_A_MA13
158
160
162
M_VREF_CA_DIMMA
164
SA2_CHA_P
166
168
DDR_A_D36
170
172
DDR_A_D32
174
176
DDRA_MA_DM4
178
180
DDR_A_D39
182
184
DDR_A_D35
186
188
DDR_A_D45
190
192
DDR_A_D41
194
196
DDR_A_DQS#5
198
DDR_A_DQS5
200
202
DDR_A_D47
204
206
DDR_A_D43
208
210
DDR_A_D53
212
214
DDR_A_D48
216
218
DDRA_MA_DM6
220
222
DDR_A_D54
224
226
DDR_A_D50
228
230
DDR_A_D63
232
234
DDR_A_D59
236
238
DDR_A_DQS#7
240
DDR_A_DQS7
242
244
DDR_A_D62
246
248
DDR_A_D58
250
252
APU_SMB_DATA
254
SA0_CHA_P
256
258
SA1_CHA_P
260
262
12
RD3
1K_0201_1%
DDR_A_EVENT# 5
SA_CLK_DDR1 5
SA_CLK_DDR#1 5
DDR_A_BA0 5
DDR_A_RAS# 5
DDR_A_CAS# 5
APU_SMB_DATA 7,15,29
1
Swap Table
n Name
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQS#0
DQS0
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQS#1
DQS1
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQS#2
DQS2
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQS#3
DQS3
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQS#4
DQS4
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQS#5
DQS5
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQS#6
DQS6
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
DQS#7
DQS7
Net NamePi
DDRA_DQ6
DDRA_DQ5
DDRA_DQ2
DDRA_DQ3
DDRA_DQ4
DDRA_DQ0
DDRA_DQ1
DDRA_DQ7
DDRA_DQS#0
DDRA_DQS0
DDRA_DQ12
DDRA_DQ13
DDRA_DQ14
DDRA_DQ10
DDRA_DQ9
DDRA_DQ8
DDRA_DQ15
DDRA_DQ11
DDRA_DQS#1
DDRA_DQS1
DDRA_DQ20
DDRA_DQ21
DDRA_DQ22
DDRA_DQ19
DDRA_DQ16
DDRA_DQ17
DDRA_DQ23
DDRA_DQ18
DDRA_DQS#2
DDRA_DQS2
DDRA_DQ29
DDRA_DQ25
DDRA_DQ31
DDRA_DQ27
DDRA_DQ28
DDRA_DQ24
DDRA_DQ26
DDRA_DQ30
DDRA_DQS#3
DDRA_DQS3
DDRA_DQ37
DDRA_DQ33
DDRA_DQ34
DDRA_DQ38
DDRA_DQ32
DDRA_DQ36
DDRA_DQ35
DDRA_DQ39
DDRA_DQS#4
DDRA_DQS4
DDRA_DQ44
DDRA_DQ40
DDRA_DQ47
DDRA_DQ43
DDRA_DQ41
DDRA_DQ45
DDRA_DQ46
DDRA_DQ42
DDRA_DQS#5
DDRA_DQS5
DDRA_DQ52
DDRA_DQ48
DDRA_DQ55
DDRA_DQ50
DDRA_DQ49
DDRA_DQ53
DDRA_DQ54
DDRA_DQ51
DDRA_DQS#6
DDRA_DQS6
DDRA_DQ60
DDRA_DQ56
DDRA_DQ63
DDRA_DQ59
DDRA_DQ61
DDRA_DQ57
DDRA_DQ58
DDRA_DQ62
DDRA_DQS#7
DDRA_DQS7
+3VS +3VS
12
RD26
10K_0402_5%
@
12
@
A A
SPD Address = A0H
5
+3VS
12
RD269
10K_0402_5%
@
SA0_CHA_P SA1_CHA_P SA2_CHA_P
12
RD268
0_0402_5%
@
RD28
0_0402_5%
12
12
@
RD270
10K_0402_5%
@
RD29
0_0402_5%
+0.6VS
0.1U_0201_6.3V6-K
1
CD249
CD251
@
2
+2.5V
follow CRB 1pcs 1uf + 2pcs 0.1uf + 1pcs 180pf
1U_0402_6.3V6K
1
CD122
CD123
2
4
0.1U_0201_6.3V6-K
0.1U_0201_6.3V6-K
1
CD250
@
2
0.1U_0201_6.3V6-K
1
CD124
2
4.7U_0402_6.3V6M
1
1
CD248
2
2
180P_0402_50V8-J
0.1U_0201_6.3V6-K
1
1
CC206
2
2
3
+1.2V
follow CRB 6pcs 0.1uffollow CRB 1pcs 4.7uf + 1pcs 0.1uf
0.1U_0201_6.3V6-K
1
CD16
CD17
2
+1.2V
1
@
CD261
2
10U_0402_6.3V6M
0.1U_0201_6.3V6-K
0.1U_0201_6.3V6-K
1
CD18
2
1
CD63
@
2
10U_0402_6.3V6M
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS T HE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS C ONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS T HE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS C ONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS T HE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS C ONFIDENTIAL
AND TRADE SECRET I NFORMATION. THIS SHEET MAY NOT BE TRANSFERE D FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET I NFORMATION. THIS SHEET MAY NOT BE TRANSFERE D FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET I NFORMATION. THIS SHEET MAY NOT BE TRANSFERE D FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY L C FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY L C FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY L C FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN C ONSENT OF LC FUTURE CE NTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN C ONSENT OF LC FUTURE CE NTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN C ONSENT OF LC FUTURE CE NTER.
0.1U_0201_6.3V6-K
1
1
CD21
CD20
2
2
12
12
CD67
CD66
22U_0603_6.3V6-M
22U_0603_6.3V6-M
1
2
12
2013/08/15
2013/08/15
2013/08/15
0.1U_0201_6.3V6-K
CD22
CD44
22U_0603_6.3V6-M
2
0.1U_0201_6.3V6-K
0.1U_0201_6.3V6-K
1
1
CD58
CD23
EMC@
@
2
2
12
CD45
22U_0603_6.3V6-M
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
27P 25V J NPO 0201
1
2
1
2
0.1U_0201_6.3V6-K
1
CD59
@
2
CD19
22P_0402_50V8-J
RF@
CD60
EMC@
1
2
2013/08/15
2013/08/15
2013/08/15
27P 25V J NPO 0201
1
2
CD260
22P_0402_50V8-J
RF@
0.1U_0201_6.3V6-K
1
CD61
@
2
180P_0402_50V8-J
0.1U_0201_6.3V6-K
1
1
CC211
CD62
@
2
2
1
CD12
22P_0402_50V8-J
RF@
2
RF
Title
Title
Title
DDRIV SO-DIMM A
DDRIV SO-DIMM A
DDRIV SO-DIMM A
Size
Size
Size
Document N umber Rev
Document N umber Rev
Document N umber Rev
Custom
Custom
Custom
Date: Shee t o f
Date: Shee t o f
Date: Shee t o f
Friday, March 23, 2018
Friday, March 23, 2018
Friday, March 23, 2018
1
YOGA530-ARR
YOGA530-ARR
YOGA530-ARR
14 48
14 48
14 48
1.0
1.0
1.0
Layout Note: Place near JDDR1
5
JDDR2A
+1.2V +1.2V
DDR_B_D5
D D
C C
DDR_B_CKE05
DDR_B_BG15
DDR_B_BG05
B B
A A
DDR_B_D1
DDR_B_DQS#0
DDR_B_DQS0
DDR_B_D7
DDR_B_D3
DDR_B_D13
DDR_B_D9
DDRB_MB_DM1
DDR_B_D15
DDR_B_D10
DDR_B_D21
DDR_B_D17
DDR_B_DQS#2
DDR_B_DQS2
DDR_B_D23
DDR_B_D19
DDR_B_D29
DDR_B_D25
DDRB_MB_DM3
DDR_B_D30
DDR_B_D26
+1.2V
1 2
RD14 240_0201_1%@
1 2
RD15 240_0201_1%@
DDR_B_CKE0
DDR_B_BG1
DDR_B_BG0
DDR_B_MA12
DDR_B_MA9
DDR_B_MA8
DDR_B_MA6
+3VS +3VS
12
RD4
10K_0402_5%
@
12
RD7
@
0_0402_5%
1
VSS_1
3
DQ5
5
VSS_3
7
DQ1
9
VSS_5
11
DQS0_C
13
DQS0_t
15
VSS_8
17
DQ7
19
VSS_10
21
DQ3
23
VSS_12
25
DQ13
27
VSS_14
29
DQ9
31
VSS_16
33
DM1_n/DBl1_n/NC
35
VSS_17
37
DQ15
39
VSS_19
41
DQ10
43
VSS_21
45
DQ21
47
VSS_23
49
DQ17
51
VSS_25
53
DQS2_c
55
DQS2_t
57
VSS_28
59
DQ23
61
VSS_30
63
DQ19
65
VSS_32
67
DQ29
69
VSS_34
71
DQ25
73
VSS_36
75
DM3_n/DBl3_n/NC
77
VSS_37
79
DQ30
81
VSS_39
83
DQ26
85
VSS_41
87
CB5/NC
89
VSS_43
91
CB1/NC
93
VSS_45
95
DQS8_c
97
DQS8_t
99
VSS_48
101
CB2/NC
103
VSS_50
105
CB3/NC
107
VSS_52
109
CKE0
111
VDD_1
113
BG1
115
BG0
117
VDD_3
119
A12
121
A9
123
VDD_5
125
A8
127
A6
129
VDD_7
ARGOS_D4AR0-26001-1P40
ME@
+1.2V
12
RD1
1K_0402_1%
15mil
RD2
1
1K_0402_1%
CD1
1 2
2
+3VS
12
RD5
10K_0402_5%
SA0_CHB_P SA1_CHB_P SA2_CHB_P
12
RD8
0_0402_5%
@
DM0_n/DBIO_n/NC
DM2_n/DBl2_n/NC
DM8_n/DBI8_n/NC
1
CD2
2
0.1U_0201_6.3V6-K
2
VSS_2
4
DQ4
6
VSS_4
8
DQ0
10
VSS_6
12
14
VSS_7
16
DQ6
18
VSS_9
20
DQ2
22
VSS_11
24
DQ12
26
VSS_13
28
DQ8
30
VSS_15
32
DQS1_c
34
DQS1_t
36
VSS_18
38
DQ14
40
VSS_20
42
DQ11
44
VSS_22
46
DQ20
48
VSS_24
50
DQ16
52
VSS_26
54
56
VSS_27
58
DQ22
60
VSS_29
62
DQ18
64
VSS_31
66
DQ28
68
VSS_33
70
DQ24
72
VSS_35
74
DQS3_c
76
DQS3_t
78
VSS_38
80
DQ31
82
VSS_40
84
DQ27
86
VSS_42
88
CB4/NC
90
VSS_44
92
CB0/NC
94
VSS_46
96
98
VSS_47
100
CB6/NC
102
VSS_49
104
CB7/NC
106
VSS_51
108
RESET_n
110
CKE1
112
VDD_2
114
ACT_n
116
ALERT_n
118
VDD_4
120
A11
122
A7
124
VDD_6
126
A5
128
A4
130
VDD_8
M_VREF_CA_DIMMB
1
CD3
2
0.1U_0201_6.3V6-K
1000P_0201_50V7-K
12
RD6
10K_0402_5%
@
12
RD12
@
0_0402_5%
DDR_B_D4
DDR_B_D0
DDRB_MB_DM0
DDR_B_D6
DDR_B_D2
DDR_B_D12
DDR_B_D8
DDR_B_DQS#1
DDR_B_DQS1
DDR_B_D14
DDR_B_D11
DDR_B_D20
DDR_B_D16
DDRB_MB_DM2
DDR_B_D22
DDR_B_D18
DDR_B_D28
DDR_B_D24
DDR_B_DQS#3
DDR_B_DQS3
DDR_B_D31
DDR_B_D27
DDR4_B_DRAMRST#
DDR_B_CKE1
DDR_B_ACT_N
DDR_B_ALERT_N
DDR_B_MA11
DDR_B_MA7
DDR_B_MA5
DDR_B_MA4
4
+1.2V
12
RD20
1K_0201_1%
@
1
CD348
EMC_NS@
2
0.1U_0201_6.3V6-K
DDRB_MB_DM[0..7] 5
DDR_B_D[0..63] 5
DDR_B_MA[0..13] 5
DDR_B_DQS#[0..7] 5
DDR_B_DQS[0..7] 5
DDR4_B_DRAMRST# 5
DDR_B_CKE1 5
DDR_B_ACT_N 5
DDR_B_ALERT_N 5
RD21 0_0402_5%@
+3VS
Layout Note: Place near JDDR2
+0.6VS
ollow CRB 1pcs 4.7uf + 1pcs 0.1uf
f
0.1U_0201_6.3V6-K
0.1U_0201_6.3V6-K
1
CD25
CD26
@
2
+2.5V
follow CRB 1pcs 1uf + 2pcs 0.1uf + 1pcs 180pf
1U_0402_6.3V6K
1
CD40
CD39
2
0.1U_0201_6.3V6-K
1
1
CD31
CD27
@
2
2
0.1U_0201_6.3V6-K
0.1U_0201_6.3V6-K
1
1
CD41
CC4
2
2
1 2
4.7U_0402_6.3V6M
1
2
180P_0402_50V8-J
1
2
3
JDDR2B
1
CD350
2.2U_0402_6.3V6M
2
1
CD46
2
10U_0402_6.3V6M
CD4
1
CD32
2
10U_0402_6.3V6M
+1.2V+2.5V
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
201
203
205
207
209
211
213
215
217
219
221
223
225
227
229
231
233
235
237
239
241
243
245
247
249
251
253
255
257
259
261
ARGOS_D4AR0-26001-1P40
ME@
+1.2V
follow CRB 6pcs 0.1uf
0.1U_0201_6.3V6-K
1
CD5
2
+1.2V
1
CD33
2
10U_0402_6.3V6M
A3
A1
VDD_9
CK0_t
CK0_c
VDD_11
Parity
BA1
VDD_13
CS0_n
WE_n/A14
VDD_15
ODT0
CS1_n
VDD_17
ODT1
VDD_19
C1/CS3_n/NC
VSS_53
DQ37
VSS_55
DQ33
VSS_57
DQS4_c
DM4_n/DBl4_n/NC
DQS4_t
VSS_60
DQ38
VSS_62
DQ34
VSS_64
DQ44
VSS_66
DQ40
VSS_68
DM5_n/DBl5_n/NC
VSS_69
DQ46
VSS_71
DQ42
VSS_73
DQ52
VSS_75
DQ49
VSS_77
DQS6_c
DM6_n/DBl6_n/NC
DQS6_t
VSS_80
DQ55
VSS_82
DQ51
VSS_84
DQ61
VSS_86
DQ56
VSS_88
DM7_n/DBl7_n/NC
VSS_89
DQ62
VSS_91
DQ58
VSS_93
SCL
VDDSPD
VPP_1
VPP_2
GND_1
0.1U_0201_6.3V6-K
1
CD6
2
1
CD34
2
10U_0402_6.3V6M
EVENT_n
VDD_10
VDD_12
A10/AP
VDD_14
RAS_n/A16
VDD_16
CAS_n/A15
VDD_18
C0/CS2_n/NC
VREFCA
VSS_54
VSS_56
VSS_58
VSS_59
VSS_61
VSS_63
VSS_65
VSS_67
DQS5_c
DQS5_t
VSS_70
VSS_72
VSS_74
VSS_76
VSS_78
VSS_79
VSS_81
VSS_83
VSS_85
VSS_87
DQS7_c
DQS7_t
VSS_90
VSS_92
VSS_94
GND_2
0.1U_0201_6.3V6-K
1
2
1
2
@
DDR_B_MA3
DDR_B_MA1
1
CD349
0.1U_0201_6.3V6-K
2
SB_CLK_DDR0
SB_CLK_DDR#0
DDR_B_PARITY
DDR_B_BA1
DDR_B_CS0#
DDR_B_WE#
DDR_B_ODT0
DDR_B_CS1#
DDR_B_ODT1
DDR_B_D37
DDR_B_D33
DDR_B_DQS#4
DDR_B_DQS4
DDR_B_D38
DDR_B_D34
DDR_B_D44
DDR_B_D40
DDRB_MB_DM5
DDR_B_D46
DDR_B_D42
DDR_B_D52
DDR_B_D49
DDR_B_DQS#6
DDR_B_DQS6
DDR_B_D55
DDR_B_D51
DDR_B_D61
DDR_B_D56
DDRB_MB_DM7
DDR_B_D62
DDR_B_D58
APU_SMB_CLK
CD47
SB_CLK_DDR05
SB_CLK_DDR#05
DDR_B_PARITY5
DDR_B_BA15
DDR_B_CS0#5
DDR_B_WE#5
DDR_B_ODT05
DDR_B_CS1#5
DDR_B_ODT15
APU_SMB_CLK7,14,29
2
+1.2V
12
0.1U_0201_6.3V6-K
1
CD10
@
2
1
2
RD13
1K_0201_1%
DDR_B_EVENT# 5
SB_CLK_DDR1 5
SB_CLK_DDR#1 5
DDR_B_BA0 5
DDR_B_RAS# 5
DDR_B_CAS# 5
APU_SMB_DATA 7,14,29
0.1U_0201_6.3V6-K
27P 25V J NPO 0201
1
1
CD11
EMC@
2
2
1
CD37
22P_0402_50V8-J
RF@
2
RF@
1
CD13
@
2
CD38
22P_0201_258J
RF
27P 25V J NPO 0201
0.1U_0201_6.3V6-K
1
1
CD14
CD15
EMC@
@
2
2
+0.6VS+1.2V
DDR_B_MA2
132
A2
134
136
SB_CLK_DDR1
138
CK1_t
CK1_c
A0
BA0
A13
SA2
DQ36
DQ32
DQ39
DQ35
DQ45
DQ41
DQ47
DQ43
DQ53
DQ48
DQ54
DQ50
DQ60
DQ57
DQ63
DQ59
SDA
SA0
VTT
SA1
CD7
CD35
22U_0402_4V6-M
SB_CLK_DDR#1
140
142
DDR_B_MA0
144
DDR_B_MA10
146
148
DDR_B_BA0
150
DDR_B_RAS#
152
154
DDR_B_CAS#
156
DDR_B_MA13
158
160
162
M_VREF_CA_DIMMB
164
SA2_CHB_P
166
168
DDR_B_D36
170
172
DDR_B_D32
174
176
DDRB_MB_DM4
178
180
DDR_B_D39
182
184
DDR_B_D35
186
188
DDR_B_D45
190
192
DDR_B_D41
194
196
DDR_B_DQS#5
198
DDR_B_DQS5
200
202
DDR_B_D47
204
206
DDR_B_D43
208
210
DDR_B_D53
212
214
DDR_B_D48
216
218
DDRB_MB_DM6
220
222
DDR_B_D54
224
226
DDR_B_D50
228
230
DDR_B_D60
232
234
DDR_B_D57
236
238
DDR_B_DQS#7
240
DDR_B_DQS7
242
244
DDR_B_D63
246
248
DDR_B_D59
250
252
APU_SMB_DATA
254
SA0_CHB_P
256
258
SA1_CHB_P
260
262
0.1U_0201_6.3V6-K
0.1U_0201_6.3V6-K
1
1
CD9
CD8
2
2
1
1
CD36
22P_0201_258J
2
2
RF@
10U_0402_6.3V6M
1
Swap Table
Net NamePin Name
DDRA_DQ6
DQ0
DDRA_DQ5
DQ1
DDRA_DQ2
DQ2
DDRA_DQ3
DQ3
DDRA_DQ4
DQ4
DDRA_DQ0
DQ5
DDRA_DQ1
DQ6
DDRA_DQ7
DQ7
DDRA_DQS#0
DQS#0
DDRA_DQS0
DQS0
DDRA_DQ12
DQ8
DDRA_DQ13
DQ9
DDRA_DQ14
DQ10
DDRA_DQ10
DQ11
DDRA_DQ9
DQ12
DDRA_DQ8
DQ13
DDRA_DQ15
DQ14
DDRA_DQ11
DQ15
DDRA_DQS#1
DQS#1
DDRA_DQS1
DQS1
DQ16
DDRA_DQ20
DQ17
DDRA_DQ21
DQ18
DDRA_DQ22
DQ19
DDRA_DQ19
DQ20
DDRA_DQ16
DQ21
DDRA_DQ17
DQ22
DDRA_DQ23
DQ23
DDRA_DQ18
DQS#2
DDRA_DQS#2
DQS2
DDRA_DQS2
DDRA_DQ29
DQ24
DDRA_DQ25
DQ25
DDRA_DQ31
DQ26
DDRA_DQ27
DQ27
DDRA_DQ28
DQ28
DDRA_DQ24
DQ29
DDRA_DQ26
DQ30
DDRA_DQ30
DQ31
DDRA_DQS#3
DQS#3
DDRA_DQS3
DQS3
DDRA_DQ37
DQ32
DDRA_DQ33
DQ33
DDRA_DQ34
DQ34
DDRA_DQ38
DQ35
DDRA_DQ32
DQ36
DDRA_DQ36
DQ37
DDRA_DQ35
DQ38
DDRA_DQ39
DQ39
DDRA_DQS#4
DQS#4
DDRA_DQS4
DQS4
DDRA_DQ44
DQ40
DDRA_DQ40
DQ41
DDRA_DQ47
DQ42
DDRA_DQ43
DQ43
DDRA_DQ41
DQ44
DDRA_DQ45
DQ45
DDRA_DQ46
DQ46
DDRA_DQ42
DQ47
DDRA_DQS#5
DQS#5
DDRA_DQS5
DQS5
DQ48
DDRA_DQ52
DQ49
DDRA_DQ48
DQ50
DDRA_DQ55
DQ51
DDRA_DQ50
DQ52
DDRA_DQ49
DQ53
DDRA_DQ53
DQ54
DDRA_DQ54
DQ55
DDRA_DQ51
DQS#6
DDRA_DQS#6
DQS6
DDRA_DQS6
DDRA_DQ60
DQ56
DDRA_DQ56
DQ57
DDRA_DQ63
DQ58
DDRA_DQ59
DQ59
DDRA_DQ61
DQ60
DDRA_DQ57
DQ61
DDRA_DQ58
DQ62
DDRA_DQ62
DQ63
DDRA_DQS#7
DQS#7
DDRA_DQS7
DQS7
180P_0402_50V8-J
0.1U_0201_6.3V6-K
0.1U_0201_6.3V6-K
1
1
CD24
CC3
@
2
2
SPD Address = A4H
Title
Title
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS T HE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS C ONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS T HE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS C ONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS T HE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS C ONFIDENTIAL
AND TRADE SECRET I NFORMATION. THIS SHEET MAY NOT BE TRANSFERE D FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET I NFORMATION. THIS SHEET MAY NOT BE TRANSFERE D FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET I NFORMATION. THIS SHEET MAY NOT BE TRANSFERE D FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY L C FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY L C FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY L C FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN C ONSENT OF LC FUTURE CE NTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN C ONSENT OF LC FUTURE CE NTER.
5
4
3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN C ONSENT OF LC FUTURE CE NTER.
2013/08/15
2013/08/15
2013/08/15
2
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2013/08/15
2013/08/15
2013/08/15
Title
DDRIV SO-DIMM A
DDRIV SO-DIMM A
DDRIV SO-DIMM A
Size
Size
Size
Document Number Rev
Document Number Rev
Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
Friday, March 23, 2018
Friday, March 23, 2018
Friday, March 23, 2018
1
YOGA530-ARR
YOGA530-ARR
YOGA530-ARR
15 48
15 48
15 48
1.0
1.0
1.0
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