lenovo YOGA 3 Schematic

A

1 1

B

C

D

E

2 2

YOGA3-BDW M/B Schematics Document

INTEL Broadwell Mobile ULT Platform
INTEL BDW U-series CPU + DDR3L DIMM+ NV N16S-GT

2014-04-28

REV:1.0

3 3

4 4

Title

Title

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

C

2014/01/11

2014/01/11

2014/01/11

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

D

2013/11/08

2013/11/08

2013/11/08

Title

Cover Page

Cover Page

Cover Page

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

Haydn

Haydn

Haydn

Monday, November 17, 2014

Monday, November 17, 2014

Monday, November 17, 2014

1 45

1 45

E

1 45

1.0

1.0

1.0

5

4

3

2

1

D D

VRAM DDR3L
1~2G 4psc

SINGLE

N15S/N16S-GT

Page 15-23

Micro HDMI Conn.

Page 25

eDP Conn.

SATA/SSHD

C C

SPK Conn.

(1W x 2)

Int. MIC Conn.

PCIe Mini Card
WIFI with BT support,

Codec CX20752

Page 24

Page 32

Page 30

HP&Mic Combo Conn.

iphone type

G-Sensor
BMA222E

B B

E-compass
G-sensor
BMC150

ALS
AL3010

Sensor Board

32.768KHz

Page 7

24MHz

Page 8

PCIE-Port5
GEN2

DDI-Port1

eDP-Port[0:1]

Intel CPU
Broadwell-U SDP 15W

SATA Gen3 Port 1

PCIe Port3

USB 2.0-Port4

HD Audio

I2C

Touch Pad Int.KBD LID

Page 31 Page 30

40x24x1.38 BGA

BGA 1168

Page 4~13

LPC BUS

EC
ITE IT8386 128VFBGA

LID PAD

USB 2.0 1x

USB 2.0 Port 5

Page 29

Memory BUS-ChannelB

1.35V DDR3L 1333/1600 MT/s

USB 2.0-Port0

USB 2.0-Port1

USB 3.0-Port2

USB 2.0-Port2

USB 3.0-Port1

USB 2.0-Port3

USB 2.0-Port6

USB 2.0-Port7

SPI BUS

32.768KHz

Page 29

Int. Camera

USB 3.0/2.0 Right

USB 3.0/2.0 Left

IO/CONN

Touch Screen

DC_IN Combo USB port

USB 2.0 Port 7

SPI ROM

(8MB)

Battery

SMBUS

Thermal Sensor
NCT7718W

USB Board

SO-DIMM DDR3L

UP TO 8G

Page 24

Page 32

Cardreader
Realtek RTS5170

Page 24

Page 7

Page 37

Page 31

Page 14

SD/MMC Conn.

Yoga3 BDW Refresh Block diagram

Sub-board

DMIC SUB

Sensor SUB

A A

USB SUB

Title

Title

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2014/01/11

2014/01/11

2014/01/11

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2013/11/08

2013/11/08

2013/11/08

Title

Block Diagram

Block Diagram

Block Diagram

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

Haydn

Haydn

Haydn

Monday, November 17, 2014

Monday, November 17, 2014

Monday, November 17, 2014

2 45

2 45

1

2 45

1.0

1.0

1.0

5

4

3

2

1

PGOOD

PGOOD

+5VLP/ 100mA

+5VALW/5A

+3VLP/ 100mA

+3VALW/ 5A

+1.35V/8A

+0.68V/1A

+1.05VS/6A

CPU_CORE / 14A

+VGA_CORE/31A

+3VALW

ANPEC

APL5930KAI-TRG

EN

LDO

PAGE 42

+1.5VS/100mA

Silergy

D D

AC Adapter

20V/40W/65W

SYX196C1QNC

Converter

FOR SYSTEM

EN PGOOD

Silergy

SYX196BQNC

Converter

FOR SYSTEM

EN PGOOD

Silergy

TPS51716RUKR

Converter

FOR DDR3L

C C

Battery Charger

SMBus

TI

BQ24715RGRR

Switch Mode

IO Board / Page7

B+

EN PGOOD

PAGE 40

Silergy

SYX198DQNC

Converter

FOR CPU/PCH

EN

PAGE 41

Onsemi

NCP81108MNTXG

Switch Mode

FOR CPU IMVP7

Battery

Li-ion

B B

2S2P /46WH

EN PGOOD

PAGE 43

Onsemi

NCP81172MNTWG

VIDs

Switch Mode

EN

FOR GPU VDDC

A A

Title

Title

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2014/01/11

2014/01/11

2014/01/11

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2013/11/08

2013/11/08

2013/11/08

Title

PWR_BLOCK DIAGRAM

PWR_BLOCK DIAGRAM

PWR_BLOCK DIAGRAM

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

Yoga3-BDW

Yoga3-BDW

Yoga3-BDW

Monday, November 17, 2014

Monday, November 17, 2014

Monday, November 17, 2014

36 45

36 45

1

36 45

1.0

1.0

1.0

A

Voltage Rails

, X --> Means OFF )( O --> Means ON

Power Plane

B+

+3VL

+3VALW

State

1 1

+5VLP

+5VALW

+3VALW_PCH

+1.35V

B

+5VS

+3VS

+1.5VS

+1.05VS

+0.68VS

+CPU_CORE

+1.35V_CPU

C

BOM Structure Table

BOM Structure

DA8@

UMA@ UMA SKU part

DEBUG@ DEBUG CARD Part

ME@ ME part(connector, hole)

RF@

EMC@

CD@ COST DOWN Part

REV@ RESERVER Part

PCB

RF request

EMC request

BOM Structure

MIRROR@ EC Mirror-code enable

OPT@ Discrete GPU SKU part

N15SGT@ For N15S-GT GPU part

GC6@ GC62.0 support part

RANKA@ For VRAM RankA part

EC Mirror-code disableableUNMIRROR@

D

Board ID Table

DescriptionBoard ID

E

PCB Revision

S0

S3

DS3

S5 S4/AC Only

S5 S4
Battery only

S5 S4
AC & Battery

2 2

don't exist

STATE SLP_S3#SLP_S1#

Full ON

S1(Power On Suspend)

S3 (Suspend to RAM)

DS3 (Suspend to RAM) ON OFF OFFLOW LOW HIGH LOW

S4 (Suspend to Disk) ON

S5 (Soft OFF)

SIGNAL

O

O O X

O O X X

O

LOW

LOW HIGH

LOW

LOW LOW

O O O

O

O

O

OO O X

X

O

X

XX

HIGH HIGH

LOW

LOW LOW

X

SLP_S4# +VS+V

+VALW

HIGHHIGHHIGH

ON

ON

ON

ON

ON

LOW OFF

ON

XX

X

+VALW_PCH

ONONON

ONONON

ON

OFF

X

X

Clock

ONON

ON

LOW

OFF OFF

OFF

OFF

OFF

OFF

O

O

BOM Configuration Table

SKU Description BOM Config

SKU1

X

SKU2

X

X

X

X76&VGA Configuration Table

SKU Description BOM Config

SMBUS Control Table

Thermal

GPU

X

X

X

V

X

V

+3VS

X

USB Port Table

0

EXHCI/XHCI

1
2
3
4
5
6
7

PCH

Sensor

X

X

X

X

V

V

+3VALW_PCH

+3VS

X

X

USB20 USB30

CAMERA

Right USB

Left USB

CARD READER

BT

Sensor

TOUCH PANEL

DC_IN combo USB2.0

B

1
2
3
4

charger

Left USB

Right USB

X

X

V

X

X

PCB And LOGO Config

X

PCB

ZZZ1

ZZZ3

DA8@

PCB 0YC NM-A381 REV0 M/B

I7@ ZZZ2

I5@ ZZZ9

LOGO

I3@

ZZZ4

HDMI@ ZZZ5

USB30@

CPU

BDW U2+2 Ci7

ZZZ6

HY2G@ ZZZ7

BDW U2+2 Ci5

MIC2G@ ZZZ8

BDW 2+2U 1.6G 1333 ES2

SAM2G@

HDMI LOGO

USB30 LOGO

VRAM

HYNIX 2G

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

C

MICRON 2G

2014/01/11

2014/01/11

2014/01/11

SAMSUNG 2G

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

D

2013/11/08

2013/11/08

2013/11/08

Title

Title

Title

Notes List

Notes List

Notes List

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

Haydn

Haydn

Haydn

Monday, November 17, 2014

Monday, November 17, 2014

Monday, November 17, 2014

3 45

3 45

E

3 45

1.0

1.0

1.0

+3VLP

touch sensor

V

X

X

X

SODIMMBATTALS

X

X X

X

X

DevicePort

X

X

WLAN

X

GPU

Sensor

SOURCE

3 3

EC_SMB_CLK1

EC_SMB_DAT1

EC_SMB_CLK3

EC_SMB_DAT3

EC_SMB_CLK0

EC_SMB_DAT0 +3VS

SMB_DATA

SM Bus address

Battery

EC1

Charger

4 4

Sensor

EC3

ALS

Thermal Sensor

EC0

PCH THM

TP

PCH

Device

IT8386

+3VALW_EC

IT8386

+3VS

IT8386

PCHSMB_CLK

+3VALW_PCH

address

0001 011X b

1001_100xb

X

X

V

V

+3VS

+3VS

X

X

X

X

PCIE PORT LIST

1
2
3
4
5

A

Haswell MCP (DDI,EDP)

5

4

3

2

+3VS

PCIECLKREQ5#

1

PCIECLKREQ5# 8

D D

@

UC1A

PCH_HDMI_TX2-25
PCH_HDMI_TX2+25
PCH_HDMI_TX1-25
PCH_HDMI_TX1+25
PCH_HDMI_TX0-25
PCH_HDMI_TX0+25
PCH_HDMI_CLK-25
PCH_HDMI_CLK+25

C C

B B

PCH_BKLT_CTRL24
PCH_BKLT_EN24,29
PCH_LCD_VDDEN24

GC6_FB_EN16
PXS_PWREN18
PCH_GPU_RST#16
PCH_GPU_EVENT#16

PCH_BKLT_CTRL
PCH_BKLT_EN
PCH_LCD_VDDEN

PCI_PIRQD#8

GC6_FB_EN
PXS_PWREN
PCH_GPU_RST#
PCH_GPU_EVENT#

Connect to GPU signal :
GC6_FB_EN
PCH_GPU_EVENT#
PCH_GPU_RST#
PCH_PLT_RST#
PXS_PWREN

TP4 @

1 2

RC39 1K_0402_5%OPT@

1 2

RC40 0_0402_5%OPT@

1

PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#

GPIO55

PXS_PWREN_R
PCH_GPU_RST#_R

C54

DDI1_TXN0

C55

DDI1_TXP0

B58

DDI1_TXN1

C58

DDI1_TXP1

B55

DDI1_TXN2

A55

DDI1_TXP2

A57

DDI1_TXN3

B57

DDI1_TXP3

C51

DDI2_TXN0

C50

DDI2_TXP0

C53

DDI2_TXN1

B54

DDI2_TXP1

C49

DDI2_TXN2

B50

DDI2_TXP2

A53

DDI2_TXN3

B53

DDI2_TXP3

HASWELL-ULT-DDR3L_BGA1168

UC1I

@

B8

EDP_BKLCTL

A9

EDP_BKLEN

C6

EDP_VDDEN

U6

PIRQA/GPIO77

P4

PIRQB/GPIO78

N4

PIRQC/GPIO79

N2

PIRQD/GPIO80

AD4

PME

U7

GPIO55

L1

GPIO52

L3

GPIO54

R5

GPIO51

L4

GPIO53

HASWELL-ULT-DDR3L_BGA1168

eDP SIDEBAND

PCIE

HSW_ULT_DDR3L

1 OF 19

HSW_ULT_DDR3L

9 OF 19

EDPDDI

DISPLAY

EDP_TXN0
EDP_TXP0
EDP_TXN1
EDP_TXP1

EDP_TXN2
EDP_TXP2
EDP_TXN3
EDP_TXP3

EDP_AUXN
EDP_AUXP

EDP_RCOMP

EDP_DISP_UTIL

DDPB_CTRLCLK

DDPB_CTRLDATA

DDPC_CTRLCLK

DDPC_CTRLDATA

DDPB_AUXN
DDPC_AUXN
DDPB_AUXP
DDPC_AUXP

DDPB_HPD
DDPC_HPD

EDP_HPD

C45
B46
A47
B47

C47
C46
A49
B49

A45
B45

D20
A43

B9
C9
D9
D11

C5
B6
B5
A6

C8
A8
D6

EDP_COMP

PCH_EDP_TX0- 24
PCH_EDP_TX0+ 24
PCH_EDP_TX1- 24
PCH_EDP_TX1+ 24

PCH_EDP_AUX- 24
PCH_EDP_AUX+ 24

1 2

1

TP1 @

PCH_HDMI_DDC_CLK 25
PCH_HDMI_DDC_DAT 25

PCH_HDMI_HPD 25

PCH_EDP_HPD 24

RC5 24.9_0402_1%

+VCCIOA_OUT

EDP_COMP:

Trace Width:25mil
Space:25mil
Max length:100mil

RC41

1 2

10K_0402_5%

RPC2

1 8
2 7
3 6
4 5

10K_0804_8P4R_5%

1 2

UMA@

RC1 10K_0402_5%

1 2

RC2 10K_0402_5%

1 2

RC3 10K_0402_5%

1 2

@

RC4 10K_0402_5%

1 2

RC6 100K_0402_5%

1 2

RC7 100K_0402_5%

1 2

@

RC8 10K_0402_5%

1 2

RC9 100K_0402_5%

1 2

@

RC10 100K_0402_5%

1 2

@

RC11 10K_0402_5%

Port

DDI PROCESSOR Pin Names

Port 1

DDI1_TXN[0]
DDI1_TXP[0]
DDI1_TXN[1]
DDI1_TXP[1]
DDI1_TXN[2]
DDI1_TXP[2]
DDI1_TXN[3]
DDI1_TXP[3]
DDPB_HPD
DDPB_CTRLCLK
DDPB_CTRLDATA

DisplayPort* Disabling and Termination

Pin Name Recommendation
DDPC_AUXP No Connect
DDPC_AUXN No Connect
DDPC_HPD No Connect
DDI2_TXP[3:0] No Connect
DDI2_TXN[3:0] No Connect
DDPC_CTRLCLK No Connect
DDPC_CTRLDATA No Connect

GPIO55

PCI_PIRQA#
PCIECLKREQ5#
PCI_PIRQB#
PCI_PIRQC#

GC6_FB_EN

PCH_GPU_EVENT#

PXS_PWREN_R

PCH_GPU_RST#_R

PCH_BKLT_EN

PCH_LCD_VDDEN

GC6_FB_EN

PCH_GPU_RST#_R

PXS_PWREN_R

PCH_GPU_EVENT#

HDMI* Mapping
HDMIxC_TX2_DN
HDMIxC_TX2_DP
HDMIxC_TX1_DN
HDMIxC_TX1_DP
HDMIxC_TX0_DN
HDMIxC_TX0_DP
HDMIxC_CLK_DN
HDMIxC_CLK_DP
DDI1_HPD_Q
DDI1_CTRL_CK
DDI1_CTRL_DATA

A A

Title

Title

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2014/01/11

2014/01/11

2014/01/11

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2013/11/08

2013/11/08

2013/11/08

Title

MCP (DDI,EDP)

MCP (DDI,EDP)

MCP (DDI,EDP)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

Haydn

Haydn

Haydn

Monday, November 17, 2014

Monday, November 17, 2014

Monday, November 17, 2014

4 45

4 45

1

4 45

1.0

1.0

1.0

5

4

3

2

1

UC1B

+1.35V

D61

PROC_DETECT

K61

CATERR

N62

PECI

K63

PROCHOT

C61

PROCPWRGD

AU60

SM_RCOMP0

AV60

SM_RCOMP1

AU61

SM_RCOMP2

AV15

SM_DRAMRST

AV61

SM_PG_CNTL1

HASWELL-ULT-DDR3L_BGA1168

@

1 2

RC45

1K_0402_5%

SM_PG_CNTL1

2

B

1

TP2 @

1

TP3 @

D D

CPU_PROCHOT#29,37

DDRA_DRAMRST#14

C C

B B

1

2

1 2

RD55
0_0402_5%

CC14

.1U_0402_10V6-K

CPU_PROCHOT#

+1.35V_CPU

RC15

470_0402_5%

1 2

CPU_PECI_R29

1 2

RC13
56_0402_5%

RC14
10K_0402_5%

RC20 200_0402_1%
RC21 121_0402_1%
RC22 100_0402_1%

TP_SKTOCC#

CPU_PECI_R

CPU_PROCHOT#_R

12

CPU_PROCPWRGD

12

SM_RCOMP_0

12

SM_RCOMP_1

12

SM_RCOMP_2
DDRA_DRAMRST#_R
SM_PG_CNTL1

CATERR#

HSW_ULT_DDR3L

MISC

THERMAL

PWR

DDR3L

+3VALW

12

RC42
100K_0402_5%

C

QC14

E

3 1

MMBT3904WH_SOT323-3

PROC_TCK

JTAG

2 OF 19

PROC_TMS

PROC_TRST

PROC_TDI

PROC_TDO

BPM#0
BPM#1
BPM#2
BPM#3
BPM#4
BPM#5
BPM#6
BPM#7

CPU_DRAMPG_CNTL 14,39

PRDY
PREQ

J62
K62
E60
E61
E59
F63
F62

J60
H60
H61
H62
K59
H63
K60
J61

RC43

10K_0402_5%

@

1 2

VR OD Output
Place CC9 Close to EC Side
RC23 Close to MCP
for Defensive Design

CPU_PROCHOT#

A A

5

+1.05VS

12

RC23
62_0402_1%

1

CC9

47P_0402_50V8J

2

CPU_PROCHOT#

Title

Title

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

4

2014/01/11

2014/01/11

2014/01/11

3

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2013/11/08

2013/11/08

2013/11/08

2

Title

MCP (MISC,THERMAL,JATG)

MCP (MISC,THERMAL,JATG)

MCP (MISC,THERMAL,JATG)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

B

B

B

Monday, November 17, 2014

Monday, November 17, 2014

Date: Sheet of

Date: Sheet of

Date: Sheet of

Monday, November 17, 2014

Haydn

Haydn

Haydn

1

5 45

5 45

5 45

1.0

1.0

1.0

5

4

3

2

1

BDW-U

D D

DDRA_DQ0
DDRA_DQ1
DDRA_DQ2
DDRA_DQ3
DDRA_DQ4
DDRA_DQ5
DDRA_DQ6
DDRA_DQ7
DDRA_DQ8
DDRA_DQ9
DDRA_DQ10
DDRA_DQ11
DDRA_DQ12
DDRA_DQ13
DDRA_DQ14
DDRA_DQ15

DDRA_DQ16

C C

B B

DDRA_DQ17
DDRA_DQ18
DDRA_DQ19
DDRA_DQ20
DDRA_DQ21
DDRA_DQ22
DDRA_DQ23
DDRA_DQ24
DDRA_DQ25
DDRA_DQ26
DDRA_DQ27
DDRA_DQ28
DDRA_DQ29
DDRA_DQ30
DDRA_DQ31

UC1C

AH63

SA_DQ0

AH62

SA_DQ1

AK63

SA_DQ2

AK62

SA_DQ3

AH61

SA_DQ4

AH60

SA_DQ5

AK61

SA_DQ6

AK60

SA_DQ7

AM63

SA_DQ8

AM62

SA_DQ9

AP63

SA_DQ10

AP62

SA_DQ11

AM61

SA_DQ12

AM60

SA_DQ13

AP61

SA_DQ14

AP60

SA_DQ15

AP58

SA_DQ16

AR58

SA_DQ17

AM57

SA_DQ18

AK57

SA_DQ19

AL58

SA_DQ20

AK58

SA_DQ21

AR57

SA_DQ22

AN57

SA_DQ23

AP55

SA_DQ24

AR55

SA_DQ25

AM54

SA_DQ26

AK54

SA_DQ27

AL55

SA_DQ28

AK55

SA_DQ29

AR54

SA_DQ30

AN54

SA_DQ31

AY58

SA_DQ32

AW58

SA_DQ33

AY56

SA_DQ34

AW56

SA_DQ35

AV58

SA_DQ36

AU58

SA_DQ37

AV56

SA_DQ38

AU56

SA_DQ39

AY54

SA_DQ40

AW54

SA_DQ41

AY52

SA_DQ42

AW52

SA_DQ43

AV54

SA_DQ44

AU54

SA_DQ45

AV52

SA_DQ46

AU52

SA_DQ47

AK40

SA_DQ48

AK42

SA_DQ49

AM43

SA_DQ50

AM45

SA_DQ51

AK45

SA_DQ52

AK43

SA_DQ53

AM40

SA_DQ54

AM42

SA_DQ55

AM46

SA_DQ56

AK46

SA_DQ57

AM49

SA_DQ58

AK49

SA_DQ59

AM48

SA_DQ60

AK48

SA_DQ61

AM51

SA_DQ62

AK51

SA_DQ63

HASWELL-ULT-DDR3L_BGA1168

@

󱫹

HSW_ULT_DDR3L

DDR CHANNEL A

so-dimm󰯇,

3 OF 19

󱱎󱱿󲒪󱱕󱜸󰤿󰰀

SA_CLK#0

SA_CLK0

SA_CLK#1

SA_CLK1

SA_CKE0
SA_CKE1
SA_CKE2
SA_CKE3

SA_CS#0
SA_CS#1

SA_ODT0

SA_RAS

SA_WE

SA_CAS

SA_BA0
SA_BA1
SA_BA2

SA_MA0
SA_MA1
SA_MA2
SA_MA3
SA_MA4
SA_MA5
SA_MA6
SA_MA7
SA_MA8

SA_MA9
SA_MA10
SA_MA11
SA_MA12
SA_MA13
SA_MA14
SA_MA15

SA_DQSN0
SA_DQSN1
SA_DQSN2
SA_DQSN3
SA_DQSN4
SA_DQSN5
SA_DQSN6
SA_DQSN7

SA_DQSP0
SA_DQSP1
SA_DQSP2
SA_DQSP3
SA_DQSP4
SA_DQSP5
SA_DQSP6
SA_DQSP7

SM_VREF_CA
SM_VREF_DQ0
SM_VREF_DQ1

AU37
AV37
AW36
AY36

AU43
AW43
AY42
AY43

AP33
AR32

AP32

AY34
AW34
AU34

AU35
AV35
AY41

AU36

DDRA_MA0

AY37

DDRA_MA1

AR38

DDRA_MA2

AP36

DDRA_MA3

AU39

DDRA_MA4

AR36

DDRA_MA5

AV40

DDRA_MA6

AW39

DDRA_MA7

AY39

DDRA_MA8

AU40

DDRA_MA9

AP35

DDRA_MA10

AW41

DDRA_MA11

AU41

DDRA_MA12

AR35

DDRA_MA13

AV42

DDRA_MA14

AU42

DDRA_MA15

AJ61

DDRA_DQS#0

AN62

DDRA_DQS#1

AM58
AM55
AV57

DDRA_DQS#2

AV53

DDRA_DQS#3

AL43
AL48

AJ62

DDRA_DQS0

AN61

DDRA_DQS1

AN58
AN55
AW57

DDRA_DQS2

AW53

DDRA_DQS3

AL42
AL49

AP49
AR51
AP51

SMVREF

WIDTH:20MIL
SPACING: 20MIL

1
1

1

TP19@
TP20@

TP21@

1

@

DDRA_CLK0# 14
DDRA_CLK0 14
DDRA_CLK1# 14
DDRA_CLK1 14

DDRA_CKE0 14
DDRA_CKE1 14

DDRA_CS0# 14
DDRA_CS1# 14

DDRA_RAS# 14

DDRA_WE# 14

DDRA_CAS# 14

DDRA_BS0# 14
DDRA_BS1# 14
DDRA_BS2# 14

DDR_SM_VREFCA 14
DDR_SA_VREFDQ 14

TP22

interleaved,

DDRA_DQ[63:0] 14

DDRA_MA[15:0] 14

DDRA_DQS[7:0] 14

DDRA_DQS#[7:0] 14

DDRA_DQ32
DDRA_DQ33
DDRA_DQ34
DDRA_DQ35
DDRA_DQ36
DDRA_DQ37
DDRA_DQ38
DDRA_DQ39
DDRA_DQ40
DDRA_DQ41
DDRA_DQ42
DDRA_DQ43
DDRA_DQ44
DDRA_DQ45
DDRA_DQ46
DDRA_DQ47

DDRA_DQ48
DDRA_DQ49
DDRA_DQ50
DDRA_DQ51
DDRA_DQ52
DDRA_DQ53
DDRA_DQ54
DDRA_DQ55
DDRA_DQ56
DDRA_DQ57
DDRA_DQ58
DDRA_DQ59
DDRA_DQ60
DDRA_DQ61
DDRA_DQ62
DDRA_DQ63

UC1D

AY31

SB_DQ0

AW31

SB_DQ1

AY29

SB_DQ2

AW29

SB_DQ3

AV31

SB_DQ4

AU31

SB_DQ5

AV29

SB_DQ6

AU29

SB_DQ7

AY27

SB_DQ8

AW27

SB_DQ9

AY25

SB_DQ10

AW25

SB_DQ11

AV27

SB_DQ12

AU27

SB_DQ13

AV25

SB_DQ14

AU25

SB_DQ15

AM29

SB_DQ16

AK29

SB_DQ17

AL28

SB_DQ18

AK28

SB_DQ19

AR29

SB_DQ20

AN29

SB_DQ21

AR28

SB_DQ22

AP28

SB_DQ23

AN26

SB_DQ24

AR26

SB_DQ25

AR25

SB_DQ26

AP25

SB_DQ27

AK26

SB_DQ28

AM26

SB_DQ29

AK25

SB_DQ30

AL25

SB_DQ31

AY23

SB_DQ32

AW23

SB_DQ33

AY21

SB_DQ34

AW21

SB_DQ35

AV23

SB_DQ36

AU23

SB_DQ37

AV21

SB_DQ38

AU21

SB_DQ39

AY19

SB_DQ40

AW19

SB_DQ41

AY17

SB_DQ42

AW17

SB_DQ43

AV19

SB_DQ44

AU19

SB_DQ45

AV17

SB_DQ46

AU17

SB_DQ47

AR21

SB_DQ48

AR22

SB_DQ49

AL21

SB_DQ50

AM22

SB_DQ51

AN22

SB_DQ52

AP21

SB_DQ53

AK21

SB_DQ54

AK22

SB_DQ55

AN20

SB_DQ56

AR20

SB_DQ57

AK18

SB_DQ58

AL18

SB_DQ59

AK20

SB_DQ60

AM20

SB_DQ61

AR18

SB_DQ62

AP18

SB_DQ63

HASWELL-ULT-DDR3L_BGA1168

@

HSW_ULT_DDR3L

4 OF 19

DDR CHANNEL B

SB_CK#0

SB_CK0

SB_CK#1

SB_CK1

SB_CKE0
SB_CKE1
SB_CKE2
SB_CKE3

SB_CS#0
SB_CS#1

SB_ODT0

SB_RAS

SB_WE

SB_CAS

SB_BA0
SB_BA1
SB_BA2

SB_MA0
SB_MA1
SB_MA2
SB_MA3
SB_MA4
SB_MA5
SB_MA6
SB_MA7
SB_MA8

SB_MA9
SB_MA10
SB_MA11
SB_MA12
SB_MA13
SB_MA14
SB_MA15

SB_DQSN0
SB_DQSN1
SB_DQSN2
SB_DQSN3
SB_DQSN4
SB_DQSN5
SB_DQSN6
SB_DQSN7

SB_DQSP0
SB_DQSP1
SB_DQSP2
SB_DQSP3
SB_DQSP4
SB_DQSP5
SB_DQSP6
SB_DQSP7

AM38
AN38
AK38
AL38

AY49
AU50
AW49
AV50

AM32
AK32

AL32

AM35
AK35
AM33

AL35
AM36
AU49

AP40
AR40
AP42
AR42
AR45
AP45
AW46
AY46
AY47
AU46
AK36
AV47
AU47
AK33
AR46
AP46

AW30
AV26
AN28
AN25
AW22
AV18
AN21
AN18

AV30
AW26
AM28
AM25
AV22
AW18
AM21
AM18

DDRA_DQS#4
DDRA_DQS#5

DDRA_DQS#6
DDRA_DQS#7

DDRA_DQS4
DDRA_DQS5

DDRA_DQS6
DDRA_DQS7

A A

Title

Title

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2014/01/11

2014/01/11

2014/01/11

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2013/11/08

2013/11/08

2013/11/08

Title

MCP (DDR3L)

MCP (DDR3L)

MCP (DDR3L)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

Haydn

Haydn

Haydn

Monday, November 17, 2014

Monday, November 17, 2014

Monday, November 17, 2014

6 45

6 45

1

6 45

1.0

1.0

1.0

5

VCCRTC

1 2

RC24 20K_0402_1%

1 2

RC25 20K_0402_1%

JCMOS1

Place under RAM Door

D D

RTCRST#&SRTCRST#

Space 15Mil

VCCRTC

12

RC29 1M_0402_5%

12

RC32 330K_0402_5%

INTVRMEN

* PU to VccRTC via 330 k, Internal VRM EN
PD to GND via 330 k,Internal VRM Disable

12

RC36 10M_0402_5%

YC1

C C

CRYSTAL

1,Space 15MIL
2,No trace under crystal

B B

RTC COIN

RTC_VCC_R 20MIL
+3VL 20MIL
VCCRTC 20MIL
BAT_D 20MIL

+3VS

1 2

32.768KHZ_12.5PF_202740-PG14

1

CC7
15P_0402_50V8J

2

RTC_VCC_R

RC1491

1K_0402_5%

RTC_VCC

12

BAT_D

+3VL

1 2

J3

JUMP_43X39

@

SRTC_RST#

RTC_RST#

CC10

1U_0402_10V6K

CC11

1U_0402_10V6K

1

1

2

2

TP71 For clear CMOS.

SM_INTRUDER#

INTVRMEN

CC12

1U_0402_10V6K

1

@

2

2

CC8
18P_0402_50V8J

1

VCCRTC

DC1
RB751V-40_SOD323-2

DC37

12

RB751V-40_SOD323-2

2

112

1

TP71

@

RTC_X1

RTC_X2

CC17

1U_0402_10V6K

1

2

RTC_VCC_R

12

CC32

10P_0402_50V8J

PCH_HDA_BCLK27
PCH_HDA_SYNC27
PCH_HDA_RST#27
PCH_HDA_SDIN027

PCH_HDA_SDOUT27
PCH_ME_PROTECT29

PCH_SPI_CLK29
PCH_SPI_CS0#29

PCH_SPI_SI29

CC26

.1U_0402_10V6-K

2

1

PCH_SPI_SO29

@

RC26 33_0402_5%
RC27 33_0402_5%
RC28 33_0402_5%

RC30 33_0402_5%
RC31 0_0402_5%

PCH_SPI_CLK
PCH_SPI_CS0#

PCH_SPI_SI
PCH_SPI_SO
PCH_SPI_WP#
PCH_SPI_HOLD#

4

RTC_RST#29

@

Place close to PCH.

1 2
1 2
1 2

1 2
1 2

LPC_AD029
LPC_AD129
LPC_AD229
LPC_AD329

LPC_FRAME#29

1 2

RC297 15_0402_5%

1 2

RC60 0_0402_5%

1 2

RC299 15_0402_5%

1 2

RC300 15_0402_5%

1 2

RC301 15_0402_5%@

1 2

RC302 15_0402_5%@

RTC_X1
RTC_X2
SM_INTRUDER#
INTVRMEN
SRTC_RST#
RTC_RST#

PCH_HDA_BCLK_R
PCH_HDA_SYNC_R
PCH_HDA_RST#_R

PCH_HDA_SDOUT_R

UC1E

AW5

RTCX1

AY5

RTCX2

AU6

INTRUDER

AV7

INTVRMEN

AV6

SRTCRST

AU7

RTCRST

AW8

HDA_BCLK/I2S0_SCLK

AV11

HDA_SYNC/I2S0_SFRM

AU8

HDA_RST/I2S_MCLK

AY10

HDA_SDI0/I2S0_RXD

AU12

HDA_SDI1/I2S1_RXD

AU11

HDA_SDO/I2S0_TXD

AW10

HDA_DOCK_EN/I2S1_TXD

AV10

HDA_DOCK_RST/I2S1_SFRM

AY8

I2S1_SCLK

AU62

PCH_TRST

AE62

PCH_TCK

AD61

PCH_TDI

AE61

PCH_TDO

AD62

PCH_TMS

AL11

RSVD1

AC4

RSVD2

AE63

JTAGX

AV2

RSVD0

HASWELL-ULT-DDR3L_BGA1168

@

PCH_SPI_CLK_R
PCH_SPI_CS0#_R

PCH_SPI_SI_R
PCH_SPI_SO_R
PCH_SPI_WP#_R
PCH_SPI_HOLD#_R

PCH_SPI_CS0#

PCH_SPI_SO

PCH_SPI_WP#

UC1G

AU14

LAD0

AW12

LAD1

AY12

LAD2

AW11

LAD3

AV12

LFRAME

AA3

SPI_CLK

Y7

SPI_CS0

Y4

SPI_CS1

AC2

SPI_CS2

AA2

SPI_MOSI

AA4

SPI_MISO

Y6

SPI_IO2

AF1

SPI_IO3

HASWELL-ULT-DDR3L_BGA1168

@

3

HSW_ULT_DDR3L

RTC

AUDIO SATA

JTAG

5 OF 19

HSW_ULT_DDR3L

LPC

SMBUS

C-LINKSPI

UC3

1

CS#

2

DO

3

WP#

4

GND

W25Q64FVSSIG_SO8

HOLD#

8

50mA

VCC

7

PCH_SPI_HOLD#

6

PCH_SPI_CLK

CLK

5

PCH_SPI_SI

DI

SATA_RN0/PERN6_L3

SATA_RP0/PERP6_L3
SATA_TN0/PETN6_L3

SATA_TP0/PETP6_L3

SATA_RN1/PERN6_L2

SATA_RP1/PERP6_L2
SATA_TN1/PETN6_L2

SATA_TP1/PETP6_L2

SATA_RN2/PERN6_L1

SATA_RP2/PERP6_L1
SATA_TN2/PETN6_L1

SATA_TP2/PETP6_L1

SATA_RN3/PERN6_L0

SATA_RP3/PERP6_L0

SATA_TN3/PETN6_L0
SATA_TP3/PETP6_L0

SATA0GP/GPIO34
SATA1GP/GPIO35
SATA2GP/GPIO36
SATA3GP/GPIO37

SATA_RCOMP

SMBALERT/GPIO11

SMBCLK

SMBDATA

SML0ALERT/GPIO60

SML0CLK

SML1ALERT/PCHHOT/GPIO73

SML0DATA

SML1CLK/GPIO75

SML1DATA/GPIO74

7 OF 19

2

.1U_0402_10V6-K

1

CL_CLK

CL_DATA

CL_RST

+3V_SPI

CC22

SATA_IREF

RSVD3
RSVD4

SATALED

AN2
AP2
AH1
AL2
AN1
AK1
AU4
AU3
AH3

AF2
AD2
AF4

J5
H5
B15
A15

J8
H8
A17
B17

J6
H6
B14
C15

F5
E5
C17
D17

V1

PCH_GPIO34

U1

SATA1GP

V6

SATA2GP

AC1

SATA3GP

A12
L11
K10
C12

SATACOMP

U3

SATALED#

SMB_ALERT#
PCH_SMB_CLK
PCH_SMB_DATA
SML0_ALERT#
SML0_CLK
SML0_DATA
SML1_ALERT#
PCH_SML1_CLK
PCH_SML1_DAT

RC33

3.01K_0402_1%

Space:12Mil
Length: 500Mil

1 2

@

RC35
10K_0402_5%

+3VALW_PCH

2

SATA_PRX_DTX_N1 32
SATA_PRX_DTX_P1 32
SATA_PTX_DRX_N1 32
SATA_PTX_DRX_P1 32

PCH_GPIO34 9

SATA1GP 9

+1.05VS_PSATA3PLL

12

IREF&RCOMPWidth: 12-15Mil

+3VS

SMB_ALERT# 9

SML0_ALERT# 9

SML1_ALERT# 9

MIRROR@

1 2

RC68 0_0402_5%

GPU_PCIE_CLKREQ#8,16

2N7002KDWH_SOT363-6

PCH_SMB_CLK

+3VS

PCH_SMB_DATA

2N7002KDWH_SOT363-6

2N7002KDWH_SOT363-6

PCH_SML1_CLK

+3VS

PCH_SML1_DAT

2N7002KDWH_SOT363-6

UNMIRROR@

1 2

RC69 0_0402_5%

QC2A

6 1

D

G

2

5

G

3 4

D

QC2B

QC5A

6 1

D

@

G

2

5

G

@

3 4

D

QC5B

1

14
23

14
23

14
23

+3VS

+3VALW_PCH

PCH_GPIO479
PCH_GPIO249
PCH_GPIO289

SATA2GP
SATA3GP

SML0_CLK
SML0_DATA

PCH_SMB_CLK
PCH_SMB_DATA

PCH_SML1_CLK
PCH_SML1_DAT

RPC3

1 8
2 7
3 6
4 5

10K_0804_8P4R_5%

RPC4

2.2K_0404_4P2R_5%
RPC5

2.2K_0404_4P2R_5%
RPC14

2.2K_0404_4P2R_5%

RPC7

1 8
2 7
3 6
4 5

10K_0804_8P4R_5%

SODIMM

S

S

S

S

+3VS+3V_SPI

PM_SMB_CLK 14,31

RPC18

14
23

2.2K_0404_4P2R_5%

PM_SMB_DAT 14,31

EC_SMB_CLK0 16,29,31

RPC26

14
23

2.2K_0404_4P2R_5%

EC_SMB_DAT0 16,29,31

+3VS

+3VS

1 2

@

RC1495 1K_0402_5%

PCH_ME_PROTECT

HDA_SDO This signal has a weak internal pull-down.
*L ME Protection Enable
H ME Protection Disable:

A A

can make ME flash be enable with ME locked
Must be PU with the same Power with HDA PWR, or
will make PWR leakage

EMI

1

CC1029
10P_0402_50V8J

2

EMC_NS@

PCH_HDA_SDOUT_R

PCH_HDA_SDIN0

5

+3V_SPI

1 2

RC37 1K_0402_5%

1 2

RC38 1K_0402_5%

4

PCH_SPI_WP#

PCH_SPI_HOLD#

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2014/01/11

2014/01/11

2014/01/11

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2013/11/08

2013/11/08

2013/11/08

Title

Title

Title

MCP (RTC&AUDIO&SATA&SMBUS)

MCP (RTC&AUDIO&SATA&SMBUS)

MCP (RTC&AUDIO&SATA&SMBUS)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

Haydn

Haydn

Haydn

Monday, November 17, 2014

Monday, November 17, 2014

Monday, November 17, 2014

7 45

7 45

1

7 45

1.0

1.0

1.0

5

Haswell MCP (Clock,PM)

D D

PCH_ACIN

AO5804EL_SC89-6
QC11A

TP5 @

1 2
1 2
1 2

1 2

PCIECLKREQ0#

PCIECLKREQ1#

CLK_PCIE_WLAN#
CLK_PCIE_WLAN
WLAN_CLKREQ#

PCIECLKREQ3#

CLK_PCIE_GPU#
CLK_PCIE_GPU
GPU_PCIE_CLKREQ#

PCIECLKREQ5#

1

EC_SUSACK#_R
SYS_RESET#
SYS_PWROK
PCH_PWROK
APWROK
PCH_PLT_RST#

EC_SUSWARN#
EC_PBTN_OUT#_R
PCH_ACIN
PCH_GPIO72

PCIECLKREQ0#9

@

CLK_PCIE_WLAN#30
CLK_PCIE_WLAN30

WLAN_CLKREQ#30

CLK_PCIE_GPU#16
CLK_PCIE_GPU16

GPU_PCIE_CLKREQ#7,16

PCIECLKREQ5#4

0_0402_5%

+1.35V_CPU

VR_VDDQ_PWRGD

EC_SUS_VCCP

+1.05VS

VR_VCCST_PWRGD

EC_PCH_PWROK

VCCST_PWRGD

VR_CPU_PWROK

EC_SYS_PWROK

6

2

@

1

RC61 100_0402_5%
RC62 0_0402_5%
RC139 0_0402_5%

RC141 0_0402_5%

PCIE CLK2 WLAN

PCIE CLK4 GPU

C C

1 2

EC_PCH_ACIN29

EC_ACIN#29

B B

A A

RC65 0_0402_5%

1 2

RC64

EC_SYS_PWROK29
EC_PCH_PWROK10,29

PCH_PLT_RST#16,29,30

EC_RSMRST#29

EC_SUSWARN#29

EC_PBTN_OUT#29 PCH_SLP_S4# 29

5

4

UC1F

C43

CLKOUT_PCIE_N0

C42

CLKOUT_PCIE_P0

U2

PCIECLKRQ0/GPIO18

B41

CLKOUT_PCIE_N1

A41

CLKOUT_PCIE_P1

Y5

PCIECLKRQ1/GPIO19

C41

CLKOUT_PCIE_N2

B42

CLKOUT_PCIE_P2

AD1

PCIECLKRQ2/GPIO20

B38

CLKOUT_PCIE_N3

C37

CLKOUT_PCIE_P3

N1

PCIECLKRQ3/GPIO21

A39

CLKOUT_PCIE_N4

B39

CLKOUT_PCIE_P4

U5

PCIECLKRQ4/GPIO22

B37

CLKOUT_PCIE_N5

A37

CLKOUT_PCIE_P5

T2

PCIECLKRQ5/GPIO23

HASWELL-ULT-DDR3L_BGA1168

@

UC1H

AK2

SUSACK

AC3

SYS_RESET

AG2

SYS_PWROK

AY7

PCH_PWROK

AB5

APWROK

AG7

PLTRST

AW6

RSMRST

AV4

SUSWARN/SUSPWRDNACK/GPIO30

AL7

PWRBTN

AJ8

ACPRESENT/GPIO31

AN4

BATLOW/GPIO72

AF3

SLP_S0

AM5

SLP_WLAN/GPIO29

HASWELL-ULT-DDR3L_BGA1168

@

4

HSW_ULT_DDR3L

CLOCK

SIGNALS

6 OF 19

HSW_ULT_DDR3L

SYSTEM POWER MANAGEMENT

8 OF 19

XTAL24_IN

XTAL24_OUT

RSVD5
RSVD6

DIFFCLK_BIASREF

TESTLOW_C35
TESTLOW_C34
TESTLOW_AK8
TESTLOW_AL8

CLKOUT_LPC_0
CLKOUT_LPC_1

CLKOUT_ITPXDP

CLKOUT_ITPXDP_P

DSWVRMEN

CLKRUN/GPIO32

SUS_STAT/GPIO61

SUSCLK/GPIO62

SLP_S5/GPIO63

DPWROK

WAKE

SLP_S4
SLP_S3

SLP_A
SLP_SUS
SLP_LAN

A25
B25

K21
M21
C26

C35
C34
AK8
AL8

AN15
AP15

B35
A35

3

XTAL24_IN

XTAL24_IN
XTAL24_OUT

MCP_TESTLOW1
MCP_TESTLOW2
MCP_TESTLOW3
MCP_TESTLOW4

PCH_PCI_CLK_R

RC770 1M_0402_5%

YC2

GND12OSC2

1

1

2

OSC1

24MHZ_6PF_7V24000032

CC23

3.3P_0402_50V8-B

12

RC71 3.01K_0402_1%

1 2

RC72 22_0402_5%

12

3

4

GND2

+1.05VS_PLPTCLKPLL

DIFFCLK_BIASREF

Width: 12-15Mil
Space:12Mil
Length: 500Mil

12

@

1

2

PCH_PCI_CLK 29

CC31
10P_0402_50V8J

CC24

3.3P_0402_50V8-B

2

XTAL24_OUT

Place close to PCH.

1 2

AW7

DSWODVREN

AV5

DPWROK

AJ5

PCIE_WAKE#

V5

PM_CLKRUN#

AG4

SUS_STAT#

AE6

SUSCLK

AP5

AJ6

PCH_SLP_S4#_R

AT4

PCH_SLP_S3#_R

AL5
AP4
AJ7

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

RC66 0_0402_5%

1

TP54@

1

TP53@

1 2

RC56 0_0402_5%

1 2

RC58 0_0402_5%

1

TP55@

2014/01/11

2014/01/11

2014/01/11

EC_RSMRST#

PCIE_WAKE# 30

SUSCLK 30

PCH_SLP_S3# 29

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

1

RPC6

WLAN_CLKREQ#
SYS_RESET#
PCIECLKREQ1#

PCIECLKREQ3#

PCI_PIRQD#4
PCH_GPIO339
PCH_GPIO769

07/22
change 10K to 1K for the HLH at RSMRST#

PCI_PIRQD#
PCH_GPIO33

MCP_TESTLOW1
MCP_TESTLOW2

MCP_TESTLOW3
MCP_TESTLOW4

PCH_PLT_RST#

SUSCLK

PCIE_WAKE#

PCH_ACIN

ACPRESENT

DSX_CFG-DEEP SX Configuration Register
*0 In DS-Sx config Mode, Internal 20K PD Enabled
In Non DS-Sx config Mode, Internal 20K PD Disabled
1 Internal 20K PD Disabled

PCH_GPIO72

BATLOW:

*PU To VCCDSW3_3 IN DEEP SX PLATFORM
PU TO VCCSUS3_3 IN NON DEEP SX PLATFORM

DSWODVREN

DSWVRMEN(PU to RTCVCC):

*1 Enable DSW 3.3V TO 1.05V Integrated
DSW On-die Voltage Regulator
0 Disable

EC_SUSWARN#

SUSWARN:

1, 10K PU to VCCSUS Follow CRB
2, No Need PU for Check List used as SUSWARN#
*3, Need PU for GPIO30 and not used

PM_CLKRUN#

18
27
36
45

10K_0804_8P4R_5%

RPC8

18
27
36
45

10K_0804_8P4R_5%

10K_0404_4P2R_5%

RPC10

1 4
2 3

10K_0404_4P2R_5%

RPC21

1 4
2 3

1 2

RC98 100K_0402_5%

12

RC147 1K_0402_5%@

1 2

RC89 10K_0402_5%

1 2

RC94 1K_0402_5%

1 2

RC86 10K_0402_5%

12

RC77 330K_0402_5%

1 2

RC95 10K_0402_5%

@

12

RC78 8.2K_0402_5%

Intel demand

Title

Title

2013/11/08

2013/11/08

2013/11/08

Title

MCP (Clock,PM)

MCP (Clock,PM)

MCP (Clock,PM)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

Haydn

Haydn

Haydn

Monday, November 17, 2014

Monday, November 17, 2014

Monday, November 17, 2014

1

+3VS

+3VALW_PCH

+3VALW_PCH

+3VALW_PCH

VCCRTC

+3VALW_PCH

+3VS

8 45

8 45

8 45

1.0

1.0

1.0

Haswell MCP (GPIO,USB,PCIE)

5

4

3

2

1

+3VS

+3VALW_PCH

D D

+3VS

C C

B B

+3VS

+3VALW_PCH

A A

RPC9

10K_0804_8P4R_5%

RPC11

1 8
2 7
3 6
4 5

10K_0804_8P4R_5%

RPC12

10K_0804_8P4R_5%

RPC13

10K_0804_8P4R_5%

RPC20

18

SML1_ALERT#

27

PCH_GPIO8

36

USB_OC1#

45

USB_OC3#

10K_0804_8P4R_5%

RPC15

10K_0804_8P4R_5%

RPC16

10K_0804_8P4R_5%

RPC17

10K_0804_8P4R_5%

RPC19

10K_0804_8P4R_5%

RPC23

10K_0804_8P4R_5%

RPC24

10K_0804_8P4R_5%

RPC22

1 4
2 3

10K_0404_4P2R_5%

1 2

RC754 10K_0402_5%

@

1 2

RC753 10K_0402_5%

1 2

RC756 10K_0402_5%

1 2

RC773 10K_0402_5%

1 2

RC772 10K_0402_5%

RC97
0_0402_5%

1 2

1 2

RC764 10K_0402_5%

1 2

RC765 10K_0402_5%

1 2

@

RC766 10K_0402_5%

1 2

@

RC767 10K_0402_5%

18

PCH_GPIO45

27

PCH_GPIO56

36

PCH_GPIO58

45

PCH_GPIO59

PCH_GPIO26
SMB_ALERT#
PCH_GPIO57
PCH_GPIO13

18
27

PCH_GPIO9

36

SML0_ALERT#

45

USB_OC0#

18

PCH_GPIO10

27

USB_OC2#

36

PCH_GPIO46

45

PCH_GPIO14

SML1_ALERT# 7

18

PCH_GPIO93

27

PCH_GPIO91

36

PCH_GPIO3

45

PCH_GPIO1

18

PCH_GPIO34

27

PCIECLKREQ0#

36

SATA1GP

45

PCH_GPIO50

18

PCH_GPIO38

27

PCH_GPIO92

36

PCH_GPIO2

45

PCH_GPIO90

18

PCH_GPIO89

27

PCH_GPIO0

36

PCH_GPIO85

45

PCH_GPIO83

18

PCH_GPIO6

27

PCH_GPIO70

36

PCH_GPIO64

45

PCH_GPIO67

18

PCH_GPIO94

27

PCH_GPIO65

36

PCH_GPIO69

45

PCH_GPIO68

PCH_GPIO5
PCH_GPIO4

PCH_GPIO71

PCH_WLAN_OFF#

PCH_BT_OFF#

PCH_GPIO49

PCH_LCD_FPBACK

PCH_GPIO27

PCH_GPIO25

PCH_GPIO12

PCH_GPIO71

5

SMB_ALERT# 7

PCH_GPIO768

SML0_ALERT# 7

PCH_LCD_FPBACK24

PCH_GPIO34 7
PCIECLKREQ0# 8
SATA1GP 7

+1.05VS_PUSB3PLL

PCIE_RCOMP&PCIE_IREF (Shared with DMI)

Width 20Mil
Space 15Mil
Length 500Mil

PCH_GPIO247

PCH_GPIO287

PCH_GPIO477

PCH_GPIO338

PCH_BEEP27

PCIE_CRX_GTX_N[0..3]16

PCIE_CRX_GTX_P[0..3]16

PCIE_CTX_C_GRX_N[0..3]16

PCIE_CTX_C_GRX_P[0..3]16

PCIE_CTX_C_GRX_N0 PCIE_CTX_GRX_N0
PCIE_CTX_C_GRX_P0 PCIE_CTX_GRX_P0

PCIE_CTX_C_GRX_N1
PCIE_CTX_C_GRX_P1 PCIE_CTX_GRX_P1

PCIE5

PCIE_CTX_C_GRX_N2 PCIE_CTX_GRX_N2
PCIE_CTX_C_GRX_P2 PCIE_CTX_GRX_P2

PCIE_CTX_C_GRX_N3 PCIE_CTX_GRX_N3
PCIE_CTX_C_GRX_P3 PCIE_CTX_GRX_P3

PCIE_PRX_DTX_N330

PCIE_PRX_DTX_P330

PCIE_PTX_C_DRX_N330

PCIE_PTX_C_DRX_P330

RC113 3.01K_0402_1%

OPT@
OPT@

OPT@
OPT@

OPT@
OPT@

OPT@
OPT@

12

PCH_GPIO76
PCH_GPIO8
PCH_GPIO12
PCH_GPIO15
BOARD_ID0
BOARD_ID1
PCH_GPIO24
PCH_GPIO27
PCH_GPIO28
PCH_GPIO26

PCH_GPIO56
PCH_GPIO57
PCH_GPIO58
PCH_GPIO59
WIN8_BUTTON#_R
PCH_GPIO47
PCH_LCD_FPBACK
PCH_GPIO49
PCH_GPIO50
PCH_GPIO71
PCH_GPIO13
PCH_GPIO14
PCH_GPIO25
PCH_GPIO45
PCH_GPIO46

PCH_GPIO9
PCH_GPIO10
PCH_GPIO33
PCH_GPIO70
PCH_GPIO38
BOARD_ID2
PCH_BEEP

1 2
1 2

CC19.1U_0402_10V6-K
CC18.1U_0402_10V6-K

1 2
1 2

CC20.1U_0402_10V6-K
CC21.1U_0402_10V6-K

1 2
1 2

CC25.1U_0402_10V6-K
CC34.1U_0402_10V6-K

1 2
1 2

CC35.1U_0402_10V6-K
CC36.1U_0402_10V6-K

PCIE_PRX_DTX_N3
PCIE_PRX_DTX_P3

12

PCIE_PTX_DRX_N3

12

PCIE_PTX_DRX_P3

CC177 .1U_0402_10V6-K
CC188 .1U_0402_10V6-K

PCIE_CRX_GTX_N0
PCIE_CRX_GTX_P0

PCIE_CRX_GTX_N1
PCIE_CRX_GTX_P1

PCIE_CTX_GRX_N1

PCIE_CRX_GTX_N2
PCIE_CRX_GTX_P2

PCIE_CRX_GTX_N3
PCIE_CRX_GTX_P3

PCIE_RCOMP

4

UC1J

P1

BMBUSY/GPIO76

AU2

GPIO8

AM7

LAN_PHY_PWR_CTRL/GPIO12

AD6

GPIO15

Y1

GPIO16

T3

GPIO17

AD5

GPIO24

AN5

GPIO27

AD7

GPIO28

AN3

GPIO26

AG6

GPIO56

AP1

GPIO57

AL4

GPIO58

AT5

GPIO59

AK4

GPIO44

AB6

GPIO47

U4

GPIO48

Y3

GPIO49

P3

GPIO50

Y2

HSIOPC/GPIO71

AT3

GPIO13

AH4

GPIO14

AM4

GPIO25

AG5

GPIO45

AG3

GPIO46

AM3

GPIO9

AM2

GPIO10

P2

DEVSLP0/GPIO33

C4

SDIO_POWER_EN/GPIO70

L2

DEVSLP1/GPIO38

N5

DEVSLP2/GPIO39

V2

SPKR/GPIO81

HASWELL-ULT-DDR3L_BGA1168

@

UC1K

F10

PERN5_L0

E10

PERP5_L0

C23

PETN5_L0

C22

PETP5_L0

F8

PERN5_L1

E8

PERP5_L1

B23

PETN5_L1

A23

PETP5_L1

H10

PERN5_L2

G10

PERP5_L2

B21

PETN5_L2

C21

PETP5_L2

E6

PERN5_L3

F6

PERP5_L3

B22

PETN5_L3

A21

PETP5_L3

G11

PERN3

F11

PERP3

C29

PETN3

B30

PETP3

F13

PERN4

G13

PERP4

B29

PETN4

A29

PETP4

G17

PERN1/USB3RN3

F17

PERP1/USB3RP3

C30

PETN1/USB3TN3

C31

PETP1/USB3TP3

F15

PERN2/USB3RN4

G15

PERP2/USB3RP4

B31

PETN2/USB3TN4

A31

PETP2/USB3TP4

E15

RSVD9

E13

RSVD10

A27

PCIE_RCOMP

B27

PCIE_IREF

HASWELL-ULT-DDR3L_BGA1168

@

HSW_ULT_DDR3L

GPIO

SERIAL IO

10 OF 19

HSW_ULT_DDR3L

PCIE USB

11 OF 19

CPU/
MISC

THRMTRIP

RCIN/GPIO82

SERIRQ

PCH_OPI_RCOMP

RSVD7
RSVD8

GSPI0_CS/GPIO83

GSPI0_CLK/GPIO84
GSPI0_MISO/GPIO85
GSPI0_MOSI/GPIO86

GSPI1_CS/GPIO87

GSPI1_CLK/GPIO88
GSPI1_MISO/GPIO89

GSPI_MOSI/GPIO90
UART0_RXD/GPIO91
UART0_TXD/GPIO92
UART0_RTS/GPIO93
UART0_CTS/GPIO94

UART1_RXD/GPIO0

UART1_TXD/GPIO1

UART1_RST/GPIO2

UART1_CTS/GPIO3

I2C0_SDA/GPIO4
I2C0_SCL/GPIO5
I2C1_SDA/GPIO6
I2C1_SCL/GPIO7

SDIO_CLK/GPIO64

SDIO_CMD/GPIO65

SDIO_D0/GPIO66
SDIO_D1/GPIO67
SDIO_D2/GPIO68
SDIO_D3/GPIO69

USB2N0
USB2P0

USB2N1
USB2P1

USB2N2
USB2P2

USB2N3
USB2P3

USB2N4
USB2P4

USB2N5
USB2P5

USB2N6
USB2P6

USB2N7
USB2P7

USB3RN1

USB3RP1

USB3TN1
USB3TP1

USB3RN2

USB3RP2

USB3TN2
USB3TP2

USBRBIAS
USBRBIAS

RSVD11
RSVD12

OC0/GPIO40
OC1/GPIO41
OC2/GPIO42
OC3/GPIO43

3

H_THRMTRIP#_R

.01U_0402_16V7-K

1

CC106

2

@

D60

H_THRMTRIP#_R

V4

EC_KBRST#_R

T4

SERIRQ

AW15

OPI_COMP

AF20
AB21

R6

PCH_GPIO83

L6

BOARD_ID3

N6

PCH_GPIO85

L8

PCH_GPIO86

R7

PCH_BT_OFF#

L5

PCH_WLAN_OFF#

N7

PCH_GPIO89

K2

PCH_GPIO90

J1

PCH_GPIO91

K3

PCH_GPIO92

J2

PCH_GPIO93

G1

PCH_GPIO94

K4

PCH_GPIO0

G2

PCH_GPIO1

J3

PCH_GPIO2

J4

PCH_GPIO3

F2

PCH_GPIO4

F3

PCH_GPIO5

G4

PCH_GPIO6

F1

PCH_GPIO7

E3

PCH_GPIO64

F4

PCH_GPIO65

D3

PCH_GPIO66

E4

PCH_GPIO67

C3

PCH_GPIO68

E2

PCH_GPIO69

AN8
AM8

AR7
AT7

AR8
AP8

AR10
AT10

AM15
AL15

AM13
AN13

AP11
AN11

AR13
AP13

G20
H20

C33
B34

E18
F18

B33
A33

AJ10

USBRBIAS

AJ11
AN10

USBRBIAS

AM10

Width: 20Mil Space:15Mil Length: 500Mil

AL3

USB_OC0#

AT1

USB_OC1#

AH2

USB_OC2#

AV3

USB_OC3#

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

1 2

RC44 0_0402_5%

1 2

RC758 0_0402_5%@

1 2

RC759 0_0402_5%

RC104 49.9_0402_1%

OPI_RCOMP Width: 12-15Mil

1 2

RC761 0_0402_5%

USB20_N0 24
USB20_P0 24

USB20_N1 32
USB20_P1 32

USB20_N2 27
USB20_P2 27

USB20_N3 27
USB20_P3 27

USB20_N4 30
USB20_P4 30

USB20_N5 29
USB20_P5 29

USB20_N6 24
USB20_P6 24

USB20_N7 37
USB20_P7 37

USB30_RX_N1 27
USB30_RX_P1 27

USB30_TX_N1 27
USB30_TX_P1 27

USB30_RX_N2 32
USB30_RX_P2 32

USB30_TX_N2 32
USB30_TX_P2 32

RC112 22.6_0402_1%

USB_OC0# 32
USB_OC1# 27

USB_OC3# 37

@

@

12

Space:12Mil
Length: 500Mil

12

2014/01/11

2014/01/11

2014/01/11

+1.05VS

12

RC101
1K_0402_1%

H_THRMTRIP#

EC_KBRST# 29
EC_INT_SERIRQ 29

PCH_BT_OFF# 30
PCH_WLAN_OFF# 30

EC_SCI# 29

Camera _Conn

Right USB2.0

Left USB2.0

Card Reader

Mini Card BT

ECT8386 Sensor

Touch Panel

DC_IN combo USB2.0

Left USB3.0

Right USB3.0

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

BOARD_ID0
BOARD_ID1
BOARD_ID2
BOARD_ID3

H_THRMTRIP# 16

WIN8_BUTTON#24,29

EC_LID_OUT#24,29

GPIO15, Internal PD
1: INTEL ME TLS W Confidentiality
*0: INTEL ME TLS WO Confidentiality

GPIO66, Internal 20K PD
1: Top-Block Swap Override EN
*0: Disable

GPIO81, No Reboot, Internal PD
1: Enabled No Reboot Mode
*0: Disable No Reboot Mode

GPIO86, Internal PD
1: LPC
*0: SPI ROM

2013/11/08

2013/11/08

2013/11/08

RC314
10K_0402_5%

@

1 2

RC566
10K_0402_5%

1 2

RC503
10K_0402_5%

OPT@

1 2

RC512
10K_0402_5%

UMA@

1 2

RC569
10K_0402_5%

1 2

RC372
10K_0402_5%

@

1 2

BOM Control :BOARD_ID1

BOARD_ID0 BOARD_ID1 Description

0 0

0 1

PCH_GPIO15

PCH_GPIO66

PCH_BEEP

PCH_GPIO86

Title

Title

Title

MCP (GPIO,USB,PCIE)

MCP (GPIO,USB,PCIE)

MCP (GPIO,USB,PCIE)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

UMA

DIS

+3VALW_PCH

1 2

RC763
0_0402_5%

@

@

1 2

RC762
0_0402_5%

1 2

@

RC540 1K_0402_5%

@

RC541 1K_0402_5%

@

RC544 1K_0402_5%

12

@

RC542 1K_0402_5%

12

@

RC543 1K_0402_5%

Haydn

Haydn

Haydn

Monday, November 17, 2014

Monday, November 17, 2014

Monday, November 17, 2014

RC567
10K_0402_5%

1 2

WIN8_BUTTON#_R

+3VALW_PCH

12

12

1

PCH_GPIO14

1 2

1 2

+3VS

+3VS

+3VS

RC584
10K_0402_5%

RC598
10K_0402_5%

@

9 45

9 45

9 45

1.0

1.0

1.0

Haswell MCP (Power)

5

+CPU_CORE(32A) 22 µF X23

1.35V_CPU(1.4A)

HW 4PCS 2.2UF CAP Mounted
HW 6PCS 10UF CAP Mounted
PWR 2PCS 470U Near VR Output

D D

4.7U_0603_6.3V6K

+VCCIOA_OUT

C C

VCC_SENSE

Length Match: No More Than 25Mil
Space: More Than 25Mil
GND Reference

SVID

1, Stripline Line, No More Than 6000Mil
2, Alert# Route Between CLK and Data
3, CLK Length<Data Length<CLK Length + 2000Mil
4, Space at least 18Mil

+VCCIO_OUT

1

CC65

2

@

+1.05VS

+1.05VS

VCC_SENSE

Length Match: <25Mil
Space: More Than 25Mil
GND Reference

CPU_VCC_SENSE43

CPU_VR_ON43

12

@

RC161 150_0402_1%

1 2

RC138 0_0402_5%

CC82

22U_0603_6.3V6-M

CD@

+1.05VS

VCCST(0.1A)

1

2

4

RC114

100_0402_1%

1 2

RC137 0_0402_5%

CPU_SVID_ALRT#_R
CPU_SVID_CLK_R
CPU_SVID_DAT_R
VCCST_PG_EC_R

CPU_VR_READY

TP36 @
TP44 @

RC1515 10K_0402_5%

+1.05V_VCCST

1

+CPU_CORE

CC81
.1U_0402_10V6-K

2

+CPU_CORE

1 2

1
1

+CPU_CORE

PWR_DEBUG

12

+1.35V_CPU

L59
J58

AH26

AJ31
AJ33

AJ37
AN33
AP43
AR48
AY35
AY40
AY44
AY50

F59
N58

AC58

E63

AB23

A59

E20
AD23
AA23
AE59

L62

N63

L63

B59

F60

C59

D63

H59

P62

P60

P61

N59

N61

T59
AD60
AD59
AA59
AE60
AC59
AG58

U59

V59

AC22
AE22
AE23

AB57
AD57
AG57

C24

C28

C32

UC1L

RSVD13
RSVD14

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
VDDQ11

VCC1
RSVD15
RSVD16

VCC_SENSE
RSVD17
VCCIO_OUT
VCCIOA_OUT
RSVD18
RSVD19
RSVD20

VIDALERT
VIDSCLK
VIDSOUT
VCCST_PWRGD
VR_EN
VR_READY

VSS344
PWR_DEBUG
VSS345
RSVD_TP1
RSVD_TP2
RSVD_TP3
RSVD_TP4
RSVD21
RSVD22
RSVD23
RSVD24
RSVD25
RSVD26
RSVD27
RSVD28
RSVD29

VCCST1
VCCST2
VCCST3

VCC2
VCC3
VCC4
VCC5
VCC6
VCC7

HASWELL-ULT-DDR3L_BGA1168

@

HSW_ULT_DDR3L

HSW ULT POWER

12 OF 19

3

+CPU_CORE

C36

VCC8

C40

VCC9

C44

VCC10

C48

VCC11

C52

VCC12

C56

VCC13

E23

VCC14

E25

VCC15

E27

VCC16

E29

VCC17

E31

VCC18

E33

VCC19

E35

VCC20

E37

VCC21

E39

VCC22

E41

VCC23

E43

VCC24

E45

VCC25

E47

VCC26

E49

VCC27

E51

VCC28

E53

VCC29

E55

VCC30

E57

VCC31

F24

VCC32

F28

VCC33

F32

VCC34

F36

VCC35

F40

VCC36

F44

VCC37

F48

VCC38

F52

VCC39

F56

VCC40

G23

VCC41

G25

VCC42

G27

VCC43

G29

VCC44

G31

VCC45

G33

VCC46

G35

VCC47

G37

VCC48

G39

VCC49

G41

VCC50

G43

VCC51

G45

VCC52

G47

VCC53

G49

VCC54

G51

VCC55

G53

VCC56

G55

VCC57

G57

VCC58

H23

VCC59

J23

VCC60

K23

VCC61

K57

VCC62

L22

VCC63

M23

VCC64

M57

VCC65

P57

VCC66

U57

VCC67

W57

VCC68

+1.35V_CPU

1

2

+1.35V_CPU

1

RF_NS@

2

1

CC27

2

CC37
10U_0603_6.3V6M

CC76

33P_0402_50V8J

2.2U_0603_6.3V6K

2

1

CC38
10U_0603_6.3V6M

2

1

2

1

2.2U_0603_6.3V6K

1

2

CD@

1

CC29

2

CC39
10U_0603_6.3V6M

+CPU_CORE

RF_NS@

2.2U_0603_6.3V6K

1

2

CC83

1

2

1

CC28

2

CD@

CC75

33P_0402_50V8J

RF_NS@

CC40
10U_0603_6.3V6M

33P_0402_50V8J

1

CC30

2.2U_0603_6.3V6K

2

CD@

1

CC41
10U_0603_6.3V6M

2

CC80

1

2

RF_NS@

1

CC42
10U_0603_6.3V6M

2

CD@

33P_0402_50V8J

12

+3VALW

1 2

RC123
130_0402_1%

CPU_SVID_ALRT#_R

RC1516

10K_0402_5%@

6

AO5804EL_SC89-6

@

AO5804EL_SC89-6
QC12A

1

RC546
75_0402_1%

1 2

CPU_SVID_ALERT#43

B B

A A

CPU_SVID_CLK43

CPU_SVID_DAT43

VR_CPU_PWROK29,43

RC83 0_0402_5%

@

5

12

12

RC121 43_0402_5%

1 2

RC122 0_0402_5%

1 2

RC124 0_0402_5%

2

CC54

0.01U_0402_16V7K

@

1

2

CPU_SVID_CLK_R

CPU_SVID_DAT_R

+1.05VS

@

QC12B

5

12

CC43
.1U_0402_10V6-K

@

RC1513
10K_0402_5%

1 2

3

@

4

12

RC84 0_0402_5%

@

4

+1.05VS

+3VALW

CPU_VR_ON VCCST_PG_EC_R

RC1514
10K_0402_5%

1 2

CPU_VR_READY

0_0402_5%

1 2

RC85

VR_CPU_PWROK

EC_PCH_PWROK8,29

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

12

RC80 0_0402_5%

@

@

1

2

2014/01/11

2014/01/11

2014/01/11

CC49

0.01U_0402_16V7K

RC1517

@

10K_0402_5%

1 2

6

AO5804EL_SC89-6

@

2

AO5804EL_SC89-6
QC13A

1

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

QC13B

5

2

1 2

3

@

4

RC1512
1K_0402_5%

2013/11/08

2013/11/08

2013/11/08

1 2

RC81 0_0402_5%

CC50

0.01U_0402_16V7K

1

2

Title

Title

Title

MCP (Power)

MCP (Power)

MCP (Power)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

Monday, November 17, 2014

Monday, November 17, 2014

Monday, November 17, 2014

Date: Sheet of

Date: Sheet of

Date: Sheet of

VCCST_PG_EC 29

Haydn

Haydn

Haydn

1

10 45

10 45

10 45

1.0

1.0

1.0

Haswell MCP (Power2)

5

4

3

2

1

+1.05VS_VCCHSIO

D D

+1.05VS

C C

RC107 0_0402_5%

+1.05VS

CC78

33P_0402_50V8J

1

2

RF_NS@

LC1

1 2

2.2UH_CIG10W2R2MNC_20%

LC2

1 2

2.2UH_CIG10W2R2MNC_20%

LC4

1 2

2.2UH_CIG10W2R2MNC_20%

LC5

1 2

2.2UH_CIG10W2R2MNC_20%

1 2

CC6

22U_0603_6.3V6-M

1

2

1

2

1

2

1

2

1

@

2

CC2
22U_0603_6.3V6-M

CC4
22U_0603_6.3V6-M

CC118
47U_0805_6.3V6-M

CC121

22U_0603_6.3V6-M

22U_0603_6.3V6-M

1

CC13
22U_0603_6.3V6-M

2

CC128

1

@

22U_0603_6.3V6-M

2

+1.05VS_PUSB3PLL
41mA

1

CC3
22U_0603_6.3V6-M

2

+1.05VS_PSATA3PLL
42mA

1

CC5
22U_0603_6.3V6-M

2

+1.05VS_PLPTVCC1P05
185mA

1

CC130

CD@

CD@

2

+1.05VS_PLPTCLKPLL
31mA

1

CD@

CC127
47U_0805_6.3V6-M

2

+1.05VS_POPIPLL
57mA

CC129

1

@

@

22U_0603_6.3V6-M

2

1

22U_0603_6.3V6-M

2

CC131

1

22U_0603_6.3V6-M

2

+1.05VS_PUSB3PLL

1

CC107
1U_0402_10V6K

2

+1.05VS_PSATA3PLL

1

CC111
1U_0402_10V6K

2

+1.05VS_PLPTVCC1P05

1

CC132

2

+1.05VS_PLPTCLKPLL

1

CC119
1U_0402_10V6K

2

+1.05VS_POPIPLL

1

CC122
1U_0402_10V6K

2

1U_0402_10V6K
CC117

+1.05VS

CC112,CC101
Place Near K9,L10,M9

CC84
Place Near N8,P9

CC107
Place Near B18

CC111
Place Near B11

CC122
Place Near AA21,W21

CC103
Place Near J13

CC120
Place Near AH14

CC102
Place Near AH13

CC100
Place Near AC9,AA9,AE20,AE21

CC97
Place Near AH10

CC95
Place Near V8,W9

CC117
Place Near J18,K19

CC119
Place Near A20

CC98,CC99
Place Near J17,R21,T21

PJ11
JUMP_43X39

112

@

+1.05VS_VCCHSIO

2

VCC1_05[1:9]

1.741A

+3VALW_PCH

+3VS

VCCHSIO

1.838A

CD@

+1.05VS_PSATA3PLL

+1.05VS_POPIPLL

+1.05VS_PLPTCLKPLL

CD@

1 2

RC99 0_0402_5%

+3VALW_PCH

12

CC1121U_0402_10V6K

12

CC1011U_0402_10V6K

12

CC841U_0402_10V6K

12

CC1031U_0402_10V6K @

12

CC1201U_0402_10V6K

12

CC1021U_0402_10V6K @

12

CC10022U_0603_6.3V6-M

12

CC971U_0402_10V6K @

12

CC9522U_0603_6.3V6-M

12

CC991U_0402_10V6K

12

CC981U_0402_10V6K

+1.05VS_PUSB3PLL

+3VS

+3VALW_PCH

+3VALW_PCH

VCCSUS3_3[1:5]
65mA

VCCDSW3_3

+1.05VS_VCCHSIO

+1.05VS

1

TP42 @

+1.05VS_DCPSUS3

VCCHDA
11mA

VCCHDA

+1.05VS_DCPSUS2

VCCDSW
114mA

VCC3_3[1:4]
41mA

+1.05VS_PLPTVCC1P05

+1.05VS

1

TP47 @

1

TP48 @

UC1M

K9

VCCHSIO[1]

L10

VCCHSIO[2]

M9

VCCHSIO[3]

N8

VCC1_05[1]

P9

VCC1_05[2]

B18

VCCUSB3PLL

B11

VCCSATA3PLL

Y20

RSVD30

AA21

VCCAPLL[1]

W21

VCCAPLL[2]

J13

DCPSUS3

AH14

VCCHDA

AH13

DCPSUS2

AC9

VCCSUS3_3[1]

AA9

VCCSUS3_3[2]

AH10

VCCDSW3_3

V8

VCC3_3[1]

W9

VCC3_3[2]

J18

VCCCLK[1]

K19

VCCCLK[2]

A20

VCCACLKPLL

J17

VCCCLK[3]

R21

VCCCLK[4]

T21

VCCCLK[5]

K18

RSVD31

M20

RSVD32

V21

RSVD33

AE20

VCCSUS3_3[3]

AE21

VCCSUS3_3[4]

HASWELL-ULT-DDR3L_BGA1168

@

HSIO

USB3

HDA

VRM

GPIO/LPC

LPT LP POWER

HSW_ULT_DDR3L

OPI

13 OF 19

RTC

SPI

CORE

THERMAL SENSOR

SERIAL IO

SUS OSCILLATOR

USB2

VCCSUS3_3[5]

VCCRTC
DCPRTC

VCCSPI

VCCASW[1]
VCCASW[2]

VCC1_05[3]
VCC1_05[4]
VCC1_05[5]
VCC1_05[6]

VCC1_05[7]
DCPSUSBYP[1]
DCPSUSBYP[2]

VCCASW[3]

VCCASW[4]

VCCASW[5]

DCPSUS1[1]
DCPSUS1[2]

VCCTS1_5
VCC3_3[3]
VCC3_3[4]

VCCSDIO[1]
VCCSDIO[2]

DCPSUS4

RSVD34
VCC1_05[8]
VCC1_05[9]

+3VALW_PCH

CC125 1U_0402_10V6K

VCCRTC

+1.05VS

+1.05VS

+1.05VS

+1.5VS

+3VS

+3VS

+1.05VS

TP121@

CC85 1U_0402_10V6K
CC86 .1U_0402_10V6-K
CC87 .1U_0402_10V6-K
CC88 .1U_0402_10V6-K

CC90 .1U_0402_10V6-K

CC113 10U_0603_6.3V6M
CC124 1U_0402_10V6K
CC115 1U_0402_10V6K

CC123 1U_0402_10V6K

CC94 22U_0603_6.3V6-M@
CC126 1U_0402_10V6K

CC109

CC96 .1U_0402_10V6-K

CC105 1U_0402_10V6K

CC110

CC104 1U_0402_10V6K

AH11
AG10
AE7

+DCPRTC

Y8

VCCSPI

AG14
AG13

J11
H11
H15
AE8
AF22
AG19

+PCH_DCPSUSBYP

AG20
AE9
AF9
AG8
AD10
AD8

+1.05VS_DCPSUS1VCCDSW3_3

J15
K14
K16

U8
T9

0529
DEL CC108 for VCCSPI change

AB8

+1.05VS_DCPSUS4

1

AC20
AG16
AG17

1 2
1 2
1 2
1 2
1 2

1 2

1 2
1 2
1 2

1 2

1 2
1 2

1 2

1 2

1 2

CD@

1 2

1 2

CD@

@

1U_0402_10V6K@

1U_0402_10V6K@

VCCRTC
1mA

VCCSPI
18mA

VCCASW[1:5]
658mA

VCCTS1_5
3mA

VCCSDIO
17mA

CC1251
Place Near AH11

CC85,86,87
Place Near AG10

CC88
Place Near AE7

CC90
Place Near Y8

CC90
Place Near Y8

CC113,CC124,CC115
Place Near J11,H11,H15,AE8,AF22

CC123
Place Near AG19,Ag20

CC94,CC126
Place Near AE9,AF9,AG8

CC109
Place Near AD10,AD8

CC96
Place Near K14,K16

CC105
Place Near U8,T9

CC108
Place Near AB8

CC104
Place Near AG16,AG17

12

@

B B

A A

5

4

RC102 0_0402_5%

1 2

RC103 0_0402_5%

1 2

CC398 0.47U_0402_25V6K

0524
Add 0.47U for VCCDSW3_3 ramp up
slower than 100us

+3V_SPI

+3VS

RC105

1 2

12

RC106 0_0402_5%

@

+PCH_DCPSUSBYPVCCDSW3_3

0_0402_5%

VCCHDA

VCCSPI

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2014/01/11

2014/01/11

2014/01/11

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2013/11/08

2013/11/08

2013/11/08

Title

Title

Title

MCP (Power2)

MCP (Power2)

MCP (Power2)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

Haydn

Haydn

Haydn

Monday, November 17, 2014

Monday, November 17, 2014

Monday, November 17, 2014

11 45

11 45

1

11 45

1.0

1.0

1.0

5

4

3

2

1

Haswell MCP (VSS)

HSW_ULT_DDR3L

UC1N

A11

VSS1

A14

VSS2

A18

VSS3

A24

VSS4

A28

VSS5

A32

D D

C C

B B

VSS6

A36

VSS7

A40

VSS8

A44

VSS9

A48

VSS10

A52

VSS11

A56

VSS12

AA1

VSS13

AA58

VSS14

AB10

VSS15

AB20

VSS16

AB22

VSS17

AB7

VSS18

AC61

VSS19

AD21

VSS20

AD3

VSS21

AD63

VSS22

AE10

VSS23

AE5

VSS24

AE58

VSS25

AF11

VSS26

AF12

VSS27

AF14

VSS28

AF15

VSS29

AF17

VSS30

AF18

VSS31

AG1

VSS32

AG11

VSS33

AG21

VSS34

AG23

VSS35

AG60

VSS36

AG61

VSS37

AG62

VSS38

AG63

VSS39

AH17

VSS40

AH19

VSS41

AH20

VSS42

AH22

VSS43

AH24

VSS44

AH28

VSS45

AH30

VSS46

AH32

VSS47

AH34

VSS48

AH36

VSS49

AH38

VSS50

AH40

VSS51

AH42

VSS52

AH44

VSS53

AH49

VSS54

AH51

VSS55

AH53

VSS56

AH55

VSS57

AH57

VSS58

AJ13

VSS59

AJ14

VSS60

AJ23

VSS61

AJ25

VSS62

AJ27

VSS63

AJ29

VSS64

HASWELL-ULT-DDR3L_BGA1168

@

14 OF 19

VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98

VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128

AJ35
AJ39
AJ41
AJ43
AJ45
AJ47
AJ50
AJ52
AJ54
AJ56
AJ58
AJ60
AJ63
AK23
AK3
AK52
AL10
AL13
AL17
AL20
AL22
AL23
AL26
AL29
AL31
AL33
AL36
AL39
AL40
AL45
AL46
AL51
AL52
AL54
AL57
AL60
AL61
AM1
AM17
AM23
AM31
AM52
AN17
AN23
AN31
AN32
AN35
AN36
AN39
AN40
AN42
AN43
AN45
AN46
AN48
AN49
AN51
AN52
AN60
AN63
AN7
AP10
AP17
AP20

AP22
AP23
AP26
AP29

AP3
AP31
AP38
AP39
AP48
AP52
AP54
AP57
AR11
AR15
AR17
AR23
AR31
AR33
AR39
AR43
AR49

AR5
AR52
AT13
AT35
AT37
AT40
AT42
AT43
AT46
AT49
AT61
AT62
AT63

AU1
AU16
AU18
AU20
AU22
AU24
AU26
AU28
AU30
AU33
AU51
AU53
AU55
AU57
AU59
AV14

AV16
AV20
AV24
AV28

AV33
AV34
AV36
AV39
AV41
AV43
AV46
AV49
AV51
AV55

HSW_ULT_DDR3L

UC1O

VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172
VSS173
VSS174
VSS175
VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
VSS182
VSS183
VSS184
VSS185
VSS186
VSS187
VSS188
VSS189
VSS190
VSS191
VSS192

HASWELL-ULT-DDR3L_BGA1168

@

15 OF 19

VSS193
VSS194
VSS195
VSS196
VSS197
VSS198
VSS199
VSS200
VSS201
VSS202
VSS203
VSS204
VSS205
VSS206
VSS207
VSS208
VSS209
VSS210
VSS211
VSS212
VSS213
VSS214
VSS215
VSS216
VSS217
VSS218
VSS219
VSS220
VSS221
VSS222
VSS223
VSS224
VSS225
VSS226
VSS227
VSS228
VSS229
VSS230
VSS231
VSS232
VSS233
VSS234
VSS235
VSS236
VSS237
VSS238
VSS239
VSS240
VSS241
VSS242
VSS243
VSS244
VSS245
VSS246
VSS247
VSS248
VSS249
VSS250
VSS251
VSS252
VSS253
VSS254
VSS255
VSS256

AV59
AV8
AW16
AW24
AW33
AW35
AW37
AW4
AW40
AW42
AW44
AW47
AW50
AW51
AW59
AW60
AY11
AY16
AY18
AY22
AY24
AY26
AY30
AY33
AY4
AY51
AY53
AY57
AY59
AY6
B20
B24
B26
B28
B32
B36
B4
B40
B44
B48
B52
B56
B60
C11
C14
C18
C20
C25
C27
C38
C39
C57
D12
D14
D18
D2
D21
D23
D25
D26
D27
D29
D30
D31

UC1P

D33

VSS257

D34

VSS258

D35

VSS259

D37

VSS260

D38

VSS261

D39

VSS262

D41

VSS263

D42

VSS264

D43

VSS265

D45

VSS266

D46

VSS267

D47

VSS268

D49

VSS269

D5

VSS270

D50

VSS271

D51

VSS272

D53

VSS273

D54

VSS274

D55

VSS275

D57

VSS276

D59

VSS277

D62

VSS278

D8

VSS279

E11

VSS280

E17

VSS281

F20

VSS282

F26

VSS283

F30

VSS284

F34

VSS285

F38

VSS286

F42

VSS287

F46

VSS288

F50

VSS289

F54

VSS290

F58

VSS291

F61

VSS292

G18

VSS293

G22

VSS294

G3

VSS295

G5

VSS296

G6

VSS297

G8

VSS298

H13

VSS299

HASWELL-ULT-DDR3L_BGA1168

@

HSW_ULT_DDR3L

VSS_SENSE

16 OF 19

VSS_SENSE

Length Match: No More Than 25Mil
Space: More Than 25Mil
GND Reference

VSS300
VSS301
VSS302
VSS303
VSS304
VSS305
VSS306
VSS307
VSS308
VSS309
VSS310
VSS311
VSS312
VSS313
VSS314
VSS315
VSS316
VSS317
VSS318
VSS319
VSS320
VSS321
VSS322
VSS323
VSS324
VSS325
VSS326
VSS327
VSS328
VSS329
VSS330
VSS331
VSS332
VSS333
VSS334
VSS335
VSS336
VSS337

VSS338
VSS339
VSS340

VSS341

H17
H57
J10
J22
J59
J63
K1
K12
L13
L15
L17
L18
L20
L58
L61
L7
M22
N10
N3
P59
P63
R10
R22
R8
T1
T58
U20
U22
U61
U9
V10
V3
V7
W20
W22
Y10
Y59
Y63

V58
AH46
V23
E62
AH16

RC131
0_0402_5%

RC132
100_0402_1%

1 2

1 2

CPU_VSS_SENSE 43

A A

Title

Title

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

2014/01/11

2014/01/11

2014/01/11

3

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2013/11/08

2013/11/08

2013/11/08

2

Title

MCP (VSS)

MCP (VSS)

MCP (VSS)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

B

B

B

Monday, November 17, 2014

Monday, November 17, 2014

Date: Sheet of

Date: Sheet of

Date: Sheet of

Monday, November 17, 2014

Haydn

Haydn

Haydn

1

12 45

12 45

12 45

1.0

1.0

1.0

5

Haswell MCP (OTHER)

DC_TEST_AY2_AW2
DC_TEST_AY3_AW3

1

TP60 @

TP67 @

D D

C C

TP_DC_TEST_AY60
DC_TEST_AY61_AW61
DC_TEST_AY62_AW62

1

TP_DC_TEST_B2
DC_TEST_A3_B3
DC_TEST_A61_B61
DC_TEST_B62_B63

DC_TEST_C1_C2

UC1Q

AY2

DAISY_CHAIN_NCTF_AY2

AY3

DAISY_CHAIN_NCTF_AY3

AY60

DAISY_CHAIN_NCTF_AY60

AY61

DAISY_CHAIN_NCTF_AY61

AY62

DAISY_CHAIN_NCTF_AY62

B2

DAISY_CHAIN_NCTF_B2

B3

DAISY_CHAIN_NCTF_B3

B61

DAISY_CHAIN_NCTF_B61

B62

DAISY_CHAIN_NCTF_B62

B63

DAISY_CHAIN_NCTF_B63

C1

DAISY_CHAIN_NCTF_C1

C2

DAISY_CHAIN_NCTF_C2

HASWELL-ULT-DDR3L_BGA1168

@

UC1R

AT2

RSVD35

AU44

RSVD36

AV44

RSVD37

D15

RSVD38

F22

RSVD39

H22

RSVD40

J21

RSVD41

HASWELL-ULT-DDR3L_BGA1168

@

UC1S

4

HSW_ULT_DDR3L

17 OF 19

HSW_ULT_DDR3L

18 OF 19

HSW_ULT_DDR3L

DAISY_CHAIN_NCTF_A3
DAISY_CHAIN_NCTF_A4

DAISY_CHAIN_NCTF_A60
DAISY_CHAIN_NCTF_A61
DAISY_CHAIN_NCTF_A62

DAISY_CHAIN_NCTF_AV1
DAISY_CHAIN_NCTF_AW1
DAISY_CHAIN_NCTF_AW2
DAISY_CHAIN_NCTF_AW3

DAISY_CHAIN_NCTF_AW61
DAISY_CHAIN_NCTF_AW62
DAISY_CHAIN_NCTF_AW63

RSVD42
RSVD43
RSVD44
RSVD45

RSVD46
RSVD47
RSVD48
RSVD49
RSVD50
RSVD51
RSVD52

A3

DC_TEST_A3_B3

A4

TP_DC_TEST_A4

A60

TP_DC_TEST_A60

A61

DC_TEST_A61_B61

A62

TP_DC_TEST_A62

AV1

TP_DC_TEST_AV1

AW1

TP_DC_TEST_AW1

AW2

DC_TEST_AY2_AW2

AW3

DC_TEST_AY3_AW3

AW61

DC_TEST_AY61_AW61

AW62

DC_TEST_AY62_AW62

AW63

TP_DC_TEST_AW63

N23
R23
T23
U10

AL1
AM11
AP7
AU10
AU15
AW14
AY14

3

1

TP59@

1

TP64@

1

TP66@

1

TP34@

1

TP40@

1

TP45@

CFG4

CFG4

*L: Embedded DisplayPort Enabled
H: Embedded DisplayPort Disabled

CFG0

CFG1

CFG8

CFG9

CFG10

2

RC1633 1K_0402_1%

RC1634 1K_0402_1%

RC1635 1K_0402_1%

RC1644 1K_0402_1%

RC166 1K_0402_1%

RC167 1K_0402_1%

12

12

@

12

@

12

@

12

@

12

@

1

1

TP84 @
TP85 @
TP86 @
TP87 @
TP88 @
TP89 @
TP90 @
TP91 @
TP92 @
TP93 @

B B

RC134 49.9_0402_1%

CFG_RCOMP&TD_IREF

Width 20Mil
Space 15Mil
Length 500Mil

RC136 8.2K_0402_1%

A A

TP94 @
TP96 @
TP98 @
TP99 @
TP100 @
TP101 @

TP116 @
TP117 @
TP155 @
TP160 @

CFG0

1

CFG1

1

CFG2

1

CFG3

1

CFG4

1

CFG5

1

CFG6

1

CFG7

1

CFG8

1

CFG9

1

CFG10

1

CFG11

1

CFG12

1

CFG13

1

CFG14

1

CFG15

1

CFG16

1

CFG18

1

CFG17

1

CFG19

12

12

CFG_RCOMP

TD_IREF

5

AC60

CFG0

AC62

CFG1

AC63

CFG2

AA63

CFG3

AA60

CFG4

Y62

CFG5

Y61

CFG6

Y60

CFG7

V62

CFG8

V61

CFG9

V60

CFG10

U60

CFG11

T63

CFG12

T62

CFG13

T61

CFG14

T60

CFG15

AA62

CFG16

U63

CFG18

AA61

CFG17

U62

CFG19

V63

CFG_RCOMP

A5

RSVD53

E1

RSVD54

D1

RSVD55

J20

RSVD56

H18

RSVD57

B12

TD_IREF

HASWELL-ULT-DDR3L_BGA1168

@

RESERVED

19 OF 19

4

RSVD_TP5
RSVD_TP6

RSVD_TP7
RSVD_TP8

RSVD_TP9

RSVD_TP10

RSVD_TP11

PROC_OPI_RCOMP

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

RSVD58

RSVD59

RSVD60
RSVD61

RSVD62
RSVD63

VSS342
VSS343

RSVD64
RSVD65

AV63
AU63

C63
C62
B43

A51
B51

L60

N60

W23
Y22
AY15

AV62
D58

P22
N21

P20
R20

1
1

1
1

1
1

1

PROC_OPI_COMP

2014/01/11

2014/01/11

2014/01/11

TP56@
TP57@

TP58@
TP62@

TP63@
TP65@

TP69@

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

3

CFG3

CFG3

1: Disable
0: Enable, Set DFX Enabled BIT
In Debug Interface MSR

RC135 49.9_0402_1%

Deciphered Date

Deciphered Date

Deciphered Date

12

OPI_RCOMP

Width 20Mil
Space 15Mil
Length 500Mil

2013/11/08

2013/11/08

2013/11/08

RC1636 1K_0402_1%

2

12

@

Title

Title

Title

MCP (OTHER)

MCP (OTHER)

MCP (OTHER)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

B

B

B

Monday, November 17, 2014

Monday, November 17, 2014

Date: Sheet of

Date: Sheet of

Date: Sheet of

Monday, November 17, 2014

Haydn

Haydn

Haydn

1

13 45

13 45

13 45

1.0

1.0

1.0

A

DDR SO-DIMM

Trace width:20 mils

DDR_SA_VREFDQ6

1 1

DDR Swap Table

New Net Name Pin Number Old Net Name

2 2

VDDQ(2A)

3 3

Decoupling CAP

4 PCS 1UF CAP Near Each Side Of DIMM VDD Pin
4PCS 10UF CAP Near Each Side Of DIMM VDD Pin

VTT(700mA)
Decoupling CAP

4PCS 0.1UF CAP Near The DIMM
2PCS 10UF CAP On the VTT Island

+0.68VS

1

2

+1.35V

4 4

1

2

Space:20mils

1

CD29

0.022U_0402_16V7-K

CD@

2

12

RD14

24.9_0402_1%

CD@

.1U_0402_10V6-K

1

CD115

2

10U_0603_6.3V6M

CD97

CD100

1

2

.1U_0402_10V6-K

.1U_0402_10V6-K

1

1

CD66

CD65

10U_0603_6.3V6M

CD106

1

2

CD88

2

2

CD@

10U_0603_6.3V6M

10U_0603_6.3V6M

CD96

1

2

1 2

.1U_0402_10V6-K

CD101

1

2

RD12
2_0402_5%

1

CC53

2

10U_0603_6.3V6M

B

+1.35V

12

RD11

1.82K_0402_1%

12

RD13

1.82K_0402_1%

10U_0603_6.3V6M

10U_0603_6.3V6M

1

CC55

2

10U_0603_6.3V6M

10U_0603_6.3V6M

CD93

CD105

1

1

2

2

CD103

2.2U_0603_6.3V6K

1

CD@

2

DDRA_CKE06

DDRA_BS2#6

DDRA_CLK06
DDRA_CLK0#6

DDRA_BS0#6

DDRA_WE#6
DDRA_CAS#6

DDRA_CS1#6

+3VS

2.2U_0603_6.3V6K

1

CD102

2

CD@

1U_0402_6.3V6K

10U_0603_6.3V6M

CD90

CD91

1

1

2

2

+VREF_DQ_DIMMA

CD108

.1U_0402_10V6-K

1

2

CD@

RD16 0_0402_5%

.1U_0402_10V6-K

1

CD99

2

1U_0402_6.3V6K

CD107

1

1

2

2

C

+1.35V +1.35V

JDDRL

1

VREF_DQ

3

VSS_1

DDRA_DQ0
DDRA_DQ1

DDRA_DQ2
DDRA_DQ3

DDRA_DQ12
DDRA_DQ8

DDRA_DQS#1
DDRA_DQS1

DDRA_DQ13
DDRA_DQ9

DDRA_DQ20
DDRA_DQ17

DDRA_DQS#2
DDRA_DQS2

DDRA_DQ18
DDRA_DQ19

DDRA_DQ24
DDRA_DQ28

DDRA_DQ26
DDRA_DQ27

DDRA_MA12
DDRA_MA9

DDRA_MA8
DDRA_MA5

DDRA_MA3
DDRA_MA1

DDRA_MA10
DDRA_BS0#

DDRA_MA13

DDRA_DQ37
DDRA_DQ32

DDRA_DQS#4
DDRA_DQS4

DDRA_DQ34
DDRA_DQ35

DDRA_DQ40
DDRA_DQ41

DDRA_DQ42
DDRA_DQ43

DDRA_DQ48
DDRA_DQ49

DDRA_DQS#6
DDRA_DQS6

DDRA_DQ50
DDRA_DQ51

DDRA_DQ56
DDRA_DQ57

DDRA_DQ58
DDRA_DQ59

1 2

1 2

1U_0402_6.3V6K

CD109

1

2

RD22
0_0402_5%

5

DQ0

7

DQ1

9

VSS_3

11

DM0

13

VSS_5

15

DQ2

17

DQ3

19

VSS_7

21

DQ8

23

DQ9

25

VSS_9

27

DQS1#

29

DQS1

31

VSS_11

33

DQ10

35

DQ11

37

VSS_13

39

DQ16

41

DQ17

43

VSS_15

45

DQS2#

47

DQS2

49

VSS_17

51

DQ18

53

DQ19

55

VSS_19

57

DQ24

59

DQ25

61

VSS_21

63

DM3

65

VSS_23

67

DQ26

69

DQ27

71

VSS_25

73

CKE0

75

VDD_1

77

NC_1

79

BA2

81

VDD_3

83

A12/BC#

85

A9

87

VDD_5

89

A8

91

A5

93

VDD_7

95

A3

97

A1

99

VDD_9

101

CK0

103

CK0#

105

VDD_11

107

A10/AP

109

BA0

111

VDD_13

113

WE#

115

CAS#

117

VDD_15

119

A13

121

S1#

123

VDD_17

125

TEST

127

VSS_27

129

DQ32

131

DQ33

133

VSS_29

135

DQS4#

137

DQS4

139

VSS_31

141

DQ34

143

DQ35

145

VSS_33

147

DQ40

149

DQ41

151

VSS_36

153

DM5

155

VSS_37

157

DQ42

159

DQ43

161

VSS_39

163

DQ48

165

DQ49

167

VSS_41

169

DQS6#

171

DQS6

173

VSS_43

175

DQ50

177

DQ51

179

VSS_45

181

DQ56

183

DQ57

185

VSS_47

187

DM7

189

VSS_49

191

DQ58

193

DQ59

195

VSS_51

197

SA0

199

VDDSPD

201

SA1

203

VTT_1

205

GND1

207

BOSS1

LCN_DAN06-K4406-0103

ME@

1U_0402_6.3V6K

1U_0402_6.3V6K

CD110

CD111

1

1

2

2

VREF_CA

DIMM ADRESS:
SA1:SA0 00

1U_0402_6.3V6K

CD113

CD112

1

2

VSS_2

VSS_4

DQS0#

DQS0

VSS_6

VSS_8

DQ12
DQ13

VSS_10

RESET#

VSS_12

DQ14
DQ15

VSS_14

DQ20
DQ21

VSS_16

VSS_18

DQ22
DQ23

VSS_20

DQ28
DQ29

VSS_22

DQS3#

DQS3

VSS_24

DQ30
DQ31

VSS_26

CKE1

VDD_2

VDD_4

VDD_6

VDD_8

VDD_10

CK1#

VDD_12

RAS#

VDD_14

ODT0

VDD_16

ODT1

NC_2

VDD_18

VSS_28

DQ36
DQ37

VSS_30

VSS_32

DQ38
DQ39

VSS_34

DQ44
DQ45

VSS_35

DQS5#

DQS5

VSS_38

DQ46
DQ47

VSS_40

DQ52
DQ53

VSS_42

VSS_44

DQ54
DQ55

VSS_46

DQ60
DQ61

VSS_48

DQS7#

DQS7

VSS_50

DQ62
DQ63

VSS_52

EVENT#

VTT_2

GND2

BOSS2

1U_0402_6.3V6K

D

2
4

DQ4
DQ5

DQ6
DQ7

DM1

DM2

A15
A14

A11

A7

A6
A4

A2
A0

CK1

BA1

S0#

DM4

DM6

SDA

SCL

DDRA_DQ4

6

DDRA_DQ5

8
10

DDRA_DQS#0

12

DDRA_DQS0

14
16

DDRA_DQ6

18

DDRA_DQ7

20
22

DDRA_DQ11

24

DDRA_DQ10

26
28
30
32
34

DDRA_DQ14

36

DDRA_DQ15

38
40

DDRA_DQ21

42

DDRA_DQ16

44
46
48
50

DDRA_DQ22

52

DDRA_DQ23

54
56

DDRA_DQ29

58

DDRA_DQ25

60
62

DDRA_DQS#3

64

DDRA_DQS3

66
68

DDRA_DQ30

70

DDRA_DQ31

72

74
76
78

DDRA_MA15

80

DDRA_MA14

82
84

DDRA_MA11

86

DDRA_MA7

88
90

DDRA_MA6

92

DDRA_MA4

94
96

DDRA_MA2

98

DDRA_MA0

100
102
104
106
108
110
112
114
116

DDRA_ODT0

118
120

DDRA_ODT1

122
124
126
128
130

DDRA_DQ36

132

DDRA_DQ33

134
136
138
140

DDRA_DQ38

142

DDRA_DQ39

144
146

DDRA_DQ44

148

DDRA_DQ45

150
152

DDRA_DQS#5

154

DDRA_DQS5

156
158

DDRA_DQ46

160

DDRA_DQ47

162
164

DDRA_DQ52

166

DDRA_DQ53

168
170
172
174

DDRA_DQ54

176

DDRA_DQ55

178
180

DDRA_DQ60

182

DDRA_DQ61

184
186

DDRA_DQS#7

188

DDRA_DQS7

190
192

DDRA_DQ62

194

DDRA_DQ63

196
198
200
202
204

206
208

1U_0402_6.3V6K

CD114

1

2

CD94

For RF request

CD95

33P_0402_16V7K

1

2

DDRA_CKE1 6

DDRA_CLK1 6
DDRA_CLK1# 6

DDRA_BS1# 6
DDRA_RAS# 6

DDRA_CS0# 6

.1U_0402_10V6-K

1

2

CD@

PM_SMB_DAT 7,31
PM_SMB_CLK 7,31

+0.68VS

E

RF_NS@

1

2

+VREF_CA

1

CD98

2.2U_0603_6.3V6K

2

CD@

CD104

33P_0402_16V7K

RF_NS@

DDRA_DRAMRST# 5

CPU_DRAMPG_CNTL5,39

Trace width:20 mils
Space:20mils

F

+1.35V

12

RD6

1.82K_0402_1%

12

RD7

1.82K_0402_1%

RD9
2_0402_5%

1 2

1 2

RD56
0_0402_5%

12

1

2

@

1

CD20

0.022U_0402_16V7-K

2

CD@

RD8

24.9_0402_1%

CD@

DDRA_DQ[63:0] 6

DDRA_MA[15:0] 6

DDRA_DQS[7:0] 6

DDRA_DQS#[7:0] 6

+1.35V

1

2

G

3

CD257
.1U_0402_10V6-K

G

QC6

D

S

PJA138K_SOT23-3

DDR_SM_VREFCA 6

1 2

RD53 66.5_0402_1%

1 2

RD54 66.5_0402_1%

H

DDRA_ODT0

DDRA_ODT1DDRA_ODT

Title

Title

Security Classification

Security Classification

CD@

A

CD@

CD@

CD@

B

CD@

CD@

CD@

C

CD@

D

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

E

2013/03/26

2013/03/26

2013/03/26

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

F

2013/02/01

2013/02/01

2013/02/01

Title

DDR3L

DDR3L

DDR3L

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

G

Haydn

Haydn

Haydn

Monday, November 17, 2014

Monday, November 17, 2014

Monday, November 17, 2014

14 45

14 45

14 45

H

1.0

1.0

1.0

5

4

3

2

1

N15x GPIO

GPIO I/O ACTIVE Function Description

GPIO0

D D

GPIO1

GPIO2

GPIO3

GPIO4

GPIO5

GPIO6

GPIO7

GPIO8

GPIO9

GPIO10

GPIO11

GPIO12

C C

GPIO13

GPIO14

GPIO15

GPIO16

GPIO17

GPIO18

GPIO19

GPIO20

GPIO21

OVERT

OUT

OUT

OUT

OUT

OUT

OUT

IN

OUT

I/O

I/O N/A

OUT

FB Enable for GC6 2.0-

N/A

N/A

N/A

N/A

GPU power sequencing---3V3_MAIN_EN

N/A

GPU wake signal for GC6 2.0

-

N/A

System side PCIe reset Monitor

-

2.2K Pull-up

N/A

GPU Core VDD PWM control signal-OUT

IN

OUT

IN

IN

AC Power Detect Input

Phase Shedding-

N/A

N/A

N/A

IN

N/A

IN

N/A

IN

N/A

N/A

OUT GPU PCIe self-reset control

Active Low Thermal Catastrophic Over TemperatureOUT

(10K pull High)

Performance Mode P0 TDP at Tj = 102 C* (DDR3)

Products

N14X
128bit
2GB
DDR3

NVCLKMemGPU
/MCLK

NVVDD (1.05V) (3.3V)

(V)

TBDTBDTBD

TBDTBD

FBVDD

(GPU+Mem)

(1.35V) (1.35V)

(W)(A)(W)(A) (W)(W)(A)

N15x Multi-level Straps

Physical
Strapping pin

ROM_SCLK

ROM_SI

ROM_SO

STRAP0

STRAP1

STRAP2

STRAP3

STRAP4

Power Rail

SMBUS_ALT_ADDR

0

0x9E (Default)

1

0x9C (Multi-GPU usage)

Logical

+3VGS

+3VGS

+3VGS

+3VGS

+3VGS

+3VGS

+3VGS

+3VGS

Strapping Bit3

SOR3_EXPOSED

DEVID_SEL

Reserved(keep pull-up and pull-down footprint and stuff 50Kohm pull-up)

Reserved(keep pull-up and pull-down footprint and not stuff by default)

Logical
Strapping Bit2

SOR2_EXPOSED SOR1_EXPOSED

RAM_CFG[2]

PCIE_CFG

PCI ExpressFBVDDQ
(1.05V)
(6)(1,5)(4)

I/O and
PLLVDD

(mA) (W)(W)(mA)

TBDTBDTBDTBDTBD TBDTBDTBD TBDTBDTBD

Logical
Strapping Bit1

RAM_CFG[1]RAM_CFG[3]

Logical
Strapping Bit0

SOR0_EXPOSED

RAM_CFG[0]

VGA_DEVICESMB_ALT_ADDR

Other

(mA)(MHz)(W)(W)

N15V-GM Power Sequence

B B

+3VG_AON

+VGA_CORE

+1.35VGS

+1.05VS_VGA

tNVVDD >0

tFBVDDQ >0

tPEX_VDD >0

1. all power rail ramp up time should be larger than 40us 2. Optimus system VDD33 avoids drop down earlier than NVDD and FBVDDQ

Other Power rail

+3VG_AON

Tpower-off <10ms

1.all GPU power rails should be turned off within 10ms

N15S-GT Power Sequence

+3VG_AON

A A

+VGA_CORE

+1.05VS_VGA

+1.35VGS

tNVVDD >0

tPEX_VDD >0

1. all power rail ramp up time should be larger than 40us and less than 2ms .

5

4

3

N15x Binary Straps

Physical
Strapping pin

ROM_SCLK

ROM_SI

ROM_SO

STRAP0

STRAP1

STRAP2

STRAP3

STRAP4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

Power Rail

+3VGS

+3VGS

+3VGS

+3VGS

+3VGS

+3VGS

+3VGS

+3VGS

2013/08/08

2013/08/08

2013/08/08

Strap Mapping

SMB_ALT_ADDR

SUB_VENDOR

VGA_DEVICE

RAM_CFG[0]

RAM_CFG[1]

RAM_CFG[2]

RAM_CFG[3]

PCIE_MAX_SPEED

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

20140213

20140213

20140213

Title

Title

Title

VGA Notes List

VGA Notes List

VGA Notes List

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

Monday, November 17, 2014

Monday, November 17, 2014

Monday, November 17, 2014

Date: Sheet of

Date: Sheet of

Date: Sheet of

Haydn

Haydn

Haydn

1

15 45

15 45

15 45

1.0

1.0

1.0

5

1 2

34

12

VCC

RV14 10K_0402_5%

RV16

0_0402_5%@

RV180

2.2K_0402_5%

GC6@

RV1 0_0402_5%GC6@

RV2 0_0402_5%GC6@

5

4

+3VG_AON

RV37
10K_0402_5%

@

1 2

+3VGARST

12

OPT@

1 2

RV12 0_0402_5%

1

2

PLT_RST_VGA#

GC6_FB_EN4

PCH_GPU_EVENT#4

PCIE_CRX_GTX_N[0..3]9

PCIE_CRX_GTX_P[0..3]9

PCIE_CTX_C_GRX_N[0..3]9

PCIE_CTX_C_GRX_P[0..3]9

D D

VGA_SMB_CK2

VGA_SMB_DA2

C C

PCH_PLT_RST#8,29,30

PCH_GPU_RST#4

B B

0526 new symbol for haydn .

GPU_PEX_RST_HOLD#

SYS_PEX_RST_MON#

2.2K_0402_5%

OPT@

RV3

+3VG_AON

RV5

2.2K_0402_5%

OPT@

1 2

1 2

RV9 0_0402_5%@

PCH_PLT_RST#

BAT54AW_SOT323-3

S

G

2

RV7 0_0402_5%@

S

61

D

QV1A
2N7002KDWH_SOT363-6

OPT@

12

DV6

3

1

2

GC6@

1 2

0_0402_5%@

+3VG_AON

5

G

D

QV1B
2N7002KDWH_SOT363-6

OPT@

UV2

1

B

2

A

GND3Y

74LVC1G08GW_SOT353-1-5

OPT@

1 2

+3VGS

1 2

RV39

FB_GC6_EN_R

GPU_EVENT#

EC_SMB_CLK0 7,29,31

EC_SMB_DAT0 7,29,31

PU AT CPU SIDE, +3VS AND 2.2K

+3VS

RV10

12

@

+3VG_AON

0_0402_5%

1 2

@

CV11
.1U_0402_10V6-K

OPT@

SYS_PEX_RST_MON#

Differential signal

change to BAT54A for cost down

+3VG_AON

RV40
10K_0402_5%

OPT@

1 2

1

CV23

OPT@

A A

GPU_PCIE_CLKREQ#7,8

5

2

.1U_0402_10V6-K

6 1

QV5A
AO5804EL_SC89-6

OPT@

1 2

2

0_0402_5%@

+3VG_AON

RV44
10K_0402_5%

OPT@

1 2

CLK_REQ_GPU#

RV46
10K_0402_5%

@

OPT@

3

QV5B

5

AO5804EL_SC89-6

4

RV48

1 2

4

PCIE_CTX_C_GRX_P0
PCIE_CTX_C_GRX_N0
PCIE_CTX_C_GRX_P1
PCIE_CTX_C_GRX_N1
PCIE_CTX_C_GRX_P2
PCIE_CTX_C_GRX_N2
PCIE_CTX_C_GRX_P3
PCIE_CTX_C_GRX_N3

PCIE_CRX_GTX_P0
PCIE_CRX_GTX_N0
PCIE_CRX_GTX_P1 PCIE_CRX_C_GTX_P1

PCIE_CRX_GTX_P2
PCIE_CRX_GTX_N2

PCIE_CRX_GTX_N3 PCIE_CRX_C_GTX_N3

1 2

CV10 .1U_0402_10V6-KOPT@

1 2

CV13 .1U_0402_10V6-KOPT@

1 2

CV8 .1U_0402_10V6-KOPT@

1 2

CV9 .1U_0402_10V6-KOPT@

1 2

CV6 .1U_0402_10V6-KOPT@

1 2

CV7 .1U_0402_10V6-KOPT@

1 2

CV4 .1U_0402_10V6-KOPT@

1 2

CV5 .1U_0402_10V6-KOPT@

CLK_PCIE_GPU8

CLK_PCIE_GPU#8

1 2

FB_GC6_EN_R FB_GC6_EN

Connect to CPU GPIO

4

RV32

200_0402_1%@

1 2

PCIE_CRX_C_GTX_P0
PCIE_CRX_C_GTX_N0

PCIE_CRX_C_GTX_N1PCIE_CRX_GTX_N1
PCIE_CRX_C_GTX_P2
PCIE_CRX_C_GTX_N2
PCIE_CRX_C_GTX_P3PCIE_CRX_GTX_P3

CLK_PCIE_GPU
CLK_PCIE_GPU#

PEX_TSTCLK_OUT
PEX_TSTCLK_OUT#

PLT_RST_VGA#

RV35

2.49K_0402_1%OPT@

1

CV24

@

2

.1U_0402_10V6-K

1 3

QV6
2N7002KW_SOT323-3

@

1 2

CLK_REQ_GPU#

PEX_TERMP

+3VG_AON

RV41
10K_0402_5%

@

1 2

2

G

D

S

RV49

0_0402_5%GC6@

UV1A

AG6

PEX_RX0

AG7

PEX_RX0_N

AF7

PEX_RX1

AE7

PEX_RX1_N

AE9

PEX_RX2

AF9

PEX_RX2_N

AG9

PEX_RX3

AG10

PEX_RX3_N

AF10

NC81

AE10

NC82

AE12

NC83

AF12

NC84

AG12

NC85

AG13

NC86

AF13

NC87

AE13

NC88

AE15

NC1

AF15

NC2

AG15

NC3

AG16

NC4

AF16

NC5

AE16

NC6

AE18

NC7

AF18

NC8

AG18

NC9

AG19

NC10

AF19

NC11

AE19

NC12

AE21

NC13

AF21

NC14

AG21

NC15

AG22

NC16

AC9

PEX_TX0

AB9

PEX_TX0_N

AB10

PEX_TX1

AC10

PEX_TX1_N

AD11

PEX_TX2

AC11

PEX_TX2_N

AC12

PEX_TX3

AB12

PEX_TX3_N

AB13

NC89

AC13

NC90

AD14

NC91

AC14

NC92

AC15

NC93

AB15

NC94

AB16

NC95

AC16

NC96

AD17

NC17

AC17

NC18

AC18

NC19

AB18

NC20

AB19

NC21

AC19

NC22

AD20

NC23

AC20

NC24

AC21

NC25

AB21

NC26

AD23

NC27

AE23

NC28

AF24

NC29

AE24

NC30

AG24

NC31

AG25

NC32

AE8

PEX_REFCLK

AD8

PEX_REFCLK_N

AC6

PEX_CLKREQ_N

AF22

PEX_TSTCLK

AE22

PEX_TSTCLK_N

AC7

PEX_RST_N

AF25

PEX_TERMP

N15S-GT-S-A2_FCBGA595

N15SGT@

+3VG_AON

RV45
10K_0402_5%

@

1 2

RV47
10K_0402_5%

GC6@

1 2

3

Part 1 of 6

PCI EXPRESS

3

DACsI2C GPIO

CORE_PLLVDD

CLK

XTAL_OUTBUFF

GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8

GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
GPIO15
GPIO16
GPIO17
GPIO18
GPIO19
GPIO20
GPIO21

OVERT

NC100

NC101

NC102

NC103

NC104

I2CA_SCL
I2CA_SDA

I2CB_SCL
I2CB_SDA

I2CC_SCL
I2CC_SDA

I2CS_SCL
I2CS_SDA

SP_PLLVDD

VID_PLLVDD

XTAL_IN

XTAL_OUT

XTAL_SSIN

2

2

1 2

RV17

1 2

RV19

1 2

RV22

1 2

RV25

1 2

RV28

1 2

RV30

1 2

RV33

1

CV15

2

OPT@

0.1U_0402_10V7K

Under GPU

CV21

OPT@

20140213

20140213

20140213

G

0.1U_0402_10V7K

+3VGS

12

RV4
10K_0402_5%

@

5

G

61

D

QV2A

S

2N7002KDWH_SOT363-6

@

2

G

1

CV3

@

2

.1U_0402_10V6-K

+3VG_AON

2.2K_0402_5%OPT@

2.2K_0402_5%OPT@

2.2K_0402_5%OPT@

2.2K_0402_5%OPT@

2.2K_0402_5%OPT@

2.2K_0402_5%OPT@

10K_0402_5%@

RV13
10K_0402_5%

GC6@

1 2

1 2

S

@

0_0402_5%

+3VG_AON

+3VG_AON

G

RV15

180ohms (ESR=0.2) Bead

1

2

OPT@

1

2

CV16

1

1

CV18

CV17

2

2

OPT@

OPT@

22U_0805_6.3V6M

4.7U_0402_6.3V6M

30ohms (ESR=0.05) Bead

Near GPU

1

CV22
22U_0603_6.3V6-M

2

OPT@

Title

Title

Title

N15X_PCIE/ DAC/ GPIO

N15X_PCIE/ DAC/ GPIO

N15X_PCIE/ DAC/ GPIO

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

C6
B2
D6
C7
F9
A3
A4

GPU_EVENT#_R

B6
E9
F8

VGA_ALERT#

C5
E7

NVVDD_PWM_VID

D7

VGA_AC_DET_R

B4

PSI_VGA_R

B3
C3
D5
D4
C2
F7
E6
C4

A6

OVERT#

AB6

NC33

AG3

NC97

AF4

NC98

AF3

NC99

AE3
AE4

W5
AE2
AF2

B7

VGA_CRT_CLK

A7

VGA_CRT_DATA

C9

I2CB_SCL

C8

I2CB_SDA

A9

I2CC_SCL

B9

I2CC_SDA

D9

VGA_SMB_CK2

D8

VGA_SMB_DA2

60mA

L6
M6

45mA

N6

45mA

C11
B10

A10

XTALSSIN

C10

XTALOUT

FB_GC6_EN

3VGS_PWR_EN

SYS_PEX_RST_MON#

NVVDD_PWM_VID 42

GPU_PEX_RST_HOLD#

PLT_RST_VGA#

OVERT#

0.01U_0402_25V7K

I2C,if not use, can be soft grounded
and delete pull up resistor ---colin

FB_GC6_EN 20

3VGS_PWR_EN 18,42

A6 Symbol update to OVER

DV1

@

RB751V-40_SOD323-2

RV6

1 2

CV221

@

0_0402_5%N15SGT@

RV174

1 2

@

1

2

PSI_VGA

1K_0402_5%

2

G

S

QV23
2N7002KW_SOT323-3

@

12

13

D

Internal Thermal Sensor

+PLLVDD

XTAL_IN
XTAL_OUT

1 2

1 2
1 2

RV24

0_0402_5%@

RV34 10K_0402_5%OPT@
RV36 10K_0402_5%OPT@

+SP_PLLVDD

1

CV218

@

2

.1U_0402_10V6-K

VGA_AC_DET 29

PSI_VGA 42

PLT_RST_VGA#

WRST# 29

OVERT#

1 2

RV8 0_0402_5%

@

GPU_EVENT#_R

VGA_CRT_DATA

VGA_CRT_CLK

I2CB_SCL

I2CB_SDA

I2CC_SCL

I2CC_SDA

XTALOUT

Under GPU(below 150mils)

+SP_PLLVDD

150mA

1 2

RV38

10M_0402_5%OPT@

YV1

XTAL_IN

1

CV19
12P_0402_50V8-J

2

OPT@

1

27MHZ_10PF_7V27000050

OPT@

4

OSC1

GND2

3

Issued Date

Issued Date

Issued Date

XTAL_OUT

1

CV20
12P_0402_50V8-J

2

OPT@

2013/08/08

2013/08/08

2013/08/08

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

GND12OSC2

Security Classification

Security Classification

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

+PLLVDD

0.1U_0402_10V7K

1

1 2

RV175 0_0402_5%

@

1

CV1

34

D

S

13

D

S

2

13

D

QV4
2N7002KW_SOT323-3

GC6@

VGA_ALERT#

VGA_AC_DET_R

PSI_VGA

GPU_PEX_RST_HOLD#

@

2

QV2B
2N7002KDWH_SOT363-6

@

QV3
2N7002KW_SOT323-3

@

1

CV12

GC6@

2

.1U_0402_10V6-K

GPU_EVENT#

Connect to CPU GPIO

3VGS_PWR_EN

OVERT#

1 2

OVERT#

RV27

1 2

LV1

PBY100505T-181Y-N_2P

OPT@

4.7uFX1 ,0.1uFX2 , 22uFX1

1 2

LV2

PBY100505T-300Y-N_2P

OPT@

0.1uFX1 , 22uFX1

Monday, November 17, 2014

Monday, November 17, 2014

Monday, November 17, 2014

1

.1U_0402_10V6-K

1

CV2

@

2

RV18

1 2

RV20

1 2

RV23

1 2

RV26

1 2

RV29

1 2

RV31

100K_0402_5%@

Haydn

Haydn

Haydn

H_THRMTRIP# 9

.1U_0402_10V6-K

12

10K_0402_5%OPT@

10K_0402_5%OPT@

10K_0402_5%OPT@

100K_0402_5%OPT@

10K_0402_5%OPT@

10K_0402_5%OPT@

+1.05VGS

+1.05VGS

16 45

16 45

16 45

+3VG_AON

1.0

1.0

1.0

5

4

3

2

1

D D

C C

B B

UV1C

AC3

NC105

AC4

NC106

Y4

NC107

Y3

NC108

AA3

NC109

AA2

NC110

AB1

NC111

AA1

NC112

AA4

NC113

AA5

NC114

AB5

NC115

AB4

NC116

AB3

NC117

AB2

NC118

AD3

NC119

AD2

NC120

AE1

NC121

AD1

NC122

AD4

NC123

AD5

NC124

T2

NC125

T3

NC126

T1

NC127

R1

NC128

R2

NC129

R3

NC130

N2

NC131

N3

NC132

V3

NC133

V4

NC134

U3

NC135

U4

NC136

T4

NC137

T5

NC138

R4

NC139

R5

NC140

N1

NC34

M1

NC35

M2

NC36

M3

NC37

K2

NC38

K3

NC39

K1

NC40

J1

NC41

M4

NC42

M5

NC43

L3

NC44

L4

NC45

K4

NC46

K5

NC47

J4

NC48

J5

NC49

N4

NC141

N5

NC142

P3

NC143

P4

NC144

J2

NC145

J3

NC146

H3

NC147

H4

NC148

N15S-GT-S-A2_FCBGA595

N15SGT@

Part 3 of 6

LVDS/TMDS

MULTI_STRAP_REF0_GND

MULTI_STRAP_REF1_GNDMLS_REF1

MULTI_STRAP_REF2_GND

NC50
NC51
NC52

FERMI_RSVD1
FERMI_RSVD2

NC56
NC57
NC58

NC

NC59
NC60
NC61
NC62
NC63
NC64
NC65
NC66
NC67
NC68

BUFRST_N

PGOOD

NC71

NC72

STRAP0
STRAP1

GENERAL

STRAP2
STRAP3
STRAP4

NC73

THERMDP

THERMDN

VDD_SENSE

GND_SENSE

TEST

TESTMODE

JTAG_TCK

JTAG_TDI
JTAG_TDO
JTAG_TMS

JTAG_TRST_N

SERIAL

ROM_CS_N

ROM_SI

ROM_SO

ROM_SCLK

F11
AD10
AD7

B19 Symbol update to FBA_CMD32

V5
V6
G1
G2
G3
G4
G5
G6
G7
V1
V2
W1
W2
W3
W4

D11

D10

E10

F10

D1
D2
E4
E3
D3
C1

F6
F4
F5

F12

E12

F2

F1

AD9
AE5
AE6
AF6
AD6
AG4

D12
B12
A12
C12

12

RV50

10K_0402_5%@

STRAP0
STRAP1
STRAP2
STRAP3
STRAP4

MULTI_STRAP_REF0_GND

VCCSENSE_VGA

trace width: 16mils
differential voltage sensing.
differential signal routing.

VSSSENSE_VGA

TESTMODE

@
@
@
@

@

ROM_SI
ROM_SO
ROM_SCLK

1
1
1
1

1

STRAP0 23
STRAP1 23
STRAP2 23
STRAP3 23
STRAP4 23

VCCSENSE_VGA 42

VSSSENSE_VGA 42

1 2

OPT@

TV1
TV2
TV3
TV4

1 2

TV5

ROM_SI 23
ROM_SO 23
ROM_SCLK 23

RV52

10K_0402_5%

RV53

10K_0402_5%OPT@

Symbol update to GPIO8

+3VG_AON

12

RV21
10K_0402_5%

@

RV51

40.2K_0402_1%

N15SGT@

1 2

A A

Title

Title

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2013/08/08

2013/08/08

2013/08/08

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

20140213

20140213

20140213

Title

N15X_LVDS/ HDMI/ THERM

N15X_LVDS/ HDMI/ THERM

N15X_LVDS/ HDMI/ THERM

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

Monday, November 17, 2014

Monday, November 17, 2014

Monday, November 17, 2014

Date: Sheet of

Date: Sheet of

Date: Sheet of

Haydn

Haydn

Haydn

1

17 45

17 45

17 45

1.0

1.0

1.0

5

4

3

2

1

+1.35VGS

D D

Near GPU

2

1

CV26

CV25

1

2

10U_0603_6.3V6M

22U_0805_6.3V6M

OPT@

CD@

for GPU +1.05V

0.1U_0402_16V4Z @

RV60

1 2

47K_0402_5%

OPT@

0_0402_5%

1 2

0_0402_5%

1 2

OPT@

@

B+

EN_VGA#

QV8B

5

G

OPT@

1 2

100K_0402_5%

OPT@

34

D

S

2

2N7002KDWH_SOT363-6

+5VALW

C C

EN_VGA19,40,42

DGPU_PWROK

RV226

RV227

4.7uFX2 ,1uFX2 ,0.1uFX2 ,22uFX1 ,10uFX1 4.7uFX1 ,1uFX1 , 22uFX1 ,10uFX1

Under GPU(below 150mils)

1

G

RV58

QV8A

OPT@

1

CV27

2

OPT@

4.7U_0603_6.3V6K

AON6414AL_DFN8-5

5

1

CV220

QV7

2

61

D

2N7002KDWH_SOT363-6

S

1

2

OPT@

1U_0603_25V6M

1
2
3

EN_VGA#

1

CV29

CV30

2

CD@

1U_0603_25V6M

2

CV28

2

OPT@

4.7U_0603_6.3V6K

Symbol update to FBVDDQ_AON
H24/H26/J21/K21

4

OPT@

1

CV54

0.01U_0402_25V7K

2

OPT@

1

1

CV32

CV31

2

2

0.1U_0402_10V7K

0.1U_0402_10V7K

OPT@

OPT@

+1.05VGS+1.05VS

12

RV59
470_0603_5%

@

6

@

AO5804EL_SC89-6
QV10A

1

3.5A

UV1D

B26

FBVDDQ_01

C25

FBVDDQ_02

E23

FBVDDQ_03

E26

FBVDDQ_04

F14

FBVDDQ_05

F21

FBVDDQ_06

G13

FBVDDQ_07

G14

FBVDDQ_08

G15

FBVDDQ_09

G16

FBVDDQ_10

G18

FBVDDQ_11

G19

FBVDDQ_12

G20

FBVDDQ_13

G21

FBVDDQ_14

L22

FBVDDQ_19

L24

FBVDDQ_20

L26

FBVDDQ_21

M21

FBVDDQ_22

N21

FBVDDQ_23

R21

FBVDDQ_24

T21

FBVDDQ_25

V21

FBVDDQ_26

W21

FBVDDQ_27

H24

FBVDDQ_AON_1

H26

FBVDDQ_AON_2

J21

FBVDDQ_AON_3

K21

FBVDDQ_AON_4

V7

NC149

W7

NC150

AA6

NC151

W6

NC152

Y6

NC153

M7

NC154

N7

NC155

T6

NC156

P6

NC157

T7

NC158

R7

NC159

U6

NC160

R6

NC161

J7

NC76

K7

NC77

K6

NC78

H6

NC79

J6

NC80

N15S-GT-S-A2_FCBGA595

N15SGT@

Part 4 of 6

PEX_IOVDDQ_1
PEX_IOVDDQ_2
PEX_IOVDDQ_3
PEX_IOVDDQ_4
PEX_IOVDDQ_5
PEX_IOVDDQ_6
PEX_IOVDDQ_7
PEX_IOVDDQ_8

PEX_IOVDDQ_9
PEX_IOVDDQ_10
PEX_IOVDDQ_11
PEX_IOVDDQ_12
PEX_IOVDDQ_13
PEX_IOVDDQ_14

PEX_IOVDD_1
PEX_IOVDD_2
PEX_IOVDD_3
PEX_IOVDD_4
PEX_IOVDD_5
PEX_IOVDD_6

3V3_AON_1
3V3_AON_2

3V3_MAIN_1
3V3_MAIN_2

POWER

FB_CAL_VDDQ

FB_CAL_GND

FB_CAL_TERM

PEX_PLL_HVDD_1
PEX_PLL_HVDD_2

PEX_SVDD_3V3

PEX_PLLVDD_1
PEX_PLLVDD_2

2000mA

AA10
AA12
AA13
AA16
AA18
AA19
AA20
AA21
AB22
AC23
AD24
AE25
AF26
AF27

AA22
AB23
AC24
AD25
AE26
AE27

Symbol update to 3V3_AON

G10
G12

G8
G9

D22

FB_CAL_VDDQ

C24

FB_CAL_GND

B25

FB_CAL_TERM

AA8
AA9

AB8

120mA

AA14
AA15

1

CV33

2

OPT@

1U_0402_6.3V6K

Under GPU(below 150mils)

1

CV43

2

OPT@

22U_0805_6.3V6M

4.7uFX1 ,1uFX1 , 0.1uFX1

+3VG_AON

+VDD33

1 2

RV55

40.2_0402_1%OPT@

1 2

RV56

42.2_0402_1%OPT@

1 2

RV57

51.1_0402_1%OPT@

Place near balls

Under GPU(below 150mils)

+PEX_PLLVDD

Place near balls(Under GPU) Place near GPU

1

2

OPT@

.1U_0402_10V6-K

+3.3VS TO +3VG_AON

+3VS

+3VG_AON

+1.35VGS

CV55

1

2

OPT@

4.7U_0603_6.3V6K

Near GPU

1

CV37

2

OPT@

4.7U_0603_6.3V6K

+1.05VGS

1

2

OPT@

.1U_0402_10V6-K

1

2
OPT@

.1U_0402_10V6-K

1

CV56

2
OPT@

4.7U_0603_6.3V6K

2

CV39

1

OPT@

10U_0603_6.3V6M

+3VG_AON

NearUnder

1

CV47

CV50

CV57

1

CV48

2

2

OPT@

OPT@

1U_0402_6.3V6K

4.7U_0603_6.3V6K

1

1

CV52

CV51

2

2

OPT@

OPT@

1U_0402_6.3V6K

.1U_0402_10V6-K

+3VG_AON

4.7uFX2 ,0.1uFX1

1

CV58

2

OPT@

1U_0603_25V6M

.1U_0402_10V6-K

Place near balls

CV49

1 2

RV54 0_0402_5%

1

CV53

2

OPT@

4.7U_0603_6.3V6K

CALIBRATION PIN

FB_CAL_x_PD_VDDQ

FB_CAL_x_PU_GND

FB_CAL_xTERM_GND

120ohm (ESR=0.18) Bead

1

1

CV60

CV59

2

2

OPT@

OPT@

4.7U_0603_6.3V6K

4.7uFX1 ,1uFX1 , 0.1uFX1

+1.05VGS

For RF

1

CV215

RF_OPTNS@

2

33P_0402_50V8J

PEX_IOVVDD/Q Decouling

MLCC

1.0uF

4.7uF

10uF

N15S-GT

1

1

1

22uF 1

+3VGS

@

4.7uFX1 ,1uFX1 , 0.1uFX2

40.2Ohm

42.2Ohm

51.1Ohm

+1.05VGS

12

LV3

@

HCB1608KF-121T30_0603

@

1 2

RV62
0_0603_5%

DDR3

+5VALW

B B

PXS_PWREN#

PXS_PWREN4

RV66

100K_0402_5%

12

+3.3VS TO +3VGS

A A

DGPU_PWR_EN#

3VGS_PWR_EN16,42

5

RV74

100K_0402_5%

12

47K_0402_5%

OPT@

47K_0402_5%

N15SGT@

QV12A

2

G

OPT@

QV19A

2

G

GC6@

12

RV63

OPT@

61

D

S

+5VALW

12

RV71

GC6@

RV73 4.7K_0402_5%

61

D

S

.1U_0402_10V6-K

1 2

RV65

10K_0402_5%

OPT@

2N7002KDWH_SOT363-6

.1U_0402_10V6-K

1 2

GC6@

2N7002KDWH_SOT363-6

CV61

CV72

@

+3VG_AON

@

1

2

1

2

1

2

1

2

S

QV11

G

LP2301ALT1G_SOT23-3

OPT@

CV64
.1U_0402_10V6-K

1 2

RV171

0_0603_5% @

S

QV16

G

LP2301ALT1G_SOT23-3

CV75
.1U_0402_10V6-K

GC6@

2

2

4

D

13

OPT@

D

13

GC6@

1

CV62

0.01U_0402_25V7K

@

2

PXS_PWREN#

+3VGS

1

CV73

0.01U_0402_25V7K

GC6@

2

DGPU_PWR_EN#

QV12B

5

G

OPT@

QV19B

5

G

GC6@

12

RV64
470_0603_5%

@

34

D

2N7002KDWH_SOT363-6

S

12

RV72
470_0603_5%

@

34

D

2N7002KDWH_SOT363-6

S

1

CV63
10U_0603_6.3V6M

OPT@

2

1

CV74
10U_0603_6.3V6M

GC6@

2

+1.35V TO +1.35VGS

CV66

CV65

1

1

2

2

OPT@

OPT@

10U_0603_6.3V6M

10U_0603_6.3V6M

1 2

RV68

OPT@

100K_0402_5%

QV17A

34

QV17B

D

G

2N7002KDWH_SOT363-6

S

OPT@

Deciphered Date

Deciphered Date

Deciphered Date

2

2

G

OPT@

FBVDDQ_PWR_EN#

5

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

RV69

1 2

47K_0402_5%

OPT@

CV506

OPT@

B+

12

+5VALW

0_0402_5%

1 2

FBVDDQ_PWR_EN20

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

RV228

0.22U_0402_10V6K

OPT@

2013/08/08

2013/08/08

2013/08/08

+1.35V +1.35VGS

5

61

D

2N7002KDWH_SOT363-6

S

20140213

20140213

20140213

AON6414AL_DFN8-5

QV14

1
2
3

OPT@

4

1

CV71

0.01U_0402_25V7K

2

OPT@

Title

Title

Title

N15X_Power

N15X_Power

N15X_Power

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

CV68

CV67

1

1

+

2

2

@

OPT@

10U_0603_6.3V6M

220U_B2_2.5VM_R15M

FBVDDQ_PWR_EN#

Monday, November 17, 2014

Monday, November 17, 2014

Monday, November 17, 2014

CV69

1

2

@

10U_0603_6.3V6M

AO5804EL_SC89-6

Haydn

Haydn

Haydn

1

CV70

1

2

.1U_0402_16V7K

OPT@

QV10B

5

18 45

18 45

18 45

12

RV67
470_0603_5%

@

3

@

4

1.0

1.0

1.0

5

D D

4

3

2

1

UV1E

A2

A26
AB11
AB14
AB17
AB20
AB24

AC2
AC22
AC26

AC5

AC8
AD12
AD13
AD15
AD16
AD18
AD19
AD21
AD22
AE11
AE14
AE17
AE20

AF1
AF11
AF14
AF17

C C

B B

AF20
AF23

AG26

AF5

AF8

AG2

B1
B11
B14
B17
B20
B23
B27

B5

B8
E11
E14
E17

E2
E20
E22
E25

E5

E8

H2
H23
H25

H5

Part 5 of 6

GND_001
GND_002
GND_003
GND_004
GND_005
GND_006
GND_007
GND_008
GND_009
GND_010
GND_011
GND_012
GND_013
GND_014
GND_015
GND_016
GND_017
GND_018
GND_019
GND_020
GND_021
GND_022
GND_023
GND_024
GND_025
GND_026
GND_027
GND_028
GND_029
GND_030
GND_031
GND_032
GND_033
GND_034
GND_035
GND_036
GND_037
GND_038
GND_039
GND_040
GND_041
GND_042
GND_043
GND_044
GND_045
GND_046
GND_047
GND_048
GND_049
GND_050
GND_051
GND_052
GND_053
GND_054
GND_055
GND_056

N15S-GT-S-A2_FCBGA595

N15SGT@

GND_057
GND_058
GND_059
GND_060
GND_061
GND_062
GND_063
GND_064
GND_065
GND_066
GND_067
GND_068
GND_069
GND_070
GND_071
GND_072
GND_073
GND_074
GND_075
GND_076
GND_077
GND_078
GND_079
GND_080
GND_081
GND_082
GND_083
GND_084
GND_085
GND_086
GND_087
GND_088
GND_089
GND_090
GND_091
GND_092
GND_093
GND_094
GND_095
GND_096
GND_097
GND_098
GND_099
GND_100
GND_101
GND_102
GND_103
GND_104
GND_105
GND_106
GND_107
GND_108
GND_109
GND_110
GND_111
GND_112

GND_113
GND_114

K11
K13
K15
K17
L10
L12
L14
L16
L18
L2
L23
L25
L5
M11
M13
M15
M17
N10
N12
N14
N16
N18
P11
P13
P15
P17
P2
P23
P26
P5
R10
R12
R14
R16
R18
T11
T13
T15
T17
U10
U12
U14
U16
U18
U2
U23
U26
U5
V11
V13
V15
V17
Y2
Y23
Y26
Y5

AA7
AB7

+VGA_CORE

CV103

22U_0603_6.3V6-M

OPT@

Under GPU

1

CV76

2

4.7U_0603_6.3V6K

OPT@

1

CV89

2

OPT@

1U_0402_6.3V6K

1

CV93

2

4.7U_0603_6.3V6K

OPT@

1

2

Near GPU

4.7uFX15 ,1uFX4 ,47uFX1 ,22uFX1 ,330uFX1

1

2

4.7U_0603_6.3V6K

CD@

1

2
OPT@

1U_0402_6.3V6K

1

2

4.7U_0603_6.3V6K

OPT@

1

CV104
22U_0603_6.3V6-M

2

CV77

CV90

CV94

OPT@

1

CV78

2

4.7U_0603_6.3V6K

OPT@

1

CV91

2

OPT@

1U_0402_6.3V6K

1

CV95

2

4.7U_0603_6.3V6K

OPT@

4.7U_0603_6.3V6K

1U_0402_6.3V6K

4.7U_0603_6.3V6K

1

2

OPT@

1

2

OPT@

1

2

CD@

CV79

CV92

CV96

1

2

1

CV80

2

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

OPT@

For RF

1

CV213

2
RF_OPTNS@

33P_0402_50V8J

1

CV97

2

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

CD@

CV105
22U_0603_6.3V6-M

CD@

1

2

OPT@

1

2

@

1

1

CV82

CV81

4.7U_0603_6.3V6K

CV98

4.7U_0603_6.3V6K

33P_0402_50V8J

2

OPT@

1

CV99

2

@

1

CV214

RF_OPTNS@

2

2

4.7U_0603_6.3V6K

OPT@

1

2

4.7U_0603_6.3V6K

@

For RF

CV83

CV100

1

1

CV85

CV84

2

2

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

OPT@

OPT@

1

1

CV102

CV101

2

2

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

@

@

1

1

CV86

2

4.7U_0603_6.3V6K

@

1

CV87

CV88

2

2

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

@

@

UV1F

K10

VDD_001

K12

VDD_002

K14

VDD_003

K16

VDD_004

K18

VDD_005

L11

VDD_006

L13

VDD_007

L15

VDD_008

L17

VDD_009

M10

VDD_010

M12

VDD_011

M14

VDD_012

M16

VDD_013

M18

VDD_014

N11

VDD_015

N13

VDD_016

N15

VDD_017

N17

VDD_018

P10

VDD_019

P12

VDD_020

N15S-GT-S-A2_FCBGA595

N15SGT@

Part 6 of 6

POWER

VDD_041
VDD_040
VDD_039
VDD_038
VDD_037
VDD_036
VDD_035
VDD_034
VDD_033
VDD_032
VDD_031
VDD_030
VDD_029
VDD_028
VDD_027
VDD_026
VDD_025
VDD_024
VDD_023
VDD_022
VDD_021

+VGA_CORE+VGA_CORE

V18
V16
V14
V12
V10
U17
U15
U13
U11
T18
T16
T14
T12
T10
R17
R15
R13
R11
P18
P16
P14

QV21A

2

G

@

+VGA_CORE

12

RV173
470_0603_5%

@

61

D

2N7002KDWH_SOT363-6

S

4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2013/08/08

2013/08/08

2013/08/08

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

20140213

20140213

20140213

Title

Title

Title

N15X_+VGA CORE, GND

N15X_+VGA CORE, GND

N15X_+VGA CORE, GND

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

Monday, November 17, 2014

Monday, November 17, 2014

Monday, November 17, 2014

Date: Sheet of

Date: Sheet of

Date: Sheet of

Haydn

Haydn

Haydn

1

19 45

19 45

19 45

1.0

1.0

1.0

+5VALW

RV172
47K_0402_5%

@

1 2

34

QV21B

D

EN_VGA18,40,42

A A

5

5

G

@

2N7002KDWH_SOT363-6

S

5

4

3

2

1

22U_0603_6.3V6-M

OPT@

+FB_PLLAVDD

LV4

200mA

Place close to ballPlace close to BGA

0.1U_0402_10V7K

OPT@

FBA_D[0..63]

+FB_PLLAVDD+1.05VGS

1

CV112

2

UV1B

E18

FBA_D0

F18

FBA_D1

E16

FBA_D2

F17

FBA_D3

D20

FBA_D4

D21

FBA_D5

F20

FBA_D6

E21

FBA_D7

E15

FBA_D8

D15

FBA_D9

F15

FBA_D10

F13

FBA_D11

C13

FBA_D12

B13

FBA_D13

E13

FBA_D14

D13

FBA_D15

B15

FBA_D16

C16

FBA_D17

A13

FBA_D18

A15

FBA_D19

B18

FBA_D20

A18

FBA_D21

A19

FBA_D22

C19

FBA_D23

B24

FBA_D24

C23

FBA_D25

A25

FBA_D26

A24

FBA_D27

A21

FBA_D28

B21

FBA_D29

C20

FBA_D30

C21

FBA_D31

R22

FBA_D32

R24

FBA_D33

T22

FBA_D34

R23

FBA_D35

N25

FBA_D36

N26

FBA_D37

N23

FBA_D38

N24

FBA_D39

V23

FBA_D40

V22

FBA_D41

T23

FBA_D42

U22

FBA_D43

Y24

FBA_D44

AA24

FBA_D45

Y22

FBA_D46

AA23

FBA_D47

AD27

FBA_D48

AB25

FBA_D49

AD26

FBA_D50

AC25

FBA_D51

AA27

FBA_D52

AA26

FBA_D53

W26

FBA_D54

Y25

FBA_D55

R26

FBA_D56

T25

1

CV113

2

0.1U_0402_10V7K

OPT@

Place close to ball

1 2

OPT@

1 2

RV119 0_0402_5%@

1 2

RV120 10K_0402_5%OPT@

FBA_D57
FBA_D58
FBA_D59
FBA_D60
FBA_D61
FBA_D62
FBA_D63

CV115

0.1U_0402_10V7K

N27
R27

V26

V27
W27
W25

F16

P22

D23

H22

F3

FB_CLAMPFB_GC6_EN

Part 2 of 6

FBA_D00
FBA_D01
FBA_D02
FBA_D03
FBA_D04
FBA_D05
FBA_D06
FBA_D07
FBA_D08
FBA_D09
FBA_D10
FBA_D11
FBA_D12
FBA_D13
FBA_D14
FBA_D15
FBA_D16
FBA_D17
FBA_D18
FBA_D19
FBA_D20
FBA_D21
FBA_D22
FBA_D23
FBA_D24
FBA_D25
FBA_D26
FBA_D27
FBA_D28
FBA_D29
FBA_D30
FBA_D31
FBA_D32
FBA_D33
FBA_D34
FBA_D35
FBA_D36
FBA_D37
FBA_D38
FBA_D39
FBA_D40
FBA_D41
FBA_D42
FBA_D43
FBA_D44
FBA_D45
FBA_D46
FBA_D47
FBA_D48
FBA_D49
FBA_D50
FBA_D51
FBA_D52
FBA_D53
FBA_D54
FBA_D55
FBA_D56
FBA_D57
FBA_D58
FBA_D59
FBA_D60
FBA_D61
FBA_D62
FBA_D63

FB_PLLAVDD_1
FB_PLLAVDD_2

FB_VREF

FB_DLLAVDD

FB_CLAMP

N15S-GT-S-A2_FCBGA595

N15SGT@

MEMORY

INTERFACE A

FBA_DQS_RN0
FBA_DQS_RN1
FBA_DQS_RN2
FBA_DQS_RN3
FBA_DQS_RN4
FBA_DQS_RN5
FBA_DQS_RN6
FBA_DQS_RN7

FBA_DQS_WP0
FBA_DQS_WP1
FBA_DQS_WP2
FBA_DQS_WP3
FBA_DQS_WP4
FBA_DQS_WP5
FBA_DQS_WP6
FBA_DQS_WP7

FBA_CLK0_N

FBA_CLK1_N

FBA_WCK01_N

FBA_WCK23_N

FBA_WCK45_N

FBA_WCK67_N

FBA_CMD00
FBA_CMD01
FBA_CMD02
FBA_CMD03
FBA_CMD04
FBA_CMD05
FBA_CMD06
FBA_CMD07
FBA_CMD08
FBA_CMD09
FBA_CMD10
FBA_CMD11
FBA_CMD12
FBA_CMD13
FBA_CMD14
FBA_CMD15
FBA_CMD16
FBA_CMD17
FBA_CMD18
FBA_CMD19
FBA_CMD20
FBA_CMD21
FBA_CMD22
FBA_CMD23
FBA_CMD24
FBA_CMD25
FBA_CMD26
FBA_CMD27
FBA_CMD28
FBA_CMD29
FBA_CMD30
FBA_CMD31
FBA_CMD32

FBA_CMD34
FBA_CMD35

FBA_DQM0
FBA_DQM1
FBA_DQM2
FBA_DQM3
FBA_DQM4
FBA_DQM5
FBA_DQM6
FBA_DQM7

FBA_CLK0

FBA_CLK1

FBA_WCK01

FBA_WCK23

FBA_WCK45

FBA_WCK67

C27

FBA_CS0#

C26
E24

FBA_ODT0

F24

FBA_CKE0

D27

FBA_A14

D26

FBA_RST#

F25

FBA_A9

F26

FBA_A7

F23

FBA_A2

G22

FBA_A0

G23

FBA_A4

G24

FBA_A1

F27

FBA_BA0

G25

FBA_WE

G27
G26

FBA_CAS#

M24

FBA_CS1#

M23
K24

FBA_ODT1

K23

FBA_CKE1

M27

FBA_A13

M26

FBA_A8

M25

FBA_A6

K26

FBA_A11

K22

FBA_A5

J23

FBA_A3

J25

FBA_BA2

J24

FBA_BA1

K27

FBA_A12

K25

FBA_A10

J27

FBA_RAS#

J26
B19

Symbol update to FBA_CMD34/35

F22

RV121 60.4_0402_1%@

J22

RV122 60.4_0402_1%

D19

FBA_DQM0

D14

FBA_DQM1

C17

FBA_DQM2

C22

FBA_DQM3

P24

FBA_DQM4

W24

FBA_DQM5

AA25

FBA_DQM6

U25

FBA_DQM7

F19

FBA_DQS#0

C14

FBA_DQS#1

A16

FBA_DQS#2

A22

FBA_DQS#3

P25

FBA_DQS#4

W22

FBA_DQS#5

AB27

FBA_DQS#6

T27

FBA_DQS#7

E19

FBA_DQS0

C15

FBA_DQS1

B16

FBA_DQS2

B22

FBA_DQS3

R25

FBA_DQS4

W23

FBA_DQS5

AB26

FBA_DQS6

T26

FBA_DQS7

D24

FBA_CLK0

D25

FBA_CLK0#

N22

FBA_CLK1

M22

FBA_CLK1#

D18
C18
D17
D16
T24
U24
V24
V25

@

FBA_CS0# 21

FBA_ODT0 21
FBA_CKE0 21
FBA_A14 21,22
FBA_RST# 21,22
FBA_A9 21,22
FBA_A7 21,22
FBA_A2 21,22
FBA_A0 21,22
FBA_A4 21,22
FBA_A1 21,22
FBA_BA0 21,22
FBA_WE 21,22

FBA_CAS# 21,22
FBA_CS1# 22

FBA_ODT1 22
FBA_CKE1 22
FBA_A13 21,22
FBA_A8 21,22
FBA_A6 21,22
FBA_A11 21,22
FBA_A5 21,22
FBA_A3 21,22
FBA_BA2 21,22
FBA_BA1 21,22
FBA_A12 21,22
FBA_A10 21,22
FBA_RAS# 21,22

12
12

FBA_CLK0 21
FBA_CLK0# 21

FBA_CLK1 22
FBA_CLK1# 22

+1.35VGS

CMD mapping mod Mode D

Address

FBx_CMD0

FBx_CMD1

FBx_CMD2

FBx_CMD3

FBx_CMD4

FBx_CMD5

FBx_CMD6

FBx_CMD7

FBx_CMD8

FBx_CMD9

FBx_CMD10

FBx_CMD11

FBx_CMD12

FBx_CMD13

FBx_CMD14

FBx_CMD15

FBx_CMD16

FBx_CMD17

FBx_CMD18

FBx_CMD19

FBx_CMD20

FBx_CMD21

FBx_CMD22

FBx_CMD23

FBx_CMD24

FBx_CMD25

FBx_CMD26

FBx_CMD27

FBx_CMD28

FBx_CMD29

FBx_CMD30

FBx_CMD31

FBx_CMD32

FBx_CMD33

FBx_CMD34

FBx_CMD35

0..31

CS0#

ODT0

CKE0

A14

RST

A9

A7

A2

A0

A4

A1

BA0

WE

A15

CAS#

A13

A8

A6

A11

A5

A3

BA2

BA1

A12

A10

RAS#

DBG0

DBG1

Rank0

32..63

A14

RST

A9

A7

A2

A0

A4

A1

BA0

WE

A15

CAS#

CS1#

ODT1

CKE1

A13

A8

A6

A11

A5

A3

BA2

BA1

A12

A10

RAS#

FBA_D[0..63]21,22

FBA_DQM[7..0]21,22

FBA_DQS[7..0]21,22

FBA_DQS#[7..0]21,22

D D

C C

30ohms (ESR=0.01) Bead

1 2

HCB1608KF-300T60_2P

OPT@

Place close to BGA

0.1uFX2 ,22uFX1

+FB_PLLAVDD

B B

CV111

1

2

RV123

1 2

FB_GC6_EN16

RV124

+3VGS

A A

DGPU_PWROK18,40,42

5

@

1 2

10K_0402_5%

OPT@

0_0402_5%

DV4 GC6@

2

GC6_ENFB_GC6_EN

3

BAV70W-7-F_SOT323-3

1

12

4

FBVDDQ_PWR_EN 18

RV125
200K_0402_5%

GC6@

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2013/08/08

2013/08/08

2013/08/08

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

20140213

20140213

20140213

Title

Title

Title

N15X_MEM Interface

N15X_MEM Interface

N15X_MEM Interface

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

Monday, November 17, 2014

Monday, November 17, 2014

Monday, November 17, 2014

Date: Sheet of

Date: Sheet of

Date: Sheet of

Haydn

Haydn

Haydn

1

20 45

20 45

20 45

1.0

1.0

1.0

5

at least 16 mils width(optimal)
20 mils spacing to other signals /planes

D D

C C

B B

+1.35VGS

12

12

+1.35VGS

12

12

12

FBA_ODT0

FBA_CKE0

RANKA@

RV128

1.33K_0402_1%

+FBA_VREFCA0

RANKA@

RV127

1.33K_0402_1%

RANKA@

RV167

1.33K_0402_1%

+FBA_VREFDQ0

RANKA@

RV168

1.33K_0402_1%

FBA_CLK0

RV129
162_0402_1%

RANKA@

FBA_CLK0#

1

2

1

2

12

RV133
10K_0402_5%

RANKA@

CV116
.01U_0402_16V7-K

RANKA@

CV216
.01U_0402_16V7-K

RANKA@

12

RV134
10K_0402_5%

RANKA@

FBA_A020,22
FBA_A120,22
FBA_A220,22
FBA_A320,22
FBA_A420,22
FBA_A520,22
FBA_A620,22
FBA_A720,22
FBA_A820,22
FBA_A920,22
FBA_A1020,22
FBA_A1120,22
FBA_A1220,22
FBA_A1320,22
FBA_A1420,22

FBA_BA020,22
FBA_BA120,22
FBA_BA220,22

FBA_CLK020
FBA_CLK0#20
FBA_CKE020

FBA_ODT020

FBA_CS0#20

FBA_RAS#20,22
FBA_CAS#20,22

FBA_WE20,22

FBA_RST#20,22

RV131

10K_0402_5%

RANKA@

12

+FBA_VREFCA0
+FBA_VREFDQ0

FBA_RST#

1 2

RANKA@

FBA_A0
FBA_A1
FBA_A2
FBA_A3
FBA_A4
FBA_A5
FBA_A6
FBA_A7
FBA_A8
FBA_A9
FBA_A10
FBA_A11
FBA_A12
FBA_A13
FBA_A14

FBA_BA0
FBA_BA1
FBA_BA2

FBA_CLK0
FBA_CLK0#
FBA_CKE0

FBA_ODT0
FBA_CS0#
FBA_RAS#
FBA_CAS#
FBA_WE

FBA_DQS3
FBA_DQS0

FBA_DQM3
FBA_DQM0

FBA_DQS#3
FBA_DQS#0

RV130

243_0402_1%

4

UV6

M8
H1

N3

P7
P3

N2

P8

P2
R8
R2

T8
R3

L7
R7
N7

T3

T7

M2
N8
M3

J7

K7

K9

K1

L2

J3

K3

L3

F3
C7

E7
D3

G3

B7

T2

L8

J1

L1

J9

L9
M7

K4W4G1646B-HC11_FBGA96

@

VREFCA
VREFDQ

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14

BA0
BA1
BA2

CK
CK
CKE

ODT
CS
RAS
CAS
WE

DQSL
DQSU

DML
DMU

DQSL
DQSU

RESET

ZQ

NC1
NC2
NC3
NC4
NC5

96-BALL
SDRAM DDR3

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9

VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9

VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8

VSS_9
VSS_10
VSS_11
VSS_12

VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9

3

E3

FBA_D25

F7

FBA_D28

F2

FBA_D27

F8

FBA_D29
FBA_D26
FBA_D30
FBA_D24
FBA_D31

FBA_D1
FBA_D6
FBA_D2
FBA_D5
FBA_D0
FBA_D7
FBA_D3
FBA_D4

+1.35VGS

Group3

Group0

H3
H8
G2
H7

D7
C3
C8
C2
A7
A2
B8
A3

B2
D9
G7
K2
K8
N1
N9
R1
R9

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

RV132

243_0402_1%

RANKA@

+FBA_VREFCA0
+FBA_VREFDQ0

FBA_A0
FBA_A1
FBA_A2
FBA_A3
FBA_A4
FBA_A5
FBA_A6
FBA_A7
FBA_A8
FBA_A9
FBA_A10
FBA_A11
FBA_A12
FBA_A13
FBA_A14

FBA_BA0
FBA_BA1
FBA_BA2

FBA_RST#

12

FBA_CLK0
FBA_CLK0#
FBA_CKE0

FBA_ODT0
FBA_CS0#
FBA_RAS#
FBA_CAS#
FBA_WE

FBA_DQS1
FBA_DQS2

FBA_DQM1
FBA_DQM2

FBA_DQS#1
FBA_DQS#2

UV5

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

A13

T7

A14

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

K1

ODT

L2

CS

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ

J1

NC1

L1

NC2

J9

NC3

L9

NC4

M7

NC5

96-BALL
SDRAM DDR3

K4W4G1646B-HC11_FBGA96

@

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9

VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9

VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8

VSS_9
VSS_10
VSS_11
VSS_12

VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9

2

E3

FBA_D12

F7

FBA_D11

F2

FBA_D15

F8

FBA_D8
FBA_D9
FBA_D14

FBA_D13

FBA_D10

FBA_D17
FBA_D23
FBA_D18
FBA_D20
FBA_D16
FBA_D21
FBA_D22
FBA_D19

+1.35VGS

Group1

Group2

H3
H8
G2
H7

D7
C3
C8
C2
A7
A2
B8
A3

B2
D9
G7
K2
K8
N1
N9
R1
R9

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

CMD mapping mod Mode D

Address

FBx_CMD0

FBx_CMD1

FBx_CMD2

FBx_CMD3

FBx_CMD4

FBx_CMD5

FBx_CMD6

FBx_CMD7

FBx_CMD8

FBx_CMD9

FBx_CMD10

FBx_CMD11

FBx_CMD12

FBx_CMD13

FBx_CMD14

FBx_CMD15

FBx_CMD16

FBx_CMD17

FBx_CMD18

FBx_CMD19

FBx_CMD20

FBx_CMD21

FBx_CMD22

FBx_CMD23

FBx_CMD24

FBx_CMD25

FBx_CMD26

FBx_CMD27

FBx_CMD28

FBx_CMD29

FBx_CMD30

FBx_CMD31

FBx_CMD32

FBx_CMD33

FBx_CMD34

FBx_CMD35

0..31

CS0#

ODT0

CKE0

A14

RST

A9

A7

A2

A0

A4

A1

BA0

WE

A15

CAS#

A13

A8

A6

A11

A5

A3

BA2

BA1

A12

A10

RAS#

DBG0

DBG1

Rank0

1

32..63

A14

RST

A9

A7

A2

A0

A4

A1

BA0

WE

A15

CAS#

CS1#

ODT1

CKE1

A13

A8

A6

A11

A5

A3

BA2

BA1

A12

A10

RAS#

FBA_D[0..63] 20,22

FBA_DQM[7..0] 20,22

FBA_DQS[7..0] 20,22

FBA_DQS#[7..0] 20,22

+1.35VGS +1.35VGS+1.35VGS

1

1

CV122

CV121

2

2

1U_0603_25V6M

1U_0603_25V6M

RANKA@

CD@

4

For RF

1

2

33P_0402_50V8J

RF_OPTNS@

CV127

3

1U_0603_25V6M

1

CV119

2

RANKA@

1U_0603_25V6M

1

CV120

2

RANKA@

1

1

CV118

CV117

2

2

0.1U_0402_10V7K

0.1U_0402_10V7K

RANKA@

RANKA@

A A

5

+1.35VGS

UV5 SIDEUV6 SIDE

1

CV130

CV129

2

2

0.1U_0402_10V7K

RANKA@

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

0.1U_0402_10V7K

RANKA@

1U_0603_25V6M

CV131

2

CD@

2013/08/08

2013/08/08

2013/08/08

1U_0603_25V6M

CV132

2

RANKA@

1

1

1

1

1

CV134

CV133

2

2

1U_0603_25V6M

1U_0603_25V6M

RANKA@

RANKA@

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

20140213

20140213

20140213

For RF

1

CV139

2

33P_0402_50V8J

RF_OPTNS@

Title

Title

Title

DDR3 VRAM Rank0_L

DDR3 VRAM Rank0_L

DDR3 VRAM Rank0_L

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

Monday, November 17, 2014

Monday, November 17, 2014

Monday, November 17, 2014

Date: Sheet of

Date: Sheet of

Date: Sheet of

Haydn

Haydn

Haydn

1

21 45

21 45

21 45

1.0

1.0

1.0

5

at least 16 mils width(optimal)
20 mils spacing to other signals /planes

+1.35VGS

D D

C C

B B

12

12

+1.35VGS

12

12

12

FBA_CKE1

FBA_ODT1

RANKA@

RV135

1.33K_0402_1%

RANKA@

RV136

1.33K_0402_1%

RANKA@

RV169

1.33K_0402_1%

RANKA@

RV170

1.33K_0402_1%

FBA_CLK1

RV137
162_0402_1%

RANKA@

FBA_CLK1#

RV138

10K_0402_5%

RANKA@

+FBA_VREFCA1

1

CV141
.01U_0402_16V7-K

RANKA@

2

+FBA_VREFDQ1

1

CV217
.01U_0402_16V7-K

RANKA@

2

12

10K_0402_5%

RANKA@

FBA_A020,21
FBA_A120,21
FBA_A220,21
FBA_A320,21
FBA_A420,21
FBA_A520,21
FBA_A620,21
FBA_A720,21
FBA_A820,21
FBA_A920,21
FBA_A1020,21
FBA_A1120,21
FBA_A1220,21
FBA_A1320,21
FBA_A1420,21

FBA_BA020,21
FBA_BA120,21
FBA_BA220,21

FBA_CLK120
FBA_CLK1#20
FBA_CKE120

FBA_ODT120
FBA_CS1#20
FBA_RAS#20,21
FBA_CAS#20,21
FBA_WE20,21

FBA_RST#20,21

12

RV140

243_0402_1%

RANKA@

12

RV139

+1.35VGS +1.35VGS +1.35VGS +1.35VGS

0.1U_0402_10V7K

1

CV143

2

RANKA@

1

1

CV144

2

2

1U_0603_25V6M

1U_0603_25V6M

CD@

RANKA@

0.1U_0402_10V7K

1

CV142

2

RANKA@

4

UV8

M8

VREFCA

H1

VREFDQ

N3

FBA_A0
FBA_A1
FBA_A2
FBA_A3
FBA_A4
FBA_A5
FBA_A6
FBA_A7
FBA_A8
FBA_A9
FBA_A10
FBA_A11
FBA_A12
FBA_A13
FBA_A14

FBA_BA0
FBA_BA1
FBA_BA2

FBA_CLK1
FBA_CLK1#
FBA_CKE1

FBA_ODT1
FBA_CS1#
FBA_RAS#
FBA_CAS#
FBA_WE FBA_WE

FBA_DQS6
FBA_DQS4

FBA_DQM6
FBA_DQM4

FBA_DQS#6
FBA_DQS#4

CV146

1U_0603_25V6M

1

CV147

2

RANKA@

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

A13

T7

A14

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

K1

ODT

L2

CS

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ

J1

NC1

L1

NC2

J9

NC3

L9

NC4

M7

NC5

96-BALL
SDRAM DDR3

K4W4G1646B-HC11_FBGA96

@

CV145

+FBA_VREFDQ1

1

2

1U_0603_25V6M

RANKA@

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9

VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9

VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8

VSS_9
VSS_10
VSS_11
VSS_12

VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9

E3

FBA_D53

F7

FBA_D55

F2

FBA_D52

F8

FBA_D50

H3

FBA_D48

H8
G2
H7

D7
C3
C8
C2
A7
A2
B8
A3

B2
D9
G7
K2
K8
N1
N9
R1
R9

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

Group6

FBA_D51

FBA_D54

FBA_D49

FBA_D32
FBA_D39
FBA_D33
FBA_D36
FBA_D35

Group4 Group7

FBA_D38
FBA_D34
FBA_D37

+1.35VGS +1.35VGS

For RF For RF

1

2

33P_0402_50V8J

RF_OPTNS@

CV152

3

RV141

243_0402_1%

RANKA@

12

+FBA_VREFCA1+FBA_VREFCA1

+FBA_VREFDQ1

FBA_A0
FBA_A1
FBA_A2
FBA_A3
FBA_A4
FBA_A5
FBA_A6
FBA_A7
FBA_A8
FBA_A9
FBA_A10
FBA_A11
FBA_A12
FBA_A13
FBA_A14

FBA_BA0
FBA_BA1
FBA_BA2

FBA_CLK1
FBA_CLK1#
FBA_CKE1

FBA_ODT1
FBA_CS1#
FBA_RAS#
FBA_CAS#

FBA_DQS5
FBA_DQS7

FBA_DQM5
FBA_DQM7

FBA_DQS#5
FBA_DQS#7

FBA_RST#FBA_RST#

0.1U_0402_10V7K

1

CV154

2

RANKA@

M8
H1

N3

P7
P3

N2

P8

P2
R8
R2

T8
R3

L7
R7
N7

T3

T7

M2
N8
M3

J7

K7

K9

K1

L2

J3

K3

L3

F3
C7

E7
D3

G3

B7

T2

L8

J1

L1

J9

L9
M7

UV7 SIDEUV8 SIDE

0.1U_0402_10V7K

UV7

DQL0

VREFCA

DQL1

VREFDQ

DQL2
DQL3

A0

DQL4

A1
A2

DQL5

A3

DQL6

A4

DQL7
A5
A6
A7

DQU0
A8

DQU1
A9

DQU2
A10/AP

DQU3
A11

DQU4
A12/BC

DQU5

DQU6

A13

DQU7

A14

BA0

VDD_1

BA1

VDD_2
VDD_3

BA2

VDD_4
VDD_5
VDD_6

CK

VDD_7

CK

VDD_8

CKE

VDD_9

VDDQ_1

ODT
CS

VDDQ_2

RAS

VDDQ_3

CAS

VDDQ_4

WE

VDDQ_5
VDDQ_6
VDDQ_7

DQSL

VDDQ_8

DQSU

VDDQ_9

VSS_1

DML

VSS_2

DMU

VSS_3
VSS_4

DQSL

VSS_5

DQSU

VSS_6
VSS_7
VSS_8
VSS_9

RESET

VSS_10
VSS_11

ZQ

VSS_12

NC1

VSSQ_1

NC2

VSSQ_2
VSSQ_3

NC3

VSSQ_4

NC4

VSSQ_5

NC5

VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9

96-BALL
SDRAM DDR3

K4W4G1646B-HC11_FBGA96

@

1

1

CV156

CV155

2

2

1U_0603_25V6M

1U_0603_25V6M

RANKA@

RANKA@

1

CV157

2

RANKA@

2

E3

FBA_D40

F7

FBA_D43

F2

FBA_D41

F8

FBA_D42
FBA_D45
FBA_D47
FBA_D44
FBA_D46

FBA_D57
FBA_D63
FBA_D59
FBA_D62
FBA_D56
FBA_D61
FBA_D58
FBA_D60

CV158

Group5

1

CV159

2

1U_0603_25V6M

CD@

CMD mapping mod Mode D

Address

FBx_CMD0

FBx_CMD1

FBx_CMD2

FBx_CMD3

FBx_CMD4

FBx_CMD5

FBx_CMD6

FBx_CMD7

FBx_CMD8

FBx_CMD9

FBx_CMD10

FBx_CMD11

FBx_CMD12

FBx_CMD13

FBx_CMD14

FBx_CMD15

FBx_CMD16

FBx_CMD17

FBx_CMD18

FBx_CMD19

FBx_CMD20

FBx_CMD21

FBx_CMD22

FBx_CMD23

FBx_CMD24

FBx_CMD25

FBx_CMD26

FBx_CMD27

FBx_CMD28

FBx_CMD29

FBx_CMD30

FBx_CMD31

FBx_CMD32

FBx_CMD33

FBx_CMD34

FBx_CMD35

0..31

CS0#

ODT0

CKE0

A14

RST

A9

A7

A2

A0

A4

A1

BA0

WE

A15

CAS#

A13

A8

A6

A11

A5

A3

BA2

BA1

A12

A10

RAS#

DBG0

DBG1

H3
H8
G2
H7

D7
C3
C8
C2
A7
A2
B8
A3

B2
D9
G7
K2
K8
N1
N9
R1
R9

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

1

2

1U_0603_25V6M

RANKA@

Rank0

33P_0402_50V8J

32..63

1

2

RF_OPTNS@

1

FBA_D[0..63] 20,21

FBA_DQM[7..0] 20,21

FBA_DQS[7..0] 20,21

FBA_DQS#[7..0] 20,21

A14

RST

A9

A7

A2

A0

A4

A1

BA0

WE

A15

CAS#

CS1#

ODT1

CKE1

A13

A8

A6

A11

A5

A3

BA2

BA1

A12

A10

RAS#

CV164

A A

Title

Title

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2013/08/08

2013/08/08

2013/08/08

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

20140213

20140213

20140213

Title

DDR3 VRAM Rank0_H

DDR3 VRAM Rank0_H

DDR3 VRAM Rank0_H

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

Monday, November 17, 2014

Monday, November 17, 2014

Monday, November 17, 2014

Date: Sheet of

Date: Sheet of

Date: Sheet of

Haydn

Haydn

Haydn

1

22 45

22 45

22 45

1.0

1.0

1.0

5

4

3

2

1

+3VG_AON

D D

RV146

49.9K_0402_1%

N15SGT@

1 2

STRAP017
STRAP117
STRAP217
STRAP317
STRAP417

C C

STRAP0
STRAP1
STRAP2
STRAP3
STRAP4

RV151

45.3K_0402_1%

@

1 2

RV156

4.99K_0402_1%

@

1 2

ROM_SI17

ROM_SO17

ROM_SCLK17

ROM_SI
ROM_SO
ROM_SCLK

X76

1 2

RV159
20K_0402_1%

@

RV147

4.99K_0402_1%

@

1 2

RV152

4.99K_0402_1%

@

1 2

1 2

1 2

RV157

4.99K_0402_1%

@

RV160

4.99K_0402_1%

N15SGT@

RV148

24.9K_0402_1%

@

1 2

RV153
15K_0402_1%

@

1 2

+3VGS

1 2

1 2

RV158

4.99K_0402_1%

@

RV161

4.99K_0402_1%

N15SGT@

RV149

4.99K_0402_1%

@

1 2

RV154

4.99K_0402_1%

@

1 2

RV150

45.3K_0402_1%

@

1 2

RV155

45.3K_0402_1%

@

1 2

Physical
Strapping pin

ROM_SCLK

ROM_SI

ROM_SO PCIE_CFG

STRAP0

STRAP1

STRAP2

STRAP3

STRAP4

Resistor Values

N15x Binary Straps

Physical
Strapping pin

ROM_SCLK

ROM_SI

ROM_SO

STRAP0

STRAP1

STRAP2

STRAP3

STRAP4

4.99K

10K

15K

20K

24.9K

30.1K

34.8K

45.3K

Power Rail

+3VGS

+3VGS

+3VGS

+3VGS

+3VGS

+3VGS

+3VGS

+3VGS

Power Rail

+3VGS

+3VGS

+3VGS

+3VGS

+3VGS

+3VGS

+3VGS

+3VGS

Logical
Strapping Bit3

SOR3_EXPOSED

DEVID_SEL

Reserved(keep pull-up and pull-down footprint and stuff 50Kohm pull-up)

Logical
Strapping Bit2

SOR2_EXPOSED SOR1_EXPOSED SOR0_EXPOSED

Logical
Strapping Bit1

RAM_CFG[1]RAM_CFG[3] RAM_CFG[2]

Logical
Strapping Bit0

RAM_CFG[0]

VGA_DEVICESMB_ALT_ADDR

Reserved(keep pull-up and pull-down footprint and not stuff by default)

Pull-up to
+3VGS

1000

1001

1010

1011

1100

1101

1110

1111

Pull-down to Gnd

0000

0001

0010

0011

0100

0101

0110

0111

DEVID_SEL

0

(Default)

1

PCIE_CFG

0

(Default)

1

SMBUS_ALT_ADDR

0

Strap Mapping

SMB_ALT_ADDR

SUB_VENDOR

VGA_DEVICE

RAM_CFG[0]

RAM_CFG[1]

RAM_CFG[2]

RAM_CFG[3]

PCIE_MAX_SPEED

0x9E (Default)

1

0x9C (Multi-GPU usage)

VGA_DEVICE

0

3D Device (Class Code 302h)

1

VGA Device (Default)

X76

B B

GPU STRAP0

N15S-GT

FB Memory (DDR3)

H5TC4G63AFR-11C

Hynix

256M x 16

900MHz

MT41J256M16HA-093G:E

Micron

256M x 16

900MHz

K4W4G1646D-BC1A

Samsung

256M x 16

900MHz

H5TC2G63FFR-11C

Hynix

128M x 16

900MHz

Micron

MT41J128M16JT-093G:K

900MHz

128M x 16

Samsung

K4W2G1646Q-BC1A

900MHz

128M x 16

ROM_SI

0x3

PD 20K

0x4

PD 24.9K

0x5

PD 30.1K

0x9

PU 10K

0xA

PU 15K

0xB

PU 20K

ROM_SO STRAP4STRAP3STRAP2STRAP1ROM_SCLK

PD 4.99K Un-stuffPD 4.99K PU 49.9K

X76

Samsung

Un-stuffUn-stuffUn-stuff

Micron

X76409JVL01 SA00005SH10

X76409JVL51 (1G 32Mx16)

X76409JVL02

X76409JVL02 (2G 64Mx32)

VRAM P/NVRAM

SA00005M100

Hynix

A A

Title

Title

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2013/08/08

2013/08/08

2013/08/08

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

20140213

20140213

20140213

Title

N15X_MISC

N15X_MISC

N15X_MISC

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

Monday, November 17, 2014

Monday, November 17, 2014

Monday, November 17, 2014

Date: Sheet of

Date: Sheet of

Date: Sheet of

Haydn

Haydn

Haydn

1

23 45

23 45

23 45

1.0

1.0

1.0

1 2

@

BLM15PX121SN1D_2P

1 2

@

BLM15PX121SN1D_2P

PCH_BKLT_CTRL4

EC_LID_OUT#9,29

LCD

EC_BKLT_EN29

PCH_BKLT_EN4,29

PCH_LCD_VDDEN

1 2

@

1

2

L31

L38

Q25

S

G

󲚝󰥸

2

5

R351
0_0402_5%

13

D

2

G

C25

.1U_0402_10V6-K

S

D

13

AO3401A_SOT23-3

R185 0_0402_5%

0529
Change R347 to R-Short

R39 1K_0402_5%

LID

R349 1K_0402_5%

R350 1K_0402_5%

PCH_BKLT_EN

+3VS_LCDVCC

C23

.1U_0402_10V6-K

1 2

R183 0_0402_5%

PCH_LCD_FPBACK9

󰥸

B+

1 2

12

R237

100K_0402_5%

Q17
2N7002KW_SOT323-3

1 2

@

12

+LCD_VDD

2

C200

10U_0805_25V6K

1

12

@

PCH

󱱕󱚾󳫿󰥸󳛎NC󱳅󰥶󱬂EC󰴶󲚝󰥸

12

12

C22

4.7U_0402_6.3V6M

1

2

R235
100K_0402_5%

0.1U_0402_25V6

C209

12

C206

0.1U_0402_25V6

12

1 2

D2

R2 0_0603_5%

1

2

LVDS_VDD_EN#

R24
100K_0402_5%

RB751V-40_SOD323-2

@

2

@

+3VS

Q152A

G

1 2

1

2

12

1

2

C28

12

C21

R43
1K_0402_5%

@

.1U_0402_10V6-K

61

D

S

R54

U9

1

VOUT

2

GND

3

AP2821KTR-G1_SOT23-5

.1U_0402_10V6-K

LCD_BKLT_CTRL

@

@

2N7002KDWH_SOT363-6

.

100K_0402_5%

C29

.1U_0402_10V6-K

1

2

LCD
PWR

PCH_LCD_VDDEN4

D D

B+

LVDS_VDD_EN#

BKLT CNTL

C C

B B

VIN2

VIN14EN

LCD_BKLT_EN

CD@

5

LCD_BKLT_EN

4

+3VS

3

2

1

Hot-Plug

+3VS

+3VS

R15

@

1M_0402_5%

5

G

1 2

3 4

S

D

@

Q152B

2N7002KDWH_SOT363-6

1 2

R184 0_0402_5%

For LCD CONN

JLVDS

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

13

14

14

15

15

16

16

17

17

18

18

19

19

20

20

21

21

22

22

23

23

24

24

25

25

26

26

27

27

28

28

29

29

30

30

31

31

32

32

33

33

34

34

35

35

36

36

37

37

38

38

39

39

GND1

40

40

GND2

I-PEX_20374-040E-31

YOGA3_11"

ME@

41
42

PCH_EDP_HPD 4

Touch

+3VS +3VS_TOUCH

500mA(Max: 300mA)

12

R22 0_0603_5%

C32

.1U_0402_10V6-K

1

CD@

Touch Panel Poer USB20 Port6

2

EC_USB_ON#29,32,37

󳹕󱬪

for win8 button wake up

C31

.1U_0402_10V6-K

CD@

1

2

R909 0_0402_5%

+3VS +3VALW_TOUCH

C44

.1U_0402_10V6-K

1

CD@

2

+3VALW

1 2

Q2
LP2301ALT1G_SOT23-3

S

C338

.1U_0402_10V6-K

@

1

2

1

C340
.1U_0402_10V6-K

@

2

G

2

500mA(Max: 200mA)

12

+3VALW_TOUCH

D

13

C339

0.01U_0402_25V7K

1

@

2

R250_0603_5% @

ID=2.8A

+3VS_TOUCH

2

1

2

1

C45

.1U_0402_10V6-K

CD@

1

2

U55
AZ5123-01F.R7G_DFN1006P2X2

EMC_NS@

Q17

󰤳

5800E

Q25

󰤳

AO3401A

PCH_EDP_TX1-4
PCH_EDP_TX1+4

PCH_EDP_TX0-4
PCH_EDP_TX0+4

PCH_EDP_AUX+4
PCH_EDP_AUX-4

+3VS_LCDVCC

40MIL

+LCD_VDD

+3VS_DMIC
DMIC_DATA27
DMIC_CLK27

MCU_I2C_RE_SDA26

MCU_I2C_RE_SCL26

+3VS

+3VS_CMOS

1A

+3VALW_TOUCH

USB20_N6

USB20_P6

0801 reserve for touch panel

AZ5425-01F_DFN1006P2E2

C42 .1U_0402_10V6-K
C43 .1U_0402_10V6-K

C38 .1U_0402_10V6-K
C39 .1U_0402_10V6-K

C40 .1U_0402_10V6-K
C41 .1U_0402_10V6-K

DMIC_DATA
DMIC_CLK

USB20_P09
USB20_N09

WIN8_BUTTON#9,29

D8

EMC_NS@

EDP_HPD_OUT

12

EDP_HPD

*EDP EN,EDP-HPD EN
EDP EN, EDP-HPD Disabled, 10K PU Via VCCIO
EDP Disabled, NC

1 2
1 2

1 2
1 2

1 2
1 2

R26 0_0603_5%

EC_LID_OUT#

2

2

1

1

1 2

RA2860_0402_5%

1 2

RA2870_0402_5%

+3VS_TOUCH
USB20_N69
USB20_P69

MCU_I2C_RE_SDA
MCU_I2C_RE_SCL

12

1 2

0415 update

2

2

EMC_NS@

1

1

PCH_EDP_TX1-_C
PCH_EDP_TX1+_C

PCH_EDP_TX0-_C
PCH_EDP_TX0+_C

PCH_EDP_AUX+_C
PCH_EDP_AUX-_C

EDP_HPD_OUT
LCD_BKLT_EN
LCD_BKLT_CTRL

R227 0_0402_5%

D7
AZ5425-01F_DFN1006P2E2

R80
100K_0402_5%

+3VALW_TOUCH

12

R169
10K_0402_5%

EMC_NS@

2013/11/08

2013/11/08

2013/11/08

@

2

U57

2

CG381

470P_0402_50V8-J

1

1

2

1

Title

Title

Title

LCD

LCD

LCD

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Haydn

Haydn

Haydn

Monday, November 17, 2014

Monday, November 17, 2014

Monday, November 17, 2014

1

24 45

24 45

24 45

1.0

1.0

1.0

Camera

A A

5

4

DMIC

500mA(Max: 20mA)

+3VS +3VS_DMIC

12

R5 0_0603_5%

CG3379

.1U_0402_10V6-K

DMIC_DATA
DMIC_CLK

C1937

3

C1938

47P_0402_50V8J

@

47P_0402_50V8J

@

1 2

1 2

2

CD@

1

+3VS

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

500mA(Max: 117mA)

12

RG20 0_0603_5%

2014/01/11

2014/01/11

2014/01/11

2

CG16

.1U_0402_10V6-K

1

2

CD@

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

+3VS_CMOS

CG17

1

2

WIN8_BUTTON#

AZ5725-01F_DFN1006P2X2

10U_0603_6.3V6M

@

5

PCH_HDMI_TX0+4

PCH_HDMI_TX0-4

PCH_HDMI_TX1+4

PCH_HDMI_TX1-4

PCH_HDMI_TX2+4

PCH_HDMI_TX2-4

PCH_HDMI_CLK+4

D D

C C

PCH_HDMI_CLK-4

TMDS

HDMI_CLK+_C

HDMI_CLK-_C HDMI_CLK-_CON

HDMI_TX0+_C

HDMI_TX0-_C

HDMI_TX1-_C

HDMI_TX2-_C

1 2

CV255 .1U_0402_10V6-K

1 2

CV256 .1U_0402_10V6-K

1 2

CV257 .1U_0402_10V6-K

1 2

CV258 .1U_0402_10V6-K

1 2

CV259 .1U_0402_10V6-K

1 2

CV260 .1U_0402_10V6-K

1 2

CV262 .1U_0402_10V6-K

1 2

CV263 .1U_0402_10V6-K

1 2

R865 0_0402_5%@

L13

1

1

4

4

HDMI2012F2SF-900T04_4PEMC@

R866 0_0402_5%@

R867 0_0402_5%@

L12

1

1

4

4

HDMI2012F2SF-900T04_4PEMC@

R868 0_0402_5%@

R869 0_0402_5%@

L14

1

1

4

4

HDMI2012F2SF-900T04_4PEMC@

R870 0_0402_5%@

R871 0_0402_5%@

L15

1

1

4

4

HDMI2012F2SF-900T04_4PEMC@

R872 0_0402_5%@

1 2

1 2

1 2

1 2

1 2

1 2

1 2

2

2

3

3

2

2

3

3

2

2

3

3

2

2

3

3

HDMI_CLK+_CON

HDMI_TX0+_CON

HDMI_TX0-_CON

HDMI_TX1+_CONHDMI_TX1+_C

HDMI_TX1-_CON

HDMI_TX2+_CONHDMI_TX2+_C

HDMI_TX2-_CON

HDMI_TX0+_C

HDMI_TX0-_C

HDMI_TX1+_C

HDMI_TX1-_C

HDMI_TX2+_C

HDMI_TX2-_C

HDMI_CLK+_C

HDMI_CLK-_C

4

3

2

1

ESDDDC

H-PLUG

CONN

+3VS

RP9

2.2K_0404_4P2R_5%

1 4

2 3

PCH_HDMI_DDC_CLK4

1 3

D

2

S

PCH_HDMI_DDC_DAT4

PCH_HDMI_HPD4

+5VS

SUSP33

+3VS

G

2

S

5

G

Q153A

2N7002KDWH_SOT363-6

34

D

Q153B
2N7002KDWH_SOT363-6

R862
1M_0402_5%

1 2

2N7002KDWH_SOT363-6

S

Q5
AO3401A_SOT23-3

G

D

S

61

+3VS

2

G

61

D

Q155A

F1

0.5A_8V_KMC3S050RY

5V_HDMI_S0

21

RP8

2.2K_0404_4P2R_5%

1 4

2 3

HDMI_DDC_CLK_CON

HDMI_DDC_DAT_CON

HDMI_HPD_OUT

R885
20K_0402_5%

1 2

5V_HDMI_S0

1A

1

C261

2

CD@

HDMI_CLK+_CON
HDMI_CLK-_CON

D31

EMC_NS@

1

1

2

2

4

4

5

3

3

8

AZ1045-04F_DFN2510P10E-10-9

HDMI_TX0+_CON
HDMI_TX0-_CON

HDMI_HPD_OUT

HDMI_DDC_CLK_CON

HDMI_DDC_DAT_CON

5V_HDMI_S0

.1U_0402_10V6-K

9

10

8

9

7

7

6

65

D34

EMC_NS@

1

1

2

2

4

4

5

3

3

8

AZ1045-04F_DFN2510P10E-10-9

9

HDMI_HPD_OUT

10

8

HDMI_DDC_CLK_CON

9

7

HDMI_DDC_DAT_CON

7

6

5V_HDMI_S0

65

HDMI_TX1+_CON
HDMI_TX1-_CON

D32

EMC_NS@

1

1

2

4

5

3

AZ1045-04F_DFN2510P10E-10-9

HDMI_TX2+_CON
HDMI_TX2-_CON

10

2

9

7

4

65

3

8

9

8

7

6

HDMI_CLK+_C

HDMI_CLK-_C

HDMI_TX0+_C

B B

A A

HDMI_TX0-_C

HDMI_TX1+_C

HDMI_TX1-_C

HDMI_TX2+_C

HDMI_TX2-_C

5

1 2

R342 470_0402_5%

1 2

R344 470_0402_5%

1 2

R381 470_0402_5%

1 2

R382 470_0402_5%

1 2

R383 470_0402_5%

1 2

R384 470_0402_5%

1 2

R385 470_0402_5%

1 2

R389 470_0402_5%

+3VS

5

G

34

D

Q155B
2N7002KDWH_SOT363-6

S

MINI HDMI CONN

ME@

12

C263 .1U_0402_10V6-K

5V_HDMI_S0

HDMI_TX0+_CON
HDMI_TX0-_CON
HDMI_TX1+_CON
HDMI_TX1-_CON
HDMI_TX2+_CON
HDMI_TX2-_CON

HDMI_CLK+_CON
HDMI_CLK-_CON

4

JHDMI

19

+5V_POWER

9

TMDS_DATA0+

11

TMDS_DATA0-

6

TMDS_DATA1+

8

TMDS_DATA1-

3

TMDS_DATA2+

5

TMDS_DATA2-

10

TMDS_DATA0_SHIELD

7

TMDS_DATA1_SHIELD

4

TMDS_DATA2_SHIELD

13

TMDS_CLOCK_SHIELD

12

TMDS_CLOCK+

14

TMDS_CLOCK-

17
18

15
16
1

2

20
21
22
23

HDMI_DDC_CLK_CON
HDMI_DDC_DAT_CON

HDMI_HPD_OUT

2014/01/11

2014/01/11

2014/01/11

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

SCL
SDA

CEC

DDC/CEC_GROUND

HOT_PLUG_DETECT

RESERVED#2

GND0
GND1
GND2
GND3

ACON_AHRW0-AK1200

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2013/11/08

2013/11/08

2013/11/08

Title

Title

Title

HDMI

HDMI

HDMI

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

Haydn

Haydn

Haydn

Monday, November 17, 2014

Monday, November 17, 2014

Monday, November 17, 2014

25 45

25 45

1

25 45

1.0

1.0

1.0

5

4

3

2

1

+3VS

12

CG24 .1U_0402_10V6-K

CD@

UG16

1

D D

EC_SMB_CLK329

EC_SMB_DAT329

EC_SMB_CLK3

EC_SMB_DAT3

VCCA

2

A1

3

A2

GND4OE

NTSX2102GU8_XQFN8_1P2X1P4

VCCB

8

7

B1

6

B2

5

NEW symbol for Haydn 0604

+3VS

12

12

RG910

RG911

2.2K_0402_5%

2.2K_0402_5%

EC_SMB_CLK3

EC_SMB_DAT3

C C

EC_SMB_CLK3

EC_SMB_DAT3 MCU_I2C_RE_SDA

R873 0_0402_5%@

R874 0_0402_5%@

1 2

1 2

+3VS +3VS

RPG1

2.2K_0404_4P2R_5%

1 4

2 3

RG47
100K_0402_5%

1 2

MCU_I2C_RE_SCL

+3VS

MCU_I2C_RE_SCL

MCU_I2C_RE_SDA

MCU_I2C_RE_SCL 24

MCU_I2C_RE_SDA 24

G-SENSOR

EC_SMB_DAT3

+3VS

UG25

1

SDO

2

SDx

5

INT1

6

INT2

3

VDDIO

7

VDD

BMA222E_LGA12_2X2

CG3381

.1U_0402_10V6-K

CD@

CG3380

.1U_0402_10V6-K

CD@

1

1

2

2

SCx

PS

CSB

GND

GNDIO

NC

0416 update

12
11
10

9
8
4

EC_SMB_CLK3

B B

A A

Title

Title

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2014/01/11

2014/01/11

2014/01/11

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2013/11/08

2013/11/08

2013/11/08

Title

MCU

MCU

MCU

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Haydn

Haydn

Haydn

Monday, November 17, 2014

Monday, November 17, 2014

Monday, November 17, 2014

26 45

26 45

1

26 45

1.0

1.0

1.0

5

4

3

2

1

JIO HDA CARDREADER USB CONN

D D

HRS_FH52E-40S-0P5SH

+5VALW

+5VS

+3VALW

+3VS

DA1

EC_BEEP29

PCH_BEEP9

RA20
Add for Beep Noise on 5/21

3

2

BAT54CW_SOT323-3

RA20
10K_0402_5%

1 2

CA323

1 2

.1U_0402_10V6-K

PC_BEEP_R

1

CARD READER

Left USB_CONN

C C

PCH_HDA_RST#7
PCH_HDA_BCLK7
PCH_HDA_SYNC7
PCH_HDA_SDIN07
PCH_HDA_SDOUT7

EC_MUTE#29

DMIC_DATA24

DMIC_CLK24

USB_CHG_EN29

USB_OC1#9

USB20_N39

USB20_P39

USB20_N29

USB20_P29

USB30_TX_P19
USB30_TX_N19

USB30_RX_P19
USB30_RX_N19

LID_SW#29
LID_PAD#29
CHG_MOD129
CHG_MOD229
CHG_MOD329

1 2

PCH_HDA_BCLK_RC

RA28 0_0402_5%

PC_BEEP_R

40

40

39

39

42

38

GND2

38

41

37

GND1

37

36

36

35

35

34

34

33

33

32

32

31

31

30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10

9
8
7
6
5
4
3
2
1

RA28 Close to JIO

30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

JIO

ME@

+3VALW

2

C204
.1U_0402_10V6-K

@

1

68P_0402_50V8J

+3VS

2

C194
.1U_0402_10V6-K

@

1

EMC_NS@

EMC_NS@

CA23

EMC_NS@

1

2

CA24

1

1

CA22

2

2

22P_0402_50V8-J

33P_0402_50V8J

22P_0402_50V8-J

RA27

1

2

1 2

CA25

EMC@

EMC@

27_0402_5%

CA26

1

2

33P_0402_50V8J

2

1

EMC_NS@

+5VS

C201
.1U_0402_10V6-K

@

PCH_HDA_RST#

PCH_HDA_SYNC

PCH_HDA_SDOUT

PCH_HDA_BCLK_RC

PCH_HDA_SDIN0

For EMI

+5VALW

2

C202
.1U_0402_10V6-K

@

1

NEW symbol for Haydn 0609

B B

A A

Title

Title

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2014/01/11

2014/01/11

2014/01/11

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2013/11/08

2013/11/08

2013/11/08

Title

AUDIO

AUDIO

AUDIO

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

Haydn

Haydn

Haydn

Monday, November 17, 2014

Monday, November 17, 2014

Monday, November 17, 2014

27 45

27 45

1

27 45

1.0

1.0

1.0

PWR

5

4

3

2

1

@

+3VALW

+3VL

D D

12

RE1 0_0603_5%

12

RE5 0_0603_5%

CE11

.1U_0402_10V6-K

CE10

.1U_0402_10V6-K

CE9

CE15

1U_0402_10V6K

1

1

2

2

@

.1U_0402_10V6-K

1

1

2

2

CD@

8386

VCCRTC

12

CC1
47P_0402_50V8J

EMC@

2

CE339
18P_0402_50V8J

1

EMC@

+3VALW_EC

C C

B B

A A

RE220

100K_0402_5%

12

CE20

1U_0402_10V6K

1

2

+3VL

RE221

100K_0402_5%

12

@

RE222

100K_0402_5%

12

GPG2

*H MIRROR CODE EN
L MIRROR CODE DISABLE

RE8 10M_0402_5%

12

RE707
470K_0402_5%

EC_X1_R

32.768KHZ_12.5PF_200458-PG14

2

CE21
18P_0402_50V8J

1

CRYSTAL

1,Space 15MIL
2,No trace under crystal

EC_ACIN#8

CPU_PECI

@

12

12

DE23
RB751V-40_SOD323-2

@

WRST#

RE223

100K_0402_5%

MIRROR@

12

YE1

18P_0402_50V8J

EC_ACIN#

+3VL

1 2

13

D

S

CE22

RE586

10K_0402_5%

PCH_PCI_CLK

PCH_PLT_RST#8,16,30

+3VALW_EC

@

5

RE254 33_0402_5%

+3VALW_EC

12

UNMIRROR@

1 2

WRST# 16

GPG2

EC_X1

EC_X2

2

1

RE587

10K_0402_5%

1 2

QE15
2N7002KW_SOT323-3

2

G

RE203
1K_0402_5%

1 2

RE217 0_0402_5%

EC_ROTATION_LOCK#31

BATT charger

CPU_PECI_R5

Sensor

PCH_PWREN#33
EC_RSMRST#8

12

VR_ACIN 37

EC_ONOFF_BTN#31

EC_PCH_PWROK8,10

20MIL

+3VL

VBAT

for register keep

EC_KBRST#9
EC_INT_SERIRQ9
LPC_FRAME#7

LPC_AD37
LPC_AD27
LPC_AD17
LPC_AD07

PCH_PCI_CLK8

VCCST_PG_EC10

EC_RX30
EC_TX30

EC_SCI#9
LID_PAD#27

KSI030
KSI130
KSI230
KSI330
KSI430
KSI530
KSI630
KSI730
KSO030
KSO130
KSO230
KSO330
KSO430
KSO530
KSO630
KSO730
KSO830
KSO930
KSO1030
KSO1130
KSO1230
KSO1330
KSO1430
KSO1530

EC_LID_OUT#9,24

EC_ON38
EC_SMB_CLK137
EC_SMB_DAT137

1 2

RC12 43_0402_5%

EC_SMB_CLK326
EC_SMB_DAT326

1 2

RE202 0_0402_5%

EC_MUTE#27

EC_USB_ON#24,32,37

1 2

RE218

100_0402_5%

KSI7
KSI6
WRST#
EC_SMB_CLK1
EC_SMB_DAT1

0604

For off-line programming󱚸󰔦EC code

KSI-6 (pin-H13 --> I2C_DATA)
KSI-7 (pin-G9 --> I2C_CLK)
SMDAT0/GPF3(pin-B10)
SMCLK0/GPF2(pin-A10)

+3VALW_EC

CE8

.1U_0402_10V6-K

CE7

.1U_0402_10V6-K

1

2

RE188 0_0402_5%

EC_KBRST#
EC_INT_SERIRQ

PCH_PCI_CLK

EC_ONOFF_BTN#

EC_SMB_CLK1
EC_SMB_DAT1

EC_RSMRST#_R

EC_X1
EC_X2

1

2

FBE36
BLM15PX121SN1D_2P

1 2

@

1 2

WRST#

EC_RX

EC_SCI#
LID_PAD#

CPU_PECI

EC_MUTE#

EC_USB_ON#

12

RE182
10K_0402_5%

@

1

TP131@

1

TP132@

1

TP133@

1

TP134@

1

TP135@

1

2

CD@

12

4
5
6
7
8

9
10
13
14
15
16
17
22
23

126

58
59
60
61
62
63
64
65
36
37
38
39
40
41
42
43
44
45
46
51
52
53
54
55
56
57

110
111
115
116
117
118

94
95

112
125

33
35
93

2

128

TP136 @
TP137 @
TP138 @

4

CE6

.1U_0402_10V6-K

VCOREVCC

CE1
.1U_0402_10V6-K

VCCRTC_EC

UE1

3

12

VBAT

VCORE

KBRST#/GPB6
SERIRQ/GPM6
LFRAME#/GPM5
LAD3/GPM3
LAD2/GPM2
LAD1/GPM1
LAD0/GPM0
LPCCLK/GPM4
WRST#
ECSMI#/GPD4
PWUREQ#/BBO/SMCLK2ALT/GPC7
LPCPD#/GPE6
LPCRST#/GPD2
ECSCI#/GPD3
GA20/GPB5

IT8386E-192 CX
LQFP-128L

KSI0/STB#
KSI1/AFD#
KSI2/INIT#
KSI3/SLIN#
KSI4
KSI5
KSI6
KSI7
KSO0/PD0

Int. K/B

KSO1/PD1

Matrix

KSO2/PD2
KSO3/PD3
KSO4/PD4
KSO5/PD5
KSO6/PD6
KSO7/PD7
KSO8/ACK#
KSO9/BUSY
KSO10/PE
KSO11/ERR#
KSO12/SLCT
KSO13
KSO14
KSO15
KSO16/SMOSI/GPC3
KSO17/SMISO/GPC5

PWRSW#/GPB3
XLP_OUT/GPB4
SMCLK1/GPC1
SMDAT1/GPC2
SMCLK2/PECI/GPF6
SMDAT2/PECIRQT#/GPF7
CRX1/SIN1/SMCLK3/GPH1/ID1
CTX1/SOUT1/GPH2/SMDAT3/ID2

VSTBY0
GPE4

GINT/CTS0#/GPD5
RTS1#/GPE5
CLKRUN#/GPH0/ID0

CK32KE/GPJ7
CK32K/GPJ6

Clock

1
1
1

+3VALW_EC

+3VALW_EC

+3VS

20MIL 20MIL

.1U_0402_10V6-K

11

VCC

+3VALW_EC_VCCA

20MIL

CE13

1

2

114

121

127

74

AVCC

VSTBY126VSTBY250VSTBY392VSTBY4

VSTBY5

VSTBY(PLL)

PWM

LPC

DAC

EXTERNAL SERIAL FLASH

SPI Flash ROM

SM Bus

WAKE UP

GPIO

VSS11VSS227VSS349VSS491VSS5

VSS6

113

IT8386E-192-CX_LQFP128_14X14

EC_NOVO_BTN#31

122

RE197

100K_0402_5%

EC_AGND

12

RE22 0_0603_5%

PWM0/GPA0
PWM1/GPA1
PWM2/GPA2

PWM3/GPA3
PWM4/SMCLK5/GPA4
PWM5/SMDAT5/GPA5

PWM6/SSCK/GPA6

PWM7/RIG1#/GPA7

TMRI0/GPC4

TMRI1/GPC6

ADC0/GPI0
ADC1/SMINT0/GPI1
ADC2/SMINT1/GPI2

ADC

ADC3/SMINT2/GPI3
ADC4/SMINT3/GPI4

ADC5/DCD1#/GPI5
ADC6/DSR1#/GPI6
ADC7/CTS1#/GPI7

DAC2/TACH0B/SMINT6/GPJ2
DAC3/TACH1B/SMINT7/GPJ3

DAC4/DCD0#/GPJ4

DAC5/RIG0#/GPJ5

PS2CLK0/TMB0/CEC/GPF0

PS2DAT0/TMB1/GPF1

SMCLK0/GPF2

PS2

SMDAT0/GPF3
PS2CLK2/SMINT10/GPF4
PS2DAT2/SMINT11/GPF5

GPH3/ID3/YM

GPH4/ID4/YP

GPH5/ID5/DM

GPH6/ID6/DP

FSCE#/GPG3

FMOSI/GPG4
FMISO/GPG5

FSCK/GPG7

AC_IN#/GPB0

UART

LID_SW#/GPB1

EGAD/GPE1
EGCS#/GPE2
EGCLK/GPE3

GPIO

SMINT5/GPJ1

SSCE0#/GPG2
SSCE1#/GPG0

DSR0#/GPG6

DTR1#/SBUSY/GPG1/ID7

CRX0/GPC0

CTX0/TMA0/GPB2

RI1#/GPD0
RI2#/GPD1

TACH2/SMINT4/GPJ0

TACH1A/TMA1/GPD7

TACH0A/GPD6

L80HLAT/BAO/SMCLK4/GPE0

L80LLAT/SMDAT4/GPE7

AVSS

75

+3VL +3VALW_EC

12

@

1

BAT54CW_SOT323-3

DE40

2

3

12

RE183
100K_0402_5%

EC_NOVO_BTN#_R

EC_ONOFF_BTN#

CE5

1

2

CE4

1000P_0402_50V7K

CE3

.1U_0402_10V6-K

1

1

2

2

EC_AGND

24

EC_PWR_LED#

25

EC_BATTCHG_LED#

28

EC_BATTLOW_LED#

29

EC_VOL_UP#

30

EC_FAN_PWM1

31

EC_FAN_PWM

32
34

EC_SUS_VCCP

120

EC_VOL_DOWN#

124

EC_SUSP#

66
67
68

BATT_TEMP

69
70

1 2

RE18 0_0402_5%

1 2

71

RE13 0_0402_5%

72
73

1 2

78

RE216 0_0402_5%

79
80
81

85
86
87

1 2

RE11 0_0402_5%

1 2

88

RE12 0_0402_5%

89

EC_TP_CLK

90

EC_TP_DATA

96
97
98

EC_USB20_N5

99

EC_USB20_P5

101

EC_SPI_CS0#

102

EC_SPI_SI

103

EC_SPI_SO

105

EC_SPI_CLK

108

EC_ACIN#

109

LID_SW#

82

EC_SYS_PWROK

83

CHG_MOD3

84

DCIN_USB_EN

77
100
106
104
107

EC_SYSON

119
123

EC_ON_5V

18
21
76

EC_NOVO_BTN#_R

48

EC_FAN_SPEED1

47

EC_FAN_SPEED

19

WIN8_BUTTON#PCH_PWREN#

20

CHG_MOD1

.1U_0402_10V6-K

3

+3VALW_EC_VCCA

12

RE23 0_0603_5%

EC_PWR_LED# 30
EC_BATTCHG_LED# 30
EC_BATTLOW_LED# 30

EC_VOL_UP# 31
EC_FAN_PWM1 31
EC_FAN_PWM 31
EC_BEEP 27
EC_SUS_VCCP 40

EC_VOL_DOWN# 31
EC_SUSP# 33,39,40,41

VR_CPU_PWROK 10,43

NTC_V 37

BATT_TEMP 37

VR_IMVP_IMON 43

EC_KBLED_PWREN 30
VR_ADP_I 37
CHG_MOD2 27
USB_ID_N 37

EC_PROCHOT#

EC_RTCRST_ON

1 2

RE214 0_0402_5%

1 2

RE215 0_0402_5%

1 2

RE204 0_0402_5%MIRROR@

1 2

RE205 0_0402_5%MIRROR@

1 2

RE208 0_0402_5%MIRROR@

1 2

RE212 0_0402_5%MIRROR@

GPG2

EC_SUSWARN# 8

PCH_BKLT_EN 4,24

EC_PBTN_OUT# 8
EC_SMB_CLK0 7,16,31
EC_SMB_DAT0 7,16,31

EC_TP_CLK 31

EC_TP_DATA 31

USB20_N5
USB20_P5

LID_SW# 27

EC_SYS_PWROK 8

CHG_MOD3 27

DCIN_USB_EN 37

VGA_AC_DET 16

EC_PCH_ACIN 8
PCH_ME_PROTECT 7
EC_SYSON 33,39

EC_BKLT_EN 24
EC_ON_5V 38
PCH_SLP_S3# 8
PCH_SLP_S4# 8

EC_FAN_SPEED1 31
EC_FAN_SPEED 31
WIN8_BUTTON# 9,24

CHG_MOD1 27

EC DSW Signal

0_0402_5%

EC_ONOFF_BTN#

LID_SW#

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

12

RE186 10K_0402_5%

12

@

RE189 10K_0402_5%

DE24

SDM10U45LP-7_DFN1006-2-2

RE31

@

1 2

2014/01/11

2014/01/11

2014/01/11

@

0_0402_5%

@

21

1 2

RE219

GPU Thermal

Sensor

EC_CAPS_LED# 30

USB_CHG_EN 27
USB20_N5 9
USB20_P5 9

PCH_SPI_CS0# 7
PCH_SPI_SI 7

PCH_SPI_SO 7

PCH_SPI_CLK 7

+3VL+3VALW_EC

+3VALW_EC

RE32
0_0402_5%

1 2

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

PCH

EC_ON

VR_HOT#43

EC_FAN_PWM
EC_FAN_PWM1

EC_FAN_SPEED1
EC_FAN_SPEED

2013/11/08

2013/11/08

2013/11/08

EC_PROCHOT#

EC_USB_ON#

LID_PAD#

WIN8_BUTTON#

EC_SMB_CLK1
EC_SMB_DAT1

EC_PWR_LED#

EC_BATTCHG_LED#
EC_BATTLOW_LED#

EC_USB20_N5

EC_USB20_P5

EC_USB20_P5

EC_KBLED_PWREN

EC_TP_CLK
EC_TP_DATA

EC_VOL_UP#

EC_VOL_DOWN#

EC_MUTE#

EC_ROTATION_LOCK#

EC_RX

EC_SCI#

EC_INT_SERIRQ
EC_KBRST#

EC_ON_5V

EC_RSMRST#_R

EC_SYS_PWROK

EC_SYSON

EC_SUSP#
EC_PCH_PWROK

EC_SUS_VCCP

BATT_TEMP

100K_0402_5%

1 2

RE16 0_0402_5%

2

G

RE704 10K_0402_5%

RE196 10K_0402_5%@

RE168 10K_0402_5%

RPE680

RE682 2.2K_0402_5%

RPE683

RE690 1.5K_0402_5%@

RE691 1.5K_0402_5%@

RE708 1.5K_0402_5%

@

RE693 10K_0402_5%

RPE3

2 3
1 4

10K_0404_4P2R_5%

RE184 10K_0402_5%

RE185 10K_0402_5%

@

RE179 10K_0402_5%

RE187 10K_0402_5%

RPE225

1 4
2 3

10K_0404_4P2R_5%

@

RE207 10K_0402_5%

RPE224

1 4
2 3

10K_0404_4P2R_5%

RE206 10K_0402_5%

RPE200

1 4
2 3

10K_0404_4P2R_5%

RE10 10K_0402_5%

RE7 10K_0402_5%

RE181 10K_0402_5%

RE3 10K_0402_5%

1 4
2 3

RE14 10K_0402_5%

1 2

CE17

EMC_NS@

EC_RTCRST_ON

12

2N7002KW_SOT323-3

RE50

CPU_PROCHOT# 5,37

13

D

QE1
2N7002KW_SOT323-3

S

+3VALW_EC

12

12

12

@

14
23

2.2K_0404_4P2R_5%

12

14
23

2.2K_0404_4P2R_5%

12

12

12

12

12

12

12

12

@

12

12

@

12

12

12

12

RPE2

10K_0404_4P2R_5%

12

100P_0402_50V8J

QE3

2

G

Title

Title

Title

ECT8386

ECT8386

ECT8386

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

TS internal pull high

Open Drain Signal
SMB3 PU at MCP Side

+3VS

13

D

S

Monday, November 17, 2014

Monday, November 17, 2014

Monday, November 17, 2014

RTC_RST# 7

Haydn

Haydn

Haydn

1

29 45

29 45

29 45

1.0

1.0

1.0

WIFI&BT Board Connector

5

Mini Card(WLAN/WiMAX)

Need short

+3VS_WLAN

@

J2

112

JUMP_43X79

2

22U_0603_6.3V6-M

C78

1

1

C53
.1U_0402_10V6-K

2

2

PCIE_PTX_C_DRX_P39
PCIE_PTX_C_DRX_N39

PCIE_PRX_DTX_P39
PCIE_PRX_DTX_N39

CLK_PCIE_WLAN8
CLK_PCIE_WLAN#8

WLAN_CLKREQ#8

+3VS_WLAN

RC2525
10K_0402_5%

@

1 2

WLAN_PCIE_WAKE#

+3VS

D D

C C

4

1 2

R113 0_0402_5%

USB20_P49
USB20_N49

PCIE_WAKE#8

1 2

R114 0_0402_5%

R126

1 2

WLAN_CLKREQ# WLAN_CLKREQ#_R

1 2

R120 0_0402_5%@

0_0402_5%

USB20_P4_R
USB20_N4_R

WLAN_PCIE_WAKE#

JWLAN

ME@

1
3
5
7

9
11
13
15
17
19
21
23

33
35
37
39
41
43
45
47
49
51
53
55
57

59
61
63
65
67
69
71
73
75

77

GND1
USB_D+
USB_D­GND2
SDIO_CLK
SDIO_CMD
SDIO_DAT0
SDIO_DAT1
SDIO_DAT2
SDIO_DAT3
SDIO_WAKE
SDIO_RESET

GND3
PETP0
PETN0
GND4
PERP0
PERN0
GND5
REFCLKP0
REFCLKN0
GND6
CLKEQ0#
PEWAKE0#
GND7

RSRVD/PETP1
RSRVD/PETN1
GND8
RSRVD/PERP1
RERVD/PERN1
GND9
RSRVD1
RSRVD2
GND10

GND15

KEY E
PIN24~PIN31 NC PIN

25
27
29
31

RSRVD/W_DISABLE#2

W_DISABLE#1

NFC_I2C_IRQ(MGPIO5)

NFC_Reset#(MGPIO7)

DEREN_40-42313-06742RHFL

3.3VAUX1

3.3VAUX2

PCM_CLK

PCM_SYNC

PCM_OUT

UART_WAKE

UART_RX

UART_TX
UART_CTS
UART_RTS

CLink_RESET

CLink_DATA

CLink_CLK

SUSCLK

PERSTO#

I2C_DATA

I2C_CLK

RSRVD7
RSRVD8

RSRVD12

3.3VAUX3

3.3VAUX4

LED#1

PCM_IN

LED#2

GND11

COEX3
COEX2
COEX1

GND14

24
26
28
30

NEW symbol for Haydn 0609

3

+3VS_WLAN

C79

.1U_0402_10V6-K

1

2
4
6
8
10
12
14
16
18
20
22

32
34
36
38
40
42
44
46
48
50
52
54
56

58
60
62
64
66
68
70
72
74

76

2

1

TP52@

1

TP61@

EC_TX_RSVD EC_TX_R

R65 0_0402_5%@

EC_RX_RSVD BT_CTRL#

R66 0_0402_5%@

R125 0_0402_5%

BT_CTRL#
WL_OFF#

1

TP68@

1

TP82@

1

TP111@

EC_TX_R

+3VS_WLAN

C203

.1U_0402_10V6-K

1

CD@

2

1 2
1 2

1 2
1 2

R121 0_0402_5%

SUSCLK 8
PCH_PLT_RST# 8,16,29

2

1

KB BL

+5VS +5VS_LED

Q24

1 2

R109 0_0402_5%

JKBBL

ME@

1

1

GND1

2

2

3

3

4

4

GND2

ACES_51524-0040N-001

LP2301ALT1G_SOT23-3

D

S

13

G

ID=2.8A

2

C213

.1U_0402_10V6-K

1

@

2

5

6

C205

.1U_0402_10V6-K

1

CD@

2

+5VS

R254
10K_0402_5%

1 2

13

D

EC_KBLED_PWREN29

100K_0402_5%

R261

2

2N7002KW_SOT323-3

1 2

G

S

Q20

+5VS_LED

NEW symbol for Haydn 0530

BT_CTRL#

R3000

100_0402_5%

WL_OFF#

+3VALW

+3VALW

WLAN&BT Combo module circuits

*

BT_CRTL

BT on module
Enable

PCH_BT_ON#

EC_PWR_LED#29

B B

EC_BATTLOW_LED#29

EC_BATTCHG_LED#29

A A

EC_PWR_LED#

EC_BATTLOW_LED#

EC_BATTCHG_LED#

EC_PWR_LED#

EC_BATTCHG_LED#

EC_BATTLOW_LED#

EMC_NS@

H

L

2

1

D4

2

C1942
220P_0402_50V7K

1

C1943
220P_0402_50V7K

EMC_NS@

2

D5

2

AZ5725-01F_DFN1006P2X2

1

1

BT on module
Disable

L

H

1 2

3

2

12-22-S2ST3D-C30-2C_WHI-ORG

2

C1948
220P_0402_50V7K

1

EMC_NS@

2

2

D6

2

2

AZ5725-01F_DFN1006P2X2

1

1

1

1

2

D4007

2

AZ5123-01F.R7G_DFN1006P2X2

EMC_NS@

1

1

LED300

3

12-21C-T3D-CP1Q2B12Y-2C_WHITE

LED301

1

2

2

1

1

AZ5725-01F_DFN1006P2X2

1 2

R3001

1 2

150_0402_5%

D4008
AZ5123-01F.R7G_DFN1006P2X2

EMC_NS@

1 2

R105 1K_0402_5%

1 2

R110 0_0402_5%

PCH_BT_OFF# 9

PCH_WLAN_OFF# 9

Keyboard Connector

ACES_50519-02601-001

26

28
27

KSI1

26

G2

25

KSI7

25

G1

24

KSI6

24

23

KSO9

23

22

KSI4

22

21

KSI5

21

20

KSO0

20

19

KSI2

19

18

KSI3

18

17

KSO5

17

16

KSO1

16

15

KSI0

15

14

KSO2

14

13

KSO4

13

12

KSO7

12

11

KSO8

11

10

KSO6

10

9

KSO3

9

8

KSO12

8

7

KSO13

7

6

KSO14

6

5

KSO11

5

4

KSO10

4

3

KSO15

3

2

+3VALW_CAPLED

2

1

1

ME@

JKB

2

D13

2

AZ5725-01F_DFN1006P2X2

EMC@

1

1

2

D4006

2

AZ5123-01F.R7G_DFN1006P2X2

EMC_NS@

1

1

Reserve

5

4

1 2

R187 100_0402_1%

DEBUG@

1 2

BT_CTRL# EC_RX

R188 100_0402_1%

DEBUG@

12

R191
100K_0402_5%

DEBUG@

KSI1 29
KSI7 29
KSI6 29
KSO9 29
KSI4 29
KSI5 29
KSO0 29
KSI2 29
KSI3 29
KSO5 29
KSO1 29
KSI0 29
KSO2 29
KSO4 29
KSO7 29
KSO8 29
KSO6 29
KSO3 29
KSO12 29
KSO13 29
KSO14 29
KSO11 29
KSO10 29
KSO15 29

1 2

R101 100_0402_5%

1 2

R102 100_0402_5%@

+3VALW_CAPLED EC_CAPS_LED#

KSO2 KSO1

KSO15

KSO6

KSO8

KSO13

KSO12

KSO11

KSO10

KSO3

KSO4

KSI0

KSO0

+3VS
+3VALW
EC_CAPS_LED# 29

1 2

C117 100P_0402_50V8JEMC_NS@

1 2

C89 100P_0402_50V8JEMC_NS@

1 2

C92 100P_0402_50V8JEMC_NS@

1 2

C94 100P_0402_50V8JEMC_NS@

1 2

C96 100P_0402_50V8JEMC_NS@

1 2

C98 100P_0402_50V8JEMC_NS@

1 2

C100 100P_0402_50V8JEMC_NS@

1 2

C119 100P_0402_50V8JEMC_NS@

1 2

C107 100P_0402_50V8JEMC_NS@

1 2

C116 100P_0402_50V8JEMC_NS@

1 2

C115 100P_0402_50V8JEMC_NS@

1 2

C121 100P_0402_50V8JEMC_NS@

1 2

C124 100P_0402_50V8JEMC_NS@

EC_TXEC_TX_R

For EMC

3

KSO7

KSI2

KSO5

KSI3

KSO14

KSI7

KSI6

KSI5

KSI4

KSO9

KSI1

1 2

C133 100P_0402_50V8JEMC_NS@

1 2

C90 100P_0402_50V8JEMC_NS@

1 2

C93 100P_0402_50V8JEMC_NS@

1 2

C95 100P_0402_50V8JEMC_NS@

1 2

C97 100P_0402_50V8JEMC_NS@

1 2

C99 100P_0402_50V8JEMC_NS@

1 2

C109 100P_0402_50V8JEMC_NS@

1 2

C110 100P_0402_50V8JEMC_NS@

1 2

C122 100P_0402_50V8JEMC_NS@

1 2

C108 100P_0402_50V8JEMC_NS@

1 2

C123 100P_0402_50V8JEMC_NS@

1 2

C111 100P_0402_50V8JEMC_NS@

1 2

C120 100P_0402_50V8JEMC_NS@

UART Debug Connector

+3VS

EC_TX29
EC_RX29

R259
100K_0402_5%

@

1 2

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

2

2014/01/11

2014/01/11

2014/01/11

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2013/11/08

2013/11/08

2013/11/08

JDB2

ME@

1

5

1

GND1

2

2

3

3

4

6

4

GND2

ACES_50208-00408-001

Title

Title

Title

CONN(WLAN&KB&PWRB&UART)

CONN(WLAN&KB&PWRB&UART)

CONN(WLAN&KB&PWRB&UART)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

D

D

D

Date: Sheet of

Date: Sheet of

Date: Sheet of

Monday, November 17, 2014

Monday, November 17, 2014

Monday, November 17, 2014

1

Haydn

Haydn

Haydn

30 45

30 45

30 45

1.0

1.0

1.0

+5VS

1A

1

2

+5VS

1A

1

2

5

C986
10U_0603_6.3V6M

C987
10U_0603_6.3V6M

12

R223 0_0603_5%

1

C175
.1U_0402_10V6-K

2

@

12

R224 0_0603_5%

1

C176
.1U_0402_10V6-K

2

@

JFANC

ME@

1

1

GND1

2

2

3

3

4

4

GND2

ACES_50208-00408-001

JFANS

ME@

1

1

GND1

2

2

3

3

4

4

GND2

ACES_50208-00408-001

5

6

5

6

THERMAL SENSOR AND FAN

D D

EC_FAN_SPEED29
EC_FAN_PWM29

EC_FAN_SPEED129
EC_FAN_PWM129

C C

4

Rotation button

EC_ROTATION_LOCK#29

TESTPAD

TP41

Vol up/down button

EC_VOL_UP#29

TP37TESTPAD

Vol up/down button

EC_VOL_DOWN#29

TP38TESTPAD

3

EC_ROTATION_LOCK#

1

EC_VOL_UP#

0530 New symbol

1

EC_VOL_DOWN#

0530 New symbol

1

SW4000

4

114

3

223

EVQP7L01K_4P

1 2

C1934 220P_0402_50V7K

D4000

1

221

SW4001

114

223

EVQP7L01K_4P

1 2

SW4002

114

223

EVQP7L01K_4P

1 2

221

221

EMC_NS@

4

3

EMC_NS@

4

3

EMC_NS@

AZ5725-01F_DFN1006P2X2

C1935 220P_0402_50V7K

D4001

1

AZ5725-01F_DFN1006P2X2

C1936 220P_0402_50V7K

D4002

1

AZ5725-01F_DFN1006P2X2

2

NOVO button

EC_NOVO_BTN#29

TP43

1

TESTPAD

ON/OFF button

EC_ONOFF_BTN#29

1

TP39TESTPAD

EC_NOVO_BTN#

EC_ONOFF_BTN#

0530 New symbol

1

SW4003

4

114

3

223

EVQP7L01K_4P

1 2

C1940 220P_0402_50V7K

D4004

1

221

SW4004

114

223

EVQP7L01K_4P

1 2

221

EMC_NS@

4

3

EMC_NS@

AZ5725-01F_DFN1006P2X2

C1939 220P_0402_50V7K

D4003

1

AZ5725-01F_DFN1006P2X2

+3VS

+3VS

C1933

1U_0402_10V6K

C179

.1U_0402_10V6-K

1

2

R625 10K_0402_5%

R624 10K_0402_5%

REMOTE1+

1

C982
100P_0402_50V8J

2

REMOTE1-

Close U35

5

REMOTE+_R

REMOTE-_R

THM_SHDN#

@

1

2

@

B B

THM_ALERT#

THM_SHDN#

Close to memory side

REMOTE1+/-:
Trace width/space:10/10 mil
Trace length:<8"

A A

Nuvoton thermal sensor

Address 1001_100xb

10mA

1 2

@

1 2

@

1

2

U35

1

2

3

4

NCT7718W_MSOP8

C

2

B

E

3 1

UMA@

REMOTE+_R

C451
2200P_0402_50V7K

REMOTE-_R

VDD

D+

D-

T_CRIT#

Q137

MMST3904-7-F_SOT323-3

+3VS

ALERT#

SCL

SDA

GND

REMOTE1+

REMOTE2+

REMOTE2-

REMOTE1-

8

EC_SMB_CLK0

7

EC_SMB_DAT0

6

THM_ALERT#

5

Close to GPU&VRAM

REMOTE2+

1

2

REMOTE2-

UMA@

1 2

R176 0_0402_5%

1 2

R175 0_0402_5%OPT@

1 2

R178 0_0402_5%OPT@

1 2

R177 0_0402_5%

UMA@

C983
100P_0402_50V8J

@

4

EC_SMB_CLK0 7,16,29

EC_SMB_DAT0 7,16,29

C

2

Q138

B

MMST3904-7-F_SOT323-3

E

3 1

OPT@

REMOTE+_R

REMOTE-_R

1 2

+3VS_TP

1

2

C1020

Touch Pad Connector

R222
0_0402_5%

C181

.1U_0402_10V6-K

4.7U_0402_6.3V6M

1

2

ACES_50505-00641-001

6

8

6

G2

5

EC_TP_CLK29
EC_TP_DATA29

PM_SMB_CLK7,14
PM_SMB_DAT7,14

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

PM_SMB_CLK
PM_SMB_DAT

2014/01/11

2014/01/11

2014/01/11

7

5

G1

4

4

3

3

2

2

1

1

ME@

JTP

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

+3VS_TP

PM_SMB_CLK
PM_SMB_DAT

2013/11/08

2013/11/08

2013/11/08

EMC_NS@

D3

EMC_NS@

D11

2

AZ5725-01F_DFN1006P2X2

2

1

1

Title

Title

Title

CONN(THM&FAN&RTN&SPKR&TP)

CONN(THM&FAN&RTN&SPKR&TP)

CONN(THM&FAN&RTN&SPKR&TP)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

D12

2

AZ5725-01F_DFN1006P2X2

2

1

1

Monday, November 17, 2014

Monday, November 17, 2014

Monday, November 17, 2014

EMC_NS@

2

2

1

1

AZ5725-01F_DFN1006P2X2

Haydn

Haydn

Haydn

1

31 45

31 45

31 45

1.0

1.0

1.0

5

4

3

2

1

USB30

USB20_N1 USB20_N1_CON

USB20_P1 USB20_P1_CON

D D

USB30_TX_R_P2 USB30_TX_P2_CON

USB30_RX_N2

USB30_RX_P2

C C

R880,R881 COLAY WITH L69

R878,R879 COLAY WITH L70

L68

1

1

4

CMM21T-900M-N_4P

3

3

2

2

3

3

2

2

2

3

R876,R877 COLAY WITH L68

4

EMC@

EMC@

EXC24CH900U_4P

4

4

1

1

L69

EMC@

EXC24CH900U_4P

4

4

1

1

L70

2

3

USB30_TX_N2_CONUSB30_TX_R_N2

USB30_RX_N2_CON

USB30_RX_P2_CON

USB20_N1_CON

USB20_P1_CON

AZ5425-01F_DFN1006P2E2

USB30_TX_P29

+5V_USB30
USB30_TX_N29
USB20_N19

USB20_P19
USB30_RX_P29

USB30_RX_N29

D9

EMC_NS@

.1U_0402_10V6-K

.1U_0402_10V6-K

2

2

D10

2

AZ5425-01F_DFN1006P2E2

EMC_NS@

1

1

1 2

USB30_TX_R_P2

1 2

USB30_TX_R_N2
USB20_N1 USB20_N1_CON

USB20_P1
USB30_RX_P2

USB30_RX_N2

1 2

R880 0_0402_5%@

1 2

R881 0_0402_5%@

1 2

R876 0_0402_5%

@

1 2

R877 0_0402_5%@

1 2

R878 0_0402_5%

@

1 2

R879 0_0402_5%

@

C185

C186

2

1

1

MSATA (Full Card)

SATA_PTX_DRX_P17

SATA_PTX_DRX_N17

SATA_PRX_DTX_N17
SATA_PRX_DTX_P17

+5VS_MSATA

B B

2A

1 2
1 2

1 2
1 2

C19460.01U_0402_25V7K
C19450.01U_0402_25V7K

C19470.01U_0402_25V7K
C19490.01U_0402_25V7K

SATA_PTX_C_DRX_P1
SATA_PTX_C_DRX_N1

SATA_PRX_C_DTX_N1
SATA_PRX_C_DTX_P1

USB30_TX_N2_CON
USB30_TX_P2_CON

D33

EMC_NS@

1

1

2

2

4

4

5

3

3

8

AZ1045-04F_DFN2510P10E-10-9

USB30_RX_N2_CON
USB30_RX_P2_CON

USB30_TX_P2_CON

USB30_TX_N2_CON

USB20_P1_CON
USB30_RX_P2_CON

USB30_RX_N2_CON

JSATA

ME@

1

1

2

2

3

3

GND1

4

4

5

5

6

6

7

7

GND2

8

8

9

9

10

10

ELCO_006809610010846

New Symbol

9

10

8

9

7

7

6

65

Left USB3.0/2.0

JUSB30

9

SSTX+

1

VBUS

8

SSTX-

2

D-

4

GND

3

D+

6

SSRX+

7

GND_D

5

SSRX-

DEREN_40-42039-00901RHF-L

11

12

ME@

U8

1

GND

+5VALW

C184
.1U_0402_10V6-K

EC_USB_ON#24,29,37 USB_OC0# 9

EC_USB_ON#

12

2

VIN1

3

VIN2

EN/EN4FLAG

AP2820CMMTR-G1_MSOP8

VOUT3

VOUT2

VOUT1

8

1 2

7

C15 100U_1206_6.3V6M

1 2

6

C187 .1U_0402_10V6-K

5

2.5A

Low Active 2A

+5V_USB30

2

GND_PAD1
GND_PAD2
GND_PAD3
GND_PAD4

10
11
12
13

2

1

1

NEW symbol for Haydn 0604

+5V_USB30

D4005
AZ5725-01F_DFN1006P2X2

EMC_NS@

R891

1 2

0_0603_5%

A A

5

4

C1955

22U_0603_6.3V6-M

1

2

C1956

1

2

2A

+5VS_MSATA+5VS

4.7U_0402_6.3V6M

@

1

C1950
.1U_0402_10V6-K

2

Title

Title

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2014/01/11

2014/01/11

2014/01/11

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2013/11/08

2013/11/08

2013/11/08

Title

CONN(MSATA&USB30&USB20)

CONN(MSATA&USB30&USB20)

CONN(MSATA&USB30&USB20)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

Haydn

Haydn

Haydn

Monday, November 17, 2014

Monday, November 17, 2014

Monday, November 17, 2014

32 45

32 45

1

32 45

1.0

1.0

1.0

5

4

3

2

1

+1.35V +1.35V_CPU

D D

+5VALW

1

EMC_NS@

C C

C217
.1U_0402_10V6-K

2

EMC_NS@

EMC_NS@

1

C224
.1U_0402_10V6-K

2

1

C218
.1U_0402_10V6-K

2

EMC_NS@

1

2

PJ13

PJ_43x79_6

@

12

R16 0_0603_5%

@

+3VS +5VS

C226

1 2

.1U_0402_10V6-K

EMC_NS@

C225
.1U_0402_10V6-K

EMC_NS@

+3VALW+1.05VS

1

2

1

C214
.1U_0402_10V6-K

2

@

C220
.1U_0402_10V6-K

1U_0402_10V6K

EC_SUSP# 5VS_CT1

1 2

R264 0_0402_5%

1 2

R265 0_0402_5%

C114

0.01U_0402_25V7K

1

@

2

1U_0402_10V6K

C112

C113

+5VALW

1

2

+3VALW

1

2

Enable:
VIH=1.2V~5.5V
VIL=0~0.4V

U56

1

VOUT1_2

VIN1_1

2

VOUT1_1

VIN1_2

3

4

5

6
7

APL3523AQBI-TRG_TDFN14_2X3

EN1

BIAS

EN2

VIN2_1
VIN2_2

VOUT2_2
VOUT2_1

GPAD

SS1

GND

SS2

14
13

12

11

10

3VS_CT2

9
8

15

+5VS

1

C216
.1U_0402_10V6-K

2

+3VS

1

C215
.1U_0402_10V6-K

2

2N7002KW_SOT323-3

0522 new symbol for haydn .

3VS_CT25VS_CT1

1000P_0402_50V7K

C101

@

1

2

1000P_0402_50V7K

C102

@

1

2

2N7002KW_SOT323-3

R231

100K_0402_5%

Q16

R230

100K_0402_5%

REV@

Q19

REV@

+5VALW +5VLP

12

@

13

D

S

+5VALW

12

13

D

S

G

+5VLP

@

G

12

2

12

2

R234
100K_0402_5%

SUSP

EC_SUSP#

R236
100K_0402_5%

SYSON#

SUSP 25

EC_SUSP# 29,39,40,41

EC_SYSON 29,39

For CLK signal cross moat concern.

+3VALW +3VALW_PCH

12

R13 0_0603_5%

@

Q23
LP2301ALT1G_SOT23-3

D

S

.1U_0402_10V6-K

C37

@

1

2

B B

PCH_PWREN#29

PCH_PWREN#

12

R11

10K_0402_5%

12

R238
470K_0402_5%

13

G

2

C441

.1U_0402_10V6-K

1

2

1

C219
.1U_0402_10V6-K

2

C30

0.01U_0402_25V7K

1

@

2

2

G

REV@

Deciphered Date

Deciphered Date

Deciphered Date

2

+1.35V

R246

@

22_0402_5%

1 2

61

D

Q147A
2N7002KDWH_SOT363-6

S

2013/11/08

2013/11/08

2013/11/08

PCH_PWREN#

1 2

R119 0_0402_5%

@

Title

Title

Title

POWER SWITCH

POWER SWITCH

POWER SWITCH

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

Monday, November 17, 2014

Monday, November 17, 2014

Monday, November 17, 2014

Date: Sheet of

Date: Sheet of

Date: Sheet of

+5VS +3VS +0.68VS+1.05VS

R245

5

G

REV@

@

22_0402_5%

1 2

34

D

Q146B
2N7002KDWH_SOT363-6

S

4

R257

@

22_0402_5%

2

G

REV@

1 2

61

D

Q146A
2N7002KDWH_SOT363-6

S

1 2

SUSP

R118 0_0402_5%

REV@

A A

5

5

G

REV@

R247

@

22_0402_5%

1 2

34

D

Q147B
2N7002KDWH_SOT363-6

S

2

REV@

G

Q148

R248

@

22_0402_5%

1 2

13

D

S

2N7002KW_SOT323-3

1 2

SYSON#

R117 0_0402_5%

REV@

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2014/01/11

2014/01/11

2014/01/11

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

QC11B

5

AO5804EL_SC89-6

Haydn

Haydn

Haydn

+3VALW_PCH

@

1 2

3

4

1

R258
22_0402_5%

@

33 45

33 45

33 45

1.0

1.0

1.0

5

V_PATH

PR103

PR118

@

9

8

7

6

5

PR136

124K_0402_1%

+1.05VS

@

1 2

12

12

12

PQ101
AON6414AL_DFN8-5

5

PC103
2200P_0402_50V7K

+3VL

ME@

BELLW_80188-2321

9
8
7
6

PJP1

PR122

0_0402_5% @

PR126

1 2

24K_0402_1% @

12

PR133

10K_0402_1%

@

reverse

4

PR113
100K_0402_5%

1 2

1
2

GND4

3

GND3

4

GND2

55GND1

CPU_PROCHOT#5,29

12

+3VALW

ADIN_1

D D

12

PR102

4.02K_0402_1%

430K_0402_1%

ACDET

12

PR105
68K_0402_1%

CHRG_GND

C C

VR_ACIN29

CMM21T-900M-N_4P

4

USB20_N7 USB20_N7_CON

USB20_P7

B B

+5VALW

PR121

0_0402_5%

@

1 2

PC134

0.1U_0402_25V6

@

1 2

A A

+3VALW

PR125

1 2

35.7K_0402_1%

@

PR131

10K_0402_1%

@

45W current limit 2.8A
65W current limit 3.6A

12

PC132

0.1U_0402_25V6

0.1U_0402_25V6

112

PL102

715_ACP

PC129

0.1U_0402_25V6

@

12

@

PC135

12

PR132

10K_0402_5%

@

334

2

EMC@

715_ACN

12

PC130

0.1U_0402_25V6

1 2

10

1

2

3

@

RT9553AGQW_WDFN10_3X3

1 2

+3VALW

USB20_P7_CON

@

PU102

@

CSN

PROCHOT#

CSP

RESET

VCC

OVSET

UVSET

ILIM

EN4TMER

GND

11

375K for 15uS
124K for 5uS

10K_0402_5%

PQ102
AON7408L_DFN8-5

1

3

2

2

3

1

12

PC101

4

0.1U_0402_25V6

V_PATH

PR106

1 2

4.02K_0402_1%

CHRG_GND

1
2
3
4

+1.05VS

12

10K_0402_5%

USB_ID

PD103

AZ5725-01F_DFN1006P2X

EMC@

PR117

@

PR123

0_0402_5% @

PR124

1 2

12

2.94K_0402_1% @

PR130

10K_0402_1%

@

USB20_N7_CON
USB20_P7_CON

1

1

2

2

12

CPU_PROCHOT#

PD104

+3VALW

set OVP

VR_ADP_I29

J101

1 2

JUMPER

AZ5425-01F_DFN1006P2E2

EMC_NS@

1

2

5

1

2

12

PC113

0.1U_0402_25V6

ACDET

ADIN

PD105

AGATE

4

PR101

0.01_1206_1%

0.1U_0402_25V6

PC108

1 2

715_ACP

EC_SMB_DAT1

EC_SMB_CLK1

CHRG_GND

AC adapter 20V

PF102

1 2

F1206HI7000V024TM

PR138

0_0402_5%

1 2
1 2

PR139

0_0402_5%

1

1

2

2

AZ5425-01F_DFN1006P2E2

EMC_NS@

12

715_ACN

12

PC114

0.1U_0402_25V6

PU101

1

2

3

4

6

10

8

9

5

7

12

PC124
100P_0402_50V8J

@

@

2N7002KDWH_SOT363-6

ACN

ACP

CMSRC

ACDRV

ACDET

CELL

SDA

SCL

ACOK

IOUT

CHRG_GND

USB20_N7 9
USB20_P7 9

PR127

200K_0402_1%

PQ110B

12

21

+3VALW

3

V_CHG

12

PC107

10U_0805_25V6K

10U_0805_25V6K

ADIN_1

5

PQ111

4

CHG_DH_R

AON6552_DFN8-5

321

CHG_PAHSE

4

12

PR116

12

PC128

12

0.1U_0402_25V6

5

321

2.2_0805_5%

10U_0805_25V6K

PC131

USB_OPEN

2.2UH_PCMB063T-2R2MS_8A_20%

PQ105

AON6414AL_DFN8-5

715_SRN

PQ107
AO4407AL_SO8

1
2
3 6

12

PR108
0_0402_5%

PC127

1 2

EMC@

1
2
36

12

PR119

12

PR128

PD106

1 2

RB751V-40_SOD323-2

61

PQ110A

D

2

G

S

4

PL101

1 2

0.1U_0402_25V6

12

PC120

8
7

5

0.47U_0402_25V6K

B+

PC133

12

PR107

0.01_1206_1%

PC123

1 2

0.1U_0402_25V6

12

9/25: Change PC109,PC110 from SE00000QK0J 10U 25V 0805 H1.25 to SE00000QK00 H0.85.
Add PC137 SGA0000490J 47U.
Delete PC111 SE00000QK0J.

1

12

PC109

10U_0805_25V6-K

12

12

CHRG_GNDCHRG_GND

PQ108
AO4407AL_SO8

1
2
3 6

12

PR120
470K_0402_5%

12

PR134
100K_0402_5%

13

D

PQ109

G

S

2N7002KW_SOT323-3

2

To fix EE noise issue

+

PC137

2

PC110

47U_B2_10V_R70M

10U_0805_25V6-K

PC121

0.1U_0402_25V6

4

BGATE

+5VALW

EC_USB_ON#24,29,32 USB_OC3# 9

VUSB

8
7

5

12

PR129

200K_0402_5%

new added For USB

PD107

RB751V-40_SOD323-2

1

2

EC_USB_ON#

12

12

PR110

12

0_0402_5%

C105
.1U_0402_10V6-K

DCIN_USB_EN 29

PC117
10U_0805_25V6K

If SDV verify fail, need use more strong mosfet

112

12

1U_0603_25V6M

PD102

RB751V-40_SOD323-2

PR109

REG_CHG

HCB2012KF-121T50_0805

HCB2012KF-121T50_0805

PC126

0.1U_0402_25V6

1 2

EMC@

SI4483ADY-T1-GE3_SO8

12

PC136

0.1U_0402_25V6

For EMI request

12

PC106

PD101

1 2

RB751V-40_SOD323-2

PC115

12

PC119

0.047U_0402_25V7K

1 2

12

PC125
1U_0402_10V6K

CHRG_GND

PL104

1 2

EMC@

PL103

1 2

EMC@

0.1U_0402_25V6

PQ106

8
7

5

4

200K_0402_1%

200K_0402_1%

2N7002KDWH_SOT363-6

PJ101

2

12

JUMP_43X79

@

PC105

PC104

@

@

10U_0805_25V6K

10U_0805_25V6K

PR104

1 2

10_0805_1%

CHG_VCC

20

VCC

11

BGATE

BATDRV

16

REG_CHG

REGN

17

1 2

BTST

18

CHG_DH

HIDRV

0_0402_5%

19

PHASE

15

CHG_DL

LODRV

14

GND

BQ24715RGRR_VQFN20_3P5X3P5

13

SRP

CHRG_GND

12

SRN

POWERPAD

12

PR140
470K_0402_5%

ADIN_1

12

USB_ID_N 29

34

D

5

USB_ID USB_OPEN

G

12

S

PR137

200K_0402_5%

12

PQ104
AO4407AL_SO8

1
2
3 6

PC122
1000P_0402_50V7K

1

2

3

2

8
7

5

4

BATT_TEMP29

U101

GND

VOUT3

VIN1

VOUT2

VIN2

VOUT1

EN/EN4FLAG

AP2820CMMTR-G1_MSOP8

Low Active 2A

BATT+

8

7

6

5

EC_SMB_CLK129

EC_SMB_DAT129

VUSB

8A

PC118

1000P_0402_50V7K

0_0402_5%

1 2

2A

EMC@

PR115

R103

0_0402_5%

PF101

12A_24V_F1206HB12V024T/M

1 2

12

PR112

100_0402_1%

+3VL

12

PR114
100K_0402_5%

R_0402

0609 220UF change to B2 SIZE

100U_1206_6.3V6M

100U_1206_6.3V6M

1

1

C106

C103

2

2

@

12

EC_SMCA

12

1

2

12

PR111

100_0402_1%

C104
.1U_0402_10V6-K

EC_SMDA

RTC_VCC

MBAT_PRES#_R

BATT+_2

SUYIN_125022HB008M200ZL

1

JBATT1

1

1

2

2

3

9

3

GND1

4

10

4

GND2

5

11

5

GND3

6

12

6

GND4

7

7

8

8

ME@

+3VALW

+3VL

12

1 2

NTC_V

PR150
0_0402_5%

PR148

13.7K_0402_1%

29

12

PR149

13.7K_0402_1%

@

12

PH101

100K_0402_1%_TSM0B104F4251RZ

Title

Title

Title

NVDC charger

NVDC charger

NVDC charger

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Paganini 1.0

D

Paganini 1.0

D

Paganini 1.0

D

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

1

37 45Monday, November 17, 2014

37 45Monday, November 17, 2014

37 45Monday, November 17, 2014

5

9/25: Change PC202,PC203,PC214,PC216 from SE00000QK0J 10U 25V 0805 H1.25 to SE00000QK00 H0.85.
Reserve PC230 SGA00007I00 220U.
To fix EE noise issue.

PJ201

@

112

0.1U_0402_25V6

B++

12

PR202

1 2

0_0402_5%

PC209

@

2A

12

PC202

PC201

0.1U_0402_25V6
10U_0805_25V6-K

12

3V_GND 3V_GND

PJ203

1 2

JUMPER

3V_GND

@

12

12

PC203

10U_0805_25V6-K

PR204
1M_0402_5%

B+

2

JUMP_43X79

D D

EC_ON29

3V_GND

4

PU201

7

12

PR201

1M_0402_5%

+3VALW_FB

EN2

8

IN

9

GND

1

EN1

3

FB

+3VLP

2

SYX196BQNC _QFN10_3X3

PJ204

112

JUMP_43X39

@

2

+3V_PWRGD

PG

6

+3VBS

BS

LX

OUT

LDO

10

4

5

+3VLX

+3VALW_P+3VALW_EN

100mA

12

0.1U_0603_25V7-M

PC210

+3VL

PC204

1 2

+3VLP

1

PTP201
PAD

4.7U_0603_6.3V6K

@

0.01U_0402_25V7K

3

2.2UH_PCMB063T-2R2MS_8A_20%

12

PR203

2.2_0805_5%

@

12

PC211
1000P_0402_50V9-J

@

PC212

1 2

PL201

1 2

PR205

1 2

1K_0402_1%

2

1

+3VALW

5A

PJ202

+3VALW_P

12

12

PC205

22U_0805_6.3V6M

12

12

PC206

PC208

PC207

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

2

JUMP_43X79

@

112

C C

B+

PJ205

2

112

JUMP_43X79

@

EC_ON_5V29

B B

A A

5A

12

PC213

0.1U_0402_25V6

EC_ON +5VALW_P

1 2

PR209

0_0402_5% @

1 2

PR213 0_0402_5%

9/25: Reserve PC230 for acoustic noise issue.

12

PC214

10U_0805_25V6-K

PC226

@

0.1U_0402_25V6

12

PC216

5V_GND 5V_GND

5V_GND

1

12

+

PC217

PC230

2

@

10U_0805_25V6-K

10U_0805_25V6-K

@

220U_D_10VM_R25M

PR211

PJ207

1 2

JUMPER

@

12

1M_0402_5%

12

1U_0603_25V6M

5V_GND

PC219

1 2

+5VALW_EN

+5VFB

+5VVCC

PU202

8

IN

9

GND

5

VCC

1

EN

3

FB

SYX196C1QNC_QFN10_3X3

2

PG

6

BS

10

LX

4

OUT

7

LDO

470P_0402_50V8-J

+5V_PWRGD

+5VBS

+5VLX

100mA

5V_GND

PC229

1 2

PC218

1 2

0.1U_0603_25V7-M

+5VLP

12

PC227

4.7U_0603_6.3V6K

1 2

1K_0402_1%

8/1: Change PC229 from 6800pF to 470pF for 5VALW transient response issue with low voltage Vin.

+3V_PWRGD

PL202

1 2

1.5UH_PCMB063T-1R5MS_10A_20%

12

PR210

2.2_0805_5%

@

12

PC228
1000P_0402_50V9-J

@

PR212

PR207

1 2

0_0402_5% @

PR208

1 2

0_0402_5% @

12

PC220

+3VALW

12

22U_0805_6.3V6M

PR206
100K_0402_5%

@

1 2

PC221

22U_0805_6.3V6M

12

PC222

12

12

PC223

22U_0805_6.3V6M

22U_0805_6.3V6M

3VALWP
VFB=2V
TDC 5A
Fsw=350KHZ
OCP:7.8A~9.5A

+5VALW_P

PC224

22U_0805_6.3V6M

+5VALW

6A

PJ206

2

12

PC225

22U_0805_6.3V6M

JUMP_43X79

@

112

5VALWP
TDC 5A

Fsw=300KHZ
OCP:7.8A~9.5A

Title

Title

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

3

2014/02/20

2014/02/20

2014/02/20

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2014/02/20

2014/02/20

2014/02/20

Title

3VALWP/5VALWP

3VALWP/5VALWP

3VALWP/5VALWP

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

Monday, November 17, 2014

Monday, November 17, 2014

Monday, November 17, 2014

Date: Sheet of

Date: Sheet of

Date: Sheet of

Paganini

Paganini

Paganini

1

38 45

38 45

38 45

1.0

1.0

1.0

5

4

3

2

1

8/1: Follow EE request to stuff PC303 0.1u_0402_10v7k for EC_SYSON overshot/undershot fail

12

PC301

@

12

19

7

MODE

GND

0.1U_0402_10V7K

PR301 0_0402_5%

1 2

@

PR302 0_0402_5%

12

12

PR305

DIS@

18

TRIP

REFIN

8

REFIN

12

31.6K_0402_1%

PR306 0_0402_5%

12

110K_0402_1%

PR311

S3_1.35V

17

S3

VDDQSNS

9

12

S5_1.35V

PC303 0.1U_0402_10V7K

16

S5

VBST

DRVH

SW

V5IN

DRVL

PGND

10

UMA SKU
PQ302 change to AON7408L for 4A output current

PR307

0_0603_5%

1 2

15

BST_1.35V

14

13

12

11

LX_1.35V

12

PC310
1U_0603_25V6M

EC_SUSP# 29,33,40,41

CPU_DRAMPG_CNTL 5,14

EC_SYSON 29,33

PC306

0.1U_0603_25V7-M

12

UG_1.35V

AON7408L_DFN

+5VALW

LG_1.35V

AON7506_DFN

DIS@

PQ301

PQ302

5

4

321

5

4

321

9/25: Change PC304,PC305 from SE00000QK0J 10U 25V 0805 H1.25 to SE00000QK00 H0.85
To fix EE noise issue.

PJ301

2A

1.35V_B+

@

12

12

PC302

PC304

0.1U_0402_25V6

1 2

0.68UH_PCMC063T-R68MN_15.5A_20%

12

PR309

2.2_0805_5%

@

1.35V_SN

12

PC312
1000P_0402_50V9-J

@

12

10U_0805_25V6-K

PL301

2

112

B+

JUMP_43X79

@

PC305

10U_0805_25V6-K

8A

PJ303

2

1

+

PC309
220U_D2_2.5VY_R6M

2 3

+1.35VP
Vout=1.367V
Iocp min=13A fro DIS SKU
Iocp min=6A fro UMA SKU

JUMP_43X118@

+1.35V

112

D D

+3VALW

1k for 500K
12k for 670K

@

PR303

PR304

1K_0402_1%

1 2

1A

12

PC313

PC314

0.01U_0402_25V7K

10K_0402_1%

PU301

21

PAD

1

VTTSNS

2

VLDOIN

3

VTT

4

VTTGND

5

VTTREF

VREF

1 2

20

PGOOD

TPS51716RUKR_WQFN20_3X3

VREF

6

PR310

10K_0402_1%

1 2

12

UMA SKU OCP
PR305 change to 54.9K_0402_1% SD00000H88J

PC307

@

12

PC308

22U_0805_6.3V6M

+VTT_REFP

+1.35V

12

22U_0805_6.3V6M

PC311

1U_0402_6.3V6K

0.1U_0402_25V6

PJ304

2

JUMP_43X79

@

2A

112

+0.68VSP

C C

+0.68VSP +0.68VS

B B

A A

Title

Title

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2014/01/11

2014/01/11

2014/01/11

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2013/11/08

2013/11/08

2013/11/08

Title

PWR_1.35V/0.68VS

PWR_1.35V/0.68VS

PWR_1.35V/0.68VS

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

Yoga3-BDW

Yoga3-BDW

Yoga3-BDW

Monday, November 17, 2014

Monday, November 17, 2014

Monday, November 17, 2014

39 45

39 45

1

39 45

1.0

1.0

1.0

5

4

3

2

1

D D

PR401

EC_SUS_VCCP29

EC_SUSP#29,33,39,41

C C

1 2

0_0402_5%

PR402

0_0402_5%

@

PR403

B+

12

PC402

0.1U_0402_25V6

C_0402

@

12

1M_0402_5%

12

+3VALW

PR410

@

0_0402_5%

PJ401

JUMP_43X39

2

12

112

+3VALW

9/25: Change PC401,PC403 from SE00000QK0J 10U 25V 0805 H1.25 to SE00000QK00 H0.85.
Stuff PC401.
To fix EE noise issue.

1.05V_EN

PR404

1 2

100K_0402_5%@

12

PR409
100K_0402_5%

R_0402
@

B+_1.05V

12

PC404

0.1U_0402_25V6

12

PC401

10U_0805_25V6-K

12

PR406
1M_0402_5%

@

PU401

8

12

PC403

IN

9

GND

3

ILMT

10U_0805_25V6-K

2

PG

Fsw=800KHZ

1

6

10

4

7

5

1.05VP_BS

1.05VLDO

PC413

4.7U_0603_6.3V6K

PC405

0.1U_0603_25V7K

1 2

12

PC414

4.7U_0603_6.3V6K

+3VALW

12

1.05VP_LX

1UH_PCMB063T-1R0MS_12A_20%

12

PR405

2.2_0805_5%

@

12

PC416
1000P_0402_50V9-J

@

1.05VP_FB

PL401

1 2

12

PR407

1K_0402_1%

12

PC415

680P_0402_50V7K

EN

BS

LX

FB

BYP

LDO

SYX198DQNC_QFN10_3X3

Vfb=0.6V

PR408
100K_0402_1%

1 2

12

133K_0402_1%

PR411

680P 1K

+1.05VS

7A

12

12

12

12

PC406

PC407

22U_0805_6.3V6M

PC408

22U_0805_6.3V6M

22U_0805_6.3V6M

12

12

PC411

PC410

PC409

22U_0805_6.3V6M

@

@

22U_0805_6.3V6M

22U_0805_6.3V6M

PJ402

PJ_43x79_6

Vout=1.051V
OCP:12A

+3VS

PR412

10K_0402_5%

@

1 2

PR416

1M_0402_5%

PU402

4

IN

5

PG

GND

FB6EN

SY8032ABC_SOT23-6

@

FB=0.6Volt

12

12

@

3

LX

2

1

PC423

0.22U_0402_10V6K

@

1.05VMP_LX

PL402

1 2

1UH_PH041H-1R0MS_3.8A_20%

@

12

PR413

2.2_0805_5%

@

12

PC422
1000P_0402_50V9-J

@

1.05VMP_FB

12

12

75K_0402_1%

12

PR417
100K_0402_1%

@

@

@

PR414

PJ403

2

+3VALW

B B

DGPU_PWROK18,20,42

112

JUMP_43X79

@

EN_VGA18,19,42

PR418

12

@

PR415

0_0402_5%

@

0_0402_5%

1 2

@

1.05VMP_VIN

12

PC418

PC417

22U_0805_6.3V6M

22U_0805_6.3V6M

@

12

1.05VGS_EN

2.5A

PC419

12

68P_0402_50V8J

@

PC420

22U_0805_6.3V6M

+1.05VSP_VGA

12

PC421

22U_0805_6.3V6M

@

PJ404

2

112

JUMP_43X79

@

Reverse only

+1.05VGS

A A

Title

Title

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2014/01/11

2014/01/11

2014/01/11

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2013/11/08

2013/11/08

2013/11/08

Title

PWR_1.35V/0.68VS

PWR_1.35V/0.68VS

PWR_1.35V/0.68VS

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

Yoga3-BDW

Yoga3-BDW

Yoga3-BDW

Monday, November 17, 2014

Monday, November 17, 2014

Monday, November 17, 2014

40 45

40 45

1

40 45

1.0

1.0

1.0

5

D D

4

3

2

1

+3VALW

50mA

PJ501

2

112

12

PC505

.1U_0402_10V6-K

@

12

PC502

4.7U_0603_6.3V6K

JUMP_43X39

@

PR501

1 2

C C

EC_SUSP#29,33,39,40

0_0402_5%

EN_1_5VSP

PU501

3

VIN

VOUT

2

GND

SET

1

SHDN

APL5325BI-TRG_SOT23-5

4

5

12

PR502

21.5K_0402_1%

12

PR504

24K_0402_1%

12

+1.5VSP +1.5VS

PC503
220P_0402_50V7K

@

12

50mA

PJ502

2

JUMP_43X39

PC504
10U_0603_6.3V6M

112

@

VFB=0.8V

B B

A A

Title

Title

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

2014/01/11

2014/01/11

2014/01/11

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2013/11/08

2013/11/08

2013/11/08

Title

PWR_VCCSA

PWR_VCCSA

PWR_VCCSA

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Yoga3-BDW

Yoga3-BDW

Yoga3-BDW

Monday, November 17, 2014

Monday, November 17, 2014

Monday, November 17, 2014

41 45

41 45

1

41 45

1.0

1.0

1.0

5

+3VGS

PR602
10K_0402_5%

@

1 2

D D

C C

B B

3VGS_PWR_EN16,18

NVVDD_PWM_VID16

VSSSENSE_VGA17

VCCSENSE_VGA17

DGPU_PWROK18,20,40

N15S-GT use config-B
N15V-GM use config-D

R1
R2
R3
R4

C(nF)

PSI_VGA16

PR9440
PR9434
PR9436
PR9437
PR9431
PC1277

12

PR603
0_0402_5%

N15SGT@

NVVDD_PWM_VID

PSI_VGA

VSSSENSE_VGA

VCCSENSE_VGA

DGPU_PWROK

B
N15S-GTDN15V-GM

20R527

7.520
2 0
18 6.2
0 1.74

2.7 5.6

+VGA_CORE

12

PR604
100K_0402_5%

@

PR616

100_0402_5%

OPT@

VSSSENSE_VGA

VCCSENSE_VGA

PR624

100_0402_5%

1 2

OPT@

PD601
RB751V-40_SOD323-2

OPT@

1 2

PR605
10K_0402_1%

OPT@

12

0_0402_5%

OPT@

PR621

0_0402_5%

OPT@

12

PR618

12

PC614

1000P_0402_50V7K

12

VCC_SEN

12

PC601
.1U_0402_10V6-K

OPT@

12

OPT@

47P_0402_50V8J

OPT@

EN_VGA

N15SGT@

VSS_SEN

PC615

1 2

OPT@

0_0402_5%

0.01U_0603_50V7K

OPT@

PR622

1 2

10K_0402_1%

4

EN_VGA 18,19,40

PR614

12

PC612

1 2

PR620

1 2

51_0402_1%

OPT@

100P_0402_50V8J

reserve follow
NV suggestion

VREF_VGA

PR615

18K_0402_1%

1 2

PC611

2700P_0402_50V7-K

PR617

39K_0402_1%

PC617

1 2

OPT@

@

PC607

2700P_0402_50V7-K

1 2

PR610

20K_0402_1%

N15SGT@

12

N15SGT@

N15SGT@

12

OPT@

PC616

1 2

10P_0402_50V8JOPT@

1 2

FB2_VGA

PR623

82K_0402_1%OPT@

20K_0402_1%

12

12

2K_0402_1%

VREF_VGA

FB_VGA

COMP_VGAFB1_VGA

reserve

PC606

PR611

PR613

N15SGT@

FS

10P_0402_50V8J

10

11

12

12

@

N15SGT@

7

8

9

12

VIDBUF

REFIN

VREF

FS

FBRTN

FB

COMP

PU601

NVVDD_PWM_VID

GND

25

PR631

PSI_VGA

EN_VGA

2EN3

4

5

6

PSI

VID

VIDBUF

TSNS13TALERT#14VCC15PGOOD16HG217BST2

12

VCC_VGA

@

5.9K_0402_1%

OPT@

PC623
1U_0402_10V6K

VREF_VGA

1 2

OPT@

3

UGATE1_VGA

1

HG1

BST1

24

PH1

23

LG1

22

PGND

21

PVCC

20

LG2

19

PH2

OPT@

18

NCP81172MNTWG_QFN24_4X4

BOOT2_VGA

UGATE2_VGA

DGPU_PWROK

PR627

10K_0402_5%

+3VS

12

12

PR629

OPT@

2.2_0402_5%

+5VS

PR607

0_0603_5%

BOOT1_VGA

PVCC_VGA

PHASE1_VGA

12

BOOT1_2_VGA

LGATE1_VGA

PC605

0.22U_0603_16V7K

1 2

OPT@

PC613

4.7U_0603_6.3V6K

1 2

OPT@

PR619
0_0402_5%

PR626

0_0603_5%

PHASE2_VGA

PR608

0_0402_5%

12

12

PR612

5.1K_0402_1%

@

reserve for future tune

12

+5VS

PR625
0_0402_5%

12

12

BOOT2_2_VGA

LGATE2_VGA

UGATE1_2_VGA

UGATE2_2_VGA

PC622

0.22U_0603_16V7K

1 2

OPT@

2

+VGA_B+

12

5

4

321

4

4

4

5

321

12

PC602

0.1U_0603_25V7K

PQ601

OPT@

AON6414AL_DFN8-5

OPT@

PQ602

AON6554_DFN

OPT@

123 5

12

PC618

PQ603

0.1U_0603_25V7K

AON6414AL_DFN8-5

OPT@

OPT@

PQ604

AON6554_DFN

OPT@

123 5

12

PC603

PC604

10U_0805_25V6K

OPT@

OPT@

0.24UH_PCME063T-R24MS1R145_35A_20%

12

PR609

2.2_0805_5%

@

SNUB1_VGA

12

PC610
1000P_0402_50V9-J

@

+VGA_B+

12

12

PC619

10U_0805_25V6K

OPT@

OPT@

0.24UH_PCME063T-R24MS1R145_35A_20%

12

PR630

2.2_0805_5%

@

SNUB2_VGA

12

PC625
1000P_0402_50V9-J

10U_0805_25V6K

PC620

10U_0805_25V6K

@

PL601

1 2

OPT@

PL602

1 2

OPT@

PJ601

2

JUMP_43X79

@

112

1

+

2 3

OPT@

1

B+

+VGA_CORE

1

+

PC609

PC608

2

330U_B2_2VM_R15M

220U_D2_2.5VY_R6M

OPT@

+VGA_CORE

1

+

PC624

2

330U_B2_2VM_R15M

OPT@

12

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

2014/01/11

2014/01/11

2014/01/11

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

12

@

2013/08/05

2013/08/05

2013/08/05

12

PC627

PC626

22U_0805_6.3V6M

PC628

22U_0805_6.3V6M

22U_0805_6.3V6M

@

@

OPT@

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

12

12

12

PC631

PC630

PC629

22U_0805_6.3V6M

22U_0805_6.3V6M

@

OPT@

PWR-VGA_CORE

PWR-VGA_CORE

PWR-VGA_CORE

Monday, November 17, 2014

Monday, November 17, 2014

Monday, November 17, 2014

22U_0805_6.3V6M

NC PC631 for cost down

Yoga3-BDW

Yoga3-BDW

Yoga3-BDW

1

42 44

42 44

42 44

1.0

1.0

1.0

5

D D

12

PR703

PR716

12

PC713

1000P_0402_50V7K

PH701

220K_0402_5%_ERTJ0EV224J

PR709

1K_0402_1%

PC707

10P_0402_50V8J

1 2

PC710

1 2

2200P_0402_50V7K

75K_0402_1%

1 2

Place close to
phase 1 inductir

C C

B B

PR712 change to 25.5K_0402_1% SD03425528J for 28W CPU
PR710 change to 30.9K_0402_1% SD03430928J for 28W CPU

PC706

390P_0402_50V7K

PR713

49.9_0402_1%

1 2

PR718

1K_0402_1%

1 2

1 2

5.11K_0402_1%

1 2

CPU_VSS_SENSE12

CPU_VCC_SENSE10

+5VS

+1.05VS

165K_0402_1%

1 2

CPU_B+

1 2

12

PC708

0.01U_0402_25V7K

PR721

1 2

0_0402_5%

1 2

PC714

2200P_0402_50V7K

1 2

PR724

2_0603_5%

PC716

4

PR702

PC701

220P_0402_50V7K

PR715

1 2

30.1K_0402_1%

PC711

470P_0402_50V8-J

@

CPU_VR_ON10

1 2

VR_HOT#29

2.2U_0603_10V7K

3

PR701

130K_0603_1%

1 2

SW3

28W@

PR704

130K_0603_1%

1 2

PC702
220P_0402_50V7K

1 2

1 2

PC704

1 2

CSREF 44

1000P_0402_50V7K

CSP3

CSP2

CSSUM

26

CSSUM

CSCOMP

ENABLE1VR_HOT#2SDIO

VR_HOT#_1

CSP1

24

25

19

22

21

23

20

BST3

CSP3

CSP1

CSP2

DRON

CSREF

PWM2/IMAX

PGND

ROSC7SCLK

VR_RDY

TSENSE

PS1_PH

ALERT#

3

4

5

6

8

9

TSENSE

VR_RDY

CPU_SVID_DAT

CPU_SVID_ALERT#

CPU_SVID_CLK

PR728

32.4K_0402_1%

1 2

VR_IMVP_IMON29

CSCOMP

PR711

12

0_0402_5%

1 2

PR712

20.5K_0402_1%

15W@

12

VSN_2

0_0402_5%

1 2

1 2

0_0402_5%

PR727

28
29
30
31
32
33
34
35
36

37

PR726

ILIM
IOUT
VRMP
COMP
FB
DIFFOUT
VSN
VSP
VCC

GND

27

SW1

+5VS

12

15W@

PR710

1 2

25.5K_0402_1%

15W@

PU701
NCP81108MNTXG_QFN36_5X5

18

HG3

17

SW3

16

LG3

15

PVCC

14
13

LG1

12

SW1

11

HG1

10

BST1

PR725

45.3K_0402_1%

1 2

PC717
.1U_0402_16V7K

1 2

+5VS

12

PR738

0_0402_5%

PR714

0_0402_5%

PR717

2.2_0603_5%

1 2

HG3 44

LG3 44

LG1 44

HG1 44

PR722

2.2_0603_5%

1 2

TSENSE

CSREF

CSP3 SW3

CSREF

CSP1 SW1

PC709

0.22U_0402_10V6K

1 2

PC712

1 2

2.2U_0603_10V7K

PC715

0.22U_0402_10V6K

1 2

28W@

2

12

PR705

PC703

1 2

0.047U_0402_16V7K

12

PC705

1 2

0.047U_0402_16V7K

PR719

0_0402_5%

1 2

20K_0402_1%

@

PR707

@

20K_0402_1%

SW3 44

SW1 44

PR706

2K_0402_1%

28W@

PR708

2K_0402_1%

+5VS

12

12

1

12

12

PC718
.1U_0402_16V7K

1 2

PR734

PR733

PR730

75_0402_1%

A A

CPU_SVID_DAT10

CPU_SVID_ALERT#10

CPU_SVID_CLK10

5

130_0402_1%

54.9_0402_1%

1 2

1 2

1 2

@

CPU_SVID_DAT

CPU_SVID_ALERT#

CPU_SVID_CLK

4

PR731

VR_CPU_PWROK10,29

@

PR732

10K_0402_5%

0_0402_5%

1 2

+3VS

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2012/07/01

2012/07/01

2012/07/01

PH702

PR729

13K_0402_1%

1 2

<BOM Structure>

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

100K_0402_1%_TSM0B104F4251RZ

Deciphered Date

Deciphered Date

Deciphered Date

Place close to
phase 1 MOSFET

2

2014/07/01

2014/07/01

2014/07/01

Title

Title

Title

CPU_CORE

CPU_CORE

CPU_CORE

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Monday, November 17, 2014

Monday, November 17, 2014

Monday, November 17, 2014

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

43 45

43 45

43 45

1.0

1.0

1.0

5

D D

4

3

2

1

CPU_B+

5

PQ801

PR801

2.2_0603_1%

12

HG143

SW143

LG143

C C

PR804

2.2_0603_1%

HG343

SW343

LG343

B B

28W@

12

4

AON6414AL_DFN8-5

321

12

PQ802

AON6554_DFN

4

123 5

5

PQ803

4

AON6414AL_DFN8-5

321

28W@

PQ804

AON6554_DFN

4

28W@

123 5

12

28W@

SNUB_CPU1

12

12

PC815

PC814

10U_0805_25V6K

28W@

12

PC801

0.1U_0402_25V6K

@

1 2

0.22UH_SPS-06CZ-R22M-V1_23A_20%

PR802

2.2_0805_5%

@

PC806
1000P_0402_50V9-J

@

1

12

+

PC817

PC816

10U_0805_25V6K

2

0.1U_0402_25V6K

@

@

47U_B2_10V_R70M

12

SNUB_CPU3

12

1 2

0.22UH_SPS-06CZ-R22M-V1_23A_20%

PR805

2.2_0805_5%

@

PC825
1000P_0402_50V9-J

@

PL801

12

PL802

28W@

PC802

10U_0805_25V6K

CPU_B+

12

PC803

PR803
10_0402_1%

10U_0805_25V6K

12

PR806

10_0402_1%

28W@

12

CSREF 43

+CPU_CORE

CSREF

PJ801

2

112

JUMP_43X118@

B+

+CPU_CORE

+CPU_CORE

40A

PC808

22U_0603_6.3V6-M

12

PC820

PC827

22U_0805_6.3V6M

@

12

12

PC809

22U_0603_6.3V6-M

12

PC821

22U_0603_6.3V6-M

22U_0603_6.3V6-M

12

PC828

22U_0805_6.3V6M

28W@

8/15: NC PC819

12

12

PC810

22U_0603_6.3V6-M

28W@

12

PC822

22U_0603_6.3V6-M

12

12

PC829

22U_0603_6.3V6-M

12

PC812

PC823

22U_0805_6.3V6M

22U_0603_6.3V6-M

PC813

22U_0603_6.3V6-M

1

+

PC824
220U_D2_2.5VY_R6M

2 3



PC823

22U_0603_6.3V6-M



PC826



PC827 for cost down.

PC811

22U_0603_6.3V6-M

12

@

PC830

12

12

PC807

22U_0603_6.3V6-M

12

PC819

22U_0805_6.3V6M

@

28W@

12

12

PC826

22U_0805_6.3V6M

@

12

12

PC831

22U_0603_6.3V6-M

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

12

PC832

22U_0603_6.3V6-M

2012/07/01

2012/07/01

2012/07/01

12

PC833

12

PC834

PC835

22U_0805_6.3V6M

22U_0603_6.3V6-M

28W@

28W@

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

22U_0805_6.3V6M

Title

Title

2014/07/01

2014/07/01

2014/07/01

2

Title

CPU_CORE

CPU_CORE

CPU_CORE

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Monday, November 17, 2014

Monday, November 17, 2014

Monday, November 17, 2014

Date: Sheet of

Date: Sheet of

Date: Sheet of

Yoga3-BDW

Yoga3-BDW

Yoga3-BDW

1

44 45

44 45

44 45

1.0

1.0

1.0

5

FD5

FD3

FD1

D D

FD2

1

1

FD4

1

1

FD6

0801 DFB

1

󳳑󱈓󰮁

1

PAD_CT6P0B7P0D3P6

H1
HOLEA

1

PAD_CT6P0B7P0D3P6

H12
HOLEA

1

PAD_CT6P0B7P0D3P6

H14
HOLEA

1

PAD_CT6P0B7P0D3P6

H15
HOLEA

1

PAD_CT6P0B7P0D3P6

H16
HOLEA

PAD_CT6P0B7P0D3P6

4

3

2

1

PAD_CT6P0

H2
HOLEA

1

1

PAD_CT6P0

H4
HOLEA

1

PAD_CT6P0

H5
HOLEA

1

PAD_CT6P0

PAD_C7P0D4P3

H3
HOLEA

1

PAD_C7P0D4P3

H6
HOLEA

1

PAD_C7P0D4P3

H10
HOLEA

1

PAD_C7P0D4P3

PAD_RT4P0X2P0

H18
HOLEA

1

PAD_RT4P0X2P0

H19
HOLEA

1

PAD_RT4P0X2P0

PAD_C7P0D5P6

H11
HOLEA

1

PAD_C7P0D5P6

PAD_C7P0D2P3

H7

C C

HOLEA

1

PAD_C7P0D2P3

PAD_ShapeT6P0X5P5

H20
HOLEA

1

PAD_ShapeT6P0X5P5

B B

H9
HOLEA

1

PAD_C7P0D2P3

H13
HOLEA

1

PAD_C7P0D2P3

H17
HOLEA

1

PAD_C7P0D2P3

PAD_O2P7X2P2D2P7X2P2N

H21
HOLEA

1

PAD_O2P7X2P2D2P7X2P2N

PAD_C2P2D2P2N

H22
HOLEA

1

PAD_C2P2D2P2N

A A

Title

Title

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2014/01/11

2014/01/11

2014/01/11

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2013/11/08

2013/11/08

2013/11/08

Title

Screw and Hole

Screw and Hole

Screw and Hole

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

Haydn

Haydn

Haydn

Monday, November 17, 2014

Monday, November 17, 2014

Monday, November 17, 2014

34 45

34 45

1

34 45

1.0

1.0

1.0

5

4/16:

1.EDP connector change to 40 pin , touch connector change to 10pin .

2.G sensor change to BMA222E

3.Modify DIMM connector pin define

4/24:

1.CV112 change to 0.1uF follow DG.

4/28:

1.unstuff pull up pull down resistor for GPU CMD signal (Single rank no need)

2. Reserve pull down resistor for signal OVERT#

D D

3.reserve pull up resistor for signal MULTI_STRAP_REF0_GND

4/29:

1.use buffer for signal CPU_DRAMPG_CNTL

5/4:

1.Delete N15VGM@ part for Haydn only support N16S-GT.

5/6:

1.VR_ADP_ID change to USB_ID_N

2.EC_ADP_ID_ON# change to DCIN_USB_EN

3.Delete GPU CMD signal pull up/pull down resistor

4.update EC to LQFP package
.

5/8:

1. Change YC1,YE1 to 32.768KHZ_12.5PF_200458-PG14

2. Stuff QV7 for GPU +1.05V power

3.Add one BJT on thermal sensor for GPU&VRAM

4. Change YC1 to 32.768KHZ_12.5PF_202740-PG14

5/9:

1. modify HDMI DATA signal connection .

2. renaming GPU command signal

C C

3.mount RC762, unmount DC27 for cost down .

5/11:

1.Change UE1 to IT8386E-192-CX_LQFP128 for cost down

2.Change YC2 to 24MHZ_6PF_7V24000032 for cost down

3.Change D4,D5,D6,D13 to ESD9N5BL-2-TR_DFN1006-2 for cost down

5/12:

1.Change JWLAN to LCN_DAN05-67146-0102

2.Delete JRTC.

3.Change CC130 to SE00000PL0J for cost down

4.Change D31,D32,D33 to AZ1045-04F for cost down

5/14:

1.Change R105 to 1K ohm.

2.Change CC44 to SGA00009900 for layout placement concern .

3.Change QV8,QV17,QV21 to 2N7002KDWH for layout placement concern .

5/15:

1.Change JFANC ,JFANS to 88231-04001 follow ME connector list .

4

5/29:

1.Reserve RV39 ,RV171 follow NVIDIA suggestion.

2.Modify JIO pin define ,add USB charger mode control signal .

0603:

1.Change JFANC ,JFANS to ACES_50208-00408-001 follow ME connector list .

2.Delete PCIE_WAKE#,PCH_ACIN...reserved pull up signal +3VL for layout concern.

3.Delete QV13 ,Change QV12,QV19 to 2N7002KDWH_SOT363-6 for layout concern.

0604:

1.Change JUSB30 to C-K_26211-8B19-02 follow ME connector list .

2.Change UG16 to NTSX2102GU8_XQFN8 for cost down.

3.Delete reserved component CC44 for layout concern.

4.update hole symbol.

0606:

1.Change HDMI part 0.1uF cap to 0402 size Follow DG.

2.Add reserved Caps for keyboard signal follow EMC suggestion.

3.Add reserved Caps for HDA signal follow EMC suggestion

0607:

1.Combine EC part resistor for bom quantity concern.

6/9:

1.Change JHDMI to AHRW0-AK1200 follow ME connector list .

2. Change JTP to 50505-00641-001 follow ME connector list .

3.Change JIO to ACES_51540-04041-001 follow ME connector list .

4. Change JWLAN to LOTES_APCI0062-P007A follow ME connector list .

6/10:

1.Modify JLVDS pin define.

2. Add signal ILIM_SEL for USB charger.

6/12:

1.Change LV2 to PBY100505T-300Y-N ,LV1 to PBY100505T-181Y-N For smaller size.

2.Reserve RTC_RST# schematic controlled by EC.

3.Modify EC pin define(Four signals.)

6/16:

1.Change button switch SW4000,SW4001,SW4002,SW4003,SW4004 to EVQP7L01K_4P.

6/17:

1.Change QV5

2.Change CV22,CC121,CC130,CC131, CV103, CV104, CV105 to SE00000M00J for layout concern.

6/18:

1.Modify GPU power on sequence .

2.Change CV111 to SE00000M00J ,CV60 to SE107475K0J for layout concern.

3.Add thermal protection schematic .

4.Change QC11,Q149 to SB00000XP0J for layout concern.

6/19:

1.Delete thermal protection schematic dummy components since no space to placement .

6/20:

1.Add C217,C218,C220,C224,C225,C226 For CLK signal cross moat concern .

2.Delete JCMOS1 ,add test point for signal RTC_RST#



QC13QC12QV10 to AO5804EL_SC89-6 for layout concern.

3

2

1

SIT

9/23:

1.Change JLVDS to I-PEX_20374-040E-31 follow ME suggestion.

2.Change some power plane from +3VALW to +3VALW_PCH.

3.Mount D13 follow emc suggestion.

9/24:

1.Reserve CC31 and CC32 For EMC.

9/25:

1.Mount RE254 ,CE339 For EMC.

2.Change RE22 , RE23 ,RC62 ,RC81 ,RC85 ,R909 ,R223,R224 to R short.

3.Change L69,L70 to EXC24CH900U for cost down

10/13:

1.Change CC23,CC24 to 3.3pF for RTC Time test fail in windows.

11/11:

1.Change CE339 to 18pF for HSW platform LPC CLK fall slew rate test fail issue.

11/13:

1.Change R2,R22,R5,R13,RG20,R26,RC107,RC122,RC124,RE214,RE215,RE216 to R short for cost down.

2. Mount RE50,QE3,Q23,R11,R238,C441 for clear CMOS.

3.Change JWLAN to DEREN_40-42313-06742RHFL follow ME request.

4.Change JUSB30 to DEREN_40-42039-00901RHF-L Follow ME request.

5/19:

1.Touch Pad change to I2C interface.

B B

2.Haydn support two FAN ,connect the two FAN signal to EC .

3.Delete one debug connector JDB3.

4.delete deep S3 schematic part .

5.Modify KB pin define .

5/20:

1.Move lid_pad# part schematic to USB DB .

5/21:

1.Change D34 to AZ1045-04F_DFN2510P10E-10-9 follow EMC suggestion .

2.Change D7,D8,D9,D10 to AZ5425-01F follow EMC suggestion .

3.Delete SPI rom power control part schematic since not support DS3 now .

4.Touch screen part function use the same connector with EDP .

5/22:

1.Use cost down solution for signal CPU_DRAMPG_CNTL follow G .

2.Change U56 to APL3523AQBI-TRG for cost down.

3.Change JKB to ACES_50506-0260M-001 follow ME connector list .

5/26:

1.Change DV5,DV6 to BAT54AW_SOT323-3 for cost down.

2. Reserve JRTC

3. modify JLVDS pin define .

4.Delete reserved components QV24,QV25 ,DV5 for signal VGA_PWRGD

A A

5/27:

1.Reserve CC110 for signal +1.05VS_DCPSUS4

2.Change JKB to ACES_50519-02601-001 follow ME connector list .

3. Change JTP to ACES_50503-0060N-001 follow ME connector list .

4. Delete WLAN AOAC part schematic .

5. Swap VRAM data group 2 ,group3 and Swap VRAM data group 6 ,group7 for layout routing concern .

5/28:

1.Reserve USB3.0 signal that connected to JIO.

2.Reserve R873,R874 for the possibility to cost down I2C redriver.

3.Change QV10,QV13 to 2N7002KDWH for layout placement concern .

4.Swap VRAM data group 4 ,group6 for layout routing concern .

5.Change RPC10 to RPC10 and RPC21 for layout concern.

5

4

SIV

7/21:

1.Delete CG380 For CG380/CG381 function repetition

2.Delete RV70,RV61 +1.35VGS/+1.05VGS Mosfet control signals power level change

3.Change CV54 from 0.1uf to 0.01ufRV228 from 560ohm to 0ohmCV506 from 0.1uf to 0.22uf for GPU power sequence change

4.Change touch pad to SMBUS solution.

7/29:

1.Delete QC5 (not connect to PCH)

2.Change RE218 from 0ohm to 100ohm for EC_RSMRST# overshot/undershot fail

3.Add CC50 0.01uf for VCCST_PG_EC_R undershot fail

4.Change RC61 from 0ohm to 100ohm for SYS_PWROK overshot/undershot fail

5.Change CC23,CC24 to 2.7pF ,CV19,CV20 to 12pF follow crystal vendor suggestion.

6.Change RE707 to 470K ,CC7 to 15pF follow crystal vendor suggestion.

08/05:

1.modfiy EC GPIO (EC_ON)

08/07:

1.JLVDS rotate 180 degree

08/11:

1.Change 0 ohm resistor(RC65,R184,RE188,R351,RC761,RD16,RD22
RC138,RE202,RE217,RC31,R109,R113,R114,RC758,RC759,RC105RC103,RC99) to jump

2. NO stuff CE6 ,CD88

08/11:

1.Mount RA27 ,CA25 Follow EMC suggestion.

2. Change JIO to HRS_FH52E-40S-0P5SH follow ME suggestion.

3.Change JSATA to ELCO_006809610010846 follow ME suggestion.

3



RE32RC97R110R125,R121,R126

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

2014/01/11

2014/01/11

2014/01/11

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2013/11/08

2013/11/08

2013/11/08

Title

Title

Title

HW_Change_List

HW_Change_List

HW_Change_List

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

Yoga3-BDW

Yoga3-BDW

Yoga3-BDW

Monday, November 17, 2014

Monday, November 17, 2014

Monday, November 17, 2014

35 45

35 45

1

35 45

1.0

1.0

1.0