Keithley 440 Service manual
INSTRUCTION MANUAL
MODEL 440
DIGITAL PICOAMMETER
INSTRUCTION MANUAL
MODEL 440
DIGITAL PICOAMMETER
0 COPYRIGHT 1974
: . ,. - :
.I
CONTENTS
Section
Psq:e
SpEClFIC*TIfJNS -___--__-___-____-__---------------------------- i"
1. GENEp&, DESCRIPTION --_-____------_-------------------------
2. OPWTlON --------------------__________I_________---------------
3. Cl&-"lT DESCRIPTpJX --------------------______I_____________---
‘. *C(-ESSORlES -__------------------_----------I--------------------------
5, CUp,UTION __-____----____----____________________I__------------
lj. F\EP,dCEBLE pa?s ----------------------------------------------------
SCHyJJICS -__--___-_---_-----_-----------------------------
10
25
27
32
53
1
3
i.
MODEL 440
ILLUSTRATIONS
Fip. NO.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
Franc Panel.
Franc Panel Controls.
Rear Panel CmlfTOlS and Terminals.
Prinrer/Canerol Connector.
Timing Diagram.
Simplified Diagram of Feedback Ammeter.
Gain Calibration of Amplifier.
Damping for Anmeter.
Zero Check Operarion.
Block Diagram of AID Converter.
Delay Hold Circuit.
Incegratar Circuit.
Zero Crossing Decxtar.
"ode1 4401 Buffer Stage.
Chassis Top View, Showing Cal. Adjustments.
Title Page
lb Location of Printed Circuit Boards. 18
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
Component Layout, K-207.
componenr layout, PC-208.
component Layour, PC-210.
Componene Layout, PC-217.
component Layout, PC-219.
component Layout, PC-222.
Componenr Layour, PC-223.
Componenf Layout, PC-229.
component I.ayouc, PC-209.
component Layout, PC-218.
Test Equipment Set-up far A/D Calibration.
AID Con~erfer Zero Adjusrmenrs.
Elechanical Assembly.
Template, Test Cover, Tap
Ternplace. Tesf cover, Bottom
1
2
2
8
9
10
10
11
11
12
13
13
13
15
17
19
19
21
20
20
23
23
23
24
24
30
31
33
51
52
0874
iii
SPKIFICATIOX
XODEL 440
SPECIFICATIONS
RANGE: 100 picoamperes full scale (0.1 picoampere.
least signdicant digIt) to 10 milliamperes in nine
decade ranges with 100% overrangingonall ranges.
DISPLAY: Four digits tram 000 to 1999; polarity and
overload indicabon.
POLARITY SELECTION: Automatic.
RANGE SELECTION: Manual with automatic decimal
point positmn,ng.
ACCURACY AND RESPONSE TIME:
DAMPING: Varies rise time from minimum value to
approximately 1 second on the lOO.nanoampere to
100.picoampere ranges.
ZERO DRIFT: Less than 0.5% of full Scale per week:
less than O.O54a/“C. after %-hour warmup with
source voltages greater than 2 volts.
DISPLAY RATE: 24 readings per second maximum
(20 per second with 50.M units) adjustable to
approximately two readings per manute.
INPUT VOLTAGE DROP: Less than 1 millivolt for lull.
scale display on all ranges when properly zeroed.
LINE FREQUENCY REJECTION: 60 dB (ratio of peak-
to-peak current of power line frequency or mul*lple
which will cause less than 1 digit of error. to that
error,. 100 dB on 100.p,coampere to 100.“ano.
ampere ranges with mawmum damping. Peak input
current should not exceed 20 milliamperes.
MAXIMUM INPUT OVERLOAD:
Transient: 1000 volts for up to 3 seconds.
Continuous: 600 V using a Keithley or other current
limited (up to 20 mA) Hugh Voltage Supply.
ANALOG OUTPUT: % 1 volt from a 500.ohm sourcefor
full~scale display. Maximum output, 1 millismpere.
Output polanty 3s oppxite input polarity.
PRINTER OUTPUTS AND OUTPUT CONTROLS: Model
4401 accessory provides BCD OUtput and external
cmtrois.
CONNECTORS: Input: Teflon-insulated UHF-type. Ana.
log output: Amphenol 8O.PCZF. Case ground: Bind.
,ng post.
POWER: 105.125 or 210-250 volts (switch selected).
60 Hr. 50.Hz models available. 30 watts.
DIMENSIONS, WEIGHT: 51,‘~” high x 19” wide x 10”
deep: “et weight. 15 pounds.
I
iv
- . _.
t
0874
Safety Precautions
The following safely precautions should be observed before using
this product and any associated instrumentation. Although some iw
strume”f~ and accessoties would normally be used with non-ha/ardous voltages, there are situarions where hazardous conditions
may be present.
This product is intended for use by qualified personnel who recog-
nize shock hazards and arc familiar with the safely prccaurions re-
quired to avoid possible injury Read the operating information
carefully before using rhe product.
The types of product users are:
Responsible
and maintenance of equipment, for ensuring that the equipment is
operated within its specifications and operating limits. and lor ens
swing that operators are adequately trained.
Operators use the product for its intended funcrion. They must be
trained in electrical safety procedures and proper use of the insrru-
ment. They must be protected from electric shock and contact with
hazardous live circuits.
Maintenancepersonnelperform routine procedures on the product
to keep it operating. for example, setting the line voltage or replac-
ing consumable materials. Maintenance procedures are described in
the manual. The procedures explicitly state if the operator may per-
form them. Otherwise, they should be performed only by service
personnel.
Service
safe installations and repairs of products. Only properly trained service personnel may perform installation and service procedures.
body is the individual or group responsible for the use
personnel are
trained to work on live circuits, and perform
Users of this producl muzl bc protected from elcclnc hhock a, nil
times. The responsible body musk enwrc Ihal users arc prcvenied
access andhr insulawd from every connection poini. In some cw5s.
~onneckms mw be expored to potential human contact. Producl
users in these circumslances must be trained to protect thanselves
from the risk of elearic shock. If the circuit is capable of operating
at or abwe 1000 volts. no conductive
exposed.
As described in the lnternaiional Electrorcchmcal Commissmn
(EC) Standard IEC 664, dtgiral muldmcler measuring cmam
(e.g.. Keithicy Mod& 175A. 199. 2000, 2001, 2002, and 2010~ arc
Installation Category II. All other inwuments agnai rcrminals are
lnsraliation Category I and mw no1 be connccxd 10 mani
Donotconnect switchingcards directly to unlimited powcrcircults,
They are intended to be used with impedance limited sources,
NEVER connect switching cards directly to AC mains. When cons
netting sources to switching cards, install prorective dcwces to llmit fault current and vollage to the card.
Before operating an instrument. make sure the line cord is connecred to a properly grounded power recepraclc. Inspea the connecring
cables, test leads. and jumpers for possible war. cracks, or breaks
before each use.
For maximum safety, do not touch lbe product. iest cables. or any
other instruments while power is appiicd to rhe circuit under [es!
ALWAYS remove power from the entire lesl system and discharge
my capacitors before: conneaing or disconnecrmg cables or jumpus. installing or removing switching cards. or making internal
changes. such as installing or removing jumpers.
part
of the circuit may be
Exercise extreme caution when a shock hazard is present. Lethal
voltage may be present on cable connector jacks or test fixtures. The
American National Standards Institute (ANSI) states that a shock
hazard exists when voltage levels greater than 30V RMS. 42.4V
peak,
or 60VDC are
present.
A good safety practice is to expect
that hazardous voltage is present in any unknown circuit before
measuring.
Do nor touch any
common side of the circuit under test or power line (earth) ground.
Always make measurements with dry hands while standing on a
dry, insulated surface capable of withstanding the voltage being
measured.
ObJecr
that could provide a conem path to Ihc
The instrument and accessories must be used in accordance with its
specifications and operating instructions or the safety of the equipment may be impaired.
The WARNING heading in a manual explains dangers that might
result in personal injury or death. Always read the associated informaflon very carefully before performing the indicated procedure.
Do not exceed the maxjmum signal levels of the instruments and accessories, as defined in the specifications and operating information, and as shown on the instrument or test fixture panels, or
switching card.
When fuses are used in a product, replace with same type and rating
for continued protection against fire hazard.
Chassis connections must only be used as shield connections for
measuting circuits, NOT as safety earth ground connections.
If you are using a test fixture, keep the lid closed while power is applied to the device under test. Safe operation requires the use of a
lid interlock.
Ifa@ SCI~W is present, connect il to safety earth ground using the
wire recommended in the user documentation.
Then
symbol on an instrumenr indicates that the user should re-
fer to the operating instructions located in the manual.
Then
symbol on an instrument shows that it can source or measure 1000 volts or more, including the combined effect of normal
and common mode voltages. Use standard safety precautions to
avoid personal contact with these voltages.
The CAUTION heading in a manual explains hazards that could
damage the instrument. Such damage may invalidate the warranty.
Instrumentation and accessories shall not be connected to humans.
Before performing any maintenance, disconnect the line cord and
all test cables.
To maintain protection from electric shock and fire, replacement
components m mains circuits. including the power transformer, test
leads, and input jacks, must be purchased from Keirhley Instrumerits. Standard fuses, with applicable national safety approvals,
may be used if the rating and type are the same. Other components
that are not safety related may be purchased from other suppliers as
long as they are equivalent to the original component. (Note that selected pans should he purchased only through Keithley Instruments
to maintain accuracy and functionality of the product.) If you are
unsure about the applicability of a replacement component, call a
Keirhley Instruments office for information.
To clean an instrument, use a damp cloth or mild, wafer based
cleaner Clean the exterior of the instrument only. Do not apply
cleaner directly to the instrument or allow liquids IO enter or spill
on the instrument. Products that consist of a circuit board with no
case or chassis (e.g., data acquisition board ior installation into a
computer) should never require cleaning if handled according to instructions. If the board becomes contaminated and operation is affected, the board should be returned to the factory for proper
cleaning/servicing.
Rev. 2J99
MODEL 440
SECTION 1.
GENERAL DESCRIPTION
Cancrol
RANGE Switch (S1202)
POWER SWifCh (S102)
ZERO CHECK (SL201)
ZERO ADJUST (R1211)
D.424PINC conrro1 (R1221)
DISPLAY RATE (R1201)
0874
Functional Description Paragraph
Sees full range sensitiviq.
Controls power to
instrument.
Selects Zero Check Mode.
Adjusts the zero offset.
Adjusts damping.
Adjusts the
A/D Conversion rate.
2-3 a
2-l b
2-3 c
2-3 e
2-l d
2-l f
1
GENERAL 0ESCR1PT10N
MODEL 440
POWER
Suicch
s102
DISPLAY RATE
Switch S1203
RANGE
Switch
DAMPING
ZERO Gl-0”“d
Switch concro1
51203
It1211
ZERO CHECK
POS e
51211
INPOT
Receptacle
n210
Control or Terminal
I
117-234V Swirch (SlOl)
FUSE (FlOl)
ANALOG OLTPVI (51213)
FRI>lTEI(/CONTKOL (31212)
S?.uE
2
FIGURE 3.
Rear Panel Controls and Terminals.
TABLE 1-2.
Rear Panel.
Functional Description
set* 117 or 234V operation.
Type
3AG
Slow Blow: 117V-3fSA
234V-3/16A
Provides a recorder ourput.
Provides SCD Ourputs from a 50-pin connector.
Cover plate for mounting a" additional SO-
pin Connector.
Paragraph
2-5
2-6
2-6
“ODE‘ 440
OPERATION
SECTION 2.
2-l. INPM CONNECTIONS.
Inp,,t Rece,,w.cle. The Input connecfor (51210)
a.
is a Teflon-insulated UHF t.,w (Keithlev Part No. CS-
64). A mating (CS-49) conniCtor is supblied far mak-
ing
custom cables. The center terminal of
tor is in the Input High terminal while the outer
shield is case ground.
A separate grounding past “6”
is provided for system ground connections.
b. IDPUC Cables.
Input connections should be made
using coaxial cables which are low-noise types with
graphite coaring beeween dielectric and
Far eu~eom length
cables Keithley Part No. SC-9 Low
Noise Coaxial Cable should be used.
1. Model 2611 Coaxial Cable. This cable is a
pre-assembled cable 24 inches long having a IMF male
connector on each end.
2. Part No. 19072C
cable is a pre-assembled cable 30
a UHF male connecmr an one
Coaxial Test Cable. This
inches long having
end
with alligator clips
on the ocher.
C. Insulaeio”.
Use high
resisrance, low-loss mafe-
rials such as sapphire, reflan, polyethylene or poly-
scyrene for insulation of the input circuit.
NOTE
The input terminal should be protected from con-
raminacion $0 chat the insulation will not be
degraded,
Clean, dry connections and cables are
very important to maincain the value of all in-
sulation materials.
Even the best insulation
can be compromised by due, dirt, solder flux,
films of oil or water vapor. A good cleaning
agent is methyl alcohol,
which dissolves most
comon dirt without chemically atracking the
insulation.
the connec-
shield braid.
OPERATION
1. Thermal EMUS. ThemaeLectric potentials
(thermal
between
can often be large compared to the signal to
measured. To minimize the drift caused by therma!
emfs, use pure copper leads “herever possible in
the source circuit.
mainmining constant junction temperatures espec-
ially by using a large hear sink near the connec-
tions.
mal Connection Kit contains ali necessary materials
far making very low rhemal copper crimp connections
far minimizing Chermal effects.
2. AC Electric Fields. The presence of electric
fields generated by paver lines or ocher sources
can have an effect on instrument operacion. AC
voltages which are very large with respect co the
full-scale range sensitivity could drive the ac
amplifier into sacuracion, thus producing an erroneous dc output. Proper shielding as described in
paragraph 2-1, d can minimize noise picl-up when
the instrument is in the presence of large ac fields
or when very sensitive measurements are being made.
3. Magnetic Fields.
neck fields can be a potential source of ac noise.
Magnetic flux lines which CUL a conductor can produce large ac noise especially at power line fre-
quencies. The voltage induced due co magnetic flux
is prnpor~ional co ehe area enclosed by the circuit
as well as the rate of change of magnetic flux. For
example, the motion of a l-inch diameter loop in the
earth’s magnetic field will induce a signal of sev-
era1 tenths of a microvolt. One way to minimize
magneric pickup is to arrange all wiring so that the
loop area enclosed is as small as possible (such as
rwiscing input leads). A second way to minimize
magnetic pickup is co use shielding as described in
paragraph 2-1, b.
emfs)
are generated
by thermal gradients
two junctions of dissimilar metals. These
be
Drift can also
The Keifhley accessory Model 1483 Lou Ther-
be minimized by
The presence of scrang nag-
2-2. MEAS”RENENT CONSloEiWTIONS
a. Noise. The limit of resolurion in voltage and
current measuremen?.s is determined largely by rhe
noise penerared in rhe source. stray law-level noise
is presene in some form in nearly all electrical cir-
cuirs. The instrumenr does nor distinguish between
stray and signal currents since it measures the net
current. When using the picoampere ranges, consider
the presence of low-level electrical phenomena such
as thermocouples (thermoelectric effete), flexing of
coaxial cables (triboelecrric effect), apparent re-
sidual charges on capacitors (die-leccric absorption),
and baCCery action of two terminals (galvanic action).
0874
b.
ShieldinK.
1.‘ Electric Fields. Shielding is usually neces-
sary’when the
instrumnt is in
the presence
of very
large ac fields or when very sensitive measurements
are being made.
cuit and leads
a~ only one point. This provides a “tree”
The shields of the measurement cir-
should be connected together co ground
config-
uration, which minimizes ground loops.
2. Magnetic Fields. Magnetic shielding is useful
where very large magnetic fields are present. Shield-
ing, which is
or
cables,
cuir,,
the
available in the farm
of plates. foil
can be used to shield the measuring cir-
lead wires, or the instrmenr itself.
3
OPERATION
MODEL 440
Damping. The amount of high frequency ooise
C.
which will be observed on the picoammerer is determined by:
I) the noise pickup ae the input, and 2)
the bandwidth of the amplifier circuir. The front
panel DAMPING Confrol (R1221) controls the amount of
filtering from a minimum (NW) value (as stated in
the rise time specification) fo a maximum value
(approximately 1 second on PICOAMP range) when see
fully clockwise.
d.
Accuracy.
The accuracy is specified in terme
of a percent of reading on eech range. An additional
fl digit is specified since the A/D conversion has an
&herenc +I digir uncertainty. Noise and source re-
sistance conditions should be evaluated as additional
measurement considerations.
e. Source Resistance.
The value of source resisfante em affect the measurement if the loading effect
of the picoammecer is significant. To avoid a degradation of zero drift. rhe picoammeter range should be
selected so that the range feedback resistor is much
less than the source resistance. The zero drift
specification is valid only for source voltages greacer than 2 volts. The suggested minimum source resiscante for each range is given in Table 2-l. The amounf
of degradation of the drift specification is given by
the following equation.
Drift =
%/week x Nominal Gain =
Effective Gain
where Nominal Gain = K
Effective Gain = (w)(q
f. Overloads. A unique input circuit provides
complete overload protection with fast recovery. The
maximum transiene overload is 1000 voles for up co
3 seconds.
The maximum continuous overload is 600
volts using a current limited supply (up to 20 mA)
such as Keichley Models 240A, 245, or 246.
2-3. FRONT PANEL CONTROLS.
a.
RANGE Switch (51202). This switch selects the
full scale displsy range in nine decade steps. The
dial is designated in engineering units, that is,
PICO AMPS, NAN0 AMPS, MICRO AMPS, and MILL1 AMPS.
b. POWER Switch (SlOZ). This swirch controls the
line power to the instrument.
C.
OPERATE/ZERO CHECK Swifch (51201). This swirch
selects either normal operation or zero check operation.
d. DAMPING Control (R1221). This control varies
the response time of the picoanrmeter on the PICO AMP
and NAN0 AMP ranges.
e.
ZERO Control (R1211). This control adjusrs the
zero display.
The ZERO Control should be used when
in ZERO CHECK mode.
f. DISPIAY RATS Control (R1201). *his control adjusts the A/D converter conversion rate from 24 reedingslsec. (MAX) to 2 readingslmin (appron).
Example: If RANGE =
RF =
RS =
Then
Rs I' RF = 3 = 1.5
RS
TABLE 2-l.
Suggested Minimum Source Resistances.
RANGE
Selected
100 PICO-AMPS
1
NANO-AMP
10 NANO-AMPS
100 t&NO-AMPS
1 MICRO-AMP
10 MICRO-AMPS
100 MICRO-AMPS
1
MILLI-AMP
10
MILLI-AMPS 105
Resistance (ohms)
1010
109
108
107
1.02 x 106
1.05 x 105
1.05 x 104
1050
RANGE
1 NICROAMP
1.02 x 106
2 x 106
-i-
Source Resistance
2 x 1010
2 x 109
2 x 108
2 x 107
2 x 106
2 x 105
2 x 104
2 x 103
2 x
102
2-4.
OPERATING PROCEDURE.
a. Preliminary Procedure.
1. Check the 117-234V Switch (SlOl) dit the rear
panel for proper line voltage.
2. Check for proper rated fuse.
3. Connecr the power cord, place the POWER switch
ON, and allow a 30 minure warmup for critical meas-
urements.
4. Adjust the ZERO Control (R1211) as necessary.
Zero is indicated by alternately flashing + polarity
lights.
5. Connect the source es described in paragraph
2-l.
b. Measurements. The Model 440 measures current
over a full-scale range from 10 milliamperes (10m2 A)
fo 10C1 picoampere (lo-10
picoarhpere (lo-l3 A).
A)
with resolution to 0.1
The display will indicate either
a positive or negative input current automatically.
(A positive curreot is defined as a positive "conveorional current" applied ac Input High with respect co
case ground.)
4
0874
1 x 10-4 A 100 MTCKO-AMPS 100.0
1 x m-3 A 1 +llLLIlAME 1.000
L I x lo-? h 10 MILLI-AMPS 10.00
2-5. ANALOG OUTPUT. The analog output on the rear
x 10-6
x 10-3
x 10-3
2-6. DIGITAL OUTPUT.
a. cenera1.
1. The Model 440 has provision for the installation of OUtpUt buffer printed circuit boards co
&rain Binary Coded Decimal (NO) outputs. Two 44pin card-edge cOn*eCeOrS are installed and completely wired on Che main PC board.
0874
CO”“eCrOr:
Model 440. “ueput mating connector supplied with
4401.
so-pin Amphenol xicro-Ribbon mounted on
Full Scale Magnitude. The magnitude of the
1.
reading is indicated by BCD outputs which correspond
to the three front panel display lights as shown in
Table 2-5.
TABLE 2-5.
Full Scale Magnitude
TABLE 2-7.
PolariCy Output
:onneccar
Pin No.
1
2
26
27
3
4
28
29
‘-
5
6
30
31
2. overrange Indicarian. Overrange is indicated
by the faurrh (from the right) display light and
corresponding BCO output as shown in ~ahle
Overload is indicated by a blanked display and
corresponding BCD output. The output at pi” 33
will he a logic “1” when the magnitude of ehe digital
display exceeds 1999.
Overrange and Overload Oucpurs.
OUCp”t Digits
1 x 100
2 x 100
4 Y 100
8 x 100
1 x 101
2 x 101
4 x 10’
a x 101
1 x 102
2 I 102
4 x 102
8 x 102
TABLE 2-6.
Dee ima 1
2-6.
~<mtx:c Indication (Exponent). The range or
4.
exponent has a corresponding BCD oufpue as shown in
Table 2-8.
ponent uses 2 coiumns to represent information far
exponents from 00 thr” 10.
CO”“eCCOC
Pin No.
9
10
34
35
The print-auf of the RANGE Swifch ex-
TABLE 2-8.
Range or Exponent Indication.
OUtpUt
1 x 100 Range
2 x 100 Range
4 x 100 Range
8 x 100 Range
Decimal
Digits
i
External cancro1.
d.
1. General. To obtain optimum *ystem p%ffbrm-
ante,
440 synchronously with other digital equipment,
such as printers, paper tape punches, computers and
other daea handling devices. The Model 440 with
4401 Printer Cards installed provides several printer control connnands for the purpose of synchronizing
external equipment to achieve maximum conversion
rates.
if is often desirable CO operate Che~Nodel
1
2
4
8
Polarify Indication. The polariey is indicated
3.
automatically by ehe Polarity Indicator and corresponding BCO output as shown in Table 2-7. Additional BCO levels are available at pins 14 and 39 for
use with some printers. The zero check made is indicaced by a BCD output from pin 38. Four pins may
be used to obcain BCD polarity codes for external
printers, where 1010 = + and 1011 = - prineer chsr-
acters.
6
2. Applications. Several alrernate approaches
may he used in designing the overall system control
scheme.
a) The Model 440 can be used to provide master
conerol of external devices so that the maximum
possible conversion race* can be obtained.
h) An external device can also he used for
master control such as a high speed printer.
c) A completely independent “master clock” can
be used for system control far maximum flexibiliry.
3. Description of external controls.
‘71OI.C 1”. This control inhibits A to D
=I
conversion at the instant a closure to ground is
made.
ly when the “HO:D 1” line is opened.
The conv’rsion cycle will resume immediate-
1. Standard Outpue Codes and Levels. The standard o rpue code for Hodel 4401 Printer Output Cards
is l-2-4-8 Binary Coded Decimal (BCD). A binary
coded decimal digit is represented by a four-bit
binary code as show,, in Table 2-12. refer to figure
for a circuit diagram oI the Model 4401 Stand=,rd
Prineer outpue buffer stage.
2. PKpmx/CONTROL connector. nie PKINTEK/CONTROL
Connector used o,, the Model 440 provides for connections to 50 pins as shown in Table z-11.
The mating
connecfor supplied with Model 4401 is an hmphcnoi
Part Number 57-,050o or Keithley Part Number cs-220.
available on special order.
3. Analog-fo-Digicai Conversion Cycle.
a) The analog-Co-digital conversion cycle can
be inifiafed in any one of three ways.
1.) DISPUY RATE concro1 set at MAX. With the
DISPLAY RATE Control set at MAX, the end of one
compleLe COnverSion triggers a second conversion
to obrain the maximum co”“ersio” rate of ZL read-
ings per
second.
2.) DISPLAY RATE ConLrol SeC at Other man EWY.
WiCh etle DISPLAY RATE Control set at soale psi-
tion other than MAX,
(uncalibrated control setting) the end of one complete conversion rriggers
a second conversion which is delayed by a speci-
fic time interval (DELAY). The time delay is a
funceio” of he position ai a continuously variable control to provide a co”“ersio” rate from
24 readings per second to 2 readings per minute.
5. Nigh and Low Keference. The PRINTEKICONTROL
connecror pro”ide* f”0 reference voltages, High
(t8”) and Low (+ZV). These levels may be used to
define the ‘~HICII” and “LOW” digital output states
1ar exeerna1 printing or computer devices.
Typical Digital Outputs.
Front Panel
Digital Display
RANGE Significant Range
Sefting Polarity
-093.6 PICO-AMP
+0.275 NANO-AMP
+ 0
-17.31 NAN”-AMP
c122.3 NANO-AMP
10.096 MICRO-AMP
+ 1
+ 0
-07.81 MICRO-AMP
+165.2 MICRO-AMP
+ 1
-L.921 MILLI-AMP
-06.17 MILLI-AMP
+(bk*k)
MICRO-AMP +
TABLE Z-10.
Digif & Overload
0
1
0
i
0
8 000 OS
3.) ‘HOLD 2” with TRIGGER Control. With the
“HOLD 2” command grounded, a ciosure to ground
of the “TRIGGER” command initiates one complete
conversion cycle. A second conversion viii
foilow only if the TRIGGER cormand is removed
and m-applied a second time. The maximum conversion rate using an external trigger is 24
readings per second.
Nag.
EXP.
936 -0.936 x
275 09 +0.275 x
731 08 -1.731 x
223 07 +1.223 x
096 06 to.096 Y
781 05 -0.781 x
652 04 hL.652 x
92, 03 -1.921 7.
637 02 -0.637 x
InrerprelJrio”
10‘10
ld
10-a
10-7
10-6
10-5
1V4
10-3
lo-*
positive overloac
0874
7
OPERAT‘ION
TABLE 2-11.
PRINTER/CONTROL Connector Pin Identification.
Pin No.
13
14
15
lb
17
18
19
20
output
1 x 100 Polarity
+ 15" _-_
Blank --_
ELIkInk ___
b 15" -__
+ 3.6V ---
Blank --Blank ---
Function Pin NO.
O"tp"r
38 1 x 10
39 + 15"
LO Blank
41 Blank
42 - 15"
43 Common
44 Grounded
45 Grounded
Funcrion
Zero Check
---
---
---
--__-
21
22
23
24
25
Blank --Blank ___
i lb" Pulse Print Command
+ av Hi Reference
/' 2v LO" Reference
L
FICURF. 4. Printer/Control Connector.
46 Grounded Trigger
47 Blank
48 Blank
49 Blank
50
Blank
___
---
---
--_
0:;;;
HOOEL 440
OPERATION
b) Conversion Cycle Timing. The Conversion
Cycle is composed Of three timing periods, namely.
Integrator zero, Integrator Sampling, and A-D
Counting period.
Refer to Timing Diagram Figure
1.) Integrator Zero Period (ZERO). “hen a
trigger pulse initiates a new conversion cycle,
the Inregracar circuit is zeroed for a period
not to exceed 8.33 milliseconds for 60 Hz aperation.
The Integrator Zero Period is 10.00
milliseconds for 50 Hz operarim.
2.) Integrator Sampling Period (INTEGRATE).
The Ineegraeor Sampling Period
follows automat--
ically the Integrator Zero Period and lasts for
a duration of 16.67 milliseconds for 60 Hz operation. The Integrator Sampling Period lasrs
for a duration of 20.00 milliseconds for 50 Hz
operation.
3.) A-D Counting Period (COUNT). The A-D
Gunring Period is initiated immediately follow-
ing the Integrator Sampling Period.
The actual
counring rime durarion vi11 depend on the actual
incegraror
pulses or 16.67 milliseconds. Following the
voltage up to a maximum of 2000
clock
counting period a Buffer/Storage cormand is
automatically generated in order to store the
new reading in the output registers.
4.) PRINT COMMAND. The PRINT COEPWNO signal
is used to trigger external printers or paper
tape punches. The PRINT CObDL\ND
signal
is de-
layed 10 microseconds to allow the Storage Reg-
isters to settle. The PRlNT COMMAND pulse
width
is approximately 100 microseconds with a I volt/
microsecond rise time into a 1 kilohm load. The
pulse smplitude is approximated by ehe follow-
ing equation:
= 14R/(R + 2200~
%
where R is the output load resistor.
The “OFF” state is less
ihan co.4 volt with
approximately 1 milliampere sink current.
NOTE
The data
stared in the Output Registers will not
change for at leasr 25 milliseconds for 60 Hz operation. If the front panel controls are
the Zero Check BCD o”tput vi11 be
changed only.
charmed.
0874
FIGURE 5.
Timing
Diagram.
9
CIRCUIT DESCRIPTION
MODEL 440
SECTION 3.
CIRCUIT DESCRIPTION
3-l. GENERAL. The Model 440 Digifal Picoamerer consisfs of two separate sections packaged together in
one chassis for optimum performance and convenience:
a sensitive picoammerer and an analog-to-digital converrer.
Picoameeer. The picoameter is a linear dc
a.
amplifier connected as a feedback ammeter with nine
CUrrent ranges.
b.
A/D
Converter. The analog-to-digital converter
is a dual slope, integrating type converrer with med-
ium conversion race. cold cathode readout tubes, BCD
output options and external control.
3-2. PICOAMMETER
a. Ooerarion. The picoamerer consists of a smsitive, linear dc amplifier with a 1 volt full scale
sensitiviey. The amplifier provides an analog output
up to 2 volts for*a 100% overrange display. The
RANGE resistors are connected across the feedback of
the amplifier.
A
simplified diagram of a feedback
anmeter is shown in Figure 6.
b. Circuitry. The amplifier input stage is a pair
of insulated-gate, field-effect transistors (IGFET)
designated Q1201 and Q1202 connected in a differential
configurarion. The circuit designared 218508 is a
special overload protection circuit on the Input FET
board (which connects to 51201). The gate of Q1201 is
connected;to the input through 10M ohms. The gate of
Q1202 is referenced to ground. Poteneiometer RI205 is
an internal COARSE ZERO adjusment.
Potentiometer
R1206 is an internal Balance control. Transistors
Q1203-Q1204 form a second differential amplifier stage.
Potentiometer R1211 is a fronr panel ZERO adjustment.
Transistor Q1205 and emitter follower transistor Q1206
provide sufficient gain for the analog output and
A/D
converter. The analog output is connected through
R614 (499n) fo the dc amplifier output (the junction
of R1220 and D1203).
The full scale current sensitiv-
ity is determined by ehe range resistor connected
across the feedback.
The range resistance RF is composed of a fixed resistance Rl plus a calibrarion adjustment resistance R2 as shown in Figure 7.
Potent-
iomerer Rl221 controls the amount of damping on rhe
PICO AMP and NAN0 AMP ranges only.
Switch S1203 defeats the damping feature when set to 'WIN" or open
position.
The damping circuir is shown in Figure 8.
When switch S1201 is ser fo ZERO CHECK the picoamerer
is connected as shown in Figure 9.
Ie should be noted
that the feedback resistor RF is shorted out & the
inpur High terminal is shorted to ground.
C-
NPUT
FIGURE 6.
10
Simplified Diagram of Feedback &meter.
GAIN
ADJ.
FIGURE 7. Gain Calibration of Amplifier.
OUTPUT
CIRCUIT DESCRIPTIOX
,,‘-.
m GROUND
3-4. ANALOG-TO-DIGITAL CONVERTER
a. General.
A
detailed block diagram of the A/D
DAMPING \;
CONTROL <
OPERATION.
co"ver~er is shown in Ffgure 10. The analog-to-digital
converter operates using a dual slope integration technique which has inherent line frequency noise rejection.
The analog signal is applied to the integrator for one
complete line frequency cycle.
The analog signal is
then removed from the integrator input. The voltage
on the integrator is then driven to zero fo complete
the voltage-co-rime conversion. The time interval to
reach a "Zero Crossing" is counted and displayed on
the "Readout" in proportion to the original analog
signal. The sequence is then repeated for a second
reading. A Timing Diagram is show in Figure 5.
b. Circoifs. The
AID Converter
is
composed
of nine
major circuits which perform the analog-to-digital conversions and provide various control commands.
1. Oscillator or Clock
2. BCD counter
3. Delay Hold
4. Program/Decoder
5. 1nregraror
6. Zero
7.
Crossing
!&rector
Buffer/Storage Register
8. Decoder/Driver
9. Numerical Readout
C. Oscillator or Clock. The Oscillaror produces
oulses at a rate of 120 kilohertz for Electrometer
using 60 Hz line power.
The 50 Hz "nice have a pulse
rate of 100 kilohertz.
d. BCD Counter. The BCD Counter counfs ?he
Clock
pulses with a roral range of 5000 counts. The Counter
is composed of 4 individual coyntere designated 1, 10,
100, and 1000.
cu.-,-
I
1
/-k!
GROUNC
1. The "l", "lO", and "100" coun?ers have a ca-
pacity of ten counts each.
2.
The "1000" counter has a capacity of five
cooncs.
3. The tocal capacity of all four co""ters is
5000 CO""tS.
e. Delay Hold. The Delay Hold circuit conrrols the
DISPLAY RATE function and external Hold and Trrgger
connrands as shown in Figure 11.
length
of time between A/D conversio"s when the front
It determines the
panel DISPLAY RATE Control is set to any position
other than MAX. The clock is stopped at the beginning
of the ZERO (2) period for a time determined by the
rocafion of the DISPLAY RATE Control. re ensures thaL
when the Hold 2 is grounded the conversion in process
will be completed and new data will be stored in the
output storage register.
Then the clock will be in-
hibited at the beginning of the ZERO period (2). The
instrument will remain in this condition indefinitely
until Hold 2 is released or until Trigger is shorted
to ground.
Afrer conversion, the insrrumenr will again
be inhibited at the beginning of rhe period (2). If
bath Swifches Sl and S2 are closed, the conversion
cycle works in the following manner. After the previous conversion has been completed, the leading edge
of the program comrt~nd (2) resets the flip-flop. In
this new condition Q is high end, therefore, rhe clock
gives no ootpuf. Af that time, rhe unijunction timer
begins ifs cycle and. after the appropriate rime, pro-
duces a pulse chat sets rhe flip-flop. This changes
Q to a low scare and a new conversion cycle begins.
After the reading has bee" completed, the (2) co-and
again resets the flip-flop end the timer again issues
a new pulse Co set the flip-flap.
0874
11
A-TO-0
CONVERTER
I
!
I
I I
I I I I I
’
MODEL 440
f. Pro~ram,Decoder. The Program/Decoder circuit
produces event coman*s to control the overall Sequence of events for a complete
g. Integrator. The Integrator circuit operation is
AID
conversion
composed of three periods.
1. Zero Period. During this period the integrator amplifier is zeroed by the closure of switch Sb.
Switches S,, S,. and Sd are open to prevent incegramr charging as shown in Figure 12.
CIRC”IT DESCRIPTION
2. Integration Period.
switch Sb, s, ,
and Sd are open. Switch S, is closed
During this period,
to permit charging by the analog voltage for a period of one line cycle.
3. Discharge Period.
During this period, switch
S, is open co prevent further charging by the analog
signal. Either swirch S, or Sd is closed to drive
the Integrator voltage fo zero. A reference current
of opposite polarity to the inpue current is applied
through either switch S, or Sd. The Discharge period ends when the Zero Crossing Dereccor circuit detects a zero Integrator output.
h. Zero Crossing Detector. The Zero Crossing Detec-
tor circuit provides a “High” or “Low” level output
depending on the polarity of the detected input. Refer
to Table 3-1 for a description of voltage outputs.
TABLE 3-l.
zero crossing Detector OUtput Levels.
BufferlSrorace Resister.
i.
The
Buffer/Storage
Register is coaposed of “flip-flops” arranged to copy
rhe states of the various BCD counter.=. The Buffer/
Storage Register requires a Buffer Score command be-
fore any infocmafion can be transferred. The “flipflop” circuits provide coded informrim for Decoder!
Driver and the BCD outputs.
FIGURE 11. Delay Hold Circuit
J Decoder/Driver. ‘.
The Decoder/Driver circuit decades the BCD information from Che Storage Regisrer
into fen-line decimal code. The Driver circuit ehen
drives rhe proper numeral in each of the Numerical
Readout tubes.
k. Numerical Readout. The Numerical Readout cansists of four numerical indicators and one polarity
indicator driven by
the
Decoder/Driver, Polaricy and
Overload Drivers.
I.. Summary of Operation.
The operarim of the
A/D Converter can be described by considering a
typical conversion cycle.
0874
CIRCUIT
DESCRIPTION
2. The Delay Hold circuit gates the output of
the Oscillator depending on the state of the “RS
flip-flop” and the “Hold 1” control line. A unijunction timing circuit provides a delay period
before a conversion is initiated. The time delay
is selected by the front panel DISPLAY RATE Control
3. The BCD Counter .serves as a master timing
control for the A/D Conversion cycle. The timing
is accomplished
five coded states, namely 0, 1. 2, 3, and 4.
4. The Program/Decoder controls the sequence of
connnands based on the coded srates from the BCD
Counter. The decoded commands are described as
shown in gable 3-2. The “2” cormnand iniciaces the
integrator ZERO period which removee any residual
charge on the integrator capacitor. The “3.4”
command iniciares the INTEGRATE period which per-
mits an integration of the analog signal.
end of the INTEGRATE period, the “0.1” command in-
itiates ehe COUNT period.
Cameand
by
‘ttOOO’~ counter which has
the
TABLE 3-2.
Function
At
the
MODEL 440
ANALOG-TO-DIGITAL CONVERTER CIRCUITRY.
3-5.
a. General. The circuits described in this Section
are located on the various Sub-Assemblies listed below and in Table 7-2 of Section 7.
1. Oscillator Board, PC-217.
2. ‘Integrator Board, K-219.
3. Display/Overload Board, PC-241.
4. Readout Board, PC-229.
5. Polarity Board, K-207.
6. Output Buffer Board, PC-218.
7. Output Buffer Board, PC-209.
b. Oscillator Board.
portions of three circuits:
circuit, the Delay/Hold circuit, and the DischargeVoltage Current Source circuit.
I. Oscillator Circuit.
Y501, and phase ehifc capacitors C501, and C502 form
a “Colpitts” type oscillator. Capacitors C503 and
C504 are used for trimming the oscillator frequency.
The output is taken from the collector of transistor
Q510 which is a common emitter gein stage used for
squaring the output. Transistor Q507 eerves e5 en
emitter-folldwer to reduce o”tp”t impedance.
The Oscillator Board contains
the Ocsilla?.or (clock)
Transistor Q501, crystal
t -
5. When the “3,4” command is given, the integra-
tor is charged by rhe analog signal for a period
of 1 line cycle of 16.67 milliseconds.
6. When the “0,l” command is given, the analog
signal is removed and the integraeor o”tp”t is
driven to zero by a reference current.
Crossing Detector senses a zero crossing of the
Integrator output and removes the reference current.
The
The +1.5 volt levels are provided for control of
the Incegracor and Polarity Storage Register.
pulse command is also produced to initiate a Buffer/
Store and Win? Command o”Cp”C.
7. When the Buffer/Store command is given, the
Suffer/Storage Register copies the ECD Counterstates at chat insfilnf of time. The BCD coded informarion in the Register is then available for the
Decoder/Driver and external printout.
8. The Decoder/Driver decodes the Buffer/Storage
o”cp”c and drives the Numerical Readout for a digital display.
9. The BCD Output information is available at
the Model 4401 Buffer Card outputs in the form of
positive (+lO volt) tr”e logic (l-2-4-g BCD Code)
10. The conversion cycle is complete when the
BCD Counter reaches 2000 counts and the Program/
Decoder provides a “2” command to initiate a new
conversion cycle.
11. The Unijunction Timing Circuit will initiate
the ZERO period after a present time delay controlled by the front panel DISPIAY RATE Control.
2 ZERO
3,4
0.1
Detecror provides
outputs as shown in Table 3-l.
INTEGRATE
COUNT
The zero
2. Delay/Hold Circuit. There are three major
components in the Delay/Hold circuit: an “RS” type
I
A
flip-flop circuit, a “Unijunction” timing circuit
and a “Hold” gate circuit.
a). .“RS” Type Flip-Flop Circuit. The flip-flop
gates the ourput of the clock depending on the in-
puts. at pins R and S.
strucced of gates
identified as shown in Figure 16.
“hijunction” Timing Circuit. The unijunc-
b).
tion timing circuit derermines the time delay between conversion cycles to obtain the desired con-
version rate as determined by the fronr panel DIS-
PLAY RATE Control. The circuit is composed of
transistors 9513 and Q514, timing capacitor C507,
and timing resistors R532 and R1269 (DISPLAY RATE
Control poCentiometer located on the front panel).
“HOLD” Gate Circuit.
C).
for identification of switches Sl and S2. The
“HOLD” gate circuit is composed of gates QASOlA,
QASOlD, and QA502 (A, B, C, and D). Switch Sl is
gate QA5OlA and is controlled by either the “‘HOLD
2” external line or the WAX” position on the
DISPLAY RATE Control.
Q513 which is conrrolled by either the “Q” outpue
of the flip-flop or the “HOLD 2” external line.
The
“HOLD 1” circuit is composed of gates QA502B
and QA502C.
3.
Discharge-Voltage Current Source Circuit. The
Positive current source composed of transistors 9502
end Q506 delivers a cons~anf current of +7.5 milliamperes Co drive a g-volt zener diode 0602 (located
on the Integrator Board. K-246) when +RRF Terminal
(Pin 13) is greater than +0.7 volt. The negative
current source composed of transisrors 4508 and Q509
delivers a constant current of -7.5 milliamperes to
drive a g-volt zener diode 0601 also located on rhe
Integrator Board, K-219.
The RS flip-flop is con-
QASOlB
and
QASOlC.
Refer to Figure 13
Switch S2
is the transistor
The pins are
14
0874
MODEL 440
Integrator Board. The 1neegratur Board consisrs
c.
of two major circuits:
Zero Crossing Detector circuit.
ctle 1ntegracor circuir and the
I. Integrator circuit. The operation of the In-
tegrator is controlled by the positions of switches
sa. Sb. SC. and Sd.
SWiWh s, is Cransisfor QbO5.
Switch Sb is fra"sisCor 4606. Transistors QbOl
through 9604 are control
off the proper FET switches depending on the signals
ac
pins
of
QAbOl. The feedback capaciror
and Sd (located on the Oscil~acar Board, K-217)
control the current for V-volt zener diodes D601 and
D602.
calibration
11 and 12. The ineegrator
transistors
Resisrors
Q607 and Q608 and integrated circuit
R602 through Rbll are full-scale
resistors.
circuies
arranged to turn
amplifier
is
CbO3. Svitche* S,
consists
2. zero Crossing rleteccor CiTC”if.
Figure 18). The
cascaded amplifiers QA602 and QA603. The zero adjustment network consists oC
R648, R649, and R650. and diodes D611 and D612.
Transistor
supply for QA603
splicrer circuit consists of
resistors R651, R.652, and R653 and &aces Q.4604 (A,
8, C).
high
gain amplifier is composed of
resistors
9609 and other components form a 6-volt
and the zero circuit. The level-
diodes
(Refer to
R645.
0613 and 0614.
R646,
d. Display/Overload Board. The DisplaylOuerload
Board contains a BCD Counter ("1000" counter). a Program Decoder CirCUit, and a" Overload Control circuit.
1. The BCD Counter is composed of "J-K" flip-flop
circuits QA301 and QA302.
2. The hoeram Decoder circuit is cornnosed of
gares QA303C and QA303D (3,4 Comand~ ."b QUO&!,
QA304B;QA304C, QA304D, QA305A, QA3058. QA305C.
QA,OSD, QA303E, QA306A. QA306B. and QA306C CO,1 & 2
Commands).
Readoue Board. The Readout Board contains De-
e.
cade Counter circuits, Buffer Storage circuits, and
Decoder Driver and Display circuits.
g. outour Buffer Board. W-218.
This board conrain!
15 buffer circuits to provide BCD Dara and Overload a"~
1. Decade Counter Circuits. Each decade counter
is composed of four J-K flip-flop*. Circuirs QA4Oi
through QA406 are Dual J-K Flip-Flop integrated cir-
CUlfS.
2. Buffer storage circuits. me Buffer storage
register is composed of Dual J-K Flip-Flop incegrated circuits QA409 through QA414.
3. Decoder Oriver Circuits. QA415.
QA416, and
QA417 are Decimal Decoder Driver integrneed circuits.
4. Display Circuits. “401, “402, and “403 are
Readout Tubes far Units. Tens. and Hundreds respectively.
0874
FIGURE 14. Model 4401 Buffer stage.
CRCUIT DESCRIPTION
MODEL 440
h. Output Suffer Board. K-209. This board contains
six buffer circuits and various gate circuit* fo pravide Print Command and Range Signal Prinr signals.
1. Buffer Circuits.
Suffer circuits "'A" through
"E" provide SCD Range informatian.
2. Print Command Circuits.
Suffer circuits com-
posed of cransiscors Q1101, Q1102. Q1104. QllOS,
QllO6, and Q1107 provide
determined by gates
QAllOl
Print
Command signals as
(A, B, C. and D) and
QA1102 (A, 8, C, and D).
Range Signal Circuit. Transistors Q1108, Q
3.
1109, and QlllO comprise a Range Signal Buffer stage
concrolIed by the Range Signal.
4.
Reference Volrages. ~A High and Low Reference
voleage is provided by resistor divider R1114, R1115,
and R1116.
The voltages are -8 volts (High) and b2
volts (LOW).
4-b. POWER SUPPLIES (Schematic 2346SE3.
+ 15 Volt Supplv. The 115 volt supplies tap ac
a. I
power from a secondary of rransformer T101. Diodes
D103, DL05, 0107 and 0108 and capacirors Cl04
and Cl05
compose a full-wave rectifier with filtering. Trans-
istors Qll4 and Q115 form a differential amplifier
which compares the volrage at RI15 with the voltage of
zener diode D110. The difference voltage is amplified
by
rransistor
pair, Q106 and Q107, which series regulare the output
Q109 and
fed to Darlingeon transistor
voltage. TransisCors QL16 and Q117 form a differenrial
amplifier which compares the voltage at RI23 with respece ea lo.
The difference voltage is amplified by
.transiscor QL13 and fed to Darlington transisCar pair,
QllO and Q111,-which series regulare'rhe '~13 vole'oueput. Transistors QlO8 and Q112 limit the output cur-'
ren? to about 200 milliamperes.
b. +3.6 “olr Swpl~. The +3.6 vole supply taps ac
wwer from a
secondarv
of transformer T101. Diodes
blO1 and D,OZ and capHcitor Cl01 form a full-wave ret-
tifier with filtering. Transistor QlO5 amplifies ehe
difference becwee" the +3.6 volt output and a refer-
ence voltage derived from
termined by
resisrors
voltage is amplified
the +I5 vole supply and de-
It103 and R104.
by transistor Q104
The difference
which drives a
Darlingcon transistor pair, QlOl and Q102. The Dar-
lington
Transistor
pair
series
Q103
regulares the +3.6 volt au?put.
limits the output current to abauc 3
amperes.
e. ~170 Volt Supplx. The cl70 ""lf supply taps ac
,mwer from a
&td capacikx Cl12 f&m a
secondarv
of transformer T101.
half-wave
rectifier with
Diode Dill
filtering. Transistor 9119 amplifies the voltage de-
veloped by the resistor divider R128 and R129.
The
output of Q119 controls the series regularor cransis-
Co= 9118 to maintain the +I70 vole output. When the
electrometer is overloaded, and overload signal drives
transistor QUO which in turn controls the volrage at
the base of transistor Q119. The circuie composed of
diode D112, rransi,sror Q120, and resistors R130, R131,
and R132 reduces the +I70 volt .xt,,ut co ~80 volts when
overloading occurs. Grounding the overload input turns
off fransisfor Q120 causing diode D112 fo conduct the
drive 4119.
The reduced ~80 volt output causes blank-
ing on all Numerical Readour Tubes cannected to the
Cl70 “OlC supply.
d. 1210 Vale Oufput. The +210
volt supply is an
unregulaeed voltage supply using the half-wave filrered voltage at diode Dill and capacitor C112.
0874
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