JVC LT-32HB1BU Schematic

SCHEMATIC DIAGRAMS

INTEGRATED DIGITAL TERRESTRIAL/SATELLITE LCD TELEVISION

LT-32HB1BU/AX

DVD-ROM No.SML2009Q1

COPYRIGHT © 2009 Victor Company of Japan, Limited.

No.YA705<Rev.001>

2009/7

LT-32HB1BU

/AX

STANDARD CIRCUIT DIAGRAM

NOTE ON USING CIRCUIT DIAGRAMS

1.SAFETY

The components identified by the symbol and shading are
critical for safety. For continued safety replace safety ciritical
components only with manufactures recommended parts.

2.SPECIFIED VOLTAGE AND WAVEFORM VALUES

The voltage and waveform values have been measured under the
following conditions.

(1)Input signal : Colour bar signal

(2)Setting positions of
each knob/button and
variable resistor

(3)Internal resistance of tester

(4)Oscilloscope sweeping time

(5)Voltage values

Since the voltage values of signal circuit vary to some extent
according to adjustments, use them as reference values.

: Original setting position
when shipped

: DC 20kΩ/V

: H

: V

: Othters

: All DC voltage values

20µs / div

5ms / div

Sweeping time is
specified

3.INDICATION OF PARTS SYMBOL [EXAMPLE]

In the PW board

: R1209

R209

Type

No indication

MM
PP
MPP

MF
TF
BP

TAN

(3)Coils

No unit

Others

(4)Power Supply

Respective voltage values are indicated

(5)Test point

: Test point

(6)Connecting method

: Ceramic capacitor
: Metalized mylar capacitor

: Polypropylene capacitor
: Metalized polypropylene capacitor
: Metalized film capacitor
: Thin film capacitor
: Bipolar electrolytic capacitor
: Tantalum capacitor

: [µH]

: As specified

: B1

: 9V

: Connector

: Receptacle

: Only test point display

: Wrapping or soldering

: B2 (12V

: 5V

)

4.INDICATIONS ON THE CIRCUIT DIAGRAM

(1)Resistors

Resistance value

No unit : [Ω]

K
M

Rated allowable power
No indication : 1/16 [W]

Others : As specified

Type

No indication

OMR

MFR

MPR

UNFR

FR

Composition resistor 1/2 [W] is specified as 1/2S or Comp.

(2)Capacitors

Capacitance value

1 or higher : [pF]

less than 1

Withstand voltage

No indication : DC50[V]

Others : DC withstand voltage [V]

AC indicated
Electrolytic Capacitors

47/50[Example]: Capacitance value [µF]/withstand voltage[V]

: [kΩ]

: [MΩ]

: Carbon resistor

: Oxide metal film resistor

: Metal film resistor

: Metal plate resistor

: Uninflammable resistor

: Fusible resistor

: [µF]

: AC withstand voltage [V]

(7)Ground symbol

: LIVE side ground

: ISOLATED(NEUTRAL) side ground

: EARTH ground

: DIGITAL ground

5.NOTE FOR REPAIRING SERVICE

This model's power circuit is partly different in the GND. The
difference of the GND is shown by the LIVE : ( ) side GND and the
ISOLATED(NEUTRAL) : ( ) side GND. Therefore, care must be
taken for the following points.

(1)Do not touch the LIVE side GND or the LIVE side GND and the
ISOLATED(NEUTRAL) side GND simultaneously. if the above
caution is not respected, an electric shock may be caused.
Therefore, make sure that the power cord is surely removed from
the receptacle when, for example, the chassis is pulled out.

(2)Do not short between the LIVE side GND and ISOLATED(NEUTRAL
side GND or never measure with a measuring apparatus measure
with a measuring apparatus ( oscilloscope, etc.) the LIVE side GND
and ISOLATED(NEUTRAL) side GND at the same time.
If the above precaution is not respected, a fuse or any parts will be broken.

Since the circuit diagram is a standard one, the circuit and
circuit constants may be subject to change for improvement
without any notice.

NOTE
Due improvement in performance, some part numbers show
in the circuit diagram may not agree with those indicated in
the part list.
When ordering parts, please use the numbers that appear
in the Parts List.

)

(No.YA705<Rev.001>)2-1

CONTENTS

SEMICONDUCTOR SHAPES ......................................................................2-2

WIRING DIAGRAM .......................................................................................2-3

BLOCK DIAGRAM ........................................................................................2-5

BLOCK DIAGRAM [MPEG4 BLOCK].........................................................2-7

CIRCUIT DIAGRAMS ...................................................................................2-9

MAIN PWB CIRCUIT DIAGRAM ................................................................................................................. 2-9

IR PWB CIRCUIT DIAGRAM .................................................................................................................. 2-101

KEY PWB CIRCUIT DIAGRAM............................................................................................................... 2-103

LED PWB CIRCUIT DIAGRAM............................................................................................................... 2-105

PATTERN DIAGRAMS ............................................................................ 2-107

MAIN PWB P ATTERN ............................................................................................................................ 2-107

IR PWB P ATTERN.................................................................................................................................. 2-111

KEY PWB P ATTERN .............................................................................................................................. 2-111

LED PWB P ATTERN .............................................................................................................................. 2-111

USING P.W. BOARD

P.W.B ASS㵭Y name LT-32HB1BU/AX

MAIN P.W. BOARD

IR P.W. BOARD

KEY P.W. BOARD

LED P.W. BOARD

HU-71100006

HU-72200004

HU-72200003

HU-72200017

SEMICONDUCTOR SHAPES

TRANSISTOR

BOTTOM VIEW FRONT VIEW TOP VIEW

CHIP TR

E
C
B

ECB

IC

BOTTOM VIEW FRONT VIEW TOP VIEW

OUT

E

IN

IN OUTE

B

(G)E(S)C(D)

1 N

ECB

ECB

1

1 N

C

BE

N

CHIP IC

N

1

2-2(No.YA705<Rev.001>)

TOP VIEW

1

N

WIRING DIAGRAM

LCD PANEL UNIT
[INVERTER PWB]

LCD PANEL UNIT

[LCD CONTROL PWB]

TOP

KEY PWB

TOP

41

JP641

31

15

CN3

1

CN1

24

1

JP642

1

1

JP1

24

1

DIGITAL TUNER
(SATELLITE)

JP2

TOP

TOP

5

1

IR PWB

JP1

5

F1

250V/6.3A

CN2

N

L

POWER UNIT

AC INLET

FRONT

1

6

LED PWB

JP2

1

6

JP3

1

4

JP4

JP761

1

DIGITAL TUNER
(TERRESTRIAL)

MAIN PWB

SPEAKER(R)SPEAKER(L)

1

5

JP3

2-4(No.YA705<Rev.001>)(No.YA705<Rev.001>)2-3

BLOCK DIAGRAM

SERVICE PORT

PC

RS232

KEY PWB

&

LED PWB

POWER UNIT

TXD/RXD

U831

ILX232

KEY_ADC1

KEY_ADC2

PWR_STB

PWM_DIM

A_DIM

BKLT_EN

P_PWM_DIM

P_A_DIM

P_BKLT_EN

+24V

+5V_STB

+5V

+7V

+12V

IR_IN

LED_B

LED_R

SCART_ID1

SCART_ID2

FLASH MEMORY

U181

TA_A/RA_A

PD6

PA1

PA0

PA2

PA3

PA5

PA6

PB4

KIA7042AF

4Pin Con.

LS

TA_A/RA_A

PD0,PD1

U82

MICOM CTRL

PB5,6,7,RESETn

JTAG

* Development Only

DDR memory

UD321, UD322

DDR2

EMI ADDR[1:23]

/EMI DATA[0:15]

PC2

PC0,PC1

PB2

PA4

PA5

PC5

PC4

PC3

LPM_RST_N

CLK IN/OUT

JTAG

HeaderHeader

HOST_A[1:24]
HOST_D[0:15]

MPEG4 (H264)

BLOCK

(TUNER & STi7103)

UART0_TXD/RXD

UART1_TXD/RXD

M_I2C

CEC_A

ID1

ID2

A_RESET

FRC_RST

DDRA[0:12]

/DDRDQ[0:31]

BUS BUFFER

Y961
XTAL

INT_OUT

LS

*I2C ADDR : 0xA2/3

Y81

XTAL

HOST_A[1:23]

HOST_D[0:15]

FLI_I2C1

U582

EEPROM

IR_IN

KEY_ADC1

KEY_ADC2

UART0

UART1

CLK IN/OUT

PWM0

I2C1

IRDATA

LBADC_IN1

LBADC_IN2

EJTAG

DDR MEM
CTL. BUS

ROM MEM
CTL. BUS

U102

SCALER & MPEG2

PWM3

PWM2

PBIAS

PPWR

LVTX_ODD

LVTX_EVN

RESET_N

UART1_CTS

UART1_RTS

USB2.0 HOST

USB_PWREN

USB_FLAG

HDMIA TDMS IN

HDMIA_I2C

HDMIA_CEC

HDMIA_HPD

HDMIB TDMS IN

HDMIB_HPD

HDMIB_I2C

AHS, AVS

VGA_R,VGA_G,VGA_B

S0_SCL/SDA

AUD_IN_L3/R3

LBADC_IN4

A1P,B1P,C1P/SV1P

SCART_FB

AUD_IN_L1/R1

AUD_OUT1R/L

AUD_OUT2R/L

VOUT

LBADC_IN5

A2P,B2P,C2P/SV2P

VXO_D7

AUD_IN_L2/R2

A3P,B3P,C3P

AUD_IN_L4/R4

B4P,A4P

SV3P

AUD_IN_L5/R5

SV4P

TNR_SIF

GPIO134

HEAD_OUT_L/R

AUDIO_MUTE

I2S_OUT

PWM_DIM

A_DIM

BKLT_EN

PANEL_PWR

LVDS_OUT

RESETn_MAIN

FRC_RST

SCART1_RO/LO

SCART2_RO/LO

SCART2_CVBS_OUT

AUDO_MUTE

USF-T

LPM_RST_N

USB_HOST

U114

USB SWITCH

TMDS_A

HDMI_SCL/SDA

CEC_A

VGA_HS/VS 74HC14 HS/VS

PC_R/G/B

SCART1_RI/LI

RF_CVBS

SIF

HP_LO/RO

I2S_OUT

FLI_I2C1

A_RESET

HPDA

U1541,U1581

OP AMP

U381,U383

VIDEO

SWITCH

U382

VIDEO FILTER

YPbPr

Component_R/L

SVHS_Y/C

AV_CVBS

AL/AR_CVBS

HEADPHONE_ID

U764

OP AMP

U761

Digital Audio AMP

FLI_I2C1

* FRC Option

FLI_I2C1

FRC_RST

FRC_RST

+5V

+5V_USB

VGA_SDA/SCL

PC

AUDIO

SCART_ID1

SCART1_R/G/B/CVBS

SCART1_FB

SCART1_RI/LI

SC1_R/L_OUT_O

SC2_R/L_OUT_O

DTT_CVBS

RF_CVBS

SCART1_CVBSO

SCART2_CVBSO

SCART_ID2

SCART2_R/G/B/CVBS

SCART2_FB

SCART2_RI/LI

HPO_L/R

AMP_R-

AMP_R+

AMP_L-

AMP_L+

LCD PANEL

USB IN

U321

HDMI SWITCH

EEPROM

PC IN

SCART1_CVBSO
SC1_R/L_OUT_O

SCART2_CVBSO

SC2_R/L_OUT_O

HEADPHONE

SPEAKER(R)

SPEAKER(L)

EXT3

EXT4

TMDS 1

HPD1

TMDS 2

HPD2

TMDS 3

HPD3

CEC

CEC

CEC

SCART1

SCART2

HDMI

HDMI

HDMI

EXT5

EXT6

EXT7

EXT1

EXT2

AUDO_SPDIF_OUT

(No.YA705<Rev.001>)2-5 2-6(No.YA705<Rev.001>)

SPDIF

DIGITAL AUDIO

BLOCK DIAGRAM [MPEG4 BLOCK]

STI7103 System DDR memory

EMI ADDR[1:23]
/EMI DATA[0:15]

UD1261, UD1262

DDR SDRAM

PC28F320J3D75/BGA

NOR FLASH

(32Mbit(4Mx8))

Douglas DEMO B/D 256Mbit

SLMI DDRA[0:12]

/SLMI DDRDQ[0:31]

EMI ADDR[1:23]

/EMI DATA[0:15]

Cl contro

Buffer&SW

U1131

MPEG CPU

TSIN0

I2S / SPDIF

DVO
CONT
DATA

UART1

CVBS

DTT_CVBS

HOST_A[1:2]/HOST_D[0:7]

I2S / SPDIF

CLK/BLANK/HSYNC/VSYNC

DVO[0..23]

TX
RX

DTT_CVBS

POD_CTL

POD_DET

I2S / SPDIF

VXI
CONT
DATA

UART1

CVBS

ROM MEM
CTL. BUS

POD_CTL.

U102

SCALER

RF_IN1

RF_IN1

SIF

RF_CVBS

U921 TERRESTRIAL TUNER

LNB_OUT

U1021 SATELLITE TUNER

TUNER0_I2C

TNR0_IF+/-

DEV_/RESET

TUNER0_I2C

DEV_/RESET

TNR1_IF+/-

TUNER1_I2C

U961

DEMOD

U51

BCM4506

U1051

A8293(LNB)

22K_TONE

FLI_I2C0

TS0

TS

FLI_I2C0

TS

FLI_I2C0

DEV_/RESET

TS_SEL0

nTS_SEL0

JP221

CI SLOT

CII TS

CIO TS

R

POD_DET

MUX TS

TS_SEL1

nTS_SEL1

TS Selector

TS_SEL0

TS_SEL1

FLI_I2C0 I2C0

GP0132

TS_Parallel

Inputs
[POD]

2-8(No.YA705<Rev.001>)(No.YA705<Rev.001>)2-7

CIRCUIT DIAGRAMS

MAIN PWB CIRCUIT DIAGRAM (1/46) [TERRESTRIAL TUNER]

1

2

3

4

5

6

U921
FQD1116AME/BH

RF IN

A A

RF PIN IN/OUT(OPTION)

ANT_PWR2GND3NC4RF_AGC5GND6VP_TUN_+5v

1

+5VT_ANT

L923

BLM18PG300SN1D

220uF/16V/MVK/S

+5VTA

L921

BLM18PG300SN1D

220uF/16V/MVK/S

B B

+5VTA

L922

BLM18PG300SN1D

220uF/16V/MVK/S

C921

C927

C931

C922

104p/16V/1005

C925

104p/16V/1005

C929

104p/16V/1005

C923

102p/50V/1005

C926

102p/50V/1005

C930

102p/50V/1005

IIC AS : Tuner : 0xC0h

Analog Demod : 0x86h

GND9NC10AS11SCL12SDA13REF14IF-AGC15DIF116DIF217WIF OUT/NC

7VT8

+5V IF192nd IF SOUND/LOW DIG IF1

2nd IF SOUND/LOW DIG IF2

18

20

21NC22

R925
121/1005

R929
121/1005

GND
GND

GND
GND

AS_IF23CVBS

24

25
26

27
28

R926
000/1005

C935
4R7p/50V/1005

R928

750/F/1005

RF_CVBS

R940 201/1005

R939 201/1005

R931 330/1005

MAIN PWB(13/46)

DTT_IF_NARROW-

DTT_IF_NARROW+

SIF

DTT_IF_NARROW-

MAIN PWB(26/46)

DTT_IF_NARROW+

MAIN PWB(13/46)

+5VTA +3V3DT

R930

R932 000/1005

R933 000/1005

R934 000/1005

C932

OPEN-330p/1005

C C

Antenna Power Short Protection Circuit

Antenna Current Limiting Circuit (100mA Limiting)

ANT_PWR_EN

+5V_ANT

HIGH

LOW

MAIN PWB(7/46)

D D

ANT_PWR_EN

ANT_PWR_CHK

IF ANT_PWR_CTRL is L

--> ANT_PWR_EN L

R922 330/1005
R923 101/1005

ON

OFF

C933
OPEN-330p/1005

+3V3DT

R924
103/1005

Fault Flag (Output):

C934

104p/16V/1005

U922

1

EN

2

FLG

3

GND
NC4ILIM

POWER SW MIC2544-1YMM

Active-low, open-drain output.
Indicates overcurrent or
thermal shutdown conditions

TUNER0_AGC

+5VTA +5VT_ANT

8

OUT

7

IN

6

OUT

Current limit threshold is determined by
ILIMIT = 230V / RSET,
where : 154 < RSET < 2.29k

R927 222/1005

5

MAIN PWB(26/46)

C936
220p/50V/1005

562/1005

MAIN PWB ASS'Y(1/46)
[TERRESTRIAL TUNER]

HU-71100006

R921

562/1005

Q925

1

FDV301N_NL

32

32

Q924
FDV301N_NL

1

TUNER0_SDA

TUNER0_SCL

MAIN PWB(26/46)

All location are from 921 to 960

1

2

3

4

5

6

hb1_main_0612_24/48_0.0

(No.YA705<Rev.001>)2-9 2-10(No.YA705<Rev.001>)

MAIN PWB CIRCUIT DIAGRAM (2/46) [SATELLITE TUNER]

5

U1021

4

3

2

1

*I2C Address : 0xD2

1

GND

2

GND

3

GND

D D

4

GND

JP230
OPEN_DK-504-039(F-CON)

LNB-IN

SHIELD CAN

U51

BCM4505

HS0_D7
HS0_D6
HS0_D5
HS0_D4
HS0_D3
HS0_D2

1X8 connector

HS0_D1

GND

25
26
27
28
29
30
31
32

TS1_DATA7
TS1_DATA6
TS1_DATA5
TS1_DATA4
TS1_DATA3
TS1_DATA2
TS1_DATA1
TS1_DATA0TS_DO0

TS1_DATA[7..0]

LNB-OUT (option)

MAIN PWB(24/46)

A1V2S_BCM4505

2X12 Connector

BLM18PG300SN1D

C1025

HSN-5000HS/DTV

LNB_A1GND23.3V3GND4HS0_VALID

C C

HS0_D06HS0_CLK7HS0_SYNC

5

8

GND9GND10IRQ011NC12SCL13nRESET0

GND15GND162.5V17SDA185V1922K_TONE0

14

GND21GND221.2V23LNB_B

20

24

102p/50V/1005

C1028

102p/50V/1005

102p/50V/1005

C1024

104p/16V/1005

C1027

104p/16V/1005

C1030

104p/16V/1005

R1022

R1023

C1031

330/1005

330/1005

C1026
220uF/16V/MVK/S

BLM18PG300SN1D

L1022

L1023

C1029

220uF/16V/MVK/S

BLM18PG300SN1D

C1032

220uF/16V/MVK/S

+5V_STUNER

2.5VS_BCM4505

L1024

22K_TONE

FLI_SCL_1
FLI_SDA_1

MAIN PWB(27/46)

MAIN PWB(6/46),(26/46),(27/46)

B B

+3.3V_STUNER

L1021

BLM18PG300SN1D

C1023

220uF/16V/MVK/S

MAIN PWB(27/46)

A A

LNB_OUT

C1022

104p/16V/1005

1

1

CD1021

OPEN-AVL26K05121

2

2

C1021

102p/50V/1005

TS_DO0

TS1_VLD
TS1_STR

TS1_CLK

MAIN PWB(24/46)

R1021
222/1005

Must be pull-down register because gpio default
high. then default voltage is about 0.3V

MAIN PWB ASS'Y(2/46)
[SATELLITE TUNER]

CH_RESET

MAIN PWB(7/46)

HU-71100006

All location are from 1021 to 1050

5

4

3

2

1

hb1_main_0612_26/48_0.0

2-12(No.YA705<Rev.001>)(No.YA705<Rev.001>)2-11

MAIN PWB CIRCUIT DIAGRAM (3/46) [Power and Interface Connectors]

5

JP1

D D

POWER UNIT

CN1

C C

KEY PWB

JP2

SMW200-24C

1
2
3
4
5
6
7
8

9
10
11

2mm

12
13
14
15
16
17
18
19
20
21
22
23
24

JP2
SMW250-05

2.5mm
5

4
3
2
1

R5 OPEN-000/1005

R7 102/1005

R10 OPEN-102/1005

KEY_ADC2

KEY_ADC1

MAIN PWB(7/46)

AUO_Panel

SMPS_ON

MAIN PWB(5/46)

AC_DETECT

BL_EN_O
ANA_DIM

PWM_DIM_IN

PWM_DIM_OUT

4

L1
BLM41PG600SN1L

L2
BLM41PG600SN1L

L3

BLM21PG600SN1D

MAIN PWB
(4/46),(5/46),(22/46),(43/46)

MAIN PWB(14/46),(19/46)

C1
100uF/25V/BXE/S

C3
470uF/16V/MVK/S

C6
100uF/25V/BXE/S

C2

104p/50V

C4

104p/50V

C7

104p/50V

+12V

+5V

+5V4STB

3

MAX.3A

MAX.3.5A

MAX.500mA

[+12V]
AMP : 1500mA
QPSK : 400mA
PANEL : 800mA

[+5V]
USB : 500mA
CAM : 500mA
PANEL : 1200mA(Option)

[+5.8V]
MICOM : 9mA
RS232 : 10mA
TUNER : 220mA

MAIN PWB(5/46)

2

STBY_EN

BLT_EN

+5VSTB

R1

472/1005

Power on : L
Power off : H

BLT_EN

Backlight on : L
Backlight off : H

R3

103/1005

R17

472/1005

R21

103/1005

+5V4STB

1

23

+5V+5V

1

23

R2
102/1005

Q1
MMBT4401

R18

472/1005

Q5
MMBT4401

SMPS_ON

C5
OPEN-104p/16V/1005

BL_EN_O

1

+5VSTB

IR

LEDR

+5VSTB

C8

104p/16V/1005

R11
OPEN-332/1005

IR_IN

MAIN PWB(5/46)

LED_B

L : ON
H : OFF

L4
BLM18PG300SN1D

JP3

B B

IR PWB

JP1

SMW250-06

6
5
4

2.5mm
3

2
1

R8
103/1005

23

Q2

1

MMBT4403

R9
301/3216

LEDB

MAIN PWB(6/46)

A_DIM

P_DIM

R19
102/1005

ANA_DIM

C9
106p/10V/2012

PWM_DIM_IN

PWM_DIM_IN

MAIN PWB(14/46),(19/46)

MAIN PWB(5/46)

+5VSTB

JP4
53014-0410

1

2mm

2mm

LED PWB

JP3

A A

2
3
4

LEDB

LED_R

L : ON
H : OFF

FRONT BLUE LED

R12

103/1005

23

Q3

1

MMBT4403

R14
301/3216

LEDR

MAIN PWB ASS'Y(3/46)
[Power and Interface Connectors]

HU-71100006

All location are from 1 to 20

5

4

3

2

1

hb1_main_0612_1/48_0.0

(No.YA705<Rev.001>)2-13 2-14(No.YA705<Rev.001>)

MAIN PWB CIRCUIT DIAGRAM (4/46) [Power Regulation]

1

NORMAL POWER

IN

GND_P

9

MAX: 3A

U32
MP2121DQ

4

IN

7

IN

6

POK

10

EN/SYNC

MAX 1.5A

GND

6

R52

750/F/1005

1

BS

COMP

VOUT

PGOOD

+5V

C69

A A

B B

C C

106p/10V/2012

+5V

C41
106p/10V/2012

+3V3

C52
106p/10V/2012

OPEN-105p/16V/1005

TP17
PCB_TP10

1

C71
106p/10V/2012

C58

C76

C48
104p/16V/1005

+5V

R33
104/1005

OPEN-106p/10V/2012

C42
106p/10V/2012

TP34
PCB_TP10

1

C53
104p/16V/1005

+5V

R42
104/1005

C77
104p/16V/1005

TP32
PCB_TP10

1

C59

105p/25V

7

8

4

R48
104/1005

R49
104/1005

TP36
PCB_TP10

1

2

U31

EN

SS

GND

MP2307

C50
335p/10V/2012

U33
RT9018B25PSP

3

VIN

2

EN

4

VDD

8

GND

9

TAP

Max.3A

/INH1VIN2GND3VOUT4ADJ

2

103p/50V/1005

3

SW

5

FB

6

OPEN-561p/1005

GND

2

6

7

ADJ

5

NC

1

U34
LD29150PT/P-PAK 5P

5

C70

C78

GND

9

11

TP35
PCB_TP10

R1

R2

BS

SW

SW

FB

GND-PAD

1

R34
753/F/1005

R36
593/F/1005

4.7uH/SPC7040-4R7/3.5A

D30
OPEN-B340A

12

12

C75

D31
OPEN-LL4148

822p/25V/1005

R45
4021/F/1005

R39

000/1005

5

3

8

1

R2

R31
304/F/1005

R32
6043/F/1005

Vout=0.8V(R1+R2)/R2

C54
106p/10V/2012

R37
104/1005

Vout=0.8V(R1+R2)/R2

TP37
PCB_TP10

Vout = 0.925 x (1+R1/R2)

L31

R1

R51
OPEN-104/1005

R2

C43
103p/50V/1005

R1

+1V8

[Douglas DDR]
+1.816V,
Max.781mA

C55

104p/16V/1005

+3V3_D

1

3

R43

243/F/1005

R44

912/F/1005

L32
SPC6025-1R0M

104p/16V/1005

+3.3V
MAX 642mA

TP31
PCB_TP10

1

C72

226p/6.3V/2012

TP33
PCB_TP10

1

C44

+3.366V, Max.1.3A

C73

226p/6.3V/2012

C74

220uF/16V/MVK/S

MAIN PWB

(3/46),(5/46),(22/46),(43/46)

[Douglas Core]
+1.216V,

+1V2

Max.1634mA

C62
100uF/25V/BXE/S

C61
226p/6.3V/2012

4

+3V3

AC_DETECT

R46

OPEN-103/1005

C66

OPEN-102p/50V/1005

+5V4STB

OPEN-ASM811REUSF-T

4

3

C92

OPEN-104p/16V/1005

+3V3_D

+1V8

5

+5V4STB

C30

105p/25V

U36

VCC

MR

GND

RESET

1

2

STAND-BY POWER

TP38
PCB_TP10

1

R50
104/1005

R47
OPEN-104/1005

3V3 Power Branch

+3V3 +3V3_A

L33
BLM18PG300SN1D

C46

104p/16V/1005

+3V3H

L34
BLM18PG300SN1D

1V8 Power Branch

VDDR_MEM

L35
BLM18PG300SN1D

C56

104p/16V/1005

U35 RT9167-50PB

1

3

2

C45 104p/16V/1005

C47 220uF/16V/MVK/S

C49 104p/16V/1005

C51 220uF/16V/MVK/S

C57
100uF/25V/BXE/S

VIN

EN

GND

VOUT

BP

C79

103p/50V/1005

R35
102/F/1005

R38
102/F/1005

5

4

DDR_VRF

6

TP39
PCB_TP10

1

C80

105p/25V

C60

104p/16V/1005

+5VSTB

MAX 29mA

C34
104p/16V/1005

C63

D D

106p/10V/2012

C64
104p/16V/1005

C65
OPEN-105p/16V/1005

R40
1692/F/1005

R41
103/F/1005

C31
104p/16V/1005

C67
106p/10V/2012

C68
104p/16V/1005

GND_D

DGND GND_A

MAIN PWB ASS'Y(4/46)
[Power Regulation]

HU-71100006

All location are from 30 to 80

1

2

3

4

5

6

hb1_main_0612_2/48_0.0

2-16(No.YA705<Rev.001>)(No.YA705<Rev.001>)2-15

MAIN PWB CIRCUIT DIAGRAM (5/46) [MICRO CTRL]

5

+5VSTB +5VSTB

D D

C81
OPEN-104p/16V/1005

C C

MAIN PWB(40/46),(42/46)

U81
OPEN-KIA7042AF

VCC1GND2OUT3GND

4

S81

1

34

OPEN-JTP1127WEM

MAIN PWB(42/46)

MAIN PWB(3/46)

2

R81
103/1005

C82

104p/16V/1005

CEC_A

CEC_O

STBY_EN

MAIN PWB(23/46)

MAIN PWB(3/46)

MAIN PWB(43/46)

+5VSTB+5VSTB +5VSTB

B B

R107

103/1005

R106

Open_103/1005

R104

Open_103/1005

MOD2_IDMOD1_ID

R105

103/1005

IR_IN

SC_MUTE

System Reset

R82
101/1005

+5VSTB

MOSI
MISO
SCK

RA
TA

R109

103/1005

MOD3_ID

R108

OPEN-103/1005

RESETn

R93
OPEN_103/1005

R95 101/1005
R91 101/1005

+5VSTB

R83
OPEN_103/1005

R84 101/1005

MAIN PWB ASS'Y(5/46)

A A

[MICRO CTRL]

HU-71100006

4

+5VSTB

C87

OPEN-103p/50V/1005

PA0

PA1

PA2

PA3

KEY_ADC2

KEY_ADC1

LED_B

LED_R

PA4

PA5

PA6

MOD2_ID

MOD1_ID

PA7

PB0

PB1

PB2

CEC_A

PB3

PB4

PB5

PB6

PB7

STBY_EN

MOSI

MISO

SCK

AVCC
(ADC0) PA0
(ADC1) PA1
(ADC2) PA2
(ADC3) PA3
(ADC4) PA4
(ADC5) PA5
(ADC6) PA6
(ADC7) PA7

AREF

(SCL) PC0
(SDA) PC1

(TCK) PC2
(TMS) PC3
(TDO) PC4

(TDI) PC5

RESETn

XTAL2
XTAL1

C86

104p/16V/1005

27
37
36
35
34
33
32
31
30
29

19
20
21
22
23
24
25
26

4

7
8

200p/50V/1005

C83
106p/10V/2012

+5VSTB +5VSTB

C84
104p/16V/1005

U82

5

VCC1

17

VCC2

38

VCC3

40

PB0 (XCK/T0)

41

PB1 (T1)

42

PB2 (AIN0/INT2)

43

PB3 (AIN1/OC0)

44

PB4 (SS)

1

PB5 (MOSI)

2

PB6 (MISO)

3

PB7 (SCK)

9

PD0 (RXD)

10

PD1 (TXD)

11

PD2 (INT0)

12

PD3 (INT1)

13

PD4 (OC1B)

14

PD5 (OC1A)

15

PD6 (ICP)

16

PD7 (OC2)

6

GND1

18

GND2

28

GND3

39

GND4

ATMEGA324P-20AU

C85
104p/16V/1005

(TOSC1) PC6
(TOSC2) PC7

Front Key ADC2

Front Key ADC1

Display LED

HDD Recording LED

Model_Detect

Model_Detect

HDMI CEC Control

Stand-by ON/OFF

JTAG

JTAG

JTAG

3

MISO
SCK
RESETn

MOD3_ID
MOD2_ID
MOD1_ID

R89 330/1005
R90 330/1005

R94 101/1005

RESETn

R96 000/1005

C88

PC0

PC1

PC2

PC3

PC4

PC5

FLI_SCL1

FLI_SDA1

INT_OUT Douglas Interrupt

M_RST_N Douglas Chip Reset

AC_DETECT

A_RESET

PC6

PC7

PD0

PD1

RA

TA

PD2

PD3

PD4

PD5

PD6

PD7

IR_IN IR Input

Scart_Mute Scart Audio Output Mute

OPEN-HPH-DS06-02

KEY_ADC2
KEY_ADC1
LED_B
LED_R

Y81
16MHZ/20pF/SMD

12

C89
200p/50V/1005

JP81

12
34
56

+5VSTB +5VSTB

MAIN PWB(3/46)

M_SCL

MAIN PWB(39/46)

M_SDA

M_SCL
M_SDA
INT_OUT
M_RST_N

M_RST_N
AC_DETECT
A_RESET

I2C(to Douglas)

I2C(to Douglas)

SMPS AC Detect

AMP Reset Control(to AMP)

UART0(to RS232)

UART0(to RS232)

MOSI

MAIN PWB(37/46)

MAIN PWB(22/46)

2

+5VSTB

R87
472/1005

INT_OUT

L : Normal
H : Reset

M_RST_N

R97 162/1005

R98 162/1005

+3V3_A

R88

472/1005

1

32
32

1

MAIN PWB
(3/46),(4/46),(22/46),(23/46)

R102 103/1005

+5VSTB

R99

103/1005

R101
102/1005

KEY_ADC2

KEY_ADC1

Q81
FDV301N_NL

Q82
FDV301N_NL

+3V3_A

1

23

FLI_SCL_0
FLI_SDA_0

R103
183/F/1005

R100
103/1005

Q83
MMBT4401

1

C90

104p/16V/1005

C91

104p/16V/1005

MAIN PWB
(6/46),(17/46),(22/46),(40/46)

FLI_INT

MAIN PWB(6/46)

LPM_RST_N

All location are from 81 to 110

5

4

3

2

1

hb1_main_0612_3/48_0.0

(No.YA705<Rev.001>)2-17 2-18(No.YA705<Rev.001>)

MAIN PWB CIRCUIT DIAGRAM (6/46) [USB,I2C,JTAG]

5

UART0 : PC Display Debug message

UART1 : G-Probe application run at PC

D D

MAIN PWB(2/46),(26/46),(27/46)

MAIN PWB(5/46),(17/46),(22/46),(40/46)

MAIN PWB(36/46)

STi7103_UART

MAIN PWB(23/46)

MAIN PWB(17/46)

MAIN PWB(3/46)

MAIN PWB(5/46)

C C

B B

A A

MAIN PWB(10/46)

C117
104p/16V/1005

R133
OPEN-153/1005

R137

103/1005

5R0p/50V/1005

FLI_SDA_1

FLI_SCL_1

FLI_SDA_0

FLI_SCL_0

UART0_RX
UART0_TX

UART1_RX

UART1_TX

FRC_/RST

P_DIM
A_DIM

CI_PWR

FLI_INT

R128
622/F/1005

C125

+5V

R138
103/1005

+3V3_A

R113 222/1005
R115 222/1005
R116 222/1005
R117 222/1005

FLI_SDA_1
FLI_SCL_1

FLI_SDA_0
FLI_SCL_0

UART0_RX
UART0_TX

UART1_RX
UART1_TX

+3V3_A +3V3_A

L111

BLM18PG300SN1D

C118

47uF/16V/MVK/S

C126
5R0p/50V/1005

R134

OPEN-153/1005

R139
000/1005

R5523N USB HIGH-SIDE POWER SWITCH

105p/16V/1005

L113
ACM2012H-900

4

U114

1

EN

3

FLG

C119

Active high

4

R120 330/1005
R118 330/1005

R119 330/1005
R121 330/1005

TP113

1

PCB_TP08

USB_D0+
USB_D0-

104p/16V/1005

C120

104p/16V/1005

21

3

RV111

OPEN-AVRL161A1R1NTB

RV112
OPEN-AVRL161A1R1NTB

5

OUT

4

IN

2

GND

C121

+5V

U102G
FLI10620H

D21

2WIRE_M1_SDA_UART2_TX

D20

2WIRE_M1_SCL_UART2_RX

F20

2WIRE_M0_SDA

E20

2WIRE_M0_SCL

A19

UART0_RXD

B19

UART0_TXD

A20

UART1_RXD

B20

UART1_TXD

C20

UART1_RTS

C19

UART1_CTS

A13

PWM3

B13

PWM2_GPIO6

C13

PWM1_GPIO5_/INT5

D13

PWM0_GPIO4_/INT4

C29

USB_FLAG

C28

USB_PWREN

AJ20

USBPHY_PADP

AH20

USBPHY_PADM

AG20

USBPHY_VRES

AG19

USB_AVDD33

AH19

USB_AVDD33

AF20

USB_AVDD33

AF19

USB_GND

AJ19

USB_GND

AD20

USB_GND

+5V_USB

C127
106p/10V/2012

L114

BLM21PG600SN1D

OTP_VDD33

OBUFC_CLK

EJ_RST_N

DFSYNC_IN_OUT_GPIO8

TESTMODE0
TESTMODE1

USB_AVDD12

JP112
KJA-UB-4-0004

1

VBUS

SGND

1

2

D-

2

3

D+

3

4

GND

SGND

4

+5V_USB

C128

104p/16V/1005

C129
100uF/16V/MVK/S

RESET_N

REF_CLK

XTAL_IN

CLKOUT

TRST

TDI
TDO
TMS
TCK

EJ_DINT

5

6

1

A26

TP112
PCB_TP08

D23

A22
A23

1

E12

NVRAM_WP

F21

TRST#

B26

TDI

B27

TDO

A27

TMS

A28

TCK

B28

EJTAG_RST#

A29

DINT

B29

E13

C27
C26

AE20

104p/16V/1005

3

C112
OPEN-680p/50V/1005

R122 000/1005

TP111
PCB_TP08

R129 OPEN-472/1005
R130 OPEN-472/1005

C123

+3V3_A

R111
OPEN-104/1005

R114
OPEN-104/1005

19.6608MHZ/
20PF/SX-1/SMD

C113

270p/50V/1005

L112
BLM18PG300SN1D

C124

106p/10V/2012

Y111

12

R124

OPEN-000

270p/50V/1005

BLT_EN

+1V2

OPEN-ASM811REUSF-T

1

GND

2

RESET

Reset Threshole
: +3.08V

PWR_/RESET

C114

U111

VCC

R112 000/1005

+3V3_A

+3V3_A

MAIN PWB(3/46)

MAIN PWB ASS'Y(6/46)

2

+3V3_A

4

3

MR

MAIN PWB(8/46)

R123 102/1005
PR111 103*4/1005

18
27
36
45

R127

R126

C115 200p/50V/1005

102/1005

103/1005

EEPROM

Address:0xA4/A5

U113

1

A0
A1
A2
VSS

24LC256

VCC

WP

SCL

SDA

2
3
4

LPM_RST_N

S111

12

34

OPEN-JTP1127WEM

R125 OPEN-200/1005

+3V3_A +3V3_A

C122

104p/16V/1005

8
7

FLI_SCL_0

6

FLI_SDA_0

5

JP113

1

2mm

2
3
4

OPEN-53014-0410

WP

+5V

R135
OPEN-472/1005

Q111
MMBT4401

R136
OPEN-472/1005

UART0_TX
UART0_RX

1

MAIN PWB(5/46)

JP111
OPEN-2110-DS14-G

1

2

3

4

5

6

7

8

9

10

11

12

13 14

EJTAG

R131
103/1005

NVRAM_WP : H = Enable write

23

NVRAM_WP : L = Disable write

+3V3_A

C116

104p/16V/1005

R132
103/1005

1

NVRAM_WP

[USB,I2C,JTAG]

All location are from 111 to 160

HU-71100006

5

4

3

2

1

hb1_main_0612_4/48_0.0

2-20(No.YA705<Rev.001>)(No.YA705<Rev.001>)2-19

MAIN PWB CIRCUIT DIAGRAM (7/46) [I2S]

5

4

3

2

1

MAIN PWB ASS'Y(7/46)
[I2S]

HU-71100006

D D

MAIN PWB (43/46)

MAIN PWB (44/46)

C C

+3V3_A

SCART1_ID
SCART2_ID

L161
BLM18PG300SN1D

C161

106p/10V/2012

TP164 PCB_TP08
SCART1_ID
SCART2_ID

TP165 PCB_TP08

TP172

PCB_TP08

LBADC_IN1
LBADC_IN2
LBADC_IN3
LBADC_IN6

R163 103/1005

R164 103/1005

R169 103/1005

R170 103/1005

SCART1_ID
SCART2_ID

103p/50V/1005

C165

U102D
FLI10620H

C162

104p/16V/1005

LBADC_IN1
LBADC_IN2

1

1

1

LBADC_IN3

LBADC_IN6

D24

E23

C25
C24
B25
B24
A25
A24
F22

C21

C166

103p/50V/1005

LBADC_33

LBADC_GND

LBADC_IN1
LBADC_IN2
LBADC_IN3
LBADC_IN4
LBADC_IN5
LBADC_IN6
LBADC_RETURN

IRDATA

AUDIN_I2S_BCLK

AUDIN_I2S_WCLK

AUDIN_I2S_DAT

AUD_MCLK0
AUD_MCLK1

AUDO_I2SA_BCLK

AUDO_I2SA_WCLK

AUDO_I2SA_DAT0
AUDO_I2SB_DAT1
AUDO_I2SB_DAT2

AUDO_I2SB_BCLK

AUDO_I2SB_WCLK

AUDIN_SPDIF_IN

AUDO_SPDIF_OUT

AC2
AB3
AA4

AC1
AB5

AB4
AC5
AC4
AD2
AE2

AC3
AD3

AA5

AD1

SPDIF_OUT

ST_PCM_SCLK
ST_PCM_LRCLK
ST_PCMOut0

ST_PCM_MCLK

MAIN PWB(39/46)

MAIN PWB(38/46)

PR161

330*4/1005

18
27
36
45

ST_SPDIF

I2S_OUT_MCLK
I2S_OUT_CLK
I2S_OUT_WS
I2S_OUT_DAT

MAIN PWB(38/46)

MAIN PWB(22/46)

U102F
FLI10620H

MAIN PWB(36/46)

MAIN PWB(38/46)

B B

R178 103/1005
R175 103/1005
R176 103/1005
R177 OPEN-103/1005

Model1_ID
Model2_ID
Model3_ID
Model4_ID

R179 OPEN-103/1005
R171 OPEN-103/1005
R172 OPEN-103/1005
R173 103/1005

Model1_ID : Panel (H:WXGA,L:FHD)
Model2_ID : Model (H:19,20", L: More than 26")
Model3_ID :
Model4_ID : (H: HB1, L: DB1 )

+3V3_A

MAIN PWB (9/46)

MAIN PWB (3/46)

MAIN PWB (46/46)

A A

AUO_Panel

CI_ACC_EN

R174 103/1005

OPEN-103/1005

R161

+3V3_A

+3V3_A

VXI_CLK

VXI_DE
VXI_VS
VXI_HS

VXI_D[0..15]

CI_ACC_EN

AUO_Panel

ST7103_FLASH_EN

Model1_ID
Model2_ID
Model3_ID
Model4_ID

AUO_Panel

CI_ACC_EN

VXI_D0
VXI_D1
VXI_D2
VXI_D3
VXI_D4
VXI_D5
VXI_D6
VXI_D7
VXI_D8
VXI_D9
VXI_D10
VXI_D11
VXI_D12
VXI_D13
VXI_D14
VXI_D15

ST7103_FLASH_EN

A18

VXI_CLK

C18

VXI_DE

B18

VXI_VS

D18

VXI_HS

E19

VXI_D0

A17

VXI_D1

B17

VXI_D2

C17

VXI_D3

D17

VXI_D4

F17

VXI_D5

A16

VXI_D6

B16

VXI_D7

C16

VXI_D8

D16

VXI_D9

D19

VXI_D10

E16

VXI_D11

A15

VXI_D12

B15

VXI_D13

C15

VXI_D14

D15

VXI_D15

E15

VXI_D16

A14

VXI_D17

B14

VXI_D18/TS_ERR

C14

VXI_D19/DREQ_I

D14

VXI_D20/TS_VALID_O

E14

VXI_D21/TS_SYNC_O

E17

VXI_D22/TS_D_O

E18

VXI_D23/TS_CLK_O

VXO_D0
VXO_D1
VXO_D2
VXO_D3
VXO_D4
VXO_D5
VXO_D6
VXO_D7
VXO_D8

VXO_D9
VXO_D10
VXO_D11
VXO_D12
VXO_D13
VXO_D14
VXO_D15

VXO_HS

VXO_VS

VXO_CLK

VXO_DE

AF15
AH16
AJ16
AE15
AE16
AF16
AG16
AH17
AJ17
AE17
AF17
AG17
AH18
AJ18
AD15
AE18

AF18
AG18
AD19
AE19

R166 000/1005

HEADPHONE_ID HEADPHONE_ID

R165 000/1005

R167 OPEN-000/1005

R168 102/1005

TS_SEL
CH_TER_RESET
HEADPHONE_ID
BIT_SEL

CH_RESET

ANT_PWR_EN
ANT_PWR_CHK

TS_SEL_CI
SC1_SEL
SC_FB_SEL
PD_RESET

ST_RESET
PANEL_PWR

OPC_CTL
FRC_MODE0
FRC_MODE1
FRC_MODESEL

MAIN PWB(24/46)

MAIN PWB(26/46)
MAIN PWB(22/46)

MAIN PWB(14/46)

MAIN PWB(2/46)

MAIN PWB(1/46)

MAIN PWB(9/46)

MAIN PWB(13/46)

MAIN PWB(40/46)

MAIN PWB(37/46)

MAIN PWB(14/46)

MAIN PWB(17/46)

VGA_SW

R162 103/1005

EMIBUSREQ

EMIBUSGNT

MAIN PWB(39/46)

+3V3_A

MAIN PWB(35/46)

MAIN PWB(35/46),(36/46)

All location are from 161 to 180

5

4

3

2

1

hb1_main_0612_5/48_0.0

(No.YA705<Rev.001>)2-21 2-22(No.YA705<Rev.001>)

MAIN PWB CIRCUIT DIAGRAM (8/46) [Flash and CI Interface]

5

U102C
FLI10620H

Flash_WP#

D D

POD_DET#

POD_DAT_DIR

MAIN PWB(9/46)

MAIN PWB

(9/46),(24/46)

C C

POD_A4
POD_A5
POD_A6
POD_A7
POD_A8
POD_A9

POD_A14

MUX_TSI_CLK

MUX_TSI_VAL

MUX_TSI_SYNC

MUX_TSI_D7
MUX_TSI_D6
MUX_TSI_D5
MUX_TSI_D4
MUX_TSI_D3
MUX_TSI_D2
MUX_TSI_D1
MUX_TSI_D0

CI_WAIT_N

MAIN PWB(10/46)

CI_CD1_N

MAIN PWB(9/46)

MAIN PWB(10/46)

CI_CD2_N
CI_CE1_N

CI_IRQ_N

CI_RESET

POD_DET#
POD_DAT_DIR

POD_A4
POD_A5
POD_A6
POD_A7
POD_A8
POD_A9
POD_A14

MUX_TSI_CLK
MUX_TSI_VAL
MUX_TSI_SYNC

MUX_TSI_D7
MUX_TSI_D6
MUX_TSI_D5
MUX_TSI_D4
MUX_TSI_D3
MUX_TSI_D2
MUX_TSI_D1
MUX_TSI_D0

CI_WAIT_N

CI_CD1_N
CI_CD2_N
CI_CE1_N

CI_IRQ_N
CI_RESET

W1

OOB_CTX

W2

OOB_CRX

W3

OOB_DRX

AD4

POD_DETEC_N

AD5

POD_DIR_N

AE3

POD_A4_CTX

AF3

POD_A5_ITX

AF2

POD_A6_ETX

AG2

POD_A7_QTX

AF1

POD_A8_CRX

AG1

POD_A9_DRX

W5

POD_A14_MCLKO

W6

POD_VS2_MCLKO

Y5

POD_BVD2_MOVAL

Y4

POD_BVD1_MOSTRT

AB1

POD_D15_MDO7

AA1

POD_D14_MDO6

Y1

POD_D13_MDO5

AB2

POD_D12_MDO4

AA2

POD_D11_MDO3

Y2

POD_D10_MDO2

AA3

POD_D9_MDO1

Y3

POD_D8_MDO0

V3

POD_WAIT_N

V5

POD_CD1

V4

POD_CD2

AE4

POD_CE_1

W4

POD_CE_2

V2

POD_READY_IRQ_N

V1

POD_RESET

Bootstrap Pin Name

BSTRAP_BOOT_MODE

B B

BSTRAP_EXT_OSC

BSTRAP_16BIT_FLASH

BSTRAP_NAND_FLASH_EN

BSTRAP_PAGESIZE

BSTRAP_NAND_FLASH_DWIDTH

A A

BSTRAP_NOR_FLASH_SEL

POD_HOST_A0
POD_HOST_A1

POD_HOST_A2

POD_HOST_A3

POD_HOST_A4

POD_HOST_A5

POD_HOST_A6

POD_HOST_A7

POD_HOST_D0/SPI_SDI

POD_HOST_D1
POD_HOST_D2
POD_HOST_D3
POD_HOST_D4
POD_HOST_D5
POD_HOST_D6
POD_HOST_D7

HOST_D8

HOST_D9
HOST_D10
HOST_D11
HOST_D12
HOST_D13
HOST_D14
HOST_D15

POD_HOST_A0
POD_HOST_A1

POD_HOST_A2/SPI_SDO

POD_HOST_A3/SPI_CLK

POD_REG_HOST_A4

POD_IOWR_HOST_A5

POD_IORD_HOST_A6

HOST_A7

HOST_A8

HOST_A9

POD_HOST_A10
POD_HOST_A11
POD_HOST_A12
POD_HOST_A13

HOST_A14
HOST_A15
HOST_A16
HOST_A17
HOST_A18
HOST_A19
HOST_A20
HOST_A21
HOST_A22
HOST_A23
HOST_A24

POD_WE_HOST_WR

POD_OE_HOST_RD

HOST_ACK

HOST_DEV_CS2_N
HOST_DEV_CS1_N
HOST_DEV_CS0_N

HOST_BOOT_CS_N

HOST_READY

Description

Pins POD_HOST_A[1:0] indicate on chip
hardware the host interface configuration
to use after hard reset:
A1;A0 = 00 = Function test, vendor mode.
A1;A0 = 01 = Function test, vendor mode.
A1;A0 = 10 = Boot from FLASH
A1;A0 = 11 = Boot from IROM

Pin POD_HOST_A2 indicates:
0 = Internal osc
1 = External osc

Pin POD_HOST_A3 indicates type of
memory for external boot FLASH.
0 = 8-bit FLASH
1 = 16-bit FLASH

Pin PODREG_HOST_A4 indicates type of
memory for external boot FLASH.
0 = NOR FLASH
1 = NAND FLASH

Pin POD_IOWR_HOST_A5 indicates page
size for off chip NAND FLASH.
0 = Small page NAND FLASH
1 = Large page NAND FLASH

Pin POD_IORD_HOST_A6 indicates data
width for NAND FLASH (used by IROM
boot s/w only).
0 = 8-bit NAND FLASH
1 = 16-bit NAND FLASH

Pin HOST_A[7] selects whether parallel
NOR flash or SPI flash is used for boot
when BSTRAP_BOOT_MODE=10 (IROM
bypass). Ignored if
BSTRAP_BOOT_MODE != 10.
0 = boot from parallel NOR flash
1 = boot from SPI flash

4

AG7
AJ8
AG8
AE7
AH9
AF9
AJ10
AG10
AF7
AH8
AE8
AJ9
AG9
AE9
AH10
AF10

AJ15
AH15
AG15
AE14
AF14
AG14
AH14
AJ14
AE13
AF12
AG12
AH12
AJ12
AE11
AF11
AG11
AH11
AE10
AF13
AG13
AE12
AD13
AH13
AJ11
AD9

AJ13
AF8

AG3

AE5
AF4
AJ4
AG6

AH5

HOST_D0
HOST_D1
HOST_D2
HOST_D3
HOST_D4
HOST_D5
HOST_D6
HOST_D7
HOST_D8
HOST_D9
HOST_D10
HOST_D11
HOST_D12
HOST_D13
HOST_D14
HOST_D15

HOST_A1
HOST_A2
HOST_A3
HOST_A4
HOST_A5
HOST_A6
HOST_A7
HOST_A8
HOST_A9
HOST_A10
HOST_A11
HOST_A12
HOST_A13
HOST_A14
HOST_A15
HOST_A16
HOST_A17
HOST_A18
HOST_A19
HOST_A20
HOST_A21
HOST_A22
HOST_A23
HOST_A24

R189 330/1005
R193 330/1005

HOST_ACK

R199 000/1005

HOST_RD

3

HOST_D[15..0]

+3V3_A

MAIN PWB(9/46),(45/46),(46/46)

HOST_A[24..0]

PCB_TP08

HOST_CS0#

HOST_WE#
HOST_OE#

HOST_CS0#

HOST_BOOT_CS#

HOST_WE#
HOST_OE#

MAIN PWB(45/46)

HOST_BOOT_CS#

MAIN PWB(9/46)
MAIN PWB(9/46),(46/46)

MAIN PWB(45/46),(46/46)

MAIN PWB ASS'Y(8/46)
[Flash and CI Interface]

HU-71100006

HOST_WE#

HOST_A23

HOST_A24

A24 setting default value "0" when STi7103 access flash

HOST WE# setting default value "1" when STi7103 access flash

103/1005

103/1005

L182
BLM18PG300SN1D

HOST_A23
HOST_A24

Flash_WP#

R206 472/1005

R234

R220

103/1005

R217

2

C184

104p/16V/1005

HOST_A1

HOST_A2
HOST_A3
HOST_A4
HOST_A5
HOST_A6
HOST_A7
HOST_A8
HOST_A9
HOST_A10
HOST_A11
HOST_A12
HOST_A13
HOST_A14
HOST_A15
HOST_A16
HOST_A17
HOST_A18
HOST_A19
HOST_A20
HOST_A21
HOST_A22

R203 000/1005
R204
000/1005

TP181

1

+3V3_A

NOTE.
64 MBit FLASH : R203, R204, L26 OPEN
128 MBit FLASH : R204, L26 OPEN
256 MBit FLASH : L27 OPEN(P30 Series)

+3V3_A

C185
104p/16V/1005

U181

A1

A1

B1

A2

C1

A3

D1

A4

D2

A5

A2

A6

C2

A7

A3

A8

B3

A9

C3

A10

D3

A11

C4

A12

A5

A13

B5

A14

C5

A15

D7

A16

D8

A17

A7

A18

B7

A19

C7

A20

C8

A21

A8

A22

G1

A23

H8

A24

B6

NC(A25)

H1

RFU1

G2

RFU2

F1

RFU3

E8

RFU4

B8

RFU5

A4

VPP

H3

VCCA6VCC

VCCQD5VCCQD6VCCQ

VSSB2VSSH2VSSH4VSS

104p/16V/1005

PC28F256P33BF/BGA

G4

F2

DQ0

E2

DQ1

G3

DQ2

E4

DQ3

E5

DQ4

G5

DQ5

G6

DQ6

H7

DQ7

E1

DQ8

E3

DQ9

F3

DQ10

F4

DQ11

F5

DQ12

H5

DQ13

G7

DQ14

E7

DQ15

B4

CE

F8

OE

G8

WE

C6

WP

F6

ADV

E6

CLK

D4

RST

F7

WAIT

H6

BOOT STRAP SETTING

R187 103/1005

R191 103/1005

R195 103/1005
R197 103/1005

R201 103/1005

C181

HOST_D0
HOST_D1
HOST_D2
HOST_D3
HOST_D4
HOST_D5
HOST_D6
HOST_D7HOST_A0
HOST_D8
HOST_D9
HOST_D10
HOST_D11
HOST_D12
HOST_D13
HOST_D14
HOST_D15

#CS_FLASH_DG

HOST_OE#
HOST_WE#

R181

330/1005

POD_DET#
HOST_BOOT_CS#
HOST_RD
HOST_ACK

+3V3_A

C183

104p/16V/1005

C182

106p/10V/2012

MAIN PWB(45/46)

#CS_FLASH_DG

PWR_/RESET

MAIN PWB(6/46)

R184 OPEN-103/1005
R182 103/1005
R183 472/1005
R205 103/1005

HOST_A0
HOST_A1
HOST_A2
HOST_A3
HOST_A4
HOST_A5
HOST_A6
HOST_A7

R188 OPEN-103/1005
R190 103/1005
R192 OPEN-103/1005
R194 103/1005
R196 OPEN-103/1005
R198 OPEN-103/1005
R200 103/1005
R202 OPEN-103/1005

+3V3_A

1

+3V3_A

R185
103/1005

+3V3_A

R186

Flash_WP#

All location are from 181 to 220

5

4

3

2

1

hb1_main_0612_6/48_0.0

2-24(No.YA705<Rev.001>)(No.YA705<Rev.001>)2-23

MAIN PWB CIRCUIT DIAGRAM (9/46) [CI Select]

5

MAIN PWB(10/46)

D D

MAIN PWB(8/46),(24/46)

C C

MAIN PWB(10/46)

MAIN PWB

(8/46),(24/46)

B B

MUX_TSI_SYNC

MAIN PWB(8/46),(24/46)

PPKT_D[7..0]

PPKT_CLK

PPKT_VAL

PPKT_SYNC

MUX_TSI_VAL

MUX_TSI_CLK

MUX_TSI_D0
MUX_TSI_D1
MUX_TSI_D2
MUX_TSI_D3
MUX_TSI_D4
MUX_TSI_D5
MUX_TSI_D6
MUX_TSI_D7

TS_SEL_CI0

MUX_TSI_D0
MUX_TSI_D1
MUX_TSI_D2
MUX_TSI_D3
MUX_TSI_D4
MUX_TSI_D5
MUX_TSI_D6
MUX_TSI_D7

nTS_SEL_CI0

PPKT_CLK

PPKT_VAL

PPKT_SYNC

TS_SEL_CI0
nTS_SEL_CI0

MUX_TSI_D0
MUX_TSI_D1
MUX_TSI_D2
MUX_TSI_D3
MUX_TSI_D4
MUX_TSI_D5
MUX_TSI_D6
MUX_TSI_D7

MUX_TSI_VAL
MUX_TSI_SYNC

MUX_TSI_CLK

MUX_TSI_D1
MUX_TSI_D2
MUX_TSI_D3
MUX_TSI_D4
MUX_TSI_D5
MUX_TSI_D6
MUX_TSI_D7

POD_DET#

PPKT_D0
PPKT_D1
PPKT_D2
PPKT_D3
PPKT_D4
PPKT_D5
PPKT_D6
PPKT_D7

A1
B1
C1
D1
E3
D2
C3
B2

A2
A4

SN74LVC244AZQNR

A1
B1
C1
D1
E3
D2
C3
B2

A2
A4

SN74LVC244AZQNR

A1

1A1

B1

1A2

C1

1A3

D1

1A4

E3

2A1

D2

2A2

C3

2A3

B2

2A4

A2

1OE

A4

2OE

SN74LVC244AZQNR

A1

1A1

B1

1A2

C1

1A3

D1

1A4

E3

2A1

D2

2A2

C3

2A3

B2

2A4

A2

1OE

A4

2OE

SN74LVC244AZQNR

1A1
1A2
1A3
1A4
2A1
2A2
2A3
2A4

1OE
2OE

1A1
1A2
1A3
1A4
2A1
2A2
2A3
2A4

1OE
2OE

DGND

U213

1Y1
1Y2
1Y3
1Y4
2Y1
2Y2
2Y3
2Y4

VCC

DGND

DGND

DGND

U219

1Y1
1Y2
1Y3
1Y4
2Y1
2Y2
2Y3
2Y4

VCC

U218

1Y1
1Y2
1Y3
1Y4
2Y1
2Y2
2Y3
2Y4

VCC

U212

1Y1
1Y2
1Y3
1Y4
2Y1
2Y2
2Y3
2Y4

VCC

MAIN PWB(7/46)

CI_ACC_EN

CI_CE1_N

A A

R1024 OPEN-330/1005

R243 000/1005

R216 OPEN-000/1005

CI_BUFF_ENPOD_DET#

HOST_A6

1

2

3

U214

OE

INA

GND

74LVC1G125

4

B4
C4
D4
E4
E2
D3
C2
B3

+3V3_D

A3
E1

B4
C4
D4
E4
E2
D3
C2
B3

+3V3_D

A3
E1

B4
C4
D4
E4
E2
D3
C2
B3

+3V3_D

A3
E1

PR211
101*4/1005

PR212
101*4/1005

PR213

18

101*4/1005

27
36
45

18
27
36
45
18
27
36
45

TS_ST_DATA0
TS_ST_DATA1
TS_ST_DATA2
TS_ST_DATA3
TS_ST_DATA4
TS_ST_DATA5
TS_ST_DATA6
TS_ST_DATA7

TS_ST_CLK

TS_ST_VAL

TS_ST_SYNC

MAIN PWB(8/46),(46/46)

MDO_D0MUX_TSI_D0

B4

MDO_D1

C4

MDO_D2

D4

MDO_D3

E4

MDO_D4

E2

MDO_D5

D3

MDO_D6

C2

MDO_D7

B3

+3V3_D

A3
E1

MDO_D[7..0]

MAIN PWB(10/46)

MAIN PWB(8/46)

MAIN PWB(7/46)

VCC

+3V3_D

5

CI_IORD_N

4

Y

CI_IORD_N

3

MAIN PWB(8/46),(45/46),(46/46)

TS_ST_DATA[7..0]

MAIN PWB(34/46)

MAIN PWB(8/46)

MAIN PWB(8/46),(45/46),(46/46)

TS_ST_CLK

TS_ST_VAL
TS_ST_SYNC

MAIN PWB(8/46)

MAIN PWB(34/46)

HOST_WE#
HOST_OE#

MAIN PWB(8/46),(24/46)

POD_DET#

TS_SEL_CI

TS_SEL_CI
1 : TUNER out TS (free)
0 : CI out TS ( scramble)

OPEN-000/1005

HOST_D[15..0]

MAIN PWB(8/46)

HOST_WE#
HOST_OE#

MAIN PWB(8/46)

R212

R211

000/1005

2

POD_DAT_DIR

POD_A7
POD_A6
POD_A8
POD_A4

CI_CE1_N

POD_A5

POD_A14

POD_A9

HOST_A[24..0]

R219 330/1005
R218 330/1005

MUX_TSI_VAL

MUX_TSI_SYNC

MUX_TSI_CLK

POD_DET#

+3V3_D +3V3_D

R215
472/1005

R214

103/1005

1

Q211

MMBT4401

HOST_D0
HOST_D1
HOST_D2
HOST_D3
HOST_D4
HOST_D5
HOST_D6
HOST_D7

+3V3_D

POD_A7
POD_A6
POD_A8
POD_A4

POD_A5
POD_A14
POD_A9

CI_BUFF_EN

HOST_A0
HOST_A1
HOST_A2
HOST_A3
HOST_A13
HOST_A10
HOST_A11
HOST_A12

CI_BUFF_EN

HOST_A4
HOST_A5

MUX_TSI_VAL
MUX_TSI_SYNC
MUX_TSI_CLK

CI_BUFF_EN

POD_DET#

R213
103/1005

nTS_SEL_CI0

TS_SEL_CI0

23

1

U211

B4

B1

B2

B2

C4

B3

C3

B4

D4

B5

D2

B6

E4

B7

E3

B8

A3

VCC

E1

DGND

SN74LVC245AZQNR

A1

1A1

B1

1A2

C1

1A3

D1

1A4

E3

2A1

D2

2A2

C3

2A3

B2

2A4

A2

1OE

A4

2OE

SN74LVC244AZQNR

A1
B1
C1
D1
E3
D2
C3
B2

A2
A4

SN74LVC244AZQNR

A1
B1
C1
D1
E3
D2
C3
B2

A2
A4

SN74LVC244AZQNR

C219

104p/16V/1005

A1
A2
A3
A4
A5
A6
A7
A8

DIR

OE

U217

1A1
1A2
1A3
1A4
2A1
2A2
2A3
2A4

1OE
2OE

1A1
1A2
1A3
1A4
2A1
2A2
2A3
2A4

1OE
2OE

C212

104p/16V/1005

A1
B3
B1
C2
C1
D3
D1
E2

A2
A4

B4

1Y1

C4

1Y2

D4

1Y3

E4

1Y4

E2

2Y1

D3

2Y2

C2

2Y3

B3

2Y4

A3

VCC

E1

DGND

U215

1Y1
1Y2
1Y3
1Y4
2Y1
2Y2
2Y3
2Y4

VCC

DGND

U216

1Y1
1Y2
1Y3
1Y4
2Y1
2Y2
2Y3
2Y4

VCC

DGND

C214

C211

104p/16V/1005

CI_D0
CI_D1
CI_D2
CI_D3
CI_D4
CI_D5
CI_D6
CI_D7

POD_DAT_DIR
CI_BUFF_EN

CI_A7
CI_A6
CI_A8
CI_A4
CI_CE1_N#CI_CE1_N
CI_A5
CI_A14
CI_A9

+3V3_D

B4
C4
D4
E4
E2
D3
C2
B3

+3V3_D

A3
E1

CI_WE_N

B4

CI_OE_N

C4

CI_REG_N

D4

CI_IOWR_N

E4
E2

MDO_VAL

D3

MDO_SYNC

C2

MDO_CLK

B3

A3
E1

C213

104p/16V/1005

104p/16V/1005

CI_A0
CI_A1
CI_A2
CI_A3
CI_A13
CI_A10
CI_A11
CI_A12

+3V3_D

C215

104p/16V/1005

CI_D[7..0]

CI_WE_N
CI_OE_N
CI_REG_N
CI_IOWR_N

MDO_VAL
MDO_SYNC
MDO_CLK

C216

C217

104p/16V/1005

MAIN PWB
(10/46)

CI_A[14..0]

CI_CE1_N#

MAIN PWB
(10/46)

MAIN PWB
(10/46)

+3V3_D

C218

104p/16V/1005

104p/16V/1005

MAIN PWB ASS'Y(9/46)

All location are from 211 to 220

[CI Select]

HU-71100006

5

4

3

2

1

hb1_main_0612_7/48_0.0

(No.YA705<Rev.001>)2-25 2-26(No.YA705<Rev.001>)

MAIN PWB CIRCUIT DIAGRAM (10/46) [CI Slot]

5

+3V3_A

D D

R221

103/1005

CI_CE1_N#

CI_OE_N

R223

103/1005

R224

103/1005

MAIN PWB(9/46)

CI_WE_N

MAIN PWB(8/46)

C C

MAIN PWB(9/46)

B B

CI_IRQ_N

CI_D[7..0]

CI_A[14..0]

CI_D0
CI_D1
CI_D2
CI_D3
CI_D4
CI_D5
CI_D6
CI_D7

CI_A0
CI_A1
CI_A2
CI_A3
CI_A4
CI_A5
CI_A6
CI_A7
CI_A8
CI_A9
CI_A10
CI_A11
CI_A12
CI_A13
CI_A14

R225

103/1005

CI_D3
CI_D4
CI_D5
CI_D6
CI_D7
CI_CE1_N#
CI_A10
CI_OE_N
CI_A11
CI_A9
CI_A8
CI_A13
CI_A14
CI_WE_N
CI_IRQ_N

CI_MIVAL
CI_MCLKI
CI_A12
CI_A7
CI_A6
CI_A5
CI_A4
CI_A3
CI_A2
CI_A1
CI_A0
CI_D0

VCC_CI

CI_D1
CI_D2

R233 103/1005

VCC_CI

4

C221

104p/16V/1005

10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34

1
2
3
4
5
6
7
8
9

R222

C227

121/5025

104p/16V/1005

JP221

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34

35

35

36

36

37

37

38

38

39

39

40

40

41

41

42

42

43

43

44

44

45

45

46

46

47

47

48

48

49

49

50

50

51

51

52

52

53

53

54

54

55

55

56

56

57

57

58

58

59

59

60

60

61

61

62

62

63

63

64

64

65

65

66

66

67

67

68

68

696970

70

A01C5A0045P1P00/1-SLOT

CI_MDO_3
CI_MDO_4
CI_MDO_5
CI_MDO_6
CI_MDO_7

CI_IORD_N
CI_IOWR_N
CI_MISTART
CI_MDI_0
CI_MDI_1
CI_MDI_2
CI_MDI_3

CI_MDI_4
CI_MDI_5
CI_MDI_6
CI_MDI_7
CI_MCLKO
CI_RESET
CI_WAIT_N

CI_REG_N
CI_MOVAL

CI_MOSTART

CI_MDO_0
CI_MDO_1
CI_MDO_2
CI_CD2_N

R232 103/1005

R227 103/1005

VCC_CI

R228 103/1005

3

R229 104/1005

R239 103/1005

104p/16V/1005

C228

+3V3_AVCC_CI

R230 103/1005

R226 103/1005

C229

104p/16V/1005

R231 103/1005

CI_CD1_N

CI_IORD_N
CI_IOWR_N

CI_RESET

CI_WAIT_N

CI_REG_N

CI_CD2_N

MAIN PWB(8/46)

MAIN PWB(9/46)

MAIN PWB(8/46)

MAIN PWB(9/46)

MAIN PWB(8/46)

2

TS INPUT

CI_MDI_0
CI_MDI_1
CI_MDI_2
CI_MDI_3
CI_MDI_4
CI_MDI_5
CI_MDI_6
CI_MDI_7

CI_MISTART
CI_MIVAL

CI_MCLKI MDO_CLK

PR221

18

330*4/1005

27
36
45

PR222

18

330*4/1005

27
36
45

PR223

18

330*4/1005

27
36
45

MDO_D0
MDO_D1
MDO_D2
MDO_D3
MDO_D4
MDO_D5
MDO_D6
MDO_D7

MDO_SYNC
MDO_VAL

TS OUTPUT

U221

+5V

A1
O1

O6

A2
O2

O5

A3
O3

O4

DGND

OPEN-74HC14

PPKT_D0
PPKT_D1
PPKT_D2
PPKT_D3
PPKT_D4
PPKT_D5
PPKT_D6
PPKT_D7

PPKT_VAL
PPKT_SYNC

14
13

A6

12
11

A5

10
9

A4

8

+3V3_A

CI_MDO_0
CI_MDO_1
CI_MDO_2
CI_MDO_3
CI_MDO_4
CI_MDO_5
CI_MDO_6
CI_MDO_7

M_CLK PPKT_CLK

CI_MOVAL
CI_MOSTART

CI_MCLKO

R240 000/1005

M_CLK

PR224

18

330*4/1005

27
36
45

PR225

18

330*4/1005

27
36
45

PR226

18

330*4/1005

27
36
45

R241 OPEN_000/1005

1
2
3
4
5
6
7

These all of components must be located near Douglas

1

MDO_D[7..0]

MDO_SYNC
MDO_VAL

MDO_CLK

PPKT_D[7..0]

PPKT_CLK

PPKT_VAL
PPKT_SYNC

R242

OPEN_000/1005

MAIN PWB
(9/46)

MAIN PWB
(9/46)

M_CLK

+5V

R235

472/1005 --> 473/1005

+3V3_A

R237

332/1005

C225

R236

OPEN-752/1005

A A

MAIN PWB(6/46)

CI_PWR

OPEN-682p/50V/1005

1

473/1005

R238
103/1005

Q222
MMBT4401

23

C224

225p/16V

1

IRLML6402TRPBF

Q221

2

3

C226

106p/10V/2012

C223

104p/16V/1005

VCC_CI

C222

106p/10V/2012

MAIN PWB ASS'Y(10/46)
[CI Slot]

HU-71100006

All location are from 221 to 250

5

4

3

2

1

hb1_main_0612_8/48_0.0

2-28(No.YA705<Rev.001>)(No.YA705<Rev.001>)2-27

MAIN PWB CIRCUIT DIAGRAM (11/46) [DDR Interface]

5

VDDR_MEM

D D

F25

F27

F29

H24

H27

H29

K25

K27

K29

M29

AF25

D25

SDDR_D0
SDDR_D1
SDDR_D2
SDDR_D3
SDDR_D4
SDDR_D5
SDDR_D6
SDDR_D7
SDDR_DM0
SDDR_DQS0
SDDR_DQS0#

SDDR_D8
SDDR_D9
SDDR_D10
SDDR_D11
SDDR_D12
SDDR_D13
SDDR_D14
SDDR_D15

C C

B B

SDDR_DM1
SDDR_DQS1
SDDR_DQS1#

SDDR_D16
SDDR_D17
SDDR_D18
SDDR_D19
SDDR_D20
SDDR_D21
SDDR_D22
SDDR_D23
SDDR_DM2
SDDR_DQS2
SDDR_DQS2#

SDDR_D24
SDDR_D25
SDDR_D26
SDDR_D27
SDDR_D28
SDDR_D29
SDDR_D30
SDDR_D31
SDDR_DM3
SDDR_DQS3
SDDR_DQS3#

F24
M24

J25
K26
M26
E25

L25
F26
K24
H25
H26

E29

L29
H28

J29

L27
E27
K28
F28

J27
G28
G29

Y24

AF28
AC25
AD26

AF26

W25

AE25

Y26
AD24
AB25
AB26

W29
AE29
AB28
AC29
AE27

W27
AD28

Y28
AC27
AA28
AA29

CD267

104p/16V/1005

DDR_D0
DDR_D1
DDR_D2
DDR_D3
DDR_D4
DDR_D5
DDR_D6
DDR_D7
DDR_DM0
DDR_DQS0
DDR_DQS0_N

DDR_D8
DDR_D9
DDR_D10
DDR_D11
DDR_D12
DDR_D13
DDR_D14
DDR_D15
DDR_DM1
DDR_DQS1
DDR_DQS1_N

DDR_D16
DDR_D17
DDR_D18
DDR_D19
DDR_D20
DDR_D21
DDR_D22
DDR_D23
DDR_DM2
DDR_DQS2
DDR_DQS2_N

DDR_D24
DDR_D25
DDR_D26
DDR_D27
DDR_D28
DDR_D29
DDR_D30
DDR_D31
DDR_DM3
DDR_DQS3
DDR_DQS3_N

CD268
104p/16V/1005

DDR_VDD

DDR_VDD

DDR_VDD

DDR_VDD

CVSS

CVSS

CVSS

E24

E26

E28

CD269
104p/16V/1005

DDR_VDD

DDR_VDD

CVSS

CVSS

G24

G26

G27

DDR_VDD

DDR_VDD

CVSS

CVSS

J24

J26

CD270
104p/16V/1005

M25

DDR_VDD

DDR_VDD

DDR_VDD

DDR_VDD

CVSS

CVSS

CVSS

CVSS

J28

L24

L26

CD271
104p/16V/1005

N24

DDR_VDD

CVSS

L28

N27

P28

R25

U25

DDR_VDD

DDR_VDD

DDR_VDD

DDR_VDD

U102A

FLI10620H

CVSS

CVSS

CVSS

CVSS

T24

P26

N28

CD272
104p/16V/1005

Y25

V27

Y27

DDR_VDD

DDR_VDD

DDR_VDD

CVSS

CVSS

CVSS

T26

V29

W24

Y29

AB24

AB27

AB29

AD25

DDR_VDD

DDR_VDD

DDR_VDD

DDR_VDD

DDR_VDD

CVSS

CVSS

CVSS

CVSS

CVSS

W26

W28

AA24

AA26

AA27

CD274

104p/16V/1005

CD273

104p/16V/1005

AD27

AC24

AD29

AF27

AF29

DDR_VDD

DDR_VDD

DDR_VDD

DDR_VDD

CVSS

CVSS

CVSS

CVSS

AE24

AC26

AC28

CD275
104p/16V/1005

4

D27

D29

DDR_VDD

DDR_VDD

CVSS

CVSS

CVSS

D26

AE26

AE28

CD252
104p/16V/1005

R24

AA25

G25

DDR_VDDI
DDR_VDDI

DDR_VRF_1

DDR_VRF_2

DDR_VRF_0

DLL_VAA0
DLL_VAA1

DDR_A0
DDR_A1
DDR_A2
DDR_A3
DDR_A4
DDR_A5
DDR_A6
DDR_A7
DDR_A8

DDR_A9
DDR_A10
DDR_A11
DDR_A12

DDR_BA0
DDR_BA1

DDR_CAS_N
DDR_RAS_N

DDR_CS_N

DDR_WE_N

DDR_CK

DDR_CK_N

DDR_CKE

DDR_ODT

DDR_CAL

RPLL_AVDD12

DDRPLL_AVDD12

RPLL_AGND

RPLL_AVDD33

DDRPLL_AVDD33

DDRPLL_AGND

RPLL_AGND

CVSS

D28

CD276

104p/16V/1005

CD277

104p/16V/1005

VDDR_MEM

CD251

104p/16V/1005

CD253
102p/50V/1005

F23
AD23

M28
V24

P27
U29
R26
U26
P25
T28
R27
V28
R29
T29
V25
R28
V26

U28
T27

P24
N26
N25
T25

P29
N29

U27

M27

U24

C23
D22

B22

B23
E22

E21
C22

CD278

104p/16V/1005

DDR_VRF

CD255

226p/6.3V/2012

CD254

105p/16V/1005

SDDR_A0
SDDR_A1
SDDR_A2
SDDR_A3
SDDR_A4
SDDR_A5
SDDR_A6
SDDR_A7
SDDR_A8
SDDR_A9
SDDR_A10
SDDR_A11
SDDR_A12

SDDR_BA0
SDDR_BA1

SDDR_CAS
SDDR_RAS
SDDR_CS
SDDR_WE

RD262 100/1005
RD263 100/1005

RD276 103/1005
RD265 103/1005

RD268 2940/F/1005

CD280

104p/16V/1005
CD279
104p/16V/1005

CD281

104p/16V/1005

CD256

103p/50V/1005

CD263

103p/50V/1005

CD265

103p/50V/1005

CD282

104p/16V/1005

CD257
103p/50V/1005

CD260
103p/50V/1005

VDDR_MEM

CD283

104p/16V/1005

3

CD258

226p/6.3V/2012

CD261
103p/50V/1005

The CKE pull down is for power off
mode DDR self refresh

DDR2_CKE

CD264

103p/50V/1005

CD266

103p/50V/1005

CD284
104p/16V/1005

+3V3_A

RD251

1R0/2012

CD259

226p/6.3V/2012

RD252
1R0/2012

CD262
226p/6.3V/2012

DDR2_CLK
DDR2_CLK_N

DDR2_CKE

DDR2_ODT

LD251

BLM18PG300SN1D

+3V3_A

LD252

BLM18PG300SN1D

+1V2

MAIN PWB(12/46)

SDDR_D2
SDDR_D0
SDDR_D7
SDDR_D5
SDDR_D4
SDDR_D1
SDDR_D3
SDDR_D6

SDDR_D15
SDDR_D8
SDDR_D13
SDDR_D10
SDDR_D11

SDDR_D12
SDDR_D9
SDDR_D14
SDDR_D18
SDDR_D16
SDDR_D23
SDDR_D21
SDDR_D17
SDDR_D22
SDDR_D20
SDDR_D19

SDDR_D31
SDDR_D29
SDDR_D24
SDDR_D26
SDDR_D27

SDDR_D28
SDDR_D25
SDDR_D30

SDDR_DM0
SDDR_DM1
SDDR_DM2

SDDR_DQS0
SDDR_DQS0#

SDDR_DQS1
SDDR_DQS1#

SDDR_DQS2
SDDR_DQS2#

SDDR_DQS3
SDDR_DQS3#

SDDR_A11
SDDR_A2
SDDR_A8
SDDR_A0
SDDR_A5
SDDR_A4
SDDR_A9
SDDR_A6
SDDR_A10
SDDR_A12
SDDR_A3
SDDR_A7
SDDR_A1

SDDR_BA0
SDDR_BA1

SDDR_RAS
SDDR_CAS
SDDR_CS

SDDR_WE

2

PR251 100*4/1005

PR252 100*4/1005

PR254 100*4/1005

RD272 100/1005
RD273 100/1005
PR257 100*4/1005

PR258 100*4/1005

PR260 100*4/1005

PR261 100*4/1005

RD274 100/1005
RD275 100/1005
PR262 100*4/1005

RD253 100/1005
RD257 100/1005
RD264 100/1005
RD269 100/1005

RD254 100/1005
RD255 100/1005

RD259 100/1005
RD261 100/1005

RD266 100/1005
RD267 100/1005

RD270 100/1005
RD271 100/1005

PR253 100*4/1005

PR255 100*4/1005

PR256 100*4/1005

RD256 100/1005

RD258 100/1005
RD260 100/1005

PR259 100*4/1005

RD277 100/1005

45
36
27
18
45
36
27
18
18
27
36
45

18
27
36
45
45
36
27
18
45
36
27
18
18
27
36
45

18
27
36
45

18
27
36
45
18
27
36
45
18
27
36
45

45
36
27
18

DDR2_D2
DDR2_D0
DDR2_D7
DDR2_D5
DDR2_D4
DDR2_D1
DDR2_D3
DDR2_D6

DDR2_D15
DDR2_D8
DDR2_D13
DDR2_D10
DDR2_D11

DDR2_D12
DDR2_D9
DDR2_D14
DDR2_D18
DDR2_D16
DDR2_D23
DDR2_D21
DDR2_D17
DDR2_D22
DDR2_D20
DDR2_D19

DDR2_D31
DDR2_D29
DDR2_D24
DDR2_D26
DDR2_D27

DDR2_D28
DDR2_D25
DDR2_D30

DDR2_DM0
DDR2_DM1
DDR2_DM2
DDR2_DM3SDDR_DM3

DDR2_DQS0
DDR2_DQS0#

DDR2_DQS1
DDR2_DQS1#

DDR2_DQS2
DDR2_DQS2#

DDR2_DQS3
DDR2_DQS3#

DDR2_A11
DDR2_A2
DDR2_A8
DDR2_A0
DDR2_A5
DDR2_A4
DDR2_A9
DDR2_A6
DDR2_A10
DDR2_A12
DDR2_A3
DDR2_A7
DDR2_A1

DDR2_BA0
DDR2_BA1

DDR2_D[31:0]

DDR2_DM0
DDR2_DM1
DDR2_DM2
DDR2_DM3

DDR2_DQS0
DDR2_DQS0#

DDR2_DQS1
DDR2_DQS1#

DDR2_DQS2
DDR2_DQS2#

DDR2_DQS3
DDR2_DQS3#

DDR2_A[12:0]

DDR2_BA0
DDR2_BA1

DDR2_RAS
DDR2_CAS
DDR2_CS

DDR2_WE

1

DDR2_D[31:0]

MAIN PWB(12/46)

DDR2_A[12:0]

CD287

102p/50V/1005

A A

CD285

102p/50V/1005

CD286
102p/50V/1005

CD289

102p/50V/1005

CD288

102p/50V/1005

CD291
102p/50V/1005

CD290

102p/50V/1005

CD293
102p/50V/1005

CD292

102p/50V/1005

CD295
102p/50V/1005

CD294

102p/50V/1005

CD296

102p/50V/1005

MAIN PWB ASS'Y(11/46)
[DDR Interface]

All location are from D251 to D320

5

CD297

105p/16V/1005

CD298

4

105p/16V/1005

CD299
226p/6.3V/2012

(No.YA705<Rev.001>)2-29 2-30(No.YA705<Rev.001>)

CD300
226p/6.3V/2012

3

HU-71100006

2

1

hb1_main_0612_9/48_0.0

MAIN PWB CIRCUIT DIAGRAM (12/46) [DDR2 Memory]

5

DDR2_A[12:0]

D D

DDR2_D[31:0]

C C

MAIN PWB(11/46)

DDR2_BA0
DDR2_BA1

DDR2_CLK

DDR2_CLK_N

DDR2_CKE

DDR2_ODT

DDR2_CS
DDR2_RAS
DDR2_CAS

B B

DDR2_WE

DDR2_DM0
DDR2_DM1
DDR2_DM2
DDR2_DM3

DDR2_DQS0

DDR2_DQS0#

DDR2_DQS1

DDR2_DQS1#

DDR2_DQS2

DDR2_DQS2#

DDR2_DQS3#

DDR2_DQS3

DDR2_A0
DDR2_A1
DDR2_A2
DDR2_A3
DDR2_A4
DDR2_A5
DDR2_A6
DDR2_A7
DDR2_A8
DDR2_A9
DDR2_A10
DDR2_A11
DDR2_A12

DDR2_D0
DDR2_D1
DDR2_D2
DDR2_D3
DDR2_D4
DDR2_D5
DDR2_D6
DDR2_D7
DDR2_D8
DDR2_D9
DDR2_D10
DDR2_D11
DDR2_D12
DDR2_D13
DDR2_D14
DDR2_D15
DDR2_D16
DDR2_D17
DDR2_D18
DDR2_D19
DDR2_D20
DDR2_D21
DDR2_D22
DDR2_D23
DDR2_D24
DDR2_D25
DDR2_D26
DDR2_D27
DDR2_D28
DDR2_D29
DDR2_D30
DDR2_D31

DDR2_BA0
DDR2_BA1

DDR2_CLK
DDR2_CLK_N
DDR2_CKE

DDR2_ODT
DDR2_CS
DDR2_RAS
DDR2_CAS
DDR2_WE

DDR2_DM0
DDR2_DM1
DDR2_DM2
DDR2_DM3

DDR2_DQS0
DDR2_DQS0#

DDR2_DQS1
DDR2_DQS1#

DDR2_DQS2
DDR2_DQS2#

DDR2_DQS3#
DDR2_DQS3

VDDR_MEM

4

LD321

BLM18PG300SN1D

CD327

105p/16V/1005

3

VDDR_MEM

CD321

104p/16V/1005

UD321
H5PS5162FFR-Y5

DDR2_D0
DDR2_D3
DDR2_D7
DDR2_D4
DDR2_D1
DDR2_D5
DDR2_D6
DDR2_D2
DDR2_D8
DDR2_D9
DDR2_D10
DDR2_D11
DDR2_D12
DDR2_D13
DDR2_D14
DDR2_D15

VDDR_MEM VDDR_MEM

104p/16V/1005

CD328

G8

DQ0

G2

DQ1

H7

DQ2

H3

DQ3

H1

DQ4

H9

DQ5

F1

DQ6

F9

DQ7

C8

DQ8

C2

DQ9

D7

DQ10

D3

DQ11

D1

DQ12

D9

DQ13

B1

DQ14

B9

DQ15

A1

VDD

E1

VDD

J9

VDD

M9

VDD

R1

VDD

A9

VDDQ

C1

VDDQ

C3

VDDQ

C7

VDDQ

C9

VDDQ

E9

VDDQ

G1

VDDQ

G3

VDDQ

G7

VDDQ

G9

VDDQ

A3

VSS

E3

VSS

J3

VSS

N1

VSS

P9

VSS

B2

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

VDDL

VSSDL

LDQS#/NU

UDQS#/NU

B8
A7
D2
D8
E7

F2

F8
H2
H8

J1

J7

VREF

A10
A11
A12

BA0
BA1

CK#

CKE

ODT

CS#
RAS#
CAS#

WE#

LDQS

UDQS

LDM
UDM

RFU
RFU
RFU

J2

M8

A0

M3

A1

M7

A2

N2

A3

N8

A4

N3

A5

N7

A6

P2

A7

P8

A8

P3

A9

M2
P7
R2

L2
L3

J8

CK

K8
K2

K9
L8
K7
L7
K3

F7
B7

F3
B3

E8
A8

L1
R3
R7

A2

NC

E2

NC

R8

NC

CD323
102p/50V/1005

DDR2_A0
DDR2_A1
DDR2_A2
DDR2_A3
DDR2_A4
DDR2_A5
DDR2_A6
DDR2_A7
DDR2_A8
DDR2_A9
DDR2_A10
DDR2_A11
DDR2_A12

DDR2_BA0
DDR2_BA1

DDR2_CLK
DDR2_CLK_N
DDR2_CKE

DDR2_ODT
DDR2_CS
DDR2_RAS
DDR2_CAS
DDR2_WE

DDR2_DQS0
DDR2_DQS1

DDR2_DM0
DDR2_DM1

DDR2_DQS0# DDR2_DQS2#
DDR2_DQS1#

DDR_VRF

CD324
226p/6.3V/2012

DDR2_CLK

RD321
201/1005

DDR2_CLK_N

CD325

226p/6.3V/2012

DDR2_CLK

RD322
201/1005

DDR2_CLK_N

DDR_VRF

2

VDDR_MEM

CD322

104p/16V/1005

CD326

102p/50V/1005

DDR2_A0
DDR2_A1
DDR2_A2
DDR2_A3
DDR2_A4
DDR2_A5
DDR2_A6
DDR2_A7
DDR2_A8
DDR2_A9
DDR2_A10
DDR2_A11
DDR2_A12

DDR2_BA0
DDR2_BA1

DDR2_CLK
DDR2_CLK_N
DDR2_CKE

DDR2_ODT
DDR2_CS
DDR2_RAS
DDR2_CAS
DDR2_WE

DDR2_DQS2
DDR2_DQS3

DDR2_DM2
DDR2_DM3

DDR2_DQS3#

UD322
H5PS5162FFR-Y5

J2

VREF

M8

A0

M3

A1

M7

A2

N2

A3

N8

A4

N3

A5

N7

A6

P2

A7

P8

A8

P3

A9

M2

A10

P7

A11

R2

A12

L2

BA0

L3

BA1

J8

CK

K8

CK#

K2

CKE

K9

ODT

L8

CS#

K7

RAS#

L7

CAS#

K3

WE#

F7

LDQS

B7

UDQS

F3

LDM

B3

UDM

E8

LDQS#/NU

A8

UDQS#/NU

L1

RFU

R3

RFU

R7

RFU

A2

NC

E2

NC

R8

NC

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8

DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15

VDD

VDD

VDD

VDD

VDD

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSS

VSS

VSS

VSS

VSS

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

VDDL

VSSDL

G8
G2
H7
H3
H1
H9
F1
F9
C8
C2
D7
D3
D1
D9
B1
B9

A1
E1
J9
M9
R1

A9
C1
C3
C7
C9
E9
G1
G3
G7
G9

A3
E3
J3
N1
P9

B2
B8
A7
D2
D8
E7
F2
F8
H2
H8

J1

J7

DDR2_D16
DDR2_D20
DDR2_D23
DDR2_D17
DDR2_D22
DDR2_D21
DDR2_D19
DDR2_D18
DDR2_D29
DDR2_D25
DDR2_D26
DDR2_D27
DDR2_D28
DDR2_D24
DDR2_D30
DDR2_D31

CD329
104p/16V/1005

333MHz/512Mbit333MHz/512Mbit

VDDR_MEM

CD331

226p/6.3V/2012

CD333
226p/6.3V/2012

CD335
105p/16V/1005

CD337

104p/16V/1005

CD339

104p/16V/1005

CD341
103p/50V/1005

CD343
473p/16V/1005

CD345

473p/16V/1005

1

LD322
BLM18PG300SN1D

CD330
105p/16V/1005

VDDR_MEM

A A

All location are from D321 to D380

MAIN PWB ASS'Y(12/46)
[DDR2 Memory]

HU-71100006

5

CD332

VDDR_MEM

4

226p/6.3V/2012

CD346

226p/6.3V/2012

226p/6.3V/2012

CD347

CD334

105p/16V/1005

CD348
226p/6.3V/2012

CD349

105p/16V/1005

3

CD336

105p/16V/1005

CD350
105p/16V/1005

CD351

105p/16V/1005

CD338

104p/16V/1005

CD352

104p/16V/1005

CD353
104p/16V/1005

CD340

103p/50V/1005

CD354

104p/16V/1005

CD355
103p/50V/1005

CD342

103p/50V/1005

CD356
103p/50V/1005

CD357
103p/50V/1005

2

CD344

473p/16V/1005

CD358

473p/16V/1005

CD359
473p/16V/1005

CD360

473p/16V/1005

1

hb1_main_0612_10/48_0.0

2-32(No.YA705<Rev.001>)(No.YA705<Rev.001>)2-31

MAIN PWB CIRCUIT DIAGRAM (13/46) [A/V Input]

5

C381
103p/50V/1005

D D

C C

106p/10V/2012

106p/10V/2012

B B

C383
104p/16V/1005

C382

103p/50V/1005

+1V2

C417

+3V3_D

C432

AUDI_L1
AUDI_R1
AUDI_L2
AUDI_R2
AUDI_L3
AUDI_R3
AUDI_L4
AUDI_R4
AUDI_L5
AUDI_R5

L384

BLM18PG300SN1D

SC2_CVBS_OUT

R422 392/1005
R423 392/1005
R424 392/1005
R425 392/1005
R426 392/1005
R427 392/1005
R428 392/1005
R429 392/1005
R430 392/1005
R431 392/1005

C385
106p/10V/2012

C384

104p/16V/1005

C418
104p/16V/1005

SC_FB_IN

C433
104p/16V/1005

C419

104p/16V/1005

C434

104p/16V/1005

L381
BLM18PG300SN1D

E4

F4
G4
H4

K4

E3

F1
G3

F5
G5
H5

J5

K5

P6
R6

N6

G6

T6

T5

P2

P1

J4

+3V3_D

ADC_VDDA33
ADC_VDDA33
ADC_VDDA33
ADC_VDDA33
ADC_VDDA33

ADC_GNDA
ADC_GNDA
ADC_GNDA

ADC_GNDA
ADC_GNDA
ADC_GNDA
ADC_GNDA
ADC_GNDA

AUD_AVDD12
AUD_AVDD12

AUD_AVSS12

2WIRE_S0_SCL

2WIRE_S0_SDA

SCART_FB

AUD_AVDD33
AUD_AVDD33

AUD_AVSS33
AUD_AVSS33

VOUT2

AUD_VREFP
AUD_VREFN

AUD_MONO_IN

MAIN PWB(43/46)

U102B
FLI10620H

R_GRA
G_GRA
B_GRA

A1P
A2P
A3P
A4P

B1P
B2P
B3P
B4P

C1P
C2P
C3P
C4P

CN

SV1P
SV2P
SV3P
SV4P

SVN

AHS_ACS

AVS

SIF_IN

SIF_RTN

AUD_IN_L1
AUD_IN_R1
AUD_IN_L2
AUD_IN_R2
AUD_IN_L3
AUD_IN_R3
AUD_IN_L4
AUD_IN_R4
AUD_IN_L5
AUD_IN_R5

AUD_VCM

FB1

C386 104p/16V/1005

K1

C387 104p/16V/1005

J1

C388 104p/16V/1005

J2

C399 104p/16V/1005

C2

C400 104p/16V/1005

E2

C401 104p/16V/1005

G2

C402 104p/16V/1005

K3

C403 104p/16V/1005

D2

AN

C404 104p/16V/1005

B1

C405 104p/16V/1005

D1

C406 104p/16V/1005

G1

C407 104p/16V/1005

L2

C410 104p/16V/1005

F2

BN

C408 104p/16V/1005

C1

C411 104p/16V/1005

E1

C412 104p/16V/1005

H1

C409 104p/16V/1005

L1

C413 104p/16V/1005

H2

C414 104p/16V/1005

D3

C415 104p/16V/1005 R400 200/1005

F3

C416 104p/16V/1005

H3

C420 104p/16V/1005

J3

C421 104p/16V/1005

K2

J6
H6

A12
B12

C423 104p/16V/1005

K6

C424 104p/16V/1005

M6

C425 105p/16V/1005

M3

C426 105p/16V/1005

M4

C427 105p/16V/1005

M1

C428 105p/16V/1005

M2

C429 105p/16V/1005

N5

C430 105p/16V/1005

M5

C431 105p/16V/1005

N3

C435 105p/16V/1005

N4

C436 105p/16V/1005

N1

C437 105p/16V/1005

N2

L3
L4
L5

L6

2Vrms

A A

MAIN PWB(44/46)

FB2

FB2

PCB_TP08

1

TP385

4

R437
200/1005

R439
200/1005

AUDI_L1
AUDI_R1
AUDI_L2
AUDI_R2
AUDI_L3
AUDI_R3
AUDI_L4
AUDI_R4
AUDI_L5
AUDI_R5

C443

104p/16V/1005

3

+3V3_D +1V2

L382

BLM18PG300SN1D

106p/10V/2012

R381 200/1005
R382 200/1005
R383 200/1005

R384 200/1005
R385 200/1005
R386 200/1005
R387 200/1005
R388 57R6/F/1005

R389 200/1005
R390 200/1005
R391 200/1005 TP382
R392 200/1005
R394 57R6/F/1005

R395 200/1005
R396 200/1005
R397 200/1005
R393 200/1005
R398 57R6/F/1005

R399 200/1005

R401 200/1005
R402 200/1005
R403 57R6/F/1005

R405 200/1005
R406 57R6/F/1005

R408 103/1005
R409 103/1005
R410 103/1005
R411 103/1005
R412 103/1005
R413 103/1005
R414 103/1005
R415 103/1005
R416 103/1005
R417 103/1005

C444

106p/10V/2012

2

S1A

5

S1B

11

S1C

14

S1D

3

S2A

6

S2B

10

S2C

13

S2D

OPEN-102/1005

C441

104p/16V/1005

+5V

U383

16

IDTVS330QG

VCC

GND

8

VDAC_OUT

RF_CVBS

R407

DA
DB
DC
DD

IN

EN

4
7
9
12

1

15

PC_R
PC_G
PC_B

SCART1_G
SCART2_G
COMP_Y
SVHS_C

SCART1_B
SCART2_B
COMP_Pb
SVHS_Y

SCART1_R
SCART2_R
COMP_Pr
ST_CVBS_OUT

SCART1_CVBS
SCART2_CVBS
AV_CVBS
RF_CVBS

PC_HSYNC
PC_VSYNC

SIF

PC_LI
PC_RI
COMP_LI
COMP_RI
CVBS_LI
CVBS_RI
SCART1_LI
SCART1_RI
SCART2_LI
SCART2_RI

L385
BLM18PG300SN1D

C442

106p/10V/2012

C450

104p/16V/1005

SC_FB_INFB1

472/1005

MAIN PWB(39/46)

MAIN PWB(43/46)
MAIN PWB(44/46)

MAIN PWB(21/46)

MAIN PWB(43/46)
MAIN PWB(44/46)

MAIN PWB(21/46)

MAIN PWB(43/46)
MAIN PWB(44/46)

MAIN PWB(21/46)

MAIN PWB(38/46)

MAIN PWB(43/46)

MAIN PWB(44/46)
MAIN PWB(21/46)
MAIN PWB(1/46)

MAIN PWB(39/46)

MAIN PWB(1/46)

MAIN PWB(39/46)

MAIN PWB(21/46)

MAIN PWB(43/46)

MAIN PWB(44/46)

+3V3_D

+3V3_A

R440

SC_FB_SEL

PCB_TP08

R434 750/F/1005

PCB_TP08

SC1_CVBS_OUT

SC2_CVBS_OUT

+5V

L386
BLM18PG300SN1D

MAIN PWB(7/46)

C397

TP383

C422

104p/16V/1005

R404
182/F/1005

RF_CVBS

C438 106p/10V/2012

R419
OPEN-750/F/1005

C445 106p/10V/2012

R421
OPEN-750/F/1005

C389
104p/16V/1005

AJ1

1

AH1

AJ3

AH3

AJ2

1

AH2

AG5

AH4

R435
200/1005

R436
200/1005

C446

104p/16V/1005

C390

104p/16V/1005

104p/16V/1005

U102I
FLI10620H

VDAC_BU_P
VDAC_BU_N

VDAC_GY_YC_P
VDAC_GY_YC_N

VDAC_RV_P
VDAC_RV_N

VDAC_COMP

VDAC_RSET

C447
106p/10V/2012

2

C392
104p/16V/1005

C391

AF5

AF6

AE6

AD6

VDAC_VDD12

VDAC_AVDD33

VDAC_AVDD33

VDAC_AVDD33

VDAC_AVSS33

VDAC_AVSS33

AD7

AG4

2

S1A

5

S1B

11

S1C

14

S1D

3

S2A

6

S2B

10

S2C

13

S2D

1

2

3

4

VDAC_VSS12

AC6

U382

IN1

IN2

IN3

VCC

FMS6143

AUD_AVSS33

P5

+5V

16

VCC

GND

8

Video 6dB Amplifier

MAIN PWB ASS'Y(13/46)
[A/V Input]

U4

U5

U3

AUD_AVDD33

AUD_AVDD33

AUD_AVDD33

AUD_AVSS33

AUD_AVSS33

P4

P3

U381
IDTVS330QG

DA
DB
DC
DD

IN

EN

8

OUT1

7

OUT2

6

OUT3

5

GND

C393
104p/16V/1005

C394

104p/16V/1005

U2

AUD_OUT1_L

AUD_OUT1_R

AUD_HP_AVDD33

AUD_OUT2_L

AUD_OUT2_R

LS_OUT_L

LS_OUT_R

LS_OUT_SW

AUD_OUT_HP_L

AUD_OUT_HP_R

AUDIO_MUTE

AUD_HP_AVSS33

U1

C449

104p/16V/1005

SC1_CVBS_OUTVDAC_OUT

4
7
9
12

1

15

R418
000/1005
R420
000/1005

C395

104p/16V/1005

C396

104p/16V/1005

R1
R2
T3
T4
R3
R4
R5

000/1005

R443

T1

R444

T2

000/1005

AE1

+3V3_A

R438

472/1005

SC1_SEL

C439 470uF/16V/MVK/S

C440 470uF/16V/MVK/S

1

L383

BLM18PG300SN1D

C398
106p/10V/2012

SCART1_LO
SCART1_RO
SCART2_LO
SCART2_RO

PCB_TP08

1

TP381

HP_L_OUT
HP_R_OUT

MAIN PWB(7/46)

SC1_CVBSO

SC2_CVBSO

+3V3_D

MAIN PWB(43/46)

MAIN PWB(44/46)

PCB_TP08

1

MAIN PWB
(22/46)

TP384

HP_L_OUT
HP_R_OUT

MAIN PWB(43/46)

MAIN PWB(44/46)

All location are from 381 to 450

HU-71100006

5

4

3

2

1

hb1_main_0612_11/48_0.0

(No.YA705<Rev.001>)2-33 2-34(No.YA705<Rev.001>)

MAIN PWB CIRCUIT DIAGRAM (14/46) [LVDS Interface]

5

L451
BLM18PG300SN1D

D D

C C

+3V3_A

L452
BLM18PG300SN1D

C451
106p/10V/2012

C453

104p/16V/1005

C452

104p/16V/1005

AF24
AE22
AE21

AG26

AG27

AD21
AD22
AE23

U102E
FLI10620H

LVTX_VDD33
LVTX_VDD33
LVTX_VDD33

LVTX_PLL_VDD33

LVTX_VSS

LVTX_VSS
LVTX_VSS
LVTX_VSS

LVTX_ODD_CH0N_DISP23
LVTX_ODD_CH0P_DISP22
LVTX_ODD_CH1N_DISP21
LVTX_ODD_CH1P_DISP20
LVTX_ODD_CH2N_DISP19
LVTX_ODD_CH2P_DISP18
LVTX_ODD_CLKN_DISP17
LVTX_ODD_CLKP_DISP16
LVTX_ODD_CH3N_DISP15
LVTX_ODD_CH3P_DISP14

LVTX_ODD_CH4N_DISP3

LVTX_ODD_CH4P_DISP2

LVTX_ODD_CH5N_DISPCLK

LVTX_ODD_CH5P_DISPDE

LVTX_EVN_CH0N_DISP13

LVTX_EVN_CH0P_DISP12

LVTX_EVN_CH1N_DISP11

LVTX_EVN_CH1P_DISP10

LVTX_EVN_CH2N_DISP9

LVTX_EVN_CH2P_DISP8
LVTX_EVN_CLKN_DISP7
LVTX_EVN_CLKP_DISP6

LVTX_EVN_CH3N_DISP5

LVTX_EVN_CH3P_DISP4

LVTX_EVN_CH4N_DISP1

LVTX_EVN_CH4P_DISP0
LVTX_EVN_CH5N_DISPVS
LVTX_EVN_CH5P_DISPHS

PBIAS

PPWR

AH29
AJ29
AH28
AJ28
AH27
AJ27
AH26
AJ26
AH25
AJ25
AH24
AJ24
AG29
AG28

AH23
AJ23
AF23
AG23
AH22
AJ22
AF22
AG22
AH21
AJ21
AF21
AG21
AG25
AG24

B21
A21

4

R451 330/1005
R452 330/1005
R453 330/1005
R454 330/1005
R455 330/1005
R456 330/1005
R457 330/1005
R458 330/1005
R459 330/1005
R460 330/1005
R461 330/1005
R462 330/1005
R463 330/1005
R464 330/1005

R465 330/1005
R466 330/1005
R467 330/1005
R468 330/1005
R472 330/1005
R484 330/1005
R485 330/1005
R486 330/1005
R487 330/1005
R488 330/1005
R489 330/1005
R490 330/1005
R491 330/1005
R492 330/1005

TP479 PCB_TP08

1

R473 000/1005

+12V+5V

TXA0­TXA0+
TXA1­TXA1+
TXA2­TXA2+
TXACLK­TXACLK+
TXA3­TXA3+
TXA4-

TXA4+
TP461
TP463

TXB0-

TXB0+

TXB1-

TXB1+

TXB2-

TXB2+

TXBCLK-

TXBCLK+

TXB3-

TXB3+

TXB4-

TXB4+
TP475
TP477

1
1

1
1

PCB_TP08
PCB_TP08

PCB_TP08
PCB_TP08

TXA0­TXA0+
TXA1­TXA1+
TXA2­TXA2+
TXACLK­TXACLK+
TXA3­TXA3+
TXA4­TXA4+

TXB0­TXB0+
TXB1­TXB1+
TXB2­TXB2+
TXBCLK­TXBCLK+
TXB3­TXB3+
TXB4­TXB4+

PANEL_PWR

3

MAIN PWB(3/46),(19/46)

MAIN PWB(19/46)

MAIN PWB(19/46)

R480 OPEN-101/1005

R482 OPEN-101/1005

[OPC Enable]
‘H’ =Enable
‘L’ or NC = Disable

PWM_DIM_IN

PWM_DIM_OUT

OPC_CONTROL

BIT_SELECT

R481 OPEN-101/1005

MAIN PWB
(19/46)

R483 OPEN-101/1005

2

R478 OPEN-102/1005
R479 OPEN-000/1005
R493 OPEN-000/1005

TXA0+

TP456 PCB_TP10
TP451 PCB_TP10

TXA0-

TP457 PCB_TP10

TXA1+
TXA1-

TP452 PCB_TP10
TP454 PCB_TP10

TXA2+
TXA2-

TP453 PCB_TP10

TP458 PCB_TP10

TXACLK+
TXACLK-

TP455 PCB_TP10

TXA3+

TP460 PCB_TP10
TP459 PCB_TP10

TXA3-

TP464 PCB_TP10

TXA4+
TXA4-

TP462 PCB_TP10

R494 OPEN-000/1005

TXB0+

TP466 PCB_TP10
TP465 PCB_TP10

TXB0-

TP468 PCB_TP10

TXB1+
TXB1-

TP467 PCB_TP10
TP470 PCB_TP10

TXB2+
TXB2-

TP469 PCB_TP10

TP472 PCB_TP10

TXBCLK+
TXBCLK-

TP471 PCB_TP10

TXB3+

TP474 PCB_TP10
TP473 PCB_TP10

TXB3-

TP478 PCB_TP10

TXB4+
TXB4-

TP476 PCB_TP10

MODULE_POWER

TP480 PCB_TP15

[LVDS Select]
‘H’ =JEIDA
‘L’ or NC = VESA

TP481 PCB_TP10

1

TP482 PCB_TP10

1

TP483 PCB_TP10

1
1
1
1
1
1

1
1

1
1
1
1

1
1
1
1
1
1

1
1

1
1
1
1

1

1

TP484 PCB_TP10

1

JP451
OPEN-FW12501-41AR

41 42
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10

43

9
8
7
6
5
4
3
2
1

1

TOP View

41

40

39

38

37

36

35

34

33

32

31

30

29

28

27

26

25

24

23

22

21

20

19

18

17

16

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

PANEL CONTROL

Module Power

C462
104p/50V

L457

R469

472/1005

IRLML6402TRPBF

C460
475p/16V/3216

1

Q457

B B

MAIN PWB(7/46)

R470

PANEL_PWR

A A

PANEL_PWR

103/1005

OPEN-BLM31PG121SN1L

C461
106p/25V/3216

Q456

1

MMBT4401

23

R471

472/1005

L456
BLM31PG121SN1L

2

MODULE_POWER

3

C463
104p/50V

C464
106p/25V/3216

OPC_CTL

MAIN PWB(7/46)

BIT_SEL

+3V3_A +3V3_A

R496
472/1005

R497 103/1005

[OPC Enable]
‘H’ =Enable
‘L’ or NC = Disable

+3V3_A +3V3_A

R495
472/1005

R500 103/1005

‘H’ = 8Bits
‘L’ = 10Bits

1

23

1

R498
511/1005

Q459
MMBT4401

R499
332/1005

Q458
MMBT4401

23

OPC_CONTROL

BIT_SELECT

OPC_CONTROL

MAIN PWB(19/46)

BIT_SELECT

MAIN PWB ASS'Y(14/46)
[LVDS Interface]

HU-71100006

All location are from 451 to 480

5

4

3

2

1

hb1_main_0612_12/48_0.0

2-36(No.YA705<Rev.001>)(No.YA705<Rev.001>)2-35

MAIN PWB CIRCUIT DIAGRAM (15/46) [Power]

5

+1V2

D D

C C

+3V3_A

B B

L11
L12
L18

L19
M11
M12
M17
M18
M19

V11
V12
V13
V18

V19
W11
W12
W18
W19
W13

L17

F12

F13

F14

F15

F16

F18

F19

U6
V6

Y6
AA6
AB6
AD8

AD10
AD11
AD12
AD14
AD16
AD17
AD18

W17
W16
W15
W14

V17
V16
V15
V14
U19

U102K
FLI10620H

CVDD12
CVDD12
CVDD12
CVDD12
CVDD12
CVDD12
CVDD12
CVDD12
CVDD12
CVDD12
CVDD12
CVDD12
CVDD12
CVDD12
CVDD12
CVDD12
CVDD12
CVDD12
CVDD12
CVDD12

IOVDD33
IOVDD33
IOVDD33
IOVDD33
IOVDD33
IOVDD33
IOVDD33
IOVDD33
IOVDD33
IOVDD33
IOVDD33
IOVDD33
IOVDD33
IOVDD33
IOVDD33
IOVDD33
IOVDD33
IOVDD33
IOVDD33
IOVDD33

CVSS
CVSS
CVSS
CVSS

CVSS
CVSS
CVSS
CVSS
CVSS

CVSS
CVSS
CVSS
CVSS

CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS
CVSS

L13
L14
L15
L16

M13
M14
M15
M16
N11
N12
N13
N14
N15
N16
N17
N18
N19
P11
P12
P13
P14
P15
P16
P17
P18
P19
R11
R12
R13
R14
R15
R16
R17
R18
R19
T11
T12
T13
T14
T15
T16
T17
T18
T19
U11
U12
U13
U14
U15
U16
U17
U18

4

3

2

1

MAIN PWB ASS'Y(15/46)
[Power]

HU-71100006

+1V2

C481

226p/6.3V/2012

+3V3_A

C495

226p/6.3V/2012

C482

105p/16V/1005

C483

105p/16V/1005

C496

105p/16V/1005

C484

105p/16V/1005

C485
105p/16V/1005

C498

105p/16V/1005

C486

104p/16V/1005

C487
104p/16V/1005

C500

104p/16V/1005

C488

104p/16V/1005

C489
104p/16V/1005

C502

104p/16V/1005

C490

104p/16V/1005

C491

104p/16V/1005

C504

104p/16V/1005

C492

104p/16V/1005

C493

104p/16V/1005

C506

104p/16V/1005

C494

104p/16V/1005

C508

104p/16V/1005

A A

All location are from 481 to 520

5

4

C497

105p/16V/1005

3

C499
105p/16V/1005

C501
104p/16V/1005

C503
104p/16V/1005

2

C505

104p/16V/1005

C507

104p/16V/1005

1

hb1_main_0612_13/48_0.0

(No.YA705<Rev.001>)2-37 2-38(No.YA705<Rev.001>)

MAIN PWB CIRCUIT DIAGRAM (16/46) [FRC POWER [DC/DC]]

1

2

3

4

5

FRCQ Power

TP541
PCB_TP10

C541

R558

FB

103p/50V/1005

3

5

6

OPEN_561p/50V/1005

C577

L541

4.7uH/SPC7040-4R7/3.5A

D541
OPEN-B340A

12

1

A A

C542

106p/25V/3216

C543

106p/25V/3216

105p/16V/2012

C548

R542
103/1005

C544

104p/16V/1005

R543
392/1005

7

8

4

U541

EN

SS

GND

MP2307

750/F/1005

1

2

IN

BS

SW

COMP

GND_P

9

MAX: 3A

TP543

B B

+12V

C556

C556

106p/25V/3216

106p/25V/3216

C C

TP543
PCB_TP10

PCB_TP10

1

C557

C557

106p/25V/3216

106p/25V/3216

R548

R548
103/1005

103/1005

C566

C566

R554

R554

105p/16V/2012

105p/16V/2012

392/1005

392/1005

C568

C568

104p/16V/1005

104p/16V/1005

7

8

4

U544

U544

EN

SS

GND

MP2307

MP2307

2

IN

GND_P

9

MAX: 3A

R559

750/F/1005

1

BS

SW

FB

COMP

C555

103p/50V/1005

3

5

6

OPEN-561p/1005

C571

L542

4.7uH/SPC7040-4R7/3.5A

D542
OPEN-B340A

12

12

C567

C571

822p/25V/1005

R553
4021/F/1005

Vout = 0.925 * (R1+R2)/R2

R556

12

C580

822p/25V/1005

R541
4021/F/1005

OPEN-104/1005

D543
OPEN-LL4148

Vout = 0.92 * (R1+R2)/R2

R549

243/F/1005

R557

OPEN-104/1005

D544
OPEN-LL4148

R552

912/F/1005

R2

R1

R2

TP544
PCB_TP10

R1

TP542
PCB_TP10

R544
302/F/1005

R545
912/F/1005

C545

226p/6.3V/2012

+3V3FRC

1

C558
226p/6.3V/2012

1

C546

226p/6.3V/2012

C559

226p/6.3V/2012

+1V2FRC+12V

+3.34V,
Max.2.5A

C560

220uF/16V/BLA/S

[FRC Core]
+1.28V

C547

100uF/16V/MVK/S

L543

BLM18PG300SN1D

+3V3DIG

+3V3FRC

C549

106p/10V/2012

C561
226p/6.3V/2012

TP548
PCB_TP10

1

C550

104p/16V/1005

C551

OPEN_104p/16V/1005

+5V

R546
103/1005

C552

105p/25V

U542
RT9018B25PSP

3

VIN

2

EN

4

VDD

8

GND

9

TAP

Max.3A

VOUT

ADJ

PGOOD

TP549
PCB_TP10

6

R547
272/F/1005

R1

7

R2

R550
132/F/1005

5

NC

1

1

R551
104/1005

+2V5FRC

C553

106p/10V/2012

[DDR1]
+2.49V

C554

104p/16V/1005

Vout=0.8V(R1+R2)/R2

FRC DDR1 2.5V
VTT, Vref

+2V5FRC FRC_VTT FRC_VREF

C563

226p/6.3V/2012

C573

100uF/16V/BLA/S

D D

All location are from 541 to 580

1

TP545
PCB_TP10

1

C576

104p/16V/1005

U545

1
2
3
4
5
6
7

VDD
VDD
VTTFORCE
VSS
VSS
VTTFORCE
VDD

FAN1655M

SOIC14

VREFOUT

VTTSENSE

VDDQ

VSSQ

/SHDN

VREFIN

VSS

14
13
12
11
10
9
8

C572

102p/50V/1005

103/1005

C562

226p/6.3V/2012

2

R555

C575
102p/50V/1005

C578

102p/50V/1005

C574

104p/16V/1005

TP546
PCB_TP10

1

C579
220uF/16V/MVK/S

TP547
PCB_TP10

1

MAIN PWB ASS'Y(16/46)
[FRC POWER [DC/DC]]

HU-71100006

3

2-40(No.YA705<Rev.001>)(No.YA705<Rev.001>)2-39

4

5

hb1_main_0612_14/48_0.0

MAIN PWB CIRCUIT DIAGRAM (17/46) [FRC [GPIO]]

1

A A

+3V3DIG

L581

BLM18PG300SN1D

Y581

74.175MHz/15p/+-50PPM

1

NC

OSC

OSC

GND2OUT

B B

VDD

4

3

C582

104p/16V/1005

U581A
KL5AMFC201B

A11

XCKI

2

OPEN-472/1005

MS_SCL
MS_SDA

MODE[1]
MODE[0]

MODESEL

RST

TEST[0]
TEST[1]
TEST[2]

RESERVEDI

A7
A6

A5
A4

A8

A9

C4
B4
C5

A10

R581

+3V3DIG

R582
OPEN-472/1005

/RESET

1
1
1

R590 OPEN-000/1005R598 101/1005

+3V3DIG

R584

472/1005

TP581 PCB_TP08
TP582 PCB_TP08
TP583 PCB_TP08

+3V3DIG

R583

472/1005

+3V3DIG

R591
472/1005

MFC_SCL
MFC_SDA

3

R600 220/1005
R601 220/1005

MAIN PWB ASS'Y(17/46)

4

FRC_MODE1
FRC_MODE0

MAIN PWB(7/46)

5

WP_EEPROM
MFC_SCL_ROM
MFC_SDA_ROM

+3V3DIG

JP582
OPEN-HEADER 2P

JP581
OPEN-53014-0410

1

2mm

2mm

2
3
4

6

C581 104p/16V/1005

U582
24LC64T-I/SN

8
7
6
5

1
2

+3V3DIG

VCC
WP
SCL
SDA

A0
A1
A2

VSS

C592
104p/16V/1005

MFC_SCL_ROM
MFC_SDA_ROM

1
2
3
4

+3V3DIG

R586
472/1005

C C

MAIN PWB(6/46)

FRC_/RST

FRC_/RST

R599 103/1005

FRC_/RST : H FRC RESET
FRC_/RST : L FRC NORMAL OPERATION

FRC_MODESEL : H Douglas connection

1

23

R585
472/1005

Q581

MMBT4401

/RESET

S581

12

34

OPEN-JTP1127WEM

+5V

R587
472/1005

C583

104p/16V/1005

MFC_EEPROM_SEL

FRC_MODESEL : L K-FRC connection

R588

MAIN PWB(7/46)

D D

FRC_MODESEL

FRC_MODESEL

103/1005

R597
472/1005

1

23

Q582
MMBT4401

[FRC [GPIO]]

HU-71100006

11

S1

10

S2

9

S3

6

MFC_SCL_ROM
MFC_SDA_ROM
WP_EEPROM

E

14

1Z

15

2Z

4

3Z

U585

HEF4053BT

VCC

1Y0
1Y1

2Y0
2Y1

3Y0
3Y1

VEE

GND

+5V

C584

104p/16V/1005

16

FLI_SCL_0

12

MFC_SCL

13

FLI_SDA_0

2

MFC_SDA

1

5
3

7
8

FLI_SCL_0

FLI_SDA_0

MAIN PWB
(5/46),(6/46),(22/46),(40/46)

+3V3DIG

R589
472/1005

All location are from 581 to 600

1

2

3

4

5

6

hb1_main_0612_15/48_0.0

(No.YA705<Rev.001>)2-41 2-42(No.YA705<Rev.001>)

MAIN PWB CIRCUIT DIAGRAM (18/46) [FRC [DDR2 SDRAM]]

1

U581B
KL5AMFC201B

RAMA0

AE15

RAMA1
RAMA2
RAMA3
RAMA4
RAMA5
RAMA6
RAMA7
RAMA8
RAMA9

A A

B B

C C

D D

RAMA10
RAMA11
RAMBA0
RAMBA1

RAMCA_N
RAMCLKE
RAMWE_N
RAMRAS_N
RAMCAS_N

RAMCLK1_P
RAMCLK1_N

RAMCLK2_P
RAMCLK2_N

RAM_DQS0
RAM_DQS1
RAM_DQS2
RAM_DQS3

RAM_DQS4
RAM_DQS5
RAM_DQS6
RAM_DQS7

RAM_DQS0
RAM_DQS1
RAM_DQS2
RAM_DQS3
RAM_DQS4
RAM_DQS5
RAM_DQS6
RAM_DQS7

RAMA1
RAMA2
RAMA3
RAMA11
RAMA7
RAMA8
RAMCLKE

RAMA4
RAMA9
RAMA6
RAMA5
RAMBA0
RAMBA1
RAMA0
RAMA10
RAMCAS_N
RAMWE_N
RAMRAS_N
RAMCA_N

RAMCLK1_P
RAMCLK1_N

RAMCLK2_P
RAMCLK2_N

PR617
240*4/1005

PR618
240*4/1005

PR619
240*4/1005

PR620
240*4/1005

PR621
240*4/1005

ADDR0

AE14

ADDR1

AF14

ADDR2

AE13

ADDR3

AE12

ADDR4

AF11

ADDR5

AE11

ADDR6

AD10

ADDR7

AE10

ADDR8

AF12

ADDR9

AF15

ADDR10

AF13

ADDR11

AE16

BA0

AF16

BA1

AC14

ECHO_OUT

AD14

ECHO_IN

AD16

/CS

AF10

CKE

AE17

/WE

AF17

RAS

AD17

CAS

AE9

ACLKP

AF9

ACLKN

AE18

BCLKP

AF18

BCLKN

AA2

ADQS[0]

AE6

ADQS[1]

U2

ADQS[2]

AD2

ADQS[3]

AD25

BDQS[0]

U25

BDQS[1]

AE21

BDQS[2]

AA25

BDQS[3]

RD601 240/1005
RD602 240/1005
RD604 240/1005
RD606 240/1005
RD607 240/1005
RD608 240/1005
RD609 240/1005
RD623 240/1005

18
27
36
45
18
27
36
45
18
27
36
45
18
27
36
45
18
27
36
45

RD610 220/1005
RD611 220/1005

RD612 220/1005
RD613 220/1005

ADQ[0]
ADQ[1]
ADQ[2]
ADQ[3]
ADQ[4]
ADQ[5]
ADQ[6]
ADQ[7]
ADQ[8]

ADQ[9]
ADQ[10]
ADQ[11]
ADQ[12]
ADQ[13]
ADQ[14]
ADQ[15]
ADQ[16]
ADQ[17]
ADQ[18]
ADQ[19]
ADQ[20]
ADQ[21]
ADQ[22]
ADQ[23]
ADQ[24]
ADQ[25]
ADQ[26]
ADQ[27]
ADQ[28]
ADQ[29]
ADQ[30]
ADQ[31]

BDQ[0]

BDQ[1]

BDQ[2]

BDQ[3]

BDQ[4]

BDQ[5]

BDQ[6]

BDQ[7]

BDQ[8]

BDQ[9]
BDQ[10]
BDQ[11]
BDQ[12]
BDQ[13]
BDQ[14]
BDQ[15]
BDQ[16]
BDQ[17]
BDQ[18]
BDQ[19]
BDQ[20]
BDQ[21]
BDQ[22]
BDQ[23]
BDQ[24]
BDQ[25]
BDQ[26]
BDQ[27]
BDQ[28]
BDQ[29]
BDQ[30]
BDQ[31]

DDR_BANK0
DDR_BANK1

AB3
AB2
AB1
AA3
AA1
Y3
Y2
Y1
AF7
AE7
AD7
AF6
AD6
AF5
AE5
AD5
V3
V2
V1
U3
U1
T3
T2
T1
AF4
AE4
AD4
AF3
AD1
AC3
AC2
AC1

AC26
AC25
AC24
AD26
AF24
AD23
AE23
AF23
T26
T25
T24
U26
U24
V26
V25
V24
AD22
AE22
AF22
AD21
AF21
AD20
AE20
AF20
Y26
Y25
Y24
AA26
AA24
AB26
AB25
AB24

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7

DDR_A1
DDR_A2
DDR_A3
DDR_A11
DDR_A7
DDR_A8
CKE

DDR_A4
DDR_A9
DDR_A6
DDR_A5

DDR_A0
DDR_A10
CAS_N
WE_N
RAS_N
CA_N

CLK1_P
CLK1_N

CLK2_P
CLK2_N

RAMDQ0
RAMDQ1
RAMDQ2
RAMDQ3
RAMDQ4
RAMDQ5
RAMDQ6
RAMDQ7
RAMDQ8

RAMDQ9
RAMDQ10
RAMDQ11
RAMDQ12
RAMDQ13
RAMDQ14
RAMDQ15
RAMDQ16
RAMDQ17
RAMDQ18
RAMDQ19
RAMDQ20
RAMDQ21
RAMDQ22
RAMDQ23
RAMDQ24
RAMDQ25
RAMDQ26
RAMDQ27
RAMDQ28
RAMDQ29
RAMDQ30
RAMDQ31

RAMDQ32
RAMDQ33
RAMDQ34
RAMDQ35
RAMDQ36
RAMDQ37
RAMDQ38
RAMDQ39
RAMDQ40
RAMDQ41
RAMDQ42
RAMDQ43
RAMDQ44
RAMDQ45
RAMDQ46
RAMDQ47
RAMDQ48
RAMDQ49
RAMDQ50
RAMDQ51
RAMDQ52
RAMDQ53
RAMDQ54
RAMDQ55
RAMDQ56
RAMDQ57
RAMDQ58
RAMDQ59
RAMDQ60
RAMDQ61
RAMDQ62
RAMDQ63

CKE

DDR_A1
DDR_A2
DDR_A3
DDR_A11
DDR_A7
DDR_A8
CKE

DDR_A4
DDR_A9
DDR_A6

DDR_A5
DDR_BANK0
DDR_BANK1

DDR_A0

DDR_A10

CAS_N

WE_N

RAS_N

CA_N

CLK1_P

CLK1_N

CLK2_P

CLK2_N

RAMDQ0
RAMDQ1
RAMDQ2
RAMDQ3
RAMDQ4
RAMDQ5
RAMDQ6
RAMDQ7
RAMDQ8
RAMDQ9
RAMDQ10
RAMDQ11
RAMDQ12
RAMDQ13
RAMDQ14
RAMDQ15
RAMDQ16
RAMDQ17
RAMDQ18
RAMDQ19
RAMDQ20
RAMDQ21
RAMDQ22
RAMDQ23
RAMDQ24
RAMDQ25
RAMDQ26
RAMDQ27
RAMDQ28
RAMDQ29
RAMDQ30
RAMDQ31

RAMDQ32
RAMDQ33
RAMDQ34
RAMDQ35
RAMDQ36
RAMDQ37
RAMDQ38
RAMDQ39
RAMDQ40
RAMDQ41
RAMDQ42
RAMDQ43
RAMDQ44
RAMDQ45
RAMDQ46
RAMDQ47
RAMDQ48
RAMDQ49
RAMDQ50
RAMDQ51
RAMDQ52
RAMDQ53
RAMDQ54
RAMDQ55
RAMDQ56
RAMDQ57
RAMDQ58
RAMDQ59
RAMDQ60
RAMDQ61
RAMDQ62
RAMDQ63

RD625 473/F/1005

PR638
510*4/1005

PR639
510*4/1005

PR640
510*4/1005

PR641
510*4/1005

PR642
510*4/1005

RD621 101/1005

RD622 101/1005

All location are from D610 to D640

1

2

PR601

18

240*4/1005

27
36
45

PR602

18

240*4/1005

27
36
45

PR603

18

240*4/1005

27
36
45

PR604

18

240*4/1005

27
36
45

PR605

18

240*4/1005

27
36
45

PR606

18

240*4/1005

27
36
45

PR607

18

240*4/1005

27
36
45

PR608

18

240*4/1005

27
36
45

PR609

18

240*4/1005

27
36
45

PR610

18

240*4/1005

27
36
45

PR611

18

240*4/1005

27
36
45

PR612

18

240*4/1005

27
36
45

PR613

18

240*4/1005

27
36
45

PR614

18

240*4/1005

27
36
45

PR615

18

240*4/1005

27
36
45

PR616

18

240*4/1005

27
36
45

Place these resistors as
close to the MEFC201 U581
as possible

FRC_VTT

18
27
36
45
18
27
36
45
18
27
36
45
18
27
36
45
18
27
36
45

2

CD671 104p/16V/1005
CD672 104p/16V/1005

CD673 104p/16V/1005
CD674 104p/16V/1005

CD675 104p/16V/1005
CD676 104p/16V/1005

CD677 104p/16V/1005

CD678 104p/16V/1005
CD679 104p/16V/1005
CD680 104p/16V/1005
CD681 104p/16V/1005
CD682 104p/16V/1005

Place RD621/R622 just past
the pins on UD601/UD602.
The net should route to the pin
first then to R621/R622 to
be terminated.

DDR_D0
DDR_D1
DDR_D2
DDR_D3
DDR_D4
DDR_D5
DDR_D6
DDR_D7
DDR_D8

DDR_D9
DDR_D10
DDR_D11
DDR_D12
DDR_D13
DDR_D14
DDR_D15
DDR_D16
DDR_D17
DDR_D18
DDR_D19
DDR_D20
DDR_D21
DDR_D22
DDR_D23
DDR_D24
DDR_D25
DDR_D26
DDR_D27
DDR_D28
DDR_D29
DDR_D30
DDR_D31

DDR_D32
DDR_D33
DDR_D34
DDR_D35
DDR_D36
DDR_D37
DDR_D38
DDR_D39
DDR_D40
DDR_D41
DDR_D42
DDR_D43
DDR_D44
DDR_D45
DDR_D46
DDR_D47
DDR_D48
DDR_D49
DDR_D50
DDR_D51
DDR_D52
DDR_D53
DDR_D54
DDR_D55
DDR_D56
DDR_D57
DDR_D58
DDR_D59
DDR_D60
DDR_D61
DDR_D62
DDR_D63

3

FRC_VREF

CD601

104p/16V/1005

CD602
220p/50V/1005

M12

DDR_A0
DDR_A1
DDR_A2
DDR_A3
DDR_A4
DDR_A5
DDR_A6
DDR_A7
DDR_A8
DDR_A9
DDR_A10
DDR_A11
DDR_BANK0
DDR_BANK1

CLK1_P
CLK1_N

CKE

CA_N
RAS_N
CAS_N
WE_N

+2V5FRC +2V5FRC

+2V5FRC

CD614
226p/6.3V/2012

+2V5FRC

CD633

226p/6.3V/2012

VREF

M4

A0

M5

A1

L5

A2

M6

A3

M7

A4

L8

A5

M8

A6

M9

A7

M10

A8

L7

A9

K5

A10

L6

A11

M3

BA0

L4

BA1

L10

CK

L11

CK#

M11

CKE

M1

CS#

L1

RAS#

K1

CAS#

K2

WE#

A2

DM0

G11

DM1

G2

DM2

A11

DM3

K10

VDD

K7

VDD

K6

VDD

K3

VDD

D3

VDD

D10

VDD

C7

VDD

C6

VDD

J3

VDDQ

J10

VDDQ

H3

VDDQ

H10

VDDQ

F3

VDDQ

F10

VDDQ

E3

VDDQ

E10

VDDQ

D2

VDDQ

D11

VDDQ

B9

VDDQ

B7

VDDQ

B6

VDDQ

B4

VDDQ

B2

VDDQ

B11

VDDQ

J9

VSSQ

J4

VSSQ

H9

VSSQ

H4

VSSQ

G9

VSSQ

G4

VSSQ

F9

VSSQ

F4

VSSQ

E9

VSSQ

E4

VSSQ

D8

VSSQ

D5

VSSQ

C9

VSSQ

C8

VSSQ

CD615

226p/6.3V/2012

CD634

226p/6.3V/2012

3

NCL3NCM2NCL2NC

CD616

226p/6.3V/2012

CD635
226p/6.3V/2012

L12

NC

K12NCK11

UD601
K4D263238K-FC50

NCG3NC

NCB3NC

RFUL9RFU

B10

G10

CD618

105p/16V/1005

CD617

105p/16V/1005

CD637

105p/16V/1005

CD636

105p/16V/1005

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8

DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31

DQS0
DQS1
DQS2
DQS3

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

K8

CD619

105p/16V/1005

CD638

105p/16V/1005

A6
B5
A5
A4
B1
C2
C1
D1
J12
J11
H12
H11
F12
F11
E12
E11
E2
E1
F2
F1
H2
H1
J1
J2
D12
C12
C11
B12
A9
A8
B8
A7

A1
G12
G1
A12

K4
K9
J8
J7
J6
J5
H8
H7
H6
H5
G8
G7
G6
G5
F8
F7
F6
F5
E8
E7
E6
E5
D9
D7
D6
D4

C5
C4
C3
C10
A3
A10

FRC_VREF

DDR_D0
DDR_D1
DDR_D2
DDR_D3
DDR_D4
DDR_D5
DDR_D6
DDR_D7
DDR_D8

DDR_D9
DDR_D10
DDR_D11
DDR_D12
DDR_D13
DDR_D14
DDR_D15
DDR_D16
DDR_D17
DDR_D18
DDR_D19
DDR_D20
DDR_D21
DDR_D22
DDR_D23
DDR_D24
DDR_D25
DDR_D26
DDR_D27
DDR_D28
DDR_D29
DDR_D30
DDR_D31

DQS0

DQS2
DQS3

CD620

104p/16V/1005

CD621

104p/16V/1005

CD639

104p/16V/1005

CD640

104p/16V/1005

4

CD603

104p/16V/1005

DDR_A0
DDR_A1
DDR_A2
DDR_A3
DDR_A4
DDR_A5
DDR_A6
DDR_A7
DDR_A8
DDR_A9
DDR_A10
DDR_A11
DDR_BANK0
DDR_BANK1

CLK2_P
CLK2_N

CKE

CA_N
RAS_N
CAS_N
WE_N

CD622

104p/16V/1005

CD623

CD641

104p/16V/1005

CD642

103p/50V/1005

4

CD604

220p/50V/1005

M12

M4
M5

L5
M6
M7

L8
M8
M9

M10

L7

K5

L6
M3

L4

L10
L11

M11

M1

L1

K1
K2

A2

G11

G2

A11

K10

K7
K6
K3
D3

D10

C7
C6

J3

J10

H3

H10

F3

F10

E3

E10

D2

D11

B9
B7
B6
B4
B2

B11

J9

J4

H9

H4
G9
G4

F9

F4
E9
E4
D8
D5
C9
C8

CD624

103p/50V/1005

103p/50V/1005

CD643
103p/50V/1005

VREF

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
BA0
BA1

CK
CK#

CKE

CS#
RAS#
CAS#
WE#

DM0
DM1
DM2
DM3

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

NCL3NCM2NCL2NC

NC

L12

K12NCK11

CD626

473p/16V/1005

CD625

103p/50V/1005

CD645
473p/16V/1005

CD644

103p/50V/1005

UD602
K4D263238K-FC50

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8

DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31

DQS0
DQS1
DQS2
DQS3

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

NCG3NC

G10

VSSQ

NCB3NC

RFUL9RFU

K8

B10

CD628

473p/16V/1005

CD627

473p/16V/1005

CD647
473p/16V/1005

CD646

473p/16V/1005

5

A6
B5
A5
A4
B1
C2
C1
D1
J12
J11
H12
H11
F12
F11
E12
E11
E2
E1
F2
F1
H2
H1
J1
J2
D12
C12
C11
B12
A9
A8
B8
A7

A1
G12
G1
A12

K4
K9
J8
J7
J6
J5
H8
H7
H6
H5
G8
G7
G6
G5
F8
F7
F6
F5
E8
E7
E6
E5
D9
D7
D6
D4

C5
C4
C3
C10
A3
A10

DDR_D32
DDR_D33
DDR_D34
DDR_D35
DDR_D36
DDR_D37
DDR_D38
DDR_D39
DDR_D40
DDR_D41
DDR_D42
DDR_D43
DDR_D44
DDR_D45
DDR_D46
DDR_D47
DDR_D48
DDR_D49
DDR_D50
DDR_D51
DDR_D52
DDR_D53
DDR_D54
DDR_D55
DDR_D56
DDR_D57
DDR_D58
DDR_D59
DDR_D60
DDR_D61
DDR_D62
DDR_D63

DQS4
DQS5DQS1
DQS6
DQS7

DDR_D0
DDR_D1
DDR_D2
DDR_D3
DDR_D4
DDR_D5
DDR_D6
DDR_D7
DDR_D8
DDR_D9
DDR_D10
DDR_D11
DDR_D12
DDR_D13
DDR_D14
DDR_D15
DDR_D16
DDR_D17
DDR_D18
DDR_D19
DDR_D20
DDR_D21
DDR_D22
DDR_D23
DDR_D24
DDR_D25
DDR_D26
DDR_D27
DDR_D28
DDR_D29
DDR_D30
DDR_D31
DDR_D32
DDR_D33
DDR_D34
DDR_D35
DDR_D36
DDR_D37
DDR_D38
DDR_D39
DDR_D40
DDR_D41
DDR_D42
DDR_D43
DDR_D44
DDR_D45
DDR_D46
DDR_D47
DDR_D48
DDR_D49
DDR_D50
DDR_D51
DDR_D52
DDR_D53
DDR_D54
DDR_D55
DDR_D56
DDR_D57
DDR_D58
DDR_D59
DDR_D60
DDR_D61
DDR_D62
DDR_D63

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7

PR622

18

510*4/1005

27
36
45

PR623

18

510*4/1005

27
36
45

PR624

18

510*4/1005

27
36
45

PR625

18

510*4/1005

27
36
45

PR626

18

510*4/1005

27
36
45

PR627

18

510*4/1005

27
36
45

PR628

18

510*4/1005

27
36
45

PR629

18

510*4/1005

27
36
45

PR630

18

510*4/1005

27
36
45

PR631

18

510*4/1005

27
36
45

PR632

18

510*4/1005

27
36
45

PR633

18

510*4/1005

27
36
45

PR634

18

510*4/1005

27
36
45

PR635

18

510*4/1005

27
36
45

PR636

18

510*4/1005

27
36
45

PR637

18

510*4/1005

27
36
45

RD614 510/1005
RD615 510/1005
RD616 510/1005
RD617 510/1005
RD618 510/1005
RD619 510/1005
RD620 510/1005
RD624 510/1005

6

FRC_VTT

CD605 104p/16V/1005
CD606 104p/16V/1005

CD607 104p/16V/1005
CD608 104p/16V/1005

CD609 104p/16V/1005
CD610 104p/16V/1005

CD611 104p/16V/1005
CD612 104p/16V/1005

CD613 104p/16V/1005
CD629 104p/16V/1005

CD630 104p/16V/1005
CD631 104p/16V/1005

CD632 104p/16V/1005
CD648 104p/16V/1005

CD649 104p/16V/1005
CD650 104p/16V/1005

CD651 104p/16V/1005
CD652 104p/16V/1005

CD653 104p/16V/1005
CD654 104p/16V/1005

CD655 104p/16V/1005
CD656 104p/16V/1005

CD657 104p/16V/1005
CD658 104p/16V/1005

CD659 104p/16V/1005
CD660 104p/16V/1005

CD661 104p/16V/1005
CD662 104p/16V/1005

CD663 104p/16V/1005
CD664 104p/16V/1005

CD665 104p/16V/1005
CD666 104p/16V/1005

CD667 104p/16V/1005
CD668 104p/16V/1005

CD669 104p/16V/1005
CD670 104p/16V/1005

MAIN PWB ASS'Y(18/46)
[FRC [DDR2 SDRAM]]

HU-71100006

5

6

hb1_main_0612_16/48_0.0

2-44(No.YA705<Rev.001>)(No.YA705<Rev.001>)2-43

MAIN PWB CIRCUIT DIAGRAM (19/46) [FRC [LVDS IN/OUT]]

1

U581C
KL5AMFC201B

TXA0-

TXA0-

TXA0+

TXA0+

TXA1-

TXA1-

TXA1+

TXA1+

TXA2-

TXA2-

TXA2+

TXA2+

TXA3-

TXA3+

TXA4-

TXA4+

TXB0-

TXB0+

TXB1-

TXB1+

TXB2-

TXB2+

TXB3-

TXB3+

TXB4-

TXB4+

TXACLK­TXACLK+

TXA3­TXA3+

TXA4­TXA4+

TXB0­TXB0+

TXB1­TXB1+

TXB2­TXB2+

TXBCLK­TXBCLK+

TXB3­TXB3+

TXB4­TXB4+

A A

MAIN PWB

(14/46)

B B

TXACLK-

TXACLK+

TXBCLK-

TXBCLK+

C2
C1

D2
D1

E2
E1

F2
F1

G2
G1

H2
H1

J2
J1

K2
K1

L2
L1

M2
M1

N2
N1

P2
P1

RX1AN
RX1AP

RX1BN
RX1BP

RX1CN
RX1CP

RX1CLKN
RX1CLKP

RX1DN
RX1DP

RX1EN
RX1EP

RX2AN
RX2AP

RX2BN
RX2BP

RX2CN
RX2CP

RX2CLKN
RX2CLKP

RX2DN
RX2DP

RX2EN
RX2EP

LRAVDDA
LRAVDDB

LRHVDDC
LRHVDDD

LRAGNDA
LRAGNDB

LRHGNDC
LRHGNDD

J4
M4

E3
L3

J3
P3

G3
N3

2

LRA_1V2

LRH_3V3 LTP_3V3

LTO_3V3

C14
C20

C18
C23

A25

B26
C13
C15
C17
C19

D18
D22

U581D
KL5AMFC201B

LTOVDDA
LTOVDDB

LTPVDDA
LTPVDDB

LTOGNDA
LTOGNDB
LTOGNDC
LTOGNDD
LTOGNDE
LTOGNDF

LTPGNDA
LTPGNDB

TX1AN
TX1AP

TX1BN
TX1BP

TX1CN

TX1CP

TX1CLKN

TX1CLKP

TX1DN

TX1DP

TX1EN
TX1EP

TX2AN
TX2AP

TX2BN
TX2BP

TX2CN

TX2CP

TX2CLKN

TX2CLKP

TX2DN

TX2DP

TX2EN
TX2EP

3

J25
J26

K25
K26

L25
L26

M25
M26

N25
N26

P25
P26

C25
C26

D25
D26

E25
E26

F25
F26

G25
G26

H25
H26

P_XA_TXA0­P_XA_TXA0+

P_XA_TXA1­P_XA_TXA1+

P_XA_TXA2­P_XA_TXA2+

P_XA_TXACLK­P_XA_TXACLK+

P_XA_TXA3­P_XA_TXA3+

P_XA_TXA4­P_XA_TXA4+

P_XA_TXB0­P_XA_TXB0+

P_XA_TXB1­P_XA_TXB1+

P_XA_TXB2­P_XA_TXB2+

P_XA_TXBCLK­P_XA_TXBCLK+

P_XA_TXB3­P_XA_TXB3+

P_XA_TXB4­P_XA_TXB4+

R664 330/1005
R665 330/1005

R667 330/1005
R666 330/1005

R669 330/1005
R668 330/1005

R671 330/1005
R670 330/1005

R673 330/1005
R672 330/1005

R675 330/1005
R674 330/1005

R677 330/1005
R676 330/1005

R679 330/1005
R678 330/1005

R681 330/1005
R680 330/1005

R683 330/1005
R682 330/1005

R685 330/1005
R684 330/1005

R687 330/1005
R686 330/1005

4

XA_TXA0­XA_TXA0+

XA_TXA1­XA_TXA1+

XA_TXA2­XA_TXA2+

XA_TXACLK­XA_TXACLK+

XA_TXA3­XA_TXA3+

XA_TXA4­XA_TXA4+

XA_TXB0­XA_TXB0+

XA_TXB1­XA_TXB1+

XA_TXB2­XA_TXB2+

XA_TXBCLK­XA_TXBCLK+

XA_TXB3­XA_TXB3+

XA_TXB4­XA_TXB4+

MAIN PWB

(3/46),(14/46)

MAIN PWB

(14/46)

R657 OPEN-101/1005

R656 OPEN-101/1005

R659 OPEN-101/1005

R658 OPEN-101/1005

PWM_DIM_IN

PWM_DIM_OUT
OPC_CONTROL

BIT_SELECT

5

[OPC Enable]
‘H’ =Enable
‘L’ or NC = Disable

R715 OPEN-102/1005
R716 OPEN-000/1005
R717 OPEN-000/1005

R718 OPEN-000/1005

[LVDS Select]
‘H’ =JEIDA
‘L’ or NC = VESA

XA_TXB0+
XA_TXB0­XA_TXB1+
XA_TXB1­XA_TXB2+
XA_TXB2-

XA_TXBCLK+
XA_TXBCLK-

XA_TXB3+
XA_TXB3­XA_TXB4+
XA_TXB4-

XA_TXA0+
XA_TXA0­XA_TXA1+
XA_TXA1­XA_TXA2+
XA_TXA2-

XA_TXACLK+
XA_TXACLK-

XA_TXA3+
XA_TXA3­XA_TXA4+
XA_TXA4-

MODULE_POWER

TP690PCB_TP10

1

TP691PCB_TP10

1

TP692PCB_TP10
TP654 PCB_TP10
TP653 PCB_TP10
TP656 PCB_TP10
TP655 PCB_TP10
TP658 PCB_TP10
TP657 PCB_TP10

TP660 PCB_TP10
TP659 PCB_TP10

TP662 PCB_TP10
TP661 PCB_TP10
TP664 PCB_TP10
TP663 PCB_TP10
TP694 PCB_TP10
TP642 PCB_TP10
TP641 PCB_TP10
TP645 PCB_TP10
TP644 PCB_TP10
TP646 PCB_TP10
TP643 PCB_TP10

TP648 PCB_TP10
TP647 PCB_TP10

TP650 PCB_TP10
TP649 PCB_TP10
TP652 PCB_TP10
TP651 PCB_TP10

TP665 PCB_TP15

1

1
1
1
1
1
1

1
1

1
1
1
1
1
1
1
1
1
1
1

1
1

1
1
1
1

1

JP641
FW12501-41AR

41 42
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10

9
8
7
6
5
4
3
2
1

6

43

LCD PANEL UNIT
[LCD CONTROL PWB]

R641 OPEN-101/1005

R642 OPEN-101/1005

R643 OPEN-101/1005

R644 OPEN-101/1005

C C

R645 OPEN-101/1005

R646 OPEN-101/1005

R647 OPEN-101/1005

R648 OPEN-101/1005

R649 OPEN-101/1005

R650 OPEN-101/1005

R651 OPEN-101/1005

D D

R652 OPEN-101/1005

TXA0-

TXA0+

TXA1-

TXA1+

TXA2-

TXA2+

TXACLK-

TXACLK+

TXA3-

TXA3+

TXA4-

TXA4+

TXB0-

TXB0+

TXB1-

TXB1+

TXB2-

TXB2+

TXBCLK-

TXBCLK+

TXB3-

TXB3+

TXB4-

TXB4+

+1V2FRC LRA_1V2

L641

BLM18PG300SN1D

+3V3FRC

L642

BLM18PG300SN1D

L643

BLM18PG300SN1D

L644

BLM18PG300SN1D

C641

104p/16V/1005

LRH_3V3

C642

104p/16V/1005

LTP_3V3

C645

104p/16V/1005

LTO_3V3

C647

104p/16V/1005

C643

103p/50V/1005

C644

103p/50V/1005

C646

103p/50V/1005

C648

103p/50V/1005

LTO_3V3

LTP_3V3

U581E

KL5AMFC201B

D24
K24

H24
P24

C21
E24
G24

J24
L24

N24

H23
P23

LTOVDDC
LTOVDDD

LTPVDDC
LTPVDDD

LTOGNDG
LTOGNDH
LTOGNDI
LTOGNDJ
LTOGNDK
LTOGNDL

LTPGNDC
LTPGNDD

TX3AN

TX3AP

TX3BN

TX3BP

TX3CN
TX3CP

TX3CLKN

TX3CLKP

TX3DN
TX3DP

TX3EN

TX3EP

TX4AN

TX4AP

TX4BN

TX4BP

TX4CN
TX4CP

TX4CLKN

TX4CLKP

TX4DN
TX4DP

TX4EN

TX4EP

A19
B19

A20
B20

A21
B21

A22
B22

A23
B23

A24
B24

A13
B13

A14
B14

A15
B15

A16
B16

A17
B17

A18
B18

P_YA_TXA0­P_YA_TXA0+

P_YA_TXA1­P_YA_TXA1+

P_YA_TXA2­P_YA_TXA2+

P_YA_TXACLK­P_YA_TXACLK+

P_YA_TXA3­P_YA_TXA3+

P_YA_TXA4­P_YA_TXA4+

P_YA_TXB0­P_YA_TXB0+

P_YA_TXB1­P_YA_TXB1+

P_YA_TXB2­P_YA_TXB2+

P_YA_TXBCLK­P_YA_TXBCLK+

P_YA_TXB3­P_YA_TXB3+

P_YA_TXB4­P_YA_TXB4+

R689 330/1005
R688 330/1005

R693 330/1005
R690 330/1005

R695 330/1005
R694 330/1005

R697 330/1005
R696 330/1005

R699 330/1005
R698 330/1005

R701 330/1005
R700 330/1005

R703 330/1005
R702 330/1005

R705 330/1005
R704 330/1005

R707 330/1005
R706 330/1005

R709 330/1005
R708 330/1005

R711 330/1005
R710 330/1005

R713 330/1005
R712 330/1005

YA_TXA0­YA_TXA0+

YA_TXA1­YA_TXA1+

YA_TXA2­YA_TXA2+

YA_TXACLK-

YA_TXACLK+

YA_TXA3­YA_TXA3+

YA_TXA4­YA_TXA4+

YA_TXB0­YA_TXB0+

YA_TXB1­YA_TXB1+

YA_TXB2­YA_TXB2+

YA_TXBCLK-

YA_TXBCLK+

YA_TXB3­YA_TXB3+

YA_TXB4­YA_TXB4+

R663 OPEN-101/1005

R660 OPEN-101/1005

R661 OPEN-101/1005

R662 OPEN-101/1005

JP642

YA_TXB0+
YA_TXB0­YA_TXB1+
YA_TXB1­YA_TXB2+
YA_TXB2-

YA_TXBCLK+
YA_TXBCLK-

YA_TXB3+
YA_TXB3­YA_TXB4+
YA_TXB4-

YA_TXA0+
YA_TXA0­YA_TXA1+
YA_TXA1­YA_TXA2+
YA_TXA2-

YA_TXACLK+
YA_TXACLK-

YA_TXA3+
YA_TXA3­YA_TXA4+
YA_TXA4-

1

TP679 PCB_TP10

1

TP678 PCB_TP10

1

TP681 PCB_TP10

1

TP680 PCB_TP10

1

TP683 PCB_TP10

1

TP682 PCB_TP10

1

TP685 PCB_TP10

1

TP684 PCB_TP10

1

TP687 PCB_TP10

1

TP686 PCB_TP10

1

TP689 PCB_TP10

1

TP688 PCB_TP10

1

TP667 PCB_TP10

1

TP666 PCB_TP10

1

TP670 PCB_TP10

1

TP668 PCB_TP10

1

TP671 PCB_TP10

1

TP669 PCB_TP10

1

TP673 PCB_TP10

1

TP672 PCB_TP10

1

TP675 PCB_TP10

1

TP674 PCB_TP10

1

TP677 PCB_TP10

1

TP676 PCB_TP10

FW12501-31A

1
2
3
4
5
6
7
8

9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31

LCD PANEL UNIT
[LCD CONTROL PWB]

32
33

MAIN PWB ASS'Y(19/46)

All location are from 641 to 690

1

[FRC [LVDS IN/OUT]]

HU-71100006

2

(No.YA705<Rev.001>)2-45 2-46(No.YA705<Rev.001>)

3

4

5

6

hb1_main_0612_17/48_0.0

MAIN PWB CIRCUIT DIAGRAM (20/46) [FRC [POWER]]

1

A A

B B

C C

MAIN PWB ASS'Y(20/46)
[FRC [POWER]]

HU-71100006

D D

2

A12
A26

B10
B11
B12
B25

C10
C11
C12
C16
C22
C24

D12
D13
D14
D15
D16
D17
D20
D21
D23

E23

F23
F24

G23

J23

K23

L11
L13
L14
L15
L16
L23

M11
M12
M13
M14
M15
M16
M23
M24
N12
N13
N14
N15

P11
P12
P13
P14
P15

P16
R12
R13
R14
R15
R24
R26

T11

T13

T14

T16

W2
W24
W26

AC4

AC7
AC12
AC17
AC23

AD3

AD9
AD15
AD18
AD19

3

A1
A2

B2
B3
B6
B7
B8
B9

C3
C7
C8
C9

D4
D7
D9

E4

F3
F4

G4

H3
H4

K3
K4

L4

M3

V4

U581F
KL5AMFC201B

GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
GND9
GND10
GND11
GND12
GND13
GND14
GND15
GND16
GND17
GND18
GND19
GND20
GND21
GND22
GND23
GND24
GND25
GND26
GND27
GND28
GND29
GND30
GND31
GND32
GND33
GND34
GND35
GND36
GND37
GND38
GND39
GND40
GND41
GND42
GND43
GND44
GND45
GND46
GND47
GND48
GND49
GND50
GND51
GND52
GND53
GND54
GND55
GND56
GND57
GND58
GND59
GND60
GND61
GND62
GND63
GND64
GND65
GND66
GND67
GND68
GND69
GND70
GND71
GND72
GND73
GND74
GND75
GND76
GND77
GND78
GND79
GND80
GND81
GND82
GND83
GND84
GND85
GND86
GND87
GND88
GND89
GND90
GND91
GND92
GND93
GND94
GND95
GND96
GND97
GND98
GND99
GND100

VDDP12SS

VDDP33SS

VSSPSS

MVREF0
MVREF1
MVREF2
MVREF3
MVREF4

VDDPA

PFCAPA

VDDPB

PFCAPB

VDDP12FSA
VDDP12FSB

VDDP12FSC

VDD12A
VDD12B
VDD12C
VDD12D
VDD12E
VDD12F

VDD12G

VDD12H

VDD12I

VDD12J

VDD12K

VDD12L

VDD12N

VDD12M
VDD12_2A
VDD12_2B
VDD12_2C
VDD12_2D
VDD12_2E
VDD12_2F

VDD12_2G

VDD12_2H

VDD12_2I

VDD25A
VDD25B
VDD25C
VDD25D
VDD25E
VDD25F

VDD25G

VDD25H

VDD25I

VDD25J

VDD25K

VDD25L

VDD25N
VDD25M
VDD25O

VDD25P
VDD25Q

VDD25R

VDD25S

VDD25T

VDD25U

VDD25V

VDD25W

VDD25X

VDD33A

VDD33B

VDD33C

VDD33D

VDD33E

GND101

GND102

GND103

GND104

GND105

GND106

GND107

GND108

GND109

R2

R3

R1

Y4
AC5
AC10
AC22
V23

B5

C6

AC13

AD13

A3
B1
R4

D3
D6
D10
D19
L12
N4
N11
N16
T23
W4
W23
AC6
AC15
AC21
R23
T4
AA4
AA23
AB23
AC11
AC8
AC19
AD11

R11
R16
R25
T12
T15
U4
U23
W1
W3
W25
Y23
AB4
AC9
AC16
AC18
AC20
AD8
AD12
AE1
AE3
AE19
AE24
AE26
AF8

D5
D8
D11
N23
P4

AD24
AE2
AE8
AE25
AF1
AF2
AF19
AF25
AF26

SSP_1V2

SSP_3V3

FSP_1V2

FRC_VREF

C691
103p/50V/1005

C699
103p/50V/1005

C707
103p/50V/1005

C729
104p/16V/1005

C730
104p/16V/1005

C715
103p/50V/1005

4

C696
104p/16V/1005

C697

104p/16V/1005

C692

103p/50V/1005

C700

103p/50V/1005

C708

103p/50V/1005

C746

103p/50V/1005

C748

103p/50V/1005

C716
103p/50V/1005

R691 101101

C704

226p/6.3V/2012

R692 101101

C705

226p/6.3V/2012

C693
104p/16V/1005

C701
104p/16V/1005

C709
104p/16V/1005

C713
104p/16V/1005

C734
104p/16V/1005

C717
104p/16V/1005

C694

104p/16V/1005

C702

104p/16V/1005

C710

104p/16V/1005

C747

103p/50V/1005

C749

103p/50V/1005

+3V3DIG

+1V2FRC

104p/16V/1005

104p/16V/1005

104p/16V/1005

104p/16V/1005

104p/16V/1005

C718

104p/16V/1005

C695

C703

C711

C712

C741

+1V2FRC

C698

226p/6.3V/2012

C706

226p/6.3V/2012

DDR_1V2

C714

226p/6.3V/2012

+2V5FRC

C720

226p/6.3V/2012

C721

226p/6.3V/2012

5

L691
BLM18PG300SN1D

6

+3V3FRC

L692
BLM18PG300SN1D

+1V2FRC SSP_1V2

L693
BLM18PG300SN1D

L694
BLM18PG300SN1D

FRC_VREF

C725

103p/50V/1005

104p/16V/1005

+1V2FRC

C726

C723
103p/50V/1005

C750
103p/50V/1005

SSP_3V3

C719

104p/16V/1005

C727

104p/16V/1005

FSP_1V2+1V2FRC

C722

106p/10V/2012

C724

104p/16V/1005

C757

104p/16V/1005

C728

103p/50V/1005

All location are from 691 to 730

1

2

3

4

5

6

hb1_main_0612_18/48_0.0

2-48(No.YA705<Rev.001>)(No.YA705<Rev.001>)2-47

MAIN PWB CIRCUIT DIAGRAM (21/46) [Component In and Side A/V In]

5

D D

R741 OPEN-000/1005

Z741
ZMMC5V6

JP741
TPSS-0738-3(STRAIGHT)

Y

Pb

C C

Pr

1
2
3

4
5
6

7
8
9

12

R746 OPEN-000/1005

R749 OPEN-000/1005

Z742
ZMMC5V6

12

4

RV743
SV060305E101N

RV744
SV060305E101N

R743
750/F/1005

R748
750/F/1005

R750
750/F/1005

COMP_Y

COMP_Pb

COMP_Pr

MAIN PWB(13/46)

3

JP742

5

SGND

6

SGND

7

SGND

8

SGND

DUAE-9619

GND
GND

4

C

3

Y

1
2

2

RV741
SV060305E101N

RV742
SV060305E101N

R744
750/F/1005

R747
750/F/1005

1

SVHS_C

SVHS_Y

MAIN PWB(13/46)

AV_CVBS

JP743
IJBH3-SYNPH

CVBS

RED(R)

RED(R)

White(L)

White(L)

JP744
TPSE-0604-2

1
2
3
4

5

B B

A A

L742
BLM11B470SB

L744
BLM11B470SB

RV747

SV060314B431N

RV748

SV060314B431N

R755
224/1005

R757
224/1005

COMP_RI

AL

AR

COMP_LI

1
2
3

4
5
6

7
8
9

MAIN PWB ASS'Y(21/46)

RV745
SV060305E101N

L741
CIL21J1R8KNE

RV746
SV060314B431N

L743
CIL21J1R8KNE

RV749
SV060314B431N

C751
102p/50V/1005

C752
102p/50V/1005

R752
750/F/1005

R754
224/1005

R758
224/1005

CVBS_LI

CVBS_RI

[Component In and Side A/V In]

HU-71100006

All location are from 741 to 760

5

4

3

2

1

hb1_main_0612_19/48_0.0

(No.YA705<Rev.001>)2-49 2-50(No.YA705<Rev.001>)

MAIN PWB CIRCUIT DIAGRAM (22/46) [Audio AMP and HP AMP]

1

MAIN AMP

+3V3_A

L761

D D

MAIN PWB(7/46)

I2S_OUT_MCLK

AVDD_PLL

TP762
PCB_TP10

1

C791
101p/50V/1005

+3V3_A

C802

104p/16V/1005

C C

B B

BLM18PG300SN1D

C772
106p/10V/2012

C778
104p/16V/1005

C793
102p/50V/1005

R778
332/F/1005

U763
LD1117AL-ADJ

3

VIN

LFM

ADJ

1

TAP

VO

2
4

R779

121/F/1005

R780

560/F/1005

R767

472/1005

R770

472/1005

TP763
PCB_TP10

1

+1.833V

U762

1

A

2

B

4

Y

OPEN-74AHC1G08DCKR

R773 000/1005

L764
BLM18PG300SN1D

L765
BLM18PG300SN1D

L766
BLM18PG300SN1D

C803
106p/10V/2012

VCC

DGND

5

3

MAIN PWB(3/46),(4/46),(5/46),(43/46)

C790

106p/10V/2012

C796
106p/10V/2012

C798

106p/10V/2012

2

+12V

C761

R761

104p/50V

3R3

C769

AMP_3.3V

103p/50V/1005

MAIN PWB(5/46)

R765

A_RESET

AVDD_PLL

C792

104p/16V/1005

DVDD_PLL

C797

104p/16V/1005

DVDD

C799

104p/16V/1005

102p/50V/1005

101/1005

C780

AMP_3.3V

C785

104p/16V/1005

MAIN PWB(7/46)

MAIN PWB(5/46),(6/46),(17/46),(40/46)

AC_DETECT

C762
105p/50V/3216

C773 223p/50V

C776 105p/25V

LFM

AVDD_PLL

DVDD_PLL

I2S_OUT_DAT

I2S_OUT_WS

I2S_OUT_CLK

FLI_SDA_0
FLI_SCL_0

AC_DETECT

3

C764
470uF/25V/BXE/S

57

PAD_GND

1

BST1A

2

VDR1A

3

/RESET

4

AD

5

VSS_IO

6

CLK_I

7

CLK_O

8

VDD_IO

9

DGND_PLL

10

AGND_PLL

11

LFM

12

AVDD_PLL

13

DVDD_PLL

14

VSS

R781 000/1005
R782 000/1005

55

53

OUT1A54OUT1A

PGND1A56PGND1A

DVSS15DVDD16SDATA17WCK18BCK19SDA20SCL21PWM_3B/PWM_HP2

DVDD

C804 OPEN-330p/50V/1005
C805 OPEN-330p/50V/1005

R783 473/1005
C806 102p/50V/1005
R784 OPEN-000/1005

PVDD1A52PVDD1A51PVDD1B50PVDD1B

AMP NTP-3000A

U761

49

47

OUT1B48OUT1B

PWM_3A/PWM_HP1

PROTECT24FAULT25VDR2B26BST2B27PGND2B

22

23

1

TP761
PCB_TP10

4

C766
223p/50V

44

45

BST1B

PGND1B46PGND1B

C800
105p/25V

R800 102/1005

R801 102/1005

C767
105p/25V

Address:0x54

43

VDR1B

42

NC

41

VDR2A

40

BST2A

OUT2A

OUT2A

OUT2B

OUT2B

39

38

37

36

35

34

33

32

31

30

29

C819

472p/50V/1005

PGND2A

PGND2A

PVDD2A

PVDD2A

PVDD2B

PVDD2B

PGND2B

28

C801
223p/50V

C777 105p/25V

C779 223p/50V

C786
105p/50V/3216

C820

472p/50V/1005

OPEN-MBRS130L3

OPEN-MBRS130L3

OPEN-MBRS130L3

+12V

C787

104p/50V

470uF/25V/BXE/S

5

12

D761

391p/50V

12

391p/50V

D762

D763

12

C789
391p/50V

12

C788

D764
OPEN-MBRS130L3

R804 OPEN-102/1005

R805 OPEN-102/1005

R762

5R6/F

C768

C771

AMP_R­AMP_R+
AMP_L­AMP_L+

474p/50V/2012

L762
COIL(15UH)
AD-8580

34

12

R768
5R6/F

R771
5R6/F

C783
391p/50V

R776
5R6/F

HP_L_OUTHP_L_OUT

C821

OPEN-472p/50V/1005

L763
COIL(15UH)
AD-8580

34

12

C770

C765

104p/50V

C784
474p/50V/2012

JP761
SMW200-04

1

2mm

2
3
4

C822

OPEN-472p/50V/1005

SPEAKER

HP_R_OUT

C774

104p/50V

C781

104p/50V

C794
104p/50V

6

R763

472/1005

R769

472/1005

R772

472/1005

R777

472/1005

AMP_L+

C763
103p/50V/1005

R764
3R3

R766
3R3

C775
103p/50V/1005

AMP_L­AMP_R+

C782
103p/50V/1005

R774
3R3

R775
3R3

C795
103p/50V/1005

AMP_R-

HEADPHONE AMP

R787

HP_L_OUT

HP_L_OUT

MAIN PWB(13/46)

HP_R_OUT

A A

HP_R_OUT

C815

105p/25V

+5V

L769
OPEN-BLM18PG300SN1D

+3V3_D

All location are from 761 to 830

1

2

C807
105p/25V

C812

105p/25V

R792

103/F/1005

L770
BLM18PG300SN1D

R786
103/F/1005

U764
TPA6110A2DGN

1

BYPASS

2

GND

3

Shutdown

4

IN2-

R796

222/1005

GND

9

C817

106p/10V/2012

MAIN PWB(43/46),(44/46)

3

IN1-

Vo1

VDD

Vo2

8
7
6
5

SC2_MUTE

R785
473/F/1005

R795
473/F/1005

C818

105p/25V

C810 220uF/16V/MVK/S

C813 220uF/16V/MVK/S

Q765

KTD1304

R802

2

102/1005

R806

102/1005

13

2

4

HPO_L

HPO_R

R794

103/1005

R793

103/1005

Q766
KTD1304

13

220/1005

R790
220/1005

MAIN PWB ASS'Y(22/46)
[Audio AMP and HP AMP]

HU-71100006

L767
CIL10J1R8KNC

C809
223p/16V/1005

L768
CIL10J1R8KNC

C814
223p/16V/1005

96
8
7

2
10
11

3

1

JP762
IJA03

5

5
4

2-52(No.YA705<Rev.001>)(No.YA705<Rev.001>)2-51

R788
000/1005

HEADPHONE_ID

MAIN PWB(7/46)

6

hb1_main_0612_20/48_0.0

MAIN PWB CIRCUIT DIAGRAM (23/46) [RS232]

1

2

3

4

5

6

TXD_PC

A A

RXD_PC

VGA connector

MAIN PWB(39/46)

JP831

U831

MAIN PWB(5/46)

ATMEGA324P_UART

RA

RA

C831

104p/50V

C834

TA

B B

104p/50V

11
10
12

9

1

3
4

5

T1IN
T2IN
R1O
R2O

C1+

C1­C2+

C2-

ILX232

T1O

T2O
R1IN
R2IN

VCC

GND

V+

14
7
13
8

16

15

2
6

V-

104p/50V

R831 101/1005

R832 101/1005

C835

C832

104p/50V

+5VSTB

C833

106p/10V/2012

RV831

SV060314B431N

TXD_PCTA

RXD_PC

RV832

SV060314B431N

THSE-0734T

1

R

R

3
5
4

L

L

2

R833

+5VSTB

R834

+3V3_A +3V3_A

R836

R835

1

TA

C C

472/1005

RA

472/1005

Q831
FDV301N_NL

Q832

32

472/1005

1

32

472/1005

FDV301N_NL

UART_RX_OUT

UART_TX_OUT

MAIN PWB(6/46)

Douglas_UART

UART1_RX

UART1_TX

MAIN PWB ASS'Y(23/46)

D D

[RS232]

HU-71100006

All location are from 831 to 850

1

2

3

4

5

6

hb1_main_0612_21/48_0.0

(No.YA705<Rev.001>)2-53 2-54(No.YA705<Rev.001>)

MAIN PWB CIRCUIT DIAGRAM (24/46) [TS Switch]

1

2

3

4

5

6

TS0_DATA from T and CABLE

A A

MAIN PWB(26/46)

MAIN PWB(2/46)

B B

C C

MAIN PWB(2/46)

MAIN PWB(26/46)

TS0_DATA[7..0]

TS1_DATA from SATELLITE

TS1_DATA[7..0]

TS0_CLK

TS0_STR
TS0_VLD
TS1_STR
TS1_VLD

TS1_CLK

SEL_TS0
SEL_TS1

TS0_DATA0
TS0_DATA1
TS0_DATA2
TS0_DATA3
TS0_DATA4
TS0_DATA5
TS0_DATA6
TS0_DATA7

SEL_TS0

TS1_DATA0
TS1_DATA1
TS1_DATA2
TS1_DATA3
TS1_DATA7
TS1_DATA6
TS1_DATA5
TS1_DATA4

SEL_TS1

A1

1A1

B1

1A2

C1

1A3

D1

1A4

E3

2A1

D2

2A2

C3

2A3

B2

2A4

A2

1OE

A4

2OE

SN74LVC244AZQNR

A1

1A1

B1

1A2

C1

1A3

D1

1A4

E3

2A1

D2

2A2

C3

2A3

B2

2A4

A2

1OE

A4

2OE

SN74LVC244AZQNR

A1

1A1

B1

1A2

C1

1A3

D1

1A4

E3

2A1

D2

2A2

C3

2A3

B2

2A4

A2

1OE

A4

2OE

SN74LVC244AZQNR

U853

B4

1Y1

C4

1Y2

D4

1Y3

E4

1Y4

E2

2Y1

D3

2Y2

C2

2Y3

B3

2Y4

A3

VCC

E1

DGND

U851

1Y1
1Y2
1Y3
1Y4
2Y1
2Y2
2Y3
2Y4

VCC

DGND

U852

1Y1
1Y2
1Y3
1Y4
2Y1
2Y2
2Y3
2Y4

VCC

DGND

B4
C4
D4
E4
E2
D3
C2
B3

A3
E1

B4
C4
D4
E4
E2
D3
C2
B3

A3
E1

C853

104p/16V/1005

TSI_D0
TSI_D1
TSI_D2
TSI_D3
TSI_D4
TSI_D5
TSI_D6
TSI_D7

+3V3_D

C851

104p/16V/1005

+3V3_D

C852

104p/16V/1005

+3V3_D +3V3_D

R864
103/1005

R851 101/1005
R852 101/1005
R853 101/1005
R854 101/1005
R855 101/1005
R856 101/1005
R857 101/1005
R858 101/1005

R861 101/1005

R862 101/1005
R863 101/1005

R865

472/1005

MUX_TSI_CLK

MUX_TSI_SYNC
MUX_TSI_VAL

MUX_TSI_D0
MUX_TSI_D1
MUX_TSI_D2
MUX_TSI_D3
MUX_TSI_D4
MUX_TSI_D5
MUX_TSI_D6
MUX_TSI_D7

MUX_TSI_CLK

MUX_TSI_SYNC
MUX_TSI_VAL

MUX_TSI_D0
MUX_TSI_D1
MUX_TSI_D2
MUX_TSI_D3
MUX_TSI_D4
MUX_TSI_D5
MUX_TSI_D6
MUX_TSI_D7

MAIN PWB(7/46),(9/46)

MAIN PWB(7/46),(9/46)

AH7
AH6

AJ6
AJ7
AJ5

W3
W2
W1

U102H
FLI10620H

CDI_CLK
CDI_VALID
CDI_SYNC
CDI_D0
CDI_ERROR

OOB_DRX
OOB_CRX
OOB_CTX

R866
103/1005

D D

1

Q851

23

MMBT4401

TS_SEL

L : Satellite

MAIN PWB(7/46)

MAIN PWB ASS'Y(24/46)

H : T and Cable

[TS Switch]

HU-71100006

All location are from 851 to 880

1

2

3

4

5

6

hb1_main_0612_22/48_0.0

2-56(No.YA705<Rev.001>)(No.YA705<Rev.001>)2-55

MAIN PWB CIRCUIT DIAGRAM (25/46) [CHANNEL POWER]

1

DVB-T POWER

A A

+5V

+5V4STB

C881

106p/10V/2012

TP881
PCB_TP10

1

C882

104p/16V/1005

/INH1VIN2GND3VOUT4ADJ

GND

6

C883

105p/16V/1005

U881
LD29150PT/P-PAK 5P

MAX 1.5A

5

R882
3092/F/1005

R883
103/F/1005

C885
101p/50V/1005

TP882
PCB_TP10

1

C886

106p/10V/2012

2

+5VTA

+5.03V
MAX 490mA

C890

104p/16V/1005

[TUNER : FQD1116]
ANT_PWR : 100mA
VP_TUN : 230mA
+5V_IF : 160mA

3

QPSK POWER

+3.3V_STUNER

TP887
PCB_TP10

C899

105p/25V

1

R890

103/1005

Max 1.5A

U887 RT9183H-PM5

2

VI

SD1GND

GND

3

6

VO

SEN

MAX 1.5A
(D-PAK)

Vout = 0.8x(1+R1/R2)

4

5

R892

132/F/1005

TP888
PCB_TP10

1

R1

103p/50V

R2

4

R891
272/F/1005

C900

470uF/16V/MVK/S

2.5VS_BCM4505

800 mA

C901

U882
LD1117AL-ADJ

VIN3VO

C902

104p/16V/1005

TP889
PCB_TP10

400 mA

2
4

TAP

ADJ

1

1

C903

100uF/16V/MVK/S

[SAT TUNER : NIM HSN5000LHS]

5

A1V2S_BCM4505

C904

106p/10V/2012

1.2V : 400mA

B B

TP883
PCB_TP10

+5VTA +1V2DT+3V3DT

C897

104p/16V/1005

C C

1

U883
LD1117AL-ADJ

VIN3VO

TAP

ADJ

1

TP884
PCB_TP10

2
4

1

R885
121/F/1005

R887
201/F/1005

MAX 330mA

C898

106p/10V/2012

U884
LD1117AL-1.2/SOT-223

VIN3VO

C892

104p/16V/1005

TAP

ADJ

1

TP885
PCB_TP10

2

1

4

100uF/16V/MVK/S

+1V2DT : Minimum 100uF because
ripple noise affect RF sensitive

[DVB-T DEMOD : TDA10048]
+3V3DT : 78mA
+1V2DT : 82mA

C895

C896

104p/16V/1005

+5V

L883
BLM18PG300SN1D

C884

106p/10V/2012

80 mA

+5V_STUNER

TP890
PCB_TP10

C891

104p/16V/1005

/INH1VIN2GND3VOUT4ADJ

1

MAX 1.5A

GND

6

U886
LD29150PT/P-PAK 5P

5

R889
1692/F/1005

R884
103/F/1005

TP891
PCB_TP10

1

C905
101p/50V/1005

2.5V : 400mA

3.3V : 30mA
5V : 80mA

C889

226p/6.3V/2012

30 mA

C888

106p/10V/2012

+3.3V_STUNER

C887

220uF/16V/BLA/S

R893
121/3216

MAIN PWB ASS'Y(25/46)

D D

All location are from 881 to 920

1

2

3

(No.YA705<Rev.001>)2-57 2-58(No.YA705<Rev.001>)

[CHANNEL POWER]

HU-71100006

4

5

hb1_main_0612_23/48_0.0

MAIN PWB CIRCUIT DIAGRAM (26/46) [OFDM Demodulator]

1

A A

MAIN PWB(1/46)

B B

DTT_IF_NARROW-

TUNER0_AGC

C963 104p/16V/1005

R963
102/1005

C961

OPEN-104p/16V/1005

MAIN PWB

(1/46)

C C

DTT_IF_NARROW+

C964 104p/16V/1005

SMD Type(Sunny,30pF)

2

+3V3DT

R961
OPEN-103/1005

IF_AGC0

Near By Tuner

R966
000/1005

R964
000/1005

C965 300p/50V/1005

C966 300p/50V/1005

Y961
16MHZ/20pF/SMD

VDDA_3V3

VDDD_3V3

VDDA_1V2

VDDDC_1V2

SDAT0
SCLT0

VDDD_1V2

1

VDDA_3V3

2

VIM

3

VIP

4

VSSA_3V3

5

VDDD_3V3

6

VSSA_3V3

7

XIN

8

XOUT

9

VDDA_1V2

10

VSSA_1V2

11

VDDA_1V2

12

VDDDC_1V2

R973 000/1005
R965 000/1005

3

IF_AGC0

VDDD_3V3

VDDDC_1V2

47

48

49

GND

VSSD

VDDD_1V2

VSSDC13VSSD14SDA_TUN15SCL_TUN16PSYNC/S_PSYNC

44

46

45

VSSDC

VDDD_3V3

VDDDC_1V2

*I2C Address : 0x10

TDA10048HN

17

43

42

40

41

TDO

CLR_N

AGC_IF

AGC_TUN

U961

DEN/S_DEN18OCLK/S_OCLK

DO0/S_UCOR

DO1/S_DO21DO2/GPIO122DO3/GPIO223DO4/GPIO3

19

20

39

TCK

+3V3DT

38

TDI

R962

OPEN-472/1005

C962

104p/16V/1005

37

TMS

TRST_N

SCL

SDA

SADDR

GPIO0

VDDDC_1V2

VSSDC

VSSD

VDDD_3V3

DO7

DO6

DO5

24

4

CH_TER_RESET

36

35

34

33

R970 000/1005

32

31

30

29

28

27

26

25

R967 330/1005

R968 330/1005

R969 OPEN-103/1005

TT_DO7

TT_DO6

TT_DO5

TT_DO4
TT_DO3
TT_DO2
TT_DO1
TT_DO0
TT_OCLK
TT_DEN
TT_PSYNC

MAIN PWB(7/46)

FLI_SCL_1

FLI_SDA_1

VDDDC_1V2

VDDD_3V3

TT_OCLK

TT_DEN
TT_PSYNC

TT_DO7 TS0_DATA7
TT_DO6
TT_DO5
TT_DO4
TT_DO3
TT_DO2
TT_DO1 TS0_DATA1
TT_DO0

5

FLI_SCL_1

FLI_SDA_1

+3V3DT

PR961
470*4/1005

45
36
27
18

PR962
470*4/1005

18
27
36
45
18
27
36
45

PR963
470*4/1005

MAIN PWB(2/46),(6/46),(27/46)

TS0_CLK

TS0_VLD
TS0_STR

TS0_DATA[7..0]

TS0_DATA6
TS0_DATA5
TS0_DATA4
TS0_DATA3
TS0_DATA2

TS0_DATA0

6

MAIN PWB(24/46)

VDDA_3V3+3V3DT

R972

183/1005

D D

MAIN PWB(1/46)

TUNER0_SCL

TUNER0_SDA

R974

183/1005

SCLT0
SDAT0

L962
BLM18PG300SN1D

L964
BLM18PG300SN1D

C967

104p/16V/1005

PIN1 PIN5 PIN28 PIN46 PIN9 PIN48 PIN31 PIN12

C968

104p/16V/1005

VDDD_3V3

C969
104p/16V/1005

C970

104p/16V/1005

+1V2DT VDDA_1V2

L961
BLM18PG300SN1D

L963
BLM18PG300SN1D

L965
BLM18PG300SN1D

C971

104p/16V/1005

VDDD_1V2 VDDDC_1V2+3V3DT

C972

104p/16V/1005

C973

104p/16V/1005

C974

104p/16V/1005

MAIN PWB ASS'Y(26/46)
[OFDM Demodulator]

HU-71100006

All location are from 961 to 980

1

2

3

4

5

6

hb1_main_0612_25/48_0.0

2-60(No.YA705<Rev.001>)(No.YA705<Rev.001>)2-59

MAIN PWB CIRCUIT DIAGRAM (27/46) [LNB Supply]

1

A A

MAIN PWB(2/46)

B B

22K_TONE

FLI_SDA_1

R1053 220/1005

R1055

330/1005

MAIN PWB(2/46),(6/46),(26/46)

FLI_SCL_1

R1056 330/1005

2

+3.3V_STUNER

R1051

OPEN-222/1005

224p/50V/2012

C1061

R1060

103/1005

+5V_STUNER

3

C1052

C1051

2

VCP

GND

14NC13

1

GND

LNB

BOOST

GND

LX

VIN

NC

FLOAT

15

C1053

104p/50V/2012

474p/50V/2012

21

20

19

18

17

16

C1055

103p/50V

4

3

5

EXTM

FLOAT

U1051

A8293SESTR-T

SCL

IRQ

12

11

TCAP

6

NC

7

GND

8

VREG

9

SDA

10

ADD

*I2C Address : 0x16

104p/50V/2012

C1054
100uF/35V/SMD/BXE 6.3P

C1062

224p/50V/2012

D1054

SS14

D1051
SS14

4

C1056

100uF/35V/SMD/BXE 6.3P

L1051

SPC12080-330M

D1053 US1M

R1061

102/6432

D1052
OPEN-SX34

C1064

474p/50V/2012

C1057

104p/50V

C1063

104p/50V/2012

5

L1052

CIB21P260NE

C1058

100uF/25V/BXE/S

Near by Tuner

12

+12V

D1055

SMDJ20A-101

C1060

104p/50V

LNB_OUT

to. TUNER

6

MAIN PWB(2/46)

C C

MAIN PWB ASS'Y(27/46)

D D

[LNB Supply]

HU-71100006

All location are from 1051 to 1070

1

2

3

4

5

6

hb1_main_0612_27/48_0.0

(No.YA705<Rev.001>)2-61 2-62(No.YA705<Rev.001>)

MAIN PWB CIRCUIT DIAGRAM (28/46) [STi7103 REGULATORS and DC/DC]

1

2

3

4

5

6

STb7100 Power ON sequnce

NORMAL POWER

TP1071

+5V

A A

C1075

106p/10V/2012

PCB_TP10

1

C1072

106p/10V/2012

OPEN-106p/16V/2012

C1080

R1071

104/1005

C1076

104p/16V/1005

7

8

4

U1071

EN

SS

GND

MP2307

2

IN

GND_P

9

R1095

750/F/1005

C1077
103p/50V/1005

1

BS

3

SW

5

FB

6

COMP

C1074

OPEN-561p/50V/1005

Vout = 0.92 * (R1+R2)/R2

D1071
OPEN-B340A

12

12

D1073
OPEN-LL4148

C1078

822p/25V/1005

R1074
4021/F/1005

3.364V Max.2.790A

L1071

SPC10040-4R7M

R1073

243/F/1005

R1075

OPEN-104/1005

R1072
912/F/1005

R2

TP1072
PCB_TP10

C1073

1

226p/6.3V/2012

R1

ST_3V3

C1071
220uF/16V/MVK/S

MAX: 3A

C1079

226p/6.3V/2012

B B

SYSTEM DDR SDRAM

1

CD1092

226p/6.3V/2012

104p/16V/1005

TP1073
PCB_TP10

CD1089

UD1074 RT9183H-PM5

2

ST2V6_ON

Max 1500mA

VI

GND

SD1GND

3

6

Vout = 0.8(1 + R1/R2)

2.6V (+/-)100mV

4

VO

5

SEN

TO263-5

RD1076

272/F

TP1074
PCB_TP10

1

R1

RD1077

CD1094

226p/6.3V/2012

+SYS_VDD_DDRST_3V3

Max
790mA

CD1090

104p/16V/1005

R2

122/F/1005

TP1075

+SYS_VDD_DDR +SYS_VTT_DDR

C1089

100uF/16V/MVK/S

C C

CD1099

226p/6.3V/2012

PCB_TP10

1

CD1096

104p/16V/1005

UD1075

1

VDD

2

VDD

3

VTTFORCE

4

VSS

5

VSS

6

VTTFORCE

7

VDD

FAN1655M

SOIC14

VREFOUT

VTTSENSE

VDDQ

VSSQ

/SHDN

VREFIN

VSS

14
13
12
11
10
9
8

CD1101

102p/50V/1005

ST_3V3

STb7100_+3V3IO

+SYS_VDD_DDR

D D

R1088

333/1005

R1090

OPEN-222/1005

C1108

475p/6.3V/2012

1

Q1073

MMBT4401

23

C1107

OPEN-104p/16V/1005

TP1076
PCB_TP10

RD1078

103/1005

CD1102

226p/6.3V/2012

R1089

103/1005

1

Q1075

IRLML6402TRPBF

102p/50V/1005

1

CD1103

104p/16V/1005

ST_3V3

2

104p/16V/1005

3

C1111

104p/16V/1005

CD1095

CD1104

102p/50V/1005

C1109

+SYS_VREF_DDR

TP1079
PCB_TP10

1

C1084
220uF/16V/MVK/S

C1110

106p/10V/2012

+3V3_STI7103

R1093
121/3216

+1V(+VDD1) -> +2V5(+VDD_2V5) --> +2V6(DDR) --> +3V3(IO)

STb710 CORE +1V

TP1077

+5V

C1086

106p/10V/2012

PCB_TP10

C1098

1

106p/10V/2012

R1079

104/1005

C1083

OPEN-106p/16V/2012

C1097
104p/16V/1005

7

8

4

U1073

EN

SS

GND

MP2307

MAX: 3A

1

2

IN

GND_P

9

OPEN-561p/50V/1005

R1094

750/F/1005

BS

SW

FB

COMP

C1085
103p/50V/1005

3

5

6

C1100

Vout=0.925 x (1+R1/R2)

ST_3V3

R1087

ST_1V1

R1085

103/1005

MMBT4401

1

Q1071

ST_3V3

R1086
103/1005

472/1005

C1105

OPEN-104p/16V/1005

23

R1091

1

R1092

101/1005

Q1072
MMBT4401

23

104/1005

C1106

105p/16V/1005

STb7100 CORE +2.5V

ST2V6_ON

MAIN PWB ASS'Y(28/46)
[STi7103 REGULATORS and DC/DC]

HU-71100006

L1072

4.7uH/SPC7040-4R7/3.5A

D1072
OPEN-B340A

12

R1076

12

C1081

822p/25V/1005

R1081
4021/F/1005

OPEN-104/1005

D1074
OPEN-LL4148

R1082

202/F/1005

Typ.
120mA

R1

R2

TP1080
PCB_TP10

1

TP1078
PCB_TP10

1

R1083
912/F/1005

ST_2V6

C1091

104p/16V/1005

C1082

226p/6.3V/2012

C1087

226p/6.3V/2012

L1074

BLM18PG300SN1D

ST_1V1

1.128 V
Typ. 1200mA

C1088

100uF/16V/MVK/S

+SYS_VDD_DDR

All location are from 1071 to 1120

1

2

3

4

5

6

hb1_main_0612_28/48_0.0

2-64(No.YA705<Rev.001>)(No.YA705<Rev.001>)2-63

MAIN PWB CIRCUIT DIAGRAM (29/46) [STi7103_POWER]

5

C1144

105p/16V/1005

C1146

105p/16V/1005

C1170
104p/16V/1005

C1147
105p/16V/1005

C1148
105p/16V/1005

C1171

104p/16V/1005

+2V6_ST

D D

ST_1V1

C C

B B

A A

ST_2V6

L1131

BLM18PG300SN1D

L1133

BLM18PG300SN1D

L1132

BLM18PG300SN1D

ST_1V1

C1132
104p/16V/1005

C1161

106p/10V/2012

C1160
106p/10V/2012

105p/16V/1005

C1162

106p/10V/2012

C1133

104p/16V/1005

C1145

TO PLACE AS CLOSE AS
POSSIBLE TO THE ST17103

4

AF23

SATAVDDOSC2V5

AD23

SATAVDDOSC

AK25

SATAVDDR[0]

AJ22

SATAVDDR[1]

AJ26

SATAVDDT[0]

AK27

SATAVDDT[1]

AA24

SATAVDDREF

AC24

SATAVDDDLL

AB24

SATAVDDDELAYDLL

AF26

SATAVSSSUBOSC

AG27

SATAVSSOSC

AH27

SATAVSSR

AD24

SATAVSST

AJ27

SATAVSSREF

AF28

SATAVSSDLL

AE29

SATAVSSDELAYDLL

J10

CKGA_PLL1_AVDDPLL2V5

J11

CKGA_PLL2_AVDDPLL2V5

J9

CKGA_PLL_VDDE2V5

B1

CKGA_PLL1_AGNDPLL2V5

C3

CKGA_PLL2_AGNDPLL2V5

K9

CKGA_PLL1_DVDDPLL1V0

K10

CKGA_PLL2_DVDDPLL1V0

B2

CKGA_PLL1_DGNDPLL1V0

F4

CKGA_PLL2_DGNDPLL1V0

J24

CKGB_4FS0_VCCA

K24

CKGB_4FS1_VCCA

G27

AVDDPLL80V0

U23

VDDE2V5_PLL80_ANA

P23

VDDE2V5_4FS_ANA

T29

GNDE_4FS_ANA

J30

GNDE_PLL80_ANA

H26

AGNDPLL80V0

M22

CKGB_4FS1_GNDA

L22

CKGB_4FS0_GNDA

J23

CKGB_4FS0_VDDD

K23

CKGB_4FS1_VDDD

M21

CKGB_4FS1_GNDD

L21

CKGB_4FS0_GNDD

N25

DVDDPLL80V0

N27

DGNDPLL80V0

M26

FS0_VCCA

T23

VDDE2V5_FS0_ANA

M29

GNDE_FS0_ANA

P27

FS0_GNDA

N26

FS0_VDDD

R28

FS0_GNDD

GNDE

GNDE

M19

M20

GNDE

AA19

GNDE

AB14

GNDE

AA14

GNDE

AB16

AB17

GNDE

GNDE

AB18

SATA

GNDE

AB15

AA17

CLK GEN ACLK GEN BCLK GEN C

GNDE

GNDE

L15

AA18

GNDE

GNDE

L16

AA10

AA12

AA11

VDDE3V3

VDDE3V3

GNDE

GNDE

L17

L18

L19

AA22

L11

L12

VDDE3V3

VDDE3V3

VDDE3V3

GNDE

GNDE

GNDE

W12

AA15

AA16

AA21

K22

M11

VDDE3V3

VDDE3V3

VDDE3V3

GNDE

GNDE

GNDE

M15

M16

M17

M12

L23

L24

K21

VDDE3V3

VDDE3V3

VDDE3V3

VDDE3V3

U1131H

ST-7103AUD

Power

GNDE

GNDE

GNDE

GNDE

P21

P22

M18

M23

AB10

AB11

AB12

VDDE3V3

VDDE3V3

VDDE3V3

GNDE

GNDE

GNDE

L13

N11

AB19

3

AB21

AB22

AB9

VDDE3V3

VDDE3V3

VDDE3V3

GNDE

GNDE

GNDE

L14

P11

P12

AC21

J21

AA9

VDDE3V3

VDDE3V3

VDDE3V3

GNDE

GNDE

GNDE

Y22

W22

W11

J22

VDDE3V3

VDDE3V3

TMDSVDDE3V3

USBVDDB3V3

USBVDDBC2V5

USBVDDP2V5

USBVSSC2V5
USBVSSP2V5

USB

DA_HD_0_VCCA

DA_SD_0_VCCA
VDDE2V5_VID_ANA
VDDE2V5_VID_ANA

VDDE2V5_AUD_ANA

DA_HD_0_GNDA
DA_SD_0_GNDA

GNDE_VID_ANA

AUD_GNDAS

GNDE_AUD_ANA

TMDSVDDSL

TMDSVDDCK

TMDSVDDC2
TMDSVDDC1
TMDSVDDC0

HDMI

TMDSVSSSL

TMDSVSSCK
TMDSVSSC2
TMDSVSSC1
TMDSVSSC0

GNDE

GNDE

GNDE

GNDE

GNDE

GNDE

Y12

Y11

N22

N12

W21

TMDSGNDE

USBVDDP

USBVDDBS

USBVSSP

USBVSSBS

AUD_VCCA

AUD_GNDA

VDDE2V5
VDDE2V5
VDDE2V5
VDDE2V5
VDDE2V5
VDDE2V5
VDDE2V5

GND_ANA
GND_ANA
GND_ANA
GND_ANA
GND_ANA
GND_ANA
GND_ANA

TMDSVDDD

TMDSVDDX
TMDSVDDP

TMDSVDD

TMDSVSSD

TMDSVSSX
TMDSVSSP

GNDE

GNDE

GNDE

L20

Y21

N21

M14

GNDE

GNDE

M13

M24

Y25

AD21

AF21
AE22

AH23
AK23

AD22
AC22

AJ24
AK24

E30
F30
W23
V23

R23
B24

C32
A29
P25

E26
F25
K28

K11
J12
K12
AD10
AD9
AC10
AC9

F21
C20
F23
G19
F19
G22
H20

W24
AB23
AC23
AA23
V24
U24
T24
R24
P24

AA29
W28
AA27
Y28
V30
V31
U31
U32

+3V3_ST

ST_2V6

ST_1V1

+2V6_ST_AUD

+2V6_ST

ST_1V1

2

+2V6_ST_AUD

C1167

C1168

106p/10V/2012

106p/10V/2012

C1163

106p/10V/2012

C1135

104p/16V/1005

C1169

C1157

C1156

105p/16V/1005

105p/16V/1005

C1165

C1164

106p/10V/2012

106p/10V/2012

C1136

C1134

104p/16V/1005

104p/16V/1005

106p/10V/2012

C1149

C1158

105p/16V/1005

C1141

C1140

104p/16V/1005

104p/16V/1005

C1166

C1150

105p/16V/1005

106p/10V/2012

C1137

C1138

104p/16V/1005

104p/16V/1005

C1159

104p/16V/1005

104p/16V/1005

+2V6_ST

C1142

C1143

104p/16V/1005

C1152

C1151

105p/16V/1005

C1139

C1154

104p/16V/1005

C1131

104p/16V/1005

105p/16V/1005

105p/16V/1005

MAIN PWB ASS'Y(29/46)
[STi7103_POWER]

HU-71100006

1

L1136

BLM21PG600SN1D

103p/50V/1005

L1135

BLM21PG600SN1D

+3V3_ST

L1134

BLM21PG600SN1D

C1153

105p/16V/1005

C1155

105p/16V/1005

ST_2V6

ST_2V6

+3V3_STI7103

All location are from 1131 to 1180

5

4

3

2

1

hb1_main_0612_29/48_0.0

(No.YA705<Rev.001>)2-65 2-66(No.YA705<Rev.001>)

MAIN PWB CIRCUIT DIAGRAM (30/46) [STi7103_POWER_2]

5

4

3

2

1

+1V1_ST

D D

AA5

AA7

AF3

AF6

AG8

AK8

AM1

AM3

L9

VDD

L10

VDD

M9

VDD

M10

VDD

R11

VDD

R12

VDD

R21

VDD

R22

VDD

T11

VDD

T12

VDD

T21

VDD

T22

VDD

U11

VDD

U12

VDD

U21

VDD

U22

C C

B B

V11
V12
V21

V22
AC11
AC12
AC14
AC15
AC16
AC17
AC18
AC19
AD11
AD12
AD14
AD15
AD16
AD17
AD18
AD19

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

NC1

NC2

NC3

NC4

NC5

NC6

NC7

NC8

U1131J

ST-7103AUD

Power_2

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

C7
D11
D16
E12
F6
F13
G5
G13
L3
M4
N8
N13
N14
N15
N16
N17
N18
N19
N20
P6
P7
P13
P20
R13
R15
R16
R17
R18
R20
T2
T13
T20
T15
T18
U13
U15
U18
U20

C1205

C1204

106p/10V/2012

106p/10V/2012

C1188

C1187

104p/16V/1005

104p/16V/1005

C1203

C1202

105p/16V/1005

105p/16V/1005

C1190

C1189

104p/16V/1005

104p/16V/1005

C1182

C1181

103p/50V/1005

103p/50V/1005

C1201

C1200

104p/16V/1005

104p/16V/1005

C1184

C1183

103p/50V/1005

103p/50V/1005

C1186

C1185

103p/50V/1005

103p/50V/1005

ST_1V1+1V1_ST

L1181

BLM21PG600SN1D

GND

V13

GND

V15

GND

V16

AA13

GND

V17

GND

GND

V18

GND

V20

GND

W13

GND

W20

GND

W26

GND

W27

GND

Y13

GND

Y14

GND

Y15

GND

Y16

GND

Y17

GND

Y18

GND

Y19

GND

Y20

GND

AA20

AB13

GND

GND

AB20

GND

AE13

AE19

GND

GND

AE20

GND

AF14

AF20

GND

GND

AG14

GND

AH18

AG20

GND

GND

AH31

GND

AM32

MAIN PWB ASS'Y(30/46)

TO PLACE AS CLOSE AS
POSSIBLE TO THE STi7103

A A

All location are from 1181 to 1210

5

4

3

2-68(No.YA705<Rev.001>)(No.YA705<Rev.001>)2-67

[STi7103_POWER_2]

HU-71100006

2

1

hb1_main_0612_30/48_0.0

MAIN PWB CIRCUIT DIAGRAM (31/46) [STi7103 CLOCKS, RESET and DEBUG]

5

D D

ST_3V3

R1215
103/1005

R1221

472/1005

TrigOut_ST
TrigIn_ST
nASEBRK_ST
TMS_ST
TCK_ST
TDI_ST
TDO_ST
JTAG_nRESET
nTRST_ST

R1216

103/1005

R1211

103/1005

C C

JP1211

12
34
56
78

910
1112
1314
1516
1718
1920

OPEN_HE10_20CM

R1217

OPEN-470/1005

R1213
103/1005

C1215

104p/16V/1005

R1214
103/1005

4

R1223

OPEN-472/1005

R1224

OPEN-472/1005

DCU_nRESET

R1225

103/1005

MAIN PWB(37/46)

ST_2V6

3

C1213

090p/50V/1005

C1214

Y1211
27MHz/13.5pF/SMD

090p/50V/1005

R1219

103/1005

C1216

102p/50V/1005

R1218

R1218

100/F/1005

TP1211 PCB_TP08
TP1212 PCB_TP08

nTRST_ST
TDO_ST

nASEBRK_ST
TMS_ST
TDI_ST

TrigOut_ST
TrigIn_ST
TCK_ST

MAIN PWB(37/46)

U1131C ST-7103AUD

A1

sysaclkin

G24

sysbclkinalt

AM25

sysbclkin

AL25

sysbclkosc

H23

1
1

C21

D21
D23
B21
C22
C23

A22
B22
C24

rtcclkin
tmuclk

nottrst
tdo
notasebrk
tms
tdi

triggerout
triggerin
tck

2

wdogrstout

System&Debug

STb7100_nRESET

notresetin

sysitrq[0]
sysitrq[1]
sysitrq[2]
sysitrq[3]

nmi

sysclkout

A24

E24

AG24
AH25
AF25
AG26
E20

E22

1

TP1213 PCB_TP08

1

TP1214 PCB_TP08

R1226 220/1005

1

ST_3V3

R1212

103/1005

R1227 220/1005

R1222

103/1005

R1228 220/1005

B B

ST_3V3ST_3V3

C1211

104p/16V/1005

A A

C1212

104p/16V/1005

MAIN PWB ASS'Y (31/46)
[STi7103 CLOCKS, RESET and DEBUG]

All location are from 1211 to 1230

5

4

3

(No.YA705<Rev.001>)2-69 2-70(No.YA705<Rev.001>)

HU-71100006

2

1

hb1_main_0612_31/48_0.0

MAIN PWB CIRCUIT DIAGRAM (32/46) [STi7103 LMI DDR_SDRAM]

5

D D

LMI_DATA0
LMI_DATA1
LMI_DATA2
LMI_DATA3
LMI_DATA4
LMI_DATA5
LMI_DATA6
LMI_DATA7
LMI_DATA8
LMI_DATA9
LMI_DATA10
LMI_DATA11
LMI_DATA12
LMI_DATA13
LMI_DATA14
LMI_DATA15
LMI_DATA16
LMI_DATA17
LMI_DATA18

LMI_CLK
LMI_notCLK
LMI_CKEN

CD1248

LMI_DATA19
LMI_DATA20
LMI_DATA21
LMI_DATA22
LMI_DATA23
LMI_DATA24
LMI_DATA25
LMI_DATA26
LMI_DATA27
LMI_DATA28
LMI_DATA29
LMI_DATA30
LMI_DATA31

+SYS_VDD_DDR

C C

LMI_CLK

MAIN PWB(33/46)

LMI_notCLK

LMI_CKEN

Close to

B B

STi7103

CD1245

103p/50V/1005

103p/50V/1005

PR1231A
PR1231B
PR1231C
PR1231D
PR1232A
PR1232B
PR1232C
PR1232D
PR1233A
PR1233B
PR1233C
PR1233D
PR1234A
PR1234B
PR1234C
PR1234D
PR1235A
PR1235B
PR1235C
PR1235D
PR1236A
PR1236B
PR1236C
PR1236D
PR1237A
PR1237B
PR1237C
PR1237D
PR1238A
PR1238B
PR1238C
PR1238D

RD1231 220/1005
RD1233 220/1005

PR1242D 220*4/1005

CD1246

104p/16V/1005

CD1247

104p/16V/1005

18
27
36
45
18
27
36
45
18
27
36
45
18
27
36
45
18
27
36
45
18
27
36
45
18
27
36
45
18
27
36
45

220*4/1005
220*4/1005
220*4/1005
220*4/1005
220*4/1005
220*4/1005
220*4/1005
220*4/1005
220*4/1005
220*4/1005
220*4/1005
220*4/1005
220*4/1005
220*4/1005
220*4/1005
220*4/1005
220*4/1005
220*4/1005
220*4/1005
220*4/1005
220*4/1005
220*4/1005
220*4/1005
220*4/1005
220*4/1005
220*4/1005
220*4/1005
220*4/1005
220*4/1005
220*4/1005
220*4/1005
220*4/1005

45

+SYS_VDD_DDR

CD1237
47uF/16V/MVK/S

4

U1131A ST-7103AUD

M2

lmisysdata[0]

M3

lmisysdata[1]

N5

lmisysdata[2]

N3

lmisysdata[3]

N4

lmisysdata[4]

P5

lmisysdata[5]

P4

lmisysdata[6]

R4

lmisysdata[7]

C2

lmisysdata[8]

C1

lmisysdata[9]

D3

lmisysdata[10]

D1

lmisysdata[11]

D2

lmisysdata[12]

E4

lmisysdata[13]

E2

lmisysdata[14]

E3

lmisysdata[15]

U3

lmisysdata[16]

U4

lmisysdata[17]

V3

lmisysdata[18]

V1

lmisysdata[19]

V2

lmisysdata[20]

W3

lmisysdata[21]

W2

lmisysdata[22]

W4

lmisysdata[23]

H3

lmisysdata[24]

H2

lmisysdata[25]

H4

lmisysdata[26]

J2

lmisysdata[27]

J1

lmisysdata[28]

J3

lmisysdata[29]

K4

lmisysdata[30]

K3

lmisysdata[31]

L1

lmisysclk

L2

notlmisysclk

W6

lmisysclken

P9

LMISYSVDDE2V5

P10

LMISYSVDDE2V5

R9

LMISYSVDDE2V5

R10

LMISYSVDDE2V5

T9

LMISYSVDDE2V5

T10

LMISYSVDDE2V5

U9

LMISYSVDDE2V5

U10

LMISYSVDDE2V5

V9

LMISYSVDDE2V5

V10

LMISYSVDDE2V5

W9

LMISYSVDDE2V5

W10

LMISYSVDDE2V5

lmisysadd[0]
lmisysadd[1]
lmisysadd[2]
lmisysadd[3]
lmisysadd[4]
lmisysadd[5]
lmisysadd[6]
lmisysadd[7]
lmisysadd[8]

lmisysadd[9]
lmisysadd[10]
lmisysadd[11]
lmisysadd[12]

lmisysbksel[0]
lmisysbksel[1]

lmisysdatastrobe[0]
lmisysdatastrobe[1]
lmisysdatastrobe[2]
lmisysdatastrobe[3]

lmisysdatamask[0]
lmisysdatamask[1]
lmisysdatamask[2]
lmisysdatamask[3]

notlmisysras

notlmisyscas

notlmisyswe
notlmisyscs[0]
notlmisyscs[1]

LMISYSVREF

LMISYSGNDBGCOMP

System
LMI Interface

LMISYSREF

M8
N7
L7
M6
K8
H6
J7
G7
H8
J5
R6
L5
K6

T5
R8

R2
F5
T3
G4

R3
F3
T1
G3

U6
U8
V7
T7
V5

W8
E5
Y8

3

PR1239C
PR1239B
PR1239A
PR1240D
PR1239D
PR1241B
PR1240A
PR1241C
PR1241A
PR1241D
PR1245A
PR1240B
PR1240C

PR1245C
PR1245B

RD1234 220/1005
RD1236 220/1005
RD1237 220/1005
RD1238 220/1005

RD1239 220/1005
RD1240 220/1005
RD1241 220/1005
RD1242 220/1005

PR1242A
PR1242C
PR1242B
PR1245D

124/F/1005

36
27
18
45
45
27
18
36
18
45
18
27
36

36
27

18
36
27
45

RD1235 220/1005

RD1232

On Components side
Close to STi7103

220*4/1005
220*4/1005
220*4/1005
220*4/1005
220*4/1005
220*4/1005
220*4/1005
220*4/1005
220*4/1005
220*4/1005
220*4/1005
220*4/1005
220*4/1005

220*4/1005
220*4/1005

220*4/1005
220*4/1005
220*4/1005
220*4/1005

CD1236

104p/16V/1005

LMI_DATA[31..0]

LMI_ADDR0
LMI_ADDR1
LMI_ADDR2
LMI_ADDR3
LMI_ADDR4
LMI_ADDR5
LMI_ADDR6
LMI_ADDR7
LMI_ADDR8
LMI_ADDR9
LMI_ADDR10
LMI_ADDR11
LMI_ADDR12

LMI_BANK0
LMI_BANK1

LMI_DQS0

LMI_DQS1
LMI_DQS2
LMI_DQS3

LMI_DQM0
LMI_DQM1
LMI_DQM2
LMI_DQM3

LMI_notRAS
LMI_notCAS
LMI_WE
LMI_notCS0
LMI_notCS1

+SYS_VREF_DDR +SYS_VDD_DDR

CD1238

104p/16V/1005

2

LMI_ADDR[12..0]

LMI_BANK0
LMI_BANK1

LMI_DQS0
LMI_DQS1
LMI_DQS2
LMI_DQS3

LMI_DQM0
LMI_DQM1
LMI_DQM2
LMI_DQM3

LMI_notRAS
LMI_notCAS
LMI_WE
LMI_notCS0

MAIN PWB(33/46)

1

TP1231 PCB_TP08

Close to VDD pins of DDR parts

CD1234

104p/16V/1005

LMI_DATA[31..0]

LMI_ADDR[12..0]

CD1241

104p/16V/1005

MAIN PWB(33/46)

+SYS_VDD_DDR+SYS_VDD_DDR

CD1240
47uF/16V/MVK/S

1

CD1233

A A

MAIN PWB ASS'Y(32/46)

104p/16V/1005

CD1242

47uF/16V/MVK/S

CD1239

104p/16V/1005

[STi7103 LMI DDR_SDRAM]

HU-71100006

All location are from 1231 to 1260

5

4

3

2

1

hb1_main_0612_32/48_0.0

2-72(No.YA705<Rev.001>)(No.YA705<Rev.001>)2-71

MAIN PWB CIRCUIT DIAGRAM (33/46) [STi7103 LMI DDR_SDRAM]

5

LMI_DATA[31..0]

LMI_DATA[31..0]

MAIN PWB

(32/46)

Manual Swap : RS36 >>RS45
RS45-pin2 on DQS1

D D

C C

+SYS_VTT_DDR

MAIN PWB

(32/46)

RD1269 101/1005
RD1270 101/1005
RD1271 101/1005
RD1272 101/1005

LMI_CLK

LMI_notCLK

LMI_CKEN

LMI_BANK0
LMI_BANK1

LMI_DQS0
LMI_DQS1
LMI_DQS2
LMI_DQS3

LMI_DQM0
LMI_DQM1
LMI_DQM2
LMI_DQM3

LMI_notRAS
LMI_notCAS

LMI_WE

LMI_notCS0

MAIN PWB

(32/46)

B B

A A

RS45-pin4 on DQM1

LMI_CLK
LMI_notCLK
LMI_CKEN

LMI_BANK0
LMI_BANK1

LMI_DQS0
LMI_DQS1
LMI_DQS2
LMI_DQS3

LMI_DQM0
LMI_DQM1
LMI_DQM2
LMI_DQM3

LMI_notRAS
LMI_notCAS

LMI_WE

LMI_notCS0

LMI_DATA[31..0]

LMI_ADDR[12..0]

+SYS_VTT_DDR

+SYS_VDD_DDR

LMI_ADDR[12..0]

LMI_DQS1
LMI_DQS3
LMI_DQM1
LMI_DQM3

+SYS_VDD_DDR +SYS_VREF_DDR

PR1264B 101*4/1005
PR1264C 101*4/1005
PR1262D 101*4/1005
PR1265A 101*4/1005
PR1265D 101*4/1005
PR1265B 101*4/1005
PR1264D 101*4/1005
PR1265C 101*4/1005
PR1263A 101*4/1005
PR1264A 101*4/1005
PR1263D 101*4/1005
PR1263C 101*4/1005
PR1263B 101*4/1005
PR1262B 101*4/1005
PR1262C 101*4/1005

PR1261D 101*4/1005
PR1261B 101*4/1005
PR1261C 101*4/1005
RD1268 101/1005
RD1273 101/1005

RD1263 121/F/1005
RD1264 121/F/1005

PR1261A 101*4/1005

CD1264

104p/16V/1005

104p/16V/1005

27
36
45
18
45
27
45
36
18
18
45
36
27
27
36

45
27
36

18

+SYS_VREF_DDR

CD1263

LMI_ADDR[12..0]

RD1262

OPEN-101/1005

CD1262

104p/16V/1005

LMI_ADDR12
LMI_ADDR11
LMI_ADDR10
LMI_ADDR9
LMI_ADDR8
LMI_ADDR7
LMI_ADDR6
LMI_ADDR5
LMI_ADDR4
LMI_ADDR3
LMI_ADDR2
LMI_ADDR1
LMI_ADDR0

+SYS_VDD_DDR

CD1261

104p/16V/1005

RD1261

RD1261

+SYS_VDD_DDR

4

LMI_ADDR12
LMI_ADDR11
LMI_ADDR10
LMI_ADDR9
LMI_ADDR8
LMI_ADDR7
LMI_ADDR6
LMI_ADDR5
LMI_ADDR4
LMI_ADDR3
LMI_ADDR2
LMI_ADDR1
LMI_ADDR0
LMI_BANK0
LMI_BANK1

LMI_notRAS
LMI_notCAS
LMI_WE
LMI_DQM2
LMI_DQM0

LMI_notCLK
LMI_CLK
LMI_CKEN

OPEN-101/1005

OPEN-101/1005

LMI_ADDR12
LMI_ADDR11
LMI_ADDR10
LMI_ADDR9
LMI_ADDR8
LMI_ADDR7
LMI_ADDR6
LMI_ADDR5
LMI_ADDR4
LMI_ADDR3
LMI_ADDR2
LMI_ADDR1
LMI_ADDR0
LMI_BANK0
LMI_BANK1

LMI_notRAS
LMI_notCAS
LMI_WE
LMI_DQM3
LMI_DQM1

LMI_notCLK
LMI_CLK
LMI_CKEN

UD1262

17

NC

42

A12

41

A11

28

AP/A10

40

A9

39

A8

38

A7

37

A6

36

A5

35

A4

32

A3

31

A2

30

A1

29

A0

26

BA0

27

BA1

23

RAS

22

CAS

21

WE

47

UDM

20

LDM

46

CK

45

CK

44

CKE

1

VDD

18

VDD

33

VDD

3

VDDQ

9

VDDQ

15

VDDQ

55

VDDQ

61

VDDQ

49

VREF

HY5DU121622DTP-D43
66PIN TSOP-2

UD1261

17

NC

42

A12

41

A11

28

AP/A10

40

A9

39

A8

38

A7

37

A6

36

A5

35

A4

32

A3

31

A2

30

A1

29
26
27

23
22
21
47
20

46
45
44

1
18
33

3

9
15
55
61

49

512Mbits

A0
BA0
BA1

8M X 4 banks X

16bits

RAS
CAS

UDQS

WE

LDQS

UDM
LDM

CK
CK
CKE

VDD
VDD
VDD
VDDQ
VDDQ

DDR SDRAM

VDDQ
VDDQ
VDDQ

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

VREF

HY5DU121622DTP-D43
66PIN TSOP-2

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7

DQ8

DQ9
DQ10
DQ11
DQ12
DQ13

512Mbits

DQ14
DQ15

8M X 4 banks X

16bits

UDQS

LDQS

VSS

DDR SDRAM

VSS

VSS

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

2

DQ0

4

DQ1

5

DQ2

7

DQ3

8

DQ4

10

DQ5

11

DQ6

13

DQ7

54

DQ8

56

DQ9

57

DQ10

59

DQ11

60

DQ12

62

DQ13

63

DQ14

65

DQ15

51

16

24

CS

53

NC

50

NC

43

NC

25

NC

19

NC

14

NC

34

VSS

48

VSS

66

VSS

6
12
52
58
64

CS
NC
NC
NC
NC
NC
NC

2
4
5
7
8
10
11
13

54
56
57
59
60
62
63
65

51

16

LMI_notCS0

24
53
50
43
25
19
14

34
48
66

6
12
52
58
64

LMI_DATA0
LMI_DATA1
LMI_DATA2
LMI_DATA3
LMI_DATA4
LMI_DATA5
LMI_DATA6
LMI_DATA7

LMI_DATA16
LMI_DATA17
LMI_DATA18
LMI_DATA19
LMI_DATA20
LMI_DATA21
LMI_DATA22
LMI_DATA23

R and C, On
Components side
near device

LMI_DATA8
LMI_DATA9
LMI_DATA10
LMI_DATA11
LMI_DATA12
LMI_DATA13
LMI_DATA14
LMI_DATA15

LMI_DATA24
LMI_DATA25
LMI_DATA26
LMI_DATA27
LMI_DATA28
LMI_DATA29
LMI_DATA30
LMI_DATA31

R and C, On
Components side
near device

LMI_DQS2

LMI_DQS0

LMI_notCS0

3

+SYS_VTT_DDR

LMI_DQS3

LMI_DQS1

LMI_DATA0
LMI_DATA1
LMI_DATA2
LMI_DATA3
LMI_DATA4
LMI_DATA5
LMI_DATA6
LMI_DATA7

LMI_DATA16
LMI_DATA17
LMI_DATA18
LMI_DATA19
LMI_DATA20
LMI_DATA21
LMI_DATA22
LMI_DATA23

LMI_DATA8
LMI_DATA9
LMI_DATA10
LMI_DATA11
LMI_DATA12
LMI_DATA13
LMI_DATA14
LMI_DATA15

LMI_DATA24
LMI_DATA25
LMI_DATA26
LMI_DATA27
LMI_DATA28
LMI_DATA29
LMI_DATA30
LMI_DATA31

PR1267A 101*4/1005
PR1267B 101*4/1005
PR1267C 101*4/1005
PR1267D 101*4/1005
PR1268A 101*4/1005
PR1268B 101*4/1005
PR1268C 101*4/1005
PR1268D 101*4/1005

PR1269A 101*4/1005
PR1269B 101*4/1005
PR1269C 101*4/1005
PR1269D 101*4/1005
PR1270A 101*4/1005
PR1270B 101*4/1005
PR1270C 101*4/1005
PR1270D 101*4/1005

RD1266 101/1005

RD1267 101/1005

PR1262A 101*4/1005

18

PR1272A 101*4/1005
PR1272B 101*4/1005
PR1272C 101*4/1005
PR1272D 101*4/1005
PR1273A 101*4/1005
PR1273B 101*4/1005
PR1273C 101*4/1005
PR1273D 101*4/1005

PR1274A 101*4/1005
PR1274B 101*4/1005
PR1274C 101*4/1005
PR1274D 101*4/1005
PR1275A 101*4/1005
PR1275B 101*4/1005
PR1275C 101*4/1005
PR1275D 101*4/1005

+SYS_VTT_DDR

+SYS_VTT_DDR

+SYS_VTT_DDR

18
27
36
45
18
27
36
45

18
27
36
45
18
27
36
45

18
27
36
45
18
27
36
45

18
27
36
45
18
27
36
45

CD1267

226p/6.3V/2012

CD1290

226p/6.3V/2012

CD1269

104p/16V/1005

CD1308

104p/16V/1005

CD1293

226p/6.3V/2012

CD1306

104p/16V/1005

+SYS_VDD_DDR

+SYS_VDD_DDR

MAIN PWB ASS'Y(33/46)
[STi7103 LMI DDR_SDRAM]

HU-71100006

* DDR SDRAM MULTI-VENDOR*

- 1st VENDOR: 00004-0950 HY5DU121622DTP-D43(HYNIX)

- 2nd VENDOR: 00004-00002 K4H511638D-UCCC(SAMSUNG)

2

CD1288

226p/6.3V/2012

104p/16V/1005

CD1307

104p/16V/1005

CD1299

226p/6.3V/2012

CD1324

104p/16V/1005

CD1305

226p/6.3V/2012

CD1300

CD1301

104p/16V/1005

CD1270
226p/6.3V/2012

CD1298

226p/6.3V/2012

CD1325

104p/16V/1005

CD1326

104p/16V/1005

CD1268

104p/16V/1005

CD1294

104p/16V/1005

CD1303

104p/16V/1005

CD1314

226p/6.3V/2012

CD1327
104p/16V/1005

CD1292

104p/16V/1005

CD1304

104p/16V/1005

CD1302

104p/16V/1005

CD1271
226p/6.3V/2012

CD1330

104p/16V/1005

CD1309

104p/16V/1005

CD1319

104p/16V/1005

CD1317

104p/16V/1005

CD1329

104p/16V/1005

CD1328

104p/16V/1005

CD1311

104p/16V/1005

CD1310

104p/16V/1005

CD1318

104p/16V/1005

CD1331

104p/16V/1005

1

CD1289

104p/16V/1005

CD1320
104p/16V/1005

CD1323

104p/16V/1005

CD1333

104p/16V/1005

CD1291
104p/16V/1005

CD1295

104p/16V/1005

CD1321

104p/16V/1005

CD1296

104p/16V/1005

CD1322

104p/16V/1005

All location are from 1261 to 1280

5

4

3

2

1

hb1_main_0612_33/48_0.0

(No.YA705<Rev.001>)2-73 2-74(No.YA705<Rev.001>)

MAIN PWB CIRCUIT DIAGRAM (34/46) [STi7103 VIDEO LMI DDR_SDRAM and STi7103 TS_HEADERS and VIDEO_IN]

5

4

3

2

1

MAIN PWB ASS'Y(34/46)

D D

C C

B B

Close to
STi7103

103p/50V/1005

[STi7103 VIDEO LMI DDR_SDRAM and STi7103 TS_HEADERS and VIDEO_IN]

HU-71100006

U1131I ST-7103AUD

F16
G15
F14
H14
H9
F9
E8
G8
F7
E10
H11
G10
F11

H16
E17

A15
C6
C17
D7

C15
D6
C16
B7

H18
G20
H21
F18
G17

G12
A2

H13

RD1281

OPEN-124/F/1005

MAIN PWB(9/46)

On Components side
Close to STi7103

TS_ST_SYNC

CD1286

OPEN-104p/16V/1005

TS_ST_DATA[7..0]

TS_ST_CLK

TS_ST_VAL

R1291
103/1005

+SYS_VDD_DDR+SYS_VREF_DDR

CD1284

+SYS_VDD_DDR

CD1285

103p/50V/1005

CD1282

104p/16V/1005

CD1283

104p/16V/1005

+SYS_VDD_DDR

CD1281

47uF/16V/MVK/S

C12

lmividdata[0]

D12

lmividdata[1]

E13

lmividdata[2]

D13

lmividdata[3]

D14

lmividdata[4]

B14

lmividdata[5]

C14

lmividdata[6]

B15

lmividdata[7]

A3

lmividdata[8]

B3

lmividdata[9]

D4

lmividdata[10]

B4

lmividdata[11]

C4

lmividdata[12]

E6

lmividdata[13]

C5

lmividdata[14]

D5

lmividdata[15]

A17

lmividdata[16]

B17

lmividdata[17]

C18

lmividdata[18]

B18

lmividdata[19]

D18

lmividdata[20]

D19

lmividdata[21]

E19

lmividdata[22]

D20

lmividdata[23]

B8

lmividdata[24]

A8

lmividdata[25]

C8

lmividdata[26]

D9

lmividdata[27]

C9

lmividdata[28]

C10

lmividdata[29]

A10

lmividdata[30]

B10

lmividdata[31]

C11

lmividclk

B11

notlmividclk

E15

lmividclken

J14

LMIVIDVDDE2V5

J15

LMIVIDVDDE2V5

J16

LMIVIDVDDE2V5

J17

LMIVIDVDDE2V5

J18

LMIVIDVDDE2V5

J19

LMIVIDVDDE2V5

K14

LMIVIDVDDE2V5

K15

LMIVIDVDDE2V5

K16

LMIVIDVDDE2V5

K17

LMIVIDVDDE2V5

K18

LMIVIDVDDE2V5

K19

LMIVIDVDDE2V5

lmividdatastrobe[0]
lmividdatastrobe[1]
lmividdatastrobe[2]
lmividdatastrobe[3]

lmividdatamask[0]
lmividdatamask[1]
lmividdatamask[2]
lmividdatamask[3]

LMIVIDGNDBGCOMP

Video
LMI Interface

lmividadd[0]
lmividadd[1]
lmividadd[2]
lmividadd[3]
lmividadd[4]
lmividadd[5]
lmividadd[6]
lmividadd[7]
lmividadd[8]

lmividadd[9]
lmividadd[10]
lmividadd[11]
lmividadd[12]

lmividbksel[0]
lmividbksel[1]

notlmividras

notlmividcas

notlmividwe

notlmividcs[0]
notlmividcs[1]

LMIVIDVREF

LMIVIDREF

TS_ST_DATA0
TS_ST_DATA1
TS_ST_DATA2
TS_ST_DATA3
TS_ST_DATA4
TS_ST_DATA5
TS_ST_DATA6
TS_ST_DATA7

R1293
103/1005

U1131E ST-7103AUD

AB3

tsin0data[0]

AB2

tsin0data[1]

AB4

tsin0data[2]

AC2

tsin0data[3]

AC1

tsin0data[4]

AC3

tsin0data[5]

AD3

tsin0data[6]

AD4

tsin0data[7]

AA3

tsin0byteclk

AE2

tsin0packetclk

AE3

tsin0error

Y5

tsin0byteclkvalid

AH4

tsin1data[0]

AH3

tsin1data[1]

AG5

tsin1data[2]

AJ3

tsin1data[3]

AJ2

tsin1data[4]

AJ4

tsin1data[5]

AK2

tsin1data[6]

AK1

tsin1data[7]

AG4

tsin1byteclk

AL2

tsin1packetclk

AK3

tsin1error

AF2

tsin1byteclkvalid

AB8

vidindatain[8]

AB6

vidindatain[9]

AC7

vidindatain[10]

AC5

vidindatain[11]

AD8

vidindatain[12]

AD6

vidindatain[13]

AE5

vidindatain[14]

AE7

vidindatain[15]

Transport Stream
Digital Video In

tsin2data[0]
tsin2data[1]
tsin2data[2]
tsin2data[3]
tsin2data[4]
tsin2data[5]
tsin2data[6]
tsin2data[7]
tsin2byteclk

tsin2packetclk

tsin2error

tsin2byteclkvalid

AK4
AM4
AL4
AJ5
AL5
AK5
AH6
AK6
AL3
AJ7
AJ6
AH5

R1292
103/1005

A A

All location are from 1281 to 1300

5

4

3

2

1

hb1_main_0612_34/48_35/48_0.0

2-76(No.YA705<Rev.001>)(No.YA705<Rev.001>)2-75

MAIN PWB CIRCUIT DIAGRAM (35/46) [STi7103 EMI_FLASH]

5

EMI_DATA[15..0]

D D

MAIN PWB

(46/46)

EMI_nFLASH

MAIN PWB(7/46),(36/46)

C C

EMI_DATA[15..0]

ST_3V3

R1325

OPEN-472/1005

MAIN PWB(46/46)

MAIN PWB(7/46)

EMI_nCS_A

EMI_nOE

EMIBUSREQ
EMIBUSGNT

EMI_DATA0
EMI_DATA1
EMI_DATA2
EMI_DATA3
EMI_DATA4
EMI_DATA5
EMI_DATA6
EMI_DATA7
EMI_DATA8
EMI_DATA9
EMI_DATA10
EMI_DATA11
EMI_DATA12
EMI_DATA13
EMI_DATA14
EMI_DATA15

EMI_RDnWR

PCB_TP10

PCB_TP10

PCB_TP08

EMI_nOE

4

PR1301A
PR1301B
PR1301C
PR1301D
PR1302A
PR1302B
PR1302C
PR1302D
PR1303A
PR1303B
PR1303C
PR1303D
PR1304A
PR1304B
PR1304C
PR1304D

R1344 220/1005

TP1302

TP1303

TP1305

R1303 470/1005
R1301 472/1005

R1304 470/1005
R1305 OPEN-470/1005

220*4/1005

18

220*4/1005

27

220*4/1005

36

220*4/1005

45

220*4/1005

18

220*4/1005

27

220*4/1005

36

220*4/1005

45

220*4/1005

18

220*4/1005

27

220*4/1005

36

220*4/1005

45

220*4/1005

18

220*4/1005

27

220*4/1005

36

220*4/1005

45

1

1

1

U1131B ST-7103AUD

AK16

emidata[0]

AK17

emidata[1]

AJ17

emidata[2]

AK18

emidata[3]

AM18

emidata[4]

AL18

emidata[5]

AK19

emidata[6]

AL19

emidata[7]

AJ19

emidata[8]

AJ20

emidata[9]

AH20

emidata[10]

AJ21

emidata[11]

AK21

emidata[12]

AH21

emidata[13]

AK22

emidata[14]

AL22

emidata[15]

AG10

notemibe[0]

AF11

notemibe[1]

AE12

notemicsa

AF13

notemicsb

AE15

notemicsc

AG15

notemicsd

AF16

notemicse

AE17

emirdnotwr

AH16

notemioe

AG17

emitreadyorwait

AF9

emibusreq

AH9

emibusgnt

EMI Interface

3

emiaddr[10]
emiaddr[11]
emiaddr[12]
emiaddr[13]
emiaddr[14]
emiaddr[15]
emiaddr[16]
emiaddr[17]
emiaddr[18]
emiaddr[19]
emiaddr[20]
emiaddr[21]
emiaddr[22]
emiaddr[23]

emiflashclk

emidmareq[0]
emidmareq[1]

emiaddr[1]
emiaddr[2]
emiaddr[3]
emiaddr[4]
emiaddr[5]
emiaddr[6]
emiaddr[7]
emiaddr[8]
emiaddr[9]

notemilba

notemibaa

PR1310B

AK13

PR1310A

AJ13

PR1305D

AH14

PR1305C

AJ14

PR1305B

AJ15

PR1305A

AL15

PR1306D

AK15

PR1306C

AL16

PR1306B

AM16

PR1307D

AL8

PR1307C

AJ8

PR1307B

AL9

PR1307A

AM9

PR1308D

AK9

PR1308C

AJ10

PR1308B

AK10

PR1308A

AK11

PR1309D

AM11

PR1309C

AL11

PR1309B

AJ12

PR1309A

AL12

PR1310D

AK12

PR1310C

AH13

AE10
AG12
AH11

R1306 472/1005

AF18

R1307 472/1005

AG19

27
18
45
36
27
18
45
36
27
45
36
27
18
45
36
27
18
45
36
27
18
45
36

1

TP1301 PCB_TP08

1

TP1304 PCB_TP08

Same Array or
separated resistor
on component side

220*4/1005
220*4/1005
220*4/1005
220*4/1005
220*4/1005
220*4/1005
220*4/1005
220*4/1005
220*4/1005
220*4/1005
220*4/1005
220*4/1005
220*4/1005
220*4/1005
220*4/1005
220*4/1005
220*4/1005
220*4/1005
220*4/1005
220*4/1005
220*4/1005
220*4/1005
220*4/1005

EMI_ADDR1
EMI_ADDR2
EMI_ADDR3
EMI_ADDR4
EMI_ADDR5
EMI_ADDR6
EMI_ADDR7
EMI_ADDR8
EMI_ADDR9
EMI_ADDR10
EMI_ADDR11
EMI_ADDR12
EMI_ADDR13
EMI_ADDR14
EMI_ADDR15
EMI_ADDR16
EMI_ADDR17
EMI_ADDR18
EMI_ADDR19
EMI_ADDR20
EMI_ADDR21
EMI_ADDR22

2

103p/50V/1005

PCMOUT[4..2]

EMI_ADDR[22..1]

ST_3V3

C1301

C1302

103p/50V/1005

PCMOUT[4..2]

EMI_ADDR[22..1]

C1304

47uF/16V/MVK/S

C1303
103p/50V/1005

MAIN PWB(38/46)

1

MAIN PWB(46/46)

PR1306A

220*4/1005

18

MAIN PWB ASS'Y(35/46)
[STi7103 EMI_FLASH]

HU-71100006

BOOT MODE SETTING

B B

R1308 472/1005
R1309 472/1005
R1310 472/1005
R1311 472/1005
R1312 472/1005
R1313 472/1005
R1314 472/1005
R1315 472/1005

R1316 472/1005
R1317 472/1005
R1318 472/1005
R1319 472/1005
R1320 472/1005
R1321 472/1005

R1322 472/1005
R1323 472/1005
R1324 472/1005

EMI_ADDR1
EMI_ADDR2
EMI_ADDR3
EMI_ADDR4
EMI_ADDR5
EMI_ADDR6
EMI_ADDR7
EMI_ADDR8

EMI_ADDR9
EMI_ADDR10
PCMOUT4
EMI_ADDR12
EMI_ADDR13
EMI_ADDR14

EMI_ADDR15
PCMOUT3
PCMOUT2

0
0
0
0
0
0
0
0

0
0
0
0
0
0

0
0
0

Mode0
Mode1
Mode2
Mode3
Mode4
Mode5
Mode6
Mode7

Mode8
Mode9
Mode10
Mode11
Mode12
Mode13

Mode14
Mode15
Mode16

PLL1 Clock Mode

PLL2 Clock Mode

Reset Mode

TAPMux Antifuse

Reserved
MPX Boot for STi7103
EMI/EMPI Clock for STi7103

: Must be "00"RESERVED

RESERVED

: 1 - 8bits 0 - 16bits

RESERVED : Must be "00"

RESERVED : Must be "0"

: Must be "00"

0 - Master 1 - Slaver

0 - FLASH 1 - MPX

A A

All location are from 1301 to 1350

5

4

3

2

1

hb1_main_0612_36/48_0.0

(No.YA705<Rev.001>)2-77 2-78(No.YA705<Rev.001>)

MAIN PWB CIRCUIT DIAGRAM (36/46) [STi7103 PERIPHERALS_PIO_SATA_USB]

5

D D

UART0_RX

MAIN PWB(6/46)

C C

UART0_TX

+3V3_A

R1353

332/1005

FDV301N_NL

+3V3_A

R1354

332/1005

FDV301N_NL

+3V3_STI7103

1

32

Q1352

+3V3_STI7103

1

32

Q1351

R1356

472/1005

R1355

472/1005

4

ST_RS232_TXD0
ST_RS232_RXD0

TP1353PCB_TP08
TP1354PCB_TP08

EMIBUSGNT_PIO

3

U1131D ST-7103AUD

AK29

pio0[0]/UART0_TXD/SC0_UART_TXD

AL29

pio0[1]/UART0_RXD/SC0_UART_RXD

AJ29

pio0[2]/SC0_EXTCLKIN

AL30

pio0[3]/EMPIDRACK[3]/SC0_CLKOUT(CLK_DSS)

AM30

pio0[4]//UART0_CTS

AK30

pio0[5]/EMPIDRACK[2]

AM31

pio0[6]/EMPIDRACK[1]/UART0_DIR

AL31

pio0[7]/UART0_RTS

1
1

AH28

pio1[0]/EMPIDRACK[0]/UART1_TXD/SC1_UART_TXD

AL32

pio1[1]/UART1_RXD/SC1_UART_RXD

AK31

pio1[2]/SC1_EXTCLKIN

AK32

pio1[3]/SC1_CLK_OUT(CLK_DSS)

AJ30

pio1[4]/UART1_CTS

AJ32

pio1[5]/UART1_RTS

AJ31

pio1[6]/UART1_DIR

AH29

pio1[7]

AH30

pio2[0]/SSC0_SCL/DVO_BLANK

AG28

pio2[1]/SSC0_MTSR_MRST(MTSR)

AG30

pio2[2]/SSC0_MRST

AG29

pio2[3]

AF30

pio2[4]

AF29

pio2[5]/EMPIDREQ[3]

AE30

pio2[6]/EMPIDREQ[2]

AE31

pio2[7]/EMPIDREQ[1]

pio3[1]/SSC1_MTSR_MRST(MTSR)

pio3[3]/EMPIDREQ[0]/IRB_IR_IN

pio3[6]/IRB_IR_DATAOUT_OD

pio4[2]/UART2_RXD/SCI_RXD

pio5[1]/UART3_RXD/EMI_ACCESS_PENDING

pio5[2]/UART3_CTS/SYSCLKOUTB

pio5[4]/PWM_COMPAREOUT0/DISEQC_RX

pio5[5]/PWM_CAPTUREIN0/DISEQC_TX

pio5[6]/PWM_COMPAREOUT1/USB2_OVCUR

pio5[7]/PWM_CAPTUREIN1/USB_PWR

pio3[0]/SSC1_SCL

pio3[2]/SSC1_SSC1_MRST

pio3[4]/IRB_UHF_IN

pio3[5]/IRB_IR_DATAOUT

pio4[0]/SSC2_SCL

pio4[1]/SSC2_MTSR_MRST

pio4[3]/UART2_TXD/SCI_TXD
pio4[4]/UART2_CTS/SCI_CTS
pio4[5]/UART2_RTS/SCI_RTS
pio4[6]/SCI_SCK/PWM_OUT0

pio4[7]/PWM_OUT1

pio5[0]/UART3_TXD

pio5[3]/UART3_RTS

pio3[7]

AE25
AE27
AD26
AD28
AC25
AC27
AB28
AB26

AD31
AD32
AD30
AC29
AC30
AB30
AB32
AB31

AA25
Y26
V25
V27
U26
U28
T25
T27

PIO Ports

2

1

TP1351 PCB_TP08

1

TP1352 PCB_TP08

RS232_TXD3
RS232_RXD3

R1351

220/1005

MAIN PWB(37/46)

1

TP1355 PCB_TP08

1

TP1356 PCB_TP08

1

OE

2

INA

3

GND

U1351
74LVC1G125

VCC

Y

+3V3_STI7103

5

R1360 560/1005

4

1

C1353

104p/16V/1005

MAIN PWB(7/46)

VXI_CLK

R1352 220/1105

+3V3_STI7103+3V3_A

C1352

104p/16V/1005

B B

A A

C1351

104p/16V/1005

U1131G ST-7103AUD

usbdm

usbdp

usbref

satatxp
satatxn
satarxn
satarxp

sataref

daa_c1a
daa_c2a

AM23
AL23

AG22

AL26
AK26
AJ28
AK28
AE24

AE8
AF7

EMIBUSGNT_PIO

+3V3_STI7103

R1357

103/1005

R1358
102/1005

+3V3_STI7103

1

23

R1359
103/1005

Q1353

MMBT4401

EMIBUSGNT

MAIN PWB ASS'Y(36/46)
[STi7103 PERIPHERALS_PIO_SATA_USB]

VXI_DE

MAIN PWB(7/46)

MAIN PWB(7/46),(35/46)

HU-71100006

Peripherals

Peripherals

All location are from 1351 to 1360

5

4

3

2

1

hb1_main_0612_37/48_0.0

2-80(No.YA705<Rev.001>)(No.YA705<Rev.001>)2-79

MAIN PWB CIRCUIT DIAGRAM (37/46) [STi7103 DEBUG PORT and RESET S/W]

1

A A

MAIN PWB(31/46)

B B

MAIN PWB(7/46)

JTAG Open drain output

DCU_nRESET

ST_RESET

ST_RESET

2

R1367

R1367

473/1005

473/1005

R1371 103/1005

R1376
103/1005

S1361
OPEN-JTP1127WEM

R1374
472/1005

Q1361

1

MMBT4401

23

1

23

12

34

Q1363
MMBT4401

R1373

331/1005

3

R1362

1

103/1005

ST_3V3

R1370
472/1005

C1366

104p/16V/1005

MAIN PWB(5/46)

Q1362
MMBT4401

23

R1372

103/1005

M_RST_N

ST_3V3ST_3V3

R1361
472/1005

Q1364

1

MMBT4401

23

1
2

JP1362
OPEN-HEADER 2P

R1375

OPEN-102/1005

4

STb7100_nRESET

Q1366

1

OPEN-MMBT4401

23

5

MAIN PWB(31/46)

6

+5V+3V3_STI7103

C C

+3V3_STI7103

D D

MAIN PWB(36/46)

RS232_TXD3

RS232_RXD3

R1363

332/1005

R1364

332/1005

Q1369

1

FDV301N_NL

Q1365

1

FDV301N_NL

32

32

R1365

472/1005

+5V

R1368

472/1005

+5V

C1365

104p/16V/1005

All location are from 1361 to 1380

1

2

3

MAIN PWB ASS'Y(37/46)
[STi7103 DEBUG PORT and RESET S/W]

HU-71100006

JP1361

1

2mm

2
3
4

OPEN-53014-0410

DEBUG PORT 1

4

5

6

hb1_main_0612_38/48_0.0

(No.YA705<Rev.001>)2-81 2-82(No.YA705<Rev.001>)

MAIN PWB CIRCUIT DIAGRAM (38/46) [STi7103 VIDEO_AUDIO]

5

D D

C C

VXI_D0

PR1381A 220*4/1005

VXI_D1

PR1381B 220*4/1005

VXI_D2

PR1381C 220*4/1005

VXI_D3

PR1381D 220*4/1005

VXI_D4

PR1382A 220*4/1005

VXI_D5

PR1382B 220*4/1005

VXI_D6

PR1382C 220*4/1005

VXI_D7

PR1382D 220*4/1005

VXI_D8

PR1383A 220*4/1005

VXI_D9

PR1383B 220*4/1005
PR1383C 220*4/1005

VXI_D10
VXI_D11

PR1383D 220*4/1005

VXI_D12

PR1384A 220*4/1005
PR1384B 220*4/1005

VXI_D13
VXI_D14

PR1384C 220*4/1005
PR1384D 220*4/1005

VXI_D15

R1389 220/1005
R1390 220/1005

CHROMA
COMP PUT
LUMA

4

VXI_VS
VXI_HS

U1131F ST-7103AUD

18
27
36
45
18
27
36
45
18
27
36
45
18
27
36
45

TP1392PCB_TP08
TP1393PCB_TP08
TP1394PCB_TP08
TP1395PCB_TP08
TP1396PCB_TP08
TP1397PCB_TP08
TP1398PCB_TP08
TP1399PCB_TP08

1
1
1
1
1
1
1
1

HSYNCO
VSYNCO

TP1381PCB_TP08

1

TP1382PCB_TP08

1

F29
G30
G31
G29
H31
H32
H30

K30
K32
K31

L29

L31

L30

M28
M30

N28
N29
P29
P31
P30
R31
R32
R30

L25

L27

B31
C30
C31

J29

viddigoutyc[0]
viddigoutyc[1]
viddigoutyc[2]
viddigoutyc[3]
viddigoutyc[4]
viddigoutyc[5]
viddigoutyc[6]
viddigoutyc[7]
viddigoutyc[8]
viddigoutyc[9]
viddigoutyc[10]
viddigoutyc[11]
viddigoutyc[12]
viddigoutyc[13]
viddigoutyc[14]
viddigoutyc[15]
viddigoutyc[16]
viddigoutyc[17]
viddigoutyc[18]
viddigoutyc[19]
viddigoutyc[20]
viddigoutyc[21]
viddigoutyc[22]
viddigoutyc[23]

viddigouthsync
viddigoutvsync

vidanac1out
vidanacv1out
vidanay1out

auddigdatain

auddigstrbin
auddiglrclkin

audspdifout

audpcmclkout

audsclkout

audlrclkout
audpcmout0
audpcmout1
audpcmout2
audpcmout3
audpcmout4

3

VXI_VS
VXI_HS
VXI_D[0..15]

U30

NC

T30

NC

Y30

NC

Y29

NC

AA31

NC

AA30

NC

W29

NC

V29

NC

R26

NC

B29
B28
D28

D25
B25
C25
C28
E27
C27

PCMOUT2

D27

PCMOUT3

C26

PCMOUT4

D26

MAIN PWB(7/46)

PCMOut0PCMOUT0

R1385 220/1005
R1391 OPEN-220/1005
R1386 220/1005
R1387 220/1005
R1388 220/1005

PCMOUT[4..2]

2

OPTICAL OUT

ST_SPDIF
ST_PCM_MCLK
ST_PCM_SCLK
ST_PCM_LRCLK
ST_PCMOut0

MAIN PWB(35/46)

ST_SPDIF
ST_PCM_MCLK
ST_PCM_SCLK
ST_PCM_LRCLK
ST_PCMOut0

1

MAIN PWB(7/46)

R1394
151/F/1005

B B

RED
GREEN
BLUE

TP1391PCB_TP08
TP1390PCB_TP08
TP1389PCB_TP08

R1382 7681/F/1005

R1383 7681/F/1005

1
1
1

These 2 resistors

D31

vidanar0out

E29

vidanag0out

F28

vidanab0out

D30

VIDANAIDUMPR0

D29

VIDANAIDUMPG0

F27

VIDANAIDUMPB0

A32

VIDANAIDUMPC1

B30

VIDANAIDUMPCV1

B32

VIDANAIDUMPY1

H28

VIDANAREXT[1]

J27

VIDANAGNDAREXT[1]

J25

VIDANAREXT[0]

K26

VIDANAGNDAREXT[0]

audanaprightout

audanamrightout

VIDEO-AUDIO

VIDEO-AUDIO

audanapleftout

audanamleftout

AUDANAIREF

audanavbgfil

E28
A31

A30
C29

G26

H25

C1381

106p/10V/2012

AUD_IREF

R1381

5760/F/1005

1

TP1388 PCB_TP08

1

TP1387 PCB_TP08

1

TP1386 PCB_TP08

1

TP1385 PCB_TP08

AUDIO RIGHT PLUS OUT
AUDIO RIGHT MINUS OUT
AUDIO LEFT PLUS OUT
AUDIO LEFT MINUS OUT

must be placed on
components side

MAIN PWB ASS'Y(38/46)

R1393

+5V

[STi7103 VIDEO_AUDIO]

HU-71100006

ST_CVBS_OUT

MAIN PWB(13/46)

U1381

OPEN-AMP FMS6141S5X/SO8

1

GND

2

GND

OPEN-104p/16V/1005

C1382

A A

VDin3VDout

VCC

5

4

L1381

C1383

BLM18PG300SN1D

OPEN-104p/16V/1005

R1392 OPEN-750/F/1005

OPEN-750/F/1005

All location are from 1381 to 1400

5

R1384 000/1005

4

3

2

1

hb1_main_0612_39/48_0.0

2-84(No.YA705<Rev.001>)(No.YA705<Rev.001>)2-83

MAIN PWB CIRCUIT DIAGRAM (39/46) [VGA INPUT and SPDIF]

5

L1406

000

JP1400
D250FD015S116BY

8

15

D D

C C

7

14

6

13

5

12

4

11

3

10

2

9

1

16

17

C1406
106p/10V/2012

U1402

1

A0

2

A1

3

A2

4

VSS

AT24C08BN-10SU-2.7

C1407

104p/16V/1005

VCC

WP

SCL

SDA

DET_PWR

8
7
6
5

DDC_SCL

VSYNC1

HSYNC1

DDC_SDA
TXD_PC_O
RXD_PC_O

VGA_SCL
VGA_SDA DET_POWERDET_PWR

L1401

000

L1402

000

R1423 OPEN-000/1005
R1424 OPEN-000/1005

+3V3_A

1

1

1

R1407
472/1005

RV1406

SV060314B431N

4

D1400

3

KDS226

2

D1401

3

KDS226

2

D1402

3

KDS226

2

R1408
472/1005

DDC_SCL
DDC_SDA

RV1403

SV060314B431N

R1418
750/F/1005

R1402
750/F/1005

R1404
750/F/1005

C1404

104p/16V/1005

L1403

BLM18PG300SN1D

R1427

470/1005

R1428

470/1005

PC_B

C1410
OPEN-100p/50V/1005

PC_G

C1402
OPEN-100p/50V/1005

3

MAIN PWB(13/46)

RV1401

VSYNC1 PC_VSYNC

R1401
472/1005

SV060305E101N

C1401
OPEN-102p/50V/1005

2

U1401A

147

OPEN-74HC14

12

R1403 470/1005

+5V+5V

U1401B

147

OPEN-74HC14

34

1

PC_VSYNC

MAIN PWB(13/46)

R1429

470/1005

1

D1403

3

DAN202K

2

R1409

220/1005

PC_R

C1403
OPEN-100p/50V/1005

+5VSTB

+5V

+5V +5V

U1401C

147

HSYNC1 PC_HSYNC

R1405
472/1005

R1425 000/1005

R1426 OPEN-000/1005

RV1402
SV060305E101N

DET_PWR

C1405
OPEN-102p/50V/1005

OPEN-74HC14

56

R1406 470/1005

+5V +5V

U1401F

147

OPEN-74HC14

13 12

147

U1401D

98

OPEN-74HC14

147

11 10

U1401E

OPEN-74HC14

PC_HSYNC

+5V

C1408

104p/16V/1005

R538

1

VCC

1Y0
1Y1

2Y0
2Y1

3Y0
3Y1

VEE

GND

472/1005

SW_ON

Q521
MMBT4401

23

DET_PWR

16

12
13

2
1

R1421 000/1005

5
3

R1422 000/1005

7
8

M_SCL

M_SDA

TXD_PC_O

R1419 OPEN-101/1005

RXD_PC_O

R1420 OPEN-101/1005

DDC_SCL

DDC_SDA

MAIN PWB(5/46)

MAIN PWB(5/46)

TXD_PC

RXD_PC

TXD_PC

RXD_PC

MAIN PWB(23/46)

B B

PC_Audio

JP1401
THSE-0734T

1

R

3
5
4

L

2

1

R3L

2

L1404

CIL10J1R8KNC

RV1404
SV060314B431N

R1414
224/1005

MAIN PWB(7/46)

PC_RI

MAIN PWB(13/46)

JP1402
RFT6112

A A

VCC

GND

SH1
SH2

2

1

Vin

3

4
5

R1415 4R7

R1416 000/1005

C1409

104p/16V/1005

+5V

SPDIF_OUT

L1405

CIL10J1R8KNC

MAIN PWB(7/46)

RV1405
SV060314B431N

R1417
224/1005

PC_LI

MAIN PWB ASS'Y(39/46)

VGA_SW(H) : EEPROM<->Douglas

VGA_SW(L) : EEPROM<-->VGA

VGA_SW

SW_ON

VGA_SCL
VGA_SDA

R539

103/1005

11
10

9

6

14
15

4

U523

S1
S2
S3

E

1Z
2Z
3Z

HEF4053BT

[VGA INPUT and SPDIF]

All location are from 1401 to 1430

5

HU-71100006

4

(No.YA705<Rev.001>)2-85 2-86(No.YA705<Rev.001>)

3

2

1

hb1_main_0612_40/48_0.0

MAIN PWB CIRCUIT DIAGRAM (40/46) [HDMI SWITCH]

5

4

3

2

1

TDA9996 4:1 HDMI Switch

U321
TDA9996

HPD1

HDMI1VCC

D D

MAIN PWB(41/46)

C C

MAIN PWB(42/46)

B B

A A

MAIN PWB ASS'Y(40/46)

D1SDA
D1SCL

1CK-

1CK+

1D0-

1D0+

1D1-

1D1+

1D2-

1D2+

HPD2

HDMI2VCC

D2SDA
D2SCL

2CK-

2CK+

2D0-

2D0+

2D1-

2D1+

2D2-

2D2+

HPD3

HDMI3VCC

D3SDA
D3SCL

3CK-

3CK+

3D0-

3D0+

3D1-

3D1+

3D2-

3D2+

9

RXA_HPD

10

RXA_5V

11

RXA_DDC_DAT

12

RXA_DDC_CLK

13

RXA_CN

14

RXA_CP

16

RXA_D0N

17

RXA_D0P

19

RXA_D1N

20

RXA_D1P

22

RXA_D2N

23

RXA_D2P

28

RXB_HPD

29

RXB_5V

30

RXB_DDC_DAT

31

RXB_DDC_CLK

32

RXB_CN

33

RXB_CP

35

RXB_D0N

36

RXB_D0P

38

RXB_D1N

39

RXB_D1P

41

RXB_D2N

42

RXB_D2P

58

RXC_HPD

59

RXC_5V

60

RXC_DDC_DAT

61

RXC_DDC_CLK

62

RXC_CN

63

RXC_CP

65

RXC_D0N

66

RXC_D0P

68

RXC_D1N

69

RXC_D1P

71

RXC_D2N

72

RXC_D2P

76

RXD_HPD

77

RXD_5V

78

RXD_DDC_DAT

79

RXD_DDC_CLK

80

RXD_CN

81

RXD_CP

83

RXD_D0N

84

RXD_D0P

86

RXD_D1N

87

RXD_D1P

89

RXD_D2N

90

RXD_D2P

57

CEC

I2C Address : 0xC0

TDA9996

OUT_DDC_DAT
OUT_DDC_CLK

OUT_CN
OUT_CP

OUT_D0N

OUT_D0P

OUT_D1N

OUT_D1P

OUT_D2N

OUT_D2P

I2C_SDA

I2C_SCL

R12K

INT_HP_CTRL

CDEC_STBY

CDEC_DDC

MODE

TEST

XTAL_OUT

XTAL_IN

VDDC_1V8
VDDC_1V8
VDDC_1V8
VDDC_1V8
VDDC_1V8

VDDH_1V8

VDDH_3V3
VDDH_3V3
VDDH_3V3
VDDH_3V3
VDDH_3V3
VDDH_3V3
VDDH_3V3
VDDH_3V3

VDDO_3V3

VDDC_3V3
VDDS_3V3

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

6
5

3
2

100
99

97
96

94
93

49
50

74

53

54

44

47

48

PD

27

25

NC

52

51

8
24
45
91
95

75

15
21
34
40
64
70
82
88

4
46
55

1
7
18
26
37
43
56
67
73
85
92
98

R1431 330/1005
R1432 330/1005

R1433 330/1005
R1435 330/1005

R1438 330/1005
R1439 330/1005

R1440 330/1005
R1441 330/1005

R1442 330/1005
R1443 330/1005

R1444 000/1005
R1445 000/1005

R1446 123/F/1005

C1431 104p/16V/1005

C1439 104p/16V/1005

R1447 000/1005

R1453 000/1005

TP1433

1

PCB_TP08

TP1432

1

PCB_TP08

C1446
104p/16V/1005

C1452
104p/16V/1005

C1458
104p/16V/1005

C1447

104p/16V/1005

C1453

104p/16V/1005

C1459

104p/16V/1005

+3V3_D

AHDMI_SDA
AHDMI_SCL

ATXC­ATXC+

ATX0­ATX0+

ATX1­ATX1+

ATX2­ATX2+

+3V3H

AHPD

C1448

104p/16V/1005

C1454

104p/16V/1005

C1460

104p/16V/1005

TP1431
PCB_TP10

1

C1464

106p/10V/2012

FLI_SDA_0

FLI_SCL_0

PD_RESET

+5V

C1449

104p/16V/1005

C1455

104p/16V/1005

C1461

104p/16V/1005

U1432
LD1117AL-ADJ

3

VIN

MAIN PWB(5/46),(6/46),(17/46),(22/46)

MAIN PWB(7/46)

C1467

104p/16V/1005

MAIN PWB(5/46),(42/46)

C1450

106p/10V/2012

VO

TAP

ADJ

1

+1V8H

C1456

104p/16V/1005

C1462

104p/16V/1005

2
4

C1451

106p/10V/2012

+3V3H

C1463
106p/10V/2012

TP1434
PCB_TP10

1

R1451
121/F/1005

C1457

106p/10V/2012

C1465

106p/10V/2012

CEC_A

+1V8H

+1.833V

C1466

104p/16V/1005

+3V3H

R1434 472/1005
R1436 472/1005
R1437 472/1005

+1V2

L1431
BLM18PG300SN1D

+3V3_A

ATXC­ATXC+
ATX0­ATX0+
ATX1­ATX1+
ATX2­ATX2+

AHPD
AHDMI_SDA
AHDMI_SCL

R1450
OPEN-000/1005

L1432
BLM18PG300SN1D

R1449 330/1005

AHDMI_SDA
AHDMI_SCL
AHPD

C1432

106p/10V/2012

C1440

106p/10V/2012

U102J
FLI10620H

A10

DVI_ARXCM

B10

DVI_ARXCP

A9

DVI_ARX0M

B9

DVI_ARX0P

A8

DVI_ARX1M

B8

DVI_ARX1P

A7

DVI_ARX2M

B7

DVI_ARX2P

B11

HDMI_AHPD

D12

2WIRE_S1_SDA

C12

2WIRE_S1_SCL

A11

HDMI_CEC

A6

DVI_BRXCM

B6

DVI_BRXCP

A5

DVI_BRX0M

B5

DVI_BRX0P

A4

DVI_BRX1M

B4

DVI_BRX1P

A3

DVI_BRX2M

B3

DVI_BRX2P

C11

HDMI_BHPD

E11

2WIRE_S2_SDA

D11

2WIRE_S2_SCL

C1435

104p/16V/1005

C1441

104p/16V/1005

C1436
104p/16V/1005

C1442
104p/16V/1005

104p/16V/1005

HDMI_VDDA33
HDMI_VDDA33
HDMI_VDDA33
HDMI_VDDA33
HDMI_VDDA33

HDMI_VDD12
HDMI_VDD12
HDMI_VDD12
HDMI_VDD12

ADC_VDD12
ADC_VDD12
ADC_VDD12

ADC_GND12
ADC_GND12
ADC_GND12

HDMI_GNDA
HDMI_GNDA
HDMI_GNDA
HDMI_GNDA
HDMI_GNDA
HDMI_GNDA
HDMI_GNDA
HDMI_GNDA
HDMI_GNDA

C1437

104p/16V/1005

C1443

DVI_REXT

C1438

103p/50V/1005

C1444

103p/50V/1005

C4
D5
D6
E6
E7

D9

D10
E8
E9
E10

A1
B2
C3

D4
E5
F6

A2
C5
C6
C7
C8
C9
C10
D7
D8

C1433

103p/50V/1005

C1445

103p/50V/1005

R1448
2490/F/1005

C1434

103p/50V/1005

[HDMI SWITCH]

HU-71100006

All location are from 1431 to 1490

5

R1452
560/F/1005

4

3

2

1

hb1_main_0612_41/48_0.0

2-88(No.YA705<Rev.001>)(No.YA705<Rev.001>)2-87

MAIN PWB CIRCUIT DIAGRAM (41/46) [REAR HDMI INPUT]

5

D D

4

3

2

1

HDMI1_INPUT HDMI2_INPUT

19

17

15

13

11

9

7

5

3

1

JP1492
FW05050-21

D2+

D2_SHIELD

D1+

D1_SHIELD

D0+

D0_SHIELD

CK+

CK_SHIELD

CK-

CE_REMOTE

DDC_CLK

DDC_DATA

GND

+5V

HP_DET
Dummy1
Dummy2

D2-

D1-

D0-

NC

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21

DDC2_SCL
DDC2_SDA

HDMI2_PWR
HP2_DET

R1492
OPEN-000/1005

2D2+

2D2­2D1+

2D1­2D0+

2D0­2CK+

2CK-

MAIN PWB(42/46)

JP1491
FW05050-21

18

16

14

12

22
23
24
25

C C

26

SH1
SH2
SH3
SH4
SH5

10

8

6

4

2

FOOSUNG

19

17

15

13

13

11

9

7

5

3

1

D2_SHIELD

D1_SHIELD

D0_SHIELD

CK_SHIELD

CE_REMOTE

DDC_CLK

DDC_DATA

HP_DET
Dummy1
Dummy2

D2+

D2-

D1+

D1-

D0+

D0-

CK+

CK-

NC

GND

+5V

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21

DDC1_SCL
DDC1_SDA

HDMI1_PWR
HP1_DET

R1491
OPEN-102/1005

1D2+

1D2­1D1+

1D1-

MAIN PWB(40/46) MAIN PWB(40/46)

1D0+

1D0­1CK+

1CK­HDMI_CEC HDMI_CEC

MAIN PWB(42/46)

22
23
24
25
26

SH1
SH2
SH3
SH4
SH5

18

16

14

12

10

8

6

4

2

HPD1 HPD2

FOOSUNG

L1491

HDMI1_PWR HDMI2_PWR

B B

DDC1_SCL
DDC1_SDA

A A

R1497 220/1005 R1498 220/1005
R1499 220/1005

BLM18PG300SN1D

C1491
106p/10V/2012

R1493
473/1005

HDMI1VCC HDMI2VCC

C1492
104p/16V/1005

HDMI1VCC HDMI2VCC

R1494
473/1005

D1SCL
D1SDA

D1SCL
D1SDA

MAIN PWB(40/46) MAIN PWB(40/46)

DDC2_SCL

R1500 220/1005

MAIN PWB ASS'Y(41/46)

L1492
BLM18PG300SN1D

C1493
106p/10V/2012

R1495
473/1005

HDMI2VCCHDMI1VCC

C1494
104p/16V/1005

R1496
473/1005

D2SCL
D2SDADDC2_SDA

D2SCL
D2SDA

[REAR HDMI INPUT]

HU-71100006

All location are from 1491 to 1520

5

4

3

2

1

hb1_main_0612_42/48_0.0

(No.YA705<Rev.001>)2-89 2-90(No.YA705<Rev.001>)

MAIN PWB CIRCUIT DIAGRAM (42/46) [SIDE HDMI INPUT]

5

D D

C C

HDMI3_INPUT

JP1531
DC1R019JBA

23

SHIELD4

22

SHIELD3

21

SHIELD2

20

SHIELD1

HP_DET

+5V

GND

DDC_DATA

DDC_CLK

CE_REMOTE

CK-

CK_SHIELD

CK+

D0-

D0_SHIELD

D0+

D1-

D1_SHIELD

D1+

D2-

D2_SHIELD

D2+

NC

19

HDMI3_PWR

18
17

DDC3_SDA

16

DDC3_SCL

15
14

HDMI_CEC

13
12
11
10
9
8
7
6
5
4
3
2
1

4

R1531
OPEN-102/1005

HPD3

HDMI_CEC

3CK-

3CK+
3D0-

3D0+
3D1-

3D1+
3D2-

3D2+

MAIN PWB(40/46)

MAIN PWB(41/46)

MAIN PWB(40/46)

3

U1531
LD1117AL-ADJ

3

C1533

106p/10V/2012

C1534

104p/16V/1005

VIN

1

TAP

ADJ

VO

2

TP1532

2
4

PCB_TP10

1

R1539
111/F/1005

R1540
201/F/1005

C1535
106p/10V/2012

+3V5STB+5VSTB

C1536
104p/16V/1005

1

HDMI3VCC

HDMI3_PWR

B B

DDC3_SCL
DDC3_SDA

A A

R1536 220/1005

R1537 220/1005

L1531
BLM18PG300SN1D

R1534
473/1005

C1531
106p/10V/2012

HDMI3VCC

R1535
473/1005

HDMI3VCC

C1532
104p/16V/1005

D3SCL
D3SDA

MAIN PWB(40/46)

MAIN PWB(41/46)

HDMI_CEC

R1533
220/1005

+3V5STB

R1538
473/1005

12

D1531
BAS316

Q1531
BSS83

Q1532
MMBT4401

+5VSTB

32

R1532
683/F/1005

R1566 101/1005

1

CEC_AHDMI_CEC

MAIN PWB(5/46),(40/46)

CEC_O

MAIN PWB(5/46)

MAIN PWB ASS'Y(42/46)

All location are from 1531 to 1540

5

[SIDE HDMI INPUT]

HU-71100006

4

3

2

1

hb1_main_0612_43/48_0.0

2-92(No.YA705<Rev.001>)(No.YA705<Rev.001>)2-91

MAIN PWB CIRCUIT DIAGRAM (43/46) [SCART1]

5

RV1541

JP1541

D D

R/CHROMA

TSSM-0741-21(STRAIGHT)

8Pin(Function Select/Slow Switching)

9.5V ~ 12V --> 4:3 Mode

4.5V ~ 7V -->16:9 Mode
0V ~ 2V --> TV Mode
16Pin(RGB Control/Fast Blanking)

C C

1V ~ 3V -->RGB Mode
0V ~ 0.4V -->CVBS Mode

GND

CVBSI

C/LUMA

GND(R)

GND(V)

RGBC

GND(D)
GND(R)

DATA1

GREEN

DATA2

GND(G)

FNS

BLUE

AIL
GND(B)
GND(A)

AOL

AIR

AOR

21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

SCART1_LO

SC1_RED

SC1_GREEN

SC1_BLUE
SC1_LI

SC1_LO
SC1_RI
SC1_RO

C1541

10uF/16V/MVK/S

SV060305E101N

RV1544
SV060305E101N

RV1546
SV060314B431N

R1552 153/F/1005

MAIN PWB(13/46)

SCART1_RO

C1551

10uF/16V/MVK/S

R1555 153/F/1005

4

R1541
750/F/1005

R1551
683/F/1005

OPAMP_P

R1557
683/F/1005

R1543 750/F/1005

R1546
750/F/1005

R1547

R1563

103/1005

C1548
100p/50V/1005

C1553
100p/50V/1005

303/1005

2

3

6

5

U1541
TL072CD

84

-

+

-

+

R1545 000/1005

R1549

103/1005

+9V1_OPAMP

1

7

3

SCART1_CVBS

MAIN PWB(13/46)

SC1_CVBSO

SC1_FB

SCART1_ID

SCART Mode Detection
Attenuation = 10K/(10K+30K) = 0.25

C1546
104p/50V

SC1_L_OUT_O

SC1_R_OUT_O

C1547
106p/25V/3216

MAIN PWB(7/46)

R1570 000/1005 L1541
R1567 OPEN-331/1005
R1569 OPEN-331/1005

D1541
OPEN-ZMM5239B(9V1)

12

+12V

SC1_RED

SC1_GREEN

SC1_BLUE

SC1_LI

SC1_RI

SC1_LO

RV1542
SV060305E101N

RV1545
SV060305E101N

CIL21J1R8KNE

RV1547
SV060314B431N

L1543
CIL21J1R8KNE

RV1548
SV060314B431N

L1544
CIL21J1R8KNE

RV1549
SV060314B431N

2

RV1543
SV060305E101N

R1542
750/F/1005

R1544
750/F/1005

R1548
750/F/1005

R1556
224/1005

C1545

C1545
102p/50V/1005

102p/50V/1005

C1549
102p/50V/1005

C1552
102p/50V/1005

C1542
OPEN-331p/50V/1005

C1543
OPEN-331p/50V/1005

C1544
OPEN-331p/50V/1005

R1550

R1550
224/1005

224/1005

R1553
224/1005

C1550
10uF/16V/MVK/S

R1554 101/1005

1

SCART1_R

SCART1_G

SCART1_B

MAIN PWB(13/46)

SCART1_LI

SCART1_RI

SC1_L_OUT_O

R1565
103/1005

SC1_R_OUT_O

+3V3_A

C1556

104p/16V/1005

FB1

MAIN PWB(13/46)

SC1_RO

MAIN PWB(3/46),(4/46),(5/46),(22/46)

B B

MAIN PWB(5/46)

Scart mute -> Hi : mute on

Scart mute -> Low : mute off

A A

+5VSTB

AC_DETECT

AC ON-> Hi : mute off

AC off -> Low : mute on

SC_MUTE

R1573

473/1005

R1577

103/1005

R1576

103/1005

1

R1574

103/1005

Q1546

MMBT4401

23

103/1005

1

R1575

R1562

103/1005

Q1548

MMBT4401

23

MAIN PWB ASS'Y(43/46)
[SCART1]

Q1547

23

MMBT4403

1

R1561
102/1005

SC2_MUTE

R1560

102/1005

MAIN PWB(22/46),(44/46)

2

Q1544

KTD1304

13

Q1545

2

KTD1304

13

C1557
47uF/25V/BLA/S

+9V1_OPAMP

L1545
CIL21J1R8KNE

RV1550
SV060314B431N

R1571
332/F/1005

OPAMP_P

R1572
332/F/1005

OPAMP_P

R1559
224/1005

R1564
4021/F/1005

SC1_FB

R1568
102/F/1005

C1555
102p/50V/1005

MAIN PWB(44/46)

R1558 101/1005
C1554
10uF/16V/MVK/S

+3V3_A

84

3

+

+

2

-

-

1

U1542A
LM393MX

Comparator for trigerring
on 1V Fast Blank Signal

HU-71100006

All location are from 1541 to 1580

5

4

3

2

1

hb1_main_0612_44/48_0.0

(No.YA705<Rev.001>)2-93 2-94(No.YA705<Rev.001>)

MAIN PWB CIRCUIT DIAGRAM (44/46) [SCART2]

5

8Pin(Function Select/Slow Switching)

9.5V ~ 12V --> 4:3 Mode

4.5V ~ 7V -->16:9 Mode
0V ~ 2V --> TV Mode

16Pin(RGB Control/Fast Blanking)
1V ~ 3V -->RGB Mode
0V ~ 0.4V -->CVBS Mode

D D

RV1581

JP1581

R/CHROMA

C C

TSSM-0741-21(STRAIGHT)

SCART2_LO

MAIN PWB

GND

CVBSI

C/LUMA

GND(R)
GND(V)

RGBC

GND(D)
GND(R)

DATA1

GREEN

DATA2

GND(G)

FNS

BLUE

AIL
GND(B)
GND(A)

AOL

AIR

AOR

C1581

10uF/16V/MVK/S

21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

SC2_RED

SC2_GREEN

SC2_BLUE
SC2_LI

SC2_LO
SC2_RI
SC2_RO

R1593 153/F/1005

MAIN PWB(43/46)

OPAMP_P

SV060305E101N

RV1584
SV060305E101N

RV1586
SV060314B431N

R1591
683/F/1005

R1581
750/F/1005

C1588
100p/50V/1005

(13/46)

SCART2_RO

B B

C1592

10uF/16V/MVK/S

R1596 153/F/1005

683/F/1005

C1594
100p/50V/1005

4

SCART2_CVBS

R1584 750/F/1005

R1585 000/1005

R1586
750/F/1005

R1588

303/1005

R1606
103/1005

+9V1_OPAMP

U1581
TL072CD

84

2

-

3

+

6

-

5

+

1

7

C1586
104p/50V

SC2_L_OUT_O

SC2_R_OUT_O

R1589
103/1005

C1587
106p/25V/3216

SC2_CVBSO

SC2_FB

SCART2_ID

SCART Mode Detection
Attenuation = 10K/(10K+30K) = 0.25

3

MAIN PWB(13/46)

MAIN PWB(7/46)

SC2_RED

SC2_GREEN

SC2_BLUE

SC2_LI

SC2_RI

SC2_LO

SC2_RO

RV1582
SV060305E101N

RV1583
SV060305E101N

RV1585
SV060305E101N

L1581
CIL21J1R8KNE

RV1587
SV060314B431N

L1583
CIL21J1R8KNE

RV1588
SV060314B431N

L1584
CIL21J1R8KNE

RV1589
SV060314B431N

L1585
CIL21J1R8KNER1597

RV1590
SV060314B431N

2

R1582
750/F/1005

R1583
750/F/1005

R1587
750/F/1005

C1585
102p/50V/1005

C1589
102p/50V/1005

R1595
224/1005

R1599
224/1005

C1582
OPEN-331p/50V/1005

C1583
OPEN-331p/50V/1005

C1584
OPEN-331p/50V/1005

R1590
224/1005

R1592
224/1005

C1590
10uF/16V/MVK/S

C1591
102p/50V/1005

C1593
10uF/16V/MVK/S

C1595
102p/50V/1005

R1594 101/1005

R1598 101/1005

1

SCART2_R

SCART2_G

SCART2_B

MAIN PWB(13/46)

SCART2_LI

SCART2_RI

SC2_L_OUT_O

SC2_R_OUT_O

+3V3_A

MAIN PWB(22/46),(43/46)

R1601
4021/F/1005

SC2_FB

A A

R1604
102/F/1005

84

5

+

6

7

-

-

U1542B
LM393MX

R1602
103/1005

FB2

MAIN PWB(13/46)

SC2_MUTE

Comparator for trigerring

R1600
102/1005

R1605
102/1005

on 1V Fast Blank Signal

All location are from 1581 to 1620

5

4

3

2

13

Q1581
KTD1304

2

Q1582
KTD1304

13

MAIN PWB ASS'Y(44/46)
[SCART2]

HU-71100006

2

1

hb1_main_0612_45/48_0.0

2-96(No.YA705<Rev.001>)(No.YA705<Rev.001>)2-95

MAIN PWB CIRCUIT DIAGRAM (45/46) [FLEX ROM CONNECTOR]

5

D D

C C

MAIN PWB(8/46),(46/46)

MAIN PWB(8/46),(9/46),(46/46)

MAIN PWB(8/46)

4

HOST_BOOT_CS#

DG_PE1

HOST_A21

HOST_CS0#

C1631

OPEN-104p/16V/1005

3

+5V +3V3_A

R1631

222/1005

1

R1632

222/1005

Q1631
MMBT4401

23

#CS_FLASH_DG

1

TP1631 PCB_TP10

1

TP1634 PCB_TP10

1

TP1636 PCB_TP10

#CS_FLASH_DG

2

MAIN PWB(8/46)

1

To Bottum side

MAIN PWB(8/46),(9/46),(46/46)

HOST_A1
HOST_A2
HOST_A3
HOST_A4
HOST_A5
HOST_A6
HOST_A7

B B

A A

HOST_A8
HOST_A9
HOST_A10
HOST_A11
HOST_A12
HOST_A13
HOST_A14
HOST_A15
HOST_A16
HOST_A17
HOST_A18
HOST_A19
HOST_A20

HOST_A22
HOST_A23
HOST_A24

1

TP1639 PCB_TP10

1

TP1643 PCB_TP10

1

TP1647 PCB_TP10

1

TP1651 PCB_TP10

1

TP1655 PCB_TP10

1

TP1659 PCB_TP10

1

TP1663 PCB_TP10

1

TP1667 PCB_TP10

1

TP1671 PCB_TP10

1

TP1675 PCB_TP10

1

TP1679 PCB_TP10

1

TP1683 PCB_TP10

1

TP1687 PCB_TP10

1

TP1691 PCB_TP10

1

TP1695 PCB_TP10

1

TP1699 PCB_TP10

1

TP1703 PCB_TP10

1

TP1707 PCB_TP10

1

TP1711 PCB_TP10

1

TP1715 PCB_TP10

1

TP1718 PCB_TP10

1

TP1720 PCB_TP10

1

TP1721 PCB_TP10

TP1640PCB_TP10
TP1644PCB_TP10
TP1648PCB_TP10
TP1652PCB_TP10
TP1656PCB_TP10
TP1660PCB_TP10
TP1664PCB_TP10
TP1668PCB_TP10
TP1672PCB_TP10
TP1676PCB_TP10
TP1680PCB_TP10
TP1684PCB_TP10
TP1688PCB_TP10
TP1692PCB_TP10
TP1696PCB_TP10
TP1700PCB_TP10
TP1704PCB_TP10
TP1708PCB_TP10
TP1712PCB_TP10
TP1716PCB_TP10

1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1

HOST_D0
HOST_D1
HOST_D2
HOST_D3
HOST_D4
HOST_D5
HOST_D6
HOST_D7
HOST_D8
HOST_D9
HOST_D10
HOST_D11
HOST_D12
HOST_D13
HOST_D14

HOST_D15
#CS_FLASH_DG
DG_PE1

C1633

104p/16V/1005

C1635

106p/10V/2012

+5V

HOST_D[15..0]HOST_A[24..0]

MAIN PWB(8/46),(9/46),(46/46)

MAIN PWB ASS'Y(45/46)
[FLEX ROM CONNECTOR]

HU-71100006

All location are from 1631 to 1730.

5

4

3

2

1

hb1_main_0612_46/48_0.0

(No.YA705<Rev.001>)2-97 2-98(No.YA705<Rev.001>)

MAIN PWB CIRCUIT DIAGRAM (46/46) [FLEX ROM CONNECTOR]

5

D D

HOST_A[24..0]

HOST_BOOT_CS#
HOST_OE#

R1732

HOST_A[24..0]

HOST_BOOT_CS#

+3V3_D

HOST_OE#

MAIN PWB(8/46),(9/46),(45/46)

MAIN PWB(8/46),(45/46)

MAIN PWB(8/46),(9/46)

C C

ST7103_FLASH_EN

MAIN PWB(7/46)

472/1005

ST7103_FLASH_EN

STi7103 FLASH access
enable : L
disable : H ( default )

4

HOST_A4
HOST_A5
HOST_A6
HOST_A7
HOST_A8

HOST_A9
R1731 101/1005
R1733 101/1005

ST7103_FLASH_EN

HOST_A10

HOST_A11

HOST_A12

HOST_A13

HOST_A14

HOST_A15

HOST_A16

HOST_A17

ST7103_FLASH_EN

A1
A2
A3
A4
A5
A6
A7
A8

DIR
OE

A1
A2
A3
A4
A5
A6
A7
A8

DIR
OE

U1732

DGND

U1733

DGND

A1
B3

B1
C2
C1
D3
D1

E2

A2

A4

SN74LVC245AZQNR

A1

B3

B1
C2
C1
D3
D1

E2

A2

A4

SN74LVC245AZQNR

VCC

VCC

3

EMI_ADDR[22..1]

+3V3_D

B4

B1

B2

B2

C4

B3

C3

B4

D4

B5

D2

B6

E4

B7

E3

B8

A3
E1

B4

B1

B2

B2

C4

B3

C3

B4

D4

B5

D2

B6

E4

B7

E3

B8

A3
E1

EMI_ADDR4
EMI_ADDR5
EMI_ADDR6
EMI_ADDR7
EMI_ADDR8
EMI_ADDR9
EMI_nFLASH
EMI_nOE

EMI_ADDR10
EMI_ADDR11
EMI_ADDR12
EMI_ADDR13
EMI_ADDR14
EMI_ADDR15
EMI_ADDR16
EMI_ADDR17

EMI_nFLASH
EMI_nOE

EMI_ADDR[22..1]

MAIN PWB(35/46)

MAIN PWB(8/46),(9/46),(45/46)

HOST_D[15..0]

MAIN PWB(35/46)

2

HOST_D[15..0]

1

EMI_DATA[15..0]

EMI_DATA0HOST_D0
EMI_DATA1HOST_D1
EMI_DATA2HOST_D2
EMI_DATA3HOST_D3
EMI_DATA4HOST_D4
EMI_DATA5HOST_D5
EMI_DATA6HOST_D6
EMI_DATA7HOST_D7

EMI_DATA8HOST_D8
EMI_DATA9HOST_D9
EMI_DATA10HOST_D10
EMI_DATA11HOST_D11
EMI_DATA12HOST_D12
EMI_DATA13HOST_D13
EMI_DATA14HOST_D14
EMI_DATA15HOST_D15

EMI_DATA[15..0]

MAIN PWB(35/46)

HOST_A18
HOST_A19
HOST_A20
HOST_A21
HOST_A22
HOST_A1
HOST_A2
HOST_A3

B B

A A

ST7103_FLASH_EN

A1

B3

B1
C2
C1
D3
D1

E2

A2

A4

SN74LVC245AZQNR

A1
A2
A3
A4
A5
A6
A7
A8

DIR
OE

U1735

VCC

DGND

B4

B1

B2

B2

C4

B3

C3

B4

D4

B5

D2

B6

E4

B7

E3

B8

A3
E1

EMI_ADDR18
EMI_ADDR19
EMI_ADDR20
EMI_ADDR21
EMI_ADDR22
EMI_ADDR1
EMI_ADDR2
EMI_ADDR3

C1732

C1733

104p/16V/1005

104p/16V/1005

+3V3_D

C1731

104p/16V/1005

MAIN PWB ASS'Y(46/46)
[FLEX ROM CONNECTOR]

HU-71100006

All location are from 1731 to 1760.

5

4

3

2

1

hb1_main_0612_47/48_0.0

2-100(No.YA705<Rev.001>)(No.YA705<Rev.001>)2-99

IR PWB CIRCUIT DIAGRAM

1

A A

2

3

4

5

6

U1

SIG1Vcc2GND3S4S

MAIN PWB(3/46)

+5VSTB

5

ROM-L0138SH14

JP3

C2
105p

+5VSTB

C3
220UF/10V

B B

JP1

8

67
5
4

TP4 TP10

3

1.25mm
2

1

1

1

TP1 TP10

1

TP2 TP10

1

TP3 TP10

R10 200/F

RED

IR_OUT

IR_OUT

12505WR-06A

RV1

SV060305E101N

C1
105p

SV060305E101N

RV2

12

D1 SLR124-WOS

C C

IR PWB ASS'Y

HU-72200004

D D

1

2

3

4

5

6

lt-32da9bj_ir32_42_0612_2/4_0.0

(No.YA705<Rev.001>)2-101 2-102(No.YA705<Rev.001>)

KEY PWB CIRCUIT DIAGRAM

1

2

3

4

5

6

MAIN PWB(3/46)

JP2

JP2

TP5 TP10

5

6

4

7

A A

RV3
SV060305E101N

OPEN-302/1005

B B

R3

3
2

1.25mm

1

12505WR-05P

R5
271/F/1005

23

DHT-1106T

R7
471/1005

TP7 TP10

S1

TV/AV

41

1

1

TP6 TP10

1

KEY2KEY1

OPEN-302/1005

R4

KEY2

KEY1

RV4
SV060305E101N

R6
271/F/1005

23

DHT-1106T

R8
471/1005

S2

CH+

41

S3

23

DHT-1106T

R9
102/1005

23

DHT-1106T

R11
272/1005

C C

23

DHT-1106T

MENU

41

R12

S5

VOL-

41

S7

VOL+ STANDBY

41

102/1005

R13
272/1005

S4

23

DHT-1106T

23

DHT-1106T

CH-

41

S6

41

SW Setting Point Center Voltage Min Voltage Max VoltageADC1

TV/AV

MENU/OK

D D

TV/AV/OK 0V~1.15V 0.750802139 0.654329977 0.85828112
Menu 1.16V~2.15V 1.644444444 1.457331095 1.846939486
VOL - 2.16V~3.25V 2.708982036 2.449990999 2.980406334

VOL-

VOL+

VOL + 3.26V 4.5V 3.822516556 3.532878942 4.117521838

SW Setting Point Center Voltage Min Voltage Max VoltageADC2

CH + 0V~1.15V 0.750802139 0.654329977 0.85828112

CH+

CH - 1.16V~2.15V 1.644444444 1.457331095 1.846939486

CH-

KEY PWB ASS'Y

HU-72200003

Not Used 2.16V~3.25V 2.708982036 2.449990999 2.980406334

STANDBY

Power 3.26V 4.5V 3.822516556 3.532878942 4.117521838

1

2

3

4

5

6

lt-32da9bj_key32_42_0612_2/4_0.0

2-104(No.YA705<Rev.001>)(No.YA705<Rev.001>)2-103

LED PWB CIRCUIT DIAGRAM

1

A A

2

3

4

5

6

LED1

BLUE LB580A

MAIN PWB(3/46)

JP4

B B

JP3

6
7

1.25mm

1

5
4
3
2

1

TP9 TP10

1

FRONT_BLUETP8 TP10

2

R2

FRONT_BLUE

1

000/2012

12505WR-05P

RV5
SV060305E101N

C C

LED PWB ASS'Y

HU-72200017

D D

1

2

(No.YA705<Rev.001>)2-105 2-106(No.YA705<Rev.001>)

3

4

5

lt-32da9bj_designled32_42_0612_2/4_0.0

6

PATTERN DIAGRAMS

MAIN PWB PATTERN [SOLDER SIDE]

TOP

(No.YA705<Rev.001>)2-107 2-108(No.YA705<Rev.001>)

MAIN PWB PATTERN [PARTS SIDE]

TOP

(No.YA705<Rev.001>)2-109 2-110(No.YA705<Rev.001>)

IR PWB PATTERN [SOLDER SIDE]

TOP

IR PWB PATTERN [PARTS SIDE]

KEY PWB PATTERN [SOLDER SIDE]

TOP

TOP

KEY PWB PATTERN [PARTS SIDE]

LED PWB PATTERN [SOLDER SIDE]

TOP

TOP

LED PWB PATTERN [PARTS SIDE]

TOP

(No.YA705<Rev.001>)2-111 2-112No.YA705<Rev.001>)

Victor Company of Japan, Limited

Display Division 12, 3-chome, Moriya-cho, Kanagawa-ku, Yokohama-city, Kanagawa-prefecture, 221-8528, Japan

(No.YA705<Rev.001>)

Printed in Japan

VSE