IS61C1024 |
ISSI |
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IS61C1024L |
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128K x 8 HIGH-SPEED CMOS STATIC RAM
FEATURES
•High-speed access time: 12, 15, 20, 25 ns
•Low active power: 600 mW (typical)
•Low standby power: 500 W (typical) CMOS standby
•Output Enable (OE) and two Chip Enable (CE1 and CE2) inputs for ease in applications
•Fully static operation: no clock or refresh required
•TTL compatible inputs and outputs
•Single 5V (±10%) power supply
•Low power version available: IS61C1024L
•Commercial and industrial temperature ranges available
MAY 1999
DESCRIPTION
The ISSI IS61C1024 and IS61C1024L are very high-speed, low power, 131,072-word by 8-bit CMOS static RAMs. They are fabricated using ISSI's high-performance CMOS technology. This highly reliable process coupled with innovative circuit design techniques, yields higher performance and low power consumption devices.
When CE1 is HIGH or CE2 is LOW (deselected), the device assumes a standby mode at which the power dissipation can be reduced by using CMOS input levels.
Easy memory expansion is provided by using two Chip Enable inputs, CE1 and CE2. The active LOW Write Enable (WE) controls both writing and reading of the memory.
The IS61C1024 and IS61C1024L are available in 32-pin 300-mil SOJ, and TSOP (Type I, 8x20), and sTSOP (Type I, 8 x 13.4) packages.
FUNCTIONAL BLOCK DIAGRAM
A0-A16 |
DECODER |
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512 x 2048 |
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MEMORY ARRAY |
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VCC
GND
I/O
I/O0-I/O7 DATA COLUMN I/O
CIRCUIT
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CE1 |
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CONTROL |
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CE2 |
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CIRCUIT |
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OE |
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WE |
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ISSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors which may appear in this publication. © Copyright 1999, Integrated Silicon Solution, Inc.
Integrated Silicon Solution, Inc. — 1-800-379-4774 |
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SR028-1K 05/12/99
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IS61C1024 |
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ISSI |
® |
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IS61C1024L |
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PIN CONFIGURATION |
PIN CONFIGURATION |
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32-Pin SOJ |
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32-Pin TSOP (Type 1) (T) and sTSOP (Type 1) (H) |
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A11 |
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1 |
32 |
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NC |
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1 |
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32 |
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VCC |
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OE |
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A16 |
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2 |
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A15 |
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A9 |
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2 |
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A10 |
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A14 |
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3 |
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CE2 |
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A8 |
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CE1 |
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A12 |
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4 |
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WE |
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A13 |
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I/O7 |
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A7 |
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5 |
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A13 |
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5 |
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I/O6 |
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WE |
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A6 |
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6 |
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A8 |
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CE2 |
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I/O5 |
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A5 |
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7 |
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A9 |
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A15 |
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I/O4 |
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A4 |
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A11 |
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VCC |
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I/O3 |
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24 |
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A3 |
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OE |
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NC |
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GND |
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A2 |
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A10 |
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A1 |
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A16 |
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I/O2 |
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CE1 |
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A14 |
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I/O1 |
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A0 |
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I/O7 |
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I/O0 |
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I/O6 |
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A12 |
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I/O0 |
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I/O1 |
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I/O5 |
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A7 |
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A0 |
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I/O2 |
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I/O4 |
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A6 |
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A1 |
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A5 |
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A2 |
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GND |
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I/O3 |
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A4 |
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A3 |
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PIN DESCRIPTIONS |
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A0-A16 |
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Address Inputs |
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CE1 |
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Chip Enable 1 Input |
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CE2 |
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Chip Enable 2 Input |
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OE |
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Output Enable Input |
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WE |
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Write Enable Input |
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I/O0-I/O7 |
Input/Output |
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Vcc |
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Power |
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GND |
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Ground |
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OPERATING RANGE |
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Range |
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Ambient Temperature |
VCC |
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Commercial |
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0°C to +70°C |
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5V ± 10% |
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Industrial |
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–40°C to +85°C |
5V ± 10% |
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TRUTH TABLE |
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Mode |
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WE |
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CE1 |
CE2 |
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OE |
I/O Operation |
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Vcc Current |
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Not Selected |
X |
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H |
X |
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X |
High-Z |
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ISB1, ISB2 |
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(Power-down) |
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X |
L |
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High-Z |
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ISB1, ISB2 |
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Output Disabled |
H |
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L |
H |
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H |
High-Z |
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ICC1, ICC2 |
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Read |
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H |
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L |
H |
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L |
DOUT |
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ICC1, ICC2 |
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Write |
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L |
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L |
H |
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X |
DIN |
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ICC1, ICC2 |
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Integrated Silicon Solution, Inc. — 1-800-379-4774 |
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SR028-1J 11/03/98
IS61C1024 |
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ISSI |
® |
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IS61C1024L |
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ABSOLUTE MAXIMUM RATINGS(1) |
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Symbol |
Parameter |
Value |
Unit |
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VTERM |
Terminal Voltage with Respect to GND |
–0.5 to +7.0 |
V |
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TBIAS |
Temperature Under Bias |
–55 to +125 |
°C |
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TSTG |
Storage Temperature |
–65 to +150 |
°C |
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PT |
Power Dissipation |
1.5 |
W |
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IOUT |
DC Output Current (LOW) |
20 |
mA |
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Notes:
1.Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
CAPACITANCE(1,2)
Symbol |
Parameter |
Conditions |
Max. |
Unit |
CIN |
Input Capacitance |
VIN = 0V |
5 |
pF |
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COUT |
Output Capacitance |
VOUT = 0V |
7 |
pF |
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Notes:
1.Tested initially and after any design or process changes that may affect these parameters.
2.Test conditions: TA = 25°C, f = 1 MHz, Vcc = 5.0V.
DC ELECTRICAL CHARACTERISTICS (Over Operating Range)
Symbol |
Parameter |
Test Conditions |
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Min. |
Max. |
Unit |
VOH |
Output HIGH Voltage |
VCC = Min., IOH = –4.0 mA |
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2.4 |
— |
V |
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VOL |
Output LOW Voltage |
VCC = Min., IOL = 8.0 mA |
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— |
0.4 |
V |
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VIH |
Input HIGH Voltage |
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2.2 |
VCC + 0.5 |
V |
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VIL |
Input LOW Voltage(1) |
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–0.3 |
0.8 |
V |
ILI |
Input Leakage |
GND ≤ VIN ≤ VCC |
Com. |
–2 |
2 |
A |
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Ind. |
–5 |
5 |
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ILO |
Output Leakage |
GND ≤ VOUT ≤ VCC |
Com. |
–2 |
2 |
A |
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Outputs Disabled |
Ind. |
–5 |
5 |
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Note:
1. VIL = –3.0V for pulse width less than 10 ns.
Integrated Silicon Solution, Inc. — 1-800-379-4774 |
3 |
SR028-1K 05/12/99
IS61C1024 |
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ISSI |
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IS61C1024L |
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IS61C1024 POWER SUPPLY CHARACTERISTICS(1) (Over Operating Range) |
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-12 ns |
-15 ns |
-20 ns |
-25 ns |
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Symbol |
Parameter |
Test Conditions |
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Min. |
Max. |
Min. Max. |
Min. |
Max. |
Min. |
Max. |
Unit |
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ICC1 |
Vcc Operating |
VCC = VCC MAX., CE = VIL |
Com. |
— |
85 |
— |
85 |
— |
85 |
— |
85 |
mA |
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Supply Current |
IOUT = 0 mA, f = 0 |
Ind. |
— |
110 |
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110 |
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110 |
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110 |
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ICC2 |
Vcc Dynamic Operating |
VCC = VCC MAX., CE = VIL |
Com. |
— |
170 |
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160 |
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150 |
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140 |
mA |
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Supply Current |
IOUT = 0 mA, f = fMAX |
Ind. |
— |
180 |
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170 |
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160 |
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150 |
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ISB1 |
TTL Standby Current |
VCC = VCC MAX., |
Com. |
— |
40 |
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40 |
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40 |
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40 |
mA |
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(TTL Inputs) |
VIN = VIH or VIL |
Ind. |
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60 |
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60 |
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60 |
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60 |
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CE1 ≥ VIH, f = 0 or |
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CE2 ≤ VIL, f = 0 |
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ISB2 |
CMOS Standby |
VCC = VCC MAX., |
Com. |
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30 |
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30 |
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30 |
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30 |
mA |
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Current (CMOS Inputs) |
CE1 ≤ VCC – 0.2V, |
Ind. |
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40 |
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40 |
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40 |
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40 |
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CE2 ≤ 0.2V |
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VIN > VCC – 0.2V, or
VIN ≤ 0.2V, f = 0
Note:
1. At f = fMAX, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.
IS61C1024L POWER SUPPLY CHARACTERISTICS(1) (Over Operating Range)
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-15 ns |
-20 ns |
-25 ns |
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Symbol |
Parameter |
Test Conditions |
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Min. |
Max. |
Min. Max. |
Min. |
Max. |
Unit |
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ICC1 |
Vcc Operating |
VCC = VCC MAX., CE = VIL |
Com. |
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85 |
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85 |
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85 |
mA |
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Supply Current |
IOUT = 0 mA, f = 0 |
Ind. |
— |
110 |
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110 |
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110 |
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ICC2 |
Vcc Dynamic Operating |
VCC = VCC MAX., CE = VIL |
Com. |
— |
160 |
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150 |
— |
140 |
mA |
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Supply Current |
IOUT = 0 mA, f = fMAX |
Ind. |
— |
170 |
— |
160 |
— |
150 |
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ISB1 |
TTL Standby Current |
VCC = VCC MAX, |
Com. |
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40 |
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40 |
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40 |
mA |
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(TTL Inputs) |
VIN = VIH or VIL |
Ind. |
— |
60 |
— |
60 |
— |
60 |
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CE1 ≥ VIH, f = 0 or |
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CE2 ≤ VIL, f = 0 |
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ISB2 |
CMOS Standby |
VCC = VCC MAX., |
Com. |
— |
500 |
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500 |
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500 |
A |
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Current (CMOS Inputs) |
CE1 ≤ VCC – 0.2V, |
Ind. |
— |
750 |
— |
750 |
— |
750 |
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CE2 ≤ 0.2V |
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VIN > VCC – 0.2V, or
VIN ≤ 0.2V, f = 0
Note:
1. At f = fMAX, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.
4 |
Integrated Silicon Solution, Inc. — 1-800-379-4774 |
SR028-1J 11/03/98