Fixed drawing designators, added USB module, corrected inaccuracies,
reworded sections for clarity, removed reference to Creative Labs Vibra
16S with Yamaha FM Synthesis
Changed Name of product from Advanced/TE to TE430VX throughout4/96
Preliminary release of the TE430VX Technical Product Specification.3/96
This product specification applies only to standard TE430VX ATX motherboards with BIOS
identifier 1.00.01.CY0.
Changes to this specification will be published in the TE430VX Motherboard Specification Update
before being incorporated into a revision of this document.
5/96
Intel Corporation disclaims all warranties and liabilities for the use of this document and the information contained herein,
Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or
otherwise, to any intellectual property rights is granted by this document. Except as provided in Intel’s Terms and Conditions of
Sale for such products, Intel assumes no liability whatsoever, and Intel disclaims any express or implied warranty, relating to
sale and/or use of Intel products including liability or warranties relating to fitness for a particular purpose, merchantability, or
infringement of any patent, copyright or other intellectual property right. Intel products are not intended for use in medical, life
saving, or life sustaining applications.
Intel retains the right to make changes to specifications and product descriptions at any time, without notice.
TE430VX motherboard may contain design defects or errors known as errata. Current characterized errata are available on
The
request.
Contact your local Intel sales office or your distributor to obtain the latest specifications before placing your product order.
†
Third-party brands and names are the property of their respective owners.
Copies of documents which have an ordering number and are referenced in this document, or other Intel literature, may be
obtained from:
Intel Corporation
P.O. Box 7641
Mt. Prospect, IL 60056-7641
or call in North America 1-800-879-4683, Europe 44-0-1793-431-155, France 44-0-1793-421-777,
Germany 44-0-1793-421-333, Japan (fax only) 81-0-120-478-832, other Countries 708-296-9333
The TE430VX design accepts Pentium processors operating at 75 MHz, 90 MHz, 100 MHz,
120 MHz, 133 MHz, 150 MHz, 166 MHz, and 200MHz. There is an option of having 256 KB of
Pipeline Burst SRAM soldered onto the motherboard, or a Card Edge Low Profile (CELP)
connector for cache expandability. The memory subsystem is designed to support up to 128 MB of
EDO DRAM, or up to 64 MB of a new memory architecture called SDRAM, in standard 168-pin
DIMM sockets. A type 7 Pentium OverDrive
processors.
The TE430VX motherboard utilizes Intel's 82430VX PCISet. The 82430VX PCIset contains an
integrated PCI Bus Mastering IDE controller with two high performance IDE interfaces for up to
four IDE devices (such as hard drives, CD-ROM readers, and so forth). The SMC FDC37C932FR
Ultra I/O controller integrates the standard PC I/O functions: floppy interface, two FIFO serial
ports, one EPP/ECP capable parallel port, a Real Time Clock, keyboard controller, and support for
†
an IrDA
compatible infrared interface. To provide for the increasing number of multimedia
applications, a Creative Labs Vibra16C audio codec is integrated onto the motherboard. The Vibra
16C provides 16-bit stereo, Sound Blaster
†
also is the S3
Trio64† V+ video subsystem. Up to four PCI local bus slots provide a high
bandwidth data path for data-movement intensive functions such as video or networking, and up to
three ISA slots complete the I/O mix. A total of six expansion slots may be populated with full
length add-in cards: one PCI and ISA slot share the same chassis I/O panel.
socket provides upgrades to future OverDrive
†
Pro compatible audio. Integrated onto the motherboard
The motherboard is designed to fit standard ATX form factor chassis. Figure 2 illustrates the
motherboard’s dimensions. The motherboard meets the standard ATX specification guidelines in
that the outer dimensions are 12" x 9.6". Location of the I/O connectors, riser slot, and mounting
holes also meet the standard ATX specification.
The motherboard is designed to operate with 3.3 volt Pentium Processors running at 75, 90, 100,
120, 133, 150, 166, and 200MHz. An onboard linear voltage regulator circuit provides the
required 3.3 volts from the 5.0 volt tap of the power supply. An on-board jumper enables use of
VRE specified processors.
The Pentium processor maintains full backward compatibility with 8086, 80286, i386 and
Intel486 processors. It supports both read and write burst mode bus cycles and also includes
separate 8 KB on-chip code and data caches that employ a write-back policy.
The Pentium processor is an advanced numeric coprocessor that significantly increases the speed of
floating point operations, while maintaining backward compatibility with i486DX math
coprocessor and complying to ANSI/IEEE standard 754-1985.
This motherboard does not support the keep-out zones around the socket 7 that allow use of a
“piano wire” type heatsink clip. Intel recommends using only metal heatsink clips.
1.4.1 Microprocessor Upgrade
The motherboard provides a 321-pin Socket 7 ZIF processor socket. Socket 7 supports upgrades to
higher performance Pentium OverDrive processors.
1.5 Memory
1.5.1 System Memory
The motherboard provides two 168-pin DIMM(Dual Inline Memory Module) sites for DRAM
memory expansion. The sockets support 1 Meg x 64 (8 MB), 2 Meg x 64 (16 MB), and 4 Meg x
64 (32 MB) SDRAM DIMM modules and 1 Meg x 64 (8 MB), 2 Meg x 64 (16 MB), 4 Meg x 64
(32 MB) and 8 Meg x 64 (64 MB) EDO(Extended Data Out) DIMM modules. For systems
configured with EDO or SDRAM DIMM modules, minimum memory size is 8MB for EDO
systems. Maximum memory size is 128MB for EDO systems. Maximum memory size is 64MB
for SDRAM systems.
The two DIMM sockets are arranged as Bank 0 and Bank 1. Each bank consists of one socket and
a 64-bit wide data path. Bank 0 only, Bank 1 only, or both banks may be populated. EDO and
SDRAM may be installed in the same system. The system BIOS automatically detects memory
size and type so no jumper settings are required. Gold leaded DIMMs are required to be used
when adding system memory.
1.5.1.1 EDO DRAM
E D O (or Hyper Page) DRAM improves the DRAM read performance. EDO DRAM holds the
memory data valid until the next CAS# falling edge unlike standard fast page mode DRAM, which
tri-states the memory data when CAS# negates to precharge for the next cycle. With EDO, the
CAS# precharge overlaps the data valid time allowing CAS# to negate earlier while still satisfying
the memory data valid window time.
10
Motherboard Description
1.5.1.2 SDRAM
Synchronous Dynamic Random Access Memory, (SDRAM) is designed to improve main memory
performance. SDRAM is synchronous to the memory clock unlike standard Fast Page DRAM, or
EDO DRAM. All the timing is dependent on the number of memory clock cycles. This makes the
timing design simpler and makes a faster memory speed easier to achieve. Discrete SDRAM
components must meet the 66 MHz PC SDRAM Specification version 1.0 to function correctly.
1.5.2 Second Level Cache
The Pentium processor's internal cache can be complemented by a second level cache using highperformance Pipelined Burst SRAM with GWE (Global Write Enabled) or Asynchronous Cache.
One factory option is an integrated 256 KB direct mapped write-back second level cache
implemented with two 32k x 32 Pipeline Burst SRAM devices that take advantage of the Global
Write Enable pin. A 5v 8 KB x 8 external Tag SRAM provides caching support for up to 64 MB
of system memory.
A second factory option is a Type 1 CELP connector, specified by Intel’s COAST Module
Specification version 3.0. The Type 1 CELP connector has a keying “hip” located at one end of
the connector. This connector allows the use of both a GWE PBSRAM COAST module, and a
GWE Asynchronous COAST module. The GWE Asynchronous modules must be built for Intel’s
82430VX designs and are not interchangeable with Asynchronous modules built for 82430FX
designs. The reason for this incompatibility is the additional logic added to the 82430VX modules
to account for the GWE functionality built into the chipset.
1.6 Chipset
The Intel 82430VX PCIset consists of the 82430VX System Controller (TVX), two Data Paths
(TDX) and one 82371SB PCI ISA/IDE Xcelerator (PIIX3) bridge chip.
1.6.1 82430VX System Controller (TVX)
The 82430VX TVX provides all control signals necessary to drive a second level cache and the
DRAM array, including multiplexed address signals. The TVX also controls system access to
memory and generates snoop controls to maintain cache coherency. The TVX comes in a 208-pin
QFP package that features:
• CPU interface control
• Integrated L2 write-back cache
controller
Pipeline Burst SRAM
256 or 512 KB direct-mapped
• Integrated DRAM controller
64 bit path to memory
Support for SDRAM and EDO
DRAM
8 MB to 128 MB main memory
• Fully synchronous PCI bus interface
25/30/33 MHz
PCI to DRAM > 100 Mbytes/sec
Up to 4 PCI masters in addition to
the PIIX3 and IDE
11
1.6.2 82430VX Data Path (TDX)
Two 82430VX TDX data path components provide a 64-bit microprocessor to memory path. The
TDX components are controlled by the TVX. They each add one load to the PCI bus and perform
all of the required byte and word swapping. The TDX devices come in a 208 pin QFP package.
1.6.3 PCI ISA/IDE Xcelerator (PIIX3)
The PIIX3 provides the interface between the PCI and ISA buses and integrates a dual channel fast
IDE interface capable of supporting up to 4 devices. The PIIX3 integrates seven 32-bit DMA
channels, five 16-bit timer/counters, two eight-channel interrupt controllers, PCI-to-AT interrupt
mapping circuitry, NMI logic, ISA refresh address generation, and PCI/ISA bus arbitration
circuitry together onto the same device. The PIIX3 comes in a 208-pin QFP package that features:
• PCI Bus and ISA Bus interface
• Universal Serial Bus controller
Host/hub controller
• Integrated fast IDE interface
Support for up to 4 devices
PIO Mode 4 transfers up to
16 MB/sec
Integrated 8 x 32-bit buffer for
bus master PCI IDE burst
transfers
Bus master mode
• PCI 2.1 compliance
• Enhanced fast DMA controller
• Interrupt controller and steering
• Counters/timers
• SMI interrupt logic and timer with
fast on/off mode
1.6.4 IDE SUPPORT
The motherboard provides two independent bus-mastering PCI IDE interfaces that support PIO
Mode 3 and Mode 4 devices. The system BIOS supports Logical Block Addressing (LBA) and
Extended Cylinder Sector Head (ECHS) translation modes as well as ATAPI (e.g. CD-ROM)
devices on both IDE interfaces. The system BIOS automatically detects IDE device transfer rate
and translation mode.
Normally, programmed I/O operations require a substantial amount of CPU bandwidth. In true
multi-tasking operating systems like Windows
mastering IDE can be used to complete other tasks while disk transfers are occurring. When used
in conjunction with the appropriate driver for the Windows 95 environment, the IDE interface can
operate as a PCI bus master capable of supporting PIO Mode 4 devices with transfer rates of up to
16 MB/sec.
The SMC FDC37C93FR is software compatible with the DP8473 and 82077 floppy disk
controllers. The floppy interface can be configured for 360 KB or 1.2 MB 5¼" media or for
720 KB, 1.2 MB, 1.44 MB, or 2.88 MB 3½" media in the BIOS setup. By default, the Floppy A
interface is configured for 1.44 MB and Floppy B is disabled. Another setup option prevents the
user from being able to write to floppy. Configuring the floppy interface for 1.25 MB 3 ½"
(3-mode floppy) requires the use of special floppy drives and a driver to for the specific operating
system.
1.7.2 Keyboard and mouse interface
PS/2† keyboard/mouse connectors are located on the back panel side of the motherboard. The 5V
lines to these connectors are protected with a PolySwitch
healing fuse, re-establishing the connection after an over-current condition is removed. While this
device eliminates the possibility of having to replace a fuse, care should be taken to turn off the
system power before installing or removing a keyboard or mouse. The system BIOS can detectand
correct keyboards and mice plugged into the wrong PS/2 style connector.
The integrated 8042 microcontroller contains the AMI Megakey keyboard/mouse controller code
which, besides providing traditional keyboard and mouse control functions, supports PowerOn/Reset (POR) password protection. The POR password can be defined by the user via the Setup
program. The keyboard controller also provides for the following "hot key" sequences:
• <CTRL><ALT><DEL>: System software reset. This sequence performs a software reset of
the system by jumping to the beginning of the BIOS code and running the POST operation.
• <CTRL><ALT><+> and <CTRL><ALT><->: Turbo mode selection. <CTRL><ALT><->
sets the system for de-turbo mode, emulating an 25 MHz AT, and <CTRL><ALT><+> sets
the system for turbo mode. Changing the Turbo mode may be prohibited by an operating
system, or when the CPU is in Protected mode or virtual x86 mode under DOS.
• <CTRL><ALT><defined in setup>: A power down hot-key sequence takes advantage of the
SMM features of the Pentium Processor to greatly reduce the system’s power consumption
while maintaining the responsiveness necessary to service external interrupts. A security hotkey sequence provides password protection to the system.
†
circuit which acts much like a self-
1.7.3 Real time clock, CMOS RAM and battery
The integrated Real Time Clock (RTC) is DS1287 and MC146818 compatible and provides a time
of day clock, 100-year calendar with alarm features. The RTC can be set via the BIOS SETUP
program. The RTC also supports 242-byte battery-backed CMOS RAM in two banks which is
reserved for BIOS use. The CMOS RAM can be set to specific values or cleared to the system
default values using the BIOS SETUP program. Also, the CMOS RAM values can be cleared to
the system defaults by using a configuration jumper on the motherboard.
An external coin-cell style battery provides power to the RTC and CMOS memory. The battery
has an estimated lifetime of three years if the system is not plugged into the wall socket. When the
system is plugged in, power is supplied from the ATX power supply’s 5v standby current to extend
the life of the battery.
A 5-pin interface on the front panel I/O connector is provided to allow connection to a Hewlett
†
Packard
HSDSL-1000 compatible Infra-red (IrDA) transmitter/receiver. Once the module is
connected to the front panel I/O header, Serial port 2 can be re-directed to the IrDA module. When
configured for IrDA, the user can transfer files to or from portable devices such as laptops, PDA’s
and printers using application software such as LapLink
transfers at 115kbps from a distance of 1 meter.
1.7.5 Consumer IR Support
The motherboard also has a signal pin to support Consumer IR devices(remote controls). A
software and hardware interface is required to implement consumer IR on with the motherboard.
1.7.6 Parallel port
A 25-pin D-Sub header is provided on the back panel for a multi-mode bi-directional parallel port.
The parallel port operates in standard mode, Enhanced Parallel Port (EPP) version 1.7 mode, with
BIOS and Driver support, and a high speed Extended Capabilities Port (ECP) compatible mode.
EPP Mode requires a driver provided by the peripheral manufacturer to operate correctly.
1.8 Graphics Subsystem (S3 Trio64V+)
The motherboard is available with an S3 Trio64 V+ SVGA graphics controller with 1 MB of
graphics memory upgradeable to 2 MB. The graphics DRAM can be upgraded to 2 MB by
installing two 256 KB x 16 SOJ memory devices in the provided sockets. The Trio64 V+ has a
64-bit graphics engine and incorporates the S3 Streams Processor that enables the device to convert
YUV formatted video data to RGB and provides acceleration for scaling the video display without
compromising picture quality or frame rate. The on-chip RAMDAC/clock synthesizer is capable
of output pixel data rates of 135 MHz providing non-interlaced screen resolutions of up to
1280x1024x256 colors at 75 Hz with 2 MB of DRAM. Hardware acceleration for graphics
functions such as BitBLTs with ROPs, 2-point line draws, trapezoidal and polygon fills, clipping
and cursor support provide high performance operation under Windows and other GUI
environments. In addition, a fast linear addressing scheme based upon DCI reduces software
overhead by mapping the display memory into the CPU’s upper memory address space and
permitting direct CPU access to the display memory.
†
. The IrDA specification provides for data
The motherboard supports the 26-pin VESA feature connector for synchronizing graphics output
with an external NTSC or PAL signal and a shared frame buffer interface to maximize multi-media
performance. Boards configured with the Trio64 V+ will have a 34 pin feature connector that
supports the VESA requirements as well as the LPB (Local Peripheral Bus) that provides a glueless
bi-directional interface to a video companion device such as an MPEG/live video decoder. The
motherboard also supports other VESA standards such as the VESA DPMS protocol to put a
DPMS compliant monitor into power savings modes and the VESA Display Data Channel
(DDC2B) that permits transfer of monitor identification and resolution support data for ease of use.
When a monitor is not plugged into the system on power-up, the video will default to color mode,
†
rather than monochrome. This is a deviation from the VGA
Graphics drivers and utilities for Windows 3.11 and Windows 95 are provided on the foundation
software CD. These drivers come in a compressed form and are extracted by using an installation
utility. Also included is a Windows 3.1x control panel applet called Galileo which allows the user
to change the screen resolution, number of colors, and large or small fonts while in Windows.
Windows NT
†
drivers are embedded in the O.S.
Graphics drivers for OS/2
†
2.11 and OS/2 WARP, MS-DOS† applications such as AutoCAD† and
Microstation, and driver updates for Windows 3.11 and Windows NT may be downloaded from the
†
Intel Applications Support BBS. Drivers for SCO UNIX
are available from SCO.
1.9 Audio Subsystem (Creative Labs Vibra 16C)
The motherboard features a 16-bit stereo audio subsystem. The audio subsystem is based upon the
Creative Labs Vibra 16C (CT2505) multimedia Codec. The Vibra 16C provides all the digital
audio and analog mixing functions required for recording and playing of audio on personal
computers. The Creative Labs Vibra 16C is a single chip VLSI solution which integrates FM
synthesis, is Sound Blaster compatible and Roland MPU-401 UART mode compatible. Creative
Labs Vibra 16C also provides MPCII, Adlib, and Multimedia PC Level 2 compliance to meet all of
the requirements of today’s multi-media applications.
The Vibra 16C has been implemented as a Plug and Play motherboard device. This means that
there is a device node defined for the Vibra 16C and the BIOS must configure it. Although it is
not a Plug and Play device, the Vibra 16C is very flexible in that it accommodates a variety of I/O
addresses, DMA channels and interrupts.
The audio subsystem requires up to two DMA channels (to support full duplex operation) and one
interrupt. When the Vibra 16C is programmed for full duplex operation, two DMA channels are
assigned: one of the channels will be a 16-bit channel and the other will be 8 bits. The system can
be configured to use either DMA channels 1 or 3 (8 bit channels) and DMA channels 5 or 7 (16 bit
channels). The interrupt can be mapped to IRQ 5, 7, 9, or 10. The base address register is also
configurable for a variety of base addresses ranging from I/O address 220 through address 280 (see
the resource map below for more details). The ICU (ISA Configuration Utility) must be installed
and configured before installing the DOS and Windows audio drivers.
1.9.1 Vibra 16C resource map
DeviceInterrupt (IRQ)DMA ChannelI/O Address
Creative Labs 16C Base2/98 bit DMA 1 (default)220h-233h (default)
5 (default)8 bit DMA 3240h-253h
716 bit DMA 5 (default) 260h-273h
1016 bit DMA 7280h-293h
FM Synthesis388h-38Bh
Joystick (midi-port)200h-207h
MPU-401default is disabled300h-301h
330h-331h
1.9.2 Audio Drivers
Audio software and utilities are provided via the foundation software CD for the motherboard for
DOS, Windows 3.1x, and Windows 95. A setup program installs the appropriate software
programs and utilities onto the system hard drive. Included in the audio software are DOS utilities
that allow the user to play a CD-ROM, control sound volume and mixer settings, run diagnostics,
and switch between Sound Blaster Pro and Windows Sound System modes. Windows drivers and
utilities include the Windows sound driver, audio input control panel, audio mixer control panel,
and a business audio transport utility.
16
Motherboard Description
OM04551
PCI IDE Connector(2)
1
39
2
40
20
J9H1
J9H2
J10H1
234
1335
Floppy Drive Connector
J2C1, J2D1
J2E1, J2E2
PCI
Connectors(4)
J1A1, J1A2
J1B1
ISA
Connectors(3)
1
J1F1
Mod-blast
Connector
2
9
10
14
J2F2
CDROM
Connector
1
J2F3
Wave Table
Connector
2
7
Front Panel I/O Connector
J9E2
271
A
(J3F1)
B(J3G1)
DIMM
Sockets(2)
AB
(J2J1)
CELP
Cache
Socket
1
J7M2
Power Connector
20
16
J7L1
3.3 Volt Power
Connector
J2F1
Telephony
Connector
1
1.10 Motherboard Connectors
Figure 3 shows the connectors on the motherboard. Pin call outs and signal names follow Figure 3.
1Ground2DENSEL
3Ground4Reserved
5Key6FDEDIN
7Ground8Index #
9Ground10Motor Enable A #
11Ground12Drive Select B #
13Ground14Drive Select A #
15Ground16Motor Enable B #
17MSEN118DIR #
19Ground20STEP #
21Ground22Write Data #
23Ground24Write Gate #
25Ground26Track 00 #
27MSEN028Write Protect #
29Ground30Read Data #
31Ground32Side 1 Select #
33Ground34Diskette Change #
Motherboard Description
1.10.6 IDE Connectors - J9H1, J9H2
PinSignal NamePinSignal Name
1Reset IDE2Ground
3Host Data 74Host Data 8
5Host Data 66Host Data 9
7Host Data 58Host Data 10
9Host Data 410Host Data 11
11Host Data 312Host Data 12
13Host Data 214Host Data 13
15Host Data 116Host Data 14
17Host Data 018Host Data 15
19Ground20Key
21DDRQ0 (DDRQ1)22Ground
23I/O Write #24Ground
25I/O Read #26Ground
27IOCHRDY28Vcc pull-up
continued
☛
19
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