Intel S5721-xxx User Manual

CBI/CGI

CB BASIC

S5721-xxx

TECHNICAL REFERENCE

®

Intel

Pentium

or

®

Intel

Celeron

PROCESSOR-BASED

SBC

®

III

®

WARRANTY The product is warranted against material and manufacturing defects for two years from

date of delivery. Buyer agrees that if this product proves defective Chassis Plans is only
obligated to repair, replace or refund the purchase price of this product at Chassis Plans’
discretion. The warranty is void if the product has been subjected to alteration, neglect,
misuse or abuse; if any repairs have been attempted by anyone other than Chassis Plans;
or if failure is caused by accident, acts of God, or other causes beyond the control of
Chassis Plans. Chassis Plans reserves the right to make changes or improvements in any
product without incurring any obligation to similarly alter products previously
purchased.

In no event shall Chassis Plans be liable for any defect in hardware or software or loss or
inadequacy of data of any kind, or for any direct, indirect, incidental or consequential
damages arising out of or in connection with the performance or use of the product or
information provided. Chassis Plans’ liability shall in no event exceed the purchase
price of the product purchased hereunder. The foregoing limitation of liability shall be
equally applicable to any service provided by Chassis Plans

R

ETURN POLICY Products returned for repair must be accompanied by a Return Material Authorization

(RMA) number, obtained from Chassis Plans prior to return. Freight on all returned
items must be prepaid by the customer, and the customer is responsible for any loss or
damage caused by common carrier in transit. Items will be returned from Chassis Plans
via Ground, unless prior arrangements are made by the customer for an alternative
shipping method

To obtain an RMA number, call us at [phone]. We will need the following infor­mation:

Return company address and contact
Model name and model # from the label on the back of the board
Serial number from the label on the back of the board
Description of the failure

An RMA number will be issued. Mark the RMA number clearly on the outside of each
box, include a failure report for each board and return the product(s) to our San Diego,
CA facility:

Chassis Plans
8295 Aero Place, Suite 200
San Diego, CA 92123
Attn: Repair Department
858-571-4330

TRADEMARKS IBM, PC, VGA, EGA, OS/2 and PS/2 are trademarks or registered trademarks of

International Business Machines Corp.

AMI and AMIBIOS are trademarks or registered trademarks of American

Megatrends Inc.
Intel, Pentium, Celeron and AGP are registered trademarks of Intel Corporation.
MS-DOS and Microsoft are registered trademarks of Microsoft Corp.
PICMG and the PICMG logo are registered trademarks of the PCI Industrial Computer

Manufacturers Group.
SCSISelect is a trademark of Adaptec, Inc.
All other brand and product names may be trademarks or registered trademarks of their

respective companies.

L

IABILITY

D

ISCLAIMER

This manual is as complete and factual as possible at the time of printing; however, the
information in this manual may have been updated since that time. Chassis Plans
reserves the right to change the functions, features or specifications of their products at
any time, without notice.

Copyright

© 2003 by Chassis Plans All rights reserved.

E-mail: [e-mail]
Web: www.chassisplans.com

Chassis Plans, LLC
8295 Aero Place
Sales: [phone]

• Suite 200 • San Diego, California 92123

• Fax: [phone] • Web http://www.chassisplans.com

CBI/CGI Technical Reference

Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-1

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-1

Models . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-1

Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-3

SBC Block Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-5

SBC Processor Board Layout. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-6

Processor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-7

Bus Interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-7

Data Path . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-7

Bus Speed - ISA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-7

Bus Speed - PCI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-7

Bus Speed - System & Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-7

System & Memory Buses. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-7

DMA Channels. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-7

Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-7

BIOS (Flash). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-7

Cache Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-7

DRAM Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-8

Memory Hole . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-9

Error Checking and Correction . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-9

PCI Local Bus Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-9

Universal Serial Bus (USB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-9

Concurrent PCI. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-9

AGP VGA Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-9

System Hardware Monitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-9

10/100Base-T Ethernet Interface . . . . . . . . . . . . . . . . . . . . . . . . . . .1-10

PCI Ultra Wide SCSI Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-10

PCI Enhanced IDE Ultra DMA/33 Interfaces (Dual) . . . . . . . . . . .1-11

Floppy Drive Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-11

Serial Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-11

Enhanced Parallel Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-11

PS/2 Mouse Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-11

Keyboard Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-11

Watchdog Timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-11

Power Fail Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-11

Battery . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-12

Power Requirements. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-12

Table of Contents

Chassis Plans i

CBI/CGI Technical Reference

Table of Contents

Specifications (continued)

Temperature/Environment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-12

Mean Time Between Failures (MTBF) . . . . . . . . . . . . . . . . . . . . . .1-12

UL Recognition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-12

Configuration Jumpers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-13

Ethernet LEDs and Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-15

System BIOS Setup Utility. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-15

Connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-16

ISA/PCI Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-1

ISA Bus Pin Numbering. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-1

ISA Bus Pin Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-2

ISA Bus Signal Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-3

I/O Address Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-7

Interrupt Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-7

PCI Local Bus Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-8

PCI Local Bus Signal Definition . . . . . . . . . . . . . . . . . . . . . . . . . . .2-9

PCI Local Bus Pin Numbering. . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-10

PCI Local Bus Pin Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . .2-11

PCI Local Bus Signal Descriptions . . . . . . . . . . . . . . . . . . . . . . . . .2-14

PICMG Edge Connector Pin Assignments . . . . . . . . . . . . . . . . . . .2-18

System BIOS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-1

BIOS Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-1

Password Entry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-3

BIOS Errors. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-4

Running AMIBIOS Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-5

AMIBIOS Setup Utility Main Menu . . . . . . . . . . . . . . . . . . . . . . . .3-6

AMIBIOS Setup Utility Options . . . . . . . . . . . . . . . . . . . . . . . . . . .3-6

Auto-Detect Hard Disks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-11

Change Password . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-11

Change Supervisor Password . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-11

Change User Password. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-12

Disabling the Password(s) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-13

Auto Configuration Options. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-13

Auto Configuration with Optimal Settings . . . . . . . . . . . . . . . . .3-13

Auto Configuration with Fail Safe Settings . . . . . . . . . . . . . . . .3-14

Chassis Plansii

CBI/CGI Technical Reference

System BIOS (continued)

Save Settings and Exit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-14

Exit Without Saving . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-14

Key Conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-15

Standard CMOS Setup. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4-1

Standard CMOS Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4-1

Boot Sector Virus Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4-6

Advanced Setup. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-1

Advanced CMOS Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-1

Advanced Chipset Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-10

Power Management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6-1

PCI/Plug and Play Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7-1

Table of Contents

Peripheral Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8-1

Appendix A - BIOS Messages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .A-1

BIOS Beep Codes. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .A-1

BIOS Error Messages. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .A-2

ISA BIOS NMI Handler Messages . . . . . . . . . . . . . . . . . . . . . . . . .A-5

Port 80 Codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .A-6

Additional Bus Checkpoints. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .A-12

Appendix B - Adaptec, Inc. Software License . . . . . . . . . . . . . . . . . . .B-1

Appendix C - SCSISelect Configuration Utility. . . . . . . . . . . . . . . . . .C-1

Declaration of Conformity

Chassis Plans iii

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CBI/CGI Technical Reference

Copyright 2003 by Trenton Technology Inc. All rights reserved.

Chassis Plansiv

CBI/CGI Technical Reference

HANDLING
P

RECAUTIONS

S

OLDER-SIDE

C

OMPONENTS

_______________________________________________________________________

WA R NI N G : This product has components which may be damaged by electrostatic
discharge.
_______________________________________________________________________

To protect your single board computer (SBC) from electrostatic damage, be sure to
observe the following precautions when handling or storing the board:

• Keep the SBC in its static-shielded bag until you are ready to perform your

installation.

• Handle the SBC by its edges.

• Do not touch the I/O connector pins. Do not apply pressure or attach labels

to the SBC.

• Use a grounded wrist strap at your workstation or ground yourself

frequently by touching the metal chassis of the system before handling any
components. The system must be plugged into an outlet that is connected to
an earth ground.

• Use antistatic padding on all work surfaces.

• Avoid static-inducing carpeted areas.

This SBC has components on both sides of the PCB. It is important for you to observe
the following precautions when handling or storing the board to prevent solder-side
components from being damaged or broken off:

• Handle the board only by its edges.

• Store the board in padded shipping material or in an anti-static board rack.

• Do not place an unprotected board on a flat surface.

Chassis Plans v

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CBI/CGI Technical Reference

Copyright 2003 by Trenton Technology Inc. All rights reserved.

Chassis Plansvi

Chapter 1 Specifications

SpecificationsCBI/CGI Technical Reference

INTRODUCTION The CBI full-featured PCI/ISA processors are single board computers (SBCs) which

feature an Intel

®

Celeron® microprocessor or Intel® Pentium® III microprocessor, Intel
440BX AGPset, 66/100MHz system and memory buses, Intel Accelerated Graphics Port
(AGP) video interface, SDRAM, PCI Local Bus, cache, floppy controller, dual EIDE
(Ultra DMA/33) interface, PCI Ultra Wide SCSI controller, PCI 10/100Base-T Ethernet
controller, two serial ports, parallel port, speaker port, mouse port and keyboard port
on a single ISA-size card. These single-slot, high performance SBCs plug into PICMG
PCI/ISA passive backplanes and provide full PC compatibility for the system expansion
slots.

The CGI models of this SBC feature the Intel 440GX AGPset, supporting memory
configurations up to 1GB.

The CB BASIC model has all of the standard features of the CBI, but does not include
the Intel video interface, PCI Ultra Wide SCSI controller or PCI 10/100Base-T Ethernet
controller.

ODELS

M

Model # Model Name Speed

CBI - BX:

®

Intel

Pentium® III Processor - 100MHz FSB/256K cache:

S5721-110-xM
S5721-109-xM
S5721-108-xM
S5721-107-xM
S5721-106-xM
S5721-105-xM
S5721-104-xM
S5721-103-xM
S5721-102-xM
S5721-101-xM

CBI/1.0
CBI/900
CBI/850
CBI/800
CBI/750
CBI/700
CBI/650
CBI/600E
CBI/550E
CBI/500E

1.0GHz
900MHz
850MHz
800MHz
750MHz
700MHz
650MHz
600MHz
550MHz
500MHz

®

®

Intel

Celeron® Processor - 100MHz FSB/128K cache:

S5721-205-xM
S5721-204-xM

®

Intel

Celeron® Processor - 66MHz FSB/128K cache:

S5721-016-xM
S5721-015-xM
S5721-014-xM
S5721-013-xM
S5721-012-xM
S5721-011-xM
S5721-010-xM
S5721-009-xM
S5721-008-xM
S5721-007-xM
S5721-006-xM

CBI/900C
CBI/850C

CBI/800C
CBI/766
CBI/733
CBI/700C
CBI/667
CBI/633
CBI/600
CBI/566
CBI/533
CBI/500
CBI/466

900MHz
850MHz

800MHz
766MHz
733MHz
700MHz
667MHz
633MHz
600MHz
566MHz
533MHz
500MHz
466MHz

Chassis Plans 1-1

Specifications CBI/CGI Technical Reference

MODELS
(

CONTINUED)

Model #

CBI - BX: (continued)

®

Intel

Celeron® Processor - 66MHz FSB/128K cache: (cont’d)

S5721-005-xM
S5721-004-xM
S5721-003-xM
S5721-002-xM

CGI - GX:

®

Intel

Pentium® III Processor - 100MHz FSB/256K cache:

S5721-150-xM
S5721-149-xM
S5721-148-xM
S5721-147-xM
S5721-146-xM
S5721-145-xM
S5721-144-xM
S5721-143-xM
S5721-142-xM
S5721-141-xM

Model Name Speed

CBI/433
CBI/400
CBI/366
CBI/333

CGI/1.0
CGI/900
CGI/850
CGI/800
CGI/750
CGI/700
CGI/650
CGI/600E
CGI/550E
CGI/500E

433MHz
400MHz
366MHz
333MHz

1.0GHz
900MHz
850MHz
800MHz
750MHz
700MHz
650MHz
600MHz
550MHz
500MHz

®

Intel

Celeron® Processor - 100MHz FSB/128K cache:

S5721-245-xM
S5721-244-xM

®

Intel

Celeron® Processor - 66MHz FSB/128K cache:

S5721-056-xM
S5721-055-xM
S5721-054-xM
S5721-053-xM
S5721-052-xM
S5721-051-xM
S5721-050-xM
S5721-049-xM
S5721-048-xM
S5721-047-xM
S5721-046-xM
S5721-045-xM
S5721-044-xM
S5721-043-xM
S5721-042-xM

CGI/900C
CGI/850C

CGI/800C
CGI/766
CGI/733
CGI/700C
CGI/667
CGI/633
CGI/600
CGI/566
CGI/533
CGI/500
CGI/466
CGI/433
CGI/400
CGI/366
CGI/333

900MHz
850MHz

800MHz
766MHz
733MHz
700MHz
667MHz
633MHz
600MHz
566MHz
533MHz
500MHz
466MHz
433MHz
400MHz
366MHz
333MHz

CB BASIC - BX:

®

Intel

Pentium® III Processor - 100MHz FSB/256K cache:

S5721-130-xM
S5721-129-xM
S5721-128-xM

CBB/1.0
CBB/900
CBB/850

1.0GHz
900MHz
850MHz

Chassis Plans1-2

MODELS
(

CONTINUED)

Model #

Model Name Speed

CB BASIC - BX: (continued)

®

Intel

Pentium® III Processor - 100MHz FSB/256K: (cont’d)

S5721-127-xM
S5721-126-xM
S5721-125-xM
S5721-124-xM
S5721-123-xM
S5721-122-xM
S5721-121-xM

®

Intel

Celeron® Processor - 100MHz FSB/128K cache:

S5721-225-xM
S5721-224-xM

®

Intel

Celeron® Processor - 66MHz FSB/128K cache:

S5721-036-xM
S5721-035-xM
S5721-034-xM
S5721-033-xM
S5721-032-xM
S5721-031-xM
S5721-030-xM
S5721-029-xM
S5721-028-xM
S5721-027-xM
S5721-026-xM
S5721-025-xM
S5721-024-xM
S5721-023-xM
S5721-022-xM

CBB/800
CBB/750
CBB/700
CBB/650
CBB/600E
CBB/550E
CBB/500E

CBB/900C
CBB/850C

CBB/800C
CBB/766
CBB/733
CBB/700C
CBB/667
CBB/633
CBB/600
CBB/566
CBB/533
CBB/500
CBB/466
CBB/433
CBB/400
CBB/366
CBB/333

800MHz
750MHz
700MHz
650MHz
600MHz
550MHz
500MHz

900MHz
850MHz

800MHz
766MHz
733MHz
700MHz
667MHz
633MHz
600MHz
566MHz
533MHz
500MHz
466MHz
433MHz
400MHz
366MHz
333MHz

SpecificationsCBI/CGI Technical Reference

where xM indicates memory size (0M = 0MB memory,
8M =8MB memory, etc.)

F

EATURES • Intel

®

Pentium® III (FC-PGA) microprocessor

• 1.0GHz, 900MHz, 850MHz, 800MHz, 750MHz, 700MHz or 650MHz,

600EMHz, 550EMHz or 500EMHz with 256K cache and a 100MHz Front
Side Bus (FSB)

®

or Intel

Celeron® microprocessor

• 900MHz or 850MHz with 128K cache and a 100MHz FSB

• 800MHz, 766MHz, 733MHz, 700MHz, 667MHz, 633MHz, 600MHz,

566MHz, 533MHz, 500MHz, 466MHz, 433MHz, 400MHz, 366MHz or
333MHz with 128K cache and a 66MHz FSB

• Intel 440BX AGPset with 66/100MHz system and memory buses, and PCI

bandwidth greater than 100MB/second. 440GX AGPset also available.

Chassis Plans 1-3

Specifications CBI/CGI Technical Reference

FEATURES
(

CONTINUED)

• Intel Accelerated Graphics Port (AGP) VGA on-board video interface

• PCI Local Bus supports off-board PCI option cards, PCI 10/100Base-T Ethernet

controller and on-board PCI Ultra Wide SCSI controller - Adaptec AIC-7880

• DRAM error checking and correction (ECC) support

• Compatible with PCI Industrial Computer Manufacturers Group (PICMG) 1.0

Specification

• Supports up to 512MB of Synchronous DRAM (SDRAM) on board; 440GX

AGPset supports up to 1GB

• Floppy drive and dual PCI EIDE Ultra DMA/33 drive interface

• Two serial ports and one parallel port

• Automatic or manual peripheral configuration

• Watchdog timer

• System hardware monitor

• Supports 1M x 64 to 32M x 64 DIMMs for non-ECC configurations; supports

1M x 72 to 32M x 72 DIMMs for ECC configurations. 440GX configurations
support up to 64M x 72 DIMMs.

• Shadow RAM for System BIOS and peripherals increases system speed and

performance

• Full PC compatibility

Chassis Plans1-4

SBC BLOCK
D

IAGRAM

SpecificationsCBI/CGI Technical Reference

Chassis Plans 1-5

Specifications CBI/CGI Technical Reference

SBC PROCESSOR
B

OARD LAYOUT

Chassis Plans1-6

PROCESSORS • Intel® Pentium® III (FC-PGA) microprocessor

• 1.0GHz, 900MHz, 850MHz, 800MHz, 750MHz, 700MHz or 650MHz,

600EMHz, 550EMHz or 500EMHz with 256K cache and a 100MHz Front
Side Bus (FSB)

®

or Intel

Celeron® microprocessor

• 900MHz or 850MHz with 128K cache and a 100MHz FSB

• 800MHz, 766MHz, 733MHz, 700MHz, 667MHz, 633MHz, 600MHz,

566MHz, 533MHz, 500MHz, 466MHz, 433MHz, 400MHz, 366MHz or
333MHz with 128K cache and a 66MHz FSB

B

US INTERFACES ISA and PCI Local Bus compatible

D

ATA PATH DRAM/Memory - 64-bit

ISA Bus - 16-bit

PCI Bus - 32-bit

Video - 64-bit

SpecificationsCBI/CGI Technical Reference

B

US SPEED - ISA 8.33MHz

B

US SPEED - PCI 33MHz

B

US SPEED -

S

YSTEM &

M

EMORY

S

YSTEM &

M

EMORY BUSES

• Intel® Pentium® III - 100MHz

• Intel

®

Celeron® - 66MHz or 100MHz

The Intel 440BX/GX AGPset supports the system and memory buses at both 66MHz and
100MHz speeds. The 100MHz system and memory buses provide a higher bandwidth
path for transferring data between main memory/chip set and the processor.

DMA C

HANNELS The SBC is fully PC compatible with seven DMA channels, each supporting type F

transfers.

I

NTERRUPTS The SBC is fully PC compatible with interrupt steering for PCI plug and play compati-

bility.

BIOS (F

LASH) The BIOS is a Hi-Flex AMIBIOS with built-in advanced CMOS setup for system param-

eters, peripheral management for configuring on-board peripherals, PCI-to-PCI bridge
support and PCI interrupt steering. The BIOS chip is a boot block Flash device ­28F002BX-T120. The BIOS may be upgraded from floppy disk by pressing <Ctrl> +
<Home> immediately after reset or power-up with the floppy disk in drive A:. Custom
BIOSs are available.

C

ACHE MEMORY For Pentium III processors, the processor includes an integrated on-die, 256K 8-way set

associative level two (L2) cache. The L2 cache implements the Advanced Transfer
Cache architecture with a 256-bit wide bus. The processor also includes a 16K level one

Chassis Plans 1-7

Specifications CBI/CGI Technical Reference

(L1) instruction cache and 16K L1 data cache. These cache arrays run at the full speed
of the processor core.

For Celeron processors, a 128K unified, non-blocking second level (L2) cache improves
performance by reducing the average memory access time and providing fast access to
recently used instructions and data.

DRAM M

EMORY The DRAM interface consists of two dual in-line memory module (DIMM) sockets and

supports auto detection of memory up to 512MB of Synchronous DRAM (SDRAM) for
the 440BX or up to 1GB of SDRAM for the 440GX. Minimum memory size is 8MB.
The System BIOS automatically detects memory type, size and speed.

The SBC uses industry standard 64-bit or 72-bit wide gold finger DIMM SDRAM
modules in two 168-pin DIMM sockets.
______________________________________________________________________

NOTE: Memory can be installed in one or both DIMM sockets. If only one DIMM
module is used, it must be populated in the top DIMM socket (Bank 1 - BK1). If two
modules are used, they must be the same DIMM type, but may be different sizes (see
table below). EDO DIMMs are not supported. All DIMMs must have gold contacts.
______________________________________________________________________

The SBC supports DIMM memory modules which are PC-100 compliant and have the
following features:

• 168-pin DIMMs with gold-plated contacts

• 100MHz SDRAM

• Non-ECC (64-bit) or ECC (72-bit) memory

• 3.3 volt

• Single or double-sided DIMMs in the sizes listed below

• Buffered or Registered configuration

The following DIMM sizes are supported:

DIMM

Size

8MB
16MB
32MB
64MB

128MB
256MB
512MB

* CGI models only

All memory components and DIMMs used with the SBC must be PC-100 compliant,
which means that they comply with Intel's PC SDRAM specifications. These include the
PC SDRAM Specification (memory component specific), the PC Unbuffered DIMM

DIMM Type Non-ECC ECC

Unbuffered
Unbuffered
Unbuffered
Unbuffered
Unbuffered
Registered
Registered

1M x 64
2M x 64
4M x 64

8M x 64
16M x 64
32M x 64

64M x 64

1M x 72
2M x 72
4M x 72

8M x 72
16M x 72
32M x 72

64M x 72 *

Chassis Plans1-8

SpecificationsCBI/CGI Technical Reference

Specification, the PC Registered DIMM Specification and the PC Serial Presence Detect
Specification.

M

EMORY HOLE The SBC supports a 1MB memory hole option at 512KB-640KB or 15MB-16MB.

RROR CHECKING

E

AND CORRECTION

PCI L

OCAL BUS

I

NTERFACE

The memory interface supports ECC modes via BIOS setting for multiple-bit error
detection and correction of all errors confined to a single nibble.

The SBC is fully compliant with the PCI Local Bus 2.1 Specification. It has optimized
the PCI interface to allow the processor to sustain the highest possible bandwidth
(greater than 100MB/sec sustained) and low latency of the PCI Bus. It supports PCI-to­PCI bridge technology, a pipelined snoop ahead feature and improved PCI to DRAM
write-back policy. The PCI Local Bus interfaces to standard PCI option cards in the
backplane, and to the on-board PCI Ultra Wide SCSI controller and PCI 10/100Base-T
Ethernet controller. The PCI Local Bus interface to the backplane is compliant with the
PCI Industrial Computer Manufacturers Group (PICMG) 1.0 Specification.

U

NIVERSAL SERIAL

B

US (USB)

The SBC supports two USB 1.0 ports for serial transfers at 12 or 1.5Mbit/sec. The
Universal Serial Bus (USB) is an interface allowing for connectivity to many standard
PC peripherals via an external port.

C

ONCURRENT PCI Concurrent PCI maximizes system performance with simultaneous processor, PCI and

AGP Bus activities. It includes multitransaction timing, enhanced write performance, a
passive release mechanism and support for PCI 2.1 compliant delayed transactions.

AGP VGA
I

NTERFACE (NOT

AVAILABLE ON

BASIC

MODELS)

The 69000 HiQVideo video/graphic accelerator is an Accelerated Graphics Port (AGP)
device. AGP is designed to off-load the PCI Bus by allowing graphics data to move
directly from system memory. The 69000 integrates 2MB of high-speed SDRAM frame
buffer memory into the chip.

By embedding SDRAM and graphics controller logic on the same die, the 69000 delivers
uncompromising performance. The increase in the frame buffer bandwidth enables the
69000 to support high-color, high-resolution graphics modes and real-time video acceler­ation. The interface supports pixel resolutions up to 1600 x 1200 non-interlaced.

Software drivers for enhanced performance and resolution are available for most popular
operating systems.

S

YSTEM

H

ARDWARE

The system hardware monitoring system monitors system voltages, temperature and fan
speeds.

MONITOR

The circuitry is based on National Semiconductor's LM80. The LM80 monitors seven
system voltages, two fan speeds and the board ambient temperature. All of the voltages,
fan speeds and temperature measurements have associated programmable watchdog
limits. When any of these programmed limits are exceeded, the monitor software can be
used to notify the SBC. In addition, the externally available OS# signal can be used to
notify external hardware of any over-temperature condition.

Fan speed monitoring can be configured to monitor two system fans.

Chassis Plans 1-9

Specifications CBI/CGI Technical Reference

The LM80 also monitors an external chassis intrusion switch via the system hardware
monitor connector (P18).

A general purpose output (GPO) is also provided at the system hardware monitor
connector. This signal can be used to provide a user-defined function.

The following system voltages are monitored by the LM80:

• -12 volts

• 3.3 volts provided by the on-board voltage regulator for components on the

SBC

• 3.3 volts backplane power used by the option slots

• +5 volts

• +12 volts

• VCC_CORE, voltage provided by on-board VRM

• 1.5 volt, VTT voltage used by processor's GTL+ bus

10/100B
E

THERNET

I

NTERFACE (NOT

AVAILABLE ON

BASIC

PCI U
SCSI I

ASE-T

MODELS)

LTRA WIDE

NTERFACE

(NOT AVAILABLE

ON BASIC
MODELS)

The PCI Ethernet interface is implemented using an Intel 82559 and operates in
10Base-T and 100Base-TX Fast Ethernet modes. The interface is compliant with
IEEE 802.3 and PCI Local Bus 2.1 Specifications.

The main components of the interface are:

• Intel 82559 for 10/100-Mb/s media access control (MAC) with SYM, a

serial ROM port and a PCI Bus Master interface

• Serial ROM for storing the Ethernet address and the interface configuration

and control data

• Integrated RJ-45/Magnetics module connector on the SBC's I/O bracket for

direct connection to the network. The connector requires a category 5
(CAT5) unshielded twisted-pair (UTP) 2-pair cable for a 100-Mb/s network
connection or a category 3 (CAT3) or higher UTP 2-pair cable for a 10-Mb/s
network connection.

• Link status and activity LEDs on the I/O bracket for status indication (See

Ethernet LEDs and Connector later in this section.)

Software drivers are supplied for most popular operating systems.

The SCSI interface is a PCI Bus Master device which supports Ultra Wide SCSI data
transfer up to 40MB per second and bursts data to the host at full PCI speeds. Active
termination is provided with terminator voltage protected by self-resetting fuses. A
jumper is provided to disable the termination. The SCSI controller is an Adaptec
AIC-7880. Software drivers are available for most popular operating systems.

The Adaptec SCSISelect Configuration Utility allows you to view and/or change the
default configuration settings for the Ultra Wide SCSI adapter. This utility is described
in Appendix C - SCSISelect Configuration Utility.

Chassis Plans1-10

SpecificationsCBI/CGI Technical Reference

PCI ENHANCED
IDE U

LTRA

DMA/33
I

NTERFACE (DUAL)

F

LOPPY DRIVE

I

NTERFACE

ERIAL INTERFACE Two high-speed FIFO (16C550) serial ports with independently programmable baud

S

Dual high performance PCI Bus Master EIDE interfaces are capable of supporting two
IDE Type 4 disk drives each in a master/slave configuration. The interface supports
Ultra DMA/33 with synchronous DMA mode transfers up to 33MB per second.

The SBC supports two floppy disk drives. Drives can be 360K to 2.88MB, in any
combination.

rates are supported. The IRQ for each serial port has BIOS selectable addressing.

E

NHANCED

P

ARALLEL

I

NTERFACE

PS/2 M
I

NTERFACE

OUSE

The SBC provides a PC/AT compatible bidirectional parallel port and supports enhanced
parallel port (EPP) mode and extended capabilities port (ECP) mode. The ECP mode is
IEEE 1284 compliant. The IRQ for the parallel port has BIOS selectable addressing.

The SBC is compatible with a PS/2-type mouse. The mouse connection can be made by
using either the PS/2 mouse header or the bracket mounted PS/2 mouse mini DIN
connector. Mouse voltage is protected by a self-resetting fuse.

K

EYBOARD

I

NTERFACE

The SBC is compatible with an AT-type keyboard. The keyboard connection can be
made by using either the keyboard header or the bracket mounted keyboard mini DIN
connector. Keyboard voltage is protected by a self-resetting fuse.

W

ATCHDOG TIMER The watchdog timer is a hardware timer which resets the SBC if the timer is not

refreshed by software periodically. The timer is typically used to restart a system in
which an application becomes hung on an external event. When the application is hung,
it no longer refreshes the timer. The watchdog timer then times out and resets the SBC.

P

OWER FAIL

DETECTION

The watchdog timer has two levels of enable. First, the watchdog timer jumper must be
moved to the "enabled" position, which puts the watchdog timer under software control.

The second level involves software control of the watchdog's timer retriggering. Bit 6 of
the 82371EB GPOREG register at I/O address 437H must be set to a zero (0), which
blocks the triggering clock to the watchdog timer circuit, thus scheduling a hardware
reset in about 1.5 seconds.

To refresh the watchdog timer, the software in the application toggles bit 6 of the
GPOREG register. First the bit must be set to a one (1) to clear the watchdog timer
delay; then it must be set to a zero (0), which schedules a system reset in 1.5 seconds.
Toggling bit 6 of the GPOREG must occur within a period of less than 1.5 seconds to
insure that a system reset is not issued.

A set of watchdog timer software code and sample programs are available from
Technical Support.

A hardware reset is issued when on-board +5V voltage drops below 4.75 volts. In
addition, if the 3.3V Monitor jumper (JU15) is enabled, a reset is issued if 3.3V is below
tolerance. (See the Configuration Jumpers section later in this chapter.)

Chassis Plans 1-11

Specifications CBI/CGI Technical Reference

BATTERY A built-in lithium battery is provided, for ten years of data retention for CMOS memory.

______________________________________________________________________

CAUTION: There is a danger of explosion if the battery is incorrectly replaced.
Replace it only with the same or equivalent type recommended by the manufacturer.
Dispose of used batteries according to the manufacturer's instructions.
______________________________________________________________________

P

OWER

R

EQUIREMENTS

The following are typical values:

Processor

Speed

+5V * +12V -12V

Intel® Pentium® III -100MHz FSB:

T

EMPERATURE/

E

NVIRONMENT

850MHz
800MHz

®

Intel

733MHz
667MHz
633MHz

Operating Temperature: 0º C. to 60º C.

Storage Temperature: - 40

7.6 Amps

7.1 Amps

< 100 mAmps
< 100 mAmps

Celeron® - 66MHz FSB:

6.5 Amps

6.1 Amps

5.6 Amps

< 100 mAmps
< 100 mAmps
< 100 mAmps

0

º C. to 55º C. for 700MHz Intel

º C. to 70º C.

Humidity: 5% to 90% non-condensing

M

EAN TIME

B

ETWEEN

F

AILURES (MTBF)

CBI/CGI:

66,000 POH (Power-On Hours) at 40° C., per MIL-HDBK-217F

CB BASIC:

95,000 POH (Power-On Hours) at 40° C., per MIL-HDBK-217F

UL R

ECOGNITION This SBC is a UL recognized product listed in file #E208896.

< 100 mAmps
< 100 mAmps

< 100 mAmps
< 100 mAmps
< 100 mAmps

®

Pentium® III and above

This board was investigated and determined to be in compliance under the Bi-National
Standard for Information Technology Equipment. This included the Electrical Business
Equipment, UL 1950, Third Edition, and CAN/CSA C22.22 No. 950-95.

Chassis Plans1-12

SpecificationsCBI/CGI Technical Reference

CONFIGURATION
J

UMPERS

The setup of the configuration jumpers on the SBC is described below. * indicates the
default value of each jumper.
______________________________________________________________________

NOTE: For two-position jumpers (3-post), "RIGHT" is toward the bracket end of the
board; "LEFT" is toward the memory sockets.
______________________________________________________________________

Jumper

JU7 Combo I/O (P5A) Speaker Connect

JU8 Password Clear

JU9 CRT Type Select

Description

(Also refer to JU18 - Combo I/O Reset Connect.)

Install to connect speaker data signal to pin 8 of the Combo
I/O connector (P5A). *
Remove to disconnect.

Install for one power-up cycle to reset the password to the
default (null password).
Remove for normal operation. *

Install on the LEFT for a monochrome CRT.
Install on the RIGHT for a color CRT. *

JU10/JU11 System Flash ROM Operational Modes

The Flash ROM has two programmable sections: the Boot
Block for “flashing” in the BIOS and the Main Block for the
executable BIOS and PnP parameters. Normally only the
Main Block is updated when a new BIOS is flashed into the
system.

JU10

Program All (Boot and Main) Bottom Bottom
Normal PnP (Program Main Block) Bottom * Top *
Write Protect Top Top

JU12 CMOS Clear

Install to clear.
Remove to operate. *
__________________________________________________
NOTE: The CMOS Clear jumper works on power-up. To
clear the CMOS, power down the system, install the jumper,
then turn the power back on. CMOS is cleared during the
POST routines. Then power down the system again and
remove the jumper before the next power-up.
__________________________________________________

JU11

Chassis Plans 1-13

Specifications CBI/CGI Technical Reference

CONFIGURATION
J

UMPERS

(

CONTINUED)

Jumper

Description

JU13 SCSI Termination Enable (not available on BASIC models)

Install to disable on-board active termination for the SCSI
interface.
Remove to enable active termination. *

JU14 Fan Speed Monitor

This jumper must be removed (disabled).

JU15 3.3V Monitor Enable

Install to enable the 3.3V monitor.
Remove to disable the monitor. *

NOTE: On SBCs with revision L-07 and later, the position of
this jumper is horizontal; on earlier revisions it is vertical.
__________________________________________________

NOTE: JU15 enables the 3.3 volt monitor, which monitors
the 3.3V power plane of the backplane. This voltage is routed
to the SBC via the PICMG connector. The monitor generates
a RESET to the SBC if 3.3V is below tolerance. If your
system does not supply 3.3V to the backplane, this jumper
must be removed (disabled).
__________________________________________________

JU16 Watchdog Timer

Install on the LEFT for normal reset operation. *
Install on the RIGHT to enable watchdog timer operation.

JU18 Combo I/O (P5A) Reset Connect

(Also refer to JU7 - Combo I/O Speaker Connect.)

Install to connect reset data signal to pin 1 of the Combo I/O
connector (P5A). *
Remove to disconnect.

JU19 SCSI Activity LED Enable (not available on BASIC models)

Install to light the hard drive LED for SCSI drive activity. *
Remove if you do not have a SCSI drive (i.e., the SCSI
controller is not being used).

Chassis Plans1-14

SpecificationsCBI/CGI Technical Reference

ETHERNET LEDS

AND CONNECTOR

(

NOT AVAILABLE
ON BASIC
MODELS)

The Ethernet interface has two LEDs for status indication and an RJ-45 network
connector.

LED/Connector

Description

Link/Activity LED Green LED which indicates the link status

Off The Ethernet interface did not find a valid link on the

network connection. Transmit and receive are not
possible.

On (solid) The Ethernet interface has a valid link on the network

connection and is ready for normal operation. The Speed
LED identifies connection speed.

On (flashing) Indicates network transmit or receive activity.

Speed LED Amber LED which identifies the connection speed.

Off Indicates a 10Mb/s connection.

On Indicates a 100Mb/s connection.

RJ-45 Network
Connector

The RJ-45 network connector requires a category 5
(CAT5) unshielded twisted-pair (UTP) 2-pair cable for a
100-Mb/s network connection or a category 3 (CAT3) or
higher UTP 2-pair cable for a 10-Mb/s network
connection.

S

YSTEM BIOS

S

ETUP UTILITY

The System BIOS is a Hi-Flex AMIBIOS with a ROM-resident setup utility. The BIOS
Setup Utility allows you to select the following options:

• Standard CMOS Setup

• Advanced CMOS Setup

• Advanced Chipset Setup

• Power Management Setup

• PCI/Plug and Play Setup

• Peripheral Setup

• Auto-Detect Hard Disks

• Change User Password/Change Supervisor Password

• Auto Configuration with Optimal Settings

• Auto Configuration with Fail Safe Settings

• Save Settings and Exit

• Exit Without Saving

Chassis Plans 1-15

Specifications CBI/CGI Technical Reference

CONNECTORS ______________________________________________________________________

NOTE: Pin 1 on the connectors is indicated by the square pad on the PCB.
______________________________________________________________________

P2 - Keylock Connector

5 pin single row header, Amp #640456-5

Pin

Signal

1

LED Power

2

Key

3

Gnd

4

Keylock Data

5

Gnd

P3 - Floppy Drive Connector

34 pin dual row header, Robinson Nugent #IDH-34LP-S3-TR

Signal

Pin

1

Gnd

3

Gnd

5

Gnd

7

Gnd

9

Gnd

11

Gnd

13

Gnd

15

Gnd

17

Gnd

19

Gnd

21

Gnd

23

Gnd

25

Gnd

27

Gnd

29

Gnd

31

Gnd

33

Gnd

P4 - Keyboard Connector

6 pin mini DIN, Kycon #KMDG-6S-BS-PS

Pin

Signal

1

Kbd Data

2

Reserved

3

Gnd

4

Kbd Power (+5V fused) with self-resetting fuse

5

Kbd Clock

6

Reserved

Pin

2
4
6

8
10
12
14
16
18
20
22
24
26
28
30
32
34

Signal
N-RPM
NC
D-Rate0
P-Index
N-Motoron 1
N-Drive Sel2
N-Drive Sel1
N-Motoron 2
N-Dir
N-Stop Step
N-Write Data
N-Write Gate
P-Track 0
P-Write Protect
N-Read Data
N-Side Select
Disk Chng

Chassis Plans1-16

CONNECTORS
(

CONTINUED)

P4A - Keyboard Header

5 pin single row header, Amp #640456-5

Pin

Signal

1

Kbd Clock

2

Kbd Data

3

Key

4

Kbd Gnd

5

Kbd Power (+5V fused) with self-resetting fuse

P5 - Speaker Port Connector

4 pin single row header, Amp #640456-4

Signal

Pin

1

Speaker Data

2

Key

3

Gnd

4

+5V

P5A - Combo I/O Connector

8 pin single row header, Amp #640456-8

SpecificationsCBI/CGI Technical Reference

Signal

Pin

1

Reset (See JU18 in the Configuration Jumpers section.)

2

Gnd

3

NC

4

Kbd Clock

5

Kbd Data

6

Kbd Lock Data

7

Kbd Power (+5V fused) with self-resetting fuse

8

Speaker Data

P6 - Serial Port 1 Connector

10 pin dual row header, 3M #30310-6002HB

Pin

Signal

1

Carrier Detect

3

Receive Data-I

5

Transmit Data-O

7

Data Terminal Ready-O

9

Signal Gnd

P7 - Serial Port 2 Connector

10 pin dual row header, 3M #30310-6002HB

Pin

Signal

1

Carrier Detect

3

Receive Data-I

5

Transmit Data-O

Pin

Signal

2

Data Set Ready-I

4

Request to Send-O

6

Clear to Send-I

8

Ring Indicator-I

10

NC

Pin

Signal

2

Data Set Ready-I

4

Request to Send-O

6

Clear to Send-I

Chassis Plans 1-17

Specifications CBI/CGI Technical Reference

CONNECTORS
(

CONTINUED)

P7 - Serial Port 2 Connector (continued)

Signal

Pin

7

Data Terminal Ready-O

9

Signal Gnd

P8 - Parallel Port Connector

26 pin dual row header, 3M #30326-6002HB

Signal

Pin

1

Strobe

3

Data Bit 0

5

Data Bit 1

7

Data Bit 2

9

Data Bit 3

11

Data Bit 4

13

Data Bit 5

15

Data Bit 6

17

Data Bit 7

19

ACK

21

Busy

23

Paper End

25

Slct

P9 - PS/2 Mouse Connector

6 pin mini DIN, Kycon #KMDG-6S-BS-PS

Pin

Signal

8

Ring Indicator-I

10

NC

Pin

Signal

2

Auto Feed XT

4

Error

6

Init

8

Slct In

10

Gnd

12

Gnd

14

Gnd

16

Gnd

18

Gnd

20

Gnd

22

Gnd

24

Gnd

26

NC

Pin

Signal

1

Ms Data

2

Reserved

3

Gnd

4

Kbd Power (+5V fused) with self-resetting fuse

5

Ms Clock

6

Reserved

P9A - PS/2 Mouse Header

6 pin single row header, Amp #640456-6

Pin

Signal

1

Ms Data

2

Reserved

3

Kbd Gnd

4

Kbd Power (+5V fused) with self-resetting fuse

5

Ms Clock

6

Reserved

Chassis Plans1-18

CONNECTORS
(

CONTINUED)

P10 - External Reset Connector

2 pin header, Amp #640456-2

Pin

Signal

1

Negative External Reset

2

Gnd

P11 - Primary IDE Hard Drive Connector

40 pin dual row header, Robinson Nugent #IDH-40LP-S3-TR

SpecificationsCBI/CGI Technical Reference

Signal

Pin

1

Reset

3

Data 7

5

Data 6

7

Data 5

9

Data 4

11

Data 3

13

Data 2

15

Data 1

17

Data 0

19

Gnd

21

DRQ 0

23

IOW

25

IOR

27

IORDY

29

DACK 0

31

IRQ 14

33

Add 1

35

Add 0

37

CS 1P

39

IDEACTP

P11A - Secondary IDE Hard Drive Connector

40 pin dual row header, Robinson Nugent #IDH-40LP-S3-TR

Pin

2

4

6

8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

Signal
Gnd
Data 8
Data 9
Data 10
Data 11
Data 12
Data 13
Data 14
Data 15
NC
Gnd
Gnd
Gnd
+5V
Gnd
IOCS16
Gnd
Add 2
CS 3P
Gnd

Pin
1
3
5
7
9
11
13
15
17
19
21
23
25
27

Signal
Reset
Data 7
Data 6
Data 5
Data 4
Data 3
Data 2
Data 1
Data 0
Gnd
DRQ 1
IOW
IOR
IORDY

Pin
2
4
6
8
10
12
14
16
18
20
22
24
26
28

Signal
Gnd
Data 8
Data 9
Data 10
Data 11
Data 12
Data 13
Data 14
Data 15
NC
Gnd
Gnd
Gnd
+5V

Chassis Plans 1-19

Specifications CBI/CGI Technical Reference

CONNECTORS
(

CONTINUED)

P11A - Primary IDE Hard Drive Connector (continued)

Signal

Pin
29

DACK 1

31

MIRQ 0

33

Add 1

35

Add 0

37

CS 1S

39

IDEACTS

P12 - Hard Drive LED Connector

4 pin single row header, Amp #640456-4

(This connector is used for both IDE and SCSI drives. See
JU19 in the Configuration Jumpers section.)

Pin

Signal

1

+5V Pull-up

2

Light

3

Light

4

+5V Pull-up

P13 - PCI Ultra Wide SCSI Controller Connector

(not available on BASIC models)
50/68 pin high density connector, Amp #749069-7

Signal

Pin

1

Gnd

2

Gnd

3

Gnd

4

Gnd

5

Gnd

6

Gnd

7

Gnd

8

Gnd

9

Gnd

10

Gnd

11

Gnd

12

Gnd

13

Gnd

14

Gnd

15

Gnd

16

Gnd

17

TERMPWR

18

TERMPWR

19

NC

20

Gnd

21

Gnd

22

Gnd

Pin
30
32
34
36
38
40

Pin
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56

Signal
Gnd
IOCS16
Gnd
Add 2
CS 3S
Gnd

Signal
SCZDB12
SCZDB13
SCZDB14
SCZDB15
SCZDBPH
SCZDB0
SCZDB1
SCZDB2
SCZDB3
SCZDB4
SCZDB5
SCZDB6
SCZDB7
SCZDBP
Gnd
Gnd
TERMPWR
TERMPWR
NC
Gnd
SCZATN
Gnd

Chassis Plans1-20