Enterprise Platforms and Services Division – Marketing
Revision 1.9
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Intel order number: D31979-010
Intel® Server Board S5000PAL / S5000XAL TPS Revision History
Revision History
April 2006 1.0 First external release.
June 2006 1.1 Updated theoretical memory bandwidth performance numbers.
August 2006 1.2 Memory RAS is now available.
January 2007 1.3 Updated Table 44 BMC sensor.
May 2007 1.4 Removed platform control information that can be found in the Intel® S5000
August 2007 1.5 Updated processor support section.
October 2007 1.6 Updated Table 44 BMC sensor.
February 2008 1.7 Updated Processor support section
November 2008 1.8 Updated Internal USB Connector Pin-out
March 2009 1.9 Update the BIOS Select Jumper section.
Revision
Number
Modifications
Added Platform Control sections.
Updated Snoop Filter Section.
Updated Figures #16 and #25.
Updated CMOS clear and password reset usage procedures.
Updated regulatory tables.
Server Board Family Datasheet.
Revision 1.9
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Intel order number: D31979-010
Disclaimers Intel® Server Board S5000PAL / S5000XAL TPS
Disclaimers
Information in this document is provided in connection with Intel® products. No license, express or implied,
by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as
provided in Intel's Terms and Conditions of Sale for such products, Intel assumes no liability whatsoever,
and Intel disclaims any express or implied warranty, relating to sale and/or use of Intel products including
liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any
patent, copyright or other intellectual property right. Intel products are not intended for use in medical, life
saving, or life sustaining applications. Intel may make changes to specifications and product descriptions
at any time, without notice.
Designers must not rely on the absence or characteristics of any features or instructions marked
"reserved" or "undefined." Intel reserves these for future definition and shall have no responsibility
whatsoever for conflicts or incompatibilities arising from future changes to them.
The Intel® Server Board S5000PAL and the Intel
or errors known as errata which may cause the product to deviate from published specifications. Current
characterized errata are available on request.
Intel Corporation server baseboards support peripheral components and contain a number of highdensity VLSI and power delivery components that need adequate airflow to cool. Intel’s own chassis are
designed and tested to meet the intended thermal requirements of these components when the fully
integrated system is used together. It is the responsibility of the system integrator that chooses not to use
Intel developed server building blocks to consult vendor datasheets and operating parameters to
determine the amount of air flow required for their specific application and environmental conditions. Intel
Corporation can not be held responsible if components fail or the server board does not operate correctly
when used outside any of their published operating or non-operating limits.
Intel, Pentium, Itanium, and Xeon are trademarks or registered trademarks of Intel Corporation.
*Other brands and names may be claimed as the property of others.
Intel® Server Board S5000PAL / S5000XAL TPS List of Tables
< This page intentionally left blank. >
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Introduction Intel® Server Board S5000PAL / S5000XAL TPS
1. Introduction
This Technical Product Specification (TPS) provides board specific information detailing the features,
functionality, and high level architecture of the Intel® Server Board S5000PAL and Intel
S5000XAL. The Intel
for more in depth detail of various board sub-systems including chipset, BIOS, System Management, and
System Management software.
In addition, design level information for specific sub-systems can be obtained by ordering the External
Product Specifications (EPS) or External Design Specifications (EDS) for a given sub-system. EPS and
EDS documents are not publicly available. They are only made available under NDA with Intel and must
be ordered through your local Intel representative.
The Intel® Server Board S5000PAL/XAL may contain design defects or errors known as errata which
may cause the product to deviate from published specifications. Refer to the Intel® Server Board S5000PAL/XAL Specification Update for published errata.
®
S5000 Series Chipsets Server Board Family Datasheet should also be referenced
®
Server Board
1.1 Chapter Outline
This document is divided into the following chapters
• Chapter 1 – Introduction
• Chapter 2 – Server Board Overview
• Chapter 3 – Functional Architecture
• Chapter 4 – Platform Management
• Chapter 5 – Connector & Header Location and Pin-out
• Chapter 6 – Configuration Jumpers
• Chapter 7 – Light Guided Diagnostics
• Chapter 8 – Power and Environmental Specifications
• Chapter 9 – Regulatory and Certification Information
• Appendix A – Integration and Usage Tips
• Appendix B – BMC Sensor Tables
• Appendix C – POST Code Diagnostic LED Decoder
• Appendix D – Post Code Errors
• Appendix E – Supported Intel
®
Server Chassis
1.2 Server Board Use Disclaimer
Intel Corporation server boards support add-in peripherals and contain a number of high-density VLSI
and power delivery components that need adequate airflow to cool. Intel ensures through its own chassis
development and testing that when Intel server building blocks are used together, the fully integrated
system will meet the intended thermal requirements of these components. It is the responsibility of the
system integrator who chooses not to use Intel developed server building blocks to consult vendor
datasheets and operating parameters to determine the amount of air flow required for their specific
application and environmental conditions. Intel Corporation cannot be held responsible if components fail
or the server board does not operate correctly when used outside any of their published operating or nonoperating limits.
Revision 1.9
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Intel® Server Board S5000PAL / S5000XAL TPS Product Overview
2. Product Overview
The Intel® Server Board S5000PAL and Intel® Server Board S5000XAL are monolithic printed circuit
boards with features that were designed to support the high-density 1U and 2U server markets.
2.1 Intel® Server Board S5000PAL / S5000XAL Feature Set
Chipset Intel® 5000 Chipset Family which includes the following components:
On-board
Connectors/Headers
Add-in PCI, PCI-X*, PCI
Express* Cards
On-board Video ATI* ES1000 video controller with 16MB DDR SDRAM
On-board Hard Drive
Controller
LAN Two 10/100/1000 Intel® 82563EB PHYs supporting Intel® I/O Acceleration Technology
System Fans Six 4-pin Fan Headers supporting two processor fans, and four system fans
System Management Support for Intel® System Management Software
with system bus speeds of 667 MHz, 1066 MHz, or 1333 MHz
DDR2-533 and DDR2-677 FBDIMMs must be used.
®
5000P Memory Controller Hub or Intel® 5000X Memory Controller Hub
Intel
®
Intel
6321ESB I/O Controller Hub1
Note: Intel will only make available an OEM SKU of this server board using the Intel
Memory Controller Hub.
External connections:
Stacked PS/2* ports for keyboard and mouse
RJ45 Serial B port
Two RJ45 NIC connectors for 10/100/1000 Mb connections
Two USB 2.0 ports
Video Connector
Internal connectors/headers:
One USB port header, capable of providing two USB 2.0 ports
One DH10 Serial A header
Six SATA ports via the ESB-2 and integrated SW RAID 0/1/10 support
One 44pin (power + I/O) ATA/100 connector for optical drive support
One Intel
optional)
One Intel
SSI-compliant 24-pin control panel header
SSI-compliant 24-pin main power connector, supporting the ATX-12V standard on the first
20 pins
8-Pin +12V Processor Power Connector
®
Remote Management Module (Intel® RMM) connector (Intel® RMM use is
®
I/O Expansion Module Connector supporting:
Dual GB NIC Intel
External SAS Intel
Infiniband* I/O Expansion Module (Optional)
®
I/O Expansion Module (Optional)
®
I/O Expansion Module (Optional)
®
5000X
One low profile riser slot supporting 1U or 2U PCIe* riser cards
One full height riser slot supporting 1U or 2U PCI-X* and PCIe* riser cards
Six ESB-2 SATA ports.
Intel
Optional support for SW RAID 5 with activation key.2
®
Embedded Server RAID Technology II with SW RAID levels 0/1/10.
1
For the remainder of this document, the Intel® 6321ESB I/O Controller Hub will be refferred to as ESB-2.
2
Onboard SATA SW RAID 5 support provided as a post-launch product feature.
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Product Overvi ew Intel® Server Board S5000PAL / S5000XAL TPS
2.2 Server Board Layout
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Intel® Server Board S5000PAL / S5000XAL TPS Product Overview
2.2.1 Connector and Component Locations
The following figure shows the board layout of the server board. Each connector and major component is
identified by a number or letter, and a description is given below the figure.
QQ
PP
OO
NN
LL
KK
JJ
HH
GG
FF
EE
DD
CC
BB
AA
II
Z
MM
B
A
C
F
ED
I
G
H
J
K
L
M
N
O
P
Q
Y
X
W
V UST
R
TP02071
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Product Overvi ew Intel® Server Board S5000PAL / S5000XAL TPS
Description Description
A BIOS Bank Select Jumper V System Fan #2 Header
B Intel® ESB-2 IO Controller Hub W CPU Power Connector
C IO Module Option Connector X Main Power Connector
D POST Code Diagnostic LEDs Y Battery
E Intel® Adaptive Slot – Full Height Z Power Supply Management Connector
F PCI Express* Riser Slot – Low Profile AA Dual Port USB 2.0 Header
G System Identification LED - Blue BB System Fan #1 Header
H External IO Connectors CCSSI 24-pin Control Panel Header
I Status LED – Green / Amber DDSATA 0
J Serial ‘B’ Port Configuration Jumper EE SATA 1
K System Fan #4 Header FF SATA 2
L System Fan #3 Header GGSATA 3
M FBDIMM Slots HHSATA 4
N Intel® 5000P Memory Controller Hub (MCH) or
O CPU #1 Connector JJ SATA SW RAID 5 Activation Key Connector
P CPU #2 Connector KK Intel® Remote Management Module (RMM)
Q CPU #1 Fan Header LL System Recovery Jumper Block
R Voltage Regulator Heat Sink MMChassis Intrusion Switch Header
S CPU #2 Fan Header NN3-pin IPMB Header
T Bridge Board Connector OOIntel® Local Control Panel Header
U ATA-100 Optical Drive Connector (Power+IO) PP Serial ‘A’ Header
QQIntel® RMM NIC Connector
®
5000X Memory Controller Hub (MCH)
Intel
II SATA 5
Connector
Figure 1. Components & Connector Location Diagram
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Intel® Server Board S5000PAL / S5000XAL TPS Product Overview
2.2.2 Light Guided Diagnostic LED Locations
A
B
C
D
LIJKNOMP
S
G
Q
E
R
F
TP02317
Description Description
A Post Code Diagnostic LEDs ECPU Fault LED
B System Identification LED – Blue FCPU Fault LED
C System Status LED – Green / AmberG5-Volt Stand-by Present
LED
D DIMM Fault LEDs
Figure 2. Light Guided Diagnostic LED Location Diagram
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Product Overvi ew Intel® Server Board S5000PAL / S5000XAL TPS
2.2.3 External I/O Connector Locations
The drawing below shows the layout of the rear I/O components for the server board.
Intel® Server Board S5000PAL / S5000XAL TPS Product Overview
2.2.4 Server Board Mechanical Drawings
2 x 0.00 [0.000]
11.02 [0.434]
11.91 [0.469]
16.76 [0.660]
33.91 [1.335]
10.16 [0.400]
2 x 0.00 [0.000]
0.91 [0.036]
15.24 [0.600]
21.59 [0.850]
Lotes B2515BB2M
6012A0019603
45.59 [1.795]
2 x 49.35 [1.943]
62.66 [2.467]
67.31 [2.650]
Molex 22-44-7031
6012A0099701-HDR4P
Molex 22-44-7031
6012A0099701
9 x Ø 0.125 [3.18] Typ.
124.26 [4.892]
127.43 [5.017]
152.40 [6.000]
6 x Betterment
BTM-PP02.2F1611.007X
6012B0018302
227.33 [8.950]
228.60 [9.000]
Lotes B2515BB2M
6012A0019603
16.51 [0.650]
[0.129]
2 x 3.28
44.89 [1.767]
AMP 177983-5
6012A0103201
FCI 10027747-114101
0.16 [0.006]
6012A0105001
55.35
[2.179]
82.80 [3.260]
2 x 86.89 [3.421]
2 x 124.46 [4.900]
118.11 [4.650]
Molex 877715-3205
6012A0100101
Lotes AAA-PCI-033-K02
6012B0051002
196.85 [7.750]
5 x Ø 8.00 [0.315]
Silkscreen on secondary
side for spacer
Molex 43202-8927
288.29 [11.350]
6026A0027801
22.86 [0.900]
7 x Ø 3.96 [0.156]
2 x 101.60 [4.000]
4 x 187.93 [7.399]
81.28
[3.200] Typ.
Lotes B4L60BB2L
6012A0105401
3 x 312.42 [12.300]
320.04 [12.600]
5.08 [0.200]
9.65 [0.380]
AMP 794108-1
6012A0022801
6012A0022801
2 x 59.69 [2.350]
Molex 3930-0080
[1.500] Typ.
124.46 [4.900]
2 x 141.25 [5.561]
38.10
2 x 223.80 [8.811]
8 x Ø 10.16 [0.400]
2 x 281.94 [11.100]
Figure 4. Intel® Server Board S5000PAL / S5000XAL – Hole and Component Positions (1 of 2)
TP02316
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Product Overvi ew Intel® Server Board S5000PAL / S5000XAL TPS
10.16 [0.400]
5 x 6.99 [0.275]
0.00 [0.000]
3.45 [0.136]
2 x 1.83 [0.072]
11.96 [0.471]
19.76 [0.778]
30.91 [1.217]
35.05 [1.380]
49.68 [1.956]
62.99 [2.480]
67.39 [2.653]
76.45 [3.010]
86.11 [3.390]
119.16 [4.692]
119.59 [4.708]
143.00 [5.630]
160.77 [6.330]
174.17 [6.857]
178.56 [7.030]
196.33 [7.730]
211.02 [8.308]
214.12 [8.430]
214.63 [8.450]
230.38 [9.070]
231.89 [9.130]
243.83 [9.600]
265.41 [10.449]
16.51 [0.650]
1st Pin
3 x 13.59 [0.535]
0.00 [0.000]
2 x 12.33 [0.485]
12.27 [0.483]
9.07 [0.357]
9.32 [0.367]
5.21 [0.205]
1st Pin
56.84 [2.238]
80.14 [3.155]
1st Pin
87.88 [3.460]
94.23 [3.710]
100.58 [3.960]
127.20 [5.008]
106.93 [4.210]
104.39 [4.110]
158.80 [6.252]
141.78 [5.582]
175.03 [6.891]
200.13 [7.879]
224.21 [8.827]
205.97 [8.109]
244.27 [9.617]
263.14 [10.360]
278.38 [10.960]
280.71 [11.052]
6.27 [0.247]
2.67 [0.105]
3.35 [0.132]
8.64 [0.340]
35.28 [1.389]
8 x 40.39 [1.590]
7 x 10.67 [0.420]
297.84 [11.726]
308.74 [12.155]
12.66 [0.498]
2 x 11.93 [0.470]
6 x 12.83 [0.505]
52.98 [2.086]
74.78 [2.944]
76.96 [3.030]
83.31 [3.280]
96.25 [3.789]
104.39 [4.110]
298.51 [11.752]
309.042 [12.167]
R1.52 [0.060]
280.21 [11.032]
TP02292
Figure 5. Intel® Server Board S5000PAL / S5000XAL – Hole and Component Positions (2 of 2)
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Intel® Server Board S5000PAL / S5000XAL TPS Product Overview
No Components Allowed
for Retention Pins
H < 3.5 mm [0.138"]
for Three Boards
9 x No Components 5.0 dia. on Top
No Components 3.5 dia. on Bottom
H < 12.4 mm [0.488"]
Under Riser PCIe Conn.
H < 26 mm [1.023"]
Under Riser PCI-X Conn.
H < 11.8 mm [0.465"]
Under Riser Card
H < 15.2 mm [0.600"]
Under FH PCI Option Card
2 x 5.08 [0.200]
10.16 [0.400]
3 x 5.08 [0.200]
0.00 [0.000]
2 x 3.07 [0.121]
21.23 [0.836]
28.17 [1.109]
41.96 [1.652]
53.34 [2.100]
60.15 [2.368]
130.00 [5.118]
169.98 [6.692]
177.47 [6.987]
180.92 [7.123]
188.72 [7.430]
234.75 [9.242]
264.97 [10.432]
13.18 [0.519]
9.27 [0.365]
16.51 [0.650]
0.00 [0.000]
0.76 [0.030]
3.28 [0.129]
H < 30 mm [1.181"]
PCI BKT Drop Down
96.98 [3.818]
98.88 [3.893]
101.90 [4.012]
57.89 [2.279]
109.40 [4.307]
120.85 [4.758]
125.27 [4.932]
129.69 [5.106]
134.62 [5.300]
137.72 [5.422]
H < 11.65 mm [0.459"]
Under Rear Panel Tab
198.02 [7.796]
207.98 [8.188]
267.51 [10.532]
288.29 [11.350]
3.81 [0.150]
H < 5 mm [0.196"]
PCI BKT Drop Down
H < 12.7 mm [0.499"]
Under LP PCI Option Card
0.18 [0.007]
10.80 [0.425]
18.97 [0.747]
46.76 [1.841]
102.77 [4.046]
H < 10mm [0.394"]
PCI BKT DROP DOWN
170.64 [6.718]
184.12 [7.249]
H < 3mm [0.118"]
PCI BKT DROP DOWN
273.02 [10.749]
316.00 [12.441]
320.04 [12.600]
H < 9.5 mm [0.374"]
Under Bridge Board
9.70 [0.382]
89.36 [3.518]
94.41 [3.717]
96.57 [3.802]
4 x 7.62 [0.300]
111.84 [4.403]
120.93 [4.761]
203.48 [8.011]
199.67 [7.861]
REF ONLY
H < 11 mm [0.433"]
Under Heat Sink
282.22 [11.111]
REF ONLY
H < 7 mm [0.275"]
Under Heat Sink
TP02293
Figure 6. Intel® Server Board S5000PAL / S5000XAL – Restricted Areas on Side 1
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Product Overvi ew Intel® Server Board S5000PAL / S5000XAL TPS
10.16 [0.400]
0.00 [0.000]
10.13 [0.399]
H < 2 mm
[0.078]
15.24 [0.600] Typ.
Ø 2.000 [50.8 mm] Typ.
5.08 [0.200] Typ.
20.32 [0.800] Typ.
Limited Height 1.27 mm
[0.05"] on Side 2
320.04 [12.600]
3 Ground Pad
on Side 2
0.00 [0.000]
16.51 [0.650]
2 X 5.00 [0.197]
3 X 3.99 [0.157]
3.00 [0.118]
H < 1.47 mm [0.058"] Typ.
No Components or
Surface Layer Traces
in this Zone.
288.29 [11.350]
Ø 29.46 [1.160] Typ.
Backside Spring Area.
No Motherboard Component
Placement Allowed.
180.34 [7.100]
200.03 [7.875]
0.200" [5.08 mm Max] Keep IN
for 2U and above Platforms.
0.100" [2.54 mm Max] Keep IN
for 1U Platforms on Side 2.
257.73 [10.147]
4 x 4.45 [0.175]
276.86 [10.900]
Limited Height 1.27 mm [0.05"]
on Side 2, Dia. 29.5 mm [1.160"]
7.52 [0.296]
123.47 [4.861]
136.14 [5.360]
184.40 [7.260]
218.72 [8.611]
205.99 [8.110]
197.10 [7.760]
279.68 [11.011]
266.95 [10.510]
TP02294
Figure 7. Intel® Server Board S5000PAL / S5000XAL – Restricted Areas on Side 2
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Intel® Server Board S5000PAL / S5000XAL TPS Product Overview
0.00 [0.000]
16.51 [0.650]
10.16 [0.400]
0.00 [0.000]
113.13 [4.454]
199.21 [7.843]
285.75 [11.250]
NO Components Allowed
for Duct
143.51 [5.650]
182.83 [7.198]
3 x 274.32 [10.800]
298.51 [11.753]
5.52 [0.217]
4.83 [0.190]
2 x 77.22 [3.040]
109.86 [4.325]
125.78 [4.952]
5.08 [0.200]
H < 27 mm [1.063"]
Under Duct
2 x 173.99 [6.850]
H < 10.0 mm [0.394"]
Under Duct
H < 0.8 mm [0.310"]
Under VR
H < 1.5 mm [0.059"]
Under VR
256.54 [10.100]
6.35 [0.250]
11.69 [0.460]
NO Components Allowed
Figure 8. Intel® Server Board S5000PAL / S5000XAL - Primary Side Duct and VR Restrictions
TP02295
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Functional Architecture Intel® Server Board S5000PAL / S5000XAL TPS
3. Functional Architecture
The architecture and design of the Intel® Server Board S5000PAL / S5000XAL is based on the Intel®
5000 Chipset Family. The chipset is designed for systems based on the Dual-Core Intel
®
Xeon®
processor 5000 sequence with system bus speeds of 667 MHz, 1066 MHz, and 1333 MHz. The chipset
is made up of two main components: the Memory Controller Hub (MCH) for the host bridge and the ESB2 I/O controller hub for the I/O subsystem. This chapter provides a high-level description of the
functionality associated with each chipset component and the architectural blocks that make up this
server board. For more in depth detail of the functionality for each of the chipset components and each of
the functional architecture blocks, see the Intel
®
S5000 Server Board Family Datasheet.
Figure 9. Server Board Functional Block Diagram
®
Note: The diagram above uses the Intel
5000P MCH as a general reference designator for both MCH
components supported on this server board.
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Intel® Server Board S5000PAL / S5000XAL TPS Functional Architecture
3.1 Intel® 5000P and 5000X Memory Controller Hubs (MCH)
This section will describe the general functionality of the memory controller hub as it is implemented on
this server board. Depending on the version of the server board in use, it may support either the Intel
5000P MCH or the Intel
®
5000X MCH. Features that are unique to a particular MCH will be so referenced.
®
The Memory Controller Hub (MCH) is a single 1432 pin FCBGA package which includes the following
core platform functions:
• System Bus Interface for the processor sub-system
• Memory Controller
• PCI Express* Ports including the Enterprise South Bridge Interface (ESI)
• FBD Thermal Management
• SMBUS Interface
Additional information about MCH functionality can be obtained from the Intel
Server Board Family Datasheet, the Intel
(Yellow Cover), or the Intel
Note: Yellow Cover documents can only be obtained under NDA with Intel and ordered through an Intel
representative.
3.1.1 System Bus Interface
The MCH is configured for symmetric multi-processing across two independent front side bus interfaces
that connect to the Dual-Core Intel
uses a 64-bit wide 1066 or 1333 MHz data bus. The 1333 MHz data bus is capable of transferring data at
up to 10.66 GB/s. The MCH supports a 36-bit wide address bus, capable of addressing up to 64 GB of
memory. The MCH is the priority agent for both front side bus interfaces, and is optimized for one
processor on each bus.
®
Xeon® processors 5000 sequence. Each front side bus on the MCH
3.1.2 Processor Support
The server board supports the following processors:
•One or two Dual-Core Intel
1333-MHz front side bus.
Up to two Quad-Core Intel® Xeon® processors 5300 sequence with a 1066- or 1333-MHz front
•
side bus.
Up to two 45nm 2P Dual-Core Intel® Xeon® processors. Systems based on S5000PALR or
•
S5000XALR only.
•
Up to two 45nm next generation Quad-Core Intel® Xeon® processors. Systems based on
S5000PALR or S5000XALR only.
Previous generations of the Intel® Xeon® processor are not supported on the server board. See
MHz, 1066 MHz, and1333 MHz are supported on this server board.
®
Xeon® processors 5000 sequence, that support system bus speeds of 667
®
Xeon® processors 5000 or 5100 sequence with a 677-, 1066-, or
for a complete updated list of supported
is sub-directory of
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Functional Architecture Intel® Server Board S5000PAL / S5000XAL TPS
3.1.2.1 Processor Population Rules
When two processors are installed, both must be of identical revision, core voltage, and bus/core speed.
Mixed processor steppings is supported. However, the stepping of one processor cannot be greater than
one stepping back of the other. When only one processor is installed, it must be in the socket labeled
CPU1. The other socket must be empty.
The board is designed to provide up to 130A of current per processor. Processors with higher current
requirements are not supported.
No terminator is required in the second processor socket when using a single processor configuration.
3.1.2.2 Common Enabling Kit (CEK) Design Support
The server board complies with Intel’s Common Enabling Kit (CEK) processor mounting and heat sink
retention solution. The server board ships with a CEK spring snapped onto the underside of the server
board, beneath each processor socket. The heat sink attaches to the CEK, over the top of the processor
and the thermal interface material (TIM). See the figure below for the stacking order of the chassis, CEK
spring, server board, TIM, and heat sink.
The CEK spring is removable, allowing for the use of non-Intel heat sink retention solutions.
Note: The processor heat sink and CEK spring shown in the following diagram are for reference
purposes only. The actual processor heat sink and CEK solutions compatible with this generation server
board may be of a different design.
Heatsink assembly
Thermal interface material (TIM)
Server board
CEK spring
Chassis
Figure 10. CEK Processor Mounting
3.1.3 Memory Sub-system
On the Intel® Server Board S5000PAL / S5000XAL, the MCH provides four channels of Fully Buffered
DIMM (FB-DIMM) memory. Each channel can support up to 2 Dual Ranked FB-DIMM DDR2 DIMMs. FBDIMM memory channels are organized in to two branches for support of RAID 1 (mirroring). The MCH
can support up to 8 DIMMs or a maximum memory size of 32 GB physical memory in non-mirrored mode
and 16 GB physical memory in a mirrored configuration. The read bandwidth for each FB-DIMM channel
is 4.25 GB/s for DDR2 533 FB-DIMM memory which gives a total read bandwidth of 17 GB/s for four FBDIMM channels. Thus, this provides 8.5 GB/s of write memory bandwidth for four FB-DIMM channels.
The read bandwidth for each FB-DIMM channel is 5.3GB/s for DDR2 667 FB-DIMM memory which gives
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a total read bandwidth of 21GB/s for four FB-DIMM channels. Thus, this provides 10.7 GB/s of write
memory bandwidth for four FB-DIMM channels. The total bandwidth is based on read bandwidth thus the
total bandwidth is 17 GB/s for 533 and 21.0 GB/s for 667.
On the Intel® Server Board S5000PAL / S5000XAL, a pair of channels becomes a branch where Branch
0 consists of channels A and B, and Branch 1 consists of channels C and D. FBD memory channels are
organized into two branches for support of RAID 1(mirroring).
MCH
Branch 0
Branch 1
Channel B
Channel A
DIMM A1
DIMM A2
DIMM B1
DIMM B2
DIMM C1
DIMM C2
DIMM D1
DIMM D2
Channel C
Channel D
TP02299
Figure 11. Memory Layout
2
To boot the system, the system BIOS on the server board uses a dedicated I
C bus to retrieve DIMM
information needed to program the MCH memory registers. The following table provides the I
addresses for each DIMM slot.
2
C
Table 1. I
2
C Addresses for Memory Module SMB
Device Address
DIMM A10xA0
DIMM A20xA2
DIMM B10xA0
DIMM B20xA2
DIMM C10xA0
DIMM C20xA2
DIMM D10xA0
DIMM D20xA2
3.1.3.1 Memory RASUM Featuresi
The MCH supports several memory RASUM (Reliability, Availability, Serviceability, Usability, and
Manageability) features. These features include the Intel
SDDC) for memory error detection and correction, Memory Scrubbing, Retry on Correctable Errors,
Memory Built In Self Test, DIMM Sparing, and Memory Mirroring. See the IntelServer Board Family Datasheet for more information describing these features.
®
x4 Single Device Data Correction (Intel® x4
®
S5000 Series Chipsets
3.1.3.2 Supported Memory
The server board supports up to eight DDR2-533 or DDR2-667 Fully Buffered DIMMs (FBD memory).
The following tables show the maximum memory configurations supported using the specified memory
technology.
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Table 2. Maximum 8 DIMM System Memory Configuration – x8 Single Rank
Note: DDR2 DIMMs that are not fully buffered are NOT supported on this server board. See the Intel®
Server Board S5000PAL / S5000XAL Tested Memory List for a complete list of supported memory for
this server board.
3.1.3.3 DIMM Population Rules and Supported DIMM Configurations
DIMM population rules depend on the operating mode of the memory controller, which is determined by
the number of DIMMs installed. DIMMs must be populated in pairs. DIMM pairs are populated in the
following DIMM slot order: A1 & B1, C1 & D1, A2 & B2, C2 & D2. DIMMs within a given pair must be
identical with respect to size, speed, and organization. However, DIMM capacities can be different
between different DIMM pairs.
For example, a valid mixed DIMM configuration may have 512MB DIMMs installed in DIMM Slots A1 &
B1, and 1GB DIMMs installed in DIMM slots C1 & D1.
Intel supported DIMM configurations for this server board are shown in the following table.
Supported and Validated configuration : Slot is populated
Supported but not validated configuration : Slot is
populated
Slot is not populated
Mirroring: Y = Yes. Indicates that configuration supports Memory Mirroring.
Sparing: Y(x) = Yes. Indicates that configuration supports Memory Sparing.
Where x = 0 : Sparing supported on Branch0 only
1 : Sparing supported on Branch1 only
0,1 : Sparing supported on both branches
Intel® Server Board S5000PAL / S5000XAL TPS Functional Architecture
Y (0)
Y
Y (0)
Y Y (0, 1)
Notes:
- Single channel mode is only tested and supported with a 512MB x8 FBDIMM installed in DIMM
Slot A1.
- The supported memory configurations must meet population rules defined above.
- For best performance, the number of DIMMs installed should be balanced across both
memory branches. For Example: a four DIMM configuration will perform better than a two
DIMM configuration and should be installed in DIMM Slots A1, B1, C1, and D1. An eight
DIMM configuration will perform better then a six DIMM configuration.
- Although mixed DIMM capacities between channels is supported, Intel does not validate DIMMs
in mixed DIMM configurations.
3.1.3.3.1 Minimum Non-Mirrored Mode Configuration
The server board is capable of supporting a minimum of one DIMM installed. However, for system
performance reasons, Intel’s recommendation is that at least 2 DIMMs be installed.
The following diagram shows the recommended minimum DIMM memory configuration. Populated DIMM
slots are shown in Grey.
Channel B
Channel A
Channel C
Channel D
MCH
DIMM A1
DIMM A2
DIMM B1
DIMM B2
DIMM C1
DIMM C2
DIMM D1
Branch 0
DIMM D2
Branch 1
TP02300
Figure 12. Recommended Minimum Two DIMM Memory Configuration
Note: The server board supports single DIMM mode operation. Intel will only validate and support this
configuration with a single 512MB x8 FBDIMM installed in DIMM slot A1.
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3.1.3.4 Non-mirrored mode memory upgrades
The minimum memory upgrade increment is two DIMMs per branch. The DIMMs must cover the same
slot position on both channels. DIMMs pairs must be identical with respect to size, speed, and
organization. DIMMs that cover adjacent slot positions do not need to be identical.
When adding two DIMMs to the configuration shown in Figure 12, the DIMMs should be populated in
DIMM slots C1 and D1 as shown in the following diagram. Populated DIMM slots are shown in Grey.
Channel B
Channel A
Channel C
Channel D
MCH
DIMM A1
DIMM A2
DIMM B1
DIMM B2
DIMM C1
DIMM C2
DIMM D1
Branch 0
DIMM D2
Branch 1
TP02301
Figure 13. Recommended Four DIMM Configuration
Functionally, DIMM slots A2 and B2 could also have been populated instead of DIMM slots C1 and D1.
However, your system will not achieve equivalent performance. Figure 13 shows the supported DIMM
configuration that is recommended because it allows both memory branches from the MCH to operate
independently and simultaneously. FBD bandwidth is doubled when both branches operate in parallel.
3.1.3.4.1 Mirrored Mode Memory Configuration
When operating in mirrored mode, both branches operate in lock step. In mirrored mode, branch 1
contains a replicate copy of the data in branch 0. The minimum DIMM configuration to support memory
mirroring is four DIMMs, populated as shown in Figure 13 above. All four DIMMs must be identical with
respect to size, speed, and organization.
To upgrade a four DIMM mirrored memory configuration, four additional DIMMs must be added to the
system. All four DIMMs in the second set must be identical to the first with the exception of speed. The
MCH will adjust to the lowest speed DIMM.
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3.1.3.4.2 DIMM Sparing Mode Memory Configuration
The MCH provides DIMM sparing capabilities. Sparing is a RAS feature that involves configuring a DIMM
to be placed in reserve so it can be use to replace a DIMM that fails. DIMM sparing occurs within a given
bank of memory and is not supported across branches.
There are two supported Memory Sparing configurations.
3.1.3.4.2.1 Single Branch Mode Sparing
Slot 2
Slot 1
DIMM_A2
DIMM_A1
Channel A Channel B Cha nnel C Cha nnel D
DIMM_B2
DIMM_B1
DIMM_C2
DIMM_C1
DIMM_D2
DIMM_D1
Branch 0Branch 1
Intel® 5000P/5000X M e mory Controller Hub
Figure 14. Single Branch Mode Sparing DIMM Configuration
• DIMM_A1 and DIMM_B1 must be identical in organization, size and speed.
• DIMM_A2 and DIMM_B2 must be identical in organization, size and speed.
• DIMM_A1 and DIMM_A2 need not be identical in organization, size and speed.
• DIMM_B1 and DIMM_B2 need not be identical in organization, size and speed.
• Sparing should be enabled in BIOS setup.
• BIOS will configure Rank Sparing Mode.
• The larger of the pairs {DIMM_A1, DIMM_B1} and {DIMM_A2, DIMM_B2} will be selected as the
spare pair unit.
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