Revision History Intel® Server Boards S3200SH/S3210SH TPS
Revision History
Date Revision Number Modifications
Sept. 2007 1.0 Initial release.
Oct. 2007 1.1 Added new updates.
Jan. 2008 1.2 Corrected some document errors.
Apr. 2008 1.3 Added Intel® Embedded Server RAID Technology.
July 2008 1.4 Added CMOS Clear instructions
Sept. 2008 1.5 Updated Diagnostic LEDs graphic
Jan. 2009 1.6 Grammatical corrections.
Feb. 2009 1.7 Grammatical corrections and minor updates.
May 2010 1.8 Removed CCC.
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estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Intel's
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right. Intel products are not intended for use in medical, life saving, or life sustaining applications. Intel may make
changes to specifications and product descriptions at any time, without notice.
Designers must not rely on the absence or characteristics of any features or instructions marked "reserved" or
"undefined." Intel reserves these for future definition and shall have no responsibility whatsoever for conflicts or
incompatibilities arising from future changes to them.
This document contains information on products in the design phase of development. Do not finalize a design with
this information. Revised information will be published when the product is available. Verify with your local sales office
that you have the latest datasheet before finalizing a design.
The Intel Server boards Snow Hill family may contain design defects or errors known as errata which may cause the
product to deviate from published specifications. Current characterized errata are available on request.
This document and the software described in it is furnished under license and may only be used or copied in
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*Other brands and names may be claimed as the property of others.
Intel Corporation server boards support add-in peripherals and contain a number of high-density
VLSI and power delivery components that need adequate airflow to cool. Intel ensures through
its own chassis development and testing that when Intel server building blocks are used
together, the fully integrated system will meet the intended thermal requirements of these
components. It is the responsibility of the system integrator who chooses not to use Intel
developed server building blocks to consult vendor datasheets and operating parameters to
determine the amount of airflow required for their specific application and environmental
conditions. Intel Corporation cannot be held responsible if components fail or the server board
does not operate correctly when used outside any of the published operating or non-operating
limits.
Revision 1.8 1
Intel Order Number: E14960-009
Server Board Overview Intel® Server Boards S3200SH/S3210SH TPS
2. Server Board Overview
The Intel® Server Boards S3210SHLX, S3200SHL, S3200SHV, and S3210SHLC are monolithic
printed circuit boards (PCBs) with features designed to support the entry server market.
2.1 Server Board Feature Set
All board SKUs are based on the Intel® 3200/3210 Chipset
Supports processors in LGA775 package
800/1066/1333 MHz Front Side Bus (FSB) speed
Four DDR2 667/800MHz unbuffered DIMM memory sockets with or without ECC
®
Supports the Intel
LX board SKU supports the following I/O slots:
o One PCI Express* x16 connector to be used as a x16 link from chipset (If a VGA
adapter is inserted into this slot, the VGA card will only work at PCI Express* x1
speed; this is a chipset limitation.)
o One PCI Express* x8 connector to be used as a PCI Express* x8 link from the
chipset
o Two PCI-X 133 MHz, 64-bit connectors
o One PCI 5 V, 32-bit, 33 MHz connector
LC board SKU supports following I/O slots:
o One PCI Express* x16 connector to be used as a x16 link from chipset (If a VGA
adapter is inserted into this slot, the VGA card only works at PCI Express* x1
speed; this is a chipset limitation.)
o One PCI Express* x8 connector to be used as a PCI Express* x8 link from the
chipset
o One PCI Express* x8 connector routed to PCI Express* x4 bus from the ICH9R
o Two PCI 5 V, 32-bit, 33 MHz connectors
L and V board SKUs support the following I/O slots:
o One PCI Express* x16 connector to be used as a x8 link from chipset (If a VGA
adapter is inserted into this slot, the VGA card only works at PCI Express* x1
speed; this is a chipset limitation.)
o One PCI Express* x8 connector routed to the PCI Express* x4 bus from the
ICH9R
o Two PCI 5 V, 32-bit, 33 MHz connectors
On-board ServerEngines* LLC Pilot II controller (Integrated BMC) supports the following
functions:
o Integrated 2-D video controller on PCI Express* x1
o Super I/O on LPC
o Baseboard Management Controller (BMC) based on ARM946E-S
ICH9R I/O Controller, interfaced with MCH via DMI
2 Revision 1.8
Intel Order Number: E14960-009
Intel® Server Boards S3200SH/S3210SH TPS Server Board Overview
Winbond* PC8374L super I/O chip interfaced to the Intel® ICH9R through LPC supports
the following:
o PS/2 keyboard/mouse
o Floppy disk drive (FDD)
o Six SATA II connectors
Five USB 2.0 ports: two ports on USB/LAN combo connectors at the rear of the server
board, two ports via on-board headers, and one port on an internal vertical connector
®
Two Gigabit (Gbit) Ethernet devices interfaced to the Intel
ICH9R to support two rear
panel RJ-45 connectors with integrated magnetics; one is through PCI Express* x1, the
other one is through PCI32
ACPI (Advanced Configuration and Power Interface) power management
System monitoring (temperature, voltage, and fans)
VRD11 for processor
The server board supports the following feature set:
o Two different PCI Express* configurations on a single board, dependent on board
SKU
LX board SKU: One PCI Express* x16 and one PCI Express* x8 slot,
connected to the PCI Express* ports of the MCH
LC board SKU: One PCI Express* x16 and one PCI Express* x8 slot,
connected to the PCI Express* ports of the MCH; one PCI Express* x8
slot, connected to PCI Express* x4 interface of the ICH
L and V board SKUs: Two PCI Express* x8 slots, one connected to the
PCI Express* x8 interface of the MCH and the other connected to the PCI
Express* x4 interface of the ICH
HDD Interface
o Six SATA II ports, 300 MB/s
USB
o Two USB 2.0 ports connected to the server rear panel
o Two USB 2.0 ports connected to headers on the server board
o One USB 2.0 port connected to an internal vertical connector
LAN
o One Gigabit Ethernet device (82541PI, MAC + PHY) connect to PCI interfaces
on the Intel
o One Gigabit Ethernet PHY (82566DM) connected to the Intel
®
ICH9R
®
ICH9R through
GLC/LCI interface (not in V board SKU)
o Two 10/100/1000 Base-TX interfaces through RJ-45 connectors with integrated
magnetics
o Link and speed LEDs on the RJ-45 connector
Power Supply
o SSI EEB (Server System Infrastructure Electronic Bay) Power Connectors
o On-board Power generation
VRD 11 processor core voltage
1.2 V regulator for FSB VTT
1.25 V regulator for MCH core and I/Osf
1.05 V regulator for ICH9R core
1.5 V regulator for the ICH9R I/O
1.8 V for DDR2 and 0.9 V for DDR2 termination
3.3 V SB voltage regulator
1.8 V AUX, 1.2 V AUX, and 0.9 V AUX for Integrated BMC and the DDR2
memory supporting it
4 Revision 1.8
Intel Order Number: E14960-009
Intel® Server Boards S3200SH/S3210SH TPS Server Board Overview
System Management
o Processor on die temperature monitoring through PECI (Platform Environment
Control Interface)
o Board temperature measurement
o Fan speed monitoring and control
o Voltage monitoring
o IPMI-based (Intelligent Platform Management Interface) server management
Battery
o Socketed, Lithium coin cell-3 V
Sockets
o One LGA775 processor (Socket-T)
o Four DDR2 DIMM Sockets
o One battery (CR2032)
Legacy Interfaces
o Serial
o Floppy
o PS/2 keyboard
o PS/2 mouse
Power Management Modes Supported (ACPI [Advanced Configuration and Power
Interface] Sleep states)
o S0 – Full on
o S1 – Power-on-suspend
o S4 – Suspend to Disk
o S5 – Soft on/off
Connectors List
o Four 240-Pin DDR2 DIMM connectors
o PCI Express*, PCI-X, and PCI connectors (see SKU specific information)
o One RJ-45 Connectors with magnetics and LEDs
o One stacked RJ-45 with magnetics and LEDs and two-USB combo connector
o 34-pin floppy drive connector
o One serial port headers
o Dual-stacked PS/2 keyboard and mouse connector
o USB connectors (two stacked on the rear panel and three on the server board
headers)
o SSI-EEB ATX power connectors
o One 4-pin auxiliary power connector
o One stacked DB-15 VGA/DB-9 serial port connector
o Six 7-pin SATA II connectors
o 60-pin XDP connector
o Four 4-pin, 0.10-inch pitch fan headers
o 24-Pin, SSI-EEB, front panel connector
Revision 1.8 5
Intel Order Number: E14960-009
Server Board Overview Intel® Server Boards S3200SH/S3210SH TPS
o One 4-pin SATA RAID Key
o One 2-pin intrusion detection
BIOS
o EFI BIOS
Power Management
o Support for Power Management of all capable components
o ACPI-compliant motherboard and BIOS
o Sleep Switch and dual mode LED indicator
Manufacturing
o Surface mount technology. Single-sided assembly for LC/V board SKUs and
double-sided assembly for the LX board SKU
o Six-layer PCB
Form Factor
o ATX 2.0, 12-inches x 9.6-inches, 1U thermally optimized, and SSI TEB Rev 2.11
compatible.
Universal Serial Bus 2.0 (USB)
o Two external USB ports (located at the rear panel) with an additional internal
header providing two optional USB ports for front panel support
o Supports wake-up from ACPI sleeping states S1 and S4 (S3 is not supported)
o Supports legacy keyboard/mouse connections when using a PS/2-USB dongle
LPC (Low Pin Count) bus segment with one embedded device
o Super I/O controller (SMSC* SCH5027D) providing all PC-compatible I/O (floppy,
serial, keyboard, mouse, two serial com ports) and integrated hardware
monitoring.
SSI-compliant connectors for SSI interface support
Standard 24-pin SSI front panel, 2x12 main power connector, and 2x4 CPU power
connector
Fan Support
o Five general purpose 4-pin fan headers
One 4-pin processor fan header (active heat sink required)
Four 4-pin system fan headers (3-pin fans are compatible with all fan
headers. You should only use 4-pin fans with Sys Fan 1 and Sys Fan
2; Sys Fan 3 and Sys Fan 4 are connected to the PWM processor,
which is programmed to work with the 4-pin active heat sink fan.)
Diagnostic LEDs to display POST (Power-on Self-Test) code indicators during boot
Onboard SATA RAID
oIntel
®
Matrix Storage Technology supports software SATA RAID 0, 1, 10 and 5;
Microsoft Windows* driver support only.
The following figure shows the board layout of the LX board SKU. A letter (shown in Table 1)
identifies each connector and major component.
6 Revision 1.8
Intel Order Number: E14960-009
Intel® Server Boards S3200SH/S3210SH TPS Server Board Overview
KK
JJ
HH
GG
FF
EE
DD
CC
BB
A BDHIJC
GE F
K
L
M
II
YZAAX WV UTPRON
SQ
AF002303
Figure 1. Intel® Server Board S3210SHLX Diagram
Table 1. Intel® Server Board S3210SHLX Board SKU Layout Reference
Ref Description Ref Description Ref Description
A PCI-X (64-bit/133 MHz) Slot 1 N Channel 2 DIMM Sockets AA Password Clear Jumper
B PCI-X (64-bit/133 MHz) Slot 2 O Channel 1 DIMM Sockets BB Front Panel Connector
C IPMB P Processor Fan 2 Connector CC Chassis Intrusion Jumper
D PCI 5 V (32-bit/33 MHz) Slot 3 Q Battery DD Floppy Connector
E HSBP R Main Power Connector EE Internal USB
F PCI Express* x8 S System Fan 2 Connector FF External USB
G PCI Express* x16 T SATA 0 GG CMOS Clear Jumper
H System Fan 1 Connector U SATA 1 HH BMC Force Update Jumper
I Back Panel Connectors V SGPIO II BIOS Recovery Jumper
J Diagnostic LEDs W SATA 2 JJ BMC Boot Block WP Jumper
K Processor Fan 1 Connector X SATA 3 KK Serial Port Connector
L 2X4 Aux Power Connector Y SATA 4
M Processor Socket Z SATA 5
Revision 1.8 7
Intel Order Number: E14960-009
Server Board Overview Intel® Server Boards S3200SH/S3210SH TPS
The following figure shows the board layout of the LC board SKU. A letter identifies each
connector and major component (shown in Table 2).
LL
KK
JJ
HH
GG
FF
EE
DD
CC
BB
AA
A BFGH
EDC
I
J
II
K
Z
WXURSNOQ PML
YVT
AF002304
Figure 2. Intel® Server Board S3210SHLC Diagram
Table 2. Intel® Server Board S3210SHLC Layout Reference
Ref Description Ref Description Ref Description
A PCI (32-bit/33 MHz) Slot 1 N System Fan4 Connector AA SATA 4
B PCI (32-bit/33 MHz) Slot 2 O System Fan3 Connector BB SATA 5
C PCI Express* x8 (x8 lane) P Battery CC SATA 3
D PCI Express* x8 (x4 lane) Q Main Power Connector DD Internal USB
E PCI Express* x16 R System Fan2 EE External USB
F System Fan 1 Connector S Floppy Connector FF CMOS Clear Jumper
G Back Panel Connectors T SGPIO GG Password Clear Jumper
H Diagnostic LEDs U SATA 0 HH Recovery Mode Jumper
I Processor Fan 1 Connector V HSBP II Serial Port
J 2X4 Aux Power Connector W SATA1 JJ BMC Boot Block WP Jumper
K Processor Socket X SATA2 KK Chassis Intrusion
L Channel 2 DIMM Sockets Y IPMB LL BMC Force Update Jumper
M Channel 1 DIMM Sockets Z Front Panel Connector
8 Revision 1.8
Intel Order Number: E14960-009
Intel® Server Boards S3200SH/S3210SH TPS Server Board Overview
The following figure shows the board layout of the Intel® Server Boards S3200SHL/S3200SHV.
A letter identifies each connector and major component (shown in Table 3).
KK
JJ
HH
GG
FF
EE
DD
CC
BB
AA
A BEFG
C
D
H
II
I
J
Z
Y
VWTQRMNP OLK
XU
S
AF002310
Figure 3. Intel® Server Board S3200SH-L/S3200SH-V SKU Diagram
®
Table3. Intel
Ref Description Ref Description Ref Description
A PCI (32-bit/33 MHz) Slot 1 M System Fan4 Connector Y Front Panel Header
B PCI (32-bit/33 MHz) Slot 2 N System Fan3 Connector Z SATA 4
C PCI Express* x8 (x4 lane) O Battery AA SATA 5
D PCI Express* x16 (x8 lane) P Main Power Connector BB SATA 3
E System Fan 1 Connector Q System Fan2 CC Internal USB
F Back Panel Connectors R Floppy Connector DD External USB
G Diagnostic LEDs S SGPIO EE CMOS Clear Jumper
H Processor Fan 1 Connector T SATA 0 FF Password Clear Jumper
I 2X4 Aux Power Connector U HSBP GG Recovery Mode Jumper
J Processor Socket V SATA1 HH Serial Port
K Channel 2 DIMM Sockets W SATA2 II BMC Boot Block WP Jumper
L Channel 1 DIMM Sockets X IPMB JJ Chassis Intrusion
KK BMC Force Update Jumper
Server Boards S3200SH-L/S3200SH-V Component Layout Reference
Revision 1.8 9
Intel Order Number: E14960-009
Server Board Overview Intel® Server Boards S3200SH/S3210SH TPS
2.2Server Board Layout
Figure 4. Intel® Server Board S3210SHLC
10 Revision 1.8
Intel Order Number: E14960-009
Intel® Server Boards S3200SH/S3210SH TPS Server Board Overview
2.2.1Server Board Mechanical Drawings
Figure 5. Intel® Server Board S3210SHLX – Hole and Component Positions
Revision 1.8 11
Intel Order Number: E14960-009
Server Board Overview Intel® Server Boards S3200SH/S3210SH TPS
Figure 6. Intel® Server Boards S3210SHLC/S3200SHL/S3200SHV – Hole and Component Positions
12 Revision 1.8
Intel Order Number: E14960-009
Intel® Server Boards S3200SH/S3210SH TPS Functional Architecture
3. Functional Architecture
This chapter provides a high-level description of the functionality associated with the
architectural blocks that make up the Intel
PCIe* x16 (Slot 6)
PCIe* x8 (Slot 5)
S
MB
P
W
M
u
s
/
T
A
CH
PCI-E x8 (Slot 4)
®
Server Boards S3200SH/S3210SH.
DMI
Link
Controller
PCI 32 (Slot 1)
PCI 32 (Slot 2)
Figure 7. Intel® Server Boards S3200SH/S3210SH LC/L/V SKU–Block Diagram
Revision 1.8 13
SATA
SATA
SATA
Intel Order Number: E14960-009
Functional Architecture Intel® Server Boards S3200SH/S3210SH TPS
P
W
M
/
T
A
CH
Figure 8. Intel® Server Systems S3200SH/S3210SH LX SKU–Block Diagram
14 Revision 1.8
Intel Order Number: E14960-009
Intel® Server Boards S3200SH/S3210SH TPS Functional Architecture
3.1 Processor Sub-System
The server board supports the following processors:
Intel
Intel
Intel
Intel
®
Xeon® processor 3000 series
®
Xeon® processor 3100 series
®
Xeon® processor 3200 series
®
Xeon® processor 3300 series
The server board does not support the following processors:
All Intel
All Intel
®
5XX and 6XX series processors
®
8XX and 9XX series processors
The processors built on 65 nm (nanometer) and 45 nm process technology in the 775-land
package use Flip-Chip Land Grid Array (FC-LGA4) package technology, and plug into a 775land LGA socket, referred to as the Intel
®
LGA775 socket.
The processors in the 775-land package are based on the same core micro-architecture. They
maintain compatibility with 32-bit software written for the IA-32 instruction set, while supporting
64-bit native mode operation when coupled with supported 64-bit operating systems and
applications.
3.1.1 Processor Voltage Regulator Down (VRD)
The server board has a VRD (Voltage Regulator Down) to support one processor. It is compliant
with the VRD 12 DC-DC Converter Design Guide Line and provides a maximum of 125 A.
The board hardware monitors the processor VTTEN (Output enable for VTT) pin before turning
on the VRD. If the VTTEN pin of the processors is not asserted, the Power ON Logic will not
turn on the VRD.
3.1.2 Reset Configuration Logic
The BIOS determines the processor stepping and processor cache size through the CPUID
instruction. The processor information is read at every system power-on.
Note: The processor speed is the processor power-on reset default value. No manual processor
speed setting options exist either in the form of a BIOS setup option or jumpers.
Revision 1.8 15
Intel Order Number: E14960-009
Functional Architecture Intel® Server Boards S3200SH/S3210SH TPS
Table 3. Processor Support Matrix
Process Name Socket Core Frequency Cache size FSB Frequency
Intel® Xeon® processor
3000 series
Intel® Xeon® processor
3100 series
Intel® Xeon® processor
3200 series
Intel® Xeon® processor
3300 series
®
LGA775
Intel
®
LGA775 TBD TBD 1333 MHZ
Intel
®
LGA775
Intel
®
LGA775 TBD TBD 1333 MHZ
Intel
1.86 GHz –
2.66 GHz
2.13 GHz –
2.40 GHz
2 MB or 4 MB 1066 MHz
8 MB 1066 MHz
®
3.2 Intel
The server board is designed around the Intel® 3200/3210 Chipset. The chipset provides an
integrated I/O bridge and memory controller, and a flexible I/O subsystem core (PCI Express*).
The chipset consists of three primary components.
3.2.1
The Intel
The role of the MCH in the system is to manage the flow of information between its four
interfaces:
Processor Interface (FSB)
System Memory Interface (DDR2)
DMI interface to the Intel
PCI Express* connectivity to one or two PCI Express* x8 connectors
The feature list of the MCH includes:
Processor / Host Interface
System Memory Controller
DMI Interface
3200/3210 Chipset
Intel® 3200/3210 Chipset MCH: Memory Control Hub
®
3200/3210 Chipset is designed for use with Intel® processors in a UP server platform.
®
ICH9R South Bridge
o Supports LGA775 processors in an UP System configuration
o 200/266/333 MHz FSB Clock frequency
o GTL+ bus drivers with integrated GTL termination resistors
o Supports 512 Mbit and 1 Gbit memory technologies
o DDR2 – 667, 800 MHz
o 8 GB addressable memory
o Supports unbuffered, ECC and non-ECC DIMMs
o No support for DIMMs less than 512 MB and memory speeds less than 667 MHz
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Intel Order Number: E14960-009
Intel® Server Boards S3200SH/S3210SH TPS Functional Architecture
o Interface to ICH9R South Bridge
o 100 MHz reference clock shared with PCI Express* interface(s)
PCI Express* x8 Interface
o Connected to two PCI Express* X8 connectors as shown in the block diagram
o Compliant with the PCI Express* base specification
The MCH accepts access requests from the host (processor) bus and directs those accesses to
memory or to one of the PCI Express* or PCI buses. The MCH monitors the host bus,
examining addresses for each request. Accesses may be directed to the following queues:
A memory request queue for subsequent forwarding to the memory subsystem
An outbound request queue for subsequent forwarding to one of the PCI Express* or
PCI buses
The MCH also accepts inbound requests from the Intel
®
ICH9R. The MCH is responsible for
generating the appropriate controls to control data transfer to and from memory.
The MCH is a FC-BGA device and uses the proven components of the following previous
generations:
Hub interface unit
PCI Express* interface unit
DDR2 memory interface unit
The MCH incorporates an integrated PCI Express* interface. The PCI Express* interface allows
the MCH to directly interface with the PCI Express* devices. The MCH also increases the main
memory interface bandwidth and maximum memory configuration with a 72-bit wide memory
interface.
The MCH integrates the following main functions:
An integrated high performance main memory subsystem
A PCI Express* bus which provides an interface to the PCI Express* devices (Fully
compliant to the PCI Express* Base Specification, Rev 1.0a)
A DMI which provides an interface to the Intel
®
ICH9R
Other features provided by the MCH include the following:
Full support of ECC on the processor bus
Twelve deep in-order queue, two deep defer queue
Full support of unbuffered DDR2 ECC DIMMs
Support for 512 MB, 1 GB, and 2 GB DDR2 memory modules
3.2.1.1 Segment F PCI Express* x8
The MCH PCI Express* Lanes 0~7 provide an x8 PCI Express* connection directly to the MCH.
This resource can support x1, x4, and x 8 PCI Express* add-in cards or cards through the I/O
riser when using the riser slot for the L board SKU.
Revision 1.8 17
Table 4. Segment F Connections
Intel Order Number: E14960-009
Functional Architecture Intel® Server Boards S3200SH/S3210SH TPS
Lane Device
Lane 0~7 Slot 6 (PCI Express* x16 with 8 Lanes layout)
3.2.1.2 MCH Memory Sub-System Overview
The MCH supports a 72-bit wide memory sub-system that can support a maximum of 8 GB of
DDR2 memory using 2 GB DIMMs. This configuration needs external registers for buffering the
memory address and control signals. The four chip selects are registered inside the MCH and
need no external registers for chip selects.
The memory interface runs at 667/800 MT/s. The memory interface supports a 72-bit wide
memory array. It uses seventeen address lines (BA [2:0] and MA [13:0]) and supports 512 MB,
1 GB, and 2 GB DRAM densities. The DDR DIMM interface supports single-bit error correction,
and multiple bit error detection.
3.2.1.3 DDR2 Configurations
The DDR2 interface supports up to 8 GB of main memory and supports single- and doubledensity DIMMs. The DDR2 can be any industry-standard DDR2. The following table shows the
DDR2 DIMM technology supported.
Table 5. Supported DDR2 Modules
DDR2-667/800 Un-buffered
SDRAM Module Matrix
DIMM
Capacity
512 MB 64M x 72 256 Mbit 32M x 8 18 / 2 / 4 13 / 2 / 10
512 MB 64M x 72 512 Mbit 64M x 8 9 / 1 / 4 14 / 2 / 10
1 GB 128M x 72 512 Mbit 64M x 8 18 / 2 / 4 14 / 2 / 10
1 GB 128M x 72 1 Gbit 128M x 8 9 / 1 / 8 14 / 4 / 10
2 GB 256M x 72 2 GB 128M x 8 18 / 2 / 8 14 / 8 / 10
DIMM Organization
SDRAM
Density
SDRAM
Organization
# SDRAM
Devices/rows/Banks
# Address bits
rows/Banks/column
3.2.1.4 Memory Population Rules and Configurations
You must follow a few rules when populating memory. The server board supports two DDR2
DIMM slots for channel A and two DDR2 DIMM slots for channel B. They are placed in a row
and numbered from 0 to 3 with DIMM0 being closest to the MCH. The four slots are partitioned
with channel A representing the channel A DIMMs (DIMM0 and DIMM1) and channel B
representing the channel B DIMMs (DIMM2 and DIMM3).
Note the following memory population rules:
If dual-channel operation is needed, you must populate channel A and channel B
identically (for example, same capacity).
Use DDR2 667/800 MHz memory only.
The slowest DIMM in the system determines the speed used on all the channels.
18 Revision 1.8
Intel Order Number: E14960-009
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