Intel MPCMM0002 User Manual
Intel NetStructure® MPCMM0002 Chassis Management Module
Hardware Technical Product Specification
July 2007
Order Number: 309247-004US
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conflicts or incompatibilities arising from future changes to them. The information here is subject to change without notice. Do not finalize a design with
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specifications. Current characterized errata are available on request.
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Copyright © 2007, Intel Corporation. All rights reserved.
Intel NetStructure® MPCMM0002 Chassis Management Module
Hardware TPS July 2007
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Contents—MPCMM0002 CMM
Contents
1.0 Document Organization.............................................................................................8
1.1 Acronyms and Terms.............................. .................................. .........................10
2.0 Introduction............................................................................................................11
2.1 Architecture Specification...................................................................................11
2.2 User Documentation..........................................................................................11
2.3 Product Definition..............................................................................................11
3.0 Getting Started........................................................................................................ 13
3.1 Installing the CMM.............................................................................................13
4.0 Module Components ................................................................................................15
4.1 Block Diagram ..................................................................................................15
4.2 Intel® 80321 Processor ................................ ..................................................... 17
4.3 Memory ...........................................................................................................19
4.4 Ethernet ..........................................................................................................19
4.5 Serial Port UARTs............................... .................................. .. ...........................19
4.6 FPGA...............................................................................................................20
4.7 Redundancy and Hot Swap CPLD.........................................................................20
4.8 Watchdog Timer................................................................................................20
4.9 Real-Time Clock......................... .. ................................. .................................. ..20
4.10 ADM1026 Controller ..........................................................................................21
4.11 Hot Swap Controller...........................................................................................21
4.12 Ride-Through Support................................. ... .. ................................. ... .. .. ..........21
4.13 IPMB Isolation Logic ..........................................................................................21
5.0 Mechanical Information...........................................................................................24
5.1 Dimensions ...................................................................................................... 24
5.2 Front Panel Hardware ...................................... .. .. ..............................................26
5.3 Rear Connector Placement..................................................................................27
5.4 ESD Discharge Strip ..........................................................................................27
6.0 Backplane Considerations........................................................................................28
6.1 IPMB Routing....................................................................................................28
6.2 CMM Power ...................................................................................................... 28
7.0 Rear Connections ....................................................................................................32
7.1 CMM Connector Pinouts......................................................................................32
7.2 Guide Post........................................................................................................41
7.3 CMM Redundancy..............................................................................................41
8.0 Chassis Data Modules (CDMs)..................................................................................43
8.1 CDM Overview..................................................................................................43
8.2 CDM LED..........................................................................................................43
8.3 CDM Management.............................................................................................43
8.4 CDM Power.......................................................................................................44
8.5 CDM Redundancy..............................................................................................44
9.0 Front Panel.............................................................................................................. 45
9.1 Serial Port Pinouts.......................................................................... .. ... .. ............45
9.2 Ethernet Port Pinouts....................................... .. .................................. .. ............47
9.3 Telco Alarm Connector.......................................................................................48
9.4 Alarm Quiet Switch............................................................................................51
9.5 LEDs................................................................................................................52
10.0 Grounding Considerations .......................................................................................54
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MPCMM0002 CMM—Contents
10.1 ESD Discharge Protection....................................................................................54
10.2 Chassis Ground and Logic Ground.............................. .. .................................... .. ..54
11.0 Thermals..................................................................................................................55
11.1 Processor Heat Sink...........................................................................................55
11.2 Module Orientation.............................................................................................55
11.3 Module Airflow Path ...........................................................................................55
11.4 Airflow Requirements .........................................................................................57
11.5 Board Resistance Curve.............................................. .. .................................. .. ..57
11.6 Thermal Sensors................ .. .................................................................. ............58
12.0 Management Module Specifications..........................................................................59
12.1 Feature Summary..............................................................................................59
12.2 Dimensions and Weight......................................................................................60
12.3 Environmental Characteristics .............................................................................60
12.4 Product Reliability Estimate.................................................................................60
12.5 Agency Certifications..........................................................................................61
13.0 Guidelines for Third Party Chassis Vendors..............................................................62
13.1 High Level Design..............................................................................................62
13.2 IPMB Buses.......................................................................................................63
13.3 GPIO Pins.........................................................................................................66
13.4 Interfacing FRUs to the CMM...............................................................................67
13.5 Intelligent FRUs.................................................................................................68
13.6 Non-Intelligent FRUs with I2C* Support................................................................68
13.7 Non-Intelligent FRUs without I2C Support........................................ .. ...................69
13.8 FRU Data Storage for Non-Intelligent Devices........................................................69
13.9 Controllers and I/O Ports for Non-Intelligent Devices..............................................70
13.10 Temperature Sensors Fronted by the CMM........................................... .. ... ............70
13.11 Related Documents............................... .. ...........................................................70
14.0 Warranty Information..............................................................................................71
®
14.1 Intel NetStructure
Compute Boards & Platform Products Limited Warranty ... ...........71
14.2 Returning a Defective Product (RMA)....................................................................71
14.3 For the Americas .............................. .. .. .................................. .. .. .......................72
15.0 Customer Support....................................................................................................74
15.1 Customer Support..............................................................................................74
15.2 Technical Support and Return for Service Assistance ..............................................74
15.3 Sales Assistance................................................................................................74
15.4 Product Code Summary......................................................................................74
16.0 Certifications ...........................................................................................................75
16.1 Material Declaration Data Sheet...........................................................................75
17.0 Agency Information .................................................................................................77
17.1 North America (FCC Class A)...............................................................................77
17.2 Canada – Industry Canada (ICES-003 Class A) (English and French-translated below) 77
17.3 Safety Instructions (English and French-translated below).......................................78
17.4 Taiwan Class A Warning Statement......................................................................78
17.5 Japan VCCI Class A............................................................................................79
17.6 Korean Class A..................................................................................................79
17.7 Australia, New Zealand.......................................................................................79
18.0 Safety Warnings ......................................................................................................80
18.1 Mesures de Sécurité...........................................................................................81
18.2 Sicherheitshinweise............................................................................................83
18.3 Norme di Sicurezza............................................................................................85
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Contents—MPCMM0002 CMM
18.4 Instrucciones de Seguridad.................................................................................87
18.5 Chinese Safety Warning ............................................................................... .. .. ..89
Figures
1 Top View of the Intel NetStructure® MPCMM0002 CMM ......................... ........................ 13
2 CMM Block Diagram .................................................................................................15
3 CMM Top View Layout........................................ ... ................................. ...................16
4 Intel® 80321 Processor Internal Block Diagram ..... ......................................................17
5 IPMB Dual Star Isolation ...................... .....................................................................22
6 Dual Bus IPMB Isolation............................................................................................23
7 CMM Component Side 1 Dimensions ...........................................................................24
8 CMM Backing Plate Dimensions..................................................................................25
9 CMM Side View Dimensions.......................................................................................26
10 CMM ESD Strip Electrical Definition.............................................................................27
11 Power System Block Diagram ....................................................................................29
12 CDM Power Input.....................................................................................................30
13 Ethernet Port Poaching .............................................................................................31
14 CMM Power Connector..............................................................................................32
15 CMM Data Connector................................................................................................ 36
16 Cross-Connected CMM Signals ................................................................................... 41
17 Guide Post to Backplane . .. ................................. ... ................................. .. ... ..............41
18 Chassis Data Module I2C Routing...............................................................................43
19 CMM Front Panel......................................................................................................45
20 Serial Port RJ-45 Connector....................................................................................... 46
21 Serial Port RJ-45 Cabling........................................................................................... 46
22 Ethernet Port RJ-45 Connector Front View...................................................................47
23 DB-15 Telco Alarm Connector.................................................................................... 48
24 Telco Alarm Contact Wiring for Dual Connectors........................................................... 49
25 Failure Scenario with Dual Telco Alarm Connectors .......................................................50
26 Parallel Inputs to Telco Alarm Connectors.................................................................... 50
27 Cascaded Telco Alarm Cables.....................................................................................51
28 CMM Front Panel with Labels .....................................................................................52
29 CMM Heat Sink........................................................................................................55
30 Side-to-Side Air Flow................................................................................................ 56
31 Front-to-Back Air Flow..............................................................................................57
32 High Level CMM Design.............................................................................................62
33 I/O Signals of the CMM.............................................................................................63
34 Radial Bus Topology ............................................. ................................. .. .................65
35 Shared Bus Topology................................................................................................66
36 FRU That Uses the ADM1026 ..................................................................................... 69
Tables
1 Acronyms and Terms................................................................................................10
2 Processor Features........................................ .................................. .. .......................17
3 FPGA Features.........................................................................................................20
4 Voltage Usage .........................................................................................................29
5 Chassis Elements Directly Driven by CMM Hardware ........................................... .. .. .. .. ..31
6 Power Connector Pinouts...........................................................................................33
7 Power Connector Pinouts Matrix.................................................................................34
8 Pin Staging .............................................................................................................34
9 Power Connector Receptacle Pin Placement .................................................................34
10 Power Connector Header Pin Placement ...................................................................... 35
11 Data Connector Pinouts ........................... .. .................................... ...........................37
12 Data Connector Pinouts Matrix................................................................................... 38
13 Pin Staging ............................................................................................................. 40
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MPCMM0002 CMM—Contents
14 CDM Health LED States.............................................................................................43
15 RTM Serial Port Pinout...............................................................................................46
16 Ethernet Port Pinouts............................... .. .. .................................. .. .........................47
17 Ethernet Port LED States.......................... .................................. ...............................48
18 Telco Alarm Pinout....................................................................................................49
19 Ganged Telco Alarm Cable Pinouts with Cabling............................................................51
20 CDM Health LED States.............................................................................................52
21 CMM Health LED States.............................................................................................53
22 CMM Hot Swap LED States.........................................................................................53
23 Typical Airflow and Cooling Requirements......................................... .. .. .......................57
24 Airflow Guidelines.............................. .. ................................. .. ..................................58
25 Dimensions and Weight.............................................................................................60
26 Environmental Characteristics ....................................................................................60
27 Reliability Estimate Data............................................................................................61
28 Physical Bus Number Mapping....................................................................................64
29 Related Documents...................................................................................................70
30 MPCMM0002 Product Code Summary ..........................................................................74
®
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Revision History—MPCMM0002 CMM
Revision History
Date Revision Description
July 2007 004 CMM drawings updated
July 2007 003 Failure Rate and MTBF values updated.
May 2007 002
April 2006 001 Initial release of this document.
Quick Start section updated with new CMM remo val procedure.
CMM dimension drawings updated.
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Intel NetStructure® MPCMM0002 Chassis Management Module
1.0 Document Organization
This document describes the operation and use of the Intel NetStructure® MPCMM0002
CMM.
The following topics are covered in this document.
Chapter 2.0, “Introduction” introduces the key features of the MPCMM0002 CMM. This
chapter includes a product definition and a list of product features.
Chapter 3.0, “Getting Started” provides installation and setup information for the
MPCMM0002 CMM. This chapter should be read before using the management module.
Chapter 4.0, “Module Components” describes the major components of the CMM and
how the components are interconnected.
MPCMM0002 CMM—Document Organization
Chapter 5.0, “Mechanical Information” provides information on the critical dimensions
of the CMM.
Chapter 6.0, “Backplane Considerations” identifies the IPMB routing requirements,
power distribution options, and Ethernet routing information for chassis designers to
build the MPCMM0002 CMM into their shelves.
Chapter 7.0, “Rear Connections” details the pinouts for the two connectors that
interface with a backplane or coplanar mating board.
Chapter 8.0, “Chassis Data Modules (CDMs)” provides information on how the CMM
accesses the Chassis Data Module (shelf FRU repository).
Chapter 9.0, “Front Panel” details the cable connections and LEDs on the CMM’s front
panel
Chapter 10.0, “Grounding Considerations” provides information on grounding jumpers
and ESD discharge features.
Chapter 11.0, “Thermals” provides information on the cooling requirements for the
CMM.
Chapter 12.0, “Management Module Specifications” contains the electrical,
environmental, and mechanical specifications for the CMM.
Chapter 13.0, “Guidelines for Third Party Chassis Vendors” provides a high-level design
of the MPCMM0002 CMM to help third party chassis vendors incorporate it into their
chassis.
Chapter 14.0, “Warranty Information” defines the warranty for the MPCMM0002 CMM.
Chapter 15.0, “Customer Support” provides information on reaching Intel customer
support.
Chapter 16.0, “Certifications” lists the various applicable product certifications of the
CMM.
®
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MPCMM0002 Chassis Management Module
Document Organization—MPCMM0002 CMM
Chapter 17.0, “Agency Information” contains notices from various certifying agencies.
Chapter 18.0, “Safety Warnings” lists important safety warnings in various languages.
1.1 Acronyms and Terms
The following special acronyms and terms are used in this specification:
Table 1. Acronyms and Terms
Acronym/Term Meaning
Board Front Board as defined in PICMG 3.0 specification
CDM Chassis Data Module
CFM Cubic Feet per Minute
Chassis Physical structure containing boards, backplane, PEMs, etc,; same as shelf
CMM Chassis Management Module
COM
Component Side 1 Primary side of PCB, used for synergy with PICMG 3.0 terminology
Component Side 2 Secondary side of PCB
EMI Electromagnetic Interferen ce
ESD Electrostatic Discharge
ETSI European Telecommunications Standards Institute
Frame Structure in which chassis is mounted; could be enclosed or open; same as rack
FRU Field Replaceable Unit
2
I
C Inter-Integrated Circuit Bus
IPMB Intelligent Platform Management Bus
IPMI Intelligent Platform Management Interface
LED Light Emitting Diode
LFM Linear Feet per Minute
MLBF
NC No Connect [exception: in Section 9.3, refers to Normally Closed relay contacts]
NEBS Network Equipment Building Standards
NO Normally Open [for relay contacts in Section 9.3]
PCB Printed Circuit Board
PEM Power Entry Modules
PICMG
Rack Structure in which chassis is mounted; could be enclosed or open; same as frame
RTM Rea r Transition Module
SCap Super Capacitor
SEL System Event Log
Shelf See Chassis
ShMC Shelf Management Controller
SSI Server System Infrastructure
Common connection [used with relay contacts in Section 9.3, “Telco Alarm
Connector” on page 48.
Mate Last, Break First. Refers to the shortest pin. Used to enable a Hot Swap
controller to cut or connect power to a board.
PCI Industrial Computers Manufacturers Group, sponsor of AdvancedTCA
specification
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Intel NetStructure® MPCMM0002 Chassis Management Module
Introduction—MPCMM0002 CMM
2.0 Introduction
This chapter provides an overview of the Intel NetStructure® MPCMM0002 CMM (CMM).
It includes a product definition and summaries of the module’s hardware features.
The CMM’s software features are detailed in the Intel NetStructure® MPCMM0001
Chassis Management Module and Intel NetStructure
Management Module Software Technical Product Specification for version 6.1. That
document also describes how to configure the firmware to work in a third-party
chassis.
2.1 Architecture Specification
The MPCMM0002 CMM is designed to be compatible with AdvancedTCA* products,
which are based on the PICMG* 3.0 specification. A short form of the PICMG 3.0
specification and other AdvancedTCA information can be found on PICMG’s
AdvancedTCA web site at:
http://www.advancedtca.org/
2.2 User Documentation
The Intel NetStructure® MPCMM0002 CMM is part of the Intel NetStructure family of
products. The latest Intel NetStructure product information and documentation are
available at:
http://www.intel.com/design/network/products/cbp/index.htm
Documents that are not available on Internet web sites may be obtained from your
Intel Business Link (IBL) account, or contact your Intel Field Sales Engineer (FSE) or
Field Application Engineer (FAE) to obtain access.
Refer to the following documentation for more information about the components that
may be in your system.
• Intel NetStructure
NetStructure
version 6 .1.
• Intel NetStructure® MPCBL0001 High-Performance Single Board Computer
Technical Product Specification
®
®
MPCMM0001 Chassis Management Module and Intel
MPCMM0002 CMM Software Technical Product Specification for
®
MPCMM0002 Chassis
2.3 Product Definition
The MPCMM0002 CMM is one of several telecom building blocks from Intel, providing
OEM equipment designers with carrier-grade, standards-based, high-availability
solutions built on the PICMG* 3.x series of specifications. This management module is
designed to be used in certain third-party shelves.
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Intel NetStructure® MPCMM0002 Chassis Management Module
MPCMM0002 CMM—Introduction
Key carrier-grade features of the MPCMM0002 CMM include the following:
• Full Shelf Management Controller and Shelf Manager capability as defined in the
PICMG 3.0 specification .
• Support for up to 16 board slots in an AdvancedTCA* chassis.
• Hybrid dual IPMB star topology support for improved reliability, security, and
throughput.
• Compact 4U x 280 mm x 3HP size to simplify integration into shelves.
• Comprehensive management interfaces including CLI, SNMP, RPC, and RMCP.
• Dual 10/100 Mbps Ethernet controllers with support for individually routing
connections via software to the front panel, optional rear transition modules
(RTMs), or PICMG 3.0 backplane.
• Dual serial ports (one out front; one out the RTM) for local console support.
• Isolated telecom alarm connections front or rear to connect to standard telecom
alarm systems.
• Direct –48 VDC inputs with on-board power regulation for maximum uptime.
• Low power design, using less than 30 W.
• High-temperature design to survive 70° C incoming (pre-heated) air to CMM for
NEBS-style temperature excursions with the proper airflow.
• Dedicated communication paths between dual CMMs for active-standby operation.
• Support for chassis data modules (FRU modules), fan trays, PEMs, and external
temperature sensors.
• Integrated backing plate to help meet the full range of standard NEBS and ETSI
tests including earthquake, fire, immunity, and safety.
®
80321 processor with Intel® XScale® technology , 128 MByte RAM, and 64 MByte
Intel
flash memory to provide headroom for future expansion and space for custom user
applications on board.
®
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MPCMM0002 Chassis Management Module
Getting Started—MPCMM0002 CMM
3.0 Getting Started
3.1 Installing the CMM
The Intel NetStructure® MPCMM0002 CMM is designed to fit in a variety of compatible
chassis and orientations. This chapter provides some useful information for installing
the management module in a chassis (shelf), but you will also need to read the thirdparty documentation provided by the chassis manufacturer or system vendor for your
chassis before you install the module.
In addition to the information provided in the third-party documentation just
mentioned, you should also read and follow the precautions below:
Caution: As noted in the PICMG* 3.0 specification, AdvancedTCA* products (including the
MPCMM0002 CMM) are designed to be installed and serviced by trained service
personnel only, not equipment operators. The primary reason for this is the high
voltage level (over 60 VDC) that can be present in AdvancedTCA systems.
Caution: Many components in the system contain sensitive electronic components. Service
personnel should follow proper grounding procedures when installing or servicing this
equipment.
Figure 1. Top View of the Intel NetStructure
®
MPCMM0002 CMM
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Intel NetStructure® MPCMM0002 Chassis Management Module
3.1.1 Quick Start
MPCMM0002 CMM—Getting Started
1. Open the packing material, find the packing list, and ensure that all the necessary
components are present for the Intel NetStructure
®
MPCMM0002 CMM.
2. Take the MPCMM0002 CMM to the chassis in which it will be installed.
3. Following standard ESD protection procedures, remove the CMM from its anti-static
bag.
4. Insert the management module into the card guides for the dedicated CMM slot.
Follow the chassis manufacturer’s or system vendor’s directions for the proper
orientation of the CMM.
5. As the CMM is being pushed into the slot, keep the ejector handle open until it
engages with the card guide. Ensure the alignment pins on the faceplate engage
the receptacles on the card cage. When the ejector handle engages, rotate the
ejector handle toward the faceplate until the card is fully seated.
6. Use a screwdriver or pair of pliers to tighten the retention screws on both ends of
the faceplate.
7. If the chassis power is on, the CMM will turn on automatically.
8. Connect the appropriate cables to the front or rear serial port, LAN ports. Connect
the telco alarm connector, if desired.
9. If a second CMM is to be installed in the chassis, follow the same instructions in this
procedure.
To remove the CMM:
1. Loosen the retention screws with a screw driver (Type#1 Philips head screw
driver).
2. Pull the ejector away from the faceplate (unlatch condition for ejector) enough to
ensure that the blue LED on the faceplate begins to flash. At this stage, the CMM
remains attached to the chassis (the backplane connector of CMM is still mated
with the chassis’s connector).
3. When the blue hot swap LED turns solid blue, pull the ejector farther out in order to
eject the CMM from the chassis.
Note: The hot swap LED will turn solid blue only when the redundancy feature is fully
enabled.
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Module Components—MPCMM0002 CMM
4.0 Module Components
4.1 Block Diagram
The block diagram for the Intel NetStructure® MPCMM0002 CMM is shown in Figure 2.
Figure 2. CMM Block Diagram
RJ45
RJ45
Alarm
Alarm
LEDs
3
Button
RS-232
Mux
Mux
Battery
Telco
Relays
SODIMM
Socket
128MB
10/100
NIC
10/100
NIC
RTC
-48VDC Power
Control
80321
Intel®
XScale™
Core
and IOP
w/ PCI
Bridge
I2C
ADM1026
GPIO
8/16/32/64 MB
flash
Latch
SIO Serial
Controller
Debug
LEDs
Debug
Drivers
CPLD
Control
Address
Decode
GPIO
Control
Address
Decode
GPIO
Clocks
OCS
FRU
Interrupt
router
FPGA 1
Interrupt
router
FPGA 2
I2C
Engines
I2C
Engines
Debug
RTM
BP
Switch
I2C[0:20]
42 I2C
I2C[21:41]
4
Health/
User
LEDs
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Fault
LED
Ejector
Blue LED
Intel NetStructure® MPCMM0002 Chassis Management Module
The major components of the CMM are arranged as shown in Figure 3.
Figure 3. CMM Top View Layout
MPCMM0002 CMM—Module Components
Telco
Serial
LAN B
LAN A
LED
Opto
Relay RAM
Debug
LED
NIC1
J3
NIC2
CPU
M
Power Brick
Flash
CPLD
+ +
S2 switch
FPGA
Bulk Cap
Battery
Super Cap
Power
Guide
Pin
Data
B5106-01
The PCB is composed of 10 layers of FR406 (or equivalent material). The outer layers
(1 and 10) are 0.5 ounce copper (plated to 1.6 ounces); all other layers are 1 ounce
copper.
Note: S2 abov e is a four-pole DIP switch block. The first switch in the DIP, S2-1 (1:8), is used
for password reset; the other three switches, S2-2, S2-3, and S2-4, are currently not
used. The default position for S2-1 is the ‘off’ position (open). See the Intel
NetStructure
®
MPCMM0001 Chassis Management Module and Intel NetStructure®
MPCMM0002 CMM Software Technical Product Specification for procedures on resetting
the CMM password.
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Module Components—MPCMM0002 CMM
Internal Bus
4.2 Intel® 80321 Processor
The CPU in the MPCMM0002 CMM is an Intel® 80321 Processor/PCI Application Bridge
with Intel
Figure 4. Intel
XScale® technology. The internal block diagram is shown in Figure 4.
®
80321 Processor Internal Block Diagram
2
C
I
Serial Bus
I2C Bus
Interface
Two
DMA
Channels
Application
Accelerator
Intel
Serial Bus
Serial Bus
Performance
Monitoring
Unit
®
80321 I/O Processor
®
Intel
XScale
Core
Messaging
Unit
72-Bit
I/F
®
DDR I/F
Unit
Address
Translation
Unit
64-bit / 32-bit PCI Bus
32-Bit
I/F
PBI Unit
(Flash)
SSP
Notes:
®
XScale® Microarchitecture is ARM* Architecture compliant.
Intel
* Other brands and names are the property of their respective owners.
B3063-01
This processor runs at 600 MHz and has an integrated chipset for lower power usage;
the typical power consumption of the CPU is 4 W. Other features are given in Table 2.
Table 2. Processor Features (Sheet 1 of 2)
ARM* V5T Instruction Set
Integrated Intel XScale® Core
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ARM V5E DSP Extensions
400 MHz and 600 MHz
Write Buffer, Write-back Cache
Intel NetStructure® MPCMM0002 Chassis Management Module
Table 2. Processor Features (Sheet 2 of 2)
PCI Local Bus Specification, Rev. 2.2 compliant
PCI-X Addendum to the PCI Local Bus Specification, Rev. 1.0a
64-bit/66 MHz Operation in PCI Mode
PCI Bus Interface
Memory Controller
Address Translation Unit
DMA Controller
Application Accelerator Unit
2
I
C Bus Interface Units
SSP Serial Port
Peripheral Performance
Monitoring Unit
Timers
544-Ball, Plastic Ball Grid Array
(PBGA)
Eight General Purpose I/O Pins
64-bit/133 MHz Operation in PCI-X Mode
Support 32-bit PCI Initiators and Targets
Four Split Read Requests as Initiator
Eight Split Read Requests as Target
64-bit Addressing Support
PC200 Double Data Rate (DDR) SDRAM
Up to 1 GByte of 64-bit DDR SDRAM (128 MBytes on MPCMM0002)
Up to 512 MBytes of 32-bit DDR SDRAM
Single-bit Error Correction, Multi-bit Support (ECC)
1024 Byte Posted Memory Write Queue
40- and 72-bit wide Memory Interface
2 KByte or 4 KByte Outbound Read Queue
4 KByte Outbound Write Queue
4 KByte Inbound Read and Write Queue
Connects Internal Bus to PCI/PCI-X Bus
Two Independent Channels Connected to Internal Bus
Up to 1064 MByte/s Burst Support in PCI-X Mode
Up to 1600 MByte/s Burst Support for Internal Bus
Two 1 KB Queues in Ch-0 and Ch-1
232 Addressing Range on Internal Bus Interface
264 Addressing Range on PCI Interface
Performs XOR on Read Data
Compute Parity Across Local Memory Blocks
1 KByte/512 Byte Store Queue
Two Separate I
Serial Bus
Master/Slave Capabilities
System Management Funct ions
Full-duplex Synchronous Serial Interface
Supports 7.2 KHz to 1.84 MHz Bit Rates
One Dedicated Global Time Stamp Counter
Fourteen Programmable Event Counters
Three Control/Status Registers
Two Dual-programmable 32-bit Timers
Watchdog Timer
MPCMM0002 CMM—Module Components
2
C Units (one used on MPCMM0002)
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Module Components—MPCMM0002 CMM
4.3 Memory
The CMM has a SODIMM (Small Outline Dual Inline Memory Module) socket on board.
The SODIMM is populated with a 128 MByte unbuffered memory module.
The CMM also has four separate 16 MByte flash modules. These are Intel® E28F128
flash memory modules. Each memory module has multiple lockable regions within the
flash.
4.4 Ethernet
The CMM has two Intel® 82551QM Fast Ethernet Multifunction Controllers with
integrated media access controllers and physical interfaces. The output from each of
these chips is passed to a dedicated multiplexing device (mux), the SN74CBT16124.
Each mux can be individually controlled to send the Ethernet signals to one of three
destinations: the front panel, an optional RTM connection, or a separate backplane
connection. Separate magnetics (six total) provide magnetic coupling for the 10BASE- T
or 100BASE-TX signaling commonly associated with 10/100 MByte/s Ethernet.
In Figure 3, “CMM Top View Layout” on page 16, the four magnetics for the RTM and
backplane connections are at the bottom of the board. The two magnetics for the front
panel are integrated into the front panel RJ-45 connectors.
4.5 Serial Port UARTs
The UART (Universal Asynchronous Receiver/Transmitter) controller on the CMM board
is a T exas Instruments* TL16C752B dual UAR T chip. The first serial port is connected to
an RJ-45 connector on the front panel; the second serial port is passed to the rear of
the card for an optional RTM connection. Full modem hardware signals are passed
through to the RTM.
The UART driver provides 15 kV of ESD protection (8 kV contact, 15 kV air discharge).
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Intel NetStructure® MPCMM0002 Chassis Management Module
4.6 FPGA
The MPCMM0002 CMM has two redundant field-programmable gate arrays (FPGAs) on
board. These two Xilinx* Spartan* II XC2S200 FPGAs have identical internal design,
but different addresses. A brief summary of the FPGA functions is shown in Table 3.
Table 3. FPGA Features
Signal Description
IPMI 1.5-compliant buses, pulled up to 3.3 V and operating at 100 kHz
IPMB
compatible
buses
Bus 50nS basic memory bus with data, address, chip select, output enable, and write enable
Interrupt
Router
20 IPMB ports per FPGA (40 total): 32 IPMBs for dual star routing to up to 16
AdvancedTCA* slots, 2 shared buses for PEMs and fan trays, 2 buses for communication
between CMMs, and 4 spare IPMBs for future expansion
2
One I
C port per FPGA (2 total) for communication to CDMs
The FPGA is responsible for identifying and routing interrupt requests from multiple sources
on the CMM, including the following: internal IPMB engine, other FPGA, both UARTs, the
ADM1026 controller, the CPLD, and both LAN controllers
4.7 Redundancy and Hot Swap CPLD
A Xilinx XC95144XL CPLD is used on the CMM to control the redundancy failover logic,
Hot Swap logic, FPGA control, and address decode for simple devices on the CMM. This
CPLD also contains the PCI arbitration circuitry for the 80321 processor and the
Ethernet controllers.
MPCMM0002 CMM—Module Components
4.8 Watchdog Timer
A Maxim* MAX6374KA-T watchdog timer is used to protect against CPU lockups. The
CMM firmware strobes the watchdog periodically; if the CPU fails to strobe the
watchdog within a given time interval, the watchdog sends a signal to the CPLD that
forces the CPU to reset. This allows the processor to automatically recover to a known
good state in the case of lockup.
Note: If the watchdog timer fires, the IPMB signals are not affected by the CPU timer reset.
The other CMM automatically takes over and manages the chassis.
4.9 Real-Time Clock
The CMM time-stamps certain events as they occur within the system, particularly
entries into the System Event Log (SEL). A Dallas Semiconductor* DS1307 real-time
clock provides this capability.
To avoid losing the current time, the CMM provides independent power to the DS1307
with an on-board battery (size CR2032). The battery provides approximately five years
of run time for the clock in case of a power failure or if the CMM is removed from a
chassis.
Batteries have limited shelf lives. After many years in storage, a battery may not be
able to hold a charge. To supplement the battery, a super capacitor (SCap) is also
provided on the CMM; this provides a mechanism to get up to two hours of backup
power for the clock in case of a power failure. Though the SCap will not hold a charge
for even a full day, the ability to power the clock circuit during a power failure even
after years in storage is a reliability feature of the CMM.
The battery and SCap are both diode-OR’d to ensure that either one can supply the
power for the clock without being affected by the other backup power source.
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Module Components—MPCMM0002 CMM
4.10 ADM1026 Controller
An Analog Devices* ADM1026 controller monitors the on-board voltages and manages
the thermal sensors. The processor communicates with the ADM1026 through an I
bus.
4.11 Hot Swap Controller
The CMM uses an LTC4250AH* Hot Swap controller to ramp voltages and watch for
over-current conditions. If the CMM draws more than 2.5 A for more than 500 µs, the
Hot Swap controller terminates.
The Hot Swap controller waits for the enable signals (short pins tied to each return) to
connect before ramping up the circuitry on the CMM. Similarly, if a CMM is pulled out of
the system, the Hot Swap controller immediately cuts power to the board.
4.12 Ride-Through Support
Many carriers require equipment to survive a 5 ms period without any power in order to
survive power glitches due to short circuit, power switchovers, etc. Section 4.1.4.3 of
the PICMG 3.0 specification requires boards to survive this 5 ms drop-out and
recommends that other chassis elements also have capability to ride through these
transients.
The MPCMM0002 CMM module meets this requirement. The CMM will survive the zero
volt transient described in Table 4-4 of the PICMG 3.0 specification. Large bulk
capacitors next to the DC-DC power converters provide this hold-up capacity.
4.13 IPMB Isolation Logic
2
C
In a carrier-grade system it is important to prevent cascaded failures; that is, a failure
in one element that affects other system elements and causes them to fail or lose
significant functionality . A shared bus is more sensitive to a single item impacting other
elements than a simple point-to-point system. This is one reason the MPCMM0002 CMM
chassis management module implements the hybrid dual IPMB star topology outlined in
Section 6.1, “IPMB Routing” on page 28.
Some IPMB channels are dedicated links between the CMMs and an individual blade;
this type of link is called a star. Some IPMB channels are shared among several devices,
and this type of link is called a bus. The star and bus elements have different isolation
logic in the CMM.
4.13.1 Dual Star IPMB Isolation
The dual star IPMBs on the MPCMM0002 CMM use MOSFET-controlled isolators to
disconnect all the radial IPMB signals automatically if power fails on a CMM. The
isolation circuit is pictured in Figure 5. The hardware ensures that the CMM is isolated
from the dual star IPMBs if power fails.
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Intel NetStructure® MPCMM0002 Chassis Management Module
Figure 5. IPMB Dual Star Isolation
MPCMM0002 CMM—Module Components
CMM 1
FPGA 1
FPGA 2
CMM 2
FPGA 1
IPMBa
IPMBa
IPMBb
IPMBb
IPMB_ P W R
IPMB_ P W R
IPMB_ P W R
IPMB_PWRGOOD
IPMB_ P W RG O O D
IPMB_PW RG O OD
SLOT a
or
CDM a
SLOT b
or
CDM b
IPMB_ P W R
IPMB_ P W RGO OD
FPGA 2
IPMBb
IPMBb
4.13.2 Dual Bus IPMB Isolation Requirements
The isolation requirements for a dual bus IPMB are more stringent. In addition to the
power failure isolation needed by radial IPMBs, dual bus IPMBs must be able to
selectively enable and disable the is olation on each bus. Furtherm ore, each element on
the bus must protect against errors that can cause the bus to hang. Finally, there are
electrical drive and rise time requirements that are more difficult to meet on a shared
bus.
An LTC4300 on each bus provides the necessary individually selectable isolation
mechanisms in addition to rise time acceleration. A watchdog timer is also used to
ensure the bus is isolated if the CPU locks up and resets so that glitches are not
propagated to other controllers on the bus. See Figure 6.
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Module Components—MPCMM0002 CMM
Figure 6. Dual Bus IPMB Isolation
FPGA 2
IPMBa
GPIO_0
IPMBb
GPIO_1
IPMB _PWR
INHIB ITa#
IPMB _PWR
INHIB ITb#
WDT
Local
Local
LTC4300A
ENA
LTC4300A
ENA
Local
IPMB_PWR
IPMB a to
Back p lan e
Local
IPMB_PWR
IPMBb
to
Back p lan e
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Intel NetStructure® MPCMM0002 Chassis Management Module
5.0 Mechanical Information
5.1 Dimensions
Dimensions for the CMM are shown in Figure 7. The origin is in the lower right corner.
All dimensions are shown in millimeters.
The form factor of the CMM PCB has a height of 144.4 mm and a depth of 282.5 mm.
The faceplate has a horizontal slot pitch (width) of 3 HP (0.6 inches).
Dimensions for the CMM backing plate are shown in Figure 8. The origin for these
Figure 7. CMM Component Side 1 Dimensions
dimensions is based on the mounting hole in the upper left corner.
MPCMM0002 CMM—Mechanical Information
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Mechanical Information—MPCMM0002 CMM
Figure 8. CMM Backing Plate Dimensions
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Intel NetStructure® MPCMM0002 Chassis Management Module
The gasket is on the secondary side of the backing plate and extends over the pitch
line, just as PICMG 3.0 boards extend their gasket over the pitch line. The outer face of
the backing plate is 0.15 mm (0.0059 inches) inside the nearest pitch line. Since the
gasket has a nominal compressed size of 1.53 mm (0.0602 inches) and a four-sigma
range of 0.99 mm (0.0390 inches) to 2.07 mm (0.0815 inches), the gasket must seal
on a surface that is between 0.84 mm (0.0331 inches) and 1.92 mm (0.0756 inches)
from the left side pitch line.
Figure 9. CMM Side View Dimensions
MPCMM0002 CMM—Mechanical Information
5.2 Front Panel Hardware
Table 18, “Telco Alarm Pinout” on page 49 shows two retention screws and two
alignment posts on the MPCMM0002 CMM faceplate. Like the hardware used with
PICMG* 3.0 boards, these items are M3 hardware. However, since the 15.24 mm (0.6
inches) pitch of the CMM does not allow sufficient room to put the retention screws and
alignment posts side by side, the alignment posts are offset slightly.
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Mechanical Information—MPCMM0002 CMM
There is only one ejector on the CMM, but it matches the subrack interface geometry
defined in Section 2.2.7 of the PICMG 3.0 specification. Note, however, that the ejector
handle is 2 mm (0.0787 inches) thick, not the 2.5 mm (0.0984 inches) thickness that
many PICMG 3.0 boards use.
A switch on Component Side 2 of the PCB detects the opening and closing of the ejector
handle.
5.3 Rear Connector Placement
5.3.1 MPCMM0002 CMM Rear Connectors
The CMM uses three connectors (for power, data, and a guide pin) that can mate with
either vertical (backplane) connectors or coplanar connectors. The power connector is
an FCI* 85719-107LF (or equivalent) connector. As shown in Table 14, “CMM Power
Connector” on page 32, the A1 pin on the connector is located at coordinates (2.37,
96.34). The data connector is an FCI 89095-102LF (or equivalent). Pin 1 on the data
connector is located at coordinates (13.7, 64.65). The guide pin connector is an FCI
73474-201 (or equivalent).
5.3.2 Coplanar Mating Connectors
In a coplanar mating arrangement, a FCI* HM1L54LDP000H6P connector with FCI*
72019-101 guide pin is mated to the data connector on the CMM, while a FCI*
HM1L52LDP493H6P (or equivalent) connector mates with the power connector.
5.3.3 Vertical Mating Connectors
When a CMM board mates directly into a backplane, vertical mating connectors are
used. The data connector that mates to the CMM is a FCI* 89009-116 with FCI*
70295-001 guide pin and 73475-101 shroud, while the power connector is an FCI*
HM1W52ZPR493H6P (or equivalent). Since they are mounted on a backplane, the rear
of these two connectors must be in the same plane.
Example: If mounted horizontally with Component Side 1 up, the bottom row of holes
for the data connector is 1.775 mm (0.0699 inches) lower than the power connector.
5.4 ESD Discharge Strip
The ESD strip along the bottom of the CMM follows the guidelines in Section 2.2.5 of
the PICMG* 3.0 specification. The electrical definition of the ESD discharge strip is
shown below.
Figure 10. CMM ESD Strip Electrical Definition
Dimensions of the ESD strips are shown in Table 16, “Ethernet Port Pinouts” on
page 47.
10MΩ
10MΩ
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Intel NetStructure® MPCMM0002 Chassis Management Module
6.0 Backplane Considerations
6.1 IPMB Routing
The Intel NetStructure® MPCMM0002 CMM is designed to support a hybrid dual IPMB
star topology.
The CMMs can support up to 16 slots, the maximum number of boards in a PICMG* 3.0
chassis. Each board in the subrack has two dedicated IPMBs going to it. Each IPMB is
arranged in a ‘Y’ pattern: the connection from the board is split to two legs, one going
to each CMM. Each CMM is present on both buses to each board. In addition, there are
two shared IPMB buses routed between the CMMs for private, dedicated IPMB traffic
between the two CMMs. While the CMMs theoretically can talk between themselves
over any of 30+ IPMBs, the private IPMB traffic between CMMs is normally over these
two inter-CMM links.
MPCMM0002 CMM—Backplane Considerations
Note: A shared dual IPMB bus is used for chassis elements such as PEMs and one or more fan
trays. This shared dual bus allows the CMM to support varying numbers of PEMs, fan
trays, and other intelligent chassis elements.
In compliance with the PICMG 3.0 specification, the shared bus IPMB signals have an
isolating buffer device (LTC4300) to ensure proper bus isolation in a shared bus
environment. The radial (star) IPMB connections to each node are not required to have
this same isolation circuitry since each node is effectively isolated already by the star
topology.
6.2 CMM Power
6.2.1 DC Power Input
Each CMM receives dual -48 VDC power feeds on its power connector. Since the
maximum power draw is 28 W, the maximum power draw from each CMM is less than 1
A. The typical power draw for each CMM is 17 W. Most of the power is derived from the
3.3 V converter.
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Backplane Considerations—MPCMM0002 CMM
Figure 11. Power System Block Diagram
-48V
Power
Enable
(MLBF)
-48V Return
Table 4. Voltage Usage
Voltage
12 V 0.3 A Op Amp and IPMB isolation circuit ADM1026
5 V 1 A Misc components that cannot use 3.3 V ADM1026
3.3 V 4 A Most logic ADM1026
2.5 V 5 A Memory interface ADM1026
1.3 V 3 A IOP321 core ADM1026
1.25 V 1 A DDR Termination ADM1026
Current
Max
Hotswap
Controller
ADM1026
Filter
Cap
-48 V t o
3.3V
Power
Bri ck
LT1371
LT1930
PG33
CPLD
PG5
TPS54610
TPS54610
Discrete
Linear
Regulator
Where Used Monitored By
3.3V
5V
12V
2.5V
1.3V
1.25V
The CMM supports an input voltage range of –34 VDC to –72 VDC. However, the 5 ms
ride-through capability (see Section 4.12, “Ride-Through Support” on page 21)
assumes a prior minimum voltage of –43 VDC.
6.2.2 CDM Power
The CMM provides a few powered outputs that chassis designers can use as they see
fit. The chassis data modules (sometimes called shelf FRUs) are described in more
detail in Section 8.0, “Chassis Data Modules (CDMs)” on page 43. Each CMM provides a
diode-OR’d 5 V output at 50 mA maximum current to the CDMs. Chassis designers can
use this 5 V output to power simple EEPROMs in a CDM. The CMMs can both drive a
tricolor LED on the CDM as well.
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Intel NetStructure® MPCMM0002 Chassis Management Module
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