Intel EV80Cl96KB User Manual

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EV80Cl96KB Evaluation Board

User’s Manual

(bier Number 270738-()O]

EV80C196KB Microcontroller Evaluation Board

Release 001

February 20,1989

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CONTENTS

SECTION

Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

PAGE

INTRODUCTION

........................................................................................

GETTING STARTED WITH THE EV80Cl96KB

........................................

Powering

the Board ........................................................................

Connecting

to your PC ....................................................................

Starting

the Host Software ..............................................................

HARDWARE OVERVIEW OF THE EV80Cl96KB BOARD

......................

Block Diagram of the

EV80C196KB

Board..

.................................... 10

Processor

........................................................................................

Memory‘

............................................................................................

Host

Interface ..................................................................................

1 1

Digital I/O

........................................................................................

Analog

Inputs

.................................................................................. 1 1

Decoding

........................................................................................

Configuration Jumper Locations

(Figure 3a)

..................................

Memory Configuration Jumper Locations (Figure 3b)

....................

Expansion Ports, Connectors and LEDs Locations (Figure 4)

........ 16

Host Serial Connector (Figure 5)

....................................................

8OCl96KB Serial Port Connector (Figure 6)

..................................

Analog Input Connector (Figure 7)

.................................................. 18

I/O Expansion

Connector (Figure 8)

................................................

Memory-l/O Expansion Connector (Figure 9)

.................................. 19

Power Supply

Connector (Figure 10)

..............................................

25pin to g-pin Adapter (Figure 11)

................................................ 20

INTRODUCTION

TO iRISM-iECM96 SOFTWARE..

..................................

Features

..........................................................................................

Restrictions

......................................................................................

OVERVIEW

................................................................................................

Embedded

Controller Monitor..

........................................................

USER INTERFACE

.................................................................................... 24

Background Information

..................................................................

Initiating and Terminating

iECM-96

................................................

Default

Base Commands ................................................................

FILE OPERATIONS

....................................................................................

Loading and Saving Object Code

.................................................... 29

Other

File Operations..

......................................................................

PROGRAM CONTROL

................................................................................

Resetting the Target

........................................................................

Breakpoints

......................................................................................

Program Execution

..........................................................................

Program Stepping

............................................................................

DISPLAYING AND MODIFYING PROGRAM VARIABLES

........................ 37

Supported Data Types

......................................................................

. BYTE Commands

............................................................................

WORD Commands

..........................................................................

DWORD

Commands ........................................................................ 40

REAL Commands

............................................................................ 41

STACK Commands

..........................................................................

STRING Commands

........................................................................

Processor Variables

..........................................................................

ASSEMBLY AND DISASSEMBLY

..............................................................

Single Line Assembly Commands

....................................................

Disassembly Commands

..................................................................

SYMBOL OPERATIONS

............................................................................ 46

RISM

..........................................................................................................

RISM Variables

................................................................................

RISM Structure

.................................................................................

Receiving

Data from the Host .......................................................... 48

Sending Data to the Host

..................................................................

RISM Commands

..............................................................................

Schematics and Parts List

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..~.......~..................~......

Appendix A

Specific iRlSM Information

-..~.............~................................~..............0..

Appendix B

Listing of IRISM-196KB

a.*.e..**..*...........*..

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..-....*.........a

Appendix C

Timing Analysis

.*-.................*..........e....

. . . . . . . . . . . . . . . . . . . . ..~........~....~.....~......~

Appendix D

Programmable Logic Equations

. . . . . . . . ..~...~....~.........~...........~.....~.........~..

Appendix E

Standard Memory-l/O Connector

. . . ..~......~................................~~.......~..~

Appendix F

Sample Session

*“o...~~..~.....~..~.......e...~.*~.

. ..O.....................*s..*.............eo... Appendix G

-8-

EV80C196KB Microcontroller Evaluation Board User’s Manual

Figure 1.

EV8OCl96KB Evaluation Board

EV80C196KB Microcontroller Evaluation Board User’s Manual -90

INTRODUCTION

The EV80C196KB is a next-generation version of the EV80C196KA. The major changes are the use of a standard memory expansion bus compatible with the

EV80C51 FB and EV80C186 boards, and the removal of the card edge bus. Also, the HOLD/HLDA feature of the 8OC196KB is supported. The EV80C196KB is designed to be a software evaluation tool for the ROMless 8OC196KB 16-bit microcontroller. As such, ports 3 and 4 are not available for use as I/O ports unless offboard

latches/buffers and decoding logic are used. All unreserved functions of the 80C196KB are available to you except for the Non-Maskable Interrupt (NMI), the TRAP instruction, and 512 bytes of address space. The Chip Configuration Byte is also used by the monitor, but most of its functions are provided by external logic.

GETTING STARTED WITH THE EV80C396KB Powering up the Board

Power (+5, +/-12 Volts) must be connected to JP4 as shown on the board’s silkscreen next to JP4 and in figure 10. Included with the board is a packet containing a Molex connector and crimp terminals for your convenience.

Power supply requirements for the EV80C196KB board are as follows:

+ 5 VDC +I- 5 % @ 280 mA (150 mA if LED’s are disabled by

removing jumper shunt El 6)

+12VDC+/-20%@ 15mA

-12VDC+/-20%@ 15mA

Upon power-up (or after a reset) the board goes through initializations and a shifting-pattern is displayed on the Port 1 LEDs when initialization has completed properly.

Connecting to your PC

Once you have applied power to the board, you need to connect Pl to a PC serial port. Pl is configured to interface pin-to-pin with a standard nine-pin AT@)-type

serial connector (see figure 5 for pinout). Make certain that you use a cable providing all nine signals, as they are all needed for proper operation of the host interface. When you have connected the cable, you may observe that the 8OC196KB is held in reset, and all the LEDs turn on. This is because one of the host signals is used to reset the part, and the signal’is often in a reset condition prior to invoking the host software on your PC.

Note: if you have a 25pin serial port it will be necessary to make a 2%pin to 9pin adaptor (see figure 11 for details).

Starting the Host Software

After the you have made both connections to the board, you can invoke the host

interface. Install the disk in drive A of your system. At the DOS prompt type “A:ECM96”eCR>. Your PC should eventually display the iECM-96 monitor screen.

If you have problems please refer to the sub-section “Initiating and Terminating

iECM-96” in the “USER INTERFACE” section of this manual. For further details on using the monitor, refer to the “USER INTERFACE” section.

-IO-

EV80C196KB Microcontroller Evaluation Board User’s Manual

HARDWARE OVERVIEW OF THE EV80C196KB BOARD

The EV80C196KB Microcontroller Evaluation board is delivered with an 8OC196KB, 8 K-words and 8 K-bytes of user code/data memory, a UART for host communications and analog-input filtering with a precision voltage reference. Also included is programmable chip-select, bus-width and wait-state-counter logic which allows you to custom tailor the board to look like your own system. The board’s physical dimensions are 6 l/2” x 7 3/4” with an overall height of 3W. There are six main sections to the EV80C196KB board: Processor, Memory, Host Interface, Digital I/O, Analog

Inputs and Decoding.

Block Diagram of the 80C196KB Board

Figure 2.

Processor

The Intel@)80C196KB is a 16-bit embedded microcontroller. Being a member of the

MCW-96 family, the 8OC196KB uses the same powerful instruction set and the

same architecture as the existing MCS-96 products. The 8OC196KB is an enhanced

CMOS version of the 8097BH. Its enhancements include up/down and capture modes on Timer2, multiplyin nearly twice as fast, Hold/Ho d Acknowledge logic, and power-down and idle modes

speeds almost 3 times as fast, overall execution

to save power. For more information, please refer to the 1989 “16-Bit Embedded Controller Handbook,” Intel Corporation order number 270646-001 and the 8OC196KB Datasheet order number 270634-001.

Memory

There are five 28-pin memory sockets provided on the EV80C196KB board: Ul , U6,

U8, U13 and U14. The sockets are designed to support byte-wide, JEDEC-pinout, memory devices of various types and sizes, i.e. 8K x 8 SRAM or 16K x 8 EPROM. Ul and U8, U6 and U13 are connected as two 16-bit memory banks and U14 is

connected as an 8-bit memory bank.

EV80C196KB Microcontroller Evaluation Board User’s Manual

-1 I-

See

appendix B and appendix C for details on reserved areas of memory.

Bank

No.

Even Bytes

Odd Bytes

Enable

Signal

Memory Type

I.C.

CEO

8K x 16-bit Monitor EPROM from 0-FFH and 1 DOO-1 DFFH

u13 U6

CEi

8K x 16-bit ROMsim/RAM from 2000H-5FFFH

2 u14

u14

CE2

8K x 8-bit ROMsim/RAM from 6000H-7FFFH

Host Interface

The PC host interface is accomplished with the 82510 UART (U20) connected to Pl via RS-232 drivers. The UART resides in the address range 1 EOOH - 1 EFFH. Therefore, register 0 in the UART would be at address 1 EOOH of the 8OC196KB, reg. 1 would be at 1 EOl H, reg. 2 would be at 1 E02H, etc. up to reg. 7 at 1 E07H. The registers will repeat again with reg. 0 at 1 E08H due to the limited decoding granularity of the EPLD. Pin 12 of the UART, OUTl#, is used to tell the PC host when the 80C196KB is executing user code by a true level on the Ring Indicator input of the host serial port.

Digital I/O

With the exception of the NMI input, which is used by the Host Interface, all Digital I/ 0 functions of the 8OC196KB are available to you. There are eight LEDs on-board along with buffer/drivers which allow you to quickly observe the state of Port 1, HSO.0 and Port 2.5/PWM (see figure 4 or the schematics in appendix A for loca-

tion). The TxD and RxD pins of the 80C196KB (Port 2.0 and Port 2.1) are con-

nected to RS-232 buffer/drivers, which are connected to P2. All of the I/O signals

are available on JP2 (see figure 8 or the schematics in appendix A for pinout).

Note: because RxD is connected to an RS-232 receiver (U19 pin 3) any attempt to use it as a digital input will result in a contention. If you would like to use it as a digital input, remove jumper shunt El9 to disconnect the receiver.

Analog Inputs

The Port 0 inputs of the 80C196KB double as both digital and analog inputs. The

EV80C196KB board includes circuitry to make the analog inputs easier to use. A precision voltage source for Vref is provided on board (U3 and U4) which can be carefully adjusted by trimming RPl . Also, jumper shunt E4 allows Vref to be con-

nected to Vcc instead of the output of U3. By removing E4 entirely, an off board

reference can be connected to JPl . By removing jumper shunt E2, ANGND can be

isolated from Vss. Protective clamping diodes are installed on each channel. RC

networks are provided in sockets (to ailow you to change the input impedance to

match your application) on all of the analog input channels.

If Port 0 is to be used

-729

EV80C196KB Microcontroller Evaluation Board User’s Manual

as a digital input, it is recommended that the capacitors be removed, and the resis-

tors replaced with wires. For additional connection information refer to figure 7 or the schematics in appendix A. The ground and power planes beneath the analog

circuitry (Dl , D2, R3, C2, U3, U4, JPI and the analog connections on the 80Cl96KB) are isolated from the digital power and ground planes of the board to

keep noise from the analog inputs.

Decoding

The decoding logic on the EWOCl96KB board serves three purposes; to provide Chip-Enable signals to memory and peripheral devices, to select the buswidth for the device(s) being accessed and to provide wait-states for slow devices. This section is provided in case you need to modify the memory configuration of the

EV80Cl96KB board. It is not necessary to understand this section for normal usage of the board.

The heart of the decoding logic is U12, a 24-pin 5AC312 Intel EPLD or a C22VlO programmable logic array which is socketed to allow easy changes.

For the sake of convenience it will be referred to as “the EPLD” throughout this text. The EPLD uses latched addresses A8-Al5 along with CLKOUT, HLDA#, RESET# and STALE (STretched ALE) from the 8OCl96KB as decode inputs.

There are 4 enable outputs from the EPLD, all of which are low-level true, however only one should be true at a time to avoid bus contention. They are decoded from the address lines, and an internally-latched signal called MAP. MAP is cleared when the RESET# input is true, and set when the Monitor EPROMs are accessed in the address range 1 DOOH-I DFFH. MAP will always be set when the board is in the USER mode.

pin 21 = CEO

Enables memory in Ul and U8 (monitor EPROM as shipped).

CEO

= (ADDRESS RANGE 2000H - 27FF and NOT MAP) or ADDRESS RANGE OH - FFH or ADDRESS RANGE 1 DOOH - 1 DFFH

pin 22 = CEl

Enables memory in U6 and U13 (user 16-bit ROMsim/RAM as shipped).

CEl

= (ADDRESS RANGE 2000H - 27FFH and MAP) or ADDRESS RANGE 2800H - 5FFFH

pin 15-CE2

Enables memory in U14 (user 8-bit ROMsim/RAM as shipped).

CE2

= ADDRESS RANGE 6000H - 7FFFH

pin 14 - CS510 Enables U20, the 82510 UART, which is

used for host communications.

CS510 = ADDRESS RANGE 1 EOOH - 1 EFFH

EV80C196KB Microcontroller Evaluation Board User’s Manual 4 3-

The BUSWIDTH output of the EPLD, pin 16, is fed into the buswidth pin of the 8OC196KB. Therefore, it is driven low for accesses to 8-bit memory and high for accesses to 16-bit memory. As shipped, it goes low simultaneously with CE2 or CS510 as these are the only areas of memory mapped as 8-bit.

Programmed into the EPLD is a 3-bit wait-state machine clocked by the rising edge of CLKOUT from the 8OC196KB. The transition sequence of the wait-state machine is controlled by the current state of the machine and the inputs to the EPLD (for further details see appendix E). While the bus of the 80C196KB is idle the wait-state machine is locked in state 0, which is called async-start. The conditions for leaving async-start are 1) ALE being asserted, 2) HLDA# not being asserted and 3) a

value on A8 - Al5 requiring wait-states. Because the falling edge of ALE can occur

before the next rising edge of CLKOUT can clock the wait-state machine, a signal called STALE (for Stretched ALE) is used. STALE does not go low until after the rising edge of CLKOUT.

During async-start, the output WAIT# from the EPLD is asserted asynchronously based upon a value on A8-A15 requiring wait-states. If no wait-states are required,

WAIT# will not be asserted and the wait-state machine will remain in async-start.

However, if one or more wait-states are needed WAIT# will be asserted and the

wait-state machine will transition out of async-start on the next rising edge of

CLKOUT. The next state entered depends on how many wait-states are needed. If

only one is required the next state is remove&old, where WAIT# is deasserted

regardless of the inputs to the EPLD. If two watt-states are needed the next state is hold-2, where WAIT# is always asserted, then the state after that is remove-hold.

The additional states, hold-3 - hold 7, work just like hold-2 with WAIT# always asserted. The wait-state machine wJI count through from hold-2 to hold-n to generate n wait-states before jumping to remove-hold to deassert WAIT#. The

maximum number of wait-states is seven.

The previous paragraph described how the signal WAIT# is generated based on the rising edge of CLKOUT. However, the 8OC196KB needs to have a valid signal on it’s READY input pin until the falling edge of CLKOUT. Therefore, it was necessary to clock WAIT# through a negative-edge-triggered-JK flip-flop (U15A) by the falling edge of CLKOUT to generate a signal called WAITN#. As in the EPLD, WAITN# is asserted asynchronously while ALE is high and WAIT# is asserted. After ALE goes low WAITN# will remain asserted until WAIT# is deassetted and the flip-flop is clocked. Besides the WAIT# signal, the WAITN# signal can be asserted by the

USEREADY signal from the expansion bus. As shipped, the EPLD has the following

configuration:

Memory

Wait

Type

States

ROMsim/RAM 0 ROMsim/RAM

Monitor EPROM

82510 UART

Unimplemented

Enable Signal

CEl CE2 CEO cs510 N/A N/A

Memory Region in User Mode

2000H-5FFFH 6000H-7FFFH 0-FFH, 1 DOOH- DFFH

1 EOOH-1 EFFH 1 OOH-1 CFFH, COOOH-FFFFH

8000H - BFFFH

-14 EV8OC196KB Microcontroller Evaluation Board User’s Manual

- E4 Analog Voltage Reference Source A-B AVref = VCC B-i: AVref = U3/U4

__-

Avref from JPl

E2 Analog Ground Reference

A-B AVss = Vss

---

Avss from JPl

E3 2000H-3FFFH Memory Location

A-B External B-C

Internal

E7 82510 UART Interrupt Signal to 8OC196KB

A-B UART Interrupt = EXTINnP2.2 B-C

UART lnterrutp = NMI

El6 LED Driver Enable

L E20 Enable RESET signal from host

A-B

Enabled

A-B RESET from P2

__~

Disabled

B-C

RESET from Pl

-mm

Reset circuit insolated

- E6 80C196KB CDE U5 pin 14

El1 HLDA# Input to PLD U12

A-B CDE = Vss

A-B HOLD/HLDA feature in use

B-C

CDE = Vcc

---

HOLD/HLDA not used

El9 8OC196KB RXD signal from P2

A-B

RXD driven by U19 pin 3

---

RXD can be used by JP2

Figure 3a.

Configuration Jumper Locations

EV80C196KB Microcontroller Evaluation Board User’s Manual -15

E8 U8 pin 27

A-B

Pin 27 = Al 5

B-C

Pin 27 = WRL#

E9 UlN8 pin 1

A-B

Pin 1 = A15

B-C

Pin 1 = Vcc

El0 Ul/U8 pin 26

A-B

Pin 26 = Al 4

Pin27=A15 Pin 27 = WRH#

R-C Pin 26 = Vcc

El2 U13 pin 27

El7 U14 pin 26

A-B

Pin27=A15

A-B Pin26=A13

B-C

Pin 27 = WRL#k

B-C

Pin 26 = Vcc

El3 U6/U13 pin 1

El8 U14 pin 27

A-B

Pin 1 =A15

A-B

Pin27=A14

B-C

Pin 1 = Vcc

B-C

Pin 27 = WR#

El4 U6/U13 pin 26

El5 U14 pin 1

A-B

Pin26=A14

A-B

Pin 1 =A14

B-C

Pin 26 = Vcc

Figure 3b.

B-C

Pin 1 = Vcc

Memory Configuration Jumper LocationiD

Pin 1 =A15

-16-

EV80C196KB Microcontroller Evaluation Board User’s Manual

DPl LED Array

1 P1.0 2 PI.1 3 P1.2 4 P1.3 5 P1.4 6 P1.5 7 P1.6

JP2 input/Output Expansion Connector

P1.7

P2.5/PWM#

HSO.O#

JPl Analog Input Connector

JP3 Memory-i/O Expansion Connector

JP4 Power Connector

Pl 82510 External UART Port-

P2 8OC196KB Internal UART Port -

Figure 4.

Expansion Ports, Connectors and LEDs

EV80C196KB Microcontroller Evaluation Board User’s Manual -17-

Pl Host Serial Connector DB-9S RS232

Host RS-232 Connection on

Nos. Signal Name

Evaluation Board

5 (AB) SG Signal Ground 4 (CD)

DTR Data Terminal Ready

3 @A)

TxD Transmit Data

2 WV

RxD Receive Data

1 W=)

DCD Data Carrier Detect

Digital Ground INIT thru E20-C RxD of 82510 TxD of 82510 DTR Pl-pin 4

’

Pin Nos.

Host M-232 Signal Name

Connection on Evaluation Board

6 (CC)

7 (CA)

8 W

9 W

DSR Data Set Ready RTS Request To Send CTS Clear To Send RI Ring Indicator

DTR Pl -pin 4 CTS Pl -pin 8 RTS Pl-pin 7 Run Indicator

P2 Serial Port Connector DB-9S RS232

Figure 5.

Pin Nos.

5 VW 4 (CD) 3 VW

2 W

1 (CF)

Host W-232 Signal Name

SG Signal Ground

DTR Data Terminal Ready

TxD Transmit Data

RxD Receive Data DCD Data Carrier Detect

Connection on

Evaluation Board

Digital Ground INIT thru E20-A RxD of 8OC196KB

TxD of 8OC196KB

DTR P2-pin 4

Pin Nos.

Host M-232 Signal Mame

Connection on Evaluation Board

6 (CC)

7 GA)

8 W

9 W

DSR Data Set Ready RTS Request To Send CTS Clear To Send RI Ring Indicator

DTR P2-pin 4 CTS PBpin 8 RTS PP-pin 7 No connection

Figure 6.

-189

EV80C196KB Microcontroller Evaluation Board User’s Manual

JPI Analog Input Connector

2x13 Pin MOLEX 39-51-2604 or Equiv.

ANGND - 1 VREF ---- 3 ANGND - 5 ANGND - 7 VREF ---- 9 ANGND -11 ANGND -13 VREF --- 15 ANGND -17 ANGND -19 VREF --- 21 ANGND -23 VREF --- 25

Figure 7.

JP2 I/O Expansion Connector

2x25 Pin MOLEX 39-51-5004 or Equiv.

1 thru 49 - VSS

2 - Analog Channel 0 4 -VREF 6 - Analog Channel 1 8 - Analog Channel 2 10 - VREF 12 - Analog Channel 3 14 - Analog Channel 4 16-VREF 18 - Analog Channel 5 20 - Analog Channel 6 22 - VREF 24 - Analog Channel 7 26 - ANGND

2 - Pl .O Bi-directional 4 - Pl .l Bi-directional 6 - P1.2 Bi-directional 8 - P1.3 Bi-directional 10 - P1.4 Bi-directional 12 - Pl .YBREQ## Bi-directional 14 - Pl .G/HLDA# Bi-directional 16 - P1.7/HOLD# Bi-directional 18 - P2.0/Txd Output 20 - P2.1/Rxd Bi-directional 22 - P22/Extint Input 24 - P2.3fl2CLK Input 26 - P2.4fl2RST Input 28 - P2.5/PWM Output 30 - P2.6!T2UPDN Bi-directional 32 - P2.7/T2Capture Bi-directional 34 - HSO.0 Output 36 - HSO.l Output 38 - HS0.2 Output 40 - HS0.3 Output 42 - HSI.0 Input 44 - HSI.l Input 46 - HSl.2/HS0.4 Bi-directional 48 - HSl.3/HS0.5 Bi-directional 50 - vcc

Figure 8.

EV80C196KB Microcontroller Evaluation Board User’s Manual -19-

JP3 Memory-l/O Expansion Connector

2x30 Pin MOLEX 39-51-6004 or Equiv.

vcc __--------------- - 1

A0 Output ---------- 3 Al Output ---------- 5

A2 Output ---------- 7

A3 Output ---------- 9

A4 Output --------- 11

A5 Output --------- 13 A6 output --------- 15

A7 Output --------- 17

vss

_________-__------ 19

A8 output --------- 21 A9 Output --------- 23 Al 0 Output ------- 25 Al 1 Output ------- 27 Al 2 Output ------- 29 Al 3 Output ------- 31 Al 4 Output ------- 33 Al 5 Output ------- 35

vss _______---------- - 37 CLKOUT Output - 39

RD# Output ------- 41 BREQ# Output --- 43 ALE Output ------- 45

NMI Input ---------- 47

RESET# Output - 49 No Connection --- 51 HLD4# Output --- 53

-12VDC ________-_-- 55 vss _____-_--------- -- 57 vcc ___------------ --- 59

I I I I

I I

I I I I I

7cl 70 70 7u

70 30 3u

q u q u

q u q u q u q u q u q u q u q u

q u q u q n

q u q u

q u q u q u

q u q u

q u q u q u

2 - vcc 4 - DO Bi-directional

6 - Dl Bi-directional 8 - D2 Bi-directional

10, - D3 Bi-directional 12 - D4 Bi--directional 14 - D5 Bi-directional 16 - D6 Bi-directional 18 - D7 Bi-directional

20 - vss

22 - D8 Bi-directional

24 - D9 Bi-directional 26 - DlO Bi-directioal 28 - Dl 1 Bi-directional 30 - D12 Bi-directional 32 - D13 Bi-directional 34 - D14 Bi-directional 36 - D15 Bi-directional

38 - Vss 40 - vss 42 - WR# Output

44 - BHE# Output 46 - UserReady Input 48 - INST Output 50 - P2.2/EXINT Bi-directional 52 - No Connection 54 - HOLD# Input

56 - +12VDC 58 - Vss 60 - Vcc

Figure 9.

JP4 Power Supply Connector

4 Pin MOLEX 26-03-3041 or Equiv.

Figure 10.

-2o-

EV80C196KB Microcontroller Evaluation Board User’s Manual

To Evalboard

Note: Signal mneumonics are reference to the host.

To host PC

Figure 11.

25pin-to-g-pin Adapter

EV8OCI 96KB Microcontroller Evaluation Board User’s Manual

-211

INTRODUCTION TO iRISM-IECM SOFTWARE

The EV80C196KB board uses an Embedded Controller Monitor (ECM) written for the MCS-96 family of 16-bit microcontrollers. This monitor supports basic debug facilities (LOAD, GO, STEP etc.) in the user’s target system. The ECM is broken into two independent programs, one of these executes in the EV80C196KB (iRISM96KB) and the other executes in a IBM PC or BIOS compatible clone(iECM-96). These two programs communicate via an asynchronous serial channel using a binary protocol defined specifically for this application.

The partitioning of the ECM into two separate programs supports a number of goals in the development of this system:

The system is easy to adapt to a new target because the code which runs in the target is very simple and small.

The feature set of the user interface is not limited by the resources of the target since the user interface is implemented in the host PC.

Concurrent operation of the ECM and the target system was easily achieved. This allows you to interrogate and (carefully) modify the state of the target system while it is running.

This manual section describes the user interface provided by the iECM-96, the interface between this PC resident software and the target resident software, and the structure of the software in the target. Appendix B lists the resources of the 80C196KB that are reserved for this RISM implementation. Appendix C is the listing for the iRlSM software which runs in the 80C196KB on this board. It uses an Intel 82510 UART for host communications.

The iECM-96 was designed and implemented by Intel to support user’s of the MCS96 architecture, and is placed in the public domain with no restrictions or warranties of any kind.

Features

Host system is an IBM PC AT, PC XT, or BIOS-compatible clone. (Interfaces via COMl or COM2 at 9600 baud.)

Sixteen software execution breakpoints Concurrent interrogation of target memory and registers Supports BYTE, CHARACTER, WORD, STRING, DOUBLE-WORD and

FPAL-96 REAL variable types. Single-Line Assembler/Disassembler Symbolics compatible with Intel’s OMF debug records

Supports LOAD, SAVE, LIST, LOG, and command INCLUDE files.

EV80C196KB Microcontroller Evaluation Board User’s Manual

Restrictions

Two words of user stack are reserved for use by the iRISM-96 software.Other

memory and/or registers in the target memory will be used by the iRISM-96 software. The exact number and location of this memory is implementation dependent. See appendix B or C for further information.

An asynchronous serial port capable of operation at 9600 baud must be available in the target system. The RISM described in this document uses an Intel 82510 UART. This version also uses the NMI (Non-Maskable Interrupt)

to signal that a received data character is available.

1 The TRAP instruction is reserved.

Breakpoints and program stepping will not operate if the user’s code is in EPROM or other nonchangeable memory.

EV8OC196KB Microcontroller Evaluation Board User’s Manual -239

OVERVIEW Embedded Controller Monitor (ECM)

An ECM (Embedded Controller Monitor) provides basic debug capability and is installed in your target system. Capabilities include loading object files into system

RAM, examining and modifying variables, executing code, and stepping through code. In the past, most of these monitors have been configured to run with a standard “dumb” CRT with some form of auxiliary port for loading and saving object code

from a host system.

It is now common for a personal computer to act as the host for program translation and also emulate a dumb CRT during user interaction with the ECM. The ECM developed for the MCS-96 family makes the assumption that the user interface will always be a personal computer; no provision is made for interface

to a dumb CRT. By making this assumption it is possible to reduce the size and

complexity of the code that must be installed in the target system. A term’ has been coined for this code resident in the target -- RISM. The term RISM stands for Re-

duced instruction Set Monitor and is an obvious takeoff of the term RISC (Reduced

Instruction Set Computer) used to describe a class of computer architectures. The RISM consists of about 300 bytes of MCS-96 code which provide primitive opera-

tions. Software running in the host uses the RISM commands to provide a complete

user interface to the target system. The advantage of this approach is that the ECM can be readily adapted to different target systems and requires only a small part of

the available target memory space. The disadvantage is that the user interface

must be provided by a personal computer. The structure of the RISM is a short section of initialization code and an interrupt

service routine (ISR) that processes interrupts from the host system. The RISM ISR

consists of a short prologue and then a case-jump to one of 20 to 25 command

executors. These executors are simple and short; the flow though the entire ISR (including the prologue) is 15-20 instructions. The serial communication occurs at 9600 baud, which limits the frequency of these interrupts to 1 Khz. In the worst case

the EV80C196KB board will be slowed by the execution of a fairly short RISM ISR

every millisecond while executing user code. It is possible to operate the EV80C196KB board so that no real-time is lost to the iECM-96 unless the user is actively interrogating the target. (See the section “Initiating and Terminating the iECM-96” and the description of the RISM REPORT-STATUS command for details

on this).

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USER INTERFACE

The user interface to the iECM-96 supports commands to initiate and configure the

ECM-96, perform I/O operations involving DOS files, execute user programs, and

interrogate variables in the target system. Interrogation can be done in a number of formats and in most cases can be done concurrently with user code execution. A single line assembler and disassembler are also provided.

Note: on the disk included with the Ev80C196KB is a file called DEMO.LOG.

DEMO.LOG is a sample iECM-96 session for you to invoke and become more

-familiar with the features of iECM-96. Appendix G is a printout of DEMO.LST which was created by turning on the list feature and invoking DEMO.LOG by

typing *‘include demo.log”<CR> at the iECM-96 “*‘* prompt.

Background Information

Numeric and Symbolic Input

The command parser used by the iECM-96 software requires that numeric inputs

always start with the digits O-9. If hexadecimal numbers are entered which start with

A-F they must be preceded by a “0”.

For example, enter “OAA55” instead of “AA55”. This requirement is similar to ASM-96. If symbolic information has been downloaded as part of an object file (see “Loading and Saving Object Code”) then you can enter a valid symbol name whenever a number is expected. The symbol name must be preceded by a period (“.“) so that the parser knows to try searching the symbol table. If the symbol is ambiguous then it will not be accepted by the parser. The probability of ambiguous references can be reduced by specifying the module name along with the symbol name. The module name must be preceded with a colon (“:“).

If a variable TEMP is declared both in MODULE1 and in MODULE2, then a reference to the TEMP declared by MODULE1 would be “:MODULEl .TEMP”. PLM-96 or C-96 line numbers can be called out by a pound sign (“#“) followed by the line number.

Symbolic Output The symbolic output routines, in general, deal only with address information. They will not try to convert data values into symbolic form. When the symbol table is searched for a symbol name to associate with a given value the routines also per-

form type checking. If one, and only one, symbol matches both the type and value

of the address being displayed then the output routines will display the symbol name along with the numeric value of the address. If more than one label has been assigned to a given address then the symbolic output routines will ignore all of them.

The exception to this rule occurs when the disassembler finds multiple labels assigned to a given code address. The disassembler will display all the known symbolic labels attached to a code address.

If the symbols table gets very large the symbolic output routines will become pain-

fully slow, particularly on an 8088 based PC. This problem can be avoided by using modular programming and translating a subset of the modules in the debug mode. Another alternative is to use the “SYMBOLS OFF” command to suppress symbolic output Symbolic input is not affected by this command.

EV80C196KB Microcontroller Evaluation Board User’s Manual -25

Controlling Lengthy Commands Most of the commands supported by iECM-96 appear to complete without delay.

Some commands (e.g. displaying or filling a large area of memory) take an appreciable length of time to complete. In general these commands can be aborted by entering a CARRIAGE-RETURN. Those commands which display a large amount of information can be paused by hitting the SPACE bar. After you have checked the data currently on the screen you can depress the SPACE bar again to resume the output.

Aborting from iECM-96

Entering a control-C will cause the iECM-96 to close any open files and return to DOS.

Initiating and Terminating iECM=96

This section describes the commands for invoking iECM-96 from DOS and exiting back to DOS.

ECM96

This command, entered at the DOS prompt, loads the iECM-96 software and executes it. Several options are available with this command. Option strings always start with a hyphen (“-‘I) and can be entered in upper or lower case. The operation of these options is described below. Any or all of these options can be entered in any order, if the options are contradictory then the actual option accepted is the last one entered.

-COM2, -COMl These options tell the iECM-96 software which serial communication port is to be used. If neither of these options is entered then COMl will be used as a default. If iECM-96 detects valid CTS (Clear To Send) and DSR (Data Set Ready) signals from

the appropriate COM port it will sign on and display a command prompt. If the target

is stopped the command prompt will be an asterisk (“*“). If the target is already running the prompt will be a greater-than sign (5”).

-DIAG If CTS or DSR are not present, iECM-96 will complain about it and ask if you want to

proceed or exit. It is possible, but not likely, that iECM-96 will operate properly even after compl’aining. It is more likely that there is a problem with the serial port or the cabling which will prevent proper operation. If the problem is not obvious (e.g.

disconnected cable or no power to the target hardware) then the -DIAG invocation

option can be used to help isolate the problem. The -DIAG option puts the iECM-96 system in a special mode which allows many tests to be used to find interfacing problems, or target bugs.

The diagnostic mode is intended to support debugging of boards which use the

iECM-96. It can be particularly useful in systems which have multiple address

decoding modes, such as the EV80C196KB. Upon reset this board has EPROM at

location 2080H, the address where the 8OC196KB starts execution. After executing some initialization code, the board can change the address decoding so that ROMsim/RAM is available in the partition which contains 2080H and the RISM is relocated to another area. This allows you to download code which is designed to operate in the on-chip ROM of MCS-96 family parts (2000H - 3FFFH). The diagnos-

tic mode allows the use of diagnostic routines which disappear from memory space

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when the RAM is mapped into the system. It also provides a simple routine to check

the communications interface between the host and the target.

In the EV80C196KB board, there is a serial port loop-back mode which allows debugging the host/board interface. Upon reset the board is in the echo mode. Until it receives an ASCII slash (I’/“) or reverse-slash (‘7”) it will increment every character it receives from the host and send the incremented value back to the host. It will also

display the binary code of the character the board received on the Port 1 LED%. If a

reverse slash is received by the RISM it will leave the echo mode (set USER MAP flag true), remap memory and start normal operation. If a slash is received it-will stop echoing incremented received data and start responding to RISM commands with the diagnostic flag set. In this mode there are diagnostic routines resident in

EPROM which are useful for debugging the board. Initially after invoking the diagnostic mode, the Program Counter points to the beginning of a RAM test at 2200H. See the source code listing in appendix C for further details.

Note: The target hardware will have to be reset before using the DIAG command option.

Note: When executing diagnostic routines from EPROM, certain commands

such as Breakpoints and Stepping will not work as they need to modify the code to work properly.

When the host software is invoked in the diagnostic mode it will tell you to enter characters on the keyboard. These characters will be sent to the target and the

response from the target will be displayed on screen. This is a simple confidence check on the serial communication channel. You are told to enter a slash or reverse-slash to terminate this mode and proceed in either the diagnostic mode or the

normal user’s mode. If the user interface is invoked without the -DIAG option it will

immediately transmit a reverse-slash which should put the target in the normal

mode. Systems which do not implement the diagnostic mode will load the reverseslash into the RISM-DATA register where it will languish till more useful data is sent by the host.

-8096, -8096BH, -Cl 96KB These three options control the single line assembler and the disassembler in the iECM-96. If the 8096 (8x9x-90) or 8096BH (8x9xBH) options are selected then the additional instructions in the 8OC196KB will be considered invalid for both the single line assembler and the disassembler. If none of these options are selected then the iECM-96 will default to Cl 96KB mode.

-NOTYPES

This option will cause the object file loader to ignore type definition records in the

object module. If this is invoked then the symbolic I/O routines will only recognize basic data types such as BYTES, WORDS, and LONGS. More complex data types

such as PLM arrays and structures will not be recognized. This option is included because early versions of the host software got confused while loading certain type definition records generated by C-96. These problems have been fixed but the option was left in case similar problems remain.

EV80C196KB Microcontroller Evaluation Board User’s Manual -27-

-POLL, -SIGNAL These two options control how the host software detects whether or not the user’s code is running. If poll mode is selected then the host will periodically poll the target with a REPORT-STATUS command. This takes no additional hardware but forces the target to waste instruction cycles responding to the poll. The signaling mode avoids this overhead but requires that the target set the Ring Indicator modem control line whenever it is running user code. The user interface will then check this line before it issues a REPORT STATUS command. If neither of these options is selected then the signal mode isselected as a default. On the EV80C196KB the OUT1 # pin of the 82510 is used to generate this running signal. Therefore, the signal mode is recommend.

RESET SYSTEM RES SYSTEM RESET

RES This command and its abbreviations will reset the entire target hardware system if the target system is implemented to support this operation. On the EV80C196KB

jumper shunt E20 must be installed from B to C for this command to work properly.

This command operates by dropping the DTR modem control line. This comes into the target as DSR. After dropping DTR the iECM-96 software will wait about 1 second to allow the target to complete its initialization routines. The iECM-96 will politely warn of this time delay and then ignore the user until it expires. Unless special precautions are taken in the design of the target system, any data in RAM (including downloaded object code) may be corrupted by the reset. On the EV80C196KB, the RAM contents should not be affected by a RESET.

DOS

This command enables you to temporarily leave iECM-96 and return to DOS. Once

you have suspended iECM, you may perform other functions in DOS, including using other software programs, such as ASM-96, as long as there is sufficient mem-

ory to do so.

To reenter iECM, type exit at the DOS prompt. iECM will return with all conditions in

effect at the time it was suspended. QUIT

This command will close any files that iECM-96 has opened and exit to DOS. Note that this command can be used even if the target is running. iECM-96 sets the selected COM port to 9600 baud, 8 bits, no parity, and one STOP bit. The port will be left in this state by iECM-96 when control is returned to DOS.

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EV80C196KB Microcontroller Evaluation Board User’s Manual

Default Base Commands

These commands are used to set the default base for numeric input and output. The valid bases are: 16 (hexadecimal) , 10 (decimal), and 8 (octal). The default base is

used to display variables. It is not used to display addresses (which are displayed in hexadecimal) or breakpoint numbers (which are displayed in decimal). The default

base is also used to enter numbers into the command parser, but it is possible to override the default base during input by adding a character at the end of the number which forces the appropriate base to be used. The override characters are H (or

h) for hexadecimal, T (or t) for decimal, and 0 (or o) for octal. The override character must appear immediately following the last digit of the number with no intervening space.

BASE This command will display the current default base.

BASE=cvalid-base> This command will set the current default base to <valid-base>. When entering this command it is advisable to use an override character to select the new default base:

BASE=1 00

; selects octal BASE=1 OT ; selects decimal BASE=1 OH

; selects hexadecimal

This avoids confusion when changing bases. As an example of the confusion which

is avoided, consider the following commands entered while the base is hexadecimal.

The command:

BASE=1 0

will leave the default base as hexadecimal and the command:

BASE=1 6

will result in an error because 16H (22T) is not a valid base. The command:

BASE=OA

will select decimal as the default base but it is cleaner and simpler to use the over-

ride character:

BASE=1 OT

This works independently of the current default base and leaves a useful record in log or list files which may be open.

EV80C196KB Microcontroller Evaluation Board User’s Manual -29-

FILE OPERATIONS

iECM-96 uses files in the host system to load and save object code, enter predefined strings of commands, to keep a log of commands that are entered by the user, and to keep a record of an entire debug session which includes both the characters entered by the user and the response generated by iECM-96 on the host screen. The commands which operate with files are described in the following sections.

Loading and Saving Object Code

iECM-96 accepts object files which are generated by Intel’s development tools. iECM-96 will not accept files which contain unresolved externals or files which contain relocatable records. These files must be passed through RL-96 in order to resolve the externals and/or absolutely locate the relocatable segments. iECM-96 will also not accept HEX format files. There is a utility on the disk (HEXOBJ.EXE) for converting HEX format files to Intel object format files loadable by iECM-96. While still in DOS type “HEXOBJ <filename>.hex <filename>.obj”cCR> to convert <filename>.hex to a usable format for iECM-96. HEXOBJ does not attempt to convert any symbolic information contained in the HEX file. The iECM-96 commands which operate on object files are:

LOAD <filename> LOADSYM <filename>

SAVE caddr> TO <addr> IN <filename>

The metasymbol <filename> means that a valid MS-DOS file name must be entered in that position of the command string.

LOAD <filename> This command loads the content records of the object file <filename> into the target memory and loads any associated symbolic information into a symbol table maintained in the host system’s memory.

LOADSYM <filename> This command loads the symbolic information from <filename, into the symbol table maintained in the host system but does not load the content records into the target’s memory. This command is useful when you have left a debug session with the target still running a program that has been loaded. At a later time you can reinvoke iECM-96 and interrogate the running program without stopping it. The LOADSYM command allows the use of the symbolic information contained in the object file without reloading the content records. (Content records cannot be loaded while the target is running).

SAVE caddr> TO caddr> IN <filename> This command saves a region of memory as an object file which can be reloaded into the target memory at some latter time. No attempt is made to include any symbolic information which may have been in the symbol table maintained in the host system.

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EV80C196KB Microcontroller Evaluation Board User‘s Manual

Other File Operations

In addition to object files, the iECM-96 makes use of include files, log files, and list files. Include files contain commands to be executed by iECM-96, they must contain the exact sequence of ASCII characters that you would enter from the keyboard to execute the command. Include files can be tedious to generate with a text editor so

iECM-96 can generate log files in which are stored characters entered by the user. The intent is that log files be used later as include files to recreate command sequences. List files keep a running record of both commands entered by the user and of the response generated by iECM-96. Comments can be included in list and

log files to make them easier to understand. A comment starts with a semicolon (I;‘) and ends with a carriage return or ESC. The semicolon is considered to be part of

the comment but not the CR or ESC. The command parser will ignore comments

but will put them in the list and log files.

Note: on the software disk included with the EV80C196KB is a file called DEMO.LOG. DEMO.LOG is a sample iECM-96 session for you to invoke and become more familiar with the features of iECM-96. Appendix G is a printout of DEMO.LST which was created by turning on the list feature and invoking DEMO.LOG by typing ‘*include demo.log”<CR> at the iECM-96 *‘*” prompt.

The list and log files commands allow for default filenames and allow either overwrit-

ing existing data in the file or appending data at the end of the file. This allows you

to gather list and log data in the default files which avoids the creation and manage-

ment of a large number of separate files. Log and list files are stamped with the

date and time whenever they are opened to make it easier to use this capability and then go back and sort out the data from several debug sessions with a text editor.

The commands involved in include, log, and list operations are:

INCLUDE <filename> F’AUSE LIST LIST <filename> LOG ~;XY;~~narne>

LISTON LOGOFF

LOGON

Three of these commands require you to supply a valid file name, the rest use the appropriate file name that has already been entered.

INCLUDE <filename> This command will attempt to open <filename> as a read only file.

If the file can be opened then the command parser will take commands from that file until the end of the file is reached. The include file will then be closed. Only one include file will be opened at a time.

EV80C196KB Microcontroller Evaluation Board User’s Manual -31-

PAUSE This command is documented in this section because it is intended to be used as part of INCLUDE files. It is not really a file oriented command itself. When this command is entered the iECM-96 will stop parsing commands until a SPACE character is entered from the keyboard (it can’t come from an INCLUDE file). This provides a method of pausing in the middle of an INCLUDE file operation until you have a chance to see what’s going on and acknowledge the pause condition by depress-

ing the SPACE bar.

LIST This command behaves like the LIST <filename> command described below except that it uses the last <filename> that was entered as part of a LIST <filename> com-

mand: If no such command has been entered then the default filename “LIST.ECM” will be used.

LIST <filename> This command will attempt to open <filename> as a writable file.

If a file with cfile-

name> already exists then iECM-96 will ask if the file is to be overwritten or if the

new data should be appended to the end of the existing file. It will then open the file and stamp it with the current date and time from the system clock. After this, com-

mands entered by the user and the responses generated by iECM-96 will be recorded in the file.

LOG

This command behaves like the LOG <filename> command described below except

that it uses the last <filename> that was entered as part of a LOG <filename> command. If no such command has been entered then the default filename “LOG.ECM” will be used.

LOG <filename> This command will attempt to open <filename> as a writable file.

If a file with cfilename> already exists then iECM-96 will ask if the file is to be overwritten or if the new data should be appended to the end of the file.

It will then open the file and stamp it with the current date and time. After this, commands entered by the user will be recorded in the file. Note that this file may contain nonprintable characters

(e.g. ESC).

LISTOFF and LISTON

The LISTOFF closes a LIST file that has been specified by the LIST command. This

stops new list information from being recorded. The LISTON re-opens the list file in the append mode so that recording can start again.

LISTON also stamps the list file

with the current date and time from the system clock.

LOGOFF and LOGON

The LOGOFF closes a log file that has been specified by the LOG command. This

stops new list information from being recorded. The LOGON re-opens the log file in

the append mode so that recording can start again. LOGON also stamps the list file with the current date and time from the system clock.

EV80C196KB Microcontroller Evaluation Board User’s Manual

PROGRAM CONTROL

Commands which control program execution allow you to reset the processor, set

execution breakpoints, start execution, stop execution, step, and super step. The commands will be grouped by their major function for the sake of discussion.

Resetting the Target

The processor can be reset by executing the iECM-96 command:

RESET CHIP

This command physically resets the processor by setting the RISM-DATA register to OXXXXOOOl and issuing a MONITOR-ESC RISM command which will cause the target to perform a RST instruction.

Breakpoints

iECM-96 provides sixteen program execution breakpoints. If a given breakpoint is inactive it is set to zero, if it is active then it is set to the address of the first byte of an instruction. Breakpoints set to addresses which are not the first byte of an instruction will cause unpredictable errors in the execution of the user’s code. When execution is started iECM-96 saves the user code byte at any active breakpoint and substitutes a TRAP instruction for that byte. Executing a TRAP instruction will cause the iECM-96 to restore the user code bytes where the TRAP instructions were substituted and then decrement the user’s program counter so that it points at the original instruction. The user’s program will appear to stop execution immediately before executing the instruction with a breakpoint set on it. All the TRAPS will be removed from the user’s code and the original code restored.

Note: Most monitor programs similar to iECM-96 display a message on the console when a break occurs (e.g. “Program break at 1234H”). This is not done in iECM-96 because the system supports concurrent interrogation of the target which the user’s code is running; it is possible (perhaps probable) that the break will occur while you are in the middle of displaying or modifying the state of the target. Any special break message would have to interrupt the execution of the command. Because of this the iECM-96 does not output a special break message. You have two ways to find out that a break occurred:

I)- The prompt will change from a greater-than 5” to an asterisk (“*“).

2). The status of the processor shown in the “control panel” at the top of the console screen will change from “running” to “stopped”.

Commands which set the breakpoint array are:

:l[ cbp-number> ] BR [ cbp-number> ] = <code-addr>

The square brackets in the latter two commands are part of the command syntax and must be entered by the user, the angle brackets are part of the “meta” language used to describe the syntax. Breakpoints can be displayed while your code is running but they cannot be modified.

EV80C196KB Microcontroller Evaluation Board User’s Manual -33-

NOTE: BR[O] and BR[l] can also be set by the GO command by using the TILL clause; all of the breakpoints will be cleared by the GO command if the FOREVER clause is used.

BR This command will display all of the active breakpoints (i.e. those not set to zero). You will also be informed if no breakpoints are active.

BR [ cbp-number> ] This command will display the setting of the selected breakpoint and wait for input from you. If you enter a carriage-return the command will terminate. If you enter an

ESC the next sequential breakpoint will be displayed. If you enter a numeric value then the selected breakpoint will be loaded with the value and the iECM-96 will again wait for input. At this point you can enter either a CARRIAGE-RETURN or an

ESC. As before, the ESC will cause the iECM-96 to display the next breakpoint and

the CARRIAGE-RETURN will terminate the command. This command will wrap

around from the last breakpoint (1%) to the first breakpoint (0).

BR [ cbp-number> ] = <code-addr> This command sets the specific breakpoint specified by cbp-number> to the value <code-addr>.

Program Execution

These commands start and stop execution of user code. The commands provided are:

2: FOREVER GO FROM <code-addr> GO FROM <code-addr> FOREVER

GO FROM <code addr> TILL <code-addr> GO FROM ccodezaddr> TILL <code-addr> OR <code-addr> GO TILL <code-addr> ;AqflLL <code-addr> OR <code-addr>

If a GO with breakpoint command is entered, the user code bytes at the breakpoints will be saved and TRAPS will be installed. When a breakpoint is reached the user’s software will stop before the instruction which caused the breakpoint and the IECM96 software will restore the original user code.

Note that this is different from the operation of iSBE- (and most ICE modules) which stop just afterthe instruction executes. A problem associated with stopping before the break instruction executes is that subsequent GO commands may run into the breakpoint before any user code is executed. The iECM-96 avoids this problem by skipping the setting of any breakpoints set on the instruction that the current PC points to. If this happens to remove

the last breakpoint set then you will be warned but the GO will still execute with no

breakpoints enabled. IF this happens you can use the HALT command to stop the program a

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None of the GO commands can be executed while the user’s code is already run-

ning; the HALT command cannot be executed if the user’s code is not running. The GO commands which set breakpoints use BP[O] and possibly BP[l]. Any break value already in one of these breakpoints will be overwritten and destroyed by these GO commands. If possible the user should reserve the first two breakpoints for use by the GO commands and set the remaining breakpoints (if required) explicitly with the BR commands.

GO This command starts execution of the user’s code using the current value of user’s

PC and the current breakpoint array. GO FOREVER

This command clears the breakpoint array and starts execution at the current value of the user’s PC.

GO FROM <code addr>

This command loads the user’s PC with <code-addr> and starts execution of the

user’s code using the current breakpoint array. GO FROM <code-addr> FOREVER

This command loads the user’s PC with <code-addr>, clears the breakpoint array,

and starts execution of the user’s code. GO FROM <code addr> TILL <code addr>

This command lo& the user’s PC w%h the <code-addr> which follows the FROM

keyword, sets the first breakpoint (BP[O]) to the <code-addr> which follows the TILL keyword, and then starts execution of the user’s code.

GO FROM <code-addr> TILL <code-addr> OR <code-addr> This command acts like the previous command except that it also sets the second breakpoint (BP[l]) to the ccode_addr> which follows the OR keyword.

GO TILL <code-addr> This command sets the first breakpoint (BP[O]) to <code-addr> and then starts the execution of user code using the current setting of the user’s PC and the breakpoint array 0

GO TILL <code-addr> OR <code addr> This command acts like the previ&s command except that it also sets the second breakpoint (BP11 J) to the <code-addr> which follows the OR keyword.

HALT This command stops execution of user code by forcing the processor to execute a jump to self instruction in a reserved location.

EV80C196KB Microcontroller Evaluation Board User’s Manual -35,

Program Stepping

These commands allow stepping through programs one instruction at a time. Between instructions the iECM-96 commands can be used to check the state of the variables changed by the instruction to ensure that the program is operating properly. Stepping through code allows a far more detailed look at what is going on in the program. The price that is paid for this detail is that stepping does not occur in real time; this makes it difficult or perhaps impossible to use on code that is tied to real time events.

Stepping while interrupts are enabled would be confusing since interrupt service routines will be stepped through as well as sequential code. iECM-96 avoids this problem by artificially locking out interrupts while stepping, ignoring the state of the interrupt enable (El) or interrupt mask.

Super-Stepping is similar to stepping except that interrupts are not artificially suppressed. Also, an interrupt service routine or a subroutine call (and the body of the subroutine that is called) is treated as one indivisible instruction by the super-step command. This allows the user to ignore the details of subroutines and interrupt service routines while checking out code. Every time an instruction is “superstepped” all the service routines associated with enabled pending interrupts will be executed. This may allow limited stepping through code while operating in a concurrent environment but the system will not operate in real time. A better approach is to use the GO command to execute to a specified breakpoint and then step through

the code being tested looking for proper operation.

iECM-96 implements the step operation by using the TRAP instruction. To step over a given instruction iECM-96 determines all the possible subsequent instructions and

places TRAPS at these locations. After doing this it allows the user’s program to execute until it runs into one of these TRAPS and then restores all of the user code bytes which were overwritten with TRAPS. If iECM-96 is to step over a conditional branch, two possible subsequent instructions exist in the sequential code of the program. Any other instruction can only have one “next” instruction. A TRAP is also set at location 2080H in case the target is reset during the step.

Super-stepping is accomplished by setting TRAPS like the STEP except for CALL instructions which are treated as a special case. During a STEP the iECM-96 will put the TRAP at the target address of a call; during a super-step the TRAP will be placed at the instruction following the CALL. Interrupts are suppressed during STEP (not SS) operations by saving the user’s El bit, clearing it before the STEP occurs, and then restoring it. In order to make sure the instruction which is executed does not modify the El bit, several instructions (PUSHF, POPF, PUSHA, POPA, DI, El) are simulated by the iECM-96 software rather than being executed by the target processor. The 80C196KB instruction IDLPD is also simulated during STEP to prevent the target from locking up. The simulation treats the IDLPD as a two byte NO-OP. Note that the simulation of instructions only occurs during STEP operations During a GO or SS command all instructions are executed by the target.

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EV80C196KB Microcontroller Evaluation Board User’s Manual

The iECM-96 commands which implement step operations are:

STEP STEP <count> STEP FROM <code-addr> STEP FROM <code-addr> <count>

SS <count> SS FROM <code-addr> SS FROM <code-addr> <count>

Aside from the style of the actual step operation, the SS and STEP commands

beha\ie the same. They will be described together and will be called single-stepping.

{STEP 1 SS}

This command single-steps one time.

{STEP 1 SS } <count>

This command single-steps <count> times.

{ STEP 1 SS } FROM <code-addr>

This command loads the user’s pc (PC) with <code-addr> and then single-steps

one time. { STEP 1 SS } FROM <code-addr> <count>

This command loads the user’s pc (PC) with <code-addr> and then single-steps <count> times.

EV80C196KB Microcontroller Evaluation Board User’s Manual -37-

DISPLAYING AND MODIFYING PROGRAM VARIABLES

iECM-96 provides commands to display and modify program variables in several

formats. In addition to simple variables such as bytes and words, more complicated

variables such as reals and character strings are supported. iECM-96 commands

allow variables to be displayed or initialized either individually or as regions of mem-

ory which contain variables of the given type.

Supported Data Types

BYTE

A BYTE is an eight-bit variable. No alignment rules are enforced for BYTE variables.

CHAR

A CHAR is a special case of a BYTE. CHAR variables are displayed as ASCII char-

acters.

WORD

A WORD is a 16-bit variable. The address of a WORD is the address of its least

significant byte. A WORD must start at an even byte address.

DWORD A DWORD is a 32-bit variable. The address of a DWORD is the address of its least significant byte. A DWORD must always start at an even byte address. If a DWORD variable is to be accessed as a register by an 8096 instruction then a more restrictive alignment rule is enforced: it must start at an address which is evenly divisible by 4. This more restrictive alignment rule will only apply to iECM-96 commands when using the single line assembler.

REAL A REAL is a 32-bit binary floating point number which conforms to the FPAL96 definition. The 32 bits contain a sign bit, an 8-bit exponent field, and a 23-bit fraction field. iECM-96 commands use standard scientific notation to deal with REAL num-

bers Note that the FPAL96 has special representations for +infinity and for NaN’s

(Not a Number--used to signal error conditions) if iECM-96 detects one of these special values it will output an appropriate text string instead of trying to display the value in scientific notation.

STACK A STACK variable is a 16-bit variable which resides in the system stack. The addresses of stack variables (cstack7addr> are taken to be relative to the current stack pointer and must be word alrgned.

STRING

A STRING is a sequence of ASCII characters which are terminated by the NUL

character. The ASCII character NUL has the binary value of zero.

In addition to supporting access to variables of the above types, iECM-96 also

provides commands to access the special program variables PC (program counter),

PSW (program status word) and SP (stack pointer). These commands are dis-

cussed at the end of this section under the heading “Processor Variables”.

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EV80Cl96KB Microcontroller Evaluation Board User’s Manual

BYTE Commands

There are four forms for the BYTE commands:

BYTE <byte-address> BYTE <byte-address> = <byte-value> BYTE <byte-address> TO <byte-address>

BYTE <byte-address> TO <byte-address> = <byte-value> All of these commands can be used whether or not the user’s program is running. BYTE <byte-address>

This form is used to examine and then possibly change one or more sequential

BYTE variables. When this command is invoked iECM-96 will display the <byte-address> symbolically if a valid symbol exists for that <byte-address>.

Whether or not the symbolic display occurs, iECM-96 will display the <byte-address> in hexadecimal notation, the value of the BYTE in the default base and wait for an input from you. You can respond with a CARRIAGE-RETURN character, an ESC character, or by entering a numeric value. A CARRIAGE-RE-

TURN will terminate the command. An ESC will result in the display of the next

sequential BYTE variable. If a numeric value is entered then the BYTE variable will be set to this value and the iECM-96 will again wait for input. At this point you can respond only with an ESC or CARRIAGE-RETURN. As before, the ESC will display the next sequential BYTE and the CARRIAGE-RETURN will terminate the command.

BYTE <byte-address> = <byte value> This form is used to set an indizdual BYTE variable without first checking its current

value. When invoked, this command sets the BYTE variable at <byte-address> to

<byte-value>.

BYTE <byte-address> TO cbyte_address> This form is used to display a region of memory as a sequence of BYTE variables. When this command is invoked, iECM-96 will start by displaying the current default

base and then a series of lines showing the contents of the selected memory region.

16 a symbol exists in iECM-96’s symbol table for the next <byte-address> then this symbol will be displayed. Whether or not the symbolic display happens, the next line will start with a hexadecimal display of the address of the next BYTE variable to be displayed followed by the display of up to 16 bytes of memory as BYTE variables in the default base. A new line will be started whenever 16 bytes of memory have been displayed on the line or a valid symbol exists in iECM-96’s symbol table for the next <byte-address> to be displayed. The command terminates when all of the BYTE variables in the selected range have been displayed. During lengthy displays you can stop the output to the console by hitting the SPACE bar. Display can be resumed by hitting the SPACE bar a second time. The command can be terminated by entering a carriage return.

BYTE <byte-address> TO <byte-address> =

<byte-value>This form is used to initialize a region of memory to the given <byte-value>. Note that this command will take a little over a millisecond (at 9600 baud) for each BYTE loaded. This command can be terminated by entering a carriage return but this leaves only part of the memory region initialized.

EV80Cl96KB Microcontroller Evaluation Board User’s Manual -390

WORD Commands

There are four basic forms for the WORD commands:

WORD <word address> WORD <word-address> = <word value> WORD <word-address> TO <word address>

WORD <wordaddress> TO cwordIaddress> = <word-value> All of these commands can be used whether or not the user’s program is running. WORD <word-address>

This form is used to examine and then possibly change one or more sequential WORD variables. When this command is invoked iECM-96 will display the <word-address> symbolically if a valid symbol exists for that <word-address>. Whether or not the symbolic display occurs, iECM-96 will display the <word-address> in hexadecimal notation, the value of the WORD in the default base and wait for an input from you. You can respond with a CARRIAGE-RETURN character, an ESC character, or by entering a numeric value. A CARRIAGE-RE-

TURN will terminate the command. An ESC will result in the display of the next

sequential WORD variable. If a numeric value is entered then the WORD variable

will be set to this value and the iECM-96 will again wait for input. At this point you

can respond only with an ESC or CARRIAGE-RETURN. As before, the ESC will display the next sequential WORD and the CARRIAGE-RETURN will terminate the command.

WORD <word-address> = <word-value> This form is used to set an individual WORD variable without first checking its current value. When invoked, this command sets the WORD variable at <word-address> to <word-value>.

WORD <word-address> TO <word-address >This form is used to display a region of memory as a sequence of WORD variables. When this command is invoked, iECM-96 will start by displaying the current default base and then a series of lines showing the contents of the selected memory region. If a symbol exists in iECM-96’s symbol table for the next <word-address>

then this symbol will be displayed. Whether or not the symbolic display happens, the

next line wild start with a hexadecimal display of the address of the next WORD

variable to be displayed followed by the display of up to 16 bytes of memory as WORD variables in the default base. A new line will be started whenever 16 bytes of

memory have been displayed on the line or a valid symbol exists in iECM-96’s

symbol table for the next cword7address> to be displayed. The command termi-

nates when all of the WORD vanables in the selected range have been displayed. During lengthy displays you can stop the output to the console by hitting the SPACE bar, Display can be resumed by hitting the SPACE bar a second time. The command can be terminated by entering a carriage return.

WORD <word-address> TO <word address> = <word-value> This form is used to initialize a region of memory to the given <word-value>. Note that this command will take a little over a millisecond (at 9600 baud) for each WORD

loaded. This command can be terminated by entering a carriage return but this leaves only part of the memory region initialized.

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DWORD Commands

There are four basic forms for the DWORD commands:

DWORD cdword-address> DWORD cdword address> = cdword-value>

DWORD cdwordraddress> TO cdword-address>

DWORD cdword-address> TO <dword_address> = cdword-value>

All of these commands can be used whether or not the user’s program is running.

DWORD cdword-address>

Thisform is used to examine and then possibly change one or more sequential

DWORD variables. When this command is invoked iECM-96 will display the cdword-address> symbolically if a valid symbol exists for that cdword-address>. Whether or not the symbolic display occurs, iECM-96 will display the cdword-address> in hexadecimal notation, the value of the DWORD in the default base and wait for an input from you. You can respond with a CARRIAGE-RETURN character, an ESC character, or by enterin a numeric value. A CARRIAGE-RETURN will terminate the command. An ES 8 will result in the display of the next sequential DWORD variable. If a numeric value is entered then the DWORD variable will be set to this value and the iECM-96 will again wait for input. At this point

you can respond only with an ESC or CARRIAGE-RETURN. As before, the ESC will

z@;i;hde next sequential DWORD and the CARRIAGE-RETURN WIII terminate the

DWORD cdword-address> = cdword-value>

This form is used to set an individual DWORD variable without first checking its current value. When invoked, this command sets the DWORD variable at

cdword-address> to cdword-value>. DWORD cdword-address> TO cdword-address>

This form is used to display a region of memory as a sequence of DWORD variables. When this command is invoked, iECM-96 will start by displaying the current default base and then a series of lines showing the contents of the selected memory

region. If a symbol exists in iECM-96’s symbol table for the next cdword-address>

then this symbol will be displayed. Whether or not the symbolic display happens, the next line will start with a hexadecimal display of the address of the next DWORD variable to be displayed followed by the display of up to 16 bytes of memory as

DWORD variables in the default base. A new line will be started whenever 16 bytes

of memory have been displayed on the line or a valid symbol exists in iECM-96’s symbol table for the next cdword-address> to be displayed. The command terminates when all of the DWORD vanables in the selected range have been displayed. During lengthy displays you can stop the output to the console by hitting the SPACE bar. Display can be resumed by hitting the SPACE bar a second time. The command can be terminated by entering a carriage return.

DWORD cdword-address> TO cdword-address> = cdword-value> This form is used to initialize a region of memory to the given cdword-value>. Note that this command will take a little over a millisecond (at 9600 baud) for each

DWORD loaded. This command can be terminated by entering a carriage return but this leaves only part of the memory region initialized.

EV80C196KB Microcontroller Evaluation Board User’s Manual -411

REAL Commands

There are four basic forms for the REAL commands:

REAL <real address> REAL <real-address> = <real value> REAL <real-address> TO ere&address> REAL crealIaddress> TO <real-address> = <real-value>

All of these commands can be used whether or not the user’s program is running.

REAL <real-address>

This .form is used to examine and then possibly change one or more sequential

REAL variables. When this command is invoked iECM-96 will display the

<real-address> symbolically if a valid symbol exists for that <real-address>. Whether or not the symbolic display occurs, iECM-96 will display the <real address> in hexadecimal notation, the value of the REAL in the default base and wait for an input from you. You can respond with a CARRIAGE-RETURN character, an ESC character, or by enterin TURN will terminate the command. An ES

a numeric value. A CARRIAGE-RE-

will result in the display of the next sequential REAL variable. If a numeric value is entered then the REAL variable will be set to this value and the iECM-96 will again wait for input. At this point you can respond only with an ESC or CARRIAGE-RETURN. As before, the ESC will display thhnTxt sequentral REAL and the CARRIAGE-RETURN WIII termrnate the com-

REAL <real address> = <real value> This form is-used to set an indkidual REAL variable without first checking its current value. When invoked, this command sets the REAL variable at <real-address> to

<real-value>.

REAL <real-address> TO <real-address>This form is used to display a region of

memory as a sequence of REAL variables. When this command is invoked, iECM96 will display a series of lines showing the contents of the selected memory region.

If a symbol exists in iECM-96’s symbol table for the next <real-address> then this symbol will be displayed. Whether or not the symbolic display happens, the next line will start with a hexadecimal display of the address of the next REAL variable to be displayed followed by the display of up to 16 bytes of memory as REAL variables in the default base. A new line will be started whenever 16 bytes of memory have been displayed on the line or a valid symbol exists in iECM-96’s symbol table for the next <real-address> to be displayed. The command terminates when all of the REAL variables in the selected range have been displayed. During lengthy displays you can stop the output to the console by hitting the SPACE bar. Display can be resumed by hitting the SPACE bar a second time. The command can be terminated by entering a carriage return.

REAL <real-address> TO <real-address> = <real-value> This form is used to initialize a region of memoryto the given <real-value>. Note that this command will take a little over a millisecond (at 9600 baud) for each REAL

loaded. This command can be terminated by entering a carriage return but this

leaves only part of the memory region initialized.

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EV80C196KB Microcontroller Evaluation Board User‘s Manual

STACK Commands

There are two basic forms for the STACK commands:

STACK <stack address> STACK cstackIaddress> TO <stack-address>

Both of these commands can be used whether or not the user’s program is running.

STACK <stack address> This command% useful for accessing a 16-bit variable which is known to be a fixed offset in the system stack. When this command is invoked, iECM-96 executes a “WORD <word-address> command where the <word-addr> is formed by adding <stack-address> to the current value of the system stack pointer.

STACK <stack address> TO <stack-address> This command% useful for accessing a sequence of 16-bit variables which are known to start at a fixed offset in the system stack. When this command is invoked, iECM-96 executes a “WORD <word-address> TO <word-address> command where both <word-address> fields are formed by adding the corresponding <stack-address to the current value of the system stack pointer. During lengthy displays you can stop the output to the console by hitting the SPACE bar.

Display

can be resumed by hitting the SPACE bar a second time. The command can be

terminated by entering a carriage return.

STRING commands

There is only one form of the STRING command: STRING <byte address>

If a symbol exi& for <byte-address> in the iECM-96’s symbol table then this symbol will be displayed. Whether or not the symbolic display happens, the next line will start with a hexadecimal display of <byte-address> followed by the NUL terminated ASCII string starting at that address. For long strings only the first 60 characters are displayed. When trailing characters are stripped, decimal points (“.“) are substituted

for the first three characters stripped.

EV80C196KB Microcontroller Evaluation Board User’s Manual -43-

Processor Variables

Several commands are provided to access variables which are associated with the processor rather than with the program:

PC PC = <byte-address> PSW PSW = <word-value>

gJ=

<word-address>

The processor variables can be modified only while the target is stopped, they can be read at any time. These commands allow the display and loading of the program counter (PC), program status word (PSW) and stack pointer (SP). Display is in the default base.

NOTE: The examination of the SP will be confusing if you don’t understand

the following paragraphs.

The iECM-96 software uses two words in the user’s stack to store the PC and PSW

during a host interface interrupt. When the user displays the SP (or uses the STACK command) the value shown for SP is adjusted by 4 bytes to compensate for

this overhead so that it becomes more or less invisible to the user (the user must

still allow for the extra stack space used). This is convenient but creates confusion if

you display using the SP command and then use the WORD command to look at

location 18H which is the register address of the stack pointer. Location 18H will be

4 less than “SP”. An additional consideration is what happens when you attempt to write into the stack

pointer using the SP command. Before returning from the RISM interrupt service routine (ISR) which actually updates the stackpointer, the RISM places in the stack a return address and associated PSW for the idle loop it executes while the target is “‘stopped”. This prevents the target from getting lost upon return from the ISR. You

should not attempt to modify the stack pointer from the console through the use of

its register address (18H); it should only be modified by the SP commands or by execution of user code in the target. This decreases the possibility of the target getting confused.

Specific implementations of the RISM may actually prevent the user from writing into “WORD 18” and thereby force the user to use the “SP” command.

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EV80CI 96KB Microcontroller Evaluation Board User’s Manual

ASSEMBLY AND DISASSEMBLY

iECM-96 supports the examination and modification of code memory using the standard mnemonics for the MCS-96 assembler (ASM-96). Although standard mnemonics are used, the iECM-96 does not build a symbol table of user symbols as assembly mnemonics are entered. This makes it a single-line assembler (SLA) because references are never made to information entered on other lines. No labels are generated by the SLA, although it canuse labels which are loaded as symbolic information along with object code when a file translated in the debug mode has been loaded. The iECM-96 SLA will accept mnemonics for all instructions which can actually be executed by the target processor. It will not accept “generic” instructions such as BE or CALL which are processed by ASM-96 into standard MCS-96 instructions: It will accept JE and SCALL or LCALL which are the specific instructions the MCS-96 processors understand.

SLA (Single Line Assembly) Commands

The commands which invoke the SLA are:

I44; <code-address>

The SLA is useful for writing short code pieces on-line for testing or patching pro-

rams 9 but is not intended as a replacement for a true assembler such as ASM-96. he SLA can be invoked whether or not user code is running, but there is an obvi-

ous danger in modifying code that is being executed.

ASM <code-addr> This command causes the iECM-96 software to enter the SLA mode. The assembly

program counter (APC) will be set to <codeaddr> and lines of “assembly language” entered by the user will be converted to object code and loaded into the target’s memory. iECM-96 will complain if erroneous inputs are made but will remain in the SLA mode. This mode is terminated by entering the only “directive” understood by

the SLA: END.

ASM This command operates identically to the ASM <code-addr> command except that the APC is not initialized. If this is the first time that the SLA has been used then

APC will be set to 2080H, if it is not then APC will point at the byte following the last

instruction generated by the SLA.

EV80C196KB Microcontroller Evaluation Board User‘s Manual -45

Disassembly Commands

The disassembler converts binary object code in the target memory to ASM-96

mnemonics. There are several commands which invoke the disassembler:

DASM DASM <count> DASM <code-addr> DASM <code addr>,ccount> DASM <codeIaddr> TO <code-addr>

These commands are useful for examining a portion of the program for which list-

ings are not available or for checking program patches, and can be used whether or not user code is running.

DASM This command disassembles the instruction currently pointed to by the user’s program counter (PC).

DASM <count> This command reads the current value of the user’s program counter (PC) and disassembles <count> instructions starting at that location. The parameter <count>

must be less than 256T (lOOH) so that the command parser can distinguish this command from the command “DASM <code addr>. This restriction does not apply to the DASM ccode_addr>,ccount> instruction. During lengthy displays you can stop the output to the console by hitting the SPACE bar.

Display can be resumed by

hitting the SPACE bar a second time. The command can be terminated by entering a carriage return.

DASM <code_addr> This command disassembles the instruction at <code-addr>. The parameter <code addr> must be greater or equal to 256T (1 OOH) so that the command parser can distinguish it from the DASM <count> instruction.

DASM <code-addr>,ccount> This command disassembles <count> instructions starting with the one at <code-addr>. During lengthy displays you can stop the output to the console by hitting the SPACE bar. Display can be resumed by hitting the SPACE bar a second time. The command can be terminated by entering a carriage return.

DASM <code-addr> TO <code-addr> This command disassembles the region of memory specified. If an instruction crosses the ending address of the region it will be completely disassembled before the command terminates. During lengthy displays you can stop the output to the console by hitting the SPACE bar. Display can be resumed by hitting the SPACE bar a second time. The command can be terminated by entering a carriage return.

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EV80C196KB Microcontroller Evaluation Board User’s Manual

SYMBOL OPERATIONS

iECM-96 supports several commands dealing with symbolic information that can be loaded along with object code. The commands are:

SYMBOLS SYMBOLS OFF ;~~I’;LS ON

An additional command, “LOADSYM <filename>” can be used to load iECM-96’s symbol table without affecting the target’s memory. This command is described in the section “File Operations”.

SYMBOLS This command displays the symbols that are currently in iECM-96’s symbol table.

SYMBOLS OFF This command suppresses searching the symbol table during output. It does not prevent the use of the symbol table during input. This command is provided because symbolic output with large symbol tables can be very slow.

SYMBOLS ON

This command reenables symbolic output.

FLUSH

This command deletes all the symbols currently in the symbol table.

EV80C196KB Microcontroller Evaluation Board User’s Manual -479

RISM

This section will describe the elements of the RISM which will be common to all.

implementations. Additional documentation of this implementation is in appendices B and C.

RISM Variables

RISM DATA RISM-DATA is a 32-bit register which acts as the primary data interface between

software running in the host and the RISM running in the target.

RISM *ADDR RISM-ADDR is a 16-bit register which contains the address to be used for reading

and whiting target memory.

RISM STAT RISMSTAT is an 8-bit register used to store RISM status and state information.

This register contains the following Boolean flags:

DLE FLAG

Thisflag indicates the next character received by the RISM should be treated

as a data byte even if its value corresponds to an implemented command.

RUN FLAG

This flag indicates that the target is running user code. TRAP FLAG

This flgg indicates that the target was running user code but that a software TRAP occurred which suspended its execution.

DIAGNOSTIC FLAG This is an optional flag that indicates that the target is operating in a diagnostic mode. The details of this are implementation dependent.

USER PC

USER-PC is used to save the user’s program counter while the user’s code is not

execukg 0

USER PSW USER-PSW is used to save the user’s program status word while the user’s code is not executing.

Other Variables Specific implementations of RlSMs will require other variables to be used for tempo-

rary storage.

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EV80C196KB Microcontroller Evaluation Board User’s Manual

RISM Structure

The RISM resides in the target system and provides the interface between the target system and the user interface which resides in the host system. A design goal of the RISM was to keep it compact and simple. This serves two purposes:

1. The RISM can reside in a user’s system with minimal impact on available memory

2. The RISM is easy to port into the target’s environment.

The goals were met by keeping the internal state structure of the RISM as simple as possible. There are only three internal flags which can change the way that the RISM deals with a character sent by the host.

DLE-FLAG: If this flag is set then the next received character is assumed to

be a data byte as opposed to a command byte.

RUN-FLAG: This flag is set if the target is running user code.

It can modify

the operation of some of the RISM commands. TRAP-FLAG: This flag is set if the user code has been halted because it

executed a TRAP instruction. The TRAP-FLAG is cleared whenever the RISM starts the execution of user code.

Receiving Data from the Host

When the RISM receives a character from the host its first task is to determine if it

represents a command or data. If the character is less than 32 (decimal) then it is assumed to be a command, if not then it is taken to be data. If the host needs to send a data byte which has a value less than 32 then it first must issue a SET-DLE command. If the DLE-FLAG is set then the next character received by the RISM will

be interpreted as data (even if it is less than 32) and then the DLE-FLAG will be cleared. Once the RISM has determined that the received character is a data byte it processes it by shifting the 32-bit RISM-DATA register left eight places and then placing the data byte in the lower byte of the RISfv’l-DATA register. The data shifted out of the upper byte of the RISM-DATA register IS discarded.

Sending Data to the Host

When the host expects data to be returned from the RISM it sends a TRANSMIT command byte and waits for a response. The RISM transmits the lower byte of the 32-bit RISM-DATA register and right shifts the RISM-DATA register right by eight bits. As part of this command the RISM increments Its RISM-ADDR register. The

RISM only transmits data in response to an TRANSMIT command, never on its own

initiative or even in response to other commands from the host.

EV80C196KB Microcontroller Evaluation Board User’s Manual -49-

RISM Commands

This section will detail the operation of each of the commands sent to the RISM.

SET-DLE-FLAG ( Code OOH ) This command sets the DLE-FLAG. This will force the next character received by the RISM to be treated as data even if its value corresponds to a RISM command. The code which overrides the normal selection of command or data also clears the

DLE-FLAG so that it applies only to the first character received after the

SET-DLE-FLAG command. TRANSMIT ( Code 02H )

This command will transmit the lower eight bits of the RISM-DATA register to the

host, right shift the data register eight places, and increment the RISM-ADDR register. Sequential TRANSMIT commands are used to read the RISM-DATA register and the RISM-ADDR re ister indicates the address that corresponds to the least significant byte in the RI M-DATA register. ti

READ-BYTE ( Code 04H ) This command will read the byte of memory pointed to by the RISM-ADDR register and place the result in the least significant byte of the RISM-DATA register.

READ-WORD ( Code 05H ) This command will read the word of memory pointed to by the RISM-ADDR register and place the result in the least significant word of the RISM-DATA register.

READ-DOUBLE ( Code 06H ) This command will read the double-word of memory pointed to by the address

This command stores the least significant byte of the RISM_DATA register in the byte of memory pointed to by the RISM-ADDR register and increments the

RISM-ADDR register (by one) to point at the next memory byte. WRITE-WORD ( Code 08H )

This command stores the least significant word of the RISM-DATA register in the word of memory pointed to by the RISM-ADDR register and increments the

RISM-ADDR register (by two) to point at the next memory word. WRITE-DOUBLE ( Code 09H )

This command stores the RISM-DATA register in the double-word of memory pointed to by the RISM-ADDR register and increments the RISM-ADDR register (by four) to point at the next memory double-word.

LOAD-ADDRESS ( Code OAH ) This command loads the RISM-ADDR register with the least significant word in the

RISM-DATA register.

INDIRECT-ADDRESS ( Code OBH ) This command reads the memory word pointed to by the RISM-ADDR and stores it into the RISM-ADDR register. The RISM-DATA register is not modified by this command.

-5O-

EV80C196KB Microcontroller Evaluation Board User’s Manual

READ-PSW ( Code OCH ) This command loads the RISM-DATA register with the PSW (Program Status Word) associated with the user’s code. Most RISM implementations will have to check RUN-FLAG to determine how to access the user’s PSW.

WRITE-PSW (Code OxOD) This command loads the PSW (Program Status Word) associated with the user’s code from the RISM-DATA register. The host software will only invoke this command while user code is not running.

READ-SP (Code OxOE)

This command loads the RISM-DATA register with the SP (Stack Pointer) associ-

ated+with the user’s code.

WRITESP (Code OxOF) This command loads the SP (Stack Pointer) from the RISM-DATA register. This command must also push two values into the newly created stack area. These values are the PC (first) and PSW (second) associated with the idle loop which executes while user code is not running. The host software will only invoke this command while user code is not running.

READ-PC (Code 0x10) This command loads the RISM-DATA register with the PC (Program Counter) associated with the user’s code. Most RISM implementations will have to check RUN-FLAG to determine how to access the user’s PC.

WRITE-PC (Code 0x11) This command loads the PC (Program Counter) associated with the user’s code from the RISM DATA register. The host software will only invoke this command while user code is not running.

START-USER (Code 0x12) This command is responsible for starting the execution of user code, clearing the TRAP-FLAG, and setting RUN-FLAG. The action of this command relies on it

being executed as part of an ISR (interrupt service routine). At the start of the ISR the current PC and PSW are pushed into the stack. If the user code is not running the PC and PSW which are pushed into the stack will be associated with an idle loop which the RISM runs while it waits for an interrupt. The START-USER command deletes the PC and PSW from the stack and replaces them with USER-PC and

USER-PSW. When control returns from the ISR the user’s code will execute rather than the idle loop. The host software will not issue a GO command if the user code

is already running. STOP-USER (code 0x13)

This command is responsible for stopping the execution of user code and clearing the RUN-FLAG. The action of the HALT command mirrors that of the GO com-

mand. In the case of the HALT command the user’s PC and PSW are pushed into

the stack upon entry to the ISR. The STOP-USER command saves this user infor-

mation in USER PC and USER-PSW and replaces it with PC and PSW values

which are asso&ted with the idle loop. When control returns from the ISR the idle

loop will execute rather than the user’s code. The host software will not issue a HALT command unless the user code is running.

EV80C196KB Microcontroller Evaluation Board User’s Manual -5%

TRAP ISR This isa pseudo-command. It can not be issued directly by the host software but is executed when a TRAP instruction is executed. The TRAP instruction is used by

iECM-96 to implement software breakpoints and single stepping. A separate entry

point into the STOP-USER is provided for the TRAP vector. Code at this entry point sets the TRAP-FLAG and then drops into the code which implements the STOP-USER command.

REPORT-STATUS (Code 0x14) This command loads the least significant word of the RISM-DATA register with status information. Valid status values are:

*O--Indicates that user code is stopped

(RUN-FLAG and TRAP FLAG are both FALSE).

1 --Indicates that user code is running

(RUN-FLAG is TRUE)

2--Indicates that user code executed a TRAP instruction

(TRAP-FLAG is TRUE)

The host software will periodically poll the target system to check on its status and this polling can rob execution time from the user’s program. This loss of target

processor cycles can be avoided by setting the Ring Indicator modem status line

signal whenever the RUN-FLAG is set. The host software will assume that the target is running user code whenever it detects the ring indicator and will only issue

REPORT-STATUS commands if the ring indicator is off. MONITOR-ESCAPE (Code 0x15)

This command provides for the addition of RISM commands for special purposes; it uses the RISM-DATA register to extend the command set of the RISM. The basic

RISM requires only one of these “extended” commands; if the lower 16-bits of the RISM-DATA register is one (RISM-DATA = OXXXXOOOl H) then the target proces-

sor should execute either a RST (ReSeT) instruction or a software initialization

routine. Start Up Commands (‘I/” or ‘7”)

Upon reset the board is in the echo mode. Until it receives an ASCII slash (‘I/“) or reverse-slash (‘7”) it should increment every character it receives from the host and send the incremented value back to the host.

It will also display the binary code of

the character received on the Port 1 LED’s. If a reverse-slash is received by the

RISM it will leave the echo mode (set USER MAP flag true), remap memory and start normal operation. If a slash is receivedyt will stop echoing incremented received data and start responding to RISM commands with the diagnostic flag set. In this mode there are diagnostic routine resident in EPROM which are useful for debugging the board. See the -DIAG option under Initiating and Terminating IECM96 in the USER INTERFACE section of this manual for additional information on the

Diagnostics Mode.

Appendix A.

Schematics and Parts List

---Y

“C

t t

80C196KB Evaluation Board CPU Section

Revised: December 27, 1988 Revision: 2.0

EC0 Applications Engineering

Bill Of Materials December 27, 1988

15:53:23

Page

1 Of 2

Item Quantity Reference

Part

Vendor Manuf. Part#

1 1 2

1 3 2 4

3 5 1 6 1 7

1 8 1 9 1

11 1 12 2 13 1 14

16 1 17 1 18 2 19

25 1 26

27 1 28

8OC196-PLCC INTEL INTEL N80Cl96KB12 82510 INTEL INTEL P82510 JEDEC 28PIN

INTEL INTEL D27C64

JEDEC 28PIN Sterling Hitachi

HM6264P-10 74ACOO Hamilton Fairchild 74ACOOPC 74AC08 Hamilton Fairchild 74AC08PC 74AC14 Hamilton Fairchild 74ACl4PC 74AC32

Hamilton Fairchild 74AC32PC

74AC74

Hamilton Fairchild 74AC74PC

74AC112 Hamilton GE/RCA

CD74AC112E 74AC240 Hamilton Fairchild 74AC240PC 74AC373 Hamilton Fairchild 74AC373PC 14C88 Hamilton National

DS14C88N 14C89

Hamilton National DS14C89N

22VlO

Luscombe Cypress PALC22VlO-3SPC

PMIREF02 Hamilton PM1

PEFOZHP

LM358N Hamilton diode

Hamilton

(811N4305

resistor Sterling Dale

MDP-1603-271G

cap

Hamilton Sprague 926CX7R562KOSOB

12MHz Sterling M-TRON

MP-1 12.0000

18.432MHz

Sterling M-TRON

MP-1 18.4320

RESET

Digi-key Panisonic P9950

184305 Hamilton

lN4305

HDSP-48XX

Sterling Lite-On LTAlOOOG

180 Hamilton Mepco

CR25-180

4.7K

Hamilton Mepco CR25-4.7K

1OK Hamilton Mepco

CR25-1OK

1OOK

Hamilton Mepco

CR25-100K

1M Hamilton Mepco

CR25-1M

31 1 32 1 33 4 34 3 35

u5 u20 Ul,U8, U6,U13,U14 u17 u21 u2 U16 u7 UlS u9 UlO,Ull U18 u19 u12 u4 u3 D2,Dl

c2 Xl

DS,D3,D4,D6,D7 DPl RlO R5 R2 Rl,R7,R18

R6,R4,R8,Rg,Rll,R12,Rl3, R14,R15,R16,R17

RP2

RPl

C4,CS,C36,C38

C12,C6,C18

Cll,C3,C8,C9,ClO,C13,Cl6,

c17,c19,c2o,c21,c22,c23, C24,C25,C26,C27,C28,C30, C32,C33,C34,C35

180 ohm SIP Hamilton Bourns

4610X-101-181

10K POT Hamilton Bourns

3009P-l-103

3OpF

Hamilton Sprague

lClOCOG330J050B

.OluF

Hamilton Sprague

1ClOZ5U103M050B

O.luF

Hamilton Sprague

1C1025U104M050B

36 4

Cl,C7,C14,C15

l.OuF Hamilton Sprague

15OD105X9015A2

37 2

c31,c37

6.8uF

Hamilton Sprague

199D685X9035DAl

80C196KB Evaluation Board CPU Section

EC0 Applications Engineering

Bill Of Materials

December 21,

988 15:53:23 Page

2 of 2

Revised: December 27, 1988 Revision: 2.0

Item Quantity Reference

Part

Vendor

Manuf. Part#

1 39 * 2 40 3 41

42 43 44 45 46

c29 Pl;P2 E2,E16,E19 E7,El,E3,E4,ES,E6,E8,E9,

E10,Ell,E12,E13,E14,El7~ E18,E20

El5 JP4 JPl JP2 JP3

22uF DB9 Female 2PIN JUMPER 3PIN JUMPER

Hamilton Sprague lSOD226X9015B2 Sterling AMP

207084-l Marshall A P Prod. Marshall A P Prod.

4PIN JUMPER Marshall A P Prod. POWER CONNECTOR Hamilton Molex 09-74-1041 CON26

Marshall A P Prod. 929665-01-36

CON50

Marshall A P Prod. 929665-01-36

CON60

Marshall A P Prod. 929665-01-36

Appendix B.

Specific iRlSM Information

APPENDIX B Specific iRlSM Information

The EV80C196KB is designed to be a software evaluation tool for the ROMless 8OC196KB 16-bit microcontroller. As such, ports 3 and 4 are not available for use as l/O ports unless offboard latches/buffers and decoding logic are used. All unreserved functions of the 80C196KB are available to you except for the Non-Maskable

Interrupt (NMI), the TRAP instruction, and 512 bytes of address space. The Chip Configuration Byte is also used by the monitor, but most of its functions are provided by external logic.

Reserved Functions

The NMI pin is reserved for use by the Host Interface.

In order for the Host Inter-

face to function properly, jumper-shunt E7 must be installed from B-C. However, if

your application demands the use of NMI (available on JP3), you can alter the RISM source file (96KBRISM.A96, included on your disk) to use EXTINT instead of NMI, and change jumper-shunt E7 to A-B.

The TRAP instruction is reserved.

On the EV80C196KB jumper shunt E20 must be installed from B to C for the RESET SYSTEM command to work properly. If you wish to run code in the board while it is not connected to a host, you should remove jumper shunt E20 prior to disconnecting

the board from the host. If E20 is left installed, the board may reset as the connection is broken.

Reserved Memory

User ROMsim as shipped is 24K bytes from address 2000H to 7FFFH. The board is reconfigurable to accept various memory devices. However, breakpoints and pro-

gram stepping will not operate when your code is in EPROM or other nonchange-

able memory. Normally you should write your code to begin at address 2080H and

download it to ROMsim using iECM-96. Two words of user stack space must be reserved for use by the iRISM-96 software

while the board is processing a host interrupt.Register locations 30H-38H are reserved for use by the iRlSM monitor code. You must ensure that no registers in this

partition are used by code which is to operate with the RISM. The easiest way of

doing this is to generate an ASM-96 module which declares an RSEG at 30H which

is nine bytes long. This module can then be linked into the final program to prevent

the linker from assigning these registers to some other module. You must not alter the TRAP vector at 2010H or the NMI vector at 203EH.

Memory from 2014H-202FH is reserved for use by the iRlSM monitor.

Appendix C.

Listing of iRISM-196KB

MCS-96 MACRO ASSEMBLER

EV96

DOS 3.20 (038-N) MCS-96 MACRO ASSEMBLER, i/l 2

SOURCE FILE: 96KBRISM.A96 OBJECT FILE:

96KBRISM.OBJ

CONTROLS SPECIFIED IN INVOCATION COMMAND: DEBUG

01/24/89 13:55:41 PAGE 1

ERR LOC OBJECT

LINE

3 4 5 6 I 8 9

10 11 12 13 14 15 16 17

18 19 20 21 22 23 24 25 26

28 29

30 31 32 33 34 35 36

38 39 40

SOURCE STATEMENT

EV96 module main

;

================

: ;

This file contains a RISM designed to operate the EV80C196KB evaluation

; board. It includes the required RISM features and the optional diagnostic

; mode.

The board also supports remapping the memory space after reset.

This allows the RISM code to gain control on reset and, after the

;

initialization routines are complete,

remap memory so that user code ; can be loaded into RAM at the reset location (2080H). ; i

The serial link is provided by an external UART (82510) with the received

;

data interrupt tied to the NM1 (Non Maskable Interrupt) of the processor.

The use of the NM1 for this purpose allows the user to maintain control

;

of the system even if the running program locks out the interrupts or

;

modifies the mask register.

; ; In addition to the NM1 and its vector,

this RISM uses the following ; resources: ; ,

Two words in the system stack

i ;

The TRAP instruction and its vector ; ;

External memory partitions (OOOOH-OOFFH), ;

(lDOOH-lEFFH), and

;

(2014H-202FH)

i ;

( Note that all of these partitions,

(except lDOOH-1EFFH and

;

2018H),

are reserved by the MCS-96 architecture. ) ; i

Nine bytes of registers in the partition

(30H-38H).

The

user must ensure that no registers in this partition are used

;

by code which is to operate with the RISM.

The easiest way of

;

doing this is to generate an ASM-96(tm) module which declares an

;

RSEG at 30H which is nine bytes long.

This module can then be

;

linked into the final program to prevent the linker from assigning

these registers to some other module.

ieject

MCS-96 MACRO ASSEMBLER

EV96

ERR LOC OBJECT

0000

0002 0002 0003 0003 0004

0004 0006 0006 0007 0008

0009

0011 0011 OOOA OOOA oooc OOOE OOOE OOOF

0010 0015

0015

0016 0016 0017 0018

LINE

4i 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56

57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 12 73 74 75 76 77 78

79 80 81 82 83 84 85 86 87 88

89 90 91

01/24/89 13:55:41 PAGE 2

SOURCE STATEMENT

;

Define symbols for the register mapped I/O locations

;

--_-------------------------------------------------

; zero

0OH:word

; R/W

equ

02H:byte

i R

03H:byte

i R

equ

03H:byte

;

04H:word

i R

04H:word

;

equ

06H:byte

i R

06H:byte

;

equ

07H:byte

i R/W

equ

08H:byte

i R/W

equ

09H:byte

i R/W

llH:byte

;

llH:byte

i R

equ

0AH:byte

;

equ

0AH:word

: R

equ

0CH:word

; R

0EH:byte

; R

equ

0EH:byte

;

equ

0FH:byte

i R/W

10H:byte

i R/W

equ

15H:byte

equ

15H:byte

i R

equ

16H:byte

; w

16H:byte

; R

17H:byte

;

equ

18H:word

i R/W

Zero Register ad command ad-result lo abresult:hi hsi mode hsi-time hso-time hsi-status hso:command sbuf

int mask

int-pending spcon spstat

watchdog

timer1 timer2 port0 baud-reg ioportl ioport2 ioc0 ios0 iocl iosl pwm-control

A to D command register

Low byte of result and channel

High byte of result

Controls HSI transition detector

HSI time tag

HSO time tag

HSI status register (reads fife)

HSO command tag

Serial port buffer

Interrupt mask register Interrupt pending register Serial port control register Serial port status register

Watchdog timer

Timer1 register Timer2 register I/O port 0 Baud rate register I/O port 1 I/O port 2 I/O control register 0 (HSI/O)

I/O status register 0 I/O control register 1 (Port2)

I/O status register 1 PWM control register System stack pointer

This section defines utility macros non-specific to this program

; ----___________-------------~~~--------------------~~~~~~~~~~~~~

&FINE-BIT

macro name endm

SET-BIT macro

orb endm

CLR-BIT

macro andb endm

Seject

macro bnc endm

name,bitnum equ bitnum

regnum,bitnum regnum,#( 1 SHL (bitnum mod 8) )

regnum,bitnum regnum,#not( 1 SHL (bitnum mod 8) )

label label

MCS-96 MACRO ASSEMBLER

EV96

01/24/89 13:55:41 PAGE 3

ERR LOC OBJECT

LINE

92 93 94 95

8000

96 97 98 99

0000

100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119

120 121 122 123 124 125 126 127

SOURCE STATEMENT

; This section contains EQUates which may change with different versions

; _---------------------------------~~~~~~~~~~~--~---~~-~-~--~-~-~~--~-~

offset

equ

8000H

; Code offset before REMAP

;

Tell the commands what to use for psw while monitor is running

rism-psw

OOOOH

;

ko Interrupts enabled

This section contains several macros generate specifically for this program

;

-----_--_------------------------------------------------------------------

; ENTER RISM i

-A macro which generates the prologue for the RISM ISR

i EXIT RISM

;

A macro which generates the epilogue for the RISM ISR

; ; SEND DATA BYTE

A macro which passes the lower eight bits of RISM-DATA to

;

the serial port,

it assumes the port is ready for data

;

; BYTE-PROTECT

A macro which terminates the RISM ISR if the RISM is about

to write into a byte it should not modify.

; i WORD PROTECT

A macro which terminates the RISM ISR if the RISM is about

;

to write into a word it should not modify.

i DWORD PROTECT ;

-A macro which terminates the RISM ISR if the RISM is about

;

to write into a double-word it should not modify.

; $eject

MCS-96 MACRO ASSEMBLER EV96

ERR LOC OBJECT

LINE

150 151 152 153 154

OOlC

155 156 157

OOlC

158 OOlC 159 OOlD 160

OOlE

161

0020 162 0022 163

164

165

01/24/89 13:55:41 PAGE 5

SOURCE STATEMENT

;

These registers are used only by the diagnostic routines. ; ;

They are not required for normal execution.

rseg at lch

--------___

ax: dsw

equ

ax:byte

equ (axtl):byte

dx:

dsw 1

bx:

dsw

cx:

dsw

ie ject

MCS-96 MACRO ASSEMBLER EV96

01/24/89 13:55:41 PAGE 6

ERR LOC OBJECT

00 30

0030 0034

0036

0038

003A

003c

2020

2020 2022

LINE

<b6 16, 168 169 170 171 172 173 174 175 176 177 178 179 180 181 183 185 187

189 191 192 193 194 195 196 197 198 199

200 201 202 203

204

205

206 207

;OUR(:E STATEMENT

‘These registers MUST be reserved for the RISM

rseg at 30H

;

RISM DATA: RISM-ADDR:

dsl

;

The RISM data register

dsw

;

The RISM address register

tempw: dsw

;

Temp for use by monitor

tempb

tempwzbyte

char

tempw:byte

RISM-STAT:

dsb 1

;

Contains rism state flags

DEFINE BIT DEFINE-BIT

DLE-FLAG,0

DEFINE-BIT

RUN-FLAG,2 TRAP FLAG,1

DEFINE-BIT

USER-MAP,3

DEFINEIBIT DIAGNOSTIC FLAG,7

;

These variables are used by the monitor when in diagnotic mode only.

; --------------------------------------------------------------------

dUSER_PC: dsw 1

;

Saves user's pc during halt

dUSER-PSW: dsw 1

;

Saves user’s psw during halt

;

dseg at 2020H

-------------

;

These variables are used in the normal (non-diagnostic) mode

; _______-_______--_--____________________--------------------

;SER PC: USERIPSW:

Seject

dsw 1

;

Saves user's pc during halt

dsw 1

;

Saves user’s psw during halt

01/24/89 13:55:41 PAGE 7

,( ~rlHt:k XATEMENT

I’he serial channel is provided by an external 82510 UART which uses the NM1

as an interrupt to the processor.

The addresses associated with this

: device are defined below.

MCS- 96 MACRO ASSEMBLER EV96

EOll

EOO

i RUO lEO0

lEO1 lEO1 lEO2 lE03 lE04 lE05 lE06 lEO7 lEO0 lEO4

Nb 1,”

‘f,q

, I/

'Ii 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253

;

dseg at lEOOH

-------------

uart:

dsb

txd rxd baud a lo

baud a hi

gener-enabl general-int line-config modem contr line status

modem stats addr GontrO

clock-confg

io mode

1OOH

-7” eq” equ equ equ equ equ ew equ ew equ

uart :byte ; bank0 (if dlab=O) or bank1 uart :byte

;

bank0 (if dlab=l)

uart+l :byte

;

bank0 (if dlab=l) uart+l :byte ; bank0 (if dlab=O) "art+2 :byte

; bank0 "art+3 :byte ; bank0 uartt4 :byte ; bank0 uartt5

:byte ; bank0 uartt6 :byte ; bank0 uartt7 :byte ; bank0 uart

:byte ; bank3

uartt4 :byte ; bank3

;

The memory map of the board is changed by reading or writing to an

; address between lOOOH and 1DFFH.

In this code, this is accomplished by

;

branching to address lOOOH to continue RISM execution.

The memory map

; of this board, both before and after RESET, are as follows:

;

; Address

; OOOO-OOFFH as data

Internal Reg. file

; OOOO-OOFFH as code

RISM Monitor EPROM ; OlOO-1CFFH Unused ; lDOO-1DFFH

RISM Monitor EPROM ; lEOO-1EFFH External UART (U20) ; lFOO-1FFFH Unused (Port 3 & 4) ; 2000-2013H

RISM Int. Vect. EPROM ; 2014-202FH

RISM EPROM ; 2030-203FH RISM Int. Vect. EPROM ; 2040-207FH

Unused RISM EPROM ; 2080-27FFH

RISM Monitor EPROM ; 2800-5FFFH

16-Bit Code/Data RAM

; 6000-7FFFH

a-Bit Code/Data RAM

; 8000-FFFFH Unused

Seject

After RESET

After REMAP

Internal Reg. file RISM Monitor EPROM Unused--User expansion possible RISM Monitor EPROM External UART (U20) Unused (Port 3 & 4) User Int. Vect. RAM (NOT TRAP!) RISM Data RAM User Int. Vect. RAM (NOT NMI!) User Data RAM User 16-Bit Code/Data RAM User 16-Bit Code/Data RAM User a-Bit Code/Data RAM Unused--User expansion possible

MCS--96 MACRO ASSEMBLER EV96

ERR LOC OBJECT

A000

A000 0040 A002 0041 A004 0042 A006 0043 A008 0044 AOOA 0045 AOOC 0046 AOOE 0047 A010 3BlD

A012 0048

A018

A018 FF

A030

A030 0049 A032 004A A034 0048 A036 004C A038 004D A03A 004E A03C 004F A03E 0000

LINE

254

255

156 251

258

259 260 261 262 263 264 265 266 267 268 269 270

271 272 213 274 275 276 277 278 279 280 281

282 283 284 285 286 287 288 289 290 291 292

293 294 295 296 297

01/24/89 13:55:41 PAGE 8

iOURCE STATEMENT

cseg at (offset + 2000H)

_________----------- -_--

;

Interrupt service routine addresses to be used in RiSM EPROM. ; Note: ;

Of all these interrupt vectors,

only the NM1 and TRAP vectors are required

for operation of the RISM.

The other vectors are provided as fixed entry

;

points for routines which may be loaded into RAM in the diagnostic mode.

In the diagnostic mode memory at the interrupt vectors is mapped to EPROM

so it is not possible to write into the vector table.

;

(In the normal (i.e.

non-diagnostic mode) the interrupt vector table is

mapped to RAM so the vectors can be loaded as part of the normal process

;

of loading a user's object code.

timer-overflow:

dew

4000H

ad done: dew

4100H h.sT data: dew 4200H hso-event: dew

4300H hsilzero:

dew 4400H software-timer: dew 4500H serial-port: dew

4600H

external-int:

dew

4700H

trap:

dew (break-offset)

invalid-opcode: dew

4800H

;

cseg at (offset t 2018H)

;

____________--______----

;

chip-config: dcb

OFFH

; Enable no CCB modes

cseg at (offset + 2030H)

;

_----_______--______----

serial-txd: serial-rxd: hsi-entry-4: timerZ_capture: timer2-overflow: external-int-pin: hsi-fife-full:

nmi:

$eject

dew 4900H dew

4AOOH

dew

4BOOH dew 4COOH dew 4DOOH dew 4EOOH dew 4FOOH dew

(rism-isr-offset)

-. -.--..-. ..-.. -. --

MCS-96 MACRO ASSEMBLER

EV96

01/24/89 13:55:41 PAGE 9

ERR LOC

OBJECT

A080

5OUKCE STATEMENT

cseg at (offset + 2080H)

--.

A080

A080 FA A081 Al000118 A085 3516FD A088 3516FD A08B C301002000 A090 3516FD A093 1138

reset vector:

Id bbc bbc

st bbc clrb

;

A095 818036

A098 C701031E36

ldb

stb

sp,#lOOH iosl,5, $ iosl,S, $ zero,

2000H iosl,5, $ RISM STAT

tempb, t8OH tempb, line-config[O]

;

A09D B13C36

AOAO C701001E36

AOAS C701011EOO

ldb stb stb

;

Initialize stack pointer ; wait for a timer1 overflow ; . . . two times, ; release uart reset, and wait ; . . . till uart is ready ;

Initialize rism mode register

;

set dlab bit in line-config reg...

;

so that baud-a reg's are accessable

; set baud rate to 9600

AOAA 810336

AOAD C701031E36

ldb stb

tempb, #3CH tempb, baud a lo[O]

zero, baud a hi[O]

tempb, t03H tempb, line-config[O]

;

AOB2 B16036 AOBS C701021E36

ldb tempb, #60H stb

tempb, general-int[O]

;

set up uart line config reg for no...

: par,

1 stop, Ebit, and txd rxd access

; switch to bank3

AOBA 815036 AOBD C701001E36

ldb tempb, #50H

;

select baud rate gen. a for both...

stb

tempb, clock-confg[O]

; rx and tx clock source

;

AOC2 B17F36 AOC5 C701041E36

ldb tempb, X7FH stb

tempb, io-mode[O]

;

select OUT1 mode on pin 12

AOCA C701021EOO

stb

zero, general-int[O]

; switch to bank0

AOCF B10136 AOD2 C701011E36

ldb tempb, #OlH

;

enable recieve fifo interrupt...

stb

tempb, gener-enabl[Ol

; of the uart

;

AOD7 A1000036 AODB C836 AODD F3

i_ I NL

'98 199 100

(01 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343

push POPf

tempw, #rism-psw tempw

; value for rism and initial user value ;

Set up psw for the monitor

;

load psw with rism value

;

AODE 1136 AOEO 28Fl

AOE2 27FE

clrb char call flash leds

$ -

; show life to user ;

wait for interrupt

;

Seject

MCS-96 MACRO ASSEMBLER

EV96

01/24/89 13:55:41 PAGE 10

ERR LOC OBJECT

LINE

144 (45 346 347 348

349 350 351 352 353 354 355

356 357 358 359 360 361 362 363 364 365 366 367 368 369 370

371

372

374

375

376

377

;OIJRCE STATEMENT

AOE4 AOE4 3F3849 AOE7 C40F36 AOEA 1736 AOEC C701001E36 AOFl 1536 AOF 992F36 AOF DF15

AOF 995C36 AOFB DFO3E713DF

A103 BlFFOF A106 A1000118 AlOA E7F3FB

This code is entered from the nmi isr if the user memory map is not turned

I on. This is the echo mode and diagnostic mode of the board.

;

If the diagnostic flag is clear, the board is in echo mode.

Any characters

; received from the host are incremented and sent back to the host.

They

;

are also tested for the set user command (I\') or the set diagnostics

;

command ('/').

If either command was sent it is carried out. : ;

If the diagnostic flag is set,

the program branches to the diag. mode code.

; ___----------___-___-----------------~~--~-----------------------~--~~~~~~~

not user:

bbs

stb inch stb

decb

cmpb

bne

RISM-STAT, DIAGNOSTIC-FLAG, diag-mode char, ioportl

;

splash received char on leds

char

; send back incremented char char, txd-rxd[Ol char char, #('/'J : '/'

marks end of serial test...

set-diag

;

and beginning of diagnostic mode

char, #('\'I

;

'\I marks end of serial test...

exit

;

and beginning of user mode

;

: This code places the board in user mode until the next RESET occurs, or

;

until RISM-STAT gets altered somehow.

It branches to a location which

;

does not get remaped, and there,

a remap will be performed.

; _-__-------_____________________________--~~~~~~~----------~~~~~-~~~~~~~~

SET-BIT RISM-STAT, USER-MAP

ldb

ioportl, #Offh

reintialize ioportl

sp, #lOOH

; clear stack

br user-setup

378 Seject

MCS-96 MACRO ASSEMBLER

EV96

01/24/89 13:55:41 PAGE 11

ERR LOC OBJECT

i,l NE

( ‘9 I 8 0 ia1 (82

i83 384 385

AlOD 386

387

All0 A1000118 389

A114 A1000036

390

Ail8 CO3C36 391

392

AllB A1002236 393 AllF C03A36

394 395

Al22 396 A122 B1550F

397

Al25

398

A125 3516FD

399

A128 3516FD

400

A12B 95FFOF 401 A12E 27F5

402 403 404

>OIIH('h ;TATEMENT

l'his code places the board in diagnostics mode until the next RESET or

RISM STAT gets altered somehow.

The user's PC is loaded with the ; address of the memory test and a 55H/OAAH pattern flashes on the ; ioportl LEDs while the monitor is waiting for a command.

; ----------------------------------------------------------------------

set diag:

SET BIT RISM STAT, DIAGNOSTIC FLAG

Id -

sp, ltlOOH

; clear stack

Id tempw, trism-psw

; value for rism and initial user value

tempw, dUSER PSW

;

store rism psw as initial user psw

tempw, #(mem-tst-offset)

;

Set up user pc

tempw, dUSER_PC

diag-pause:

ldb ioportl, #55h

diag-pause-loop:

bbc iosl,S, $ bbc

iosl,5, $ xorb ioportl, #Offh br

diag-pause-loop

Seject

; wait for a timer1 overflow ; . . .

twice

;

invert ioportl

MCS-96 MACRO ASSEMBLER

EV96

01/24/89 13:55:41 PAGE 12

ERR LOC OBJECT

IdINE

SOURCE STATEMENT

405 406 ,

This code is executed to interpret a host command when this RISM is in

A130 A130 303803E7FCDE Al36 991F36 Al39 D103E7F7DE

A13E A13E ~C3636

A141 643636 Al44 A3374C2136

Al49 E336

407 408 409 410 411

412 413 414 415 416 417 418 419 420 421

;

the diagnostics mode.

; ________________________________________------------------------------

diag-mode:

bbs

RISM-STAT, DLE-FLAG, force-load-data

cmpb

char, #lFH

;

check if byte is a command

load-data

; commands are <= 1FH

diag-command:

ldbze tempw, char

;

table lookup

add

tempw, tempw

tempw, (diag-table-offset) [tempwj

ltempwl

Se ject

MCS-96 MACRO ASSEMBLER EV96

01/24/89 13:55:41 PAGE 13

ERR LOC

OBJECT

A14C

A14C 3DOO A14E 1300 A150 4200 A152 1300 Al54 5700 Al56 5CO0 Al58 6100 A15A 6AOO A15C 6FOO AlSE 7400 A160 7coo Al62 8100 Al64 B421 Al66 Cl21 Al68 8300 A16A CE21 A16C A621 A16E A121 A170 7821 Al72 8D21 Al74 COO0 Al76 4EOO

L, I NE

II/

4Lj

IL4 425 426 421

428 429 430

431 432

433 434

435

436

437

438

439

440

441

442

443

444

445

446

447

448

449

<OUK(:E jTA'I'EMENT

llaq t.able:

dew dew dew dew dew dew dew dew dew dew dew dew dew dew dew dew dew dew dew

dew

dew dew

; Seject

(SET-DLE-FLAG - offset)

; 00

(exit

- offset) ; 01

(TRANSMIT - offset)

; 02

(exit - offset)

; 03 (READ-BYTE - offset) ; 04 (READ-WORD - offset)

; 05 (READ-DOUBLE

- offset)

; 06 (WRITE-BYTE

- offset)

; 07 (WRITE-WORD - offset)

; 08 (WRITE-DOUBLE - offset)

; 09

(LOAD-ADDRESS - offset)

; OA (INDIRECT-ADDRESS - offset)

; OB

(dREAD_PSW - offset)

; oc (dWRITE_PSW - offset) ; OD

(READ-SP - offset)

; OE

(dWRITE_SP - offset)

; OF

(dREAD_PC - offset)

; 10

(dWRITE_PC - offset) ; 11 (dSTART_USER

- offset) ; 12 (dSTOP_USER - offset) ; 13 (REPORT-STATUS - offset) ; 14 (MONITOR-ESCAPE

- offset) ; 15

MCS-96 MACRO ASSEMBLER EV96

01/24/89 13:55:41 PAGE 14

ERR LOC OBJECT i,lNE

450 451 452 453 454 455 456 457 458

459 461 463 464 465 466 467 468 471 472 473 474 475 476 477 478 479

480 481 482 484 485 488 489

5OURCE STATEMENT

Al78

A17E C701041E38

Al83 65040018

Al87 C83A Al89 C83C

A18D

A18D CC3C A18F CC3A A191 A191 C92221 Al94 C90000

A19A C701041E38

, The following routines,

all named beginning with a 'd' for diagnostics,

; are special cases of RISM commands used when the board is in diagnostics

; mode.

;

dSTART_USER:

.---------_

, ;

Flush the pause routine off the stack and set up user's context.

SET-BIT RISM-STAT, RUN-FLAG CLR-BIT RISM-STAT, TRAP-FLAG stb RISM-STAT, modem-contr[Ol ;

update running signal to host

add

sp,#4 push dUSER PC push dUSER:PSW EXIT RISM

;

reset sp to overwrite RISM pc & psw,

;

with user pc &

;

user psw values

&TOP-USER:

: --------i

stops

"user" execution by setting up the stack to return to pause with

all interrupts but serial i/o locked out.

POP

dUSER_PSW

;

remove users psw & pc from stack

POP

dUSER_PC

and save

dset-rism-idle:

push

#(diaggause-offset) ;

the new program counter & psw push Irism-psw CLR-BIT RISM-STAT, RUN-FLAG

stb RISM-STAT, modem-contr[O]

;

update running signal to host

EXIT RISM

; Seject

MCS-96 MACRO ASSEMBLER

EV96

01/24/89 13:55:41 PAGE 15

ERR LOC

OBJECT

LINE

490

AlAl

491 492 493 494

AlAl C03AJO

495

496

499 500

AlA

501 502 503 504

AlA 3A3805

505

AlA A03A30

506 507

AlAE

510

AlAE A3180230

511 512 515 516

iOURCE STATEMENT

<WRITE PC:

- -------

; user-pc:=RISM-DATA.

(Assumes user code is not running)

RISM-DATA, dUSER_PC

EXIT-RISM

BREAD PC:

. ------_

;

RISM-DATA:=user-pc

bbs

RISM-STAT, RUN-FLAG, drpc-running

RISM-DATA, dUS.ER-PC

;

If user code is not running

EXIT-RISM

drpc-running:

RISM-DATA, 2[spl ;

If user code is running

EXIT RISM

ie ject

MCS-96 MACRO ASSEMBLER EV96

ERR LOC OBJECT

AlB4

A184 3A3805 AlB7 A03C30

AlBC AlBC A21830

AlCl

AlCl 3A3805 AlC4 CO3C30

AlC9 AlC9 C21830

AlCE

AlCE CO1830 AlDl 27BE

LiNE

i, '

.T 1 8 119

520

521 522 523 524 527

528

529

532

533

534

535

536

537

538

539

542

543

544

541

548

549

550

551

552

553

554

555

01/24/89 13:55:41 PAGE 16

SOURCE STATEMENT

dREAD PSW:

;

RISM-DATA:=user-psw

bbs

RISM-STAT, RUN-FLAG, drpsw-running

RISM-DATA, dUSER-PSW

;

user is not running

EXIT RISM

drpsw-running:

RISM-DATA, [sp]

; user is running

EXIT-RISM

dWRITE_PSW:

._________

i user-psw:=RISM-DATA

bbs

RISM-STAT, RUN-FLAG, dwpsw-running

RISM-DATA, dUSER_PSW

;

user is not running

EXIT-RISM

dwpsw-running:

RISM-DATA, [spl

; user is running

EXIT-RISM

. --------

, ;

user-sp:=RISM-DATA.

(Assumes user is not running)

st RISM-DATA, sp

dset rism idle

- -

ieject

MCS-96 MACHO ASSEMBLER

EV96

ERR LOC

OBJECT

411,'

AlDD AlDD 090134 AlEO C40F35 AlE3 AlE3 3516FD AlE6 3516FD

AlE9 88003

AlEC D707 AlEE 880034 AlFl D7EA AlF3 27DE AlF5 AlF5 B0360F AlF8 F0

‘NF

,“i

‘H ,14 , ho

'5 6 1 562 563 564 565 566 567 568 569 570 571 572 573 574

575 576 577 578 579 580 581 582 583 584 585

01/24/89 13:55:41 PAGE 17

,is,i leds.

, On a reset this code flashes the LEDs connected to ioportl if they are , enabled.

This is useful to see if the board is executing code properly. ; If a '/' or '\' is received from the host while this routine is executing, ;

it will terminate immediately.

;

fl wait0:

bbc

; fl~loopl:

shl stb

fl waitl:

bbc bbc

;

cv bne

bne br

quit:

ldb ret

; Seiect

586 ~

rism-addr, #OFFH

iosl,5, _

fl wait0

iosl.5, $

: wait for a timer1 overflow ; . . . twice

rism addr, #l

; shift another 1 into or out of

(risk-addrtl), ioportl ; ioportl

iosl,5,

fl-wait1

iosl,5, $

; wait for a timer1 overflow ; . . . twice

char, zero quit rism addr, zero

fl-loop1 flash-leds

; check if char has been received ; if so exit ;

else continue flashing pattern

ioportl, char

; if char was received, restore it

MCS-96 MACRO ASSEMBLER EV96

01/24/89 13:55:41 PAGE 18

ERR LOC OBJECT

A200

A200 910116 A203 OllC A205 0122 A207 OllE A209 1lOF A209 A1002820 A20F A20F C62OlC A212 9A211C A215 D71C

A217 301E04 A21A 151C AZlC 2002 A21E A21E 171C A220 A220 89008020 A224 D7E9 A226 A1002820 A22A 071E A22C 170F A22E BOOF17

A231 27DC A233

A233 AlFFFF22 A237 27FE

:.iNE

78 1 388 589 590 591 592 593 594 595 596 597 598 599 600 601 602 603

604

605

606

607

608

609

610

611

612

613

614

615

616

617

618

619

620

621

622 623 624 625 626 627

iOURCE STATEMENT

cseg at (offset t 2200H)

mem tst:

-----; This is a RAM test for the EV80C196KB board in its 'shipped' configuration. ;

The RAM from 2000H to 27FFH is not mapped during diagnostics, and therefore,

; is not tested.

The test alternates between incrementing and decrementing

;

the test data on even and odd cycles of the test so that a nonrepetitive

;

pattern is produced in memory.

;

---

;

loop:

here:

----

ldb clr clr clr clrb Id

stb cmpb bne

bbc decb br

inch

around:

bne

Id inc inch ldb

failed:

Seject

.-----------_

iocl, #OlH ax

dx ioportl bx, t2800H

al, [bxl al, [bx]+

failed

dx.0, here

al around

bx, #8000H

loop bx, t2800H dx

ioportl pwm-control,

loop

CX, #OFFFFH

.-.

; enable PWM ;

clear data register

;

clear error register

;

clear test count register

starting address of RAM in diag. mode.

; save test data ; check if it is saved, and point to next byte ; if not, test failed

; check if test count is even or odd ; if it is odd, decrement test data

; if it is even,

increment test data

has end of RAM been reached by pointer? ; is not continue, ; else,

return pointer to starting address ; count the test as successful i

show completion to user on LEDs

ioportl ; PWM LED gets brighter as ioportl

;

value gets bigger

go back for another cycle

;

set error register

: end test

Mcs-96 mcrw ASSEMBLER

EV96

01/24/89 13:55:41 PAGE 19

ERR LOC

OBJECT

A280

AL80

A283

A286 C6201C

A28C B2201D A28F 27F2

A2AO

A2A3

A2A6 C22OlC

A2AC A2201E AZAF 27F2

LINE,

hi’8

hLY

6.30

b \ 1

632 633 634 635 637 638 640 641 643 644 645 646 647 648 649 650

651 652 654 655 657 658 660 661 662 663

iOURLE STATEMENT

cseg at (offset + 22808)

------------------------

cycle-byte:

.----_--__

;

does alternate read and write operation on the byte specified by bx.

; _--__----___--__________________________---------------------------

CLR-BIT IOPORT1,7

cb-loop:

SET-BIT IOPORT1,7 stb

ax, [bxl

CLR-BIT IOPORT1,7

ldb

(ax+l),tbxl

br cb-loop

cseg at (offset + 22AOH)

;

--__----_-----_---------

cycle-word:

.--_----_-

;

does alternate read and write operation on the word specified by bx.

; -__--_________-__--_-----------------------------------------------

CLR-BIT IOPORT1,7

cw~loop:

SET-BIT IOPORT1,7

ax, [bxl

CLR-BIT IOPORT1,7

dx, Ibxl

br cw~loop

; Seject

MCS-96 MACRO ASSEMBLER

EV96

01/24/89 13:55:41 PAGE 20

ERR LOC OBJECT

VDOO

9DOO A1000036 9D04 C301222036

VDOV ~1802036

9DOD C301202036

VD12 A13BlD36 9D16 C301102036 9DlB C3013E2000

VD20 9D20 27FE

LINE

664

b65

666 667 668 669 670 671 672 673 674 675 676 677 678 679 680

681 682 683 684 685 686 687

2'0URCE STATEMENT

cseg at (offset t 1DOOH)

;

user setup:

,-----___-

This code completes changing the board into user mode.

The PLD on the

;

board (U12) automatically remaps memory when code from this address

;

range is fetched.

Id tempw, Irism-psw

; value for rism and initial user value

st tempw,

USER-PSW

;

store rism psw as initial user psw

Id tempw, 12080H

;

Set up user pc

tempw,

USER PC

Id tempw, #(break-offset)

tempw, (trap-offset) [O] ; initialize trap vector

zero, (nmi-offset) [O]

; initialize nmi vector

monitor-pause:

br monitor-pause

; wait for a command from the host

$eject

WCS-96 MACRO ASSEMBLER

ERR LOC

OBJECT

9D2?

9D28 C701041E38

9D2D 65040018 9D31 CB012020 VD35 CB012220

9D3B

9D3F 373803374804

VD45

9D45 CF012220 VD49 CFO12020 VD4D 9D4D C9201D VDSO C90000

9D56 C701041E38

EV96

01/24/89 13:55:41 PAGE 21

I.iNE

688

689 690 691 692 693 695 697 698 699 700 701 702

705 706 707 708 709 710 711 713 715 716 717 718 719 720 721

722 723 724 725 726 727 729 730 733 734

SOURCE STATEWF,NT

START USER:

; Flush the pause routine off the stack

SET-BIT RISM-STAT, RUN-FLAG CLR BIT RISM-STAT, TRAP-FLAG

stb-

RISM-STAT, modem-contr[O]

;

update running signal to host

;

add

sp.#4

;

reset sp to overwrite RISM pc 6 psw,

push

USER PC push lJSER:PSW EXIT-RISH

;

with user pc h

;

user psw values

break:

. ----

I ;

This routine is invoked by a TRAP instruction used for breakpointing,

;

it operates somewhat like a STOP-USER instruction.

ENTER-RI% SET-BIT RISM-STAT, TRAP-FLAG

bbs

RISM-STAT, DIAGNOSTIC-FLAG, dSTOP_user

STOP-USER:

. ----

, ;

Stops "user"

execution by setting up the stack to return to pause with

;

all interrupts but serial i/o locked out.

POP

USER-PSW

;

remove users psw 6 pc from stack

POP

USER-PC

; and save

set rism idle:

push

#(monitor-pause-offset) ; the new program counter 6 psw

push

trismgsw CLR-BIT RISM-STAT, RUN-FLAG stb

RISM-STAT, modem-contr[Ol

;

update running signal to host

EXIT RISM

Seject

MCS-96 MACRO ASSEMBLER

EV96 01/24/89 13:55:41 PAGE 22

ERR LOC OBJECT

9D5E

LINE

I35

'36 737 738 739 740 741

742

743 744 745 746 747 748 749 750 751 752 153 754 755 756 757 750 759 760 761 762

SOURCE STATEMENT

command table:

.----_-____-_

9D5E 3DOO 9D60 1300 9D62 4200 9D64 1300 9D66 5700 VD68 SC00 9D6A 6100 9D6C 6AOO 9D6E 6FO0 9D70 7400 9D72 7CO0 VD74 8100 9076 9DOO 9D78 AC00 9D7A B300 9D7C BAOO

9D7E 8DOO 9D80 8600 9D82 221D

9D84 451D 9D86 COO0 9D88 4EOO

;

dew dew dew dew dew dew dew dew dew dew dew dew dew dew dew dew dew dew dew dew dew dew

ieject

(SET-DLE-FLAG - offset) ; 00 (exit

- offset) i 01 (TRANSMIT - offset) ; 02 (exit

- offset) ; 03 (READ-BYTE - offset) ; 04 (READ-WORD

- offset) ; 05 (READ-DOUBLE

- offset) ; 06 (WRITE-BYTE

- offset) ; 07 (WRITE-WORD

- offset) ;. 08 (WRITE-DOUBLE - offset)

; 09

(LOAD-ADDRESS - offset)

; OA

(INDIRECT-ADDRESS

- offset)

; OB

(READ-PSW

- offset) ; oc (WRITE-PSW - offset)

; OD (READ-SP - offset) ; OE (WRITE-SP - offset) ; OF (READ-PC - offset) ; 10 (WRITE-PC - offset)

; 11 (START-USER - offset) : 12 (STOP-USER - offset)

; 13 (REPORT-STATUS - offset)

; 14 (MONITOR-ESCAPE - offset)

; 15

MCS-96 MACRO ASSEMBLER EV96

ERR LOC OBJECT

8000

8001 B301021E36 8006 950436 8009 DFOA 8008 B10136 800E C701011E36

I3013

8015 8015 AFOlOOlE36 801A 383803E7C420 8020 38380F 8023 991F36 8026 D90D

8028 8028 643636 802B A3375ElD36 8030 E336

,INE

'63 '64 165

‘166

767 768 769 770 771 772 773 715 776 777 778 779 780 781 784 705 786

787

788 789 790 791 792 793 794 795 796 791

01/24/t-19 13:55:41 PAGE 23

SOURCE STATEMENT

cseg at (offset + OOOOH)

;

------------------------

; ; rism interrupt service routine ;

------------------------------

Control passes to this point when the rism gets a serial i/o interrupt ; from the host system. ; rism isr:

ENTER-RISM

ldb tempb, general-int[O] ; read uart interrupt status xorb tempb, $OOOOOlOOB ; test for receive fifo interrupt be receive-ready

ldb tempb, XOlH

;

enable only recieve fifo interrupt...

stb tempb, gener-enabl[O]

; of the uart,

mask all others

exit:

EXIT-RISM

, receive-ready:

ldbze tempw, txd-rxd[O] . "char" is low byte of tempw

bbc RISM-STAT,USER-MAP, not-kser bbs RISM-STAT, DLE-FLAG, force-load data

cmpb

char, #lFH

check-if byte is a command

bh load-data ; commands are <= 1FH

process command:

-add tempw, tempw ; convert "char" to word index Id tempw, (command-table-offset) [tempw] br

[tewwl

ieject

MCS-96 MACRO ASSEMBLER

EV96

ERR LOC OBJECT

8032

8035

SO35 OD0830 8038 803630

803D

8042

8047 OCO830 804A 0734

804E

804E 89010030 8052 D7BF

8054 FF 8055 27FE

LINE

'98

199 BOO I301 803

804 805 806 807 808 809 812 813 814 815 816

817

819

822

823

824

825 826 827 828 829 831 832

833 836 837 838 839 840 841 842

843 844 845 846

01/24/89 13:55:41 PAGE 24

WURCE STATEMENT

force-load-data: ;------ --------

CLR-BIT RISM-STAT, DLE-FLAG

load-data: . --------

shll

RISM-DATA, f8

ldb

RISM-DATA, char

EXIT-RISM

;

SET-DLE-FLAG:

;----------; RISM-STAT.O:=SET

;

SET-BIT RISM-STAT, DLE-FLAG EXIT-RISM

TRANSMIT:

; ------; utxd:=RISM_DATA[7..0] ; RISM-DATA:=RISM-DATA >> 8 ; RISM-ADDR:=RISM-ADDR+l

SEND-DATA-BYTE

shrl

RISM-DATA, X8

inc

RISM-ADDR

EXIT-RISM

;

MONITOR-ESCAPE:

; if RISM-DATA=1 then execute reset

cmp

RISM-DATA, #Ol

bne

exit rst br s

: Seject

; make room for new byte

; Execute a reset instruction ;

and loop until reset takes effect

MCS-96 MACRO ASSEMBLER

EV96

ERR LOC

OBJECT

805 7

805.1 B234_(0

805C

805C A23430

8061

8061 A23430

8064 A3340232

806A

806A C63530

806F

806F C23530

8074

8074 C23530 8077 C23532

.JNE

84' H48 d49 850 851 852

853

856

857 858 859 860 861 862 865 866 867 868 869 870 871 872 875

876 877 878 879 880 881 882 883 886 887 888 889 890 891 892 893

896

897

898 899 900 901 902 903 904 905 908

909

01/24/89 13:55:41 PAGE 25

SOURCE STATEMENT

READ BYTE:

-___----

;

RISM-DATA:=byte at RISM-ADDR

Idb

RISM-DATA, [RISM-ADDR]

EXIT RISM

;

READ-WORD:

. --------

; RISM-DATA:=word at RlSM-ADDR

RISM-DATA, [RISM-ADDRI

EXIT-RISM

;

READ DOUBLE:

; RISM-DATA:=double-word at RISM-ADDR

;

RISM-DATA, (RISM-ADDRI

(RISM_DATA+2), 2(RISM_ADDR]

EXIT-RISM

WRITE-BYTE:

._--__---_ i

byte at RISM-ADDR:=RISM-DATA

; RISM-ADDR:=RISM-ADDR+l

BYTE-PROTECT

stb

RISM-DATA, [RISM-ADDR]i

EXIT-RISM

WRITE-WORD: ; --------i word at RISM-ADDR:=RISM-DATA

; RISM-ADDR:=RISM-ADDR+Z

WORD-PROTECT

RISM-DATA, [RISM-ADDR]t

EXIT-RISM

WRITE-DOUBLE:

.____-___---

; double-word at RISM-ADDR:=RISM-DATA ; RISM-ADDR:=RISM-ADDR+I

;

DWORD PROTECT

st RrsM-DATA, [RISM-ADDR]~

(RISM_DATAt2), [RISM-ADDR]t

EXIT-RISM

ieject

MCS-96 MACRO ASSEMBLER

ERR LOC OBJECT

807C

807C A03034

8081

8081 A23434

8086

8086 ~301202030

808D

808D 3A3807 8090 A301202030

8097 8097 A3180230

EV96

LINE

910 911 912 913

914 915 916 919 920 921 922 923 924 925 926 929 930

931 932 933 934 935 938 939 940

941 942 943 944 945 946 949

950 951 954 955

01/24/89 13:55:41 PAGE 26

SOURCE STATEMENT

LOAD-ADDRESS:

;----------; RISM-ADDR:=RISM-DATA

RISM-ADDR, RISM-DATA

EXIT-RISM

INDIRECT-ADDRESS: ;---------------

;

RISM-ADDR:=[RISM-ADDRI

RISM-ADDR, [RISM-ADDRI

EXIT-RISM

WRITE-PC:

. __-----

, ; usergc:=RISM-DATA.

(Assumes user is not running)

RISM-DATA, USER-PC

EXIT-RISM

READ-PC:

. _-----

, ; RISM DATA:=user pc

bbs

RISM-STAT, RUN-FLAG, rpc-running

RISM-DATA, USER-PC

; If user code is not running

EXIT-RISM

rpc-running:

Id RISM-DATA, 2[spl

;

If user code is running

EXIT-RISM

Seject

MCS-96 MACRO ASSEMBLER

EV96

ERR LOC

OBJECT

809D

809D 3A3807

80AO A301222030

80A7 80A7 A21830

80AC

80AC C301222030

80B3

8083 4504001830

80BA

80BA CO1830 80BD E78DlC

8OCO

0000 0001 0002

8OCO A1010030 8OC4 323802274A 8OC9 A1020030 8OcD 3138022741 80D2 A1000030

80D8

LINE

Y56 La5 1 Y58 959 960 961 962 963 966 967 968 971 972 973

974 975 976 977 980 981 982 983 984 985 986 989 990 991 992 993 994

995 996 997 998

999 1000 1001 1002 1003 1004 1005 1006

1007 1008 1009 1012 1013

01/24/89 13:55:41 PAGE 27

SOURCE STATEMENT

READ PSW:

;

RISM-DATA:=user-psw

bbs

RISM-STAT, RUN-FLAG, rpsw-running

RISM-DATA, USER-PSW

user is not running

EXIT-RISM

rpsw-running:

RISM-DATA, [spl

;-user is running

EXIT-RISM

WRITE-PSW:

i -------;

user-psw:=RISM-DATA (Assumes user is not running)

;

RISM-DATA, USER-PSW

;

user is not running

EXIT-RISM

READ-sP: . ------

, ;

RISM-DATA:=user-sp

;

add

RISM-DATA, sp, t4

EXIT-RISM

i WRITE-SP:

. - - - - - - - -

; add four to account for PC and PSW... ; on the stack during this interrupt

: user-sp:=RISM-DATA.

(Assumes user is not running)

RISM-DATA, sp

set-rism-idle

REPORT-STATUS:

;

Report user status: stopped equ 0 running equ 1 trapped equ 2

;

RISM DATA, #running

bbs

RISM-STAT, RUN FLAG, exit

RISM-DATA, #trapped

bbs

RISM-STAT, TRAP-FLAG, exit

RISMIDATA, #stopped

EXIT-RISM

else report stopped

end

MCS-96 MACRO ASSEMBLER EV96

SYMBOL TABLE LISTING

--- ---- - ----_. --_-- ._

NAME

AD COMMAND. AD-DONE AD-RESULT HI. AD-RESULT-LO. ADDR CONTRO

AH.:.....

AL.......

AROUND. . . . .

AX.......

BAUD A HI . . . BAUD-A-LO . . .

BAUD-REG. . . .

BL.:.....

BREAK . . . . .

BX.......

BYTE-PROTECT. .

CB LOOP . . . .

CHAR. . . . . .

CHIP-CONFIG . . CLOCK-CONFG . .

CLR BIT . . . .

CO&ND TABLE .

cw LOOP--. . . .

cx, . . . . . .

CYCLE-BYTE. . . CYCLE-WORD. . . DEFINE BIT. . . DIAG-C&AND. . DIAG MODE . . . DIAG-PAUSE. . . DIAG-PAUSE LOOP DIAG-TABLE: . . DIAGiOSTIC-FLAG

DLE-FLAG. . . .

DREAD PC. . . .

.DREAD-PSW . . .

DRPC RUNNING. . DRPSii-RUNNING . DSET-RISM-IDLE. DSTART USER . . DSTOP-&ER. . .

DUSER PC. . . .

DUSER-PSW . . . DWORD-PROTECT . DWPSW-RUNNING . DWRITE PC . . . DWRITE-PSW. , .

I.. .

. . . . .

........

..... :

........

VALUE

ATTRIBUTES

0002H

A002H

0003H 0002H lE07H 00i~H

OOlCH A220H OOlCH

1EOlH

lEOOH

OOOEH

-----

9D3BH

0020H

-----

A283H

0036H A018H

lEOOH

9D5EH A2A3H

0022H A280H

AZAOH

-----

A13EH

A130H

A122H

A125H

Al4CH

0007H

00OOH

AlACH

AlB4H

AlAEH

AlBCH

A191H

A178H

A18DH

003AH 003CH

-----

AlC9H

AlAlH

AlClH

NULL ABS BYTE CODE ABS WORD NULL ABS BYTE NULL ABS BYTE DATA ABS BYTE REG ABS BYTE REG ABS BYTE CODE ABS ENTRY REG ABS WORD DATA ABS BYTE

DATA ABS BYTE NULL ABS BYTE MACRO CODE ABS ENTRY REG ABS WORD MACRO CODE ABS ENTRY

REG ABS BYTE

CODE ABS BYTE DATA ABS BYTE MACRO CODE ABS WORD

CODE ABS ENTRY

REG ABS WORD

CODE ABS ENTRY

MACRO

CODE ABS ENTRY

CODE ABS WORD

NULL ABS

CODE ABS ENTRY

REG ABS WORD

MACRO

CODE ABS ENTRY

01/24/89 13:55:41 PAGE 28

MCS-96 MACRO ASSEM

IDLER EV96 01/24/89 13:55:41 PAGE 29

NAME

‘JALIJE ATTRIBUTES

DWRITE SP DX. ENTER RISM EV96. EXIT. EXIT RISM EXTERNAL INT EXTERNAL TNT PIN. FAILED. : -:

FL LOOPl. . . .

FL-WAITO. . . .

FL-WAITl. .

FLASH LEDS. . . .

FORCE-LOAD DATA . GENER-ENAB: . . GENERiL INT .

HERE. .-. . . . .

HSI DATA. . . . .

HSI-ENTRY 4 . . . HSI-FIFO FULL , .

HSI-MODE: . . . .

HSI-STATUS. . . .

HSI-TIME. . . . .

HSI-ZERO. . . . _

HSO-COMMAND . . . HSO-EVENT . . . ,

HSO-TIME. . . . .

INDIRECT ADDRESS.

INT-MASK: . . . .

INT PENDING . . . INVALID OPCODE. .

IO MODE-. . . . .

IOCO. . . . . .

IOCl. . . . . . .

IOPORTl . . . . .

IOPORT2 . . . . .

IOSO. . . . . . .

IOSl. . . . . . .

LINE CONFIG . . . LINE-STATUS . . . LOAD-ADDRESS. . .

LOAD-DATA . . . .

LOOPT . . . , . .

MEM TST . . . . .

MODEM CONTR _ . . MODEM-STATS . . . MONIToR ESCAPE. . MONITOR-PAUSE . .

NM1 . .-. . . . .

NOT-USER. . . . .

AlCEH

OOlEH

8013H

-----

....

.... AOOEH

....... A03AH

.......

A233H

... *

...

AlDDH

.......

AlD7H

.......

AlE3H

.......

AlD3H

......

8032H

.......

1EOlH

....... lE02H

.......

A2lEH

....... A004H

.......

A034H

....... A03CH

....... 0003H

.......

0006H

.......

0004H

....... AOOBH

....... 0006H

.......

A006H

....... 000411

....... 8081H

.......

0008H

.......

0009H

.......

A012H

.......

lE04H

....... 0015H

....... 0016H

....... OOOFH

....... OOlOH

.......

0015H

.......

0016H

....... lE03H

.......

lE05H

....... 807CH

....... 8035H

.......

AZOFH

....... A200H

.......

lE04H

.......

lE06H

.......

804EH

....... 9D20H

.......

A03EH

....... AOE4H

CODE ABS ENTRY REG ABS WORD MACRO MODULE MAIN STACKSIZE CODE ABS ENTRY MACRO CODE ABS WORD CODE ABS WORD CODE ABS ENTRY CODE ABS ENTRY CODE ABS '?NTRY CODE ABS ENTRY CODE ABS ENTRY CODE ABS ENTRY DATA ABS BYTE DATA ABS BYTE CODE ABS ENTRY CODE ABS WORD CODE ABS WORD CODE ABS WORD NULL ABS BYTE NULL ABS BYTE NULL ABS WORD CODE ABS WORD NULL ABS BYTE CODE ABS WORD NULL ABS WORD CODE ABS ENTRY NULL ABS BYTE NULL ABS BYTE CODE ABS WORD DATA ABS BYTE NULL ABS BYTE NULL ABS BYTE NULL ABS BYTE NULL ABS BYTE NULL ABS B"TE

NULL ABS BYTE

DATA ADS BYTE

DATA ABS BYTE CODE ABS ENTRY CODE ABS ENTRY

CODE ABS ENTRY

DATA ABS BYTE

CODE ABS ENTRY

CODE ABS WORD

CODE ABS ENTRY

MCS-96 MACRO ASSEMBLER EV96

01/24/89 13:55:41 PAGE 30

NAME

OFFSET PORT0 PROCESS UX-IMAND PWM CON'kOI, QUIT. READ BYTE READ.-DOUBLE READ PC READDPSW. READ-SP . r . READ-WORD . RECEiVE READY . uEPouT STATUS . RESET VECTOR. , RISM ADDR . RISM-DATA . .

RISM-ISR. . . .

RISM-PSW. . . .

RISM-STAT . . . upc RUNNING . . UPS6 RUNNING. .

RUN FLAG. . . .

RUNNING . . . .

SBUF. . . . . .

SEND DATA BYTE. SERIAL PORT . . SERIAL-RXD. . . SERIAL-TXD. , . SET BIT , . . ,

SET-DIAG. . . .

SET-DLE FLAG. . SET-RISM IDLE . SOFTWARE-TIMER. SP...T...

SPCON . . . . .

S?STAT. . . . .

START USER. . . STOP USER . . .

STOPGED . . . .

TEMPB . . . . .

TEMPW . . . . .

TIMER-OVERFLOW.

TIMERl. . . . .

TIMERZ. . . . .

TIMER2-CAPTURE. TIMER2 OVERFLOW

TRANSMIT. . . .

TRAP. . . . . .

TRAP-FLAG . . .

TRAPPED . . . .

dAL,IJE

HOOOH UOOEH 8028H

OOllH

AlFSH 8057H 8061H 808DH 809DH 80B3H 805CH 8015H EOCOH A08OH 0034H

0030H EOOOH OOOOH 0038H 8097H

80A7H OOOZH OOOlH 0007H

----AOOCH

A032H A03OH

-----

AlODH

803DH

9D4DH AOOAH

0018H

OOllH

9D22H

9D45H

OOOOH

0036H

0036H AOOOH

OOOAH

OOOCH A036H A038H

80428

AOlOH

OOOlH

0002H

I\TTRIBUTES

NULL ABS NULL ABS BYTE CODE ABS ENTRY NULL ABS BYTE CODE ABS ENTRY CODE ABS ENTRY CODE ABS ENTRY CODE ABS ENTRY CODE ABS ENTRY CODE ABS ENTRY CODE ABS ENTRY CODE ABS ENTRY CODE ABS ENTRY CODE ABS ENTRY REG ABS WORD REG ABS LONG CODE ABS ENTRY NULL ABS REG ABS BYTE CODE ABS ENTRY CODE ABS ENTRY NULL ABS NULL ABS NULL ABS BYTE MACRO CODE AES WORD CODE ABS WORD CODE ABS WORD MACRO CODE ABS ENTRY CODE ABS ENTRY CODE ABS ENTRY CODE ABS WORD NULL ABS WORD NULL ABS BYTE NULL ABS BYTE CODE ABS ENTRY CODE ABS ENTRY NULL ABS REG ABS BYTE REG ABS WORD CODE ABS WORD NULL ABS WORD NULL ABS WORD CODE ABS WORD CODE ABS WORD CODE ABS ENTRY CODE ABS WORD NULL ABS NULL ABS

MCS-96 MACRO ASSEMBLER

NAME

TXD RXD

UART USER MAP

USER PC USER PSW USER-SETIJP WATCHDOG. WORD PROTECT WRITE BYTE. WRITE-DOUBLE WRITE PC. . WRITE-PSW . WRITE-SP. . WRITE-WORD. ZERO.-. . .

EV96

. . .

. .

JAI.lIb.

IEUOH

LEOOH 0003H 2020H 2022H 9DOOH OOOAH

806AH 80748 8086H EOACH 80BAH 806FH OOOOH

01/24/89 13:55:41 PAGE 31

A'r'l'H L HlJTES

DATA ABS BYTE DATA ABS BYTE NULL ABS DATA ABS WORD DATA ABS WORD CODE ABS ENTRY NULL ABS BYTE MACRO CODE ABS ENTRY CODE ABS ENTRY CODE ABS ENTRY CODE ABS ENTRY CODE ABS ENTRY CODE ABS ENTRY NULL ABS WORD

ASSEMBLY COMPLETED, NO ERROR(S) FOUND.

Appendix D.

Timing Analysis

Timing analysis of the EV80C196KB board.

All values used are based on the 8OCl96KB operating at 12MHz. They are taken from the October 1988 version of the 8OCl96KB data sheet,

Intel order number 270634-001.

8OC196KB AX. Characteristics

Tavyv = 81 ns MAX. Tavyv(WAIT) = 11 ns (AC373 Dn to On Tplh MAX) + 35 ns (PAUEPLD Tpd MAX)

+ 9 ns (AC08 Tplh MAX) + 12 ns (AC112 RES to Q Tphl MAX) = 67 ns.

Tllyv is irrelevant in this design.

Tclyx = 53 ns MAX. Tclyx(WAIT) = 10 ns (AC11 2 CLOCK to Q Tplh MAX).

Tllyx is irrelevant in this design.

Tavgv = 81 ns MAX. Tclyx(BUSWIDTH) = 11 ns (AC373 Dn to On Tplh MAX) + 35 ns (PAUEPLD Tpd MAX)

= 46 ns.

Tllgv is irrelevant in this design.

Tclgx is irrelevant in this design.

Tavdv = 183 ns MAX, for zero wait states. Tavdv(ROMsim) = 11 ns (AC373 Dn to On Tplh MAX) + 35 ns (PAUEPLD Tpd MAX)

+ 100 ns (RAM Tcol MAX) = 146 ns.

Tavdv = 349 ns MAX, for one wait state. Tavdv(EPROM) = 11 ns (AC373 Dn to On Tplh MAX) + 35 ns (PAUEPLD Tpd MAX)

+ 200 ns (EPROM Tee MAX) = 246 ns.

Tavdv = 516 ns MAX, for two wait states. Tavdv(UART) = 11 ns (AC373 Dn to On Tplh MAX) + 35 ns (PAUEPLD Tpd MAX)

+ 288 ns (UART Tavrl MIN + Trldv MAX) = 334 ns.

Trldv = 60 ns MAX, for zero wait states. Trldv(ROMsim) = 50 ns (RAM Toe MAX).

Trldv = 226 ns MAX, for one wait state. Trldv(EPROM) = 75 ns (EPROM Toe MAX).

Trldv = 393 ns MAX, for two wait states. Trldv(UART) = 281 ns (UART Trldv MAX).

Tcldv is ‘irrelevant in this design.

Trhdz = 63 ns MAX. Trhdz(ROMsim) = 35 ns (RAM Tohz MAX). Trhdz(EPROM) = 55 ns (EPROM Tdf MAX). Trhdz(UART) = 40 ns (UART Trhdz MAX).

Trxdx = 0 ns MIN. Trxdx(ROMsim) = 0 ns (RAM Tohz MIN). Trxdx(EPROM) = 0 ns (EPROM Toh MIN). Trxdx(UART) is not specified.

Txhch is irrelevant in this design.

Tclcl = 166 ns.

Tclcl(WAIT) = 55 ns (PAUEPLD Tp MIN).

= 10 ns (AC1 12 l/Fmax MIN).

Tchcl = 73 ns MIN. Tchcl(WAIT) = 25 ns (PAUEPLD Tco MAX) + 35 ns (PAUEPLD Tpd MAX)

+ 4 ns (AC1 12 Tsu MIN) = 64 ns.

or = 25 ns (PAUEPLD Tco MAX) + 35 ns (PAUEPLD Tpd MAX)

+ 8 ns (AC08 Tplh MAX) + 2 ns (AC1 12 Trem MIN) = 70 ns.

Tcllh is irrelevant in this design.

Tllch is irrelevant in this design.

Tlhlh is irrelevant in this design.

Tlhll = 73 ns MIN. Tlhll(AO-A15) = 5 ns (AC373 Tw MIN).

Tavll = 68 ns MIN. Tavll(AO-A15) = 5 ns (AC373 Ts MIN). TavIl(WAIT) = 11 ns (AC373 Dn to On Tplh MAX) + 35 ns (PAUEPLD Tpd MAX)

+ 8 ns (AC00 Tphl MIN) + 5 ns (AC1 12 Tw MIN) = 59 ns.

TavII(BHE#) = 11 ns (AC14 Tplh MAX) + 4 ns (AC1 12 Tsu MIN)

= 15 ns.

Tllax = 43 ns MIN. Tllax(A,O-A15) = 0 ns (AC373 Th MIN). Tllax(BHE#) = 0 ns (AC1 12 Th MIN).

Tllrl = 43 ns MIN. Tllrl(UART) = 7 ns (UART Tavrl MIN).

Trlcl is irrelevant in this design.

Trlrh = 411 ns MIN, for two wait states. Trlrh(UART) = 281 ns (UART Trlrh MIN).

Trhlh = 83 ns MIN. Trhlh(STALE) = 9 ns (74AC08 Tplh MAX) + 3 ns (74AC112 Trem MIN)

=12ns.

Tllwl = 73 ns MIN. Tllwl(UART) = 7 ns (UART Tavwl MIN).

Tclwl is irrelevant in this design.

Tqvwh = 60 ns MIN, for zero wait states.

Tqvwh(ROMsim) = 40 ns (RAM Tdw MIN).

Tqvwh = 393 ns MIN, for two wait states. Tqvwh(UART) = 90 ns (UART Tdvwh MIN).

Tchwh is irrelevant in this design.

Twlwh = 53 ns MIN, for zero wait states. Twlwh(ROMsim) = 50 ns (RAM Twp MIN).

Twlwh = 386 ns MIN, for two wait states. Twlwh(UART) = 231 ns (UART Twlwh MIN).

Twhqx = 73 ns MIN. Twhqx(ROMsim) = 9 ns (74AC32 Tplh MAX) + 0 ns (RAM Tdh MIN)

= 9 ns. Twhqx(U14) = 0 ns (RAM Tdh MIN). Twhqx(UART) = 12 ns (UART Twhdx MIN).

Twhlh = 73 ns MIN. Twhlh(ROMsim) = 9 ns (74AC32 Tplh MAX) + 0 ns (RAM Twr MIN)

= 9 ns.

Twhlh(UART) = 0 ns (UART Twhax MIN). Twtilh(STALE) = 9 ns (74AC08 Tplh MAX) + 3 ns (74AC112 Trem MIN)

= 12 ns.

Twhbx is irrelevant in this design.

Appendix E.

Programmable Logic Equations

Doug Yoder Intel January 19, 1989 EV80C196KB 002 5AC312 Generates mapping signals for the target processor on the 80C196KB evaluation board. OPTIONS: TURBO=ON PART: 5AC312

% Input declarations %

INPUTS:

CLOCKOUT,

% MCS96 system CLOCKOUT

STALE@2,

% STretched MCS96 Address Latch Enable % nHLDA@3, A8@4,

A9@5, A10@6,

All@7,

A12@8,

A13@9, A14@10,

A15@11,

nRESET@13

% 80C196KB HOLD Acknowledge

% MCS96 latched A8 - Al5

0 % % % % % MCS96 RESET pin

% Output declarations %

OUTPUTS: nCS510@14,

% QV => enable uart, U20

nCE2@15,

% OV => enable U14 memory nBUSWIDTH@16, % OV => put processor in 8 bit mode SBO@17,

% wait-state counter bit 0 SB1@18,

% wait-state counter bit 1

nWAIT@19, % OV => hold MCS96 in wait state

SB2@20,

% wait-state counter bit 2nCEO@21, % OV => enable Ul and U8 memory nCE1@22, % OV => enable U6 and U13 memory

MAP@23

% 5V => map RAM as romsim

% 3

% I,-,

Architecture declarations %

NETWORK:

MAP,MAP = RORF(MAPd,CLOCKOUT,RESET,GND,VCC) nWAIT = CONF(nWAITd,VCC) nCS510 = COCF(UART,VCC) nCE2 = COCF(EEPROM,VCC) nCE1 = CONF(RAM,VCC) nCE0

= CONF(EPROM,VCC)

nBUSWIDTH = CONF(nBWd,VCC)

% Intermediate variable definitions %

EQUATIONS:

RESET = !nRESET; HLDA

= !nHLDA;

MAPd = MAP + (RANGE3 * !STALE);

EPROM'

= (!MAP * RANGE61

+ RANGE1 + RANGE4;

RAM'

= (MAP * RANGE6) + RANGE7;

EEPROM' = RANGE8;

UART' = RANGE5;

OPEN0

= RANGE2 + RANGElO;

OPEN1

= RANGE9;

nBWd'

= !EEPROM

+ !UART;

WAIT 1

= STALE *

WAIT-2 = STALE * WAIT-3 WAIT-4

= WAIT-4;

= WAIT 5; WAIT-5 WAIT-6

= WAITIG;

WAIT-7

= WAIT-7;

= GND; nWAITd = !WAIT;

!HLDA * (WAIT-2 + !EPROM + OPENl); !HLDA * (WAIT-3 + !UART);

Address Range Equations %

RANGE1

= !A15 * !A14 * !A13 * !A12 * !A11 * !A10 * !A9 * !A8;

% OOOO-OOFF %

RANGE2

= !A15 * !A14 * !A13 *

Al2 *

!A10 * !A8

% OlOO-1CFF %

+ !A15 * !A14 * !A13 * !A10 * !A9 *

A8 + !A15 * !A14 * !A13 * !A12 * A10 + !A15 * !A14 * !A13 *

All * !A9 * !A8 + !A15 * !A14 * !A13 * Al2 * !A11 + !A15 * !A14 * !A13 * !A12 * A9;

RANGE3

= !A15 * !A14 * !A13 * Al2 * !A9

% lOOO-1DFF % + !A15 * !A14 * !A13 * Al2 * !A10 + !A15 * !A14 * !A13 *

Al2 * !All;

RANGE4

= !A15 * !A14 * !A13 * Al2 * All *

A10 * !A9 * A8;

% lDOO-1DFF %

RANGE5

= !A15 * !A14 * !A13 *

Al2 *

All *

A10 * A9 * !A8;

% lEOO-1EFF %

11;

% 2000-27FF %

% 2800-5FFF %

RANGE6

= !A15 * !A14 *

Al3 * !A12 *

RANGE7

= !A15 * !A14 * Al3 * Al2 + !A15 * !A14 * Al3 * All

+ !A15 *

Al4 * !A13;

RANGE8 = !A15 * Al4 *

A13;

RANGE9 =

Al5 * !A14;

RANGE10 = Al5 * A14;

% 6000-7FFF %

% 8000-BFFF %

% COOO-FFFF %

% State machine %

MACHINE: WAIT-STATE

CLOCK:

CLOCKOUT

CLEAR:

RESET

STATES:

HOLD-2 HOLD-3 HOLD 4 HOLD-5 HOLD-6 HOLD-7

REMOVE HO:D

ASYNC-START:

HOLD 2:

HOLD 3:

HOLD 4:

HOLD 5:

HOLD 6:

HOLD 7’

REMOVE HOLD:

ENDS

[ SB2 SBl SBO ] ASYNC-START [ 0 0 0 ]

10 Q 11 [O 113 [1 111 [1 101 El cl 01 [1 Q 11 [O 101

IF WAIT-1 & !WAIT 2

THEN REMOVE HOLD

IF WAIT 2

THEN HOLD 2-

ASSERT: IF WAIT 1 THEN WAIT-

IF WAIT 3 THEN HOLD 3

REMOVE HOLD

ASSERT:

WAIT

IF WAIT 4

THEN HOLD 4

REMOVE HOLD

ASSERT: WAIT

IF WAIT 5

THEN HOLD 5

REMOVE GOLD

ASSERT:

WAIT

IF WAIT 6

THEN HOLD 6

REMOVE ZOLD

ASSERT: WAIT

IF WAIT-7 THEN HOLD 7

REMOVE HOLD

ASSERT:

WAIT

REMOVE HOLD

ASSERT: WAIT

ASYNC START

Intel EV80Cl96KB User Manual

Specifications and Main Features

Frequently Asked Questions

User Manual