How it Works
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Schematics
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User Manual
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HP SPLIT X2 Schematics

5
www.schematic-x.blogspot.com
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1
Wolverine (13.3") Intel Chief River Platform Block Diagram
Slate
DDR3 SODIMM1
D D
Maxima 8GBs
PAGE 12
DDR3
Processor : Daul Core
Power : 7 (Watt)
Package : BGA1023 Size : 31x 27 (mm)
PAGE 2~5
eDP
eDP
PAGE 14
PCB 8L STACK UP
LAYER 1 : TOP LAYER 2 : SGND LAYER 3 : IN1(High) LAYER 4 : IN2(Low)
01
LAYER 5 : SVCC LAYER 6 : IN3(High) LAYER 7 : SGND LAYER 8 : BOT
I2C
Gyrometer HP3GD20HTR
PAGE 13 PAGE 13
ALS-Sensor
Capella
PAGE 13
PCH
FDI x 8
PAGE 6~11
SATA port0 6GB/s
USB2.0 Interface
Touch Screen
PCIE Gen 1 x 1 Lane
Card Reader
RTS5237-GR
Port11
PAGE 15
PAGE 19
Port2
Camera
PAGE 13
Half Mini Card WLAN / BT Combo
mSATA
PAGE 14
SENSOR HUB STM32F103RB
Port10
PAGE 18
Port1
PAGE 13
Acceleometer + Magentometer HP303DLHCTR
DMI x 4
System BIOS SPI ROM
PAGE 7
SPI Interface
LPC Interface
Package : FCBG989
EC SPI ROM
C C
PAGE 21
Embedded Controller
FAN PAGE 15
Package : LQPF128
Size : 14 x 14 (mm)
PAGE 21
Audio CodecEnE KB3940QF
92HD95 40_QFN
Package : MQFN
Size : 6 x 6 (mm)
Azalia
Size : 25 x 25 (mm)
PAGE 16
Digital MIC
PAGE 13
Speaker
B B
PAGE 17
Combo Jack
PAGE 17
HeadPhone AMP
TPA6130A2
PAGE 18
Docking Connector
Base
DP PortB
Embedded Controller
Keyboard
ENE IO3730B
Package : LQFP-64
Size : 7 x 7 x 1.4
5
Combo Jack
I2c
4
USB 2.0 Port 8
3
STM32F103CBSTTouch Pad
A A
SATA port2
USB3.0 Interface
USB 3.0 Port 1 / USB 2.0 Port0
USB2.0 Interface
USB 2.0 Port 3
USB2.0 InterfaceUSB2.0 Interface
USB 2.0 Port 9
HDMI Conn
SATA HDD
USB3.0 Port x 1 USB2.0 Port x 1
CardReader IC
USB2.0 Port x 1
2
PROJECT : Wolverine
PROJECT : Wolverine
PROJECT : Wolverine
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
Custom
Block Diagram
Block Diagram
NB5
NB5
NB5
Block Diagram
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
1A
1A
1A
1 29Monday, April 22, 2013
1 29Monday, April 22, 2013
1 29Monday, April 22, 2013
5
4
3
2
1
Ivy Bridge Processor (DMI,PEG,FDI)
PEG_COMP connect to PIN G3&G4 W:4mils/S:15mils/L: 500mils.
U19A
P10
P11
W11
AA6
AC9
W10
AA7
AA3 AC8
AA11 AC12
U11
AA10
AG8
AF3 AD2
AG11
AG4
AF4
AC3 AC4
AE11
AE7 AC1
AA4
AE10
AE6
EDP_HPD_L 14
5
M2
DMI_RX#[0]
P6
DMI_RX#[1]
P1
DMI_RX#[2] DMI_RX#[3]
N3
DMI_RX[0]
P7
DMI_RX[1]
P3
DMI_RX[2] DMI_RX[3]
K1
DMI_TX#[0]
M8
DMI_TX#[1]
N4
DMI_TX#[2]
R2
DMI_TX#[3]
K3
DMI_TX[0]
M7
DMI_TX[1]
P4
DMI_TX[2]
T3
DMI_TX[3]
U7
FDI0_TX#[0] FDI0_TX#[1]
W1
FDI0_TX#[2] FDI0_TX#[3]
W6
FDI1_TX#[0]
V4
FDI1_TX#[1]
Y2
FDI1_TX#[2] FDI1_TX#[3]
U6
FDI0_TX[0] FDI0_TX[1]
W3
FDI0_TX[2] FDI0_TX[3]
W7
FDI1_TX[0]
T4
FDI1_TX[1] FDI1_TX[2] FDI1_TX[3]
FDI0_FSYNC FDI1_FSYNC
FDI_INT FDI0_LSYNC
FDI1_LSYNC
eDP_COMPIO eDP_ICOMPO eDP_HPD#
eDP_AUX# eDP_AUX
eDP_TX#[0] eDP_TX#[1] eDP_TX#[2] eDP_TX#[3]
eDP_TX[0] eDP_TX[1] eDP_TX[2] eDP_TX[3]
IC,IVB_2CBGA,0P7
eDP_COMPIO and ICOMPO signals should be shorted near balls and routed with typical impedance <25 mohms
4mils 12mils
+1.05V
+1.05V
+1.05V
XDP_BPM6
XDP_BPM7
DMI Intel(R) FDI
eDP
ph
DMI_TXN06 DMI_TXN16 DMI_TXN26 DMI_TXN36
+1.05V
Q25
ME2N7002E
DMI_TXP06 DMI_TXP16 DMI_TXP26 DMI_TXP36
DMI_RXN06 DMI_RXN16 DMI_RXN26 DMI_RXN36
DMI_RXP06 DMI_RXP16 DMI_RXP26 DMI_RXP36
FDI_TXN06 FDI_TXN16 FDI_TXN26 FDI_TXN36 FDI_TXN46 FDI_TXN56 FDI_TXN66 FDI_TXN76
FDI_TXP06 FDI_TXP16 FDI_TXP26 FDI_TXP36 FDI_TXP46 FDI_TXP56 FDI_TXP66 FDI_TXP76
FDI_FSYNC06 FDI_FSYNC16
FDI_INT6
FDI_LSYNC06 FDI_LSYNC16
eDP_COMP
INT_eDP_HPD_Q
R306 1K/F_2
3
2
1
INT_eDP_AUXN INT_eDP_AUXP
INT_eDP_TXN0 INT_eDP_TXN1
INT_eDP_TXP0 INT_eDP_TXP1
R304 100K/F_2
D D
C C
INT_eDP_AUXN14
INT_eDP_AUXP14
INT_eDP_TXN014 INT_eDP_TXN114
B B
INT_eDP_TXP014 INT_eDP_TXP114
INT_eDP_HPD_Q
A A
PEG_COMP connect to PIN G1 W:12mils/S:15mils/L: 500mils.
PEG_ICOMPI
PEG_ICOMPO
PEG_RCOMPO
PEG_RX#[10] PEG_RX#[11] PEG_RX#[12] PEG_RX#[13] PEG_RX#[14] PEG_RX#[15]
PEG_TX#[10] PEG_TX#[11] PEG_TX#[12] PEG_TX#[13] PEG_TX#[14]
PCI EXPRESS -- GRAPHICS
PEG_TX#[15]
R365 24.9/F_4
R178 24.9/F_4
R305 *10K/F_2
TP25 TP44
For iFDIM Trigger Point
TP26 TP43
PEG_RX#[0] PEG_RX#[1] PEG_RX#[2] PEG_RX#[3] PEG_RX#[4] PEG_RX#[5] PEG_RX#[6] PEG_RX#[7] PEG_RX#[8] PEG_RX#[9]
PEG_RX[0] PEG_RX[1] PEG_RX[2] PEG_RX[3] PEG_RX[4] PEG_RX[5] PEG_RX[6] PEG_RX[7] PEG_RX[8]
PEG_RX[9] PEG_RX[10] PEG_RX[11] PEG_RX[12] PEG_RX[13] PEG_RX[14] PEG_RX[15]
PEG_TX#[0] PEG_TX#[1] PEG_TX#[2] PEG_TX#[3] PEG_TX#[4] PEG_TX#[5] PEG_TX#[6] PEG_TX#[7] PEG_TX#[8] PEG_TX#[9]
PEG_TX[0]
PEG_TX[1]
PEG_TX[2]
PEG_TX[3]
PEG_TX[4]
PEG_TX[5]
PEG_TX[6]
PEG_TX[7]
PEG_TX[8]
PEG_TX[9] PEG_TX[10] PEG_TX[11] PEG_TX[12] PEG_TX[13] PEG_TX[14] PEG_TX[15]
G3
PEG_COMP
G1 G4
H22 J21 B22 D21 A19 D17 B14 D13 A11 B10 G8 A8 B6 H8 E5 K7
K22 K19 C21 D19 C19 D16 C13 D12 C11 C9 F8 C8 C5 H6 F6 K6
G22 C23 D23 F21 H19 C17 K15 F17 F14 A15 J14 H13 M10 F10 D9 J4
F22 A23 D24 E21 G19 B18 K17 G17 E14 C15 K13 G13 K10 G10 D8 K4
PM_DRAM_PWRGD6
eDP_COMP
PEG_COMP
INT_eDP_HPD_Q
Connect a Test Point on BPM# 6 signal, very close to processor.
Connect a Test Point on BPM# 7 signal, very close to processor.
4
PV-1 4/17: C505 EMI
SM_DRAMPWROK Processor Input.
PM_DRAM_PWRGD PM_DRAM_PWRGD_R
R215 *3K/F_4
H_PROCHOT#21,27
PLTRST#8,18,19,20,21
MBDATA28,12,15,21
+1.5V_CPU
MBCLK28,12,15,21
BE45
C183 *43P/50V_4
F49
C57
C49
A48
C45
D45
C48
B46
D44
CPU RESET#
󰇤
H_SNB_IVB#7
TP21
TP20
Placement close to EC.
EC_PECI21
C18747P/50V_4
H_PROCHOT#_R
PM_THRMTRIP#9,21
PM_SYNC6
H_PWRGOOD9
R147 1.5K/F_4
C505 *43P/50V_4
SKTOCC#
TP_CATERR#
EC_PECI
R192 56.2/F_2
R188 10K/F_2
C186 *43P/50V_4
PM_DRAM_PWRGD_R
Intel DG request
CPU_RESET#
R146 750/F_4
DDR3 DRAM RESET
DRAMRST_CNTRL_DDR12
+3V_DEEP_SUS
R225 200/F_4
R247 130/F_4
R246
*39_4
3
1
2
Q20 *2N7002K
Local Thermal Sensor
MBCLK2 MBDATA2 IO_THERMDA_L
+3V
R207 *0_4 R200 *0_4
R167 *10K/F_2
3
Place under CPU heat pipe
DRAMRST_CNTRL_PCH8
DRAMRST_CNTRL_EC21
MAIN_ONG 4,29
U12
8
SCLK
7
SDA
6
ALERT#
4
OVERT#
*G781-1P8
VCC DXP DXN GND
U19B
PROC_SELECT#
PROC_DETECT#
CATERR#
PECI
PROCHOT#
THERMTRIP#
PM_SYNC
UNCOREPWRGOOD
SM_DRAMPW ROK
RESET#
IC,IVB_2CBGA,0P7
R367 1K/F_2
C223 *0.01U/25V_4
1 2 3
IO_THERMDC_L
5
MISC THERMAL PWR MANAGEMENT
DRAMRST_CNTRL_DDR
for DS3
R355 *0_4 R356 0_4
C198 *2200P/50V_4
G781-1P8(9Ah)
2
CLOCKS
DDR3
MISC
JTAG & BPM
+3V
IO_THERMDA_IO
IO_THERMDC_IO
DPLL_REF_CLK
DPLL_REF_CLK#
SM_DRAMRST#
SM_RCOMP[0] SM_RCOMP[1] SM_RCOMP[2]
C286
0.047U/10V_4
2
*METR3904-G
PRDY# PREQ#
BPM#[0] BPM#[1] BPM#[2] BPM#[3] BPM#[4] BPM#[5] BPM#[6] BPM#[7]
Q22 2N7002K
Q9
1 3
J3
BCLK
H2
BCLK#
AG3
CLK_DPLL_SSCLKP_R
AG1
CLK_DPLL_SSCLKN_R
R392 *0_4/S R389 *0_4/S
PV 3/27: R392/389 Change to shortpad
AT30
CPU_DRAMRST#
BF44
SM_RCOMP_0
BE43
SM_RCOMP_1
BG43
SM_RCOMP_2
SM_RCOMP[0] W:20mils/S:20mils/L: 500mils, SM_RCOMP[1] W:20mils/S:20mils/L: 500mils, SM_RCOMP[2] W:15mils/S:20mils/L: 500mils,
N53
XDP_PRDY#
N55
XDP_PREQ#
L56
XDP_TCLK
TCK
L55
XDP_TMS
TMS
J58 M60
TDI
L59
TDO
K58
G58 E55 E59 G55 G59 H60 J59 J61
+1.5VSUS
3
1
CPU_DRAMRST#
R262 1K/F_2
R310
4.99K/F_4
NB5
NB5
NB5
XDP_TRST# XDP_TDI_R
XDP_TDO
XDP_DBRST#
XDP_BPM6 XDP_BPM7
CPU_DRAMRST#_R
TRST#
DBR#
2
C305 *43P/50V_4
R401 140/F_4 R400 25.5/F_4 R399 200/F_4
TP27
R3711K/F_2
Processor pull-up (CPU)
H_PROCHOT# XDP_TDO XDP_TMS XDP_TDI_R XDP_PREQ# XDP_TCLK XDP_TRST#
PROJECT : Wolverine
PROJECT : Wolverine
PROJECT : Wolverine
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
Custom
IVB 1/4 (DMI/PEG/FDI)
IVB 1/4 (DMI/PEG/FDI)
IVB 1/4 (DMI/PEG/FDI)
Date: Sheet of
Date: Sheet of
Date: Sheet of
CLK_CPU_BCLKP 8 CLK_CPU_BCLKN 8
CPU XDP
XDP_DBRST# 6
DDR3_DRAMRST# 12
1
02
CLK_DPLL_SSCLKP 8 CLK_DPLL_SSCLKN 8
R162 62_2 R271 51_2 R253 51_2 R285 51_2 R243 *51_2 R259 51_2 R264 51_2
+1.05V
1A
1A
1A
2 29Monday, April 22, 2013
2 29Monday, April 22, 2013
2 29Monday, April 22, 2013
5
4
3
2
1
03
Ivy Bridge Processor (DDR3)
D D
U19C IC,IVB_2CBGA,0P7
M_A_DQ[63:0]12
C C
B B
M_A_BS#012 M_A_BS#112 M_A_BS#212
M_A_CAS#12 M_A_RAS#12 M_A_WE#12
M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63
AG6 AP11 AJ10
AR11
AP6
AU6
AV9
AR6
AP8 AT13 AU13
BC7
BB7 BA13 BB11
BA7
BA9
BB9 AY13 AV14 AR14 AY17 AR19 BA14 AU14 BB14 BB17 BA45 AR43
AW48
BC48 BC45 AR45 AT48 AY48 BA49 AV49 BB51 AY53 BB49 AU49 BA53 BB55 BA55 AV56 AP50 AP53 AV54 AT54 AP56 AP52 AN57 AN53 AG56 AG53 AN55 AN52 AG55 AK56
BD37 BF36 BA28
BE39 BD39 AT41
AJ6 AL6 AJ8
AL8 AL7
SA_DQ[0] SA_DQ[1] SA_DQ[2] SA_DQ[3] SA_DQ[4] SA_DQ[5] SA_DQ[6] SA_DQ[7] SA_DQ[8] SA_DQ[9] SA_DQ[10] SA_DQ[11] SA_DQ[12] SA_DQ[13] SA_DQ[14] SA_DQ[15] SA_DQ[16] SA_DQ[17] SA_DQ[18] SA_DQ[19] SA_DQ[20] SA_DQ[21] SA_DQ[22] SA_DQ[23] SA_DQ[24] SA_DQ[25] SA_DQ[26] SA_DQ[27] SA_DQ[28] SA_DQ[29] SA_DQ[30] SA_DQ[31] SA_DQ[32] SA_DQ[33] SA_DQ[34] SA_DQ[35] SA_DQ[36] SA_DQ[37] SA_DQ[38] SA_DQ[39] SA_DQ[40] SA_DQ[41] SA_DQ[42] SA_DQ[43] SA_DQ[44] SA_DQ[45] SA_DQ[46] SA_DQ[47] SA_DQ[48] SA_DQ[49] SA_DQ[50] SA_DQ[51] SA_DQ[52] SA_DQ[53] SA_DQ[54] SA_DQ[55] SA_DQ[56] SA_DQ[57] SA_DQ[58] SA_DQ[59] SA_DQ[60] SA_DQ[61] SA_DQ[62] SA_DQ[63]
SA_BS[0] SA_BS[1] SA_BS[2]
SA_CAS# SA_RAS# SA_WE#
SA_CK[0] SA_CK#[0] SA_CKE[0]
SA_CK[1] SA_CK#[1] SA_CKE[1]
SA_CS#[0] SA_CS#[1]
SA_ODT[0] SA_ODT[1]
SA_DQS#[0] SA_DQS#[1] SA_DQS#[2] SA_DQS#[3] SA_DQS#[4] SA_DQS#[5] SA_DQS#[6] SA_DQS#[7]
SA_DQS[0] SA_DQS[1] SA_DQS[2] SA_DQS[3] SA_DQS[4] SA_DQS[5] SA_DQS[6] SA_DQS[7]
AU36 AV36 AY26
AT40 AU40 BB26
BB40 BC41
AY40 BA41
AL11 AR8 AV11 AT17 AV45 AY51 AT55 AK55
AJ11 AR10 AY11 AU17 AW45 AV51 AT56 AK54
M_A_DQSN0 M_A_DQSN1 M_A_DQSN2 M_A_DQSN3 M_A_DQSN4 M_A_DQSN5 M_A_DQSN6 M_A_DQSN7
M_A_DQSP0 M_A_DQSP1 M_A_DQSP2 M_A_DQSP3 M_A_DQSP4 M_A_DQSP5 M_A_DQSP6 M_A_DQSP7
M_A_CLKP0 12 M_A_CLKN0 12 M_A_CKE0 12
M_A_CLKP1 12 M_A_CLKN1 12 M_A_CKE1 12
M_A_CS#0 12 M_A_CS#1 12
M_A_ODT0 12 M_A_ODT1 12
M_A_DQSN[7:0] 12
M_A_DQSP[7:0] 12
DDR SYSTEM MEMORY A
SA_MA[0]
SA_MA[1]
SA_MA[2]
SA_MA[3]
SA_MA[4]
SA_MA[5]
SA_MA[6]
SA_MA[7]
SA_MA[8]
SA_MA[9]
SA_MA[10] SA_MA[11] SA_MA[12] SA_MA[13] SA_MA[14] SA_MA[15]
BG35 BB34 BE35 BD35 AT34 AU34 BB32 AT32 AY32 AV32 BE37 BA30 BC30 AW41 AY28 AU26
M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15
M_A_A[15:0] 12
U19D IC,IVB_2CBGA,0P7
AL4
SB_DQ[0]
AL1
SB_DQ[1]
AN3
SB_DQ[2]
AR4
SB_DQ[3]
AK4
SB_DQ[4]
AK3
SB_DQ[5]
AN4
SB_DQ[6]
AR1
SB_DQ[7]
AU4
SB_DQ[8]
AT2
SB_DQ[9]
AV4
SB_DQ[10]
BA4
SB_DQ[11]
AU3
SB_DQ[12]
AR3
SB_DQ[13]
AY2
SB_DQ[14]
BA3
SB_DQ[15]
BE9
SB_DQ[16]
BD9
SB_DQ[17]
BD13
SB_DQ[18]
BF12
SB_DQ[19]
BF8
SB_DQ[20]
BD10
SB_DQ[21]
BD14
SB_DQ[22]
BE13
SB_DQ[23]
BF16
SB_DQ[24]
BE17
SB_DQ[25]
BE18
SB_DQ[26]
BE21
SB_DQ[27]
BE14
SB_DQ[28]
BG14
SB_DQ[29]
BG18
SB_DQ[30]
BF19
SB_DQ[31]
BD50
SB_DQ[32]
BF48
SB_DQ[33]
BD53
SB_DQ[34]
BF52
SB_DQ[35]
BD49
SB_DQ[36]
BE49
SB_DQ[37]
BD54
SB_DQ[38]
BE53
SB_DQ[39]
BF56
SB_DQ[40]
BE57
SB_DQ[41]
BC59
SB_DQ[42]
AY60
SB_DQ[43]
BE54
SB_DQ[44]
BG54
SB_DQ[45]
BA58
SB_DQ[46]
AW59
SB_DQ[47]
AW58
SB_DQ[48]
AU58
SB_DQ[49]
AN61
SB_DQ[50]
AN59
SB_DQ[51]
AU59
SB_DQ[52]
AU61
SB_DQ[53]
AN58
SB_DQ[54]
AR58
SB_DQ[55]
AK58
SB_DQ[56]
AL58
SB_DQ[57]
AG58
SB_DQ[58]
AG59
SB_DQ[59]
AM60
SB_DQ[60]
AL59
SB_DQ[61]
AF61
SB_DQ[62]
AH60
SB_DQ[63]
BG39
SB_BS[0]
BD42
SB_BS[1]
AT22
SB_BS[2]
AV43
SB_CAS#
BF40
SB_RAS#
BD45
SB_WE#
BA34
SB_CK[0]
AY34
SB_CK#[0]
AR22
SB_CKE[0]
BA36
SB_CK[1]
BB36
SB_CK#[1]
BF27
SB_CKE[1]
BE41
SB_CS#[0]
BE47
SB_CS#[1]
AT43
SB_ODT[0]
BG47
SB_ODT[1]
AL3
SB_DQS#[0]
AV3
SB_DQS#[1]
BG11
SB_DQS#[2]
BD17
SB_DQS#[3]
BG51
SB_DQS#[4]
BA59
SB_DQS#[5]
AT60
SB_DQS#[6]
AK59
SB_DQS#[7]
AM2
SB_DQS[0]
AV1
SB_DQS[1]
BE11
SB_DQS[2]
BD18
SB_DQS[3]
BE51
SB_DQS[4]
BA61
SB_DQS[5]
AR59
SB_DQS[6]
AK61
SB_DQS[7]
DDR SYSTEM MEMORY B
BF32
SB_MA[0]
BE33
SB_MA[1]
BD33
SB_MA[2]
AU30
SB_MA[3]
BD30
SB_MA[4]
AV30
SB_MA[5]
BG30
SB_MA[6]
BD29
SB_MA[7]
BE30
SB_MA[8]
BE28
SB_MA[9]
BD43
SB_MA[10]
AT28
SB_MA[11]
AV28
SB_MA[12]
BD46
SB_MA[13]
AT26
SB_MA[14]
AU22
SB_MA[15]
A A
PROJECT : Wolverine
PROJECT : Wolverine
PROJECT : Wolverine
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
Custom
IVB 2/4 (DDR3 I/F)
IVB 2/4 (DDR3 I/F)
NB5
NB5
5
4
3
2
NB5
IVB 2/4 (DDR3 I/F)
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
1A
1A
1A
3 29Monday, April 22, 2013
3 29Monday, April 22, 2013
3 29Monday, April 22, 2013
5
U19F
+VCC_CORE
A26
VCC[1]
A29
VCC[2]
A31
VCC[3]
C129
C116
22U/6.3VS_6
22U/6.3VS_6
D D
C105
C103
C109 22U/6.3VS_6
C119 22U/6.3VS_6
C118 22U/6.3VS_6
C134 22U/6.3VS_6
C C
B B
A A
22U/6.3VS_6
22U/6.3VS_6
C135
C132
22U/6.3VS_6
22U/6.3VS_6
C104
C122
22U/6.3VS_6
22U/6.3VS_6
C164 2.2U/6.3VS_4 C153 2.2U/6.3VS_4 C162 2.2U/6.3VS_4
C163 2.2U/6.3VS_4 C149 2.2U/6.3VS_4 C192 2.2U/6.3VS_4 C150 2.2U/6.3VS_4 C189 2.2U/6.3VS_4 C165 2.2U/6.3VS_4 C191 2.2U/6.3VS_4
5
A34
VCC[4]
A35
VCC[5]
A38
VCC[6]
A39
VCC[7]
A42
VCC[8]
C26
VCC[9]
C27
VCC[10]
C32
VCC[11]
C34
VCC[12]
C37
VCC[13]
C39
VCC[14]
C42
VCC[15]
D27
VCC[16]
D32
VCC[17]
D34
VCC[18]
D37
VCC[19]
D39
VCC[20]
D42
VCC[21]
E26
VCC[22]
E28
VCC[23]
E32
VCC[24]
E34
VCC[25]
E37
VCC[26]
E38
VCC[27]
F25
VCC[28]
F26
VCC[29]
F28
VCC[30]
F32
VCC[31]
F34
VCC[32]
F37
VCC[33]
F38
VCC[34]
F42
VCC[35]
G42
VCC[36]
H25
VCC[37]
H26
VCC[38]
H28
VCC[39]
H29
VCC[40]
H32
VCC[41]
H34
VCC[42]
H35
VCC[43]
H37
VCC[44]
H38
VCC[45]
H40
VCC[46]
J25
VCC[47]
J26
VCC[48]
J28
VCC[49]
J29
VCC[50]
J32
VCC[51]
J34
VCC[52]
J35
VCC[53]
J37
VCC[54]
J38
VCC[55]
J40
VCC[56]
J42
VCC[57]
K26
VCC[58]
K27
VCC[59]
K29
VCC[60]
K32
VCC[61]
K34
VCC[62]
K35
VCC[63]
K37
VCC[64]
K39
VCC[66]
K42
VCC[67]
L25
VCC[68]
L28
VCC[69]
L33
VCC[70]
L36
VCC[71]
L40
VCC[72]
N26
VCC[73]
N30
VCC[74]
N34
VCC[75]
N38
VCC[76]
IC,IVB_2CBGA,0P7
H_CPU_SVIDALRT# VR_SVID_DATA
VR_SVID_CLK
POWER
CORE SUPPLY
R close to CPU
R176 43_4
4
VCCIO[1] VCCIO[3] VCCIO[4] VCCIO[5] VCCIO[6] VCCIO[7] VCCIO[8]
VCCIO[9] VCCIO[10] VCCIO[11] VCCIO[12] VCCIO[13] VCCIO[14] VCCIO[15] VCCIO[16] VCCIO[17] VCCIO[18] VCCIO[19] VCCIO[20] VCCIO[21] VCCIO[22] VCCIO[23] VCCIO[24] VCCIO[25] VCCIO[26] VCCIO[27] VCCIO[28] VCCIO[29]
VCCIO[30] VCCIO[31] VCCIO[32]
PEG IO AND DDR IO
VCCIO[33] VCCIO[34] VCCIO[35] VCCIO[36] VCCIO[37] VCCIO[38] VCCIO[39] VCCIO[40] VCCIO[41] VCCIO[42] VCCIO[43] VCCIO[44] VCCIO[45] VCCIO[46] VCCIO[47] VCCIO[48] VCCIO[49]
VCCIO50
VCCIO51
VCCIO_SEL
VCCPQE[1] VCCPQE[2]
RAILS
VIDALERT#
VIDSCLK
VIDSOUT
VCC_SENSE VSS_SENSE
VCCIO_SENSE
VSS_SENSE_VCCIO
SENSE LINES SVID QUIET
4
IVB:8.5A
AF46 AG48 AG50 AG51 AJ17 AJ21 AJ25 AJ43 AJ47 AK50 AK51 AL14 AL15 AL16 AL20 AL22 AL26 AL45 AL48 AM16 AM17 AM21 AM43 AM47 AN20 AN42 AN45 AN48
AA14 AA15 AB17 AB20 AC13 AD16 AD18 AD21 AE14 AE15 AF16 AF18 AF20 AG15 AG16 AG17 AG20 AG21 AJ14 AJ15
W16 W17
BC22
AM25 AN22
A44 B43 C44
100- ±1% pull-up to VCC near processor.
F43 G43
AN16 AN17
R149 75/F_4
R148 130/F_4
R403 *1K/F_2
H_CPU_SVIDALRT# VR_SVID_CLK VR_SVID_DATA
VCCP_SENSE
VSSP_SENSE
+1.05V VR_SVID_ALERT# 27 VR_SVID_DATA 27
+1.05V VR_SVID_CLK 27
C173 1U/6.3V_2
C166 22U/6.3VS_6
C167 22U/6.3VS_6
C221 22U/6.3VS_6
C76 1U/6.3V_2
R130 100/F_2
R129 100/F_2 R390 10/F_4
R393 10/F_4
+1.05V
C71 1U/6.3V_2
C97 22U/6.3VS_6
C99 22U/6.3VS_6
C102 22U/6.3VS_6
C67 1U/6.3V_2 C74 1U/6.3V_2 C81 1U/6.3V_2 C93 1U/6.3V_2 C87 1U/6.3V_2 C64 1U/6.3V_2 C100 1U/6.3V_2 C210 1U/6.3V_2 C175 1U/6.3V_2 C86 1U/6.3V_2 C176 1U/6.3V_2 C98 1U/6.3V_2 C211 1U/6.3V_2
H_VTTVID1 25
+1.05V
+VCC_CORE
VCC_SENSE 27 VSS_SENSE 27
+1.05V
VCCP_SENSE 25 VSSP_SENSE 25
3
+VCC_GFX
C174 1U/6.3V_2
C101 22U/6.3VS_6
+1.5V_CPU
C246
22U/6.3VS_6
C321
22U/6.3VS_6
C248
22U/6.3VS_6
C294
1U/6.3V_2
C296
1U/6.3V_2
C295
1U/6.3V_2C190 2.2U/6.3VS_4
22U/6.3VS_6
22U/6.3VS_6
22U/6.3VS_6
TP17
+VCC_GFX
VCC_AXG_SENSE27 VSS_AXG_SENSE27
TP19
1U/6.3V_2
1U/6.3V_2
1U/6.3V_2
C271
C272
C247
C293
C297
C292
IVB: 1.5A
C335
C339
1U/6.3V_2
1U/6.3V_2
+VCCSA
C66
10U/6.3V_6
C63
10U/6.3V_6
IVB: 6A
10U/6.3V_6
330uFx1, 10uFx4
Zo impedance: 27.4ohm
Zo impedance: 27.4ohm
Q28 AON7410
4
C332 *470P/50V_4
1 3
5 2
MAIND
CPU VDDQ
3
C58
1U/6.3V_2
C341 10U/6.3V_6
+1.5V_CPU+1.5VSUS
C291
C65
10U/6.3V_6
R351 220_8
3
1
R22610/F_4
R19910/F_4
2
Q23
2N7002K
U19G
AA46
VAXG[1]
AB47
VAXG[2]
AB50
VAXG[3]
AB51
VAXG[4]
AB52
VAXG[5]
AB53
VAXG[6]
AB55
VAXG[7]
AB56
VAXG[8]
AB58
VAXG[9]
AB59
VAXG[10]
AC61
VAXG[11]
AD47
VAXG[12]
AD48
VAXG[13]
AD50
VAXG[14]
AD51
VAXG[15]
AD52
VAXG[16]
AD53
VAXG[17]
AD55
VAXG[18]
AD56
VAXG[19]
AD58
VAXG[20]
AD59
VAXG[21]
AE46
VAXG[22]
N45
VAXG[23]
P47
VAXG[24]
P48
VAXG[25]
P50
VAXG[26]
P51
VAXG[27]
P52
VAXG[28]
P53
VAXG[29]
P55
VAXG[30]
P56
VAXG[31]
P61
VAXG[32]
T48
VAXG[33]
T58
VAXG[34]
T59
VAXG[35]
T61
VAXG[36]
U46
VAXG[37]
V47
VAXG[38]
V48
VAXG[39]
V50
VAXG[40]
V51
VAXG[41]
V52
VAXG[42]
V53
VAXG[43]
V55
VAXG[44]
V56
VAXG[45]
V58
VAXG[46]
V59
VAXG[47]
W50
VAXG[48]
W51
VAXG[49]
W52
VAXG[50]
W53
VAXG[51]
W55
VAXG[52]
W56
VAXG[53]
W61
VAXG[54]
Y48
VAXG[55]
Y61
VAXG[56]
F45
VAXG_SENSE
G45
VSSAXG_SENSE
BB3
VCCPLL[1]
BC1
VCCPLL[2]
BC4
VCCPLL[3]
L17
VCCSA[1]
L21
VCCSA[2]
N16
VCCSA[3]
N20
VCCSA[4]
N22
VCCSA[5]
P17
VCCSA[6]
P20
VCCSA[7]
R16
VCCSA[8]
R18
VCCSA[9]
R21
VCCSA[10]
U15
VCCSA[11]
V16
VCCSA[12]
V17
VCCSA[13]
V18
VCCSA[14]
V21
VCCSA[15]
W20
VCCSA[16]
IC,IVB_2CBGA,0P7
MAIN_ONG 2,29
POWER
VREF
DDR3 - 1.5V RAILS
GRAPHICS
SENSE
LINES
1.8V RAIL
SA RAIL
VCCSA VID
SMDDR_VREF_DQ0_M3
2
SM_VREF
SA_DIMM_VREFDQ SB_DIMM_VREFDQ
VDDQ[10] VDDQ[11] VDDQ[12] VDDQ[13] VDDQ[14] VDDQ[15] VDDQ[16] VDDQ[17] VDDQ[18] VDDQ[19] VDDQ[20] VDDQ[21] VDDQ[22] VDDQ[23] VDDQ[24] VDDQ[25] VDDQ[26]
VCCDQ[1] VCCDQ[2]
QUIET RAILS
VDDQ_SENSE
VSS_SENSE_VDDQ
VCCSA_SENSE
SENSE LINES
VCCSA_VID[0] VCCSA_VID[1]
lines
2
VDDQ[1] VDDQ[2] VDDQ[3] VDDQ[4] VDDQ[5] VDDQ[6] VDDQ[7] VDDQ[8] VDDQ[9]
R404 *1K/F_2
+VDDR_REF_CPU +1.5V_CPU
AY43
BE7
SMDDR_VREF_DQ0_M3
BG7
20mils width
0.1U/10V_2
AJ28 AJ33 AJ36 AJ40 AL30 AL34 AL38 AL42 AM33 AM36 AM40 AN30 AN34 AN38 AR26 AR28 AR30 AR32 AR34 AR36 AR40 AV41 AW26 BA40 BB28 BG33
C337 10U/6.3V_6
C353 10U/6.3V_6
CPU center
CRB: 1uf*1
+1.5V_CPU
AM28 AN26
BC43 BA43
U10
D48 D49
SMDDR_VREF_DQ0_M3 12
R177 *100/F_4
VCCSA_SEL0 VCCSA_SEL
C336 1U/6.3V_2
C357
IVB: 5A
C352 10U/6.3V_6
C351 10U/6.3V_6
+VCCSA
VCCUSA_SENSE 26
Zo:55 ohm
R128 1K/F_2 R127 1K/F_2
1
CAD Note: +VDDR_REF_CPU should have 10 mil trace width
R402 1K/F_2
1
R391 1K/F_2
+VDDR_REF_CPU and DDR_VTTREF must use 10mils width
C349 10U/6.3V_6
C342 10U/6.3V_6
TP31 TP30
VCCSA_SEL0 26 VCCSA_SEL 26
R153 *0_4
R163
100K_4 NTC
NB5
NB5
NB5
3
Q26 2N7002K
2
C328 470P/50V_4
+1.5V_CPU
C350 10U/6.3V_6
C338 10U/6.3V_6
C344 0.1U/10V_2
C345 0.1U/10V_2
C343 0.1U/10V_2
C340 0.1U/10V_2
+3VPCU
THER_GPU THER_CPU
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
Custom Date: Sheet of
Date: Sheet of
Date: Sheet of
DDR_VTTREF 12,24
R372 3.3K/F_4
+1.5VSUS+1.5V_CPU
IO Thrm Protect
For 65 degree, 1.8v limit, (SW)
R164
16.5K/F_4
1 2
R154
3.3K/F_4
For 75 degree, 1.2v limit, (HW)
R139 0_4
1 2
R132 100K_4 NTC
PROJECT : Wolverine
PROJECT : Wolverine
PROJECT : Wolverine
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
IVB 3/4 (POWER)
IVB 3/4 (POWER)
IVB 3/4 (POWER)
1
C139
0.1U/10V_2
C138
0.1U/10V_2
04
MAIND 29
THRM_MOINTOR 21
THRM_MOINTOR1 21
4 29Monday, April 22, 2013
4 29Monday, April 22, 2013
4 29Monday, April 22, 2013
1A
1A
1A
5
4
3
2
1
U19H
A13
VSS[1]
A17
VSS[2]
A21
VSS[3]
A25
VSS[4]
A28
VSS[5]
A33
D D
C C
B B
A A
A37 A40 A45 A49 A53
A9
AA1 AA13 AA50 AA51 AA52 AA53 AA55 AA56
AA8 AB16 AB18 AB21 AB48 AB61 AC10 AC14 AC46
AC6 AD17 AD20
AD4 AD61 AE13
AE8
AF1 AF17 AF21 AF47 AF48 AF50 AF51 AF52 AF53 AF55 AF56 AF58 AF59 AG10 AG14 AG18 AG47 AG52 AG61
AG7
AH4 AH58 AJ13 AJ16 AJ20 AJ22 AJ26 AJ30 AJ34 AJ38 AJ42 AJ45 AJ48
AJ7
AK1 AK52 AL10 AL13 AL17 AL21 AL25 AL28 AL33 AL36 AL40 AL43 AL47 AL61
AM13 AM20 AM22 AM26 AM30 AM34
IC,IVB_2CBGA,0P7
VSS[6] VSS[7] VSS[8] VSS[9] VSS[10] VSS[11] VSS[12] VSS[13] VSS[14] VSS[15] VSS[16] VSS[17] VSS[18] VSS[19] VSS[20] VSS[21] VSS[22] VSS[23] VSS[24] VSS[25] VSS[26] VSS[27] VSS[28] VSS[29] VSS[30] VSS[31] VSS[32] VSS[33] VSS[34] VSS[35] VSS[36] VSS[37] VSS[38] VSS[39] VSS[40] VSS[41] VSS[42] VSS[43] VSS[44] VSS[45] VSS[46] VSS[47] VSS[48] VSS[49] VSS[50] VSS[51] VSS[52] VSS[53] VSS[54] VSS[55] VSS[56] VSS[57] VSS[58] VSS[59] VSS[60] VSS[61] VSS[62] VSS[63] VSS[64] VSS[65] VSS[66] VSS[67] VSS[68] VSS[69] VSS[70] VSS[71] VSS[72] VSS[73] VSS[74] VSS[75] VSS[76] VSS[77] VSS[78] VSS[79] VSS[80] VSS[81] VSS[82] VSS[83] VSS[84] VSS[85] VSS[86] VSS[87] VSS[88] VSS[89] VSS[90]
VSS
VSS[91] VSS[92] VSS[93] VSS[94] VSS[95] VSS[96] VSS[97] VSS[98]
VSS[99] VSS[100] VSS[101] VSS[102] VSS[103] VSS[104] VSS[105] VSS[106] VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158] VSS[159] VSS[160] VSS[161] VSS[162] VSS[163] VSS[164] VSS[165] VSS[166] VSS[167] VSS[168] VSS[169] VSS[170] VSS[171] VSS[172] VSS[173] VSS[174] VSS[175] VSS[176] VSS[177] VSS[178] VSS[179] VSS[180]
AM38 AM4 AM42 AM45 AM48 AM58 AN1 AN21 AN25 AN28 AN33 AN36 AN40 AN43 AN47 AN50 AN54 AP10 AP51 AP55 AP7 AR13 AR17 AR21 AR41 AR48 AR61 AR7 AT14 AT19 AT36 AT4 AT45 AT52 AT58 AU1 AU11 AU28 AU32 AU51 AU7 AV17 AV21 AV22 AV34 AV40 AV48 AV55 AW13 AW43 AW61 AW7 AY14 AY19 AY30 AY36 AY4 AY41 AY45 AY49 AY55 AY58 AY9 BA1 BA11 BA17 BA21 BA26 BA32 BA48 BA51 BB53 BC13 BC5 BC57 BD12 BD16 BD19 BD23 BD27 BD32 BD36 BD40 BD44 BD48 BD52 BD56 BD8 BE5 BG13
U19I
BG17 BG21 BG24 BG28 BG37 BG41 BG45 BG49 BG53
BG9 C29 C35 C40 D10 D14 D18 D22 D26 D29 D35
D4 D40 D43 D46 D50 D54 D58
D6 E25 E29
E3 E35 E40
F13 F15 F19 F29 F35 F40 F55
G51
G6 G61 H10 H14 H17 H21
H4 H53 H58
J1 J49 J55
K11 K21 K51
K8 L16 L20 L22 L26 L30 L34 L38 L43 L48 L61
M11 M15
IC,IVB_2CBGA,0P7
VSS[181] VSS[182] VSS[183] VSS[184] VSS[185] VSS[186] VSS[187] VSS[188] VSS[189] VSS[190] VSS[191] VSS[192] VSS[193] VSS[194] VSS[195] VSS[196] VSS[197] VSS[198] VSS[199] VSS[200] VSS[201] VSS[202] VSS[203] VSS[204] VSS[205] VSS[206] VSS[207] VSS[208] VSS[209] VSS[210] VSS[211] VSS[212] VSS[213] VSS[214] VSS[215] VSS[216] VSS[217] VSS[218] VSS[219] VSS[220] VSS[221] VSS[222] VSS[223] VSS[224] VSS[225] VSS[226] VSS[227] VSS[228] VSS[229] VSS[230] VSS[231] VSS[232] VSS[233] VSS[234] VSS[235] VSS[236] VSS[237] VSS[238] VSS[239] VSS[240] VSS[241] VSS[242] VSS[243] VSS[244] VSS[245] VSS[246] VSS[247] VSS[248] VSS[249]
M4
VSS[250]
M58
VSS[251]
M6
VSS[252]
N1
VSS[253]
N17
VSS[254]
N21
VSS[255]
N25
VSS[256]
N28
VSS[257]
N33
VSS[258]
N36
VSS[259]
N40
VSS[260]
N43
VSS[261]
N47
VSS[262]
N48
VSS[263]
N51
VSS[264]
N52
VSS[265]
N56
VSS[266]
N61
VSS[267]
P14
VSS[268]
P16
VSS[269]
P18
VSS_NCTF_1 VSS_NCTF_2 VSS_NCTF_3 VSS_NCTF_4 VSS_NCTF_5 VSS_NCTF_6 VSS_NCTF_7 VSS_NCTF_8
VSS_NCTF_9 VSS_NCTF_10 VSS_NCTF_11
NCTF
VSS_NCTF_12 VSS_NCTF_13 VSS_NCTF_14
VSS[270] VSS[271] VSS[272] VSS[273] VSS[274] VSS[275] VSS[276] VSS[277] VSS[278] VSS[279] VSS[280] VSS[281] VSS[282] VSS[283] VSS[284] VSS[285] VSS[286] VSS[287] VSS[288] VSS[289] VSS[290] VSS[291] VSS[292] VSS[293] VSS[294] VSS[295] VSS[296] VSS[297] VSS[298] VSS[299] VSS[300]
P21 P58 P59 P9 R17 R20 R4 R46 T1 T47 T50 T51 T52 T53 T55 T56 U13 U8 V20 V61 W13 W15 W18 W21 W46 W8 Y4 Y47 Y58 Y59
A5 A57 BC61 BD3 BD59 BE4 BE58 BG5 BG57 C3 C58 D59 E1 E61
CDPTR
VSS
Processor Strapping
CFG2 (PCIe Static x16 Lane Numbering Reversal.)
CFG4 (DP Presence Strap)
CFG7 (PEG Defer Training)
CFG2
TP18
+VCC_CORE
TP24 TP28
TP22 TP23
CFG3 CFG4 CFG5 CFG6 CFG7
R144*49.9/F_4 R183*49.9/F_4
CFG[6:5] (PCIE Port Bifurcation Straps)
11: (Default) x16 - Device 1 functions 1 and 2 disabled 10: x8, x8 - Device 1 function 1 enabled ; function 2 disabled 01: Reserved - (Device 1 function 1 disabled ; function 2 enabled) 00: x8,x4,x4 - Device 1 functions 1 and 2 enabled
The CFG signals have a default value of '1' if not terminated on the board.
1 0
Normal Operation(Default) Lane Reversed
Disable; No physical DP attached to eDP
PEG train immediately following xxRESETB de assertion
Enable; An ext DP device is connected to eDP
PEG wait for BIOS training
U19E
B50
CFG[0]
C51
CFG[1]
B54
CFG[2]
D53
CFG[3]
A51
CFG[4]
C53
CFG[5]
C55
CFG[6]
H49
CFG[7]
A55
CFG[8]
H51
CFG[9]
K49
CFG[10]
K53
CFG[11]
F53
CFG[12]
G53
CFG[13]
L51
CFG[14]
F51
CFG[15]
D52
CFG[16]
L53
CFG[17]
H43
VCC_VAL_SENSE
K43
VSS_VAL_SENSE
H45
VAXG_VAL_SENSE
K45
VSSAXG_VAL_SENSE
F48
VCC_DIE_SENSE
G48
RSVD47
H48
RSVD6
K48
RSVD7
BA19
RSVD8
AV19
RSVD9
AT21
RSVD10
BB21
RSVD11
BB19
RSVD12
AY21
RSVD13
BA22
RSVD14
AY22
RSVD15
AU19
RSVD16
AU21
RSVD17
BD21
RSVD18
BD22
RSVD19
BD25
RSVD20
BD26
RSVD21
BG22
RSVD22
BE22
RSVD23
BG26
RSVD24
BE26
RSVD25
BF23
RSVD26
BE24
RSVD27
IC,IVB_2CBGA,0P7
RESERVED
BCLK_ITP
BCLK_ITP#
RSVD30 RSVD31 RSVD32 RSVD33
RSVD34 RSVD35 RSVD36 RSVD37 RSVD38
RSVD39 RSVD40
RSVD41 RSVD42 RSVD43 RSVD44
RSVD45
DC_TEST_A4 DC_TEST_C4 DC_TEST_D3
DC_TEST_D1 DC_TEST_A58 DC_TEST_A59 DC_TEST_C59 DC_TEST_A61 DC_TEST_C61 DC_TEST_D61
DC_TEST_BD61 DC_TEST_BE61
DC_TEST_BE59 DC_TEST_BG61 DC_TEST_BG59 DC_TEST_BG58
DC_TEST_BG4 DC_TEST_BG3 DC_TEST_BE3 DC_TEST_BG1 DC_TEST_BE1 DC_TEST_BD1
CFG2 CFG4 CFG7
N59 N58
N42 L42 L45 L47
M13 M14 U14 W14 P13
AT49 K24
AH2 AG13 AM14 AM15
N50
A4 C4 D3 D1 A58 A59 C59 A61 C61 D61 BD61 BE61 BE59 BG61 BG59 BG58 BG4 BG3 BE3 BG1 BE1 BD1
CFG5
R186 1K/F_2
CFG6
R184 *1K/F_2
R185 *1K/F_2 R187 1K/F_2 R145 *1K/F_2
05
TP45
TP47 TP46
TP48 TP49
TP50 TP51
TP52
PROJECT : Wolverine
PROJECT : Wolverine
PROJECT : Wolverine
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
Custom
IVB 4/4 (RSV,GND)
IVB 4/4 (RSV,GND)
NB5
NB5
5
4
3
2
NB5
IVB 4/4 (RSV,GND)
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
1A
1A
1A
5 29Monday, April 22, 2013
5 29Monday, April 22, 2013
5 29Monday, April 22, 2013
5
4
3
2
1
Cougar Point/Panther Point (DMI,FDI,PM)
U11C HM77
DMI_RXN02 DMI_RXN12 DMI_RXN22 DMI_RXN32
DMI_RXP02
+1.05V
DMI_RXP12 DMI_RXP22 DMI_RXP32
DMI_TXN02 DMI_TXN12 DMI_TXN22 DMI_TXN32
DMI_TXP02 DMI_TXP12 DMI_TXP22 DMI_TXP32
R158 49.9/F_4 R191 750/F_4
DMI_COMP DMI_RBIAS
D D
PV 3/27: R286/267/138 Change to shortpad
for DS3
SUSACK#_EC21
C C
XDP_DBRST#2
IMVP_PWRGD
EC_PWROK21
for DS3
SUSWARN#_EC21
R286 *0_4/S
C306 *1U/6.3V_2
PM_DRAM_PWRGD2
RSMRST#21
R267 *0_4/S
DNBSWON#21
R138 *0_4/S
for DS3
B B
SUS_PWR_ACK
XDP_DBRST#
EC_PWROK
EC_PWROK
RSMRST#
SUSWARN#
DNBSWON#
AC_PRESENT_R
PM_BATLOW#
PM_RI#
BC24
DMI0RXN
BE20
DMI1RXN
BG18
DMI2RXN
BG20
DMI3RXN
BE24
DMI0RXP
BC20
DMI1RXP
BJ18
DMI2RXP
BJ20
DMI3RXP
AW24
DMI0TXN
AW20
DMI1TXN
BB18
DMI2TXN
AV18
DMI3TXN
AY24
DMI0TXP
AY20
DMI1TXP
AY18
DMI2TXP
AU18
DMI3TXP
BJ24
DMI_ZCOMP
BG25
DMI_IRCOMP
BH21
DMI2RBIAS
C12
SUSACK#
K3
SYS_RESET#
P12
SYS_PWROK
L22
PWROK
L10
APWROK
B13
DRAMPWROK
C21
RSMRST#
(+3VS5)
K16
SUSWARN#/SUSPWRDNACK/GPIO30
E20
PWRBTN#
(DSW)
H20
ACPRESENT / GPIO31
(+3VS5)
E10
BATLOW# / GPIO72
A10
RI#
DMI
FDI
CLKRUN# / GPIO32
SUS_STAT# / GPIO61
SUSCLK / GPIO62
SLP_S5# / GPIO63
System Power Management
SLP_LAN# / GPIO29
FDI_FSYNC0 FDI_FSYNC1 FDI_LSYNC0 FDI_LSYNC1
DSWVRMEN
FDI_RXN0 FDI_RXN1 FDI_RXN2 FDI_RXN3 FDI_RXN4 FDI_RXN5 FDI_RXN6 FDI_RXN7
FDI_RXP0 FDI_RXP1 FDI_RXP2 FDI_RXP3 FDI_RXP4 FDI_RXP5 FDI_RXP6 FDI_RXP7
FDI_INT
DPWROK
WAKE#
(+3V)
(+3VS5)
(+3VS5)
(+3VS5)
SLP_S4#
SLP_S3#
SLP_A#
SLP_SUS#
PMSYNCH
(+3VS5)
BJ14 AY14 BE14 BH13 BC12 BJ12 BG10 BG9
BG14 BB14 BF14 BG13 BE12 BG12 BJ10 BH9
AW16 AV12 BC10 AV14 BB10
A18
DSWVREN
E22
DPWROK RSMRST#
B9
PCIE_WAKE#
N3
CLKRUN#
G8
SUS_SATA#
N14
PCH_SUSCLK_L
D10
H4
F4
G10
G16
AP14
K14
SLP_LAN#
SLP_SUS#
R123 *0_4/S R122 *0_4
R166 *0_4/S
FDI_TXN0 2 FDI_TXN1 2 FDI_TXN2 2 FDI_TXN3 2 FDI_TXN4 2 FDI_TXN5 2 FDI_TXN6 2 FDI_TXN7 2
FDI_TXP0 2 FDI_TXP1 2 FDI_TXP2 2 FDI_TXP3 2 FDI_TXP4 2 FDI_TXP5 2 FDI_TXP6 2 FDI_TXP7 2
FDI_INT 2 FDI_FSYNC0 2 FDI_FSYNC1 2 FDI_LSYNC0 2 FDI_LSYNC1 2
DPWROK_EC
PCIE_WAKE# 18,19,21
CLKRUN# 20,21
TP29
SUSC# 21
SUSB# 21
for DS3
SLP_SUS#_EC
PM_SYNC 2
PV 3/27: R166 Change to shortpad
DPWROK_EC 21
PV 3/27: R123 Change to shortpad
PCH_SUSCLK 21
PCH_LVDS_BLON14
PCH_DISP_ON14
PCH_DPST_PWM14
+3V
for DS3
SLP_SUS#_EC 21AC_PRESENT_EC21
Cougar Point/Panther Point (LVDS,DDI)
U11D HM77
J47
R45 2.2K_2 R46 2.2K_2
R37 2.37K/F_4
TP5 TP1
CTRL_CLK CTRL_DATA
LVD_IBG
TP7 TP6
TP34 TP37 TP38
TP4 TP39 TP33
TP8
DAC_IREF
R39 1K/F_2
M45
AF37 AF36
AE48 AE47
AK39 AK40
AN48 AM47 AK47
AJ48
AN47 AM49 AK49
AJ47
AF40 AF39
AH45 AH47
AF49 AF45
AH43 AH49
AF47 AF43
N48
M40
M47 M49
P45 T40
K47 T45
P39
P49 T49
T39
T43 T42
L_BKLTEN L_VDD_EN
L_BKLTCTL L_DDC_CLK
L_DDC_DATA L_CTRL_CLK
L_CTRL_DATA LVD_IBG
LVD_VBG LVD_VREFH
LVD_VREFL
LVDSA_CLK# LVDSA_CLK
LVDSA_DATA#0 LVDSA_DATA#1 LVDSA_DATA#2 LVDSA_DATA#3
LVDSA_DATA0 LVDSA_DATA1 LVDSA_DATA2 LVDSA_DATA3
LVDSB_CLK# LVDSB_CLK
LVDSB_DATA#0 LVDSB_DATA#1 LVDSB_DATA#2 LVDSB_DATA#3
LVDSB_DATA0 LVDSB_DATA1 LVDSB_DATA2 LVDSB_DATA3
CRT_BLUE CRT_GREEN CRT_RED
CRT_DDC_CLK CRT_DDC_DATA
CRT_HSYNC CRT_VSYNC
DAC_IREF CRT_IRTN
LVDS
CRT
SDVO_TVCLKINN SDVO_TVCLKINP
SDVO_STALLN SDVO_STALLP
SDVO_CTRLCLK
SDVO_CTRLDATA
DDPC_CTRLCLK
DDPC_CTRLDATA
Digital Display Interface
DDPD_CTRLCLK
DDPD_CTRLDATA
SDVO_INTN SDVO_INTP
DDPB_AUXN DDPB_AUXP
DDPB_HPD
DDPB_0N DDPB_0P DDPB_1N DDPB_1P DDPB_2N DDPB_2P DDPB_3N DDPB_3P
DDPC_AUXN DDPC_AUXP
DDPC_HPD
DDPC_0N
DDPC_0P
DDPC_1N
DDPC_1P
DDPC_2N
DDPC_2P
DDPC_3N
DDPC_3P
DDPD_AUXN DDPD_AUXP
DDPD_HPD
DDPD_0N
DDPD_0P
DDPD_1N
DDPD_1P
DDPD_2N
DDPD_2P
DDPD_3N
DDPD_3P
AP43 AP45
AM42 AM40
AP39 AP40
P38 M39
AT49 AT47 AT40
AV42 AV40 AV45 AV46 AU48 AU47 AV47 AV49
P46 P42
AP47 AP49 AT38
AY47 AY49 AY43 AY45 BA47 BA48 BB47 BB49
M43 M36
AT45 AT43 BH41
BB43 BB45 BF44 BE44 BF42 BE42 BJ42 BG42
HDMI_SCLK HDMI_SDATA
HDMI_HPD IN_D2#
IN_D2 IN_D1# IN_D1 IN_D0# IN_D0 IN_CLK# IN_CLK
+3V_RTC7,10
06
HDMI_SCLK 17
HDMI_SDATA 17
HDMI_HPD 17 IN_D2# 17
IN_D2 17 IN_D1# 17 IN_D1 17 IN_D0# 17 IN_D0 17 IN_CLK# 17 IN_CLK 17
+3V2,7,8,9,10,12,13,14,15,16,17,18,19,20,21,25,27,29
+3VS59,10,18,19,20,23,25,29
+1.05V2,4,7,8,10,20,21,25,27
+3VPCU4,7,15,17,18,19,21,22,23
INT. HDMI
PCH Pull-high/low(CLG)
PM_RI# PM_BATLOW# PCIE_WAKE# SLP_LAN# SUSWARN# SUS_PWR_ACK
AC_PRESENT_R
A A
CLKRUN# XDP_DBRST#
RSMRST# IMVP_PWRGD
for DS3
R296 10K/F_2 R257 8.2K_2 R295 10K/F_2 R211 *10K/F_2 R268 *10K/F_2 R273 *10K/F_2
R141 10K/F_2
R331 8.2K_2 R336 1K/F_2 R335 *1K/F_2 R126 10K/F_2 R326 *100K/F_2
+3V_DEEP_SUS
+3VS5
+3V
INTEL DG
5
INTEL DG
for DS3
PV 3/27: R133 Change to shortpad
SLP_SUS_ON21
R133 *0_4/S
C125 *10P/25V_2
C197 1U/6.3V_2
4
R136 100K/F_2
R193 *0_6
U9
5
IN
4
IN
3
ON/OFF
IC(5P) G5243AT11U
OUT GND
System PWR_OK(CLG)
IMVP_PWRGD EC_PWROK
PROJECT : Wolverine
PROJECT : Wolverine
PROJECT : Wolverine
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
Custom
PCH 1/6 (DMI/FDI/VIDEO)
PCH 1/6 (DMI/FDI/VIDEO)
PCH 1/6 (DMI/FDI/VIDEO)
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
R254 100K/F_2
IMVP_PWRGD 21,27
6 29Monday, April 22, 2013
6 29Monday, April 22, 2013
6 29Monday, April 22, 2013
1A
1A
1A
OUT GND
1 2
+5V_DEEP_SUS
C195
0.1U/10V_2
+3V_RTC
R202 330K_4
DSWVREN
On Die DSW VR Enable High = Enable (Default)
Low = Disable
NB5
NB5
2
NB5
C196 1U/6.3V_2
+5VS5
R140 *100K/F_2
R194 *0_4
U10
5
IN
4
IN
3
ON/OFF
IC(5P) G5243AT11U
+3V_DEEP_SUS+3VS5
1 2
C207
0.1U/10V_2
SLP_SUS_ON
3
5
Cougar Point/Panther Point (HDA,JTAG,SATA)
RTC_X1 RTC_X2 RTC_RST# SRTC_RST#
R150 1M_2
D D
+3V_RTC
ACZ_SPKR16
ACZ_SDIN016
for DS3
+3V_DEEP_SUS
C C
SIO_EXT_SCI#21
R110 10K/F_2
SM_INTRUDER# PCH_INVRMEN
ACZ_BCLK ACZ_SYNC ACZ_SPKR ACZ_RST#
ACZ_SDOUT
SIO_EXT_SCI#
PCH_SPI_CS0#
PCH_SPI_SI PCH_SPI_SO
A20 C20 D20 G22 K22 C17
N34 L34 T10 K34
E34 G34 C34 A34
A36
C36
GPIO33BIOS_WP#
N32
Y14
U11A HM77
RTCX1 RTCX2 RTCRST# SRTCRST# INTRUDER# INTVRMEN
HDA_BCLK HDA_SYNC SPKR HDA_RST#
HDA_SDIN0 HDA_SDIN1 HDA_SDIN2 HDA_SDIN3
HDA_SDO
(+3V)
HDA_DOCK_EN# / GPIO33
(+3VS5)
HDA_DOCK_RST# / GPIO13
J3
JTAG_TCK
H7
JTAG_TMS
K5
JTAG_TDI
H1
JTAG_TDO
T3
SPI_CLK SPI_CS0#
T1
SPI_CS1#
V4
SPI_MOSI
U3
SPI_MISO
JTAG
ph
B B
PCH Strap Table
Pin Name Strap description Sampled Configuration
SPKR GNT3# / GPIO55 Top-Block Swap Override
No reboot mode setting PWROK
PWROK
INTVRMEN Integrated 1.05V VRM enable ALWAYS Should be always pull-up HDA_DOCK_EN#/GPIO33 GNT1# / GPIO51
GPIO19
Different from Calpella
GNT2# / GPIO53 NV_ALE
NV_CLE
A A
HDA_SYNC On-Die PLL VR Voltage Select RSMRST
Flash Descriptor Security
Only for Interposer
Boot BIOS Selection 1 [bit-1] Boot BIOS Selection 0 [bit-0] ESI strap (Server only)
Intel Anti-Theft HDD protection
Only for Interposer
DMI Termination voltage weak pull-down 20kohm
PWROK PWROK PWROK PWROK PWROK 0 = Disable (Internal pull-down 20kohm)
PWROK
HDA_SDO PWROKFlash Descriptor Security GPIO8
GPIO28
Different from Calpella
Integrated Clock Chip Enable Should be pull-down (weak pull-up 20K)RSMRST# On-die PLL Voltage Regulator RSMRST#
SPI_MOSI iTPM function Disable APWROK
5
4
FWH0 / LAD0 FWH1 / LAD1 FWH2 / LAD2 FWH3 / LAD3
LPC
FWH4 / LFRAME#
LDRQ0#
LDRQ1# / GPIO23
RTCIHDA
SPI
(+3V)
SERIRQ
SATA0RXN SATA0RXP SATA0TXN
SATA0TXP
SATA1RXN SATA1RXP
SATA 6G
SATA1TXN
SATA1TXP
SATA2RXN SATA2RXP SATA2TXN
SATA2TXP
SATA3RXN SATA3RXP SATA3TXN
SATA3TXP
SATA4RXN SATA4RXP SATA4TXN
SATA
SATA4TXP
SATA5RXN SATA5RXP SATA5TXN
SATA5TXP
SATAICOMPO
SATAICOMPI
SATA3RCOMPO
SATA3COMPI
SATA3RBIAS
SATALED#
(+3V)
SATA0GP / GPIO21
(+3V)
SATA1GP / GPIO19
0 = Default (weak pull-down 20K)
1 = Setting to No-Reboot mode
0 = "top-block swap" mode
1 = Default (weak pull-up 20K)
0 = Override
1 = Default (weak pull-up 20K)
GNT0#GNT1#
11 00
Should not be pull-down (weak pull-up 20K)
0 = Support by 1.8V (weak pull-down) 1 = Support by 1.5V
0 = Override
1 = Default (weak pull-up 20K)
0 = Disable
1 = Enable (Default) 0 = Default (weak pull-down 20K)
1 = Enable
4
C38 A38 B37 C37
D36 E36
K36 V5
AM3 AM1 AP7 AP5
AM10 AM8 AP11 AP10
AD7 AD5 AH5 AH4
AB8 AB10 AF3 AF1
Y7 Y5 AD3 AD1
Y3 Y1 AB3 AB1
Y11 Y10
AB12 AB13
AH1
P3 V14 P1
Boot Location
SERIRQ
SATA_RXN1 SATA_RXP1 SATA_TXN1 SATA_TXP1
SATA_RXN0 SATA_RXP0 SATA_TXN0 SATA_TXP0
SATA_COMP
SATA3_COMP
SATA3_RBIASPCH_SPI_CLK
SATA0GP
SPI
LPC
3
LAD0 18,20,21 LAD1 18,20,21 LAD2 18,20,21 LAD3 18,20,21
LFRAME# 18,20,21
R357 8.2K_2
+3V SERIRQ 20,21
SATA_RXN1 14 SATA_RXP1 14 SATA_TXN1 14 SATA_TXP1 14
mSATA (SATA 6Gb/s)
Base HDD
SATA_RXN0 15,17 SATA_RXP0 15,17 SATA_TXN0 15,17 SATA_TXP0 15,17
R361 37.4/F_4
R360 49.9/F_4 R92 33_2
R362 750/F_4
R327 10K/F_2 R344 10K/F_2
R328 *10K/F_2
+1.05V
+3V
SATA0GP 14
for SI 2/21: add SATA0GP
+3V
DG recommended that SATA AC coupling capacitors should be close to the connector (<100 mils) for optimal signal quality.
+5VPCU
RTC Power trace width 20mils.
R79 2.2K_2
R83
4.7K/F_2
R85 15K
VCCRTC_1
VCCRTC_3
Q2 MMBT3904-7-F
2
13
+3V_RTC_0
2
RTC Clock 32.768KHz
C159 10P/25V_4
C158 10P/25V_4
PV 3/26: Change C158/C159 to 10P & 0402
RTC Circuitry(RTC)
RTC Power trace width 20mils.
+3V_RTC_0
R54 1K/F_2
12
CN1 RTC_CONN
for SI 2/21: Change RTC conn
ACZ_RST#_AUDIO16
ACZ_SDOUT_AUDIO16
BIT_CLK_AUDIO16
C96
*10P/25V_2
ACZ_SYNC_AUDIO16
R102 33_2
Circuit
R249 *1K/F_2
+3V
R40 10K/F_2
+3V
+3V_RTC
R201 330K_4
GPIO33
[Need external pull-down for LPC BIOS] Default weak pull-up on GNT0/1#
USE GPIO PIN
R323 2.2K_2
+3V
for DS3
+3V_DEEP_SUS
R91 *1K/F_2
R90 *1K/F_2
+3V_DEEP_SUS
3
ACZ_SPKR
PCI_GNT3# 8
PCH_INVRMEN
ACZ_SDOUT
ACZ_SDOUT
R84 1K/F_2
GPIO33_EC 21
NV_CLE 9 H_SNB_IVB# 2
ACZ_SYNC
Vender EON
AMIC 4MB AKE39F-0800 (A25LQ32AM-F/Q) Socket
Size
P/N
4MB
AKE39ZN0Q02 (EN25Q32B-104HIP) AKE39FP0Z02 (MX25L3206EM2I-12G)MX
4MB
DFHS08FS023(91960-0084L-8P-SOCKET)
PCH_SPI_CS0# PCH_SPI_CS0#_R PCH_SPI_CLK
+3V 2,6,8,9,10,12,13,14,15,16,17,18,19,20,21,25,27,29 +5V 10,14,15,16,17,18,29 +1.8V 10,25 +1.05V 2,4,6,8,10,20,21,25,27 +3VS5 6,9,10,18,19,20,23,25,29 +3VPCU 4,15,17,18,19,21,22,23 +3V_RTC 6,10
2
+3V
12
+3VPCU
+3V_RTC_1
D3 BAT54C
HDA Bus(CLG)
R106 33_2
R117 33_2
R98 10K/F_2
+5V
R101
1M_2
PCH_SPI1_CLK_R PCH_SPI1_SI_RPCH_SPI_SI PCH_SPI1_SO_RPCH_SPI_SO
C313 22P/25V_2
NB5
NB5
NB5
BIOS_WP#
R82 3.3K_2
1
RTC_X1
1
C83
R179 10M_4
RTC_X2
30mils
+3V_RTC
2
R195
20K_2
R198 20K_2
C141 *1U/6.3V_2
Q4 2N7002K
3
10P/25V_2
R197 *0_6
ACZ_SYNCACZ_SYNC_R1
C199 1U/6.3V_2
C202 1U/6.3V_2
SRTC_RST#RTC_RST#
SRTC_RST#
Y3
32.768KHz
ACZ_RST# ACZ_SDOUT ACZ_BCLK
PCH SPI ROM(CLG)
U3
1
CE#
6
SCK
5
SI
2
SO
3
WP#
EN25Q32B-104HIP
AKE39ZN0800
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
Custom Date: Sheet of
Date: Sheet of
Date: Sheet of
8
VDD
7
R81 3.3K_2
HOLD#
4
VSS
PROJECT : Wolverine
PROJECT : Wolverine
PROJECT : Wolverine
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PCH 2/6 (SATA/HDA/SPI)
PCH 2/6 (SATA/HDA/SPI)
PCH 2/6 (SATA/HDA/SPI)
C57
0.1U/10V_2R324 1K/F_2
1
07
RTC_RST#
+3V
7 29Monday, April 22, 2013
7 29Monday, April 22, 2013
7 29Monday, April 22, 2013
1A
1A
1A
5
PCI/USBOC# Pull-up(CLG)
1
USB_OC6#
2
USB_OC0#
3
PCH_AOCS# USB_OC5#USB_OC2#
56
R33 0_2
*BLM15AG121SS1
R462
R43 22_2
R77 22_2
R80 22_2
C54 18P/25V_2
EMI(near PCH)
R165 2.2K_2 R213 2.2K_2
+3V
PCI_PIRQA#
R47 8.2K_2
PCI_PIRQB#
R60 8.2K_2
PCI_PIRQC#
R61 8.2K_2
PCI_PIRQD#
R62 8.2K_2
MPC_PWR_CTRL# ACC_LED# BT_COMBO_EN#
D D
SI modify on 4/2
for DS3
USB_OC4# USB_OC1#
USB_OC3#
USB3.0
C C
SI 2/20: R33 stuff
B B
CLK_PCI_TPM20
CLK_33M_DEBUG18
CLK_33M_KBC21
GPIO3 GPIO52 GPIO54
PIRQH#17,21
R51 10K/F_2 R59 10K/F_2 R41 10K/F_2
R44 10K/F_2 R49 10K/F_2 R58 10K/F_2
+3V_DEEP_SUS
RP1
10
9 8 7 4
10K_10P8R_6
USB30_RX1-19
USB30_RX1+19
USB30_TX1-19
USB30_TX1+19
BT_COMBO_EN#18
PCI_GNT3#7
PIRQH#
BOARD_ID39
R50 8.2K_2
+3V
R32 *0_2
CLK_PCI_FB
C53
18P/25V_2
SMBus/Pull-up(CLG)
SI modify on 4/2
SMB_ME1_CLK SMB_ME1_DAT
A A
PLTRST#(CLG)
R313
PCI_PLTRST#
*0_4/S
PLTRST#
R358 100K/F_2
PLTRST# 2,18,19,20,21
5
Cougar Point-M/Panther Point (PCI,USB,NVRAM)
U11E HM77
BG26
TP1
BJ26
TP2
BH25
TP3
BJ16
TP4
BG16
TP5
AH38
TP6
AH37
TP7
AK43
TP8
AK45
TP9
C18
TP10
N30
TP11
H3
TP12
AH12
TP13
AM4
TP14
AM5
TP15
Y13
TP16
K24
TP17
L24
TP18
AB46
TP19
AB45
TP20
PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD#
BT_COMBO_EN#
GPIO52 GPIO54
ACC_LED# PCI_GNT3#
MPC_PWR_CTRL#
GPIO3
PIRQH#_R
PCI_PLTRST#
CLK_PCI_TPM_R
CLK_PCI_FB_R
CLK_PCI_LPC_R
CLK_PCI_EC_R
M20
AY16
BG46
BE28
BC30
BE32 BJ32
BC28
BE30 BF32
BG32
AV26 BB26
AU28
AY30
AU26
AY26 AV28
AW30
B21
K40 K38 H38 G38
C46 C44 E40
D47 E42 F46
G42 G40 C42 D44
K10
C6
H49 H43 J48 K42 H40
TP21 TP22 TP23 TP24
USB3Rn1 USB3Rn2 USB3Rn3 USB3Rn4 USB3Rp1 USB3Rp2 USB3Rp3 USB3Rp4 USB3Tn1 USB3Tn2 USB3Tn3 USB3Tn4 USB3Tp1 USB3Tp2 USB3Tp3 USB3Tp4
PIRQA# PIRQB# PIRQC# PIRQD#
REQ1# / GPIO50 REQ2# / GPIO52 REQ3# / GPIO54
GNT1# / GPIO51 GNT2# / GPIO53 GNT3# / GPIO55
PIRQE# / GPIO2 PIRQF# / GPIO3 PIRQG# / GPIO4 PIRQH# / GPIO5
PME# PLTRST#
CLKOUT_PCI0 CLKOUT_PCI1 CLKOUT_PCI2 CLKOUT_PCI3 CLKOUT_PCI4
RSVD
(+3V) (+3V) (+3V)
(+3V) (+3V) (+3V)
(+3V) (+3V) (+3V) (+3V)
PCI
(+3VS5) (+3VS5) (+3VS5) (+3VS5) (+3VS5) (+3VS5) (+3VS5) (+3VS5)
SMBus/Pull-up(CLG)
+3V_DEEP_SUS
SMB_RUN_DAT12,18
SMB_RUN_CLK12,18
MBCLK22,12,15,21
MBDATA22,12,15,21
R353 4.7K/F_2
+3V
SMB_RUN_DAT
R352 4.7K/F_2
+3V
SMB_RUN_CLK SMB_PCH_CLK
Q13
4 3
1
*2N7002DW
Q24
4 3
1
2N7002DW
USB
4
RSVD1 RSVD2 RSVD3 RSVD4
RSVD5 RSVD6
RSVD7 RSVD8
RSVD9 RSVD10 RSVD11 RSVD12 RSVD13 RSVD14 RSVD15 RSVD16 RSVD17 RSVD18 RSVD19 RSVD20 RSVD21 RSVD22
RSVD23 RSVD24
RSVD25 RSVD26
RSVD27 RSVD28
RSVD29
USBP0N USBP0P USBP1N USBP1P USBP2N USBP2P USBP3N USBP3P USBP4N USBP4P USBP5N USBP5P USBP6N USBP6P USBP7N USBP7P USBP8N USBP8P USBP9N USBP9P
USBP10N USBP10P USBP11N USBP11P USBP12N USBP12P USBP13N USBP13P
USBRBIAS#
USBRBIAS
OC0# / GPIO59 OC1# / GPIO40 OC2# / GPIO41 OC3# / GPIO42 OC4# / GPIO43
OC5# / GPIO9 OC6# / GPIO10 OC7# / GPIO14
+3V
5
2 6
+3V
5
SMB_PCH_DAT
2 6
4
AY7 AV7 AU3 BG4
AT10 BC8
AU2 AT4 AT3 AT1 AY3 AT5 AV3 AV1 BB1 BA3 BB5 BB3 BB7 BE8 BD4 BF6
AV5 AV10
AT8 AY5
BA2 AT12
BF3
C24 A24 C25 B25 C26 A26 K28 H28 E28 D28 C28 A28 C29 B29 N28 M28 L30 K30 G30 E30 C30 A30 L32 K32 G32 E32 C32 A32
C33
B33
A14 K20 B17 C16 L16 A16 D14 C14
SMB_ME1_CLK
SMB_ME1_DAT
PCIE_RXN3_WLAN18 PCIE_RXP3_WLAN18
WLAN
Cardreader
PCIE_TXN3_WLAN18 PCIE_TXP3_WLAN18
PCIE_RXN2_CARD19 PCIE_RXP2_CARD19
PCIE_TXN2_CARD19 PCIE_TXP2_CARD19
MPC_PWR_CTRL#
ACC_LED#
12/13 Add for EMI
for SI 2/21: Change USB net name
USB-_COMBO 17 USB+_COMBO 17
USB-_SENSOR 13
USB+_SENSOR 13 USB-_CAMERA 13 USB+_CAMERA 13 USB-_CR 17 USB+_CR 17
USB2.0/USB3.0 COMBO 1st
USB2.0(M/B-1)
Sensor HUB Camera
(USBP2)
USB2.0 Cardreader
for SI 2/21: Change USB net name
USB_BIAS
USB_OC0# USB_OC1# USB_OC2# USB_OC3# USB_OC4# USB_OC5# USB_OC6# PCH_AOCS#
USB-_TP 17
USB+_TP 17
USB-_LEFT 17 USB+_LEFT 17 USB-_WLAN 18 USB+_WLAN 18 USB-_TS 15 USB+_TS 15
R100
22.6/F_4
(USBP8)
TP
(USBP9)
USB2.0
(USBP10)
WLAN
Touch Screen
10/25:modify for 14/15 co-lay
CLK_REQ/Strap Pin(CLG)
CLK_PCIE_REQ1# PCIE_CLKREQ_CR#
PCIE_CLKREQ_WLAN# CLK_PCIE_REQ3# CLK_PCIE_REQ4#
CLK_PEGB_REQ# CLK_PEGA_REQ#
CLK_BUF_BCLK_N CLK_BUF_BCLK_P
CLK_BUF_PCIE_3GPLL# CLK_BUF_PCIE_3GPLL CLK_BUF_DREFCLK# CLK_BUF_DREFCLK CLK_BUF_DREFSSCLK# CLK_BUF_DREFSSCLK CLK_PCH_14M
CLOCK TERMINATION for FCIM
R332 10K/F_2 R347 10K/F_2
for DS3for DS3
R340 10K/F_2 R293 10K/F_2 R235 10K/F_2
Intel DG request
R307 10K/F_2 R325 10K/F_2
R137 10K/F_2 R303 2.2K_2 R131 10K/F_2
R239 10K/F_2 R248 10K/F_2 R142 10K/F_2 R143 10K/F_2 R341 10K/F_2 R342 10K/F_2 R69 10K/F_2
C110 0.1U/10V_2 C108 0.1U/10V_2
C95 0.1U/10V_2 C88 0.1U/10V_2
MPC Switch Control
MPC_PWR_CTRL#
R48 *1K/F_2
EC2 680P/16V_2
(USBP0)
(USBP1)
(USBP3)
Cardreader
(USBP11)
+3V
+3V_DEEP_SUS
3
Cougar Point-M/Panther Point (PCI-E,SMBUS,CLK)
PCIE_TXN3_C PCIE_TXP3_C
PCIE_TXN2_CR_C PCIE_TXP2_CR_C
Low = MPC ON High = MPC OFF (Default)
CLK_PCIE_WLANN CLK_PCIE_WLANP
WLAN
PCIE_CLKREQ_WLAN#
CLK_PCIE_REQ1#
CLK_PCIE_CRN CLK_PCIE_CRP
PCIE_CLKREQ_CR#
CLK_PCIE_REQ3#
CLK_PCIE_REQ4#
BOARD_ID09
CLK_PEGB_REQ#
BOARD_ID19
BOARD_ID29
PCIE Clock
WLAN
Cardreader
3
PCIE_CLKREQ_WLAN#18
CLK_PCIE_WLANN18 CLK_PCIE_WLANP18
CLK_PCIE_CRN19 CLK_PCIE_CRP19
PCIE_CLKREQ_CR#19
U11B HM77
BG34
PERN1
BJ34
PERP1
AV32
PETN1
AU32
PETP1
BE34
PERN2
BF34
PERP2
BB32
PETN2
AY32
PETP2
BG36
PERN3
BJ36
PERP3
AV34
PETN3
AU34
PETP3
BF36
PERN4
BE36
PERP4
AY34
PETN4
BB34
PETP4
BG37
PERN5
BH37
PERP5
AY36
PETN5
BB36
PETP5
BJ38
PERN6
BG38
PERP6
AU36
PETN6
AV36
PETP6
BG40
PERN7
BJ40
PERP7
AY40
PETN7
BB40
PETP7
BE38
PERN8
BC38
PERP8
AW38
PETN8
AY38
PETP8
Y40
CLKOUT_PCIE0N
Y39
CLKOUT_PCIE0P
J2
PCIECLKRQ0# / GPIO73
(+3VS5)
AB49
CLKOUT_PCIE1N
AB47
CLKOUT_PCIE1P
M1
PCIECLKRQ1# / GPIO18
(+3V)
AA48
CLKOUT_PCIE2N
AA47
CLKOUT_PCIE2P
V10
PCIECLKRQ2# / GPIO20
(+3V)
Y37
CLKOUT_PCIE3N
Y36
CLKOUT_PCIE3P
A8
PCIECLKRQ3# / GPIO25
(+3VS5)
Y43
CLKOUT_PCIE4N
Y45
CLKOUT_PCIE4P
L12
PCIECLKRQ4# / GPIO26
(+3VS5)
V45
CLKOUT_PCIE5N
V46
CLKOUT_PCIE5P
L14
PCIECLKRQ5# / GPIO44
(+3VS5)
AB42
CLKOUT_PEG_B_N
AB40
CLKOUT_PEG_B_P
E6
PEG_B_CLKRQ# / GPIO56
(+3VS5)
V40
CLKOUT_PCIE6N
V42
CLKOUT_PCIE6P
T13
PCIECLKRQ6# / GPIO45
(+3VS5)
V38
CLKOUT_PCIE7N
V37
CLKOUT_PCIE7P
K12
PCIECLKRQ7# / GPIO46
(+3VS5)
AK14
CLKOUT_ITPXDP_N
AK13
CLKOUT_ITPXDP_P
SMBUSController
SML1ALERT# / PCHHOT# / GPIO74
PCI-E*
CLOCKS
CLK_PCIE_WLANN CLK_PCIE_WLANP
PCIE_CLKREQ_WLAN#
CLK_PCIE_CRN CLK_PCIE_CRP
PCIE_CLKREQ_CR#
2
(+3VS5)
E12
SMBALERT# / GPIO11
SML0ALERT# / GPIO60
SML1CLK / GPIO58
SML1DATA / GPIO75
Link
PEG_A_CLKRQ# / GPIO47
CLKOUT_PEG_A_N CLKOUT_PEG_A_P
CLKOUT_DMI_N CLKOUT_DMI_P
CLKOUT_DP_N CLKOUT_DP_P
CLKIN_DMI_N CLKIN_DMI_P
CLKIN_GND1_N CLKIN_GND1_P
CLKIN_DOT_96N CLKIN_DOT_96P
CLKIN_SATA_N CLKIN_SATA_P
REFCLK14IN
CLKIN_PCILOOPBACK
XTAL25_OUT
XCLK_RCOMP
CLKOUTFLEX0 / GPIO64 CLKOUTFLEX1 / GPIO65 CLKOUTFLEX2 / GPIO66 CLKOUTFLEX3 / GPIO67
FLEX CLOCKS
SMBCLK
SMBDATA
(+3VS5)
SML0CLK
SML0DATA
(+3VS5) (+3VS5)
(+3VS5)
CL_CLK1
CL_DATA1
CL_RST1#
(+3VS5)
XTAL25_IN
(+3V) (+3V)
(+3V) (+3V)
SMBALERT#
H14
SMB_PCH_CLK
C9
SMB_PCH_DAT
A12
DRAMRST_CNTRL_PCH
C8
SMB_ME0_CLK
G12
SMB_ME0_DAT
C13
FPR_OFF
E14
SMB_ME1_CLK
M16
SMB_ME1_DAT
M7
T11
P10
M10
CLK_PEGA_REQ#
AB37 AB38
AV22 AU22
AM12 AM13
BF18
CLK_BUF_PCIE_3GPLL#
BE18
CLK_BUF_PCIE_3GPLL
BJ30
CLK_BUF_BCLK_N
BG30
CLK_BUF_BCLK_P
G24
CLK_BUF_DREFCLK#
E24
CLK_BUF_DREFCLK
AK7
CLK_BUF_DREFSSCLK#
AK5
CLK_BUF_DREFSSCLK
K45
CLK_PCH_14M
H45
CLK_PCI_FB
V47
XTAL25_IN
V49
XTAL25_OUT
Y47
XCLK_RCOMP
K43 F47 H47 K49
PV-1 4/22: C30/31 Change to 10P
for DS3
+3V2,6,7,9,10,12,13,14,15,16,17,18,19,20,21,25,27,29
+3VS56,9,10,18,19,20,23,25,29
2
1
DRAMRST_CNTRL_PCH 2
TP16
CLK_CPU_BCLKN 2 CLK_CPU_BCLKP 2
CLK_DPLL_SSCLKN 2 CLK_DPLL_SSCLKP 2
PV-1 4/15: Change Y2 footprint
R34 90.9/F_4
XTAL25_IN XTAL25_OUT
+3V_DEEP_SUS
PV modify on 5/24
R229 10K/F_2 R275 2.2K_2 R274 2.2K_2
R228 2.2K_2 R212 10K/F_2
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
Custom
NB5
NB5
NB5
Date: Sheet of
Date: Sheet of
Date: Sheet of
+1.05V
TP36
C30 10P/25V_2
23
R35
Y2
1M_2
25MHZ +-10PPM
4 1
C31 10P/25V_2
TP35
SMBus/Pull-up(CLG)
SMBALERT# SMB_PCH_CLK SMB_PCH_DAT SMB_ME0_CLK SMB_ME0_DAT FPR_OFF
PROJECT : Wolverine
PROJECT : Wolverine
PROJECT : Wolverine
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PCH 3/6 (PCIE/USB/CLK)
PCH 3/6 (PCIE/USB/CLK)
PCH 3/6 (PCIE/USB/CLK)
1
08
8 29Monday, April 22, 2013
8 29Monday, April 22, 2013
8 29Monday, April 22, 2013
1A
1A
1A
5
Cougar Point/Panther Point (GPIO,VSS_NCTF,RSVD)
Cougar Point/Panther Point (GPIO,VSS_NCTF,RSVD)
Cougar Point/Panther Point (GPIO,VSS_NCTF,RSVD)Cougar Point/Panther Point (GPIO,VSS_NCTF,RSVD)
PCI_SERR#21
SIO_EXT_SMI#21
D D
RF_OFF18
Vibrator _Out#15,21
for DS3
for SI 2/20: change net from "DEVSLP1" to "SATA2GP"
C C
CHIP_DOCK_DET#17
GPIO27_EC21
+3V
SATA2GP21
BT_OFF18
R337 10K/F_2
2011 12 01 : Modify net from DGPU_PRSNT# to DGPU_PRSNT
OPTIMUS POWER control pin DGPU_PWROK GPIO17 DGPU_HOLD_RST# DGPU_PWR_EN
B B
GPIO24 GPIO36
PCI_SERR#
R73 *0_4
R238 *0_4
SIO_EXT_SMI# BOARD_ID4 BOARD_ID5 BT_OFF LAN_DISABLE#_R RF_OFF
ODD_PRSNT#_R
Vibrator _Out#_R BIOS_REC
CHIP_DOCK_DET#
GPIO27
GPIO34
SATA2GP
FDI_OVRVLTG MFG_MODE DGPU_PRSNT TEST_SET_UP SATA5GP SV_DET
U11F HM77
T7
BMBUSY# / GPIO0
(+3V)
A42
TACH1 / GPIO1
(+3V)
H36
TACH2 / GPIO6
(+3V)
E38
TACH3 / GPIO7
(+3V)
C10
GPIO8
(+3VS5)
C4
LAN_PHY_PWR_CTRL / GPIO12
(+3VS5)
G2
GPIO15
(+3VS5)
U2
SATA4GP / GPIO16
(+3V)
D40
TACH0 / GPIO17
(+3V)
T5
SCLOCK / GPIO22
(+3V)
E8
GPIO24
(+3VS5)
E16
GPIO27
(DSW)
P8
GPIO28
(+3VS5)
K1
STP_PCI# / GPIO34
(+3V)
K4
GPIO35
(+3V)
V8
SATA2GP / GPIO36
(+3V)
M5
SATA3GP / GPIO37
(+3V)
N2
SLOAD / GPIO38
(+3V)
M3
SDATAOUT0 / GPIO39
(+3V)
V13
SDATAOUT1 / GPIO48
(+3V)
V3
SATA5GP / GPIO49 / TEMP_ALERT#
(+3V)
D6
GPIO57
(+3VS5)
A4
VSS_NCTF_1
A44
VSS_NCTF_2
A45
VSS_NCTF_3
A46
VSS_NCTF_4
A5
VSS_NCTF_5
A6
VSS_NCTF_6
B3
VSS_NCTF_7
B47
VSS_NCTF_8
BD1
VSS_NCTF_9
BD49
VSS_NCTF_10
BE1
VSS_NCTF_11
BE49
VSS_NCTF_12
BF1
VSS_NCTF_13
BF49
VSS_NCTF_14
4
C40
PECI
B41 C41 A40
P4 AU16 P5 AY11 AY10 T14 AY1
AH8 AK11 AH10 AK10
P37
BG2 BG48 BH3 BH47 BJ4 BJ44 BJ45 BJ46 BJ5 BJ6 C2 C48 D1 D49 E1 E49 F1 F49
GPIO68
GPIO69
GPIO70
EC_RCIN#
PCH_THRMTRIP#
NV_CLE
TACH4 / GPIO68
(+3V)
TACH5 / GPIO69
(+3V)
TACH6 / GPIO70
(+3V)
TACH7 / GPIO71
(+3V)
A20GATE
RCIN#
PROCPWRGD
NCTF
THRMTRIP#
INIT3_3V#
CPU/MISC
TS_VSS1 TS_VSS2 TS_VSS3 TS_VSS4
VSS_NCTF_15 VSS_NCTF_16 VSS_NCTF_17 VSS_NCTF_18 VSS_NCTF_19 VSS_NCTF_20 VSS_NCTF_21 VSS_NCTF_22 VSS_NCTF_23 VSS_NCTF_24 VSS_NCTF_25 VSS_NCTF_26 VSS_NCTF_27 VSS_NCTF_28 VSS_NCTF_29 VSS_NCTF_30 VSS_NCTF_31 VSS_NCTF_32
DF_TVS
NC_1
GPIO
R38 10K/F_2
R36 1.5K/F_4 R28 *1.5K/F_4
FPR_LOCK#
R312 390_4
NV_CLE 7
3
2
1
09
+3V
+3V
TP32
EC_A20GATE 21
EC_RCIN# 21 H_PWRGOOD 2 PM_THRMTRIP# 2,21
GPIO Pull-up/Pull-down(CLG)
MFG-TEST
MFG_MODE
R330 10K/F_2
Bios swap GPIO.
PCI_SERR#
R320 10K/F_2 R350 *0_4
for DS3
RF_OFF
Intel ME Crypto Transport Layer Security (TLS) cipher suite
Low = Disable (Default) High = Enable
SV_SET_UP High = Strong (Default)
R338 1K/F_2
TEST_SET_UP SV_DET
R345 10K/F_2
+3V
for SI 2/21: reserve R430
+3V
+3V_DEEP_SUS
BIOS RECOVERY High = Disable (Default)
+3V
R339 100K/F_2
BT_OFF LAN_DISABLE#_R
CHIP_DOCK_DET#
SIO_EXT_SMI# BT_OFF EC_A20GATE EC_RCIN# SATA5GP GPIO70 FPR_LOCK# ODD_PRSNT#_R Vibrator _Out#_R SATA2GP
SATA2GP Vibrator _Out#_R
GPIO27
BIOS_REC
Low = Enable
TEST DETECT Low = Default
R297 10K/F_2 R309 10K/F_2
R230 10K/F_2
R31 10K/F_2 R298 *10K/F_2 R250 10K/F_2 R251 10K/F_2 R346 10K/F_2 R27 1.5K/F_4 R29 1.5K/F_4 R348 10K/F_2 R72 10K/F_2 R322 10K/F_2
R430 *10K/F_2 R71 *10K/F_2
R217 10K/F_2 R216 *10K/F_2
R343 10K/F_2
for DS3
+3V_DEEP_SUS
+3V
+3VS5
+3V
Chief River BOARD ID SETTING
BOARD_ID0
BOARD_ID1
BOARD_ID2
BOARD_ID3
BOARD_ID4
BOARD_ID5
DGPU_PRSNT
SG Ra Rb
BOARD_ID0 BOARD_ID1 BOARD_ID2 BOARD_ID3
R210 *10K/F_2
R329 *10K/F_2
R227 *10K/F_2
R30 *10K/F_2
R66 *10K/F_2
R63 *10K/F_2
R334 *10K/F_2
UMA Rb Ra
for DS3
R349 100K/F_2
+3V_DEEP_SUS
+3V_DEEP_SUS
+3V_DEEP_SUS
+3V
SATA2GP/GPIO36 Reserved only
FDI TERMINATION VOLTAGE OVERRIDE
RaRb
NB5
NB5
3
2
NB5
FDI_OVRVLTG
Reserved only
+3V2,6,7,8,10,12,13,14,15,16,17,18,19,20,21,25,27,29
+3VS56,10,18,19,20,23,25,29
PROJECT : Wolverine
PROJECT : Wolverine
PROJECT : Wolverine
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
Custom
PCH 4/6 (GPIO/MISC)
PCH 4/6 (GPIO/MISC)
PCH 4/6 (GPIO/MISC)
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
9 29Monday, April 22, 2013
9 29Monday, April 22, 2013
9 29Monday, April 22, 2013
1A
1A
1A
BOARD_ID08 BOARD_ID18 BOARD_ID28
BOARD_ID4
BOARD_ID5
0
0
0
0
0
0 0
14": 0 15": 1
0
0
0
0
0
1
0
0
0
Model
U62 UMA
U62 DIS
A A
14"
15.6"
BOARD_ID1BOARD_ID2BOARD_ID3
BOARD_ID0
0
0
0
0
0
0
0
0
0 0 0
UMA: 0 DIS: 1
00000
1
0
0
0
BOARD_ID38
R209 10K/F_2
R354 10K/F_2
R236 10K/F_2
R42 10K/F_2
R65 10K/F_2
R64 10K/F_2
R333 10K/F_2
Stuff NC
5
4
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