HP rp7420 User Manual

QuickSpecs
HP 9000 rp7420 Server

Overview

The Flexible Advantage STarter base systems for the HP 9000 rp7420 Server allow for faster configurations and lower prices due to the semi configured base system bundles.
HP 9000 rp7420 Server FAST bundles
Product Number
base chassis and power supplies)
AB205A
AB206A
AB207A
AB208A
(Includes
Number of dual core PA-
8900/8800 processor modules
HP 9000 rp7420 Server System Overview-Front View
(processors)
2 (4)
4 (8)
6 (12)
8 (16)
Number of Cell Boards
1 1
1 1
2 2
2 2
Number of Core I/O
1.
Cell Boards (2)
2.
Hot-plug Disks (4)
3.
2N Redundant Hot-swap System Power (2)
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4.
N+1 Redundant Hot-swap Fans (2)
5.
2 Independant PCI Power Supplies
6.
Removable Media DVD or DAT
Page 1
QuickSpecs
Overview
HP 9000 rp7420 Server
HP 9000 rp7420 Server System Overview-Rear View
1.
N+1 PCI Coding Fans
2.
System Backplane (right side)
3.
Core I/O
4.
Power Cord Retention Bracket
5.
Dual-grid 2N Redundant Power Inputs
6.
Hot-swap Redundant Fans
7.
15 Hot-plug PCI-X Slots
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QuickSpecs

Standard Features

HP 9000 rp7420 Server
Minimum System
Maximum Server Capacities
Standard System Features
One processor core per dual core PA 8900/PA 8800 processors One Processor/Memory Cell Board 2-GB Memory (1 quad) One Core I/O board Two Hot-swap power supplies, providing 2N+1 protection Two Power cords Hot-plug 33/66/133-MHz×64-bit PCI-X slots-with adaptive signaling technology
Eight dual core PA-8900/8800 processor modules (16 processors) Two Processor/Memory Cell Boards 128-GB Memory (8 quads) Two Core I/O board sets Two Hot-swap power supplies, providing 2N protection Four power cords, providing 2N power and dual grid support Four internal hot-plug LVD SCSI disks 1 removable media drive, DVD or DAT 14 PCI expansion cards
64 bit HP UX 11i v1 & 11iv2 operating system External Ultra160 LVD SCSI channel Four Internal SCSI controllers 10/100/1000Base-T LAN (with auto speed sensing) Management Processor technology with Integrated Web Console and LAN console RS-232 local and remote (modem) console and UPS ports 10/100Base-T LAN port for LAN console and web console Rackmountable into HP 19-inch cabinets (factory or field integration) Rackmountable into some 3rd party cabinets Pedestal configuration One or Two hardware partitions (nPartitions) Factory integration of Proccessors, memory, disk drives, removable media drives, and I/O cards HP site planning and installation One-year warranty with next business day on-site service response Owner's Guide and General Usage media set
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QuickSpecs
Standard Features
HP 9000 rp7420 Server
High Availability
Security
N+1 Hot-swap cooling Redundant and hot-swap power supplies Hot-plug disks 2N power inputs (redundant line cords/dual power grid support) On-line memory page deallocation ECC protected SyncDRAM memory Full parity protection of data and address buses On-chip processor cache with ECC protection Memory "chip spare", "chip kill" like Dynamic Processor resilience and deallocation (processor deallocation on failure ) CPU deallocation on failure On-line addition and replacement of PCI I/O cards UPS power management Three independent Ultra160 buses to internal disks for mirroring across disks and controllers Journal file system Auto reboot On-line diagnostics and system health monitor
Separate console LAN port for system management Password protection on console port Disablement of remote console ports
Internet Server Functions
Client Configuration Services
Optional Web Services
Email
Remote Access Services
Internet server (inetd) Domain name server Routing (OSPF, BIND, RIP, EGP, HELLO, gateD) Network Time Protocol
Automatic configuration for printers, PCs, workstations, and X terminals (DHCP, Bootp, tftp, rbootp)
Netscape Communication Server Netscape Navigator
Mail, MailX, ELM Sendmail, MIME, SMTP, ESMTP
Telnet, ftp, anonymous ftp server
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QuickSpecs

Configuration

HP 9000 rp7420 Server
Configuration
Cell Boards
Cell Details
The HP 9000 rp7420 Server is a symmetrical multiprocessing (SMP) server supporting up to 8 high performance dual core PA 8900 (1.1 GHz or 1.0 GHz) or PA 8800 (1.0 GHz or 900 MHz) processor modules. A dual core processor module supports two processors resulting in a 16­processor core server. It also supports the sx1000 chip set. The rp7420 Server can be configured as a single SMP server or divided into two smaller, hardware partitioned (nPars), logical servers.
A minimum of one and a maximum of two cells can be ordered in an HP 9000 rp7420 Server. Each cell can be purchased with up to four active dual core PA 8900/PA 8800 processor modules (8 processors), or in combination with Instant Capacity processors. Four processor speeds are supported; 1.1 GHz and 1.0 GHz (using PA 8900) or 1.0 GHz and 900 MHz (using PA 8800). The ability to mix processor speeds within a chassis is supported (but processors within a cell or partition must be of the same speed). PA 8800 and PA 8900 may be mixed within the same chassis provided they are placed in different hardware partitions. PA 8800/PA 8900 and PA 8700+ processors may not be mixed in the same server The HP 9000 rp7420 (8 processor module slots) and HP 9000 rp8420 (16 processor module slots) servers share the same cell board. A processor module slot contains 1 dual core processor module (2 processors). The HP 9000 rp7420 Server cell board can be carried forward to the HP Integrity rx7620 and supported Itanium processors in that chassis. The HP 9000 rp7410 cell board (A6096A) CANNOT be carried forward to the HP 9000 rp7420 Server and must be replaced (although previous HP 9000 rp7410 memory can be carried forward). When replacing previous HP 9000 rp7410 cell boards in an upgrade situation, cell board and PA 8700/8700+ return credits may be used.
4 processor module slots (supporting up to 8 processors) 16 Memory DIMM slots Cell Controller Chip-sx1000 DC-DC Power converters
Cell Board Configuration Rules
Dual core PA 8900 processor module details
Cell boards are ordered individually Minimum: 1 cell board Maximum: 2 cell boards Cell slot 1 must be loaded first
1.1 GHz or 1.0 GHz frequencies Level 2 Cache: 64 MB Level 1 Cache: 3 MB (1.5 MB integrated cache per core) 44 bit physical addressing 4-processor set associative cache Single bit cache error correction 4-processor superscalar 56 instruction reorder buffer Full PA RISC 2.0 binary compatibility
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QuickSpecs
Configuration
HP 9000 rp7420 Server
Dual core PA-8800 processor module details
Processor Configuration Rules
Memory Configuration
1.0-GHz or 900 MHz frequencies Level 2 Cache: 32 MB Level 1 Cache: 3 MB (1.5-MB integrated cache per core) 44-bit physical addressing 4-processor set associative cache Single bit cache error correction 4-processor superscalar 56 instruction reorder buffer Full PA RISC 2.0 binary compatibility
Processors can be ordered individually (2 processors) or upgraded individually. There must be at least one active core (non iCAP) processor on each cell board. On each cell board, processors must be installed in the following sequence 0, 2, 1, 3
The memory DIMMs used in the HP 9000 rp7420 Server are sold in quads and are custom designed by HP. Each DIMM contains 36×4 SDRAM memory chips qualified to run at 125 MHz, with full ECC protection. DIMM sizes of 512 MB, 1 GB, 2 GB, and 4 GB are supported. HP 9000 rp7410 memory modules can be carried forward to the HP 9000 rp7420 Server. Each HP 9000 rp7420 Server cell board supports up to 16 DIMMs with 16 GB/s of peak memory bandwidth. The 16 GB memory modules (4×4GB DIMMs) cannot be mixed with other memory DIMM sizes. When purchased from the factory, any given partition can ordered with 4 GB DIMMs or non stacked DIMMs (512 MB, 1 GB or 2 GB), but not both. When field integrated, cell boards can contain 4 GB DIMMs or non stacked DIMMs (512 MB, 1 GB or 2 GB), but not both.
The HP 9000 rp7420 and HP 9000 rp8420 servers share the same 2 GB, 4 GB, 8 GB, and 16 GB memory products.
HP 9000 rp7420 Server Memory DIMMs
Quad Size
2 GB
4 GB
8 GB
16GB
Memory Loading Rules
(product)
rp7420 Product Number
AB307A
AB308A
AB309A
AB322A
Memory must be installed in quads (4 DIMMs of equal size) Memory is available in four densities: 2 GB (4×512MB), 4 GB (4×1024MB), 8 GB (4×2048MB), and 16 GB (4 x 4096MB) Minimum memory is 2 GB per cell Maximum memory per system is 128 GB-using eight 16 GB quads. On each cell board, Memory Quads must be installed in the following order: 1st (0A, 0B, 1A, 1B), 2nd (2A, 2B, 3A, 3B), 3rd (4A, 4B, 5A, 5B), 4th (6A, 6B, 7A, 7B)
rp7410 Product Numbers that are supported
A6097A
A6098A
A6100A
-
HP 9000 rp7420 Server Maximum Capacity Using 1 DIMM Size
16 GB
32 GB
64 GB
128 GB
DIMM Size
512 MB
1024 MB
2048 MB
4096 MB
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QuickSpecs
Configuration
HP 9000 rp7420 Server
Performance Tuning Guidelines
Memory Latencies
Number of processor modules
4-dual core processor modules (single cell)
8-dual core processor modules (two cell)
I/O Architecture
A cell should be configured with a multiple of 8 DIMMs. It takes 8 DIMMs to populate both buses. Populating only one of the two memory buses on a cell board will deliver only half the peak memory bandwidth. Load memory equally across the available cell boards. If growth is planned for the system, then plan on configuring high density 4GB, 8-GB, or 16­GB modules to minimize future memory slot constraints.
There are two types of memory latencies within the HP 9000 rp7420 Server:
1. Memory latency that consists of a single cell or uses cell local memory.
2. Memory latency cell interleaved memory is used. In this case 50% of the addresses are to memory on the same cell as the requesting processor, and the other 50% of the addresses are to memory of the other cell.
The HP 9000 rp7420 Server average memory latency depends on the number of processors in the partition. Assuming that memory accesses are equally distributed across all cell boards and memory controllers within the partition, the average idle memory latency (load-to-use) is as show below:
Components within the I/O subsystem are the I/O controllers, internal peripheral bay, and multifunction Core I/O. The figure below shows the basic block diagram of the I/O subsystem. The HP 9000 rp7420 Server I/O architecture utilizes industry standard PCI buses in a unique design for maximum performance, scalability and reliability.
within
the cell refers to the case where an application either runs on a partition
between
cells refers to the case where the partition consists of two cells and
Average Memory Latency
~241 ns
~292 ns
The HP Integrity rp7420 Server contains two master I/O controller chips located on the PCI-X backplane. Each I/O controller contains 16 high-performance, 12-bit-wide links; these links connect to 18 slave I/O controller chips supporting the PCI card slots and core I/O. In the HP 9000 rp7420 Server, two links, one from each master controller, are routed through the system backplane and are dedicated to core I/O. The remaining thirty links are divided among the sixteen I/O card slots. This one card per link architecture leads to greater I/O performance and higher availability. Each controller chip is also directly linked to a host cell board. This means that both cell boards must be purchased in order to access all 15 available I/O card slots. (With only one cell board, access to seven expansion slots is enabled.)
The HP 9000 rp7420 Server can be purchased with either one or two core I/O board sets. Each Core I/O product contains two boards, a MP/SCSI and a LAN/SCSI card. The core I/O boards provide console, Ultra160 SCSI, Gigabit LAN, serial, and management processor functionality. If you opt for the second core I/O board set, it can be used to enable dual hard partitioning (nPars) in the HP 9000 rp7420 Server and to provide access to a second set of disk drives.
The LAN/SCSI card provided with each Core I/O product occupies one of the sixteen PCI slots. Since there must always be at least one Core I/O board set, the HP 9000 rp7420 Server has fifteen available PCI slots for expansion cards. If the second Core I/O product (board set) is purchased, there are fourteen remaining slots available for expansion cards.
The internal peripheral bay supports up to four low-profile disks and one removable-media device. The internal disks are electrically divided into two pairs. SCSI controller chips located on each
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