5
www.schematic-x.blogspot.com
Nobel UMA (11.6")
DDR3L Memory Down *8pcs
FBGA96 10*14mm REV:E
Maxima 8GBs
PAGE 12,13,14,15 Intel Shark Bay ULT
D D
System BIOS
SPI ROM
PAGE 7
Digital MIC
SPK0415HM4H &
STMP34DTE01
PAGE 27
Daughter Board
Speaker
C C
Combo Jack
PAGE 21
PAGE 22
DDR3L
SPI Interface
HeadPhone AMP
TPA6133A2RTJR
Touch Screen
Port5
PAGE 15
Audio Codec
92HD95 40_QFN
Package : QFN
Size : 6 x 6 (mm)
PAGE 22
USB To I2C
For Touch PA(reserve)
Port3
PAGE 21
PAGE 29
4
USB2.0
EnE KB9010QF A1
Embedded Controller
Combo Jack
11.6” slate 299.3mm x 194.27mm x 11.6mm
Azalia
Package : LQPF128
Size : 14 x 14 (mm)
PAGE 21
Intel Shark Bay ULT Platform Block Diagram Ultra
Y-serious Processor
Power : 4.5 (Watt)
Package : BGA1168
Size : 40 X 24 (mm)
PAGE 2~10
LPC
USB3.0 Interface
USB2.0
SMBUS
Docking Connector
3
2
1
PCB 10L STACK UP
01
Slate
eDP
SATA1 6GB/s
USB2.0 Interface
USB HUB
GL850G-OHG31
Port6
PAGE 28
Front Camera
SPCA2095A SPCA2095A
Port2
PAGE 18
Rear Camera
Port7
PAGE 18
11.6" eDP
1980x1080 Full HD
PAGE 16
NGFF SLOT-B SSD
22*42 and 22*80 (mm)
PAGE 17
Base Card reader
USB HUB Port1
LAYER 1 : TOP
LAYER 2 : SGND
LAYER 3 : IN1(High)
LAYER 4 : IN2(Low)
LAYER 5 : GND
LAYER 6 : SVCC
LAYER 7 : IN3(Low)
LAYER 8 : IN4(High)
LAYER 9 : GND
LAYER 10 : BOT
Mini Card
WLAN / BT Combo
Acceleometer +
Magentometer
HP303DLHCTR
I2C
PCIE3
USB HUB Port2
PAGE 20
Gyrometer
HP3GD20HTR
PAGE 24 PAGE 24
ALS-Sensor
Capella CM32181
PAGE 24
PCIE Gen 1 x 1 Lane
Touch Screen
I2C
I2C1
PAGE 15
DDI
BASE TOUCH PAD
I2C1
PAGE 26
I2C
Card Reader
RTS5237-GR
Support CPPM
Package : LQPF48
Size : 7 x 7 (mm)
PCIE2
PAGE 19
SENSOR HUB
STM32F103RBH6
I2C0
PAGE 24
PAGE 26
Base
B B
I2C
I2C1
Touch Pad
DDI
Combo Jack
Combo Jack
USB3.0 Interface
Embedded Controller
ENE IO3730B
Keyboard
A A
Package : LQFP-64
SMBUS
USB2.0 Interface USB 2.0 Port 0, 1
Size : 7 x 7 x 1.4
5
4
3
DDI1
USB 3.0 Port 1, 2
USB HUB Port1
2
HDMI Conn
USB3.0 Port x 2
CardReader IC
Micro SD card slot
NB5/RD4
NB5/RD4
NB5/RD4
PROJECT : Nobel
PROJECT : Nobel
PROJECT : Nobel
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Block Diagram
Block Diagram
Block Diagram
Date: Sheet of
Date: Sheet of
Date: Sheet of
Intel Shark Bay ULT
Intel Shark Bay ULT
Intel Shark Bay ULT
1 36 Thursday, September 12, 2013
1 36 Thursday, September 12, 2013
1
1 36 Thursday, September 12, 2013
1A
1A
1A
5
<6,7,8,9,10,11,16,17,18,19,20,21,23,24,25,26 , 2 7 , 2 8 , 3 1 , 3 4 , 3 5 >
4
3
2
1
U26A
IN_D2# <26>
IN_D1# <26>
IN_D0# <26>
IN_CLK# <26>
IN_D2 <26>
IN_D1 <26>
IN_D0 <26>
D D
eDP_COMPIO and ICOMPO signals should be shorted
near balls and routed with typical impedance <25 mohms
C C
IN_CLK <26>
EDP_DISP_UTIL <6>
INT_eDP_AUXP <16>
INT_eDP_AUXN <16>
INT_eDP_TXP0 <16>
INT_eDP_TXP1 <16>
INT_eDP_TXN0 <16>
INT_eDP_TXN1 <16>
DPB_LANE0_N
DPB_LANE1_N
DPB_LANE2_N
DPB_LANE3_N
DPB_LANE0_P
DPB_LANE1_P
DPB_LANE2_P
DPB_LANE3_P
eDP_RCOMP
EDP_DISP_UTIL
INT_eDP_AUXP
INT_eDP_AUXN
INT_eDP_TXP0
INT_eDP_TXP1
INT_eDP_TXN0
INT_eDP_TXN1
+VCCIOA_OUT
eDP_COMPIO and ICOMPO signals should be shorted
near balls and routed with typical impedance <25 mohms
C54
DDI1_TXN0
B58
DDI1_TXN1
B55
DDI1_TXN2
A57
DDI1_TXN3
C55
DDI1_TXP0
C58
DDI1_TXP1
A55
DDI1_TXP2
B57
DDI1_TXP3
C51
DDI2_TXN0
C53
DDI2_TXN1
C49
DDI2_TXN2
A53
DDI2_TXN3
C50
DDI2_TXP0
B54
DDI2_TXP1
B50
DDI2_TXP2
B53
DDI2_TXP3
D20
EDP_RCOMP
A43
EDP_DISP_UTIL
B45
EDP_AUXP
A45
EDP_AUXN
B46
eDP_TXP0
B47
eDP_TXP1
C46
eDP_TXP2
B49
eDP_TXP3
C45
eDP_TXN0
A47
eDP_TXN1
C47
eDP_TXN2
A49
eDP_TXN3
*HSW_ULT_DDR3L
R264 24.9/F_2
eDP_RCOMP
EC_PECI <23>
H_PROCHOT# <23,34>
eDP
R485 56.2/F_2
TP70
PCI EXPRESS* - GRAPHICS
TP65
TP41
R270 10K/F_2
PROC_DETECT#
CATERR#
EC_PECI
PROCHOT#
PROCPWRGD
U26B
D61
PROC_DETECT#
K61
CATERR#
N62
PECI
K63
PROCHOT#
C61
PROCPWRGD
*HSW_ULT_DDR3L
MISC THERMAL PWR MANAGEMENT
SM_DRAMRST#
SM_RCOMP0
SM_RCOMP1
SM_RCOMP2
DDR3 JTAG & BPM
SM_PG_CNTL1
PRDY#
PREQ#
PROC_TCK
PROC_TMS
PROC_TRST#
PROC_TDI
PROC_TDO
BPM#0
BPM#1
BPM#2
BPM#3
BPM#4
BPM#5
BPM#6
BPM#7
AV15
AU60
AV60
AU61
AV61
J62
K62
E60
E61
E59
F63
F62
J60
H60
H61
H62
K59
H63
K60
J61
SM_DRAMRST#
SM_RCOMP_0
SM_RCOMP_1
SM_RCOMP_2
DDR_PG_CNTL
XDP_TCK0
XDP_TMS_CPU
XDP_TRST#_CPU
XDP_TDI_CPU
XDP_TDO_CPU
BPM#2
BPM#3
BPM#4
BPM#5
BPM#6
BPM#7
R112 *0_4/S
R175 200/F_4
R155 121/F_4
R172 100/F_2
TP73
XDP_PRDY#_CPU <11>
XDP_PREQ#_CPU <11>
TP42
XDP_TCK0 <11>
XDP_TMS_CPU <11>
XDP_TRST#_CPU <7,11>
XDP_TDI_CPU <11>
XDP_TDO_CPU <11>
XDP_BPM0 <11>
XDP_BPM1 <11>
TP51
TP44
TP43
TP56
TP40
TP50
+1.35VSUS
R113
470_4
02
DDR3_DRAMRST# <12,13,14,15>
Processor pull-up (CPU)
H_PROCHOT#
XDP_TDO_CPU
B B
XDP_TMS_CPU
XDP_TDI_CPU
R490 62_4
+V1.05S_VCCST
R494 51_2
R504 *51_2
R495 *51_2
+V1.05S_VCCST
Local Thermal Sensor
C394 *0.01U/25V_4
U29
MBCLK2 <8,16,23>
MBDATA2 <8,16,23>
A A
MBCLK2
MBDATA2 IO_THERMDA_L
+3V
Place under CPU heat pipe
5
R474 *0_4
R473 *0_4
R502 10K_2
8
7
6
4
*G781-1P8
SCLK
SDA
ALERT#
OVERT#
1
VCC
2
DXP
3
IO_THERMDC_L
DXN
5
GND
G781-1P8(9Ah)
lace under CPU heat pipe
P
CPUOVERT <23>
4
IO_THERMDA_IO
C406
*2200P/50V_4
IO_THERMDC_IO
+3V
2
Q21
1 3
*METR3904-G
3
XDP_TRST#_CPU
XDP_TCK0
R521 *51_2
R500 51_2
+1.35VSUS <4,12,13,14,15,25,33>
+V1.05S_VCCST <4,9,11,34>
+3V
PROJECT : Nobel
PROJECT : Nobel
PROJECT : Nobel
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
ULT 1/9(eDP/DDI)
ULT 1/9(eDP/DDI)
NB5/RD4
NB5/RD4
2
NB5/RD4
ULT 1/9(eDP/DDI)
Date: Sheet of
Date: Sheet of
Date: Sheet
Intel Shark Bay ULT
Intel Shark Bay ULT
Intel Shark Bay ULT
of
2 36 Thursday, September 12, 2013
2 36 Thursday, September 12, 2013
1
2 36 Thursday, September 12, 2013
1A
1A
1A
5
U26C
AH63
M_A_DQ0 <12>
M_A_DQ1 <12>
M_A_DQ2 <12>
M_A_DQ3 <12>
M_A_DQ4 <12>
M_A_DQ5 <12>
M_A_DQ6 <12>
M_A_DQ7 <12>
D D
C C
B B
M_A_DQ8 <12>
M_A_DQ9 <12>
M_A_DQ10 <12>
M_A_DQ11 <12>
M_A_DQ12 <12>
M_A_DQ13 <12>
M_A_DQ14 <12>
M_A_DQ15 <12>
M_A_DQ16 <12>
M_A_DQ17 <12>
M_A_DQ18 <12>
M_A_DQ19 <12>
M_A_DQ20 <12>
M_A_DQ21 <12>
M_A_DQ22 <12>
M_A_DQ23 <12>
M_A_DQ24 <12>
M_A_DQ25 <12>
M_A_DQ26 <12>
M_A_DQ27 <12>
M_A_DQ28 <12>
M_A_DQ29 <12>
M_A_DQ30 <12>
M_A_DQ31 <12>
M_A_DQ32 <13>
M_A_DQ33 <13>
M_A_DQ34 <13>
M_A_DQ35 <13>
M_A_DQ36 <13>
M_A_DQ37 <13>
M_A_DQ38 <13>
M_A_DQ39 <13>
M_A_DQ40 <13>
M_A_DQ41 <13>
M_A_DQ42 <13>
M_A_DQ43 <13>
M_A_DQ44 <13>
M_A_DQ45 <13>
M_A_DQ46 <13>
M_A_DQ47 <13>
M_A_DQ48 <13>
M_A_DQ49 <13>
M_A_DQ50 <13>
M_A_DQ51 <13>
M_A_DQ52 <13>
M_A_DQ53 <13>
M_A_DQ54 <13>
M_A_DQ55 <13>
M_A_DQ56 <13>
M_A_DQ57 <13>
M_A_DQ58 <13>
M_A_DQ59 <13>
M_A_DQ60 <13>
M_A_DQ61 <13>
M_A_DQ62 <13>
M_A_DQ63 <13>
M_A_BS0 <12,13>
M_A_BS1 <12,13>
M_A_BS2 <12,13>
M_A_CAS_N <12,13>
M_A_RAS_N <12,13>
M_A_WE_N <12,13>
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
M_A_BS0
M_A_BS1
M_A_BS2
M_A_CAS_N
M_A_RAS_N
M_A_WE_N
AH62
AK63
AK62
AH61
AH60
AK61
AK60
AM63
AM62
AP63
AP62
AM61
AM60
AP61
AP60
AP58
AR58
AM57
AK57
AL58
AK58
AR57
AN57
AP55
AR55
AM54
AK54
AL55
AK55
AR54
AN54
AY58
AW58
AY56
AW56
AV58
AU58
AV56
AU56
AY54
AW54
AY52
AW52
AV54
AU54
AV52
AU52
AK40
AK42
AM43
AM45
AK45
AK43
AM40
AM42
AM46
AK46
AM49
AK49
AM48
AK48
AM51
AK51
AU35
AV35
AY41
AU34
AY34
AW34
SA_DQ0
SA_DQ1
SA_DQ2
SA_DQ3
SA_DQ4
SA_DQ5
SA_DQ6
SA_DQ7
SA_DQ8
SA_DQ9
SA_DQ10
SA_DQ11
SA_DQ12
SA_DQ13
SA_DQ14
SA_DQ15
SA_DQ16
SA_DQ17
SA_DQ18
SA_DQ19
SA_DQ20
SA_DQ21
SA_DQ22
SA_DQ23
SA_DQ24
SA_DQ25
SA_DQ26
SA_DQ27
SA_DQ28
SA_DQ29
SA_DQ30
SA_DQ31
SA_DQ32
SA_DQ33
SA_DQ34
SA_DQ35
SA_DQ36
SA_DQ37
SA_DQ38
SA_DQ39
SA_DQ40
SA_DQ41
SA_DQ42
SA_DQ43
SA_DQ44
SA_DQ45
SA_DQ46
SA_DQ47
SA_DQ48
SA_DQ49
SA_DQ50
SA_DQ51
SA_DQ52
SA_DQ53
SA_DQ54
SA_DQ55
SA_DQ56
SA_DQ57
SA_DQ58
SA_DQ59
SA_DQ60
SA_DQ61
SA_DQ62
SA_DQ63
SA_BA0
SA_BA1
SA_BA2
SA_CAS#
SA_RAS#
SA_WE#
*HSW_ULT_DDR3L
DDR SYSTEM MEMORY A
SA_CLK0
SA_CLK#0
SA_CKE0
SA_CLK1
SA_CLK#1
SA_CKE1
SA_CKE2
SA_CKE3
SA_CS#0
SA_CS#1
SA_ODT0
SA_DQSN0
SA_DQSN1
SA_DQSN2
SA_DQSN3
SA_DQSN4
SA_DQSN5
SA_DQSN6
SA_DQSN7
SA_DQSP0
SA_DQSP1
SA_DQSP2
SA_DQSP3
SA_DQSP4
SA_DQSP5
SA_DQSP6
SA_DQSP7
SA_MA0
SA_MA1
SA_MA2
SA_MA3
SA_MA4
SA_MA5
SA_MA6
SA_MA7
SA_MA8
SA_MA9
SA_MA10
SA_MA11
SA_MA12
SA_MA13
SA_MA14
SA_MA15
SM_VREF_CA
SM_VREF_DQ0
SM_VREF_DQ1
Haswell ULT Processor (DDR3L)
4
AV37
M_A_DIM0_CLK_DDR0_DP
AU37
M_A_DIM0_CLK_DDR0_DN
AU43
M_A_DIM0_CKE0
AY36
AW36
AW43
M_A_DIM0_CKE1
AY42
AY43
AP33
M_A_DIM0_CS0_N
AR32
M_A_DIM0_CS1_N
AP32
AJ61
M_A_DQS_DN0
AN62
M_A_DQS_DN1
AM58
M_A_DQS_DN2
AM55
M_A_DQS_DN3
AV57
M_A_DQS_DN4
AV53
M_A_DQS_DN5
AL43
M_A_DQS_DN6
AL48
M_A_DQS_DN7
AJ62
M_A_DQS_DP0
AN61
M_A_DQS_DP1
AN58
M_A_DQS_DP2
AN55
M_A_DQS_DP3
AW57
M_A_DQS_DP4
AW53
M_A_DQS_DP5
AL42
M_A_DQS_DP6
AL49
M_A_DQS_DP7
AU36
M_A_A0
AY37
M_A_A1
AR38
M_A_A2
AP36
M_A_A3
AU39
M_A_A4
AR36
M_A_A5
AV40
M_A_A6
AW39
M_A_A7
AY39
M_A_A8
AU40
M_A_A9
AP35
M_A_A10
AW41
M_A_A11
AU41
M_A_A12
AR35
M_A_A13
AV42
M_A_A14
AU42
M_A_A15
AP49
SM_VREF
AR51
SMDDR_VREF_DQ0_M3
AP51
SMDDR_VREF_DQ1_M3
20mils width
R623 *0_2
M_A_DIM0_CLK_DDR0_DP <12,13>
M_A_DIM0_CLK_DDR0_DN <12,13>
M_A_DIM0_CKE0 <12,13>
M_A_DIM0_CKE1 <12,13>
M_A_DIM0_CS0_N <12,13>
M_A_DIM0_CS1_N <12,13>
M_A_ODT_2 M_A_ODT_1
M_A_DQS_DN0 <12>
M_A_DQS_DN1 <12>
M_A_DQS_DN2 <12>
M_A_DQS_DN3 <12>
M_A_DQS_DN4 <13>
M_A_DQS_DN5 <13>
M_A_DQS_DN6 <13>
M_A_DQS_DN7 <13>
M_A_DQS_DP0 <12>
M_A_DQS_DP1 <12>
M_A_DQS_DP2 <12>
M_A_DQS_DP3 <12>
M_A_DQS_DP4 <13>
M_A_DQS_DP5 <13>
M_A_DQS_DP6 <13>
M_A_DQS_DP7 <13>
M_A_A0 <12,13>
M_A_A1 <12,13>
M_A_A2 <12,13>
M_A_A3 <12,13>
M_A_A4 <12,13>
M_A_A5 <12,13>
M_A_A6 <12,13>
M_A_A7 <12,13>
M_A_A8 <12,13>
M_A_A9 <12,13>
M_A_A10 <12,13>
M_A_A11 <12,13>
M_A_A12 <12,13>
M_A_A13 <12,13>
M_A_A14 <12,13>
M_A_A15 <12,13>
SM_VREF <12>
SMDDR_VREF_DQ0_M3 <12>
SMDDR_VREF_DQ1_M3 <14>
M_A_ODT_2 <12>
3
U26D
AY31
M_B_DQ0 <14>
M_B_DQ1 <14>
M_B_DQ2 <14>
M_B_DQ3 <14>
M_B_DQ4 <14>
M_B_DQ5 <14>
M_B_DQ6 <14>
M_B_DQ7 <14>
M_B_DQ8 <14>
M_B_DQ9 <14>
M_B_DQ10 <14>
M_B_DQ11 <14>
M_B_DQ12 <14>
M_B_DQ13 <14>
M_B_DQ14 <14>
M_B_DQ15 <14>
M_B_DQ16 <14>
M_B_DQ17 <14>
M_B_DQ18 <14>
M_B_DQ19 <14>
M_B_DQ20 <14>
M_B_DQ21 <14>
M_B_DQ22 <14>
M_B_DQ23 <14>
M_B_DQ24 <14>
M_B_DQ25 <14>
M_B_DQ26 <14>
M_B_DQ27 <14>
M_B_DQ28 <14>
M_B_DQ29 <14>
M_B_DQ30 <14>
M_B_DQ31 <14>
M_B_DQ32 <15>
M_B_DQ33 <15>
M_B_DQ34 <15>
M_B_DQ35 <15>
M_B_DQ36 <15>
M_B_DQ37 <15>
M_B_DQ38 <15>
M_B_DQ39 <15>
M_B_DQ40 <15>
M_B_DQ41 <15>
M_B_DQ42 <15>
M_B_DQ43 <15>
M_B_DQ44 <15>
M_B_DQ45 <15>
M_B_DQ46 <15>
M_B_DQ47 <15>
M_B_DQ48 <15>
M_B_DQ49 <15>
M_B_DQ50 <15>
M_B_DQ51 <15>
M_B_DQ52 <15>
M_B_DQ53 <15>
M_B_DQ54 <15>
M_B_DQ55 <15>
M_B_DQ56 <15>
M_B_DQ57 <15>
M_B_DQ58 <15>
M_B_DQ59 <15>
M_B_DQ60 <15>
M_B_DQ61 <15>
M_B_DQ62 <15>
M_B_DQ63 <15>
M_B_BS0 <14,15>
M_B_BS1 <14,15>
M_B_BS2 <14,15>
M_B_CAS_N <14,15>
M_B_RAS_N <14,15>
M_B_WE_N <14,15>
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
M_B_BS0
M_B_BS1
M_B_BS2
M_B_CAS_N
M_B_RAS_N
M_B_WE_N
AW31
AY29
AW29
AV31
AU31
AV29
AU29
AY27
AW27
AY25
AW25
AV27
AU27
AV25
AU25
AM29
AK29
AL28
AK28
AR29
AN29
AR28
AP28
AN26
AR26
AR25
AP25
AK26
AM26
AK25
AL25
AY23
AW23
AY21
AW21
AV23
AU23
AV21
AU21
AY19
AW19
AY17
AW17
AV19
AU19
AV17
AU17
AR21
AR22
AL21
AM22
AN22
AP21
AK21
AK22
AN20
AR20
AK18
AL18
AK20
AM20
AR18
AP18
AL35
AM36
AU49
AM33
AM35
AK35
SB_DQ0
SB_DQ1
SB_DQ2
SB_DQ3
SB_DQ4
SB_DQ5
SB_DQ6
SB_DQ7
SB_DQ8
SB_DQ9
SB_DQ10
SB_DQ11
SB_DQ12
SB_DQ13
SB_DQ14
SB_DQ15
SB_DQ16
SB_DQ17
SB_DQ18
SB_DQ19
SB_DQ20
SB_DQ21
SB_DQ22
SB_DQ23
SB_DQ24
SB_DQ25
SB_DQ26
SB_DQ27
SB_DQ28
SB_DQ29
SB_DQ30
SB_DQ31
SB_DQ32
SB_DQ33
SB_DQ34
SB_DQ35
SB_DQ36
SB_DQ37
SB_DQ38
SB_DQ39
SB_DQ40
SB_DQ41
SB_DQ42
SB_DQ43
SB_DQ44
SB_DQ45
SB_DQ46
SB_DQ47
SB_DQ48
SB_DQ49
SB_DQ50
SB_DQ51
SB_DQ52
SB_DQ53
SB_DQ54
SB_DQ55
SB_DQ56
SB_DQ57
SB_DQ58
SB_DQ59
SB_DQ60
SB_DQ61
SB_DQ62
SB_DQ63
SB_BA0
SB_BA1
SB_BA2
SB_CAS#
SB_RAS#
SB_WE#
2
AN38
SB_CLK0
SB_CLK#0
SB_CKE0
SB_CLK1
SB_CLK#1
SB_CKE1
SB_CKE2
SB_CKE3
SB_CS#0
SB_CS#1
SB_ODT0
SB_DQSN0
SB_DQSN1
SB_DQSN2
SB_DQSN3
SB_DQSN4
SB_DQSN5
SB_DQSN6
SB_DQSN7
SB_DQSP0
SB_DQSP1
SB_DQSP2
SB_DQSP3
SB_DQSP4
SB_DQSP5
SB_DQSP6
SB_DQSP7
SB_MA0
SB_MA1
SB_MA2
SB_MA3
DDR SYSTEM MEMORY B
SB_MA4
SB_MA5
SB_MA6
SB_MA7
SB_MA8
SB_MA9
SB_MA10
SB_MA11
SB_MA12
SB_MA13
SB_MA14
SB_MA15
M_B_DIM0_CLK_DDR0_DP
AM38
M_B_DIM0_CLK_DDR0_DN
AY49
M_B_DIM0_CKE0
AL38
AK38
AU50
M_B_DIM0_CKE1
AW49
AV50
AM32
M_B_DIM0_CS0_N
AK32
M_B_DIM0_CS1_N
AL32
M_B_ODT_1
AW30
M_B_DQS_DN0
AV26
M_B_DQS_DN1
AN28
M_B_DQS_DN2
AN25
M_B_DQS_DN3
AW22
M_B_DQS_DN4
AV18
M_B_DQS_DN5
AN21
M_B_DQS_DN6
AN18
M_B_DQS_DN7
AV30
M_B_DQS_DP0
AW26
M_B_DQS_DP1
AM28
M_B_DQS_DP2
AM25
M_B_DQS_DP3
AV22
M_B_DQS_DP4
AW18
M_B_DQS_DP5
AM21
M_B_DQS_DP6
AM18
M_B_DQS_DP7
AP40
M_B_A0
AR40
M_B_A1
AP42
M_B_A2
AR42
M_B_A3
AR45
M_B_A4
AP45
M_B_A5
AW46
M_B_A6
AY46
M_B_A7
AY47
M_B_A8
AU46
M_B_A9
AK36
M_B_A10
AV47
M_B_A11
AU47
M_B_A12
AK33
M_B_A13
AR46
M_B_A14
AP46
M_B_A15
R624 *0_2
1
M_B_DIM0_CLK_DDR0_DP <14,15>
M_B_DIM0_CLK_DDR0_DN <14,15>
M_B_DIM0_CKE0 <14,15>
M_B_DIM0_CKE1 <14,15>
M_B_DIM0_CS0_N <14,15>
M_B_DIM0_CS1_N <14,15>
M_B_DQS_DN0 <14>
M_B_DQS_DN1 <14>
M_B_DQS_DN2 <14>
M_B_DQS_DN3 <14>
M_B_DQS_DN4 <15>
M_B_DQS_DN5 <15>
M_B_DQS_DN6 <15>
M_B_DQS_DN7 <15>
M_B_DQS_DP0 <14>
M_B_DQS_DP1 <14>
M_B_DQS_DP2 <14>
M_B_DQS_DP3 <14>
M_B_DQS_DP4 <15>
M_B_DQS_DP5 <15>
M_B_DQS_DP6 <15>
M_B_DQS_DP7 <15>
M_B_A0 <14,15>
M_B_A1 <14,15>
M_B_A2 <14,15>
M_B_A3 <14,15>
M_B_A4 <14,15>
M_B_A5 <14,15>
M_B_A6 <14,15>
M_B_A7 <14,15>
M_B_A8 <14,15>
M_B_A9 <14,15>
M_B_A10 <14,15>
M_B_A11 <14,15>
M_B_A12 <14,15>
M_B_A13 <14,15>
M_B_A14 <14,15>
M_B_A15 <14,15>
M_B_ODT_2 <14>
A A
5
4
3
*HSW_ULT_DDR3L
PROJECT : Nobel
PROJECT : Nobel
PROJECT : Nobel
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
ULT 2/9 (DDR3 I/F)
ULT 2/9 (DDR3 I/F)
NB5/RD4
NB5/RD4
2
NB5/RD4
ULT 2/9 (DDR3 I/F)
Date: Sheet of
Date: Sheet of
Date: Sheet
Intel Shark Bay ULT
Intel Shark Bay ULT
Intel Shark Bay ULT
of
3 36 Thursday, September 12, 2013
3 36 Thursday, September 12, 2013
1
3 36 Thursday, September 12, 2013
1A
1A
1A
5
32A
+VCC_CORE
C188
C240
C196
C238
C250
C249
C194
C186
22U/6.3VT_8
C247
22U/6.3VT_8
C213
22U/6.3VT_8
C228
22U/6.3VT_8
C241
22U/6.3VT_8
C211
22U/6.3VT_8
C195
22U/6.3VT_8
C184
22U/6.3VT_8
C242
22U/6.3VT_8
C198
22U/6.3VT_8
C251
22U/6.3VT_8
C154
22U/6.3VT_8
C185
22U/6.3VT_8
22U/6.3VT_8
D D
C187
22U/6.3VT_8
22U/6.3VT_8
C197
22U/6.3VT_8
22U/6.3VT_8
C239
22U/6.3VT_8
22U/6.3VT_8
C248
22U/6.3VT_8
22U/6.3VT_8
C169
22U/6.3VT_8
C210
22U/6.3VT_8
22U/6.3VT_8
22U/6.3VT_8
C C
RF
C227
C209
22U/6.3VS_8
C208
22U/6.3VS_8
22U/6.3VS_8
5
C212
22U/6.3VS_8
B B
A A
+VCCIOA_OUT <2>
+VCCIO_OUT <6>
+1.35VSUS <2,12,13,14,15,25,33>
+1.05V <7,10,11,23,32,35>
+VCC_CORE <25,34>
U26F
C36
C40
C44
C48
C52
C56
E23
E25
E27
E29
E31
E33
E35
E37
E39
E41
E43
E45
E47
E49
E51
E53
E55
E57
F24
F28
F32
F36
F40
F44
F48
F52
F56
G23
G25
G27
G29
G31
G33
G35
G37
G39
G41
G43
G45
G47
G49
G51
G53
G55
G57
H23
J23
K23
K57
L22
M23
M57
P57
U57
W57
AB57
AD57
AG57
C24
C28
C32
F59
L59
J58
N58
AC58
AB23
AD23
AA23
AE59
AT2
AU44
AV44
D15
F22
H22
J21
N23
R23
T23
U10
AL1
AM11
AP7
AU10
AU15
*HSW_ULT_DDR3L
+3V_DEEP_SUS <6,7,8,9,10,11>
+3VPCU <20,23,26,27,35>
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
POWER
HSW ULT POWER
PWR_DEBUG#
VCCST_PWRGD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
VCCIO_OUT
VCCIOA_OUT
VIDALERT#
VIDSCLK
VIDSOUT
VR_EN
VR_READY
VCCST
VCCST
VCCST
RSVD_TP
RSVD_TP
RSVD_TP
RSVD_TP
VCC_SENSE
VSS_SENSE
RSVD
RSVD
VSS
VSS
4
1.4A
+1.35VSUS
AH26
AJ31
AJ33
AJ37
C161
AN33
10U/6.3V_6
AP43
AR48
AY35
AY40
AY44
Direct tie to CPU VCC/VSS-Ball
AY50
C166
2.2U/6.3V_4
D63
P62
T59
AD60
AD59
AA59
AE60
AC59
AG58
U59
V59
A59
E20
L62
H_CPU_SVIDALRT#
N63
VR_SVID_CLK
L63
H_CPU_SVIDDAT
H59
PWR_DEBUG
F60
C59
R520 10K_2
AC22
AE22
AE23
B59
P60
P61
N59
N61
E63
E62
AW14
AY14
+V1.05S_VCCST
H_VCCST_PWRGD_R
TP94
TP37
TP39
TP96
R503 100/F_2
R501 100/F_2
TP77
TP79
100- ±1% pull-up to VCC near processor.
Close to CPU
C162
C160
10U/6.3V_6
10U/6.3V_6
C148
2.2U/6.3V_4
R271 *0_8
IMVP_PWRGD_R
R519 0_4
R531 *0_4/S
+VCC_CORE
VCC_SENSE <34>
VSS_SENSE <34>
Processor Strapping
CFG3
(Physcial Debug Enable)
DFX Privacy
CFG4
(DP Presence Strap)
4
3
CFG0-19 need Reserve TP
C163
C159
10U/6.3V_6
C150
C147
2.2U/6.3V_4
2.2U/6.3V_4
+VCCIO_OUT +1.05V
C230
4.7U/6.3V_6
+VCCIO_OUT
+VCCIOA_OUT
TP99
D16 *RB501V-40
2 1
H_VCCST_PWRGD
The CFG signals have a default value of '1' if not terminated on the board.
Disable: Enable: Set DFX Enable in DFX interface MSR
Disable; No physical DP attached to eDP
C164
10U/6.3V_6
10U/6.3V_6
+V1.05S_VCCST
Layout note: need routing
together and ALERT need
between CLK and DATA.
H_CPU_SVIDALRT#
PWR_DEBUG <11>
H_VR_ENABLE_MCP <34>
IMVP_PWRGD_R <23>
IMVP_PWRGD <6,34>
HWPG <11,23,30,32,33> H_VCCST_PWRGD <11>
VR_SVID_CLK
H_CPU_SVIDDAT
U33
1
NC
2
A
3
GND
*74AUP1G07GW
D17 RB501V-40
R466 43_4
R478 *0_4/S
VCC
Y
2 1
5
4
R477
75/F_4
+V1.05S_VCCST
R483
130/F_4
+3V_DEEP_SUS
C431
*0.1U/10V_4
C390 *0.1U/10V_4
Place PU resistor
close to VR
1 0
Enable; An ext DP device is connected to eDP
3
CFG0 <11>
CFG1 <11>
CFG2 <11>
CFG3 <11>
CFG4 <11>
CFG5 <11>
CFG6 <11>
CFG7 <11>
CFG8 <11>
CFG9 <11>
CFG10 <11>
CFG11 <11>
CFG12 <11>
CFG13 <11>
CFG14 <11>
CFG15 <11>
CFG16 <11>
CFG17 <11>
CFG18 <11>
CFG19 <11>
SVID ALERT
VR_SVID_ALERT# <34>
SVID CLK
VR_SVID_CLK <34>
D DATA
SVI
VR_SVID_DATA <34>
CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
CFG18
CFG19
+V1.05S_VCCST
R534
10K_2
C430
*10P/50V_4
CFG3
CFG4
TP22
TP26
TP19
TP91
TP30
TP20
TP18
TP25
TP55
TP47
TP52
TP60
TP54
TP49
TP62
TP61
TP58
TP45
TP36
TP32
2
TP63
TP64
2
TP78
TP76
R449
CFG_RCOMP
49.9/F_4
TD_IREF
R526
8.2K/F_4
Circuit
R431 *1K_2
R222 1K_2
CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
CFG18
CFG19
U26E
AC60
AC62
AC63
AA63
AA60
Y62
Y61
Y60
V62
V61
V60
U60
T63
T62
T61
T60
AA62
AA61
U63
U62
V63
A5
E1
D1
J20
H18
B12
AV63
AU63
C63
C62
B43
*HSW_ULT_DDR3L
CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
CFG18
CFG19
CFG_RCOMP
RSVD
RSVD
RSVD
RSVD
RSVD
TD_IREF
RSVD_TP
RSVD_TP
RSVD_TP
RSVD_TP
RSVD
PROC_OPI_RCOMP
RESERVED
IO Thrm Protect
+3VPCU
For 65 degree, 1.8v limit, (SW)
R152
16.5K/F_4
R156
3.3K/F_4
For 75 degree, 1.2v limit, (HW)
R169
0_4
THER_CPU
R215
100K_4 NTC
+V1.05S_VCCST +1.05V
R218 *0_8/S
+V1.05S_VCCST
NB5/RD4
NB5/RD4
NB5/RD4
1
A51
RSVD_TP
RSVD_TP
RSVD_TP
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
C108
0.1U/10V_4
1 2
C118
0.1U/10V_4
1 2
C144
*1U/6.3V_4
R491
150/F_4
PWR_DEBUG
R493
*10K_2
PROJECT : Nobel
PROJECT : Nobel
PROJECT : Nobel
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet
TP104
B51
TP103
L60
TP38
N60
W23
Y22
AY15
PROC_OPI_RCOMP
AV62
R359
D58
49.9/F_4
P22
VSS
N21
VSS
P20
R20
THRM_MOINTOR <23>
THRM_MOINTOR1 <23>
C165
*22U/6.3V_8
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
ULT 3/9 (POWER-1)
ULT 3/9 (POWER-1)
ULT 3/9 (POWER-1)
1
04
Intel Shark Bay ULT
Intel Shark Bay ULT
Intel Shark Bay ULT
1A
1A
1A
of
4 36 Thursday, September 12, 2013
4 36 Thursday, September 12, 2013
4 36 Thursday, September 12, 2013
5
U26G
A11
VSS
A14
VSS
A18
VSS
A24
VSS
A28
VSS
A32
VSS
A36
VSS
A40
VSS
A44
VSS
A48
D D
C C
B B
A52
A56
AA1
AA58
AB10
AB20
AB22
AB7
AC61
AD21
AD3
AD63
AE10
AE5
AE58
AF11
AF12
AF14
AF15
AF17
AF18
AG1
AG11
AG21
AG23
AG60
AG61
AG62
AG63
AH17
AH19
AH20
AH22
AH24
AH28
AH30
AH32
AH34
AH36
AH38
AH40
AH42
AH44
AH49
AH51
AH53
AH55
AH57
AJ13
AJ14
AJ23
AJ25
AJ27
AJ29
*HSW_ULT_DDR3L
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AJ35
AJ39
AJ41
AJ43
AJ45
AJ47
AJ50
AJ52
AJ54
AJ56
AJ58
AJ60
AJ63
AK23
AK3
AK52
AL10
AL13
AL17
AL20
AL22
AL23
AL26
AL29
AL31
AL33
AL36
AL39
AL40
AL45
AL46
AL51
AL52
AL54
AL57
AL60
AL61
AM1
AM17
AM23
AM31
AM52
AN17
AN23
AN31
AN32
AN35
AN36
AN39
AN40
AN42
AN43
AN45
AN46
AN48
AN49
AN51
AN52
AN60
AN63
AN7
AP10
AP17
AP20
4
U26H
AP22
VSS
AP23
VSS
AP26
VSS
AP29
VSS
AP3
VSS
AP31
VSS
AP38
VSS
AP39
VSS
AP48
VSS
AP52
VSS
AP54
VSS
AP57
VSS
AR11
VSS
AR15
VSS
AR17
VSS
AR23
VSS
AR31
VSS
AR33
VSS
AR39
VSS
AR43
VSS
AR49
VSS
AR5
VSS
AR52
VSS
AT13
VSS
AT35
VSS
AT37
VSS
AT40
VSS
AT42
VSS
AT43
VSS
AT46
VSS
AT49
VSS
AT61
VSS
AT62
VSS
AT63
VSS
AU1
VSS
AU16
AU18
AU20
AU22
AU24
AU26
AU28
AU30
AU33
AU51
AU53
AU55
AU57
AU59
AV14
AV16
AV20
AV24
AV28
AV33
AV34
AV36
AV39
AV41
AV43
AV46
AV49
AV51
AV55
*HSW_ULT_DDR3L
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
3
AV59
AV8
AW16
AW24
AW33
AW35
AW37
AW4
AW40
AW42
AW44
AW47
AW50
AW51
AW59
AW60
AY11
AY16
AY18
AY22
AY24
AY26
AY30
AY33
AY4
AY51
AY53
AY57
AY59
AY6
B20
B24
B26
B28
B32
B36
B4
B40
B44
B48
B52
B56
B60
C11
C14
C18
C20
C25
C27
C38
C39
C57
D12
D14
D18
D2
D21
D23
D25
D26
D27
D29
D30
D31
DC_TEST_AY2_AW2
DC_TEST_AY3_AW3
TEST_AY60
TP75 TP69
DC_TEST_AY61_AW61
DC_TEST_AY62_AW62
TEST_B2
DC_TEST_A3_B3
TP67
DC_TEST_A61_B61
DC_TEST_B62_B63
DC_TEST_C1_C2
2
U26I
D33
VSS
D34
VSS
D35
VSS
D37
VSS
D38
VSS
D39
VSS
D41
VSS
D42
VSS
D43
VSS
D45
VSS
D46
VSS
D47
VSS
D49
VSS
D5
VSS
D50
VSS
D51
VSS
D53
VSS
D54
VSS
D55
VSS
D57
VSS
D59
VSS
D62
VSS
D8
VSS
E11
VSS
E17
VSS
F20
VSS
F26
VSS
F30
VSS
F34
VSS
F38
VSS
F42
VSS
F46
VSS
F50
VSS
F54
VSS
F58
VSS
F61
VSS
G18
VSS
G22
VSS
G3
VSS
G5
VSS
G6
VSS
G8
VSS
H13
VSS
AY2
DAISY_CHAIN_NTCF_AY2
AY3
DAISY_CHAIN_NTCF_AY3
AY60
DAISY_CHAIN_NTCF_AY60
AY61
DAISY_CHAIN_NTCF_AY61
AY62
DAISY_CHAIN_NTCF_AY62
B2
DAISY_CHAIN_NTCF_B2
B3
DAISY_CHAIN_NTCF_B3
B61
DAISY_CHAIN_NTCF_B61
B62
DAISY_CHAIN_NTCF_B62
B63
DAISY_CHAIN_NTCF_B63
C1
DAISY_CHAIN_NTCF_C1
C2
DAISY_CHAIN_NTCF_C2
*HSW_ULT_DDR3L
VSS
DAISY_CHAIN_NTCF_A3
DAISY_CHAIN_NTCF_A4
DAISY_CHAIN_NTCF_A60
DAISY_CHAIN_NTCF_A61
DAISY_CHAIN_NTCF_A62
DAISY_CHAIN_NTCF_AV1
DAISY_CHAIN_NTCF_AW 1
DAISY_CHAIN_NTCF_AW 2
DAISY_CHAIN_NTCF_AW 3
DAISY_CHAIN_NTCF_AW 61
DAISY_CHAIN_NTCF_AW 62
DAISY_CHAIN_NTCF_AW 63
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
H17
H57
J10
J22
J59
J63
K1
K12
L13
L15
L17
L18
L20
L58
L61
L7
M22
N10
N3
P59
P63
R10
R22
R8
T1
T58
U20
U22
U61
U9
V10
V3
V7
W20
W22
Y10
Y59
Y63
V58
AH46
V23
AH16
A3
DC_TEST_A3_B3
A4
TEST_A4
A60
TEST_A60
A61
DC_TEST_A61_B61
A62
TEST_A62
AV1
TEST_AV1
AW1
TEST_AW1
AW2
DC_TEST_AY2_AW2
AW3
DC_TEST_AY3_AW3
AW61
DC_TEST_AY61_AW61
AW62
DC_TEST_AY62_AW62
AW63
TEST_AW63
1
05
TP66
TP68
TP8
TP10
TP74
A A
PROJECT : Nobel
PROJECT : Nobel
PROJECT : Nobel
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
ULT 4/9 (RSV,GND)
ULT 4/9 (RSV,GND)
NB5/RD4
NB5/RD4
5
4
3
2
NB5/RD4
ULT 4/9 (RSV,GND)
Date: Sheet of
Date: Sheet of
Date: Sheet of
Intel Shark Bay ULT
Intel Shark Bay ULT
Intel Shark Bay ULT
5 36 Thursday, September 12, 2013
5 36 Thursday, September 12, 2013
1
5 36 Thursday, September 12, 2013
1A
1A
1A
5
4
3
2
1
Lynx Point-LP Platform Controller Hub (LVDS,DDI)
U26M
PCH_eDP_BLON <16>
PCH_DISP_ON <16>
D D
SUSACK# SUSWARN#
SUSACK#
SYS_RESET#
C364 *0.1U/10V_2
TP13
EC_PWROK
EC_PWROK
PLTRST#
RSMRST#
SUSWARN#
DNBSWON#_R
AC_PRESENT_R
PM_BATLOW#
PCH_SLP_S0_N
PCH_SLP_WLAN_N
SYS_RESET# <11>
R183 *0_4
R187 0_4
RSMRST# <23>
R178 0_4
R163 0_4
R403 0_4
PCH_SLP_S0_N <11,23>
for DS3
SUSACK#_EC <23>
SYS_PWROK <11>
C C
EC_PWROK <23>
for DS3
SUSWARN#_EC <23>
DNBSWON# <11,23>
U26L
AK2
SUSACK#
AC3
SYS_RESET#
AG2
SYS_PWROK
AY7
PCH_PWROK
AB5
APWROK
AG7
PLTRST#
AW6
RSMRST#
AV4
SUSWARN#/SUSPWRDNACK/GPIO30(SUS)
AL7
PWRBTN#
AJ8
ACPRESENT / GPIO31(DSW)
AN4
BATLOW# / GPIO72(DSW )
AF3
SLP_S0#
AM5
SLP_WLAN#/ GPIO29(DSW )
*HSW_ULT_DDR3L
System Power Management
DSWVRMEN
DPWROK
WAKE#
CLKRUN#/ GPIO32
SUS_STAT# / GPIO61 (SUS)
SUSCLK / GPIO62 (SUS)
SLP_S5# / GPIO63 ( DSW)
SLP_S4#
SLP_S3#
SLP_A#
SLP_SUS#
SLP_LAN#
AW7
DSWVRMEN
AV5
DPWROK RSMRST#
AJ5
PCIE_WAKE#
V5
CLKRUN#
AG4
SUS_STAT#
AE6
PCH_SUSCLK_L
AP5
AJ6
AT4
AL5
AP4
SLP_SUS#
AJ7
SLP_LAN#
DSWVRMEN <7>
Ra
R361 0_4
R366 *0_4
b
R
PCIE_WAKE# <19,20,23>
CLKRUN# <23>
R214 *0_4/S
SLP_S5# <11>
SUSC# <11,23>
SUSB# <11,23>
TP14
SLP_A# <11>
R374 0_4
TP24
For DS3 -->Ra
Non-DS3 -->Rb
DPWROK_EC
TP15
for DS3
SLP_SUS#_EC
PCH_DPST_PWM <16>
EDP_DISP_UTIL <2>
DPWROK_EC <23>
PCH_SUSCLK <17,23>
TP21
SLP_SUS#_EC <23> AC_PRESENT_EC <23>
PCH_eDP_BLON
PCH_DISP_ON
PCH_DPST_PWM
R530 *0_4
A9
EDP_BKLEN
C6
EDP_VDDEN
B8
EDP_BKLCTL
*HSW_ULT_DDR3L
DDPB_CTRLCLK
DDPB_CTRLDATA
EDP SIDEBAND
DDPB_AUXN
DDPB_AUXP
DDPC_CTRLCLK
DDPC_CTRLDATA
DDPC_AUXN
DDPC_AUXP
DISPLAY
DDPB_HPD
DDPC_HPD
EDP_HPD
B9
C9
C5
B5
C8
D9
D11
B6
A6
A8
D6
SDVO_CLK
SDVO_DATA
HDMI_HPD_DC
INT_eDP_HPD_Q
SDVO_CLK <26>
SDVO_DATA <26>
HDMI_HPD_DC <26>
06
INT. HDMI
B B
PCH Pull-high/low(CLG)
PM_BATLOW#
PCIE_WAKE#
SUSACK#
SUSWARN#
Check SUSWARN# need PU?
PWRBTN# internally PU in PCH to 3.3V_DSW
DNBSWON#_R
AC_PRESENT_R
A A
SYS_PWROK
CLKRUN#
SYS_RESET#
RSMRST#
DPWROK_EC
R378 10K_2
R174 1K_2
R188 10K_2
R179 10K_2
R170 *10K_2
R401 *10K_2
R408 *1K_2
R465 8.2K/F_4
R213 10K_2
R212 *1K_2
R367 10K_2
R358 100K_2
+3VS5
+3V_DEEP_SUS
+3V
5
for DS3
+3VS5
PLTRST#(CLG)
R196 100K_2
INT_eDP_HPD_Q
PLTRST#
R277 0_4
Q12 *2N7002
1
R280
*100K_2
Check Q11 Rise/Fall time less than 100ns
PLTRST# <11,19,20,23,25,28>
Reserve EDP_HPD opposites circuit!
+VCCIO_OUT
R522
DG V0.7 -> 10K
*10K/F_2
SCH V0.7 -> 1K
3
INT_eDP_HPD
2
+5V
R523
100K_2
Q11
*2N7002
4
3
2
1
R278 1K/F_4
R281
*100K_2
7/22:follow reference design,mount R523,unmount R281
EDP_HPD_L <16>
System PWR_OK(CLG)
+3VS5
C379 *0.1U/10V_2
SYS_PWROK
3
4
U27
*TC7SH08FU
2
1
3 5
R443 0_4
EC_PWROK
R444
10K_2
2
IMVP_PWRGD <4,34>
PROJECT : Nobel
PROJECT : Nobel
PROJECT : Nobel
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
ULT 5/9(Power Manger)
ULT 5/9(Power Manger)
NB5/RD4
NB5/RD4
NB5/RD4
ULT 5/9(Power Manger)
Date: Sheet of
Date: Sheet of
Date: Sheet
Intel Shark Bay ULT
Intel Shark Bay ULT
Intel Shark Bay ULT
1
+3V <2,7,8,9,10,11,16,17,18,19,20,21,23,24,25,26,27,28,31,34,35>
+3VS5 <9,10,11,20,26,27,29,30,35>
+5V <20,21,22,29,35>
1A
1A
1A
of
6 36 Thursday, September 12, 2013
6 36 Thursday, September 12, 2013
6 36 Thursday, September 12, 2013
5
Lynx Point-LP Platform Controller Hub
(HDA,JTAG,SATA)
U26J
TP7
PCH_SPI1_CLK
PCH_SPI_CS0#
PCH_SPI1_SI
PCH_SPI1_SO
PCH_SPI_IO2
PCH_SPI_IO3
AW5
RTCX1
AY5
RTCX2
AU7
RTCRST#
AV6
SRTCRST#
AU6
INTRUDER#
AV7
INTVRMEN
AW8
HDA_BCLK / I2S0_SCLK
AV11
HDA_SYNC/ I2S0_SFRM
AU8
HDA_RST#/ I2S_MCLK
AY10
HDA_SDIN0/ I2S0_RXD
AU12
HDA_SDIN1/ I2S1_RXD
AU11
HDA_SDO/ I2S0_TXD
AW10
HDA_DOCK_EN# / I2S1_TXD
AV10
HDA_DOCK_RST/ I2S1_SFRM
AY8
I2S1_SCLK
AU62
PCH_TRST#
AE62
PCH_TCK
AD61
PCH_TDI
AE61
PCH_TDO
AD62
PCH_TMS
AL11
RSVD
AC4
RSVD
AE63
JTAGX
AV2
RSVD
AA3
SPI_CLK
Y7
SPI_CS0#
Y4
SPI_CS1#
AC2
SPI_CS2#
AA2
SPI_MOSI
AA4
SPI_MISO
Y6
SPI_IO2
AF1
SPI_IO3
*HSW_ULT_DDR3L
RTC
SPI JTAG
PWROK
PWROK
ALWAYS Should be always pull-up
RTC_X1
RTC_X2
RTC_RST# <11>
D D
C C
B B
+3V_RTC
PCH Strap Table
R139 1M_2
ACZ_SDIN0 <21>
XDP_TRST#_CPU <2,11>
JTAG_TCK_PCH <11>
JTAG_TDI_PCH <11>
JTAG_TDO_PCH <11>
JTAG_TMS_PCH <11>
JTAGX_PCH <11>
Pin Name Strap description Sampled Configuration
SPKR
RTC_RST#
SRTC_RST# SRTC_RST#
SM_INTRUDER#
PCH_INVRMEN
ACZ_BCLK
ACZ_SYNC
ACZ_RST#
ACZ_SDOUT
XDP_TRST#_CPU
JTAG_TCK_PCH
JTAG_TDI_PCH
JTAG_TDO_PCH
JTAG_TMS_PCH
JTAGX_PCH
No reboot mode setting PWROK
SDIO_D0 /GPIO66 Top-Block Swap
INTVRMEN Integrated 1.05V VRM enable ALWAYS Should be always pull-up
HDA_SDO /I2S0_TXD
GSPI0_MOSI /GPIO86 PWROK
GPIO15
DSWVRMEN
A A
5
Flash Descriptor Security
Only for Interposer
Boot BIOS Selection
TLS Confidentiality PWROK
Deep Sx Well
On-Die Voltage
Regulator Enable
4
AU14
LAD0
AW12
LAD1
AY12
LAD2
AW11
LAD3
AV12
LFRAME#
LPC
J5
GNT0#
1
0
H5
B15
A15
J8
H8
A17
B17
J6
H6
B14
C15
F5
E5
C17
D17
V1
U1
V6
AC1
C12
A12
U3
L11
K10
SATA_RXN0
SATA_RXP0
SATA_TXN0
SATA_TXP0
SATA0GP
SATA1GP
PCI_SERR#
SIO_EXT_SMI#
SATA_RCOMP
SATA_IREF
Boot Location
LPC
SPI(Default)
SATA_RN0/ PERN6_L3
SATA_RP0/ PERP6_L3
SATA_TN0/ PETN6_L3
SATA_TP0/ PETP6_L3
SATA_RN1/ PERN6_L2
SATA_RP1/ PERP6_L2
SATA_TN1/ PETN6_L2
SATA_TP1/ PETP6_L2
SATA_RN2/ PERN6_L1
SATA_RP2/ PERP6_L1
SATA_TN2/ PETN6_L1
SATA_TP2/ PETP6_L1
SATA_RN3/ PERN6_L0
AUDIO
SATA_RP3/ PERP6_L0
SATA_TN3/ PETN6_L0
SATA_TP3/ PETP6_L0
SATA0GP/ GPIO34
SATA1GP/ GPIO35
SATA2GP/ GPIO36
SATA3GP/ GPIO37
SATA_RCOMP
SATA
SATA_IREF
SATALED#
RSVD
RSVD
0 = Default (weak pull-down 20K)
1 = Setting to No-Reboot mode
0 = "top-block swap" mode
1 = Default (weak pull-up 20K)
0 = Default (weak pull-down 20K)
1 = Can be Overridden
0 = ME Crypto Transport Layer Security
cipher suite with no confidentiality(Default)
1 = Intel ME Crypto TLS cipher suite with
confidentiality
4
LAD0 <20,23,25>
LAD1 <20,23,25>
LAD2 <20,23,25>
LAD3 <20,23,25>
LFRAME# <20,23,25>
SATA_RXN0 <17>
SATA_RXP0 <17>
SATA_TXN0 <17>
SATA_TXP0 <17>
TP93
SATA0GP <23>
TP95
PCI_SERR# <23>
TP31
SIO_EXT_SMI# <23>
R514 3.01K/F_2
R536 *0_6/S
R462 10K_2
3
+1.05V
R416 *0_4
+1.05VS5
R415 *51_2
R414 51_2
R417 51_2
R402 51_2
R418 *51_2
Close to Chipset
JTAGX_PCH
JTAG_TMS_PCH
JTAG_TDI_PCH
JTAG_TDO_PCH
JTAG_TCK_PCH
MSATA0 (SATA3 6.0Gb/s)
+V1.05S_ASATA3PLL
DG recommended that SATA AC coupling capacitors should be
close to the connector (<100 mils) for optimal signal quality.
+3V
Circuit
SPKR
PCH_INVRMEN
ACZ_SDOUT
SPKR <9>
GPIO66_ULT <9>
GPIO15_ULT <9>
DSWVRMEN <6>
PCH_SPI_CS0#_R
PCH_SPI1_CLK_R
PCH_SPI1_SI_R
PCH_SPI1_SO_R
GPIO33_EC <23>
+3V_DEEP_SUS
+3V
+3V_RTC
+3V_RTC
R437 *1K_2
R517 *1K_2
R518 *1K_2
R142 330K_4
R362 1K_2
R221 1K_2
R115 330K_4
PCH_SPI_CS0#_R <23>
PCH_SPI1_CLK_R <23>
PCH_SPI1_SI_R <23>
PCH_SPI1_SO_R <23>
3
2
RTC Circuitry(RTC)
+3V_RTC_0
CN18
BAT_CONN
DFHD02MR045
1
23
4
RTC Power trace width 20mils.
PV
RTC_RST#
EC_RTC_RST# <23>
ACZ_SYNC_AUDIO <21>
ACZ_SDOUT_AUDIO <21>
Vender
EC_RTC_RST#
ACZ_RST#_AUDIO <21>
BIT_CLK_AUDIO <21>
+3V_DEEP_SUS
Size
Winbond
GigaDevice AKE3EGN0Q01
Socket
TP place to TOP
C398 1U/6.3V_2
+3V <2,6,8,9,10,11,16,17,18,19,20,21,23,24,25,26,27,28,31,34,35>
+1.05V <4,10,11,23,32,35>
+3VS5 <6,9,10,11,20,26,27,29,30,35>
+3VREG <16,23,27,30,31,35>
+3V_RTC <10>
+V1.05S_ASATA3PLL <10>
2
RTC Power trace width 20mils.
+3VREG
+3V_RTC_1
R420 1K_2
D14
BAT54CW
3
Q32
*2N7002
2
R731
1
*100K/F_4
HDA Bus(CLG)
PCH_SPI_CS0#_R
PCH_SPI1_CLK_R
PCH_SPI1_SI_R
PCH_SPI1_SO_R
BIOS_WP#
HOLD#
R455 15/F_2
R460 15/F_2
R497 15/F_2
R459 15/F_2
R492 15/F_2
NB5/RD4
NB5/RD4
NB5/RD4
ACZ_SYNC
ACZ_RST#
ACZ_SDOUT
ACZ_BCLK
ACZ_SYNC
PCH_SPI_CS0#_R
PCH_SPI1_CLK_R PCH_SPI1_CLK
C395
22P/50V_4
R356 33_2
R369 33_2
R363 33_2
R365 33_2
C349
*10P/50V_4
R357 *1K_2
P/N
AKE3EFP0N07
DFHS08FS023
TP57
TP48
TP59
TP46
TP100
TP23
PCH_SPI_CS0#
PCH_SPI1_SI PCH_SPI1_SI_R
PCH_SPI1_SO PCH_SPI1_SO_R
+3VSPI
R489 3.3K/F_2
PCH_SPI_IO2
1
30mils
+3V_RTC
C365
1U/6.3V_2
R119
20K/F_2
R117
20K/F_2
R125 *0_6
RTC_RST#
C94
1U/6.3V_2
C96
1U/6.3V_2
SRTC_RST# RTC_RST#
07
RTC Clock 32.768KHz
C356 10P/25V_2
Y2
32.768KHz
C352 10P/25V_2
GPIO Pull UP
SATA0GP
SIO_EXT_SMI#
PCI_SERR#
SATA1GP
SATA1GP
RTC_X1
1 2
R563
10M_4
RTC_X2
R436 10K_2
R423 10K_2
R237 10K_2
R464 10K_2
R454 *10K_2
+3V
PCH SPI ROM(CLG)
+3VREG
+3V_DEEP_SUS
U28
1
CE#
6
SCK
5
SI
2
SO
3
WP#
BIOS ROM
AKE3EFP0N07
BIOS_WP#
PROJECT : Nobel
PROJECT : Nobel
PROJECT : Nobel
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
ULT 6/9(SATA/HDA)
ULT 6/9(SATA/HDA)
ULT 6/9(SATA/HDA)
Date: Sheet of
Date: Sheet of
Date: Sheet of
R430 *0_6
R425 0_6
8
+3VSPI
VDD
HOLD#
VSS
Intel Shark Bay ULT
Intel Shark Bay ULT
Intel Shark Bay ULT
1
7
HOLD#
4
PCH_SPI_IO3
R448 3.3K/F_2
R442 15/F_2
C378
0.1U/10V_2
7 36 Thursday, September 12, 2013
7 36 Thursday, September 12, 2013
7 36 Thursday, September 12, 2013
1A
1A
1A
5
PCI/USBOC# Pull-up(CLG)
PCH_Power_Button#
TS_INTB#
PIRQC#
PIRQD#
GPIO77_ULT
TOUCHPANEL_INTR#_PCH
PCH_VOL_UP#
PCH_VOL_DOWN#
PCH_ROTATE#_R
D D
SMBALERT#
USB_OC1#
USB_OC2#
USB_OC3#
USB_OC4#
R251 10K_2
R244 10K_2
R247 10K_2
R480 10K_2
R239 10K_2
R487 10K_2
R252 10K_2
R246 10K_2
R245 10K_2
R377 10K_2
R387 10K_2
R371 10K_2
R393 10K_2
R123 10K_2
+3V_DEEP_SUS
Lynx Point-LP Platform Controller Hub
(HDA,JTAG,SATA)
+3V
for DS3
U26N
USB3.0 PORT1,2 SWAP
PV
Docking
Docking
C C
B B
USB30_RX2- <26>
USB30_RX2+ <26>
USB30_TX2- <26>
USB30_TX2+ <26>
USB3.0
USB30_RX1- <26>
USB30_RX1+ <26>
USB30_TX1- <26>
USB30_TX1+ <26>
TOUCH_PANEL_RST# <27>
PIRQD#_L <23>
PCH_ROTATE# <9,23>
R484 0_2
TOUCHPANEL_INTR#_PCH <27>
PCH_Power_Button# <23>
PCH_ROTATE# PCH_ROTATE#_R
PCH_VOL_UP# <23>
PCH_VOL_DOWN# <23>
TP28
GPIO77_ULT
TS_INTB#
PIRQC#
PIRQD#
TOUCHPANEL_INTR#_PCH
PCH_Power_Button#
R611 0_2
PCH_VOL_UP#
PCH_VOL_DOWN#
PCI_PME#
G20
H20
C33
B34
E18
F18
B33
A33
U6
P4
N4
N2
L1
L3
R5
L4
U7
AD4
USB3RN1
USB3RP1
USB3TN1
USB3TP1
USB3RN2
USB3RP2
USB3TN2
USB3TP2
PIRQA#/ GPIO77
PIRQB#/ GPIO78
PIRQC#/ GPIO79
PIRQD#/ GPIO80
GPIO52
GPIO54
GPIO51
GPIO53
GPIO55
PME#
PCI
C- Link
USBRBIAS#
USB
OC0# / GPIO40(SUS)
OC1# / GPIO41(SUS)
OC2# / GPIO42(SUS)
OC3# / GPIO43(SUS)
4
CL_CLK
CL_DATA
CL_RST#
USB2N0
USB2P0
USB2N1
USB2P1
USB2N2
USB2P2
USB2N3
USB2P3
USB2N4
USB2P4
USB2N5
USB2P5
USB2N6
USB2P6
USB2N7
USB2P7
USBRBIAS
RSVD
RSVD
Cardreader
AF2
AD2
AF4
USB2.0 PORT0,1 SWAP
AN8
AM8
AR7
AT7
AR8
AP8
AR10
AT10
AM15
AL15
AM13
AN13
AP11
AN11
AR13
AP13
AJ10
AJ11
AN10
AM10
AL3
AT1
AH2
AV3
USBP1- <26>
USBP1+ <26>
USBP0- <26>
USBP0+ <26>
USBP2- <18>
USBP2+ <18>
USBP3- <29>
USBP3+ <29>
USBP4- <24>
USBP4+ <24>
USBP5- <27>
USBP5+ <27>
USBP6- <28>
USBP6+ <28>
USBP7- <18>
USBP7+ <18>
TIE TRACES TOGETHER
CLOSE TO PINS WITH LENGTH
TO RESISTOR
USB_BIAS
R181
22.6/F_4
USB_OC1#
USB_OC2#
USB_OC3#
USB_OC4#
PCIE_RXN2_CARD <19>
PCIE_RXP2_CARD <19>
PCIE_TXN2_CARD <19>
WLAN
PCIE_TXP2_CARD <19>
PCIE_RXN3_WLAN <20>
PCIE_RXP3_WLAN <20>
PCIE_TXN3_WLAN <20>
PCIE_TXP3_WLAN <20>
USB2.0/USB3.0 COMBO 1st
PV
USB2.0/USB3.0 COMBO 1st
Front Camera
Touch pad
Sensor HUB
TS
B Hub
US
Rear Camera
+V1.05S_AUSB3PLL <10>
Card reader
Cardreader
TP87
TP80
TP90
TP5
WLAN
SBP2)
(U
(USBP3)
(USBP4)
(USBP5)
(USBP6)
(USBP7)
CLK_PCIE_CRN <19>
CLK_PCIE_CRP <19>
PCIE_CLKREQ_CR# <19>
PCIE_CLKREQ_WLAN# <20>
C425 0.1U/10V_2
C426 0.1U/10V_2
C428 0.1U/10V_2
C427 0.1U/10V_2
(USBP0)
(USBP1)
CLK_PCIE_WLANN <20>
CLK_PCIE_WLANP <20>
3
Docking
Docking
R537 *0_4/S
R515 3.01K/F_2
PCIE_TXN2_CARD_C
PCIE_TXP2_CARD_C
PCIE_TXN3_WLAN_C
PCIE_TXP3_WLAN_C
PCIE_IREF
PCIE_RCOMP
PCIE_CLKREQ0#
CLK_PCIE_CRN
CLK_PCIE_CRP
PCIE_CLKREQ_CR#
CLK_PCIE_WLANN
CLK_PCIE_WLANP
PCIE_CLKREQ_WLAN#
PCIE_CLKREQ3#
PCIE_CLKREQ4#
PCIE_CLKREQ5#
U26K
G17
PERN1 / USB3RN3
F17
PERP1 / USB3RP3
C30
PETN1 / USB3TN3
C31
PETP1 / USB3TP3
F15
PERN2/ USB3RN4
G15
PERP2/ USB3RP4
B31
PETN2/ USB3TN4
A31
PETP2/ USB3TP4
G11
PERN3
F11
PERP3
C29
PETN3
B30
PETP3
F13
PERN4
G13
PERP4
B29
PETN4
A29
PETP4
F10
PERN5_L0
E10
PERP5_L0
C23
PETN5_L0
C22
PETP5_L0
F8
PERN5_L1
E8
PERP5_L1
B23
PETN5_L1
A23
PETP5_L1
H10
PERN5_L2
G10
PERP5_L2
B21
PETN5_L2
C21
PETP5_L2
E6
PERN5_L3
F6
PERP5_L3
B22
PETN5_L3
A21
PETP5_L3
B27
PCIE_IREF
A27
PCIE_RCOMP
E15
RSVD
E13
RSVD
C43
CLKOUT_PCIE0N
C42
CLKOUT_PCIE0P
U2
PCIECLKRQ0# / GPIO18
B41
CLKOUT_PCIE_N1
A41
CLKOUT_PCIE_P1
Y5
PCIECLKRQ1# / GPIO19
C41
CLKOUT_PCIE_N2
B42
CLKOUT_PCIE_P2
AD1
PCIECLKRQ2# / GPIO20
B38
CLKOUT_PCIE_N3
C37
CLKOUT_PCI_P3
N1
PCIECLKRQ3# / GPIO21
A39
CLKOUT_PCIE_N4
B39
CLKOUT_PCIE_P4
U5
PCIECLKRQ4# / GPIO22
B37
CLKOUT_PCIE_N5
A37
CLKOUT_PCIE_P5
T2
PCIECLKRQ5# / GPIO23
*HSW_ULT_DDR3L
2
SMBALERT# / GPIO11(SUS)
SMBUS
SML0ALERT# / GPIO60(SUS)
SML1ALERT# / PCHHOT# / GPIO73(SUS)
SML1DATA / GPIO74(SUS)
PCI-E*
CLOCK SIGNALS
SMBCLK
SMBDATA
SML0CLK
SML0DATA
SML1CLK / GPIO75(SUS)
XTAL24_IN
XTAL24_OUT
CLKOUT_ITPXDP#
CLKOUT_ITPXDP_P
CLKOUT_LPC_0
CLKOUT_LPC_1
DIFFCLK_BIASREF
RSVD
RSVD
TESTLOW_C35
TESTLOW_C34
TESTLOW_AK8
TESTLOW_AL8
AN2
SMBALERT#
AP2
SMB_PCH_CLK
AH1
SMB_PCH_DAT
AL2
SML0ALERT#
AN1
SMB_ME0_CLK
AK1
SMB_ME0_DAT
AU4
SML1ALERT#
AU3
SMB_ME1_CLK
AH3
SMB_ME1_DAT
A25
XTAL24_IN
B25
XTAL24_OUT
B35
CK_XDP_N_R
A35
CK_XDP_P_R
AN15
CLK_PCI_EC_R
AP15
CLK_PCI_LPC_R
C26
XCLK_BIASREF
K21
M21
C35
R527 10K_2
C34
R528 10K/F_2
AK8
R173 10K/F_2
AL8
R182 10K/F_2
R513
1M_2
R643 *0_2
R644 *0_2
R128 22_4
R130 22_4
R129 22_4
R512
3.01K/F_2
1
TP3
TP101
C432 12P/50V_4
1
2
24MHZ +-30PPM
Y3
4
3
C433 12P/50V_4
TP102
CK_XDP_N <11>
EC1 18P/50V_4
CLK_24M_DEBUG CLK_24M_TPM
EMI(near PCH)
EC3
18P/50V_4
CK_XDP_P <11>
CLK_24M_KBC <23>
CLK_24M_DEBUG <20>
CLK_24M_TPM <25>
+V1.05S_AXCK_LCPLL <10>
08
EC2
18P/50V_4
*HSW_ULT_DDR3L
SMBus/Pull-up(CLG) CLK_REQ/Strap Pin(CLG)
Q18
MBCLK2 <2,16,23>
MBDATA2 <2,16,23>
A A
R413 4.7K_2
+3V
SMB_RUN_DAT <11,16>
R429 4.7K_2
+3V
SMB_RUN_CLK <11,16>
5
4 3
1
*2N7002DW
Q19
4 3
1
2N7002DW
+3V
5
SMB_ME1_CLK
2
6
SMB_ME1_DAT
+3V
5
SMB_PCH_DAT
2
6
SMB_PCH_CLK
4
PCIE_CLKREQ0#
PCIE_CLKREQ5#
PCIE_CLKREQ_WLAN#
PCIE_CLKREQ3#
PCIE_CLKREQ_CR#
PCIE_CLKREQ4#
R463 10K_2
R461 10K_2
R201 10K_2
R481 10K_2
R235 10K_2
R240 10K_2
+3V
fo
r DS3
+3V_DEEP_SUS
+3V <2,6,7,9,10,11,16,17,18,19,20,21,23,24,25,26,27,28,31,34,35>
3
+3V_DEEP_SUS <4,6,7,9,10,11>
2
NB5/RD4
NB5/RD4
NB5/RD4
SMBus/Pull-up(CLG)
R412 2.2K_2
R411 2.2K_2
R379 2.2K_2
R391 2.2K_2
R410 2.2K_2
R409 2.2K_2
R122 10K_2
R389 1K_2
PROJECT : Nobel
PROJECT : Nobel
PROJECT : Nobel
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet
SMB_PCH_CLK
SMB_PCH_DAT
SMB_ME0_CLK
SMB_ME0_DAT
SMB_ME1_CLK
SMB_ME1_DAT
SML1ALERT#
SML0ALERT#
Intel Shark Bay ULT
Intel Shark Bay ULT
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
ULT 7/9 (PCIE/USB/CLK)
ULT 7/9 (PCIE/USB/CLK)
ULT 7/9 (PCIE/USB/CLK)
Intel Shark Bay ULT
8 36 Thursday, September 12, 2013
8 36 Thursday, September 12, 2013
1
8 36 Thursday, September 12, 2013
of
1A
1A
1A
5
GPIO15_ULT <7>
PV
MPHY_PWREN <35>
ACZ_SPKR <21>
SPKR <7>
TP4
TP86
TP85
R610 *0_2
R476 *0_2
R736 0_2
TP92
R385 *0_4
R398 0_4
SIO_EXT_SCI# <23>
BT_OFF <20>
RF_OFF <20>
D D
DOCK_IN_DET# <26,27,29>
C C
BT_COMBO_EN# <20>
B B
PCH_ROTATE# <8,23>
VIBRATOR_OUT <23,27>
TOUCH_PAD_INT <26,29>
GPIO27_EC <23>
DEVSLP1 <17>
TP for DG
TP33
PCH_Home_Button# <23>
SENSOR_HUB_INT_LS <24>
SENSOR_HUB_WAKE_LS <24>
GPIO14_ULT
TP9
TP98
SIO_EXT_SCI#
BT_OFF
RF_OFF
LAN_DISABLE#
GPIO13_ULT
GPIO16_ULT
DGPU_PWROK
GPIO24_ULT
GPIO25_ULT
GPIO26_ULT
GPIO27_ULT
GPIO28_ULT
DEVSLP0
DEVSLP1
DEVSLP2
GPIO44_ULT
BOARD_ID4
ACCEL_INTA#
BOARD_ID5
BT_COMBO_EN#
PCH_Home_Button#
GPIO50_ULT
BOARD_ID0
BOARD_ID1
BOARD_ID2
BOARD_ID3
GPIO70_ULT
MPHY_PWREN
GPIO76_ULT
R450 *0_4/S
Lynx Point-LP Platform Controller Hub
Lynx Point-LP Platform Controller Hub
Lynx Point-LP Platform Controller Hub Lynx Point-LP Platform Controller Hub
(HDA,JTAG,SATA)
(HDA,JTAG,SATA)
(HDA,JTAG,SATA) (HDA,JTAG,SATA)
U26O
AU2
AM3
AM2
AM7
AT3
AH4
AD6
Y1
T3
AD5
AM4
AN3
AN5
AD7
P2
L2
N5
AK4
AG5
AG3
AB6
U4
Y3
P3
AG6
AP1
AL4
AT5
C4
Y2
P1
V2
SPKR
*HSW_ULT_DDR3L
4
GPIO8(SUS)
GPIO9(SUS)
GPIO10(SUS)
LAN_PHY_PWR_CTRL / GPIO12(DSW)
GPIO13(SUS)
GPIO14(SUS)
GPIO15(SUS)
GPIO16
GPIO17
GPIO24 (SUS)
GPIO25(DSW)
GPIO26(SUS)
GPIO27(DSW)
GPIO28(SUS)
DEVSLP0/ GPIO33
DEVSLP1/ GPIO38
DEVSLP2/ GPIO39
GPIO44(SUS)
GPIO45(SUS)
GPIO46(SUS)
GPIO47(SUS)
GPIO48
GPIO49
GPIO50
GPIO56(SUS)
GPIO57(SUS)
GPIO58(SUS)
GPIO59(SUS)
SDIO_POWER_EN/ GPIO70
HSIOPC/ GPIO71
BMBUSY# / GPIO76
SPKR/ GPIO81
GPIO
Haswell (GPIO)
D60
THRMTRIP#
RCIN#/ GPIO82
SERIRQ
PCH_OPI_RCOMP
CPU/MISC
GSPI0_CS/ GPIO83
GSPI0_CLK/ GPIO84
GSPI0_MISO/ GPIO85
GSPI0_MOSI/ GPIO86
GSPI1_CS/ GPIO87
GSPI1_CLK/ GPIO88
GSPI1_MISO/ GPIO89
GSPI1_MOSI/ GPIO90
UART0_RXD/ GPIO91
UART0_TXD/ GPIO92
UART0_RTS/ GPIO93
UART0_CTS/ GPIO94
UART1_RXD/ GPIO0
SERIAL IO
UART1_TXD/ GPIO1
UART1_RST/ GPIO2
UART1_CTS/ GPIO3
I2C0_SDA/ GPIO4
I2C0_SCL/ GPIO5
I2C1_SDA/ GPIO6
I2C1_SCL/ GPIO7
SDIO_CLK/ GPIO64
SDIO_CMD/ GPIO65
SDIO_D0/ GPIO66
SDIO_D1/ GPIO67
SDIO_D2/ GPIO68
SDIO_D3/ GPIO69
RSVD
RSVD
PCH_THRMTRIP#
V4
EC_RCIN#
T4
AW15
PCH_OPI_RCOMP
AF20
AB21
R6
L6
N6
L8
R7
L5
N7
K2
J1
K3
J2
G1
K4
G2
J3
J4
F2
F3
G4
I2C1_SDA_PCH_TS
F1
I2C1_SCL_PCH_TS
E3
F4
D3
E4
C3
E2
SERIRQ
GSPI0_CS
GSPI0_CLK
GSPI0_MISO
GPIO86_ULT
GSPI1_CS
GSPI1_CLK
GSPI1_MISO
GSPI1_MOSI
UART0_RXD
UART0_TXD
UART0_RTS
UART0_CTS
UART1_RXD
UART1_TXD
UART1_RST
UART1_CTS
I2C0_SDA_SENSOR
I2C0_SCL_SENSOR
SDIO_CLK
SDIO_CMD
SDIO_D1
SDIO_D2
SDIO_D3
3
R510 *0_4/S
R241 10K_2
R360
49.9/F_4
TP53
I2C0_SDA_SENSOR <24>
I2C0_SCL_SENSOR <24>
I2C1_SDA_PCH_TS <26,27>
I2C1_SCL_PCH_TS <26,27>
GPIO66_ULT <7>
PM_THRMTRIP# <23>
EC_RCIN# <23>
+3V
SERIRQ <23,25>
PV
GSPI1_MOSI
UART0_RTS
UART1_RST
UART0_RXD
UART0_TXD
SDIO_D3
GSPI0_MISO
RP1
10
9
8
7 4
10K_10P8R_6
RP3
10
9
8
7 4
10K_10P8R_6
2
1
2
3
5 6
GSPI1_CS
GSPI0_CS
GSPI1_MISO
UART1_CTS
1
2
3
5 6
+3V
SDIO_D1
SDIO_CMD
SDIO_CLK
GSPI0_CLK
10
I2C1_SDA_PCH_TS
I2C1_SCL_PCH_TS
GSPI1_CLK
+3V
9
8
7 4
GPIO Pull-up/Pull-down(CLG)
GPIO70 SENSOR_HUB_I2C_WAKE
Close to EC
PM_THRMTRIP#
RP2
1
2
3
5 6
10K_10P8R_6
SIO_EXT_SCI#
BT_OFF
RF_OFF
GPIO13_ULT
GPIO14_ULT
GPIO24_ULT
GPIO26_ULT
GPIO28_ULT
GPIO44_ULT
ACCEL_INTA#
PCH_Home_Button#
GPIO50_ULT
GPIO16_ULT
DGPU_PWROK
DEVSLP0
DEVSLP1
DEVSLP2
BT_COMBO_EN#
GPIO70_ULT
EC_RCIN#
GPIO76_ULT
MPHY_PWREN
MPHY_PWREN
GPIO25_ULT
GPIO27_ULT
LAN_DISABLE#
1
UART0_CTS
SDIO_D2
UART1_TXD
UART1_RXD
+3V
R383 10K_2
R397 10K_2
R134 10K_2
R506 1K_2
09
for DS3
+3V_DEEP_SUS
R132 10K_2
R384 10K_2
R382 10K_2
R144 10K_2
R192 10K_2
R227 10K_2
R376 10K_2
R228 10K_2
R159 10K_2
R395 10K_2
R435 10K_2
R475 10K_2
R434 10K_2
R470 10K_2
R472 10K_2
R488 10K_2
R248 10K_2
R238 10K_2
R516 *10K_2
R236 10K_2
R471 10K_2
R433 100K_2
R432 *10K_2
+V1.05S_VCCST
+3V
+3VS5
R195 10K_2
R375 10K_2
R164 10K_2
A A
5
R165 10K_2
R177 *10K_2
R230 *10K_2
4
BOARD_ID0
BOARD_ID1
BOARD_ID2
BOARD_ID3
BOARD_ID4
BOARD_ID5
R197 *10K_2
R372 *10K_2
R153 *10K_2
R140 *10K_2
R176 10K_2
R229 10K_2
+3V_DEEP_SUS
RAM SIZE
2G
4G
3
Hynix (TG) H5TC4G63AFR-PBA HUMA, A
Micron (TF) MT41K256M16HA-125:E V80A/E
Elpida (TN) EDJ4216EFBG-GN-F F
Hynix (TG) H5TC4G63MFR-PBA GEMMA, M
Samsung (TH) K4B4G1646B-HYK0 B
BOARD_ID5
TPM support
0
1
BOARD_ID0 BOARD_ID1 BOARD_ID2
0 0 0
0 0 1
0
0
1 1
0 0 1
BOARD_ID4
NO 0
YES
1
2
0 1
PROJECT : Nobel
PROJECT : Nobel
PROJECT : Nobel
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
ULT 8/9 (GPIO/MISC)
ULT 8/9 (GPIO/MISC)
NB5/RD4
NB5/RD4
NB5/RD4
ULT 8/9 (GPIO/MISC)
Date: Sheet of
Date: Sheet of
Date: Sheet
+3V_DEEP_SUS <4,6,7,8,10,11>
+V1.05S_VCCST <2,4,11,34>
+3V <2,6,7,8,10,11,16,17,18,19,20,21,23,24,25,26,27,28,31,34,35>
+3VS5 <6,10,11,20,26,27,29,30,35>
Intel Shark Bay ULT
Intel Shark Bay ULT
Intel Shark Bay ULT
of
9 36 Thursday, September 12, 2013
9 36 Thursday, September 12, 2013
1
9 36 Thursday, September 12, 2013
1A
1A
1A
5
+1.05V
D D
+1.05V
+1.05V
TP17
C130
1U/6.3V_2
VCCASW=658mA
TP27
+1.05V
C C
TP34
+V3.3DX_1.5DX_ADO
B B
+3V_DEEP_SUS
+3VS5
+3V
VCC1_05=1.741A
+3VS5
DcpSus1=109mA
C199 1U/6.3V_2
C200 1U/6.3V_2
C201 *1U/6.3V_2
C193 *1U/6.3V_2
C225 1U/6.3V_2
C235 22U/6.3VS_8
C237 22U/6.3VS_8
C233 1U/6.3V_2
C226 22U/6.3VST_8
C218 22U/6.3VS_8
SI Change to 22uF for Intel recommend
DcpSus3=10mA
+V3.3DX_1.5DX_PAZSUS_PCH
DcpSus2=25mA
TP16
VCCSUS3_3=63mA
+V1.05S_CORE_PCH
C207 1U/6.3V_2
C140 1U/6.3V_2
C202 10U/6.3VS_6
+PCH_VCCDSW
C139 1U/6.3V_2
C158 *22U/6.3VS_8
+V1.05S_AIDLE
C126 1U/6.3V_2
C176 22U/6.3VST_8
+V1.05M_ASW
+V1.05M_FHV0
+V1.05M_FHV1
+V1.05A_SUS_PCH
+V1.05DX_MODPHY_PCH
VCCHSIO=1.838A
+V1.05S_AUSB3PLL
VCCSATA3PLL=42mA
+V1.05S_ASATA3PLL
+V1.05A_VCCUSB3SUS
+V1.05A_USB2SUS
+V3.3A_PSUS
VCCDSW3_3=114mA
C127 *1U/6.3V_2
C190 22U/6.3VST_8
+V3.3S_PCORE
U26P
J11
VCC1_05
H11
VCC1_05
H15
VCC1_05
AE8
VCC1_05
AF22
VCC1_05
C131 0.1U/10V_2 L12 2.2uH/500mA_6
AG19
AG20
AG14
AG13
AD10
VCCHDA=11mA
AH14
AH13
AH10
+V3.3DX_1.5DX_ADO
DCPSUSBYP
DCPSUSBYP
AE9
VCCASW
AF9
VCCASW
AG8
VCCASW
VCCASW
VCCASW
DCPSUS1
AD8
DCPSUS1
K9
VCCHSIO
L10
VCCHSIO
M9
VCCHSIO
N8
VCC1_05
P9
VCC1_05
B18
VCCUSB3PLL
B11
VCCSATA3PLL
J13
DCPSUS3
VCCHDA
DCPSUS2
AC9
VCCSUS3_3
AA9
VCCSUS3_3
VCCDSW3_3
V8
VCC3_3
W9
VCC3_3
*HSW_ULT_DDR3L
POWER
CORE
VCCMPHY
USB3
HDA
VRM
GPIO/ LCC
4
RTC
SPI
ICC
THERMAL SENSOR
OPI
SERIAL IO
SUS OSCILLATOR
USB2
VCCSUS3_3
VCCRTC
DCPRTC
VCCSPI
VCCCLK
VCCCLK
VCCACLKPLL
VCCCLK
VCCCLK
VCCCLK
RSVD
RSVD
RSVD
VCCSUS3_3
VCCSUS3_3
VCCTS1_5
VCC3_3
VCC3_3
RSVD
VCCAPLL
VCCAPLL
VCCSDIO
VCCSDIO
DCPSUS4
RSVD
VCC1_05
VCC1_05
3
Lynx Point-LP Platform Controller Hub
(HDA,JTAG,SATA)(POWER)
+V3.3A_DSW_PRTCSUS
AH11
VCCRTC < 1mA
AG10
AE7
+VCCRTCEXT
VCCSPI=18mA
Y8
+V3.3M_PSPI
+V1.05S_AXCK_DCB
J18
K19
A20
+V1.05S_AXCK_LCPLL
J17
+V1.05S_SSCF100
R21
T21
+V1.05S_SSCFF
K18
M20
V21
AE20
+V3.3A_PSUS
AE21
VCCTS1_5=3mA
J15
+V1.5S_ATS
+V3.3S_PTS
K14
VCC3_3=41mA
K16
VC
CAPLL=57mA
Y20
AA21
W21
+V1.05S_APLLOPI
VCCSDIO=17mA
U8
T9
+V3.3S_1.8S_SDIO_PCH
AB8
+V1.05A_AOSCSUS
AC20
AG16
+V1.05S_DUSB
AG17
C128 1U/6.3V_2
C146 0.1U/10V_2
C175 *0.1U/10V_2
2.2uH/500mA_6
L11
C203 1U/6.3V_2
C224 47U/6.3VST_8
C205 47U/6.3VST_8
L13 2.2uH/500mA_6
C229 1U/6.3V_2
C234 47U/6.3VST_8
C220 47U/6.3VS_8
C204 1U/6.3V_2
C191 1U/6.3V_2
C183 0.1U/10V_2
C173 1U/6.3V_2
C192 1U/6.3V_2
DcpSus4=1mA
C156 1U/6.3V_2
C129 1U/6.3V_2
R421 0_4
R424 *0_4
R242 *0_6/S
R243 *0_6/S
2.2uH PN CV-2205JZ00
L9 0_6
C182 *47U/6.3VST_8
C177 *47U/6.3VST_8
+3V_DEEP_SUS
+3V_RTC
C141 1U/6.3V_2
C142 0.1U/10V_2
C143 0.1U/10V_2
+3V_DEEP_SUS
+3V
+1.05V
+1.05V
+1.05V
+1.05V
+V3.3A_PSUS
+1.5V
+3V
+1.05V
+3V
TP29
+1.05V
+1.05V_MODPHY
VCCACLKPLL=31mA
VCCCLK=200mA
SLP_SUS_ON <23>
for DS3
R216
100K_2
R426 *0_4/S
2
C362
1U/6.3V_2
C363
*10P/50V_4
L15 2.2uH/500mA_6
R406 *0_6
U25
5
IN
4
IN
3
ON/OFF
IC(5P) G5243AT11U
R217
*100K_2
OUT
GND
20mil
+V1.05S_ASATA3PLL
20mil
+V1.05S_AUSB3PLL
+V1.05DX_MODPHY_PCH
+3V_DEEP_SUS +3VS5
1
2
C372
0.1U/10V_2
1
10
A A
+1.5V <20,21,32>
+1.05V <4,7,11,23,32,35>
+3VS5 <6,9,11,20,26,27,29,30,35>
5
R106 0_4
R110 *0_4
+5V <6,20,21,22,29,35>
+3V
+1.5V
PROJECT : Nobel
PROJECT : Nobel
+V1.05S_AUSB3PLL <8>
+V1.05S_ASATA3PLL <7>
+V1.05S_AXCK_LCPLL <8>
+3V <2,6,7,8,9,11,16,17,18,19,20,21,23,24,25,26,27,28,31,34,35>
+3V_RTC <7>
+1.35VSUS <2,4,12,13,14,15,25,33>
4
3
2
NB5/RD4
NB5/RD4
NB5/RD4
PROJECT : Nobel
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
ULT 9/9(POWER-2)
ULT 9/9(POWER-2)
ULT 9/9(POWER-2)
Date: Sheet of
Date: Sheet of
Date: Sheet
Intel Shark Bay ULT
Intel Shark Bay ULT
Intel Shark Bay ULT
of
10 36 Thursday, September 12, 2013
10 36 Thursday, September 12, 2013
1
10 36 Thursday, September 12, 2013
1A
1A
1A
5
D D
H_VCCST_PWRGD <4>
+1.05V
C C
H_VCCST_PWRGD VCCST_PWRGD_XDP
C137 *0.1U/10V_2
4
XDP_PREQ#_CPU <2>
XDP_PRDY#_CPU <2>
CFG0 <4>
CFG1 <4>
CFG2 <4>
CFG3 <4>
XDP_BPM0 <2>
XDP_BPM1 <2>
CFG4 <4>
CFG5 <4>
CFG6 <4>
R208 *1K_2
CFG7 <4>
PWR_DEBUG <4>
SMB_RUN_DAT <8,16>
SMB_RUN_CLK <8,16>
XDP_TCK0 <2>
R202 *1K_2
CFG1
CFG2
CFG3
OBSFN_B0
OBSFN_B1
CFG4
CFG5
CFG6
CFG7
DNBSWON#
H_SYS_PWROK_XDP
XDP_TCK1
XDP_TCK0
3
CN4
31
31
323229
333328
343427
353526
363625
373724
383823
393922
404021
414120
424219
434318
444417
454516
464615
474714
484813
494912
505011
515110
52529
53538
54547
55556
56565
57574
58583
59592
60601
*SEC_BSH-030-01-L-D-A-TR
30
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
OBSFN_C0
OBSFN_C1
CFG8
CFG9
CFG10
CFG11
OBSFN_D0
OBSFN_D1
CFG12
CFG13
CFG14
CFG15
XDP_RST
XDP_DBRESET_N
XDP_TDO
XDP_TRST#
XDP_TDI
XDP_TMS
R254 *1K_2
CFG17 <4>
CFG16 <4>
CFG8 <4>
CFG9 <4>
CFG10 <4>
CFG11 <4>
CFG19 <4>
CFG18 <4>
CFG12 <4>
CFG13 <4>
CFG14 <4>
CFG15 <4>
CK_XDP_P <8>
CK_XDP_N <8>
CFG3
2
C216 *0.1U/10V_2
1
11
+1.05V
XDP_DBRESET_N
B B
A A
+3V_DEEP_SUS <4,6,7,8,9,10>
+3VS5 <6,9,10,20,26,27,29,30,35>
+V1.05S_VCCST <2,4,9,34>
+3V <2,6,7,8,9,10,16,17,18,19,20,21,23,24,25,26,27,28,31,34,35>
+1.05V <4,7,10,23,32,35>
5
APS
+3V_DEEP_SUS
CN2
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
*ACES_88511-180N
+3VS5
R124 *0_2
R88 *0_2
R95 *0_2
R96 *0_2
R103 *0_2
R207 *0_2
R108 *0_2
R111 *0_2
R114 *0_2
4
SUSB# <6,11,23>
SLP_S5# <6>
SUSC# <6,23>
SLP_A# <6>
RTC_RST# <7>
DNBSWON# <6,23>
SYS_RESET# <6>
PCH_SLP_S0_N <6,23>
SUSB# <6,11,23>
R86 *0_4
R87 *0_4
+3V_DEEP_SUS
+3VS5
R258 *1K_2
C215
*0.1U/10V_2
+V1.05S_VCCST
JTAGX_PCH <7>
JTAG_TMS_PCH <7>
JTAG_TDI_PCH <7>
JTAG_TDO_PCH <7>
XDP_TDI_R
JTAG_TCK_PCH <7>
3
HWPG <4,23,30,32,33>
R276 *0_2
+3V
XDP_TDO
XDP_TDI_R
XDP_TMS
XDP_TRST#
H_SYS_PWROK_XDP
+3V
R273 *0_2
R262 *51_2
R259 *0_2
R260 *0_2
R256 *0_2
R257 *0_2
R275 *0_2
R203 *0_2
R204 *0_2
R205 *1K_2
C136
*0.1U/10V_2
C232
*0.1U/10V_2
U13
14
VCC
2
1A
1
1OE
5
2A
4
2OE
9
3A
10
3OE
12
4A
13
4OE
*SN74CBTLV3126RGYR
XDP_TDI_R XDP_TDI
XDP_TDO
XDP_TCK0
XDP_TMS
XDP_TDI
XDP_TDO
XDP_TCK0
XDP_TCK1
+3V_DEEP_SUS
3
1B
6
2B
8
3B
11
4B
15
DPAD
7
GND
SYS_PWROK <6>
PLTRST# <6,19,20,23,25,28>
NB5/RD4
NB5/RD4
2
NB5/RD4
R206 *0_2
R255 *1K_2
PROJECT : Nobel
PROJECT : Nobel
PROJECT : Nobel
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
HSW XDP & APS
HSW XDP & APS
HSW XDP & APS
Date: Sheet of
Date: Sheet of
Date: Sheet
XDP_TDO_CPU <2>
XDP_TDI_CPU <2>
XDP_TMS_CPU <2>
XDP_TRST#_CPU <2,7>
H_SYS_PWROK_XDP
XDP_RST
Intel Shark Bay ULT
Intel Shark Bay ULT
Intel Shark Bay ULT
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
of
11 36 Thursday, September 12, 2013
11 36 Thursday, September 12, 2013
11 36 Thursday, September 12, 2013
1
1A
1A
1A
5
M_A_A0 <3,13>
M_A_A1 <3,13>
M_A_A2 <3,13>
M_A_A3 <3,13>
M_A_A4 <3,13>
M_A_A5 <3,13>
M_A_A6 <3,13>
M_A_A7 <3,13>
M_A_A8 <3,13>
M_A_A9 <3,13>
M_A_A10 <3,13>
M_A_A11 <3,13>
GND
M_A_DIM0_CS1_N <3,13>
M_A_A12 <3,13>
M_A_A13 <3,13>
M_A_A14 <3,13>
M_A_A15 <3,13>
M_A_BS0 <3,13>
M_A_BS1 <3,13>
M_A_BS2 <3,13>
M_A_DIM0_CS0_N <3,13>
M_A_DIM0_CKE0 <3,13>
M_A_CAS_N <3,13>
M_A_RAS_N <3,13>
M_A_WE_N <3,13>
R625 *0_2
GND
GND
M_A_DIM0_CKE1 <3,13>
D D
M_A_DIM0_CLK_DDR0_DP <3,13>
M_A_DIM0_CLK_DDR0_DN <3,13>
M_A_ODT_2 <3>
M_A_ODT <13>
C C
SMDDR_VREF_DQ0_M1 <13>
+SMDDR_VREF_DIMM <13,14,15>
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
M_A_BS0
M_A_BS1
M_A_BS2
M_A_DIM0_CS0_N
M_A_DIM0_CLK_DDR0_DP
M_A_DIM0_CLK_DDR0_DN
M_A_DIM0_CKE0
M_A_CAS_N
M_A_RAS_N
M_A_WE_N
M_A_ODT
+1.35VSUS
C333 4.7UF_4
C302 0.1uF_2
C308 0.1uF_2
C335 0.1uF_2
+1.35VSUS
C274 4.7UF_4
C276 0.1uF_2
C29 0.1uF_2
C341 0.1uF_2
C278 0.1uF_2
C68 0.1uF_2
C18 0.1uF_2
SMDDR_VREF_DQ0_M1
+SMDDR_VREF_DIMM
M_A_ODT M_A_ODT
M_A_DIM0_CKE1 M_A_DIM0_CKE1
R67
240R/F_2
U16
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
T7
A14
M7
A15
M2
BA0
N8
BA1
M3
BA2
L2
CS#
J7
CK
K7
CK#
K9
CKE
K3
CAS#
J3
RAS#
L3
WE#
K1
ODT
B2
VDD#B2
D9
VDD#D9
G7
VDD#G7
K2
VDD#K2
K8
VDD#K8
N1
VDD#N1
N9
VDD#N9
R1
VDD#R1
R9
VDD#R9
A1
VDDQ#A1
A8
VDDQ#A8
C1
VDDQ#C1
C9
VDDQ#C9
D2
VDDQ#D2
E9
VDDQ#E9
F1
VDDQ#F1
H2
VDDQ#H2
H9
VDDQ#H9
H1
VREFDQ
M8
VREFCA
J1
ODT1
L1
CS1#
J9
CKE1
L9
ZQ1
Memory-Down _DDRL3
96-BALL
SDRAM DDR3
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
DQSU
DQSL
DQSU#
DQSL#
DMU
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
RESET#
4
E3
M_A_DQ7
F7
M_A_DQ4
F2
M_A_DQ3
F8
M_A_DQ1
H3
M_A_DQ6
H8
M_A_DQ0
G2
M_A_DQ2
H7
M_A_DQ5
D7
M_A_DQ13
C3
M_A_DQ14
C8
M_A_DQ12
C2
M_A_DQ11
A7
M_A_DQ8
A2
M_A_DQ15
B8
M_A_DQ9
A3
M_A_DQ10
C7
M_A_DQS_DP1
F3
M_A_DQS_DP0
B7
M_A_DQS_DN1
G3
M_A_DQS_DN0
D3
E7
DML
GND GND
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
GND
D1
D8
E2
E8
F9
G1
G9
T2
DDR3_DRAMRST#
L8
DDR_ZQ1 DDR_ZQ2
ZQ
M_A_DQ7 <3>
M_A_DQ4 <3>
M_A_DQ3 <3>
M_A_DQ1 <3>
M_A_DQ6 <3>
M_A_DQ0 <3>
M_A_DQ2 <3>
M_A_DQ5 <3>
M_A_DQ13 <3>
M_A_DQ14 <3>
M_A_DQ12 <3>
M_A_DQ11 <3>
M_A_DQ8 <3>
M_A_DQ15 <3>
M_A_DQ9 <3>
M_A_DQ10 <3>
M_A_DQS_DP1 <3>
M_A_DQS_DP0 <3>
M_A_DQS_DN1 <3>
M_A_DQS_DN0 <3>
DDR3_DRAMRST# <2,13,14,15>
R66
240R/F_2
3
R6
240R/F_2
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
M2
N8
M3
L2
J7
K7
K9
K3
J3
L3
K1
B2
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
H1
M8
J1
L1
J9
L9
GND
GND
GND
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
M_A_BS1
M_A_BS2
M_A_DIM0_CS0_N
M_A_DIM0_CLK_DDR0_DP
M_A_DIM0_CLK_DDR0_DN
M_A_DIM0_CKE0
M_A_CAS_N
M_A_RAS_N
M_A_WE_N
M_A_ODT
+1.35VSUS
C79 4.7UF_4
C340 0.1uF_2 C324 0.1uF_2
C52 0.1uF_2
C74 0.1uF_2
C83 0.1uF_2
+1.35VSUS
C77 4.7UF_4
C42 0.1uF_2
C75 0.1uF_2
C81 0.1uF_2
C51 0.1uF_2
C322 0.1uF_2
C287 0.1uF_2
SMDDR_VREF_DQ0_M1
+SMDDR_VREF_DIMM
M_A_DIM0_CS1_N M_A_DIM0_CS1_N
2
U6
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15
BA0
BA1
BA2
CS#
CK
CK#
CKE
CAS#
RAS#
WE#
ODT
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
VREFDQ
VREFCA
ODT1
CS1#
CKE1
ZQ1
96-BALL
SDRAM DDR3
Memory-Down _DDRL3
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
DQSU
DQSL
DQSU#
DQSL#
DMU
DML
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
RESET#
ZQ
E3
F7
F2
F8
H3
H8
G2
H7
D7
C3
C8
C2
A7
A2
B8
A3
C7
M_A_DQS_DP3 M_A_BS0
F3
M_A_DQS_DP2
B7
M_A_DQS_DN3
G3
M_A_DQS_DN2
D3
E7
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
T2
DDR3_DRAMRST#
L8
M_A_DQ17
M_A_DQ22
M_A_DQ21
M_A_DQ23
M_A_DQ16
M_A_DQ19
M_A_DQ20
M_A_DQ18
M_A_DQ25
M_A_DQ28
M_A_DQ26
M_A_DQ24
M_A_DQ30
M_A_DQ27
M_A_DQ31
M_A_DQ29
GND
R39
240R/F_2
M_A_DQ17 <3>
M_A_DQ22 <3>
M_A_DQ21 <3>
M_A_DQ23 <3>
M_A_DQ16 <3>
M_A_DQ19 <3>
M_A_DQ20 <3>
M_A_DQ18 <3>
M_A_DQ25 <3>
M_A_DQ28 <3>
M_A_DQ26 <3>
M_A_DQ24 <3>
M_A_DQ30 <3>
M_A_DQ27 <3>
M_A_DQ31 <3>
M_A_DQ29 <3>
M_A_DQS_DP3 <3>
M_A_DQS_DP2 <3>
M_A_DQS_DN3 <3>
M_A_DQS_DN2 <3>
1
12
B B
+1.35VSUS
VREF DQ0 M1 Solution
R94
R38
1.8K/F_4
+SMDDR_VREF_DIMM DDR_VTTREF
R44
1.8K/F_4
1.8K/F_4
SMDDR_VREF_DQ0_M1
R101
1.8K/F_4
4
+1.35VSUS <2,4,13,14,15,25,33>
3
DDR_VTTREF <14,33>
SMDDR_VREF_DQ0_M3 <3>
A A
SM_VREF <3>
DDR_VTTREF
SMDDR_VREF_DQ1_M3
5
R92 24.9/F_4
C88
0.022U/6.3V_4
2 1
R91 *0_6
R99 2/F_6
24.9/F_4
R109
R93 *0_6
R100 2/F_6
C86
0.022U/6.3V_4
2 1
+1.35VSUS
DDR3L
TOP B/S
QBCON
AKD5JGETW08 AKD5JGETW07
AKD5JGST413 AKD5JGST412
QCI PN
AKD5JGETW00 H5TC4G63AFR-PBA IC SDRAM(96P)H5TC4G63AFR-PBA(FBGA) Hynix (default)
Description Vender PN
IC SDRAM (96P) EDJ4216EFBG-GN-F(FBGA) AKD5JGST403 EDJ4216EFBG-GN-F
Elpida
AKD5JGSTL07 AKD5JGSTL06 IC SDRAM(96P) MT41K256M16HA-125:E (FBGA) AKD5JGSTL02 MT41K256M16HA-125:E Micron
AKD5PGSTW04 AKD5PGSTW05 AKD5PGSTW00 H5TC4G63MFR-PBA IC SDRAM(96P) H5TC4G63MFR-PBA(FBGA) Hynix
Applying Applying AKD5PGET500 K4B4G1646B-HYK0 IC SDRAM(96P) K4B4G1646B-HYK0(FBGA) Samsung
PROJECT : Nobel
PROJECT : Nobel
PROJECT : Nobel
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5/RD4
NB5/RD4
NB5/RD4
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Intel Shark Bay ULT
Intel Shark Bay ULT
Intel Shark Bay ULT
LPDDR1A
LPDDR1A
LPDDR1A
1
12 36 Thursday, September 12, 2013
12 36 Thursday, September 12, 2013
12 36 Thursday, September 12, 2013
1A
1A
1A
5
4
3
2
1
U17
R327
240R/F_2
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
T7
A14
M7
A15
M2
BA0
N8
BA1
M3
BA2
L2
CS#
J7
CK
K7
CK#
K9
CKE
K3
CAS#
J3
RAS#
L3
WE#
K1
ODT
B2
VDD#B2
D9
VDD#D9
G7
VDD#G7
K2
VDD#K2
K8
VDD#K8
N1
VDD#N1
N9
VDD#N9
R1
VDD#R1
R9
VDD#R9
A1
VDDQ#A1
A8
VDDQ#A8
C1
VDDQ#C1
C9
VDDQ#C9
D2
VDDQ#D2
E9
VDDQ#E9
F1
VDDQ#F1
H2
VDDQ#H2
H9
VDDQ#H9
H1
VREFDQ
M8
VREFCA
J1
ODT1
L1
CS1#
J9
CKE1
L9
ZQ1
Memory-Down _DDRL3
96-BALL
SDRAM DDR3
M_A_A0 <3,12>
M_A_A1 <3,12>
M_A_A2 <3,12>
M_A_A3 <3,12>
M_A_A4 <3,12>
M_A_A5 <3,12>
M_A_A6 <3,12>
GND
GND
M_A_A7 <3,12>
M_A_A8 <3,12>
M_A_A9 <3,12>
M_A_A10 <3,12>
M_A_A11 <3,12>
M_A_A12 <3,12>
M_A_A13 <3,12>
M_A_A14 <3,12>
M_A_A15 <3,12>
M_A_BS0 <3,12>
M_A_BS1 <3,12>
M_A_BS2 <3,12>
M_A_DIM0_CS0_N <3,12>
M_A_DIM0_CKE0 <3,12>
M_A_CAS_N <3,12>
M_A_RAS_N <3,12>
M_A_WE_N <3,12>
M_A_ODT <12>
D D
M_A_DIM0_CLK_DDR0_DP <3,12>
M_A_DIM0_CLK_DDR0_DN <3,12>
C C
GND
SMDDR_VREF_DQ0_M1 <12>
+SMDDR_VREF_DIMM <12,14,15>
B B
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
M_A_BS0
M_A_BS1
M_A_BS2
M_A_DIM0_CS0_N
M_A_DIM0_CLK_DDR0_DP
M_A_DIM0_CLK_DDR0_DN
M_A_DIM0_CKE0
M_A_CAS_N
M_A_RAS_N
M_A_WE_N
M_A_ODT
+1.35VSUS
C275 4.7UF_4
C342 0.1uF_2
C293 0.1uF_2
C279 0.1uF_2
C277 0.1uF_2
+1.35VSUS
C280 4.7UF_4
C289 0.1uF_2
C291 0.1uF_2
C292 0.1uF_2
C290 0.1uF_2
C288 0.1uF_2
C315 0.1uF_2
SMDDR_VREF_DQ0_M1
+SMDDR_VREF_DIMM
M_A_ODT M_A_ODT
M_A_DIM0_CS1_N M_A_DIM0_CS1_N
M_A_DIM0_CKE1 M_A_DIM0_CKE1
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
DQSU
DQSL
DQSU#
DQSL#
DMU
DML
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
RESET#
E3
M_A_DQ39
F7
M_A_DQ34
F2
M_A_DQ35
F8
M_A_DQ38
H3
M_A_DQ37
H8
M_A_DQ32
G2
M_A_DQ36
H7
M_A_DQ33
D7
M_A_DQ45
C3
M_A_DQ46
C8
M_A_DQ41
C2
M_A_DQ47
A7
M_A_DQ44
A2
M_A_DQ42
B8
M_A_DQ40
A3
M_A_DQ43
C7
M_A_DQS_DP5 M_A_DQS_DP6
F3
M_A_DQS_DP4
B7
M_A_DQS_DN5 M_A_DQS_DN6
G3
M_A_DQS_DN4
D3
E7
GND
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
GND
D1
D8
E2
E8
F9
G1
G9
T2
DDR3_DRAMRST#
L8
DDR_ZQ3 DDR_ZQ4
ZQ
M_A_DQ39 <3>
M_A_DQ34 <3>
M_A_DQ35 <3>
M_A_DQ38 <3>
M_A_DQ37 <3>
M_A_DQ32 <3>
M_A_DQ36 <3>
M_A_DQ33 <3>
M_A_DQ45 <3>
M_A_DQ46 <3>
M_A_DQ41 <3>
M_A_DQ47 <3>
M_A_DQ44 <3>
M_A_DQ42 <3>
M_A_DQ40 <3>
M_A_DQ43 <3>
M_A_DQS_DP5 <3> M_A_DQS_DP6 <3>
M_A_DQS_DP4 <3>
M_A_DQS_DN5 <3> M_A_DQS_DN6 <3>
M_A_DQS_DN4 <3>
DDR3_DRAMRST# <2,12,14,15>
R328
240R/F_2
GND
GND
GND
+0.65V_DDR_VTT
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
M_A_BS0
M_A_BS1
M_A_BS2
M_A_DIM0_CS0_N
M_A_DIM0_CLK_DDR0_DP
M_A_DIM0_CLK_DDR0_DN
M_A_DIM0_CKE0
M_A_CAS_N
M_A_RAS_N
M_A_WE_N
M_A_ODT
+1.35VSUS
C78 4.7UF_4
C84 0.1uF_2
C73 0.1uF_2
C15 0.1uF_2
C26 0.1uF_2
+1.35VSUS
C85 4.7UF_4
C82 0.1uF_2
C23 0.1uF_2
C36 0.1uF_2
C17 0.1uF_2
C66 0.1uF_2
C311 0.1uF_2
SMDDR_VREF_DQ0_M1
+SMDDR_VREF_DIMM
R47
240R/F_2
U5
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
T7
A14
M7
A15
M2
BA0
N8
BA1
M3
BA2
L2
CS#
J7
CK
K7
CK#
K9
CKE
K3
CAS#
J3
RAS#
L3
WE#
K1
ODT
B2
VDD#B2
D9
VDD#D9
G7
VDD#G7
K2
VDD#K2
K8
VDD#K8
N1
VDD#N1
N9
VDD#N9
R1
VDD#R1
R9
VDD#R9
A1
VDDQ#A1
A8
VDDQ#A8
C1
VDDQ#C1
C9
VDDQ#C9
D2
VDDQ#D2
E9
VDDQ#E9
F1
VDDQ#F1
H2
VDDQ#H2
H9
VDDQ#H9
H1
VREFDQ
M8
VREFCA
J1
ODT1
L1
CS1#
J9
CKE1
L9
ZQ1
Memory-Down _DDRL3
96-BALL
SDRAM DDR3
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
DQSU
DQSL
DQSU#
DQSL#
DMU
DML
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
RESET#
ZQ
E3
F7
F2
F8
H3
H8
G2
H7
D7
C3
C8
C2
A7
A2
B8
A3
C7
F3
M_A_DQS_DP7
B7
G3
M_A_DQS_DN7
D3
E7
GND
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
T2
DDR3_DRAMRST#
L8
M_A_DQ59
M_A_DQ58
M_A_DQ62
M_A_DQ57
M_A_DQ61
M_A_DQ56
M_A_DQ63
M_A_DQ60
M_A_DQ48
M_A_DQ53
M_A_DQ54
M_A_DQ50
M_A_DQ49
M_A_DQ52
M_A_DQ55
M_A_DQ51
GND
R48
240R/F_2
M_A_DQ59 <3>
M_A_DQ58 <3>
M_A_DQ62 <3>
M_A_DQ57 <3>
M_A_DQ61 <3>
M_A_DQ56 <3>
M_A_DQ63 <3>
M_A_DQ60 <3>
M_A_DQ48 <3>
M_A_DQ53 <3>
M_A_DQ54 <3>
M_A_DQ50 <3>
M_A_DQ49 <3>
M_A_DQ52 <3>
M_A_DQ55 <3>
M_A_DQ51 <3>
M_A_DQS_DP7 <3>
M_A_DQS_DN7 <3>
13
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
+1.35VSUS <2,4,12,14,15,25,33>
+0.65V_DDR_VTT <15,33>
A A
M_A_DIM0_CS1_N <3,12>
M_A_DIM0_CKE1 <3,12>
M_A_DIM0_CLK_DDR0_DN
M_A_DIM0_CLK_DDR0_DP
5
4
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
M_A_DIM0_CS0_N
M_A_DIM0_CKE0
M_A_CAS_N
M_A_RAS_N
M_A_WE_N
M_A_DIM0_CS1_N
M_A_DIM0_CKE1
M_A_ODT
M_A_BS0
M_A_BS1
M_A_BS2
R30 34.8/F_4
R29 34.8/F_4
R33 34.8/F_4
R32 34.8/F_4
R31 34.8/F_4
R302 34.8/F_4
R303 34.8/F_4
R304 34.8/F_4
R306 34.8/F_4
R301 34.8/F_4
R305 34.8/F_4
R300 34.8/F_4
R34 34.8/F_4
R28 34.8/F_4
R299 34.8/F_4
R298 34.8/F_4
R307 34.8/F_4
R24 34.8/F_4
R35 34.8/F_4
R21 34.8/F_4
R297 34.8/F_4
R22 34.8/F_4
R25 34.8/F_4
R308 34.8/F_4
R23 34.8/F_4
R343 34.8/F_4
R26 26.1/F_4
R27 26.1/F_4
R74 30/F_4
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
3
+1.35VSUS
+0.65V_DDR_VTT
C13 1U/6.3V_4
C4 1U/6.3V_4
C269 1U/6.3V_4
C271 1U/6.3V_4
C5 4.7UF_4
PROJECT : Nobel
PROJECT : Nobel
PROJECT : Nobel
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5/RD4
NB5/RD4
NB5/RD4
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Intel Shark Bay ULT
Intel Shark Bay ULT
Intel Shark Bay ULT
G-Sensor
G-Sensor
G-Sensor
1
1A
1A
13 36 Thursday, September 12, 2013
13 36 Thursday, September 12, 2013
13 36 Thursday, September 12, 2013
1A
5
4
3
2
1
U18
R325
240R/F_2
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
T7
A14
M7
A15
M2
BA0
N8
BA1
M3
BA2
L2
CS#
J7
CK
K7
CK#
K9
CKE
K3
CAS#
J3
RAS#
L3
WE#
K1
ODT
B2
VDD#B2
D9
VDD#D9
G7
VDD#G7
K2
VDD#K2
K8
VDD#K8
N1
VDD#N1
N9
VDD#N9
R1
VDD#R1
R9
VDD#R9
A1
VDDQ#A1
A8
VDDQ#A8
C1
VDDQ#C1
C9
VDDQ#C9
D2
VDDQ#D2
E9
VDDQ#E9
F1
VDDQ#F1
H2
VDDQ#H2
H9
VDDQ#H9
H1
VREFDQ
M8
VREFCA
J1
ODT1
L1
CS1#
J9
CKE1
L9
ZQ1
Memory-Down _DDRL3
96-BALL
SDRAM DDR3
M_B_A0 <3,15>
M_B_A1 <3,15>
M_B_A2 <3,15>
M_B_A3 <3,15>
M_B_A4 <3,15>
M_B_A5 <3,15>
M_B_A6 <3,15>
M_B_A7 <3,15>
M_B_A8 <3,15>
M_B_DIM0_CKE0 <3,15>
GND
GND
M_B_DIM0_CKE1 <3,15>
M_B_BS0 <3,15>
M_B_BS1 <3,15>
M_B_BS2 <3,15>
M_B_CAS_N <3,15>
M_B_RAS_N <3,15>
M_B_WE_N <3,15>
R626 *0_2
M_B_A9 <3,15>
M_B_A10 <3,15>
M_B_A11 <3,15>
M_B_A12 <3,15>
M_B_A13 <3,15>
M_B_A14 <3,15>
M_B_A15 <3,15>
D D
M_B_DIM0_CS0_N <3,15>
M_B_DIM0_CLK_DDR0_DP <3,15>
M_B_DIM0_CLK_DDR0_DN <3,15>
M_B_ODT_2 <3>
M_B_ODT <15>
C C
GND GND
SMDDR_VREF_DQ1_M1 <15>
+SMDDR_VREF_DIMM <12,13,15>
M_B_DIM0_CS1_N <3,15>
B B
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
M_B_BS0
M_B_BS1
M_B_BS2
M_B_DIM0_CS0_N
M_B_DIM0_CLK_DDR0_DP
M_B_DIM0_CLK_DDR0_DN
M_B_DIM0_CKE0
M_B_CAS_N
M_B_RAS_N
M_B_WE_N
M_B_ODT
+1.35VSUS
+1.35VSUS
C281 4.7UF_4 C25 4.7UF_4
C285 0.1uF_2 C33 0.1uF_2
C286 0.1uF_2 C34 0.1uF_2
C283 0.1uF_2 C32 0.1uF_2
C284 0.1uF_2 C31 0.1uF_2
C65 0.1uF_2 C316 0.1uF_2
SMDDR_VREF_DQ1_M1
+SMDDR_VREF_DIMM
M_B_ODT M_B_ODT
M_B_DIM0_CS1_N M_B_DIM0_CS1_N
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
DQSU
DQSL
DQSU#
DQSL#
DMU
DML
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
RESET#
E3
F7
F2
F8
H3
H8
G2
H7
D7
C3
C8
C2
A7
A2
B8
A3
C7
F3
B7
G3
D3
E7
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
T2
L8
ZQ
M_B_DQ7
M_B_DQ1
M_B_DQ3
M_B_DQ0
M_B_DQ4
M_B_DQ5
M_B_DQ2
M_B_DQ6
M_B_DQ13
M_B_DQ14
M_B_DQ12
M_B_DQ11
M_B_DQ8
M_B_DQ15
M_B_DQ9
M_B_DQ10
M_B_DQS_DP1
M_B_DQS_DP0
M_B_DQS_DN1
M_B_DQS_DN0
GND
GND
DDR3_DRAMRST#
DDR_ZQ5 DDR_ZQ6 M_B_DIM0_CKE1 M_B_DIM0_CKE1
M_B_DQ7 <3>
M_B_DQ1 <3>
M_B_DQ3 <3>
M_B_DQ0 <3>
M_B_DQ4 <3>
M_B_DQ5 <3>
M_B_DQ2 <3>
M_B_DQ6 <3>
M_B_DQ13 <3>
M_B_DQ14 <3>
M_B_DQ12 <3>
M_B_DQ11 <3>
M_B_DQ8 <3>
M_B_DQ15 <3>
M_B_DQ9 <3>
M_B_DQ10 <3>
M_B_DQS_DP1 <3>
M_B_DQS_DP0 <3>
M_B_DQS_DN1 <3>
M_B_DQS_DN0 <3>
DDR3_DRAMRST# <2,12,13,15>
R326
240R/F_2
GND
GND
M_B_BS0
M_B_BS1
M_B_BS2
M_B_DIM0_CS0_N
M_B_DIM0_CLK_DDR0_DP
M_B_DIM0_CLK_DDR0_DN
M_B_DIM0_CKE0
M_B_CAS_N
M_B_RAS_N
M_B_WE_N
M_B_ODT
+1.35VSUS
C24 4.7UF_4 C336 4.7UF_4
C298 0.1uF_2 C317 0.1uF_2
C41 0.1uF_2 C303 0.1uF_2
C28 0.1uF_2 C312 0.1uF_2
C294 0.1uF_2 C338 0.1uF_2
+1.35VSUS
C62 0.1uF_2 C19 0.1uF_2
SMDDR_VREF_DQ1_M1
+SMDDR_VREF_DIMM
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
R42
240R/F_2
U4
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
T7
A14
M7
A15
M2
BA0
N8
BA1
M3
BA2
L2
CS#
J7
CK
K7
CK#
K9
CKE
K3
CAS#
J3
RAS#
L3
WE#
K1
ODT
B2
VDD#B2
D9
VDD#D9
G7
VDD#G7
K2
VDD#K2
K8
VDD#K8
N1
VDD#N1
N9
VDD#N9
R1
VDD#R1
R9
VDD#R9
A1
VDDQ#A1
A8
VDDQ#A8
C1
VDDQ#C1
C9
VDDQ#C9
D2
VDDQ#D2
E9
VDDQ#E9
F1
VDDQ#F1
H2
VDDQ#H2
H9
VDDQ#H9
H1
VREFDQ
M8
VREFCA
J1
ODT1
L1
CS1#
J9
CKE1
L9
ZQ1
Memory-Down _DDRL3
96-BALL
SDRAM DDR3
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
DQSU
DQSL
DQSU#
DQSL#
DMU
DML
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
RESET#
ZQ
E3
F7
F2
F8
H3
H8
G2
H7
D7
C3
C8
C2
A7
A2
B8
A3
C7
M_B_DQS_DP3
F3
M_B_DQS_DP2
B7
M_B_DQS_DN3
G3
M_B_DQS_DN2
D3
E7
GND
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
T2
DDR3_DRAMRST#
L8
GND
M_B_DQ20
M_B_DQ22
M_B_DQ16
M_B_DQ23
M_B_DQ21
M_B_DQ19
M_B_DQ17
M_B_DQ18
M_B_DQ26
M_B_DQ24
M_B_DQ30
M_B_DQ25
M_B_DQ27
M_B_DQ28
M_B_DQ31
M_B_DQ29
R43
240R/F_2
M_B_DQ20 <3>
M_B_DQ22 <3>
M_B_DQ16 <3>
M_B_DQ23 <3>
M_B_DQ21 <3>
M_B_DQ19 <3>
M_B_DQ17 <3>
M_B_DQ18 <3>
M_B_DQ26 <3>
M_B_DQ24 <3>
M_B_DQ30 <3>
M_B_DQ25 <3>
M_B_DQ27 <3>
M_B_DQ28 <3>
M_B_DQ31 <3>
M_B_DQ29 <3>
M_B_DQS_DP3 <3>
M_B_DQS_DP2 <3>
M_B_DQS_DN3 <3>
M_B_DQS_DN2 <3>
14
VREF DQ1 M1 Solution
DDR_VTTREF <12,33>
SMDDR_VREF_DQ1_M3 <3>
A A
5
4
DDR_VTTREF SMDDR_VREF_DQ1_M1
SMDDR_VREF_DQ1_M3
R107 24.9/F_4
R90 *0_6
R98 2/F_6
C87
0.022U/25V_4
2 1
3
+1.35VSUS
R89
1.8K/F_4
R97
1.8K/F_4
+1.35VSUS <2,4,12,13,15,25,33>
PROJECT : Nobel
PROJECT : Nobel
PROJECT : Nobel
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5/RD4
NB5/RD4
NB5/RD4
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Intel Shark Bay ULT
Intel Shark Bay ULT
Intel Shark Bay ULT
LPDDR1B
LPDDR1B
LPDDR1B
1
1A
1A
14 36 Thursday, September 12, 2013
14 36 Thursday, September 12, 2013
14 36 Thursday, September 12, 2013
1A
5
4
3
2
1
U19
R324
240R/F_2
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
T7
A14
M7
A15
M2
BA0
N8
BA1
M3
BA2
L2
CS#
J7
CK
K7
CK#
K9
CKE
K3
CAS#
J3
RAS#
L3
WE#
K1
ODT
B2
VDD#B2
D9
VDD#D9
G7
VDD#G7
K2
VDD#K2
K8
VDD#K8
N1
VDD#N1
N9
VDD#N9
R1
VDD#R1
R9
VDD#R9
A1
VDDQ#A1
A8
VDDQ#A8
C1
VDDQ#C1
C9
VDDQ#C9
D2
VDDQ#D2
E9
VDDQ#E9
F1
VDDQ#F1
H2
VDDQ#H2
H9
VDDQ#H9
H1
VREFDQ
M8
VREFCA
J1
ODT1
L1
CS1#
J9
CKE1
L9
ZQ1
Memory-Down _DDRL3
96-BALL
SDRAM DDR3
M_B_A0 <3,14>
M_B_A1 <3,14>
M_B_A2 <3,14>
M_B_A3 <3,14>
M_B_A4 <3,14>
D D
M_B_DIM0_CS0_N <3,14>
M_B_DIM0_CLK_DDR0_DP <3,14>
M_B_DIM0_CLK_DDR0_DN <3,14>
C C
GND
SMDDR_VREF_DQ1_M1 <14>
+SMDDR_VREF_DIMM <12,13,14>
B B
M_B_A5 <3,14>
M_B_A6 <3,14>
M_B_A7 <3,14>
M_B_A8 <3,14>
M_B_A9 <3,14>
M_B_A10 <3,14>
M_B_A11 <3,14>
M_B_A12 <3,14>
M_B_A13 <3,14>
M_B_A14 <3,14>
M_B_A15 <3,14>
M_B_BS0 <3,14>
M_B_BS1 <3,14>
M_B_BS2 <3,14>
M_B_DIM0_CKE0 <3,14>
M_B_CAS_N <3,14>
M_B_RAS_N <3,14>
M_B_WE_N <3,14>
M_B_ODT <14>
GND
GND
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
M_B_BS0
M_B_BS1
M_B_BS2
M_B_DIM0_CS0_N
M_B_DIM0_CLK_DDR0_DP
M_B_DIM0_CLK_DDR0_DN
M_B_DIM0_CKE0
M_B_CAS_N
M_B_RAS_N
M_B_WE_N
M_B_ODT
+1.35VSUS
C334 4.7UF_4
C313 0.1uF_2
C304 0.1uF_2
C339 0.1uF_2
C318 0.1uF_2
+1.35VSUS
C332 4.7UF_4
C314 0.1uF_2
C305 0.1uF_2
C323 0.1uF_2
C337 0.1uF_2
C30 0.1uF_2
C55 0.1uF_2
SMDDR_VREF_DQ1_M1
+SMDDR_VREF_DIMM
M_B_DIM0_CS1_N M_B_DIM0_CS1_N
M_B_DIM0_CKE1 M_B_DIM0_CKE1
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
DQSU
DQSL
DQSU#
DQSL#
DMU
DML
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
RESET#
E3
F7
F2
F8
H3
H8
G2
H7
D7
C3
C8
C2
A7
A2
B8
A3
C7
F3
B7
G3
D3
E7
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
T2
L8
ZQ
M_B_DQ38
M_B_DQ33
M_B_DQ34
M_B_DQ36
M_B_DQ39
M_B_DQ37
M_B_DQ35
M_B_DQ32
M_B_DQ45
M_B_DQ46
M_B_DQ44
M_B_DQ42
M_B_DQ40
M_B_DQ47
M_B_DQ41
M_B_DQ43
M_B_DQS_DP5
M_B_DQS_DP4
M_B_DQS_DN5
M_B_DQS_DN4
GND
GND
DDR3_DRAMRST#
DDR_ZQ7 DDR_ZQ8
M_B_DQ38 <3>
M_B_DQ33 <3>
M_B_DQ34 <3>
M_B_DQ36 <3>
M_B_DQ39 <3>
M_B_DQ37 <3>
M_B_DQ35 <3>
M_B_DQ32 <3>
M_B_DQ45 <3>
M_B_DQ46 <3>
M_B_DQ44 <3>
M_B_DQ42 <3>
M_B_DQ40 <3>
M_B_DQ47 <3>
M_B_DQ41 <3>
M_B_DQ43 <3>
M_B_DQS_DP5 <3>
M_B_DQS_DP4 <3>
M_B_DQS_DN5 <3>
M_B_DQS_DN4 <3>
DDR3_DRAMRST# <2,12,13,14>
R323
240R/F_2
GND
GND
GND
+0.65V_DDR_VTT
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
M_B_BS0
M_B_BS1
M_B_BS2
M_B_DIM0_CS0_N
M_B_DIM0_CLK_DDR0_DP
M_B_DIM0_CLK_DDR0_DN
M_B_DIM0_CKE0
M_B_CAS_N
M_B_RAS_N
M_B_WE_N
M_B_ODT
+1.35VSUS
C282 4.7UF_4
C295 0.1uF_2
C301 0.1uF_2
C27 0.1uF_2
C38 0.1uF_2
+1.35VSUS
C76 4.7UF_4
C80 0.1uF_2
C49 0.1uF_2
C72 0.1uF_2
C54 0.1uF_2
C331 0.1uF_2
C61 0.1uF_2
SMDDR_VREF_DQ1_M1
+SMDDR_VREF_DIMM
M_B_ODT M_B_ODT
R72
240R/F_2
U3
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
T7
A14
M7
A15
M2
BA0
N8
BA1
M3
BA2
L2
CS#
J7
CK
K7
CK#
K9
CKE
K3
CAS#
J3
RAS#
L3
WE#
K1
ODT
B2
VDD#B2
D9
VDD#D9
G7
VDD#G7
K2
VDD#K2
K8
VDD#K8
N1
VDD#N1
N9
VDD#N9
R1
VDD#R1
R9
VDD#R9
A1
VDDQ#A1
A8
VDDQ#A8
C1
VDDQ#C1
C9
VDDQ#C9
D2
VDDQ#D2
E9
VDDQ#E9
F1
VDDQ#F1
H2
VDDQ#H2
H9
VDDQ#H9
H1
VREFDQ
M8
VREFCA
J1
ODT1
L1
CS1#
J9
CKE1
L9
ZQ1
Memory-Down _DDRL3
96-BALL
SDRAM DDR3
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
DQSU
DQSL
DQSU#
DQSL#
DMU
DML
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
RESET#
ZQ
E3
F7
F2
F8
H3
H8
G2
H7
D7
C3
C8
C2
A7
A2
B8
A3
C7
M_B_DQS_DP7
F3
M_B_DQS_DP6
B7
M_B_DQS_DN7
G3
M_B_DQS_DN6
D3
E7
GND
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
T2
DDR3_DRAMRST#
L8
GND
M_B_DQ53
M_B_DQ48
M_B_DQ49
M_B_DQ54
M_B_DQ51
M_B_DQ50
M_B_DQ52
M_B_DQ55
M_B_DQ63
M_B_DQ61
M_B_DQ60
M_B_DQ62
M_B_DQ59
M_B_DQ57
M_B_DQ58
M_B_DQ56
R60
240R/F_2
M_B_DQ53 <3>
M_B_DQ48 <3>
M_B_DQ49 <3>
M_B_DQ54 <3>
M_B_DQ51 <3>
M_B_DQ50 <3>
M_B_DQ52 <3>
M_B_DQ55 <3>
M_B_DQ63 <3>
M_B_DQ61 <3>
M_B_DQ60 <3>
M_B_DQ62 <3>
M_B_DQ59 <3>
M_B_DQ57 <3>
M_B_DQ58 <3>
M_B_DQ56 <3>
M_B_DQS_DP7 <3>
M_B_DQS_DP6 <3>
M_B_DQS_DN7 <3>
M_B_DQS_DN6 <3>
15
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
M_B_BS0
M_B_BS1
M_B_BS2
M_B_DIM0_CS0_N
A A
+1.35VSUS <2,4,12,13,14,25,33>
+0.65V_DDR_VTT <13,33>
5
4
M_B_DIM0_CS1_N <3,14>
M_B_DIM0_CKE1 <3,14>
M_B_DIM0_CLK_DDR0_DP
M_B_DIM0_CLK_DDR0_DN
M_B_DIM0_CKE0
M_B_CAS_N
M_B_RAS_N
M_B_WE_N
M_B_DIM0_CS1_N
M_B_DIM0_CKE1
M_B_ODT
R319 34.8/F_4
R313 34.8/F_4
R318 34.8/F_4
R20 34.8/F_4
R11 34.8/F_4
R12 34.8/F_4
R316 34.8/F_4
R317 34.8/F_4
R16 34.8/F_4
R15 34.8/F_4
R18 34.8/F_4
R314 34.8/F_4
R312 34.8/F_4
R14 34.8/F_4
R315 34.8/F_4
R310 34.8/F_4
R13 34.8/F_4
R19 34.8/F_4
R311 34.8/F_4
R8 34.8/F_4
R309 34.8/F_4
R9 34.8/F_4
R17 34.8/F_4
R7 34.8/F_4
R10 34.8/F_4
R320 34.8/F_4
R321 26.1/F_4
R322 26.1/F_4
R77 30/F_4
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
3
+1.35VSUS
+0.65V_DDR_VTT
C267 1U/6.3V_4
C11 1U/6.3V_4
C272 1U/6.3V_4
C10 1U/6.3V_4
C12 4.7UF_4
PROJECT : Nobel
PROJECT : Nobel
PROJECT : Nobel
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5/RD4
NB5/RD4
NB5/RD4
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Intel Shark Bay ULT
Intel Shark Bay ULT
Intel Shark Bay ULT
Gyro, VIBRATOR,G-Sensor
Gyro, VIBRATOR,G-Sensor
Gyro, VIBRATOR,G-Sensor
1
1A
1A
15 36 Thursday, September 12, 2013
15 36 Thursday, September 12, 2013
15 36 Thursday, September 12, 2013
1A
5
RTD2316_LVDS_3V
+3V
C346
D D
PCH_DISP_ON <6>
PCH_eDP_BLON <6>
C C
INT_eDP_TXP0 <2>
INT_eDP_TXN0 <2>
INT_eDP_TXP1 <2>
INT_eDP_TXN1 <2>
INT_eDP_AUXP <2>
INT_eDP_AUXN <2>
B B
EDIDDATA
EDIDCLK
SMB_RUN_DAT <8,11>
SMB_RUN_CLK <8,11>
R63 4.7K/J_2
R65 4.7K/J_2
*1U/6.3V_4
Can't change to short
EMU_LID <23,29>
RTD2316_BL_EN
C327 0.1U/10V/X7R_4
C328 0.1U/10V/X7R_4
C329 0.1U/10V/X7R_4
C330 0.1U/10V/X7R_4
C326 0.1U/10V/X7R_4
C325 0.1U/10V/X7R_4
+3.3V_2136_D
PV
R745 *0R_2
R746 *0R_2
R352
*100K/F_2
R274 0_4
MBDATA2 <2,8,23>
U20
5
IN
4
IN
3
ON/OFF
*IC(5P) G5243AT11U
R535 *1K/F_2
R61 0R_2
EDP_TXP0_R
EDP_TXN0_R
EDP_TXP1_R
EDP_TXN1_R
EDP_AUXP_R
EDP_AUXN_R
+3V
GND
MBDATA2_2136
MBCLK2_2136
MBCLK2 <2,8,23>
R59 *0_6/S
1
OUT
2
GND
R82 *10K/F_4
R83 *10K/F_4
R76 4.7K_4
R71 4.7K_4
GND
R344 100k/F_4
+LCDVCC
L18
C243 22P/50V_4
R617
10K/F_4
R533
100K/F_2
GND
EDP_HPD_L <6>
PV
RTD2136R Power Up Sequence
A A
EDDID EEPROM VCC
DP2LVDS VCC
HPD
<=100ms
5
4
+3VLCD_CON
*TI160808U600
BLON_CON
GND
+3V
SCLK_2136
SDAT_2136
For RTD2316R only
R75 *100K/F_2
EDP_HPD_L
RTD2136_TESTMODE
EDP_TXP0_R
EDP_TXN0_R
EDP_TXP1_R
EDP_TXN1_R
EDIDDATA
EDIDCLK
SDAT_2136
SCLK_2136
4
MBCLK2_2136
MBDATA2_2136
R737 0R_2
R738 0R_2
R354
100K/F_4
GND
C354 10U/6.3V_6
+3VREG
EDP_AUXN_R
EDP_AUXP_R
GND
IC
GND VIA*9
1
2
3
4
7
8
9
10
13
14
45
46
47
48
49
U14
DP_HPD
TESTMODE
AUX-CH_N
AUX-CH_P
LANE0P
LANE0N
LANE1P
LANE1N
CIICSCL1
CIICSDA1
MIICSDA1
MIICSCL1
MIICSDA0
MIICSCL0
GND
RTD2316_PWMOUT
Hall sensor
PV
C266
2.2U/6.3V_4
+1.2V_2136
+SWR_LX
17
11
SWR_LX
RTD2136R
DP_GND
DP_REXT
GND
6
12
16
RTD2136_AGND
R64
*0_4/S
RTD2136_DPREXT
GND
+3V
2
1
OUT
VDD
S
N
GND
3
+3.3V_2136_A
+3.3V_2136_D
15
5
18
43
VCCK
DP_V33
DP_V12
SWR_VCCK
PWMOUT19PANEL_VCC20PWMIN
21
Pine 20: keep 80 Mile Trace
PCH_DPST_PWM
RTD2316_LVDS_3V
RTD2316_PWMOUT
3
R353 *10K/F_4
R351 *0R_2/S
HE1
YB8251ST23
Close to Pin5
GND
22
GND
42
TXO0-
41
PVCC
TXO0+
40
TXO1-
39
SWR_VDD
TXO1+
38
TXO2-
37
TXO2+
36
TXOC-
35
TXOC+
34
TXO3-
33
TXO3+
32
TXE0-
31
TXE0+
30
TXE1-
29
TXE1+
28
TXE2-
27
TXE2+
26
TXEC-
25
TXEC+
24
TXE3-
23
TXE3+
44
BL_EN
VADJ1
R350
100K/F_2
LID_EC# <23>
C265
*2.2U/6.3V_4
C64
0.1U/10V_2
Pine 18: keep 80 Mile Trace
C50
0.1U/10V_2
R330 100K/F_2
TXOOUT0TXOOUT0+
TXOOUT1TXOOUT1+
TXOOUT2TXOOUT2+
TXOCLKOUTTXOCLKOUT+
TXOOUT3TXOOUT3+
RTD2316_BL_EN
PCH_DPST_PWM <6>
Close to Pin18,Pin22
C58
0.1U/10V_2
+3VLCD_CON
1 2
C357
0.047U/10V_4
R137 *0_6/S
+3V
C103
1000P/50V_4
+VIN
PBY160808T-600Y-N(60,3A)
Need use CV-4709MN00 for Vendor suggestion
slave address 0x94 & 0x96 & 0x6A
R81
12K/F_4
3
2
EDID_PWR
EDIDCLK
EDIDDATA
TXOOUT0TXOOUT0+
TXOOUT1TXOOUT1+
TXOOUT2TXOOUT2+
TXOCLKOUTTXOCLKOUT+
TXOOUT3TXOOUT3+
VADJ1
BLON_CON
R345 0_6
R346 0_6
+3.3V_2136_A +3V
L2
C67
10U/6.3V_6
PV
+SWR_LX +1.2V_2136
keep 80 Mile Trace
L1
2
PBY160808T-600Y-N(60,3A)
USING 60R 1A
1
CN10
1
2
3
4
34
GND
GND
GND
GND
GND
GND
GND
GND
GND
BACL_PWR
C344
10U/25V_8
GND
C63
0.1U/10V/X7R_4
GND
L17
4.7UH_1A
+3.3V_2136_D +3V
C57
10U/6.3V_6
PV
+3V <2,6,7,8,9,10,11,17,18,19,20,21,23,24,25,26,27,28,31,34,35>
+VIN <30,31,33,34,35>
+3VREG <7,23,27,30,31,35>
NB5/RD4
NB5/RD4
NB5/RD4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
33
29
303132
lvds-50473-0300m-001-30p-l
LVDS CONN
DFHS30FR059
GND
Close to Pin11
C319
22U/6.3VT_8
C321
0.1U/10V/X7R_4
Close to Pin43
GND
C59
0.1U/10V/X7R_4
GND
PROJECT : Nobel
PROJECT : Nobel
PROJECT : Nobel
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet
C56
22U/6.3VT_8
Intel Shark Bay ULT
Intel Shark Bay ULT
Intel Shark Bay ULT
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
LCD
LCD
LCD
1
16
C53
0.1U/10V/X7R_4
C320
0.1U/10V/X7R_4
of
16 36 Thursday, September 12, 2013
16 36 Thursday, September 12, 2013
16 36 Thursday, September 12, 2013
1A
1A
1A
5
4
3
2
1
SSD (NGFF Connector)
D D
+3V
C6
C7
0.1U/10V_2
C C
DEVSLP1 <9>
C40
10U/6.3VS_6
B B
C9
0.1U/10V_2
Pin 10 Status indicators via LED devices that will be
provided by the system Active Low. A pulled-up LED
with series current limiting resistor should allow for
9mA when On
C39
10U/6.3VS_6
0.1U/10V_2
PV
+3V
C37
0.1U/10V_2
R57 0_4
+3V
R641
10K_2
+5VS5
PCH_SUSCLK <6,23>
R58 *0_4
Active high signal used by the platform
to put the SSD in Sleep mode
C8
0.1U/10V_2
CN21
AS0BC56-S15BP-7H
74
3.3Vaux
72
3.3Vaux
70
3.3Vaux
68
NC
66
SIM Detect
64
Reserved
62
Reserved
60
Reserved
58
NC
56
NC
54
NC
52
NC
50
NC
48
Reserver GNSS
46
Reserver GNSS
44
Reserver GNSS
42
Reserver GNSS
40
Reserver GNSS
38
NC
36
UIM-PWR
34
UIM-DATA
32
UIM-CLK
30
UIM-Reset
28
Reserved
26
Reserved
24
Reserved
22
Reserved
20
Reserved
18
Key
16
Key
14
Key
12
Key
10
LED#1
8
W_DISABLE#
6
Card_Power_OFF#
4
3.3Vaux
2
3.3Vaux
NGFF
SATA_A+_PETP0
SATA_A-_PETN0
SATA_B-_PERP0
SATA_B+_PERN0
GND
76
GPS_DISABLE#
DFHS75FR036
ngff-as0bc56-s15bb-7h-75p-kb
75
GND
73
GND
71
GND
69
NC
67
Reset#
65
Reserved
63
Reserved
61
ANTCTL1
59
ANTCTL0
57
GND
55
NC
53
NC
51
GND
49
47
45
GND
43
41
39
GND
37
NC
35
NC
33
GND
31
NC
29
NC
27
GND
25
BodySAR_N
23
21
GND
19
Key
17
Key
15
Key
13
Key
11
GND
9
USB_D-
7
USB_D+
5
GND
3
GND
1
GND
GND
77
SATA_TXP0_C
SATA_TXN0_C
SATA_RXN0_C
SATA_RXP0_C
SATA for mSATA
Place Cap close to
conn within 100mils
C44 0.01U/16V_2
C43 0.01U/16V_2
C477 0.01U/16V_2
C478 0.01U/16V_2
SATA_TXP0 <7>
SATA_TXN0 <7>
SATA_RXN0 <7>
SATA_RXP0 <7>
17
+3V <2,6,7,8,9,10,11,16,18,19,20,21,23,24,25,26,27,28,31,34,35>
A A
PROJECT : Nobel
PROJECT : Nobel
PROJECT : Nobel
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5/RD4
NB5/RD4
NB5/RD4
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet
Intel Shark Bay ULT
Intel Shark Bay ULT
Intel Shark Bay ULT
SSD(NGFF)
SSD(NGFF)
SSD(NGFF)
1
1A
1A
1A
of
17 36 Thursday, September 12, 2013
17 36 Thursday, September 12, 2013
17 36 Thursday, September 12, 2013
5
Front Camera Module Connector
U11
FCAM_MCLK
I2C_SCL_FCAM
I2C_SDA_FCAM
MCSI_F_CLK_DP
MCSI_F_CLK_DN
D D
CAM_2M_LED# <27>
C C
MCSI_F_DATA_DP
MCSI_F_DATA_DN
FCAM_RST
FCAM_PWR_ON
Serial_SCK_F
Serial_SO_F
Serial_CEb_F
Serial_SI_F
CAM_2M_LED#
GND
20
XMCLK
19
XSCL
16
XSDA
11
XRGB0/XMCP
12
XRGB1/XMCN
13
XRGB2/XMDP
14
XRGB3/XMDN
17
XRGB4
18
XRGB5
21
XGPIO8
22
XGPIO9
25
XESK
27
XSO
28
XCEB
26
XSI
29
XCGPIO0
34
XGPIO0
33
XGPIO1
32
XGPIO2
31
XGPIO3
41
GND PAD
SPCA2095
AL002095000
qfn40-6x4-4-41p
XTESTMODE
UVDD
UVSS
XDP
XDM
XREXT
XPRSTNN
LDO331
LVSS
LDO12O
PSW12O
LDO18O
LDO28O
AVSS
VCP_P
VCP_N
OVDD
SVDD
DVDD
DVSS
7
10
9
8
6
36
35
38
5
2
3
4
37
1
39
40
C153 0.1uF/10V_2
30
15
C206 0.1uF/10V_2
23
24
4
C151 2.2U/6.3V_4
GND
UVDD_F
R223 *0_4/S
USBP2+
USBP2REXT_F
R224 12K_4
C134 1U/6.3V_4
RSTNN_F
R194 10K_2
GND +3V
GND
C180 4.7UF_4
+3V
C135 2.2U/6.3V_4
+LDO12O_F
+LDO18O_F
GND
GND
+3V
GND
GND
R381 100K_2
GND
+3V
GND
GND
UVDD_F
C152 1U/6.3V_4
+LDO12O_F
I2C_SDA_FCAM
I2C_SCL_FCAM
Serial_CEb_F
Serial_SO_F
Serial_WP_F
1
2
4 3
L8
*WCM2012-90
GND
C145 4.7UF_4
R249 4.7K/J_2
R250 4.7K/J_2
U22
1
CE
2
SO
HOLD#
3
WP#
4
VSS
EN25F05-100GIP
AKE32ZN0Q00
VDD
SCK
3
C231 *2.2U/6.3V_4
C223 2.2U/6.3V_4
R267 2.2_6
C217 2.2U/6.3V_4
R261 *0_4/S
L10 *0R_2/S
GND
GND
USBP2+ <8>
USBP2- <8>
+LDO28O_F
+LDO28O_F
+LDO18O_F GND
15 mil
15 mil
SGND_F
GND
7/23 change footprint
+LDO18O_F
8
7
Serial_HOLD_F
6
Serial_SCK_F
5
Serial_SI_F
SI
GND
+3V
C359
0.1uF/10V_2
2
50mA
+LDO28O_F_L
70mA
+LDO18O_F_L
C214 *22P/50V_4
FCAM_RST
I2C_SDA_FCAM
I2C_SCL_FCAM
FCAM_PWR_ON
MCSI_F_CLK_DP
MCSI_F_CLK_DN
MCSI_F_DATA_DP
MCSI_F_DATA_DN
R266 0_4
SGND_F
WR Address:0x6C
RD Address:0x6D
202122
19
18
17
FCAM_MCLK_L FCAM_MCLK
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
CN14
88511-2001-20p-l
DFFC20FR043
Front CONN
GND GND
R355 *0_4/S
SGND_F GND
1
18
GND
+LDO12O_R
+LDO18O_R
GND
GND
+3V
GND
GND
R138 4.7K/J_2
R141 4.7K/J_2
U23
1
CE
2
SO
3
WP#
4
VSS
EN25F05-100GIP
AKE34FN0Z00
4
+3V
GND
GND
GND
C120 2.2U/6.3V_4
C123 1U/6.3V_4
+LDO12O_R
8
VDD
7
HOLD#
6
SCK
5
SI
2
L5
*WCM2012-90
UVDD_R
C119 4.7UF_4
+LDO18O_R
Serial_HOLD_R
Serial_SCK_R
Serial_SI_R
GND
GND
1
4 3
GND
+3V
C358
0.1uF/10V_2
+LDO28O_R
USBP7+ <8>
USBP7- <8>
SGND_R
15 mil
+LDO28O_R
mil
15
+LDO18O_R
GND
del U7,U12
3
Rear Camera Module Connector
U8
XPRSTNN
LDO331
LDO12O
PSW12O
LDO18O
LDO28O
+3V
UVDD
UVSS
XREXT
LVSS
AVSS
VCP_P
VCP_N
OVDD
SVDD
DVDD
DVSS
7
10
9
XDP
8
XDM
6
36
35
38
5
2
3
4
37
1
39
40
30
15
23
24
R380 100K_2
GND
RCAM_MCLK
I2C_SCL_RCAM
I2C_SDA_RCAM
MCSI_R_CLK_DP +LDO18O_R_L
MCSI_R_CLK_DN
MCSI_R_DATA_DP
B B
A A
MCSI_R_DATA_DN
RCAM_RST
RCAM_PWR_ON
Serial_SCK_R
Serial_SO_R
Serial_CEb_R
Serial_SI_R
CAM_2M_LED#
GND
+3V <2,6,7,8,9,10,11,16,17,19,20,21,23,24,25,26,27,28,31,34,35>
20
XMCLK
19
XSCL
16
XSDA
11
XRGB0/XMCP
12
XRGB1/XMCN
13
XRGB2/XMDP
14
XRGB3/XMDN
17
XRGB4
18
XRGB5
21
XGPIO8
22
XGPIO9
25
XESK
27
XSO
28
XCEB
26
XSI
29
XCGPIO0
34
XGPIO0
33
XGPIO1
32
XGPIO2
31
XGPIO3
41
GND PAD
SPCA2095
AL002095000
qfn40-6x4-4-41p
5
XTESTMODE
C133 2.2U/6.3V_4
GND
UVDD_R
R193 *0_4/S
USBP7+
USBP7REXT_R
R191 12K_4
C116 1U/6.3V_4
RSTNN_R
R158 10K_2
GND +3V
C107 0.1uF/10V_2
C109 0.1uF/10V_2
C102 4.7UF_4
I2C_SDA_RCAM
I2C_SCL_RCAM
Serial_CEb_R
Serial_SO_R
Serial_WP_R
C99 *2.2U/6.3V_4
C100 2.2U/6.3V_4
R131 2.2_6
C93 2.2U/6.3V_4
GND
+LDO28O_R_L
R118 *0_4/S
L3 *0R_2/S
C101 *22P/50V_4
70mA
RCAM_RST
I2C_SDA_RCAM
I2C_SCL_RCAM
RCAM_PWR_ON
MCSI_R_CLK_DP
MCSI_R_CLK_DN
MCSI_R_DATA_DP
MCSI_R_DATA_DN
7/23 change footprint
2
SGND_R
50mA
RCAM_MCLK_L RCAM_MCLK
CN11
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20 21
50525-02001-001-20p-l
DFFC20FR063
Rear CONN
NB5/RD4
NB5/RD4
NB5/RD4
SGND_R GND
22
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet
WR Address:0x6C
RD Address:0x6D
GND GND
PROJECT : Nobel
PROJECT : Nobel
PROJECT : Nobel
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Intel Shark Bay ULT
Intel Shark Bay ULT
Intel Shark Bay ULT
Front Camera
Front Camera
Front Camera
1
of
18 36 Thursday, September 12, 2013
18 36 Thursday, September 12, 2013
18 36 Thursday, September 12, 2013
1A
1A
1A
5
4
3
2
1
MircoSD
D D
C C
PCIE_CLKREQ_CR# <8>
Zdiff = 100 ohm
CLK_PCIE_CRP <8>
CLK_PCIE_CRN <8>
PCIE_RXP2_CARD <8>
PCIE_RXN2_CARD <8>
RTS5237_AV12 RTS5237_DV12S
PCIE_TXP2_CARD <8>
PCIE_TXN2_CARD <8>
R548 *0_4/S
R545 *0_4/S
PLTRST# <6,11,20,23,25,28>
C441 0.1U/10V_4
C440 0.1U/10V_4
PCIE_CLKREQ_CR#_R PCIE_CLKREQ_CR#
PCIE_WAKE# <6,20,23>
PLTRST#
PCIE_CLKREQ_CR#_R
PCIE_TXP2_CARD
PCIE_TXN2_CARD
CLK_PCIE_CRP
CLK_PCIE_CRN
PCIE_RXP2_CARD_C
PCIE_RXN2_CARD_C
Please add 9 GND VIAs
connection with thermal PAD
R543 need colse to Chip
R543 6.2K/F_4
+3V
C447
10U/6.3V_6
R546 *0_4/S
U34
1
PERST#
2
CLKREQ#
3
HSIP
4
HSIN
5
REFCLKP
6
REFCLKN
7
HSOP
8
HSON
33
GND
RTS5237_RREF
1 2
C442 *100P/50V_4
C444 0.1U/10V_4
C445
0.1U/10V_4
R547
*0_4/S
SD_CD#
RTS5237_GPIO
RTS5237_3Vaux
31
30
27
32
29
28
SP7
GPIO
WAKE#
SD_CD#
MS_INS#
RTS5237
RREF93V3_IN11DV12S14SP115SP2
AV1210CARD_3V312NC
13
RTS5237_DV12S
RTS5237_AV12
+3VCARD
R550 10K_4
26
NC25NC
3V3aux
DV33_18
RTS5237
16
SD_D0_R
SD_D1_R
C450
0.1U/10V_4
+3V
C446 0.1U/10V_4
C448
24
NC
23
NC
22
NC
21
SP6
20
SP5
19
SP4
18
17
SP3
R558 *0_6/S
R555 *0_4/S
R559 *0_4/S
+3V
4.7U/6.3V_6
Close to chip pin
SD_D2_R
R557 *0_4/S
SD_D3_R
R561 *0_4/S
SD_CMD_R
R560 *0_4/S
DV33_18
R556 *0_4/S
SD_D0
SD_D1
Close to chip pin
C453
4.7U/6.3V_6
SD_D2
SD_D3
SD_CMD
SD_CLK SD_CLK_R
C451 1U/10V_4
C454 *5.6P/16V_4
19
PV
B B
A A
+3V <2,6,7,8,9,10,11,16,17,18,20,21,23,24,25,26,27,28,31,34,35>
5
R291 / R282 change to un-stuff , fix to detect card issue.
+3VCARD
R282
R291
*40.2K/F_4
*10K/F_4
SD_D0
SD_D1
SD_D2
SD_D3
4
SD_CMD
SD_CLK
SD_CD#
R289 *0_4/S
R290 *0_4/S
R285 *0_4/S
R287 *0_4/S
R284 *0_4/S
R288 *0_4/S
C259
10U/6.3V_6
PV
GND GND
SD_D0_CONN
SD_D1_CONN
SD_D2_CONN
SD_D3_CONN
SD_CMD_CONN
SD_CLK_CONN
1 2
1 2
1 2
1 2
1 2
T6
T5
T2
3
1 2
T3
T1
T4
1 2
T7
CN17
4
VDD
7
DAT0
8
DAT1
1
DAT2
2
CD/DAT3
3
CMD
5
CLK
9
CD
6
VSS
10
GND1
.
Micro SD 4-bit
DFHD10MR132
sdcard-ch1s-151-h-n-10p
C262
0.1u_4
GND2
GND3
GND4
GND5
+3VCARD
11
12
13
14
GND GND GND GND GND GND GND GND GND
PROJECT : Nobel
PROJECT : Nobel
PROJECT : Nobel
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Block Diagram
Block Diagram
NB5/RD4
NB5/RD4
2
NB5/RD4
Block Diagram
Date: Sheet of
Date: Sheet of
Date: Sheet
Intel Shark Bay ULT
Intel Shark Bay ULT
Intel Shark Bay ULT
of
19 36 Thursday, September 12, 2013
19 36 Thursday, September 12, 2013
1
19 36 Thursday, September 12, 2013
1A
1A
1A
5
4
3
2
1
WLAN
+3V_WLAN_P
D D
C C
BT_OFF <9>
R529 *0_6
+5V
EC_DEBUG <23>
CLK_24M_DEBUG <8>
PCIE_TXP3_WLAN <8>
PCIE_TXN3_WLAN <8>
PCIE_RXP3_WLAN <8>
PCIE_RXN3_WLAN <8>
CLK_PCIE_WLANP <8>
CLK_PCIE_WLANN <8>
PCIE_CLKREQ_WLAN# <8>
BT_COMBO_EN# <9>
R532
10K_2
2
1
Q23
3
2N7002E
INT_BT_OFF#
R505 *0_2
R552 *0_2/S
R553 *0_2
MINICAR_PME# LFRAME#
PLTRST#
REQ_WLAN#
28
48
51
49
47
45
19
17
33
31
25
23
13
11
43
37
35
29
27
21
15
minipci-mpcet-ssa10-ts17-52p
CN16
6
+1.5V
+1.5V
+1.5V
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
PETp0
PETn0
PERp0
PERn0
REFCLK+
REFCLK-
7
CLKREQ#
5
BT_CHCLK
3
BT_DATA
1
WAKE#
Reserved
Reserved
GND
GND
GND
GND
GND
MINI PCIE H=4.0
DFHS52FR160
H=4.0
LED_WLAN#
LED_WPAN#
LED_WW AN#
SMB_DATA
W_DISABLE#
56
+3.3V
+3.3V
+3.3Vaux
Reserved
Reserved
USB_D+
USB_D-
SMB_CLK
PERST#
Reserved
Reserved
Reserved
Reserved
Reserved
GND
GND
GND
GND
GND
GND
GND
PAD54PAD53HOLE55HOLE
+3V_WLAN_P +1.5V
ph
52
2
24
41
39
44
WLAN_LED#
46
42
38
36
32
30
22
PLTRST#
20
INT_RF_OFF#
16
LAD0
14
LAD1
12
LAD2
10
LAD3
8
50
40
34
26
18
4
9
C222
0.01U/16V_2
R269 4.7K_2
R268 0_2
LAD0 <7,23,25>
LAD1 <7,23,25>
LAD2 <7,23,25>
LAD3 <7,23,25>
LFRAME# <7,23,25>
USB_BT_P <28>
USB_BT_N <28>
PLTRST# <6,11,19,23,25,28>
+1.5V +3V_WLAN_P
C264
0.1U/10V_2
+3V_WLAN_P
C255
10U/6.3VS_6
RF_LINK# <23>
R549 10K_2
Q24
2N7002E
3
2
C257
0.1U/10V_2
Mini Card
WLAN/BT(Option)
1
+3V_WLAN_P
RF_OFF <9>
C263
0.1U/10V_2
C219
0.1U/10V_2
C424
10U/6.3VS_6
20
7/23 change footprint
PV
+3VS5 +3VPCU
+3V_WLAN_P
+3V_WLAN_P
R286
10K_2
B B
EC_AOCS# <23>
For EMI Suggestion
CLK_24M_DEBUG
R544 *0_4
C443 *33P/25V_2
2
Q13
R283 200K_4
3
2N7002E
1
C236
*0.1U/10V_2
2
C8538
0.022U/25V_4
1
3
+3V_AOCS
Q10
ME2303T1
24mil
R279 *0_8
C244
*0.1U/10V_2
2
1 3
+3V_WLAN_P
2
1 3
MINICAR_PME#
R551 10K/F_2
MINICAR_PME#
+3V
PCIE_WAKE# <6,19,23>
EC_PCIE_WAKE# <23>
Q25 *DDTC144EUA-7-F
Q14 DDTC144EUA-7-F
Support Wake Function(Reserve)
+3VPCU <4,23,26,27,35>
+3VS5 <6,9,10,11,26,27,29,30,35>
A A
+3VREG <7,16,23,27,30,31,35>
+1.5V <10,21,32>
+3V <2,6,7,8,9,10,11,16,17,18,19,21,23,24,25,26,27,28,31,34,35>
+5V <6,21,22,29,35>
5
PROJECT : Nobel
PROJECT : Nobel
PROJECT : Nobel
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5/RD4
NB5/RD4
NB5/RD4
Date: Sheet of
Date: Sheet of
4
3
2
Date: Sheet of
Intel Shark Bay ULT
Intel Shark Bay ULT
Intel Shark Bay ULT
WiFi +BT module (T77H360)
WiFi +BT module (T77H360)
WiFi +BT module (T77H360)
1
1A
1A
20 36 Thursday, September 12, 2013
20 36 Thursday, September 12, 2013
20 36 Thursday, September 12, 2013
1A
A
Audio Codec
+1.5V
+3V
for intel HSW ULT
L20 *0_6
L21 0_6
>20mils trace
+3V_DVDD-IO
C401
0.1U/10V_4
>20mils trace
+3V_DVDD
+3V
C439 *1000P/50V_4
C253 *1000P/50V_4
C252 *1000P/50V_4
C170 *1000P/50V_4
1 1
AGND
CPVSS
ACZ_SDIN0
ACZ_SDOUT_AUDIO
ACZ_SYNC_AUDIO
HD_BCLK
C377 *1000P/50V_4
AGND
Close to CODEC
R263 *0_8/S
Close to CODEC
R253 *0_8/S
VOLMUTE# <23>
C404 *33P/25V_2
C397 *10P/25V_2
C409 *10P/25V_2
C399 *33P/25V_2
L22
HCB1608KF-181T15_6
ACZ_SDOUT_AUDIO <7>
ACZ_SYNC_AUDIO <7>
ACZ_RST#_AUDIO <7>
for intel HSW ULT
BA039040000
BA039040020
ACZ_RST#_AUDIO
BIT_CLK_AUDIO <7>
MUTE_LED_CNTL <23>
FOR EMI
A
Close to PIN9
C408
1U/6.3V_2
ACZ_SDIN0 <7>
TO Digital MIC
DIGITAL_CLK <27>
DIGITAL_D1 <27>
+1.5V
+3V_DVDD
R496
*2.2K_2
2
Q20
*MMBT3904-7-F
1 3
PD#
2 1
R453
10K_2
R457
*10K_2
C407
0.1U/10V_2
C391 10P/25V_2
R458 100/F_4
R479 *0_2/S
R456
10K/F_2
2.2U/6.3V_6
B
Place near Pin6
R486 *0_2/S
Place near Pin8
R499 33_2
PD# <22>
C400
CPVSS
B
C383 10U/6.3V_6
+3V_DVDD-IO
+3V_DVDD
HD_BCLK
ACZ_SDOUT_AUDIO
HD_SDIN0
ACZ_SYNC_AUDIO
DMIC_CLK_R
DMIC0
C392 10P/25V_2
PD#
C396
2.2U/6.3V_6
CPVSS
Speaker 4 ohm: 40mils
R_SPK+
R_SPK-
L_SPKL_SPK+
C368
C369
2200P/50V_4
C367
2200P/50V_4
C373
2200P/50V_4
2200P/50V_4
PLACE SNUBBER COMPONENTS
CLOSE TO CODEC!
U30
1
DVDD_LV
7
DVDD_IO
9
DVDD
6
HDA_BCLK
5
HDA_DOUT
8
HDA_DIN
10
HDA_SYNC
11
HDA_RST#
2
DMIC_CLK/GPIO1
3
DMIC0/GPIO2
4
DMIC1/GPIO0
39
EAPD
40
SPDIF/GPIO3
41
DAP
25
VPos
26
VNeg
R438
R439
3.3/F_4
R440
3.3/F_4
R445
3.3/F_4
3.3/F_4
C
>20mils trace
+3V_AVDD_2
C385
1U/6.3V_2
Close to PIN30
Analog Digital
CPVSS
PVDD1
PVDD2
PVSS1
PVSS2
PORTD_+L
PORTD_-L
PORTD_+R
PORTD_-R
PCBEEP
SENSE_A
PORTC_L
PORTC_R
VREFOUT_C
PORTB_L
PORTB_R
VREFOUT_B
CAP2
VREFFILT
AVDD1
ClassG Area
AVDD2
PORTA_L
FCap2
27
CAP-
C393
2.2U/6.3V_6
FCap1
28
CAP+
CPVSS
PORTA_R
CPVreg
92HD95 40_QFN
29
PV
C386
10U/6.3V_6
Speak conn.
INT SPEAKER CONN
1
5
2
5
6
3
6
4
CN12
DFHS04FR581
50208-00401-001-4p-l
C
L19 *0_6/S
C387
0.1U/10V_2
31
38
34
35
32
L_SPK+
33
L_SPK-
37
R_SPK+
36
R_SPK-
12
AMP_BEEP
13
SENSE_A_1
14
15
16
17
EXT_MIC_L1
18
EXT_MIC_R1
19
VREFOUT_C
21
20
22
+3V_AVDD
30
+3V_AVDD_2
23
HPOUT_L_C
24
HPOUT_R_C
+3V_AVDD
C402
1U/6.3V_2
D
C403
0.1U/10V_2
AGND
>20mils trace
Place near Pin22 Place near Pin30
+3V
Close to PIN22
>40mils trace
+5V_PVDD
C384
10U/6.3V_6
C388
0.1U/10V_2
Close to PIN31 Close to PIN38
+3V_AVDD
R524
2.49K/F_4
R508 39.2K/F_4
Close to codec
R498 *0_6/S
R482 *0_6/S
C417 2.2U/6.3V_6
R507 2.2K_2
C418
1U/6.3V_2
10U/6.3V_6
AGND AGND AGND
HPOUT_L
HPOUT_R
trace >15mils trace
C419
C405
1U/6.3V_2
HPOUT_L <22>
HPOUT_R <22>
Space >35mils trace
C415
AMP_BEEP AMP_BEEP_R2 AMP_BEEP_L
Check layout
mount location
+1.5V <10,20,21,32>
+3V <2,6,7,8,9,10,11,16,17,18,19,20,21,23,24,25,26,27,28,31,34,35>
+5V <6,20,21,22,29,35>
0.1U/10V_2
+3V_AVDD
AGND
0.01U/25V_2
C435
2.2U/6.3V_6
D
C416
AGND
C422
0.1U/10V_2
L23 *0_6
C381
1U/6.3V_2
SENSE_A
R509 *0_2/S
check value
R525 100K/F_2
R511
10K_2
C437
1U/6.3V_2
E
+3V
21
+3V <2,6,7,8,9,10,11,16,17,18,19,20,21,23,24,25,26,27,28,31,34,35>
+5V <6,20,21,22,29,35>
+1.5V <10,20,21,32>
+3V_DVDD <22>
SI 2/25: add R465 for IDT recommend
C382
0.1U/10V_2
EXT_MIC_L
COMPONENT CHOICES ON FERRITES:
Ferrites are only necessary when required by EMI.
The selection of ferrite beads can have a large effect on
THD+N, causing failures versus the WLP requirements.
At this time, IDT has verified three ferrite beads that will
meet the WLP performance requirements:
Murata: BLM18BD601SN1
TDK: MMZ1608Y601BTA
Taiyo Yuden: LF BK 1608HM601-T
U32
5
Vout
4
BYP
GND2EN
TLV70233DBVR
HPA01198DBVR
NB5/RD4
NB5/RD4
NB5/RD4
R428 *0_6/S
SENSE_A <22,26>
EXT_MIC_L <22,26>
+3V_AVDD
C429
0.1U/10V_2
2N7002
Q22
1
Vin
C421
3
0.1U/10V_2 D15 MEK500V-40
R539 10K_4
Vset=1.242V
PROJECT : Nobel
PROJECT : Nobel
PROJECT : Nobel
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Audio 92HD95/ Speaker
Audio 92HD95/ Speaker
Audio 92HD95/ Speaker
Date: Sheet of
Date: Sheet of
Date: Sheet of
+5V
R538
10K_2
3
2
ACZ_SPKR <9>
1
AGND
+5V
C434
0.047U/10V_4
Intel Shark Bay ULT
Intel Shark Bay ULT
Intel Shark Bay ULT
E
C420
1U/6.3V_2
+5V
21 36 Thursday, September 12, 2013
21 36 Thursday, September 12, 2013
21 36 Thursday, September 12, 2013
1A
1A
1A
5
4
3
2
1
Head Phone AMP
+5V <6,20,21,29,35>
+3V_DVDD <21>
22
+5V_AMP
C438 1U/25V_6
D D
Add 1uF caps for the
AC
coupling. (IDT
recommend)
HPOUT_L <21>
CPVSS
HPOUT_R <21>
C C
C413 1U/25V_8S
CPVSS
C410 1U/25V_8S
PD# <21>
HPOUT_L_1
C412 1U/10V_8S
C411 1U/10V_8S
HPOUT_R_1
U31
1
2
3
4
5
LEFTINMLLEFTINP+
GND
RIGHTINP+
RIGHTINM-
TEST7TEST8GND9GND
SD#
6
20
VDD
TPA6133
10
C423 1U/25V_6
19
18
CPP
GND
AGND21AGND22AGND23AGND24AGND
17
CPM
HPRIGHT
AGND AGND
AGND
16
CPVSS
HPLEFT
CPVSS
GND
VDD
AGND
AGND
AGND
AGND
AGND
25
HPA022642RTJR
15
14
13
12
11
30
29
28
27
26
TPA6133
HPA022642RTJR
+5V_AMP
C436 1U/25V_8S
LINEOUT_L
LINEOUT_R
+3V_DVDD
R541
2K/F_4
L24
BLM18PG181SN1D(180,1.5A)_6
AGND
LINEOUT_L <26>
LINEOUT_R <26>
R540
2K/F_4
+5V
+5V_AMP
AGND
C414
1U/10V_6
AGND
AGND
EMI
R446 *0_4
R542 *0_4
GND
GND
Audio combo Jack
C181
1000P/50V_4
C245 220P/50V_4
1
D9
1
B B
SENSE_A <21,26>
R234 30/F_4
R233 30/F_4
1 2
R272 *0_4/S
1 2
HPR_1 LINEOUT_R HPR_2
EXT_MIC_L <21,26>
L7
SBY100505T-121Y-N_120ohm/0.3A_4
SENSE_A_CON SENSE_A
L6
SBY100505T-121Y-N_120ohm/0.3A_4
EXT_MIC_L
HPL_2 HPL_1 LINEOUT_L
L14
SBY100505T-121Y-N_120ohm/0.3A_4
AGND
C178
1000P/50V_4
COMPONENT CHOICES ON FERRITES:
Ferrites are only necessary when required by EMI.
The selection of ferrite beads can have a large effect on
THD+N, causing failures versus the WLP requirements.
At this time, IDT has verified three ferrite beads that will
A A
5
meet the WLP performance requirements:
Murata: BLM18BD601SN1
TDK: MMZ1608Y601BTA
Taiyo Yuden: LF BK 1608HM601-T
4
3
2
*3301D-ESD
2
AGND
AGND AGND AGND
NORMAL OPEN
CN15
1
4
5
6
3
2
DFTJ06FR577
audio-313182-2-6p
PROJECT : Nobel
PROJECT : Nobel
PROJECT : Nobel
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
HP AMP/ Combo Jack
HP AMP/ Combo Jack
NB5/RD4
NB5/RD4
2
NB5/RD4
HP AMP/ Combo Jack
Date: Sheet of
Date: Sheet of
Date: Sheet
Intel Shark Bay ULT
Intel Shark Bay ULT
Intel Shark Bay ULT
of
22 36 Thursday, September 12, 2013
22 36 Thursday, September 12, 2013
1
22 36 Thursday, September 12, 2013
1A
1A
1A
1
SERIRQ <9,25>
LFRAME# <7,20,25>
LAD0 <7,20,25>
LAD1 <7,20,25>
LAD2 <7,20,25>
LAD3 <7,20,25>
SIO_EXT_SCI# <9>
EC_RCIN# <9>
PCH_VOL_DOWN# <8>
PCH_Home_Button# <9>
PCH_Power_Button# <8>
SATA0GP <7>
EC_BASE_EN <26,27>
PIRQD#_L <8>
VOL_Down# <27>
DPWROK_EC <6>
USBPW_ON <26>
MBATLED0 <26>
USB_CL_DET <26>
THRM_MOINTOR
THRM_MOINTOR1
CLK_24M_KBC <8>
PLTRST# <6,11,19,20,25,28>
CLKRUN# <6>
SIO_EXT_SCI#
R452 *0_4
RCIN#
TP88
TOUCH_PANEL_RST_EC#
EC_RTC_RST# <7>
TP84
TP83
TP82
TP81
SI ADD
TP_EC_RST <29>
TP112
R419 100K_2
PCH_VOL_UP# <8>
PCH_ROTATE# <8,9>
TP110
TP89
TP113
MUTE_LED_CNTL <21>
ECBASE_CLK <26>
ECBASE_DATA <26>
HOMEKEY_CLK <27>
HOMEKEY_DATA <27>
TP114
TP115
TP116
ACIN <31>
VOL_UP# <27>
SUSWARN#_EC <6>
RF_LINK# <20>
SLP_SUS#_EC <6>
GPIO33_EC <7>
TP117
SUSON <33>
MAINON <32,33,35>
SLP_SUS_ON <10>
S5_ON <30>
SYS_I
R157 0_4
R151 *0_4
THRM_ALERT_HW#1
0.1U/10V_2
1
A A
PCH_SLP_S0_N <6,11>
+3VPCU
Slate_EC_Reset# <26>
B B
VIBRATOR_OUT <9,27>
For EC on BASE
For Home Key
C C
THRM_MOINTOR1 <4>
New Thermal Protect
SENSOR_HUB_RST#_EC
D D
SERIRQ
LFRAME#
LAD0
LAD1
LAD2
LAD3
CLKRUN#
SLP_S0#_EC
3920_RST#
R386 *4.7K_2
PLATEFORM_DETECT
EC_HW_strap
Slate_EC_Reset#
EC_BASE_EN
R394 *0_2/S
MUTE_LED_CNTL
ECBASE_CLK
ECBASE_DATA
HOMEKEY_CLK
HOMEKEY_DATA
BIOS_RD#
BIOS_WR#
BIOS_CS#
ACIN
VOL_Down#
VOL_UP#
D5 0.1U/10V_2
EC_PECI_R
SUSON
MAINON
C370
0.1U/10V_2
1 2
C115
1 2
C371
4.7U/6.3V_6
C110
0.1U/10V_2
1 2
2
U24
3
SERIRQ
4
LFRAME
10
LAD0
8
LAD1
7
LAD2
5
LAD3
12
PCICLK
13
PCIRST/GPIO5
38
CLKRUN
20
SCI/GPIOE
1
GA20/GPIO0
2
KBRST/GPIO1
37
ECRST
55
KSI0/GPIO30
56
KSI1/GPIO31
57
KSI2/GPIO32
58
KSI3/GPIO33
59
KSI4/GPIO34
60
KSI5/GPIO35
61
KSI6/GPIO36
62
KSI7/GPIO37
39
KSO0/GPIO20
40
KSO1/GPIO21
41
KSO2/GPIO22
42
KSO3/GPIO23
43
KSO4/GPIO24
44
KSO5/GPIO25
45
KSO6/GPIO26
46
KSO7/GPIO27
47
KSO8/GPIO28
48
KSO9/GPIO29
49
KSO10/GPIO2A
50
KSO11/GPIO2B
51
KSO12/GPIO2C
52
KSO13/GPIO2D
53
KSO14/GPIO2E
54
KSO15/GPIO2F
81
KSO16/GPIO48
82
KSO17/GPIO49
83
PSCLK1/GPIO4A
84
PSDAT1/GPIO4B
85
PSCLK2/GPIO4C
86
PSDAT2/GPIO4D
87
PSCLK3/GPIO4E
88
PSDAT3/GPIO4F
119
RD/GPIO5B
120
WR/GPIO5C
128
SPICS/GPIO5A
89
SELIO/GPIO50
76
AD5/GPIO43
109
D0/GPXD0
110
D1/GPXD1
112
D2/GPXD2
114
D3/GPXD3
115
D4/GPXD4
116
D5/GPXD5
117
D6/GPXD6
118
D7/GPXD7
97
A0/GPXA0
98
A1/GPXA1
99
A2/GPXA2
100
A3/GPXA3
101
A4/GPXA4
102
A5/GPXA5
103
A6/GPXA6
104
A7/GPXA7
105
A8/GPXA8
106
A9/GPXA9
107
A10/GPXA10
108
A11/GPXA11
124
V18R
KB9010QF C4
lqfp128-16x16-4
Need Change New PN
2
AD6/CIR_RX/GPIO40
CRY2
FANPWM1/GPIO12
FANPWM2/GPIO13
FANFB1/GPIO14
FANFB2/GPIO15
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
AVCC
AD0/GPI38
AD1/GPI39
AD2/GPI3A
AD3/GPI3B
DA0/GPO3C
DA1/GPO3D
DA2/GPO3E
DA3/GPO3F
PWM1/GPIOF
PWM2/GPIO10
SCL1/GPIO44
SDA1/GPIO45
SCL2/GPIO46
SDA2/GPIO47
GPIO4
GPIO7
GPIO8
GPIOA
GPIOB
GPIOC
GPIOD
GPIO11
GPIO16
GPIO17
GPIO18
GPIO19
GPIO1A
AD7/GPIO41
AD4/GPIO42
GPIO52
GPIO53
GPIO54
GPIO55
GPIO56
GPIO57
GPIO58
GPIO59
GPIO5E
GPIO5D
GND1
GND2
GND3
GND4
GND5
AGND
R422 *0_4
R404
*100K_4
1 2
3
+3VPCU
C375 0.1U/10V_2
C389 0.1U/10V_2
C179 0.1U/10V_2
9
C189 0.1U/10V_2
22
C361 0.1U/10V_2
33
C376 0.1U/10V_2
96
C360 0.1U/10V_2
111
C374 0.1U/10V_2
125
C106 0.1U/10V_2
67
C105 0.1U/10V_2
63
TEMP_MBAT
64
AD_TYPE
65
AD_AIR
66
SYS_I
68
70
HOME_BUTTON_SLEEP_EC
71
72
PCH_PCIE_WAKE#
21
HOME_LED_EC
23
GPIO27_EC
26
FAN1_PWM
27
HOME_BUTTON_INT#
28
29
TS_ON
77
BAT_I2C_SCL
78
BAT_I2C_SDA
79
MBCLK2
80
MBDATA2
6
SUSB#
14
HWPG
15
H_PROCHOT#_EC
16
SUSC#
17
18
19
NBSWON1#
25
30
R467 0_4
31
ECBASE_INT#
32
SIO_EXT_SMI#
34
VRON
36
DOCK_IN_DET
73
EC_PCIE_WAKE#
74
THRM_CPU
75
ABATSYS_I
90
DNBSWON#
91
92
AC_LED_ON
93
EC_PWROK
95
RSMRST#
121
VOLMUTE#
126
BIOS_SPI_CLK
127
LID_EC#
123
CRY2
122
CRY1
11
24
35
94
113
69
R154 *0_6/S
+3VPCU
3
+3VPCU_EC
TP118
C366 *22P/50V_4
R405 0_2
PCH_SUSCLK <6,17>
R622 24.9K/F_4
R621 24.9K/F_4
500mA
4.7U/6.3V_6
TEMP_MBAT <31>
AD_AIR <31>
SYS_I <31>
TS_ON <27>
BAT_I2C_SCL <31>
BAT_I2C_SDA <31>
MBCLK2 <2,8,16>
MBDATA2 <2,8,16>
SUSB# <6,11>
HWPG <4,11,30,32,33>
SUSC# <6,11>
SUSACK#_EC <6>
EC_AOCS# <20>
NBSWON1# <23,27>
EMU_LID <16,29>
EC_DEBUG <20>
ECBASE_INT# <26>
SIO_EXT_SMI# <7>
VRON <34>
DOCK_IN_DET <27,35>
EC_PCIE_WAKE# <20>
THRM_MOINTOR <4>
ABATSYS_I <31>
DNBSWON# <6,11>
TP6
EC_PWROK <6>
RSMRST# <6>
VOLMUTE# <21>
LID_EC# <16>
PV
PCI_SERR# <7>
HOME_BUTTON_SLEEP_EC <27>
BATSHIP <31>
PCIE_WAKE# <6,19,20>
HOME_LED_EC <27>
GPIO27_EC <9>
TP97
HOME_BUTTON_INT# <27>
AC_PRESENT_EC <6>
4
+3VPCU +3VPCU_EC
L4
BLM18BA470SN1D
C104
for Battery charge/charge
for Thermal IC
AC_LED_ON <26>
TOUCH_PANEL_RST_EC# <27>
SENSOR_HUB_RST#_EC <24>
RT4 100K_4 NTC
1 2
RT3 100K_4 NTC
1 2
SI Modify on 5/27
GND
4
5
3920_RST#
1 3
Q6
METR3904-G
Q7
*METR3904-G
2
D2
2 1
*1SS355
R189 4.7K_2
2 1
D3 MEK500V-40
R200 4.7K_2
R199 *0_2
C117 220P/25V_2
2
1 3
Power Button Rest
PV
+3V
HWPG
R198 47K/F_4
EC_PECI <2>
C157
*0.027U/16V_4
R231 10K/F_2
R145 4.7K_2
R146 4.7K_2
R143 10K/F_2
R149 2.2K_2
R150 2.2K_2
R407 10K/F_2
R388 4.7K_2
R390 4.7K_2
R226 100K_2
R167 47K/F_4
R190 *10K_2
R147 4.7K_2
R148 4.7K_2
C168 0.1U/10V_2
R451 *10_4
H_PECI (50ohm)
ute on microstrip only
Ro
Spacing >18 mils
Trace Length: 0.4~6.125 iches
PV
5
+1.05V <4,7,10,11,32,35>
+3V <2,6,7,8,9,10,11,16,17,18,19,20,21,24,25,26,27,28,31,34,35>
+3VPCU <4,20,26,27,35>
+3VREG <7,16,27,30,31,35>
C167
*0.033UF_4
+3VPCU
+3VPCU
C380 *10P/50V_4
6
+3V
EC_PWROK OVT_DETC
R160 10K/F_2
R161 0_2
3920_RST#
C149 0.1U/10V_2
R211 43_4
THRM_ALERT_HW#1
Open Drain need pu high
CPUOVERT <2>
+1.05V
IMVP_PWRGD_R <4>
PM_THRMTRIP# <9>
U9
1
2
3
C138
Stuff while the EC no stuff
0.047UF_4
NBSWON1#
BAT_I2C_SCL
BAT_I2C_SDA
EC_PCIE_WAKE#
ECBASE_CLK
ECBASE_DATA
EC_HW_strap
VOL_Down#
VOL_UP#
LID_EC#
EC_BASE_EN
GPIO33_EC
MBCLK2
MBDATA2
CLK_24M_KBC
EC_PECI_R
6
MRDLY
VCC
GND
RESET#
CD
MR#
G677L308A31U
+3VPCU
6
5
4
BUTTON_ONKEY_R
7
adapter Type check
+3VPCU
Change to 1SS355 as Current loss
D4
1SS355
AD_TYPE
R166 10K_2
H_PROCHOT#_EC
3VPCU_RST#
+3VPCU
R232
*10K/F_2
+3VREG
R209 *0_4/S
R210 47K/F_4
Reserve for ENE Hold time issue
MBCLK2
MBDATA2
BAT_I2C_SCL
BAT_I2C_SDA
BIOS_CS#
BIOS_SPI_CLK
BIOS_WR#
BIOS_RD#
PROJECT : Nobel
PROJECT : Nobel
PROJECT : Nobel
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5/RD4
NB5/RD4
NB5/RD4
Date: Sheet of
Date: Sheet of
Date: Sheet of
7
2 1
R180 100/F_2
C121
R171
0.1U/10V_2
12.1K/F_4
H_PROCHOT#
3
2
Q9
2N7002K
1
3VPCU_RST#
C155
0.1U/10V_2
R136 *100K/F_4
2
Q8
3
DMG1012T-7(SOT523)
+3VREG
R168 100K_2
R135 100K_2
R162 100K_2
C113 *10P/25V_2
C114 *10P/25V_2
C111 *10P/25V_2
C112 *10P/25V_2
R447 15/F_2
R441 15/F_2
R400 15/F_2
R396 15/F_2
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
EC (KB9010QF C4)
EC (KB9010QF C4)
EC (KB9010QF C4)
8
23
AD_ID <31>
C124
100P/50V_4
H_PROCHOT# <2,34>
C174
*47P/25V_2
R126 10K_2
R225 10K_2
1
HOME_LED_EC
AC_LED_ON
MBATLED0
PCH_SPI_CS0#_R <7>
PCH_SPI1_CLK_R <7>
PCH_SPI1_SI_R <7>
PCH_SPI1_SO_R <7>
Intel Shark Bay ULT
Intel Shark Bay ULT
Intel Shark Bay ULT
+3VREG
3VPCU_RST# <26,30,35>
+3VPCU
NBSWON1# <23,27>
23 36 Thursday, September 12, 2013
23 36 Thursday, September 12, 2013
23 36 Thursday, September 12, 2013
8
1A
1A
1A
5
4
3
2
1
Sensor HUB
GND
D D
GND
C C
please ST strap setting guideline
1 ~ PA3 --> G + E-compass
PA
PA4 ~ PA6--> Gyro
STM_PA1
STM_PA2
STM_PA3
STM_PA4
STM_PA5
STM_PA6
Gyro/G-sensor /
E-compass
orientaion
strapping
B B
+V3.3S_SENSOR
R36
*10K_2
R37
10K_2
R293
10K_2
R292
*10K_2
R4
10K_2
R5
*10K_2
R40
*10K_2
R41
10K_2
1 2
C2
18P/50V_4
GND
3 4
Y1
12MHz
GND
PV
+V3.3S_SENSOR
R45
R296
10K_2
10K_2
R295
R46
*10K_2
*10K_2
GND
PV
C16
18P/50V_4
+V3.3S_SENSOR
L16 120Ohm@100MHz
C273
1uF/6.3V_2
STM_12M_IN
STM_12M_OUT
C270
0.1uF/10V_2
150mA
GND
U1
E3
PC0
E2
PC1
F2
PC2
H5
PC4
H6
PC5
F6
PC6
E7
PC7
E8
PC8
D8
PC9
B7
PC10
B6
PC11
C5
PC12
A2
PC13-TAMPER-RTC
A1
PC14-OSC32_IN
B1
PC15-OSC32_OUT
C1
OSC_IN/PD0
D1
OSC_OUT/PD1
B5
PD2
B2
VBAT
H1
VDDA
G1
VREF+
E6
VDD_1
E5
VDD_2
E4
VDD_3
D2
VDD_4
D6
VSS_1
D5
VSS_2
D4
VSS_3
C2
VSS_4
F1
VSSA
STM32F103RBH6TRC13-TFBGA64
GND
AR0W03DB003
PA10
PA11
PA12
SWDIO
SWCLK
PA15
PB10
PB11
PB12
PB13
PB14
PB15
BOOT0
NRST
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
PA8
PA9
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
PB8
PB9
R2 change to un-stuff
G2
H2
F3
G3
H3
F4
G4
H4
D7
C7
C6
C8
B8
A8
A7
A6
F5
G5
G6
A5
A4
C4
D3
C3
B3
A3
G7
H7
H8
G8
F8
F7
B4
E1
R2 *0R_2
STM_PA1
STM_PA2
STM_PA3
STM_PA4
STM_PA5
STM_PA6
If use USB interface , 1.5K stuff
PA10
PA11
PA12
STM_SWDIO
STM_SWCLK
ACCEL_INT1_HUB_3P3
ACCEL_INT2_HUB_3P3
GYRO_INT1_HUB_3P3
GYRO_INT2_HUB_3P3
I2C_1_SCL_HUB_3P3
I2C_1_SDA_HUB_3P3
PV
PB13
ACCEL_DRDY
SENSOR_HUB_BOOT0
SENSOR_HUB_RST#_LS
PV
R52 1.5K_2
R54 0R_2
R53 0R_2
R739 *0R_2
R740 *0R_2
R640
*0R_2
GND
SENSOR_HUB_WAKE_LS
C268
0.1uF/10V_2
R3
*1M_4
USBP4+
USBP4USBP4+
TP2
TP1
USBP4- <8>
USBP4+ <8>
To G-sensor / E-compass
To Gyro sensor
I2C_1_SCL_HUB_3P3 <27>
I2C_1_SDA_HUB_3P3 <27>
I2C0_SCL_SENSOR <9>
I2C0_SDA_SENSOR <9>
R50 *10K_2
R741 *0R_2
ALS_INT_N <27>
R49 20K/F_4
R294 100K_2
SENSOR_HUB_RST#_EC <23>
+V3.3S_SENSOR
GND
+V3.3S_SENSOR
SENSOR_HUB_WAKE_LS <9>
To ALS sensor
SENSOR_HUB_INT_LS <9>
PB13
GND
R51
*10K_2
R331 *0R_2/S
R332 *0R_2/S
R329 *0R_2/S
+3V
0.1uF/10V_2
I2C_1_SCL_HUB_3P3
I2C_1_SDA_HUB_3P3
I2C0_SCL_SENSOR
I2C0_SDA_SENSOR
SENSOR_HUB_WAKE_LS
ALS_INT_N
+V3.3S_SENSOR
C300
R185 2.2K_2
R184 2.2K_2
R618 *2.2K_2
R619 *2.2K_2
R1 10K_2
R186 10K_2
24
C296
0.1uF/10V_2
C297
0.1uF/10V_2
Add 0.1uF for each VDD pin
GND
+V3.3S_SENSOR
C299
0.1uF/10V_2
G-sensor/E-compass
+V3.3S_SENSOR
C125
10uF/6.3V_4
GND
I2C_1_SCL_HUB_3P3
I2C_1_SDA_HUB_3P3
A A
5
130uA
C132
0.1uF/10V_2
ACCEL_INT2_HUB_3P3
ACCEL_INT1_HUB_3P3
WR Address : 0x3C
RD Address : 0x3D
U10
14
VDD
1
VDD_IO
2
SCL
3
SDA
4
INT2
5
INT1
7
GND
GND GND
HP303DLHCTR
AL000303A02
SETP
SETN
RSVD1
DRDY
RSVD3
RSVD4
12
ACCEL_SETP
13
ACCEL_SETN
6
ACCEL_C1
C1
8
9
ACCEL_DRDY
10
11
C172
0.22u/10V_4
4.7u/10V_6 C122
GND
TP35
4
I2C_1_SCL_HUB_3P3
I2C_1_SDA_HUB_3P3
GYRO_INT1_HUB_3P3
GYRO_INT2_HUB_3P3
3
Gyroscope
WR Address : 0xD2
Address : 0xD3
RD
Gyro (4x4)
U2
2
SCL
3
SDA
7
INT
6
DRDY
14
RSVD
C1
0.01U/25V_4
HP3GD20TR
AL03GD20A03
VDD_IO
VDD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
GND
+V3.3S_SENSOR
1
16
4
SA0
5
CS
15
8
9
10
11
12
13
2
C35
0.1U/10V_4
C3
10U/6.3V_6
NB5/RD4
NB5/RD4
NB5/RD4
C14
0.1U/10V_4
+3V <2,6,7,8,9,10,11,16,17,18,19,20,21,23,25,26,27,28,31,34,35>
PROJECT : Nobel
PROJECT : Nobel
PROJECT : Nobel
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
Intel Shark Bay ULT
Intel Shark Bay ULT
Intel Shark Bay ULT
Sensor Hub
Sensor Hub
Sensor Hub
1
24 36 Thursday, September 12, 2013
24 36 Thursday, September 12, 2013
24 36 Thursday, September 12, 2013
1A
1A
1A
5
4
3
2
1
R68
0_4
R339
0_4
10
19
24
5
4
11
18
25
6
2
7
8
13
14
H15
1
GND
MBZK1002010
H19
1
+3V
GPIO_TPM
LPC_PP
TPM_XIN
TPM_XOUT
*H-C63D63N
H-C63D63N
C60
0.1U/10V_4
C307
0.1U/10V_4
TP71
TP72
H16
1
GND
H-TC157BC71I131D71P2
H-TC157BC71I131D71P2
MBZK1002010
H20
1
C69
0.1U/10V_4
R73 4.7K_4
+3V
C71
0.1U/10V_4
+3V
H17
GND
*H-TC296BC217IC131D91P2
H-TC296BC217IC131D91P2
LPC_PP
TPM_TESTB1
R78 *4.7K/F_4
+3V
R79 0_4
PLTRST#
R341 0_4
Address
BADD
4EH/4F
HIGH (default)
H2
H1
1
1
GND
*H-O71X91D63X83PT
*H1-o-w03z-3
H-O71X91D63X83PT
H1-o-w03z-3
H18
1
3
1
*H-C39D39N
H-C39D39N
2
H5
GND
*SPAD-C158NP
SPAD-C158NP
H10
1
*O-W03Z-6
O-W03Z-6
H6
1
GND
*O-W03Z-4
O-W03Z-4
H11
GND
*O-W03Z-5
O-W03Z-5
1
*H-O83X63D83X63N
H-O83X63D83X63N
1
NB5/RD4
NB5/RD4
NB5/RD4
H3
H4
1
1
GND GND GND
*H3-o-w03z-2
*H-C71D63PT
H3-o-w03z-2
H-C71D63PT
H7
1
H12
1
GND
*H-C157D91P2
H-C157D91P2
PROJECT : Nobel
PROJECT : Nobel
PROJECT : Nobel
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet
Hole
Hole
Hole
CLK_24M_TPM
R80
*33_4
D D
C70
*10P/50V_4
+3V_TPM_PWR
TPM (1.2)
U15
FOR EMI
C C
LAD0 <7,20,23>
LAD1 <7,20,23>
LAD2 <7,20,23>
LAD3 <7,20,23>
+3V <2,6,7,8,9,10,11,16,17,18,19,20,21,23,24,26,27,28,31,34,35>
+VCC_CORE <4,34>
+1.35VSUS <2,4,12,13,14,15,33>
LAD0
LAD1
LAD2
LAD3
CLK_24M_TPM <8>
LFRAME# <7,20,23>
PLTRST# <6,11,19,20,23,28>
SERIRQ <9,23>
CLK_24M_TPM
LFRAME#
PLTRST#
SERIRQ
TPM_TESTB1
26
LAD0
23
LAD1
20
LAD2
17
LAD3
21
LCLK
22
LFRAME#
16
LRESET#
28
LPCPD#
27
SERIRQ
9
TEST/BADD
15
CLKRUN#
1
NC
3
NC
12
XTALI/32K IN
NC
SLB9656TT1.2 FW 04.32
AL009656K01
VDD
VDD
VDD
GND
GND
GND
GND
GPIO
GPIO2
TESTI
XTALO
VSB
PP
RF cap
+1.35VSUS +1.35VSUS
B B
+1.35VSUS
A A
TOP LEFT TOP RIGHT
C90 1U/6.3V_4
C348 470P/50V_4 C92 470P/50V_4
C20 47P/25V_2
BOT LEFT BOT RIGHT
C22 1U/6.3V_4
C21 470P/50V_4
C89 47P/25V_2
+VCC_CORE +VCC_CORE
TOP LEFT TOP RIGHT
C260 1U/6.3V_4
C258 470P/50V_4
C261 47P/25V_2
+1.35VSUS
C97 1U/6.3V_4
C98 47P/25V_2
C350 1U/6.3V_4
C95 470P/50V_4
C353 47P/25V_2
C254 1U/6.3V_4
C246 470P/50V_4
C256 47P/25V_2
H-TC157BC71I131D71P2
H-TC157BC71I131D71P2
*H-C63D63N
H-C63D63N
w w w . c h i n a f i x . c o m
5
4
25
Intel Shark Bay ULT
Intel Shark Bay ULT
Intel Shark Bay ULT
of
25 36 Thursday, September 12, 2013
25 36 Thursday, September 12, 2013
1
25 36 Thursday, September 12, 2013
1A
1A
1A
5
4
Docking CONN( Cable to Base )
3
2
1
C355
4.7U/10V_4
R373 100K_2
R613 2.2K_2
R615 2.2K_2
+5VS5
D D
6 1
AC_LED_ON <23>
C C
From EC
Normal:Low
B B
EC_BASE_EN <23,27>
GND
Base Dock_Plug: High
R127 *100K_2
2
Q15B
PJ4N3KDW
GND
MBATLED0 <23>
From EC
Normal:Low
Base Dock_Plug: High
EC_BASE_EN BASE_EC_RESET_R
R133 10K_2
+3VPCU
5
R370 10K_2
Slate_EC_Reset# <23>
3VPCU_RST# <23,30,35>
BASE_EC_KEY_R
Dock_ECBASE_INT#
From BASE EC IRQ
R120 10K_2
R84 39_6
R85 39_6
3 4
Q15A
PJ4N3KDW
GND
To Base EC Reset
+3VPCU
2
EC Reset
R121
10K_2
Q5
MMBT3904T-7-F/SOT523
1 3
(White)
LED 3P WHITE/AMBER
2
3
1
LED1
(Orange)
BASE_EC_RESET#
2
Q17
MMBT3904T-7-F/SOT523
1 3
From Slate EC Reset
D13 *MEK500V-40
2 1
To Slate EC
ECBASE_INT# <23>
+3VPCU
BASE_EC_RESET# 3VPCU_RST#
USB_CL_DET TP_DATA_BASE
SDVO_CLK
SDVO_DATA
U21
2
VIN1
OUT3
3
VIN2
OUT2
4
EN
OUT1
1
GND
OC
G547E2P81U
USBPW_ON#
Base lift side USB 3.0
Base Right side USB 3.0
+3VS5
+3V
EC KEY Level Shift
ECBASE_DATA <23>
ECBASE_CLK <23>
A A
*100P/50V_4
+VA <31>
+3VPCU <4,20,23,27,35>
+3VS5 <6,9,10,11,20,27,29,30,35>
+3V <2,6,7,8,9,10,11,16,17,18,19,20,21,23,24,25,27,28,31,34,35>
+5VS5 <17,27,29,30,32,33,34,35>
C347
D11
PDZ5.6B
5
GND
D12
2 1
2 1
PDZ5.6B
EC_BASE_EN
C351
*100P/50V_4
TP_DATA_BASE
TP_CLK_BASE
TOUCH_PAD_INT_R TOUCH_PAD_INT
HDMI_HPD_DC HDMI_HPD
R368 2.2K_2
Q16
4 3
1
2N7002DW
4
I2C1_SCL_PCH_TS_R
I2C1_SDA_PCH_TS_R
5
I2C1_SDA_PCH_TS_R
2
6
I2C1_SCL_PCH_TS_R
Q4
4 3
1
2N7002DW
5
2
6
R631 0_2
R632 0_2
R633 *0_2
R634 *0_2
I2C1_SDA_PCH_TS
I2C1_SCL_PCH_TS
PV
TOUCH_PAD_INT <9,29>
+3V
I2C_TOUCH_SCL <29>
I2C_TOUCH_SDA <29>
I2C1_SDA_PCH_TS <9,27>
I2C1_SCL_PCH_TS <9,27>
HDMI_HPD_DC <6>
3
PV
Trace Width : min 40 mil
T2B
8
7
6
5
USBPW_ON <23>
Card reader
+5V_USB
DOCK_IN_DET# <9,27,29>
USB power charger
USB30_TX1+ <8>
USB30_TX1- <8>
USB30_RX1+ <8>
USB30_RX1- <8>
USB_CAR_P <28>
USB_CAR_N <28>
USB30_TX2+ <8>
USB30_TX2- <8>
USB30_RX2+ <8>
USB30_RX2- <8>
C476
.1U/10V_4
+5V_USB
EC SMBUS
USB_CL_DET <23>
HDMI_HPD
SDVO_CLK <6>
SDVO_DATA <6>
HDMI
EXT_MIC_L <21,22>
SENSE_A <21,22>
LINEOUT_R <22>
LINEOUT_L <22>
+3V
R614
1M_4
2
1
HDMI_HPD_DC HDMI_HPD
Q31
*2N7002
3
40 mils (Iout=1A)
USBP0+ <8>
USBP0- <8>
USBP1- <8>
USBP1+ <8>
TP I2C
IN_CLK <2>
IN_CLK# <2>
IN_D0 <2>
IN_D0# <2>
IN_D1 <2>
IN_D1# <2>
IN_D2 <2>
IN_D2# <2>
2
+
C345
100u_6.3V_3528
Dock_ECBASE_INT#
BASE_EC_RESET#
VDD_12V_AC_BAT_BASE
R612
20K/F_4
+VA
GND
GND
GND
GND
GND
GND
GND
TOUCH_PAD_INT_R
ECBASE_CLK
ECBASE_DATA
TP_CLK_BASE
USB_CL_DET
GND
GND
GND
GND
AGND
AGND
26
CN20
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
VDD_12V_AC_BAT_BASE
PROJECT : Nobel
PROJECT : Nobel
PROJECT : Nobel
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5/RD4
NB5/RD4
NB5/RD4
Date: Sheet of
Date: Sheet of
Date: Sheet of
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
61
55
62
56
63
57
64
58
59
60
WIRE CONN
DFHS60FR023
Intel Shark Bay ULT
Intel Shark Bay ULT
Intel Shark Bay ULT
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
DOCKING
DOCKING
DOCKING
1
1A
1A
26 36 Thursday, September 12, 2013
26 36 Thursday, September 12, 2013
26 36 Thursday, September 12, 2013
1A
5
4
3
2
1
+3V
R636 *2.2K_2
R637 *2.2K_2
D D
C C
B B
PV
TOUCH_PANEL_RST_EC# <23>
DOCK_IN_DET# <9,26,29>
TS_ON <23,27>
I2C1_SCL_PCH_TS <9,26>
I2C1_SDA_PCH_TS <9,26>
+3VREG
Touchpanel + HomeKey + Volume button
TOUCHPAD_INTR#_PCH_R
TS_ON
R635 0R_2
R642 *0R_2
USBP5- <8>
USBP5+ <8>
R62
100K_2
2
+3VPCU
6 1
GND
PV
R627 *0R_2
R628 *0R_2
R629 0R_2
R630 0R_2
R427
100K_2
DOCK_IN_DET
Q1B
PJ4N3KDW
HOME_BUTTON_LED
TOUCH_PANEL_RST#_R
HOME_BUTTON_INT# <23>
+3VS5
I2C_5_SCL_CON
I2C_5_SDA_CON
I2C_5_SCL_CON
I2C_5_SDA_CON
3 4
5
GND
DOCK_IN_DET <23,35>
TS_ON <23,27>
TOUCH_PANEL_RST# <8>
TOUCHPANEL_INTR#_PCH <8>
R468 4.7K_2
HOMEKEY_CLK <23>
HOMEKEY_DATA <23>
HOME_BUTTON_SLEEP
R364 *0R_2
Q1A
PJ4N3KDW
R469 *0R_2
PV
TOUCH_PANEL_RST#
TOUCHPAD_INTR#_PCH
+3V
+3VS5
VOL_UP# <23>
VOL_Down# <23>
GND
GND
D1 MEK500V-40
2 1
HOME_BUTTON_LED
HOME_BUTTON_SLEEP
R334 1.5K_2
R333 1.5K_2
C310 *22p/50V_4
C309 *22p/50V_4
HOME_BUTTON_SLEEP_EC <23>
C306 1uF/6.3V_2
GND
R734 0R_2
R735 0R_2
I2C_5_SCL_CON
I2C_5_SDA_CON
GPI_VOLUMEUP_R
GPI_VOLUMEDOWN_R
[VOL_DOWN]
EC_BASE_EN <23,26>
TOUCH_PANEL_RST#_R
GND
TOUCHPAD_INTR#_PCH_R
VOL_UP#
[VOL_UP]
VOL_Down#
CN7
1
2
3
4
15
5
6
16
7
8
9
10
11
12
13
14
Touch screen CONN
DFFC14FR022
50521-01441-001-14p-l
GND
HOME KEY LED
+3VS5
R348
4.7K/F_2
HOME_BUTTON_LED
R349 *0R_2
HOME_LED_EC <23>
+5VS5
3
2
1
GND
R105
10K_2
R102 4.7K/F_2
Q3
2N7002K
2
Q2
MMBT3906-7-F
+5VS5
1 3
GND
R104
0_4
C343
0.1uF/10V_2
R347 100/F_4
GND
123
CN9
Vibrator CONN
DFHS02FR027
88460-0201-2p-l
27
4
GND
PB + ALS + DMIC + WEBCAM LED CONNECTOR
VIBRATOR
+3V
10 pin conn
CN13
+3VPCU
GND
A A
C171 *22p/50V_4
NBSWON1# <23>
+3VREG <7,16,23,30,31,35>
+5VS5 <17,26,29,30,32,33,34,35>
+3V <2,6,7,8,9,10,11,16,17,18,19,20,21,23,24,25,26,28,31,34,35>
+3VPCU <4,20,23,26,35>
+3VS5 <6,9,10,11,20,26,29,30,35>
R220 1.5K_2
5
R219
100K_2
I2C_1_SCL_HUB_3P3 <24>
I2C_1_SDA_HUB_3P3 <24>
ALS_INT_N <24>
DIGITAL_CLK <21>
DIGITAL_D1 <21>
CAM_2M_LED# <18>
+3V
+3V
MIC 0.65mA
ALS 35uA
I2C_1_SCL_HUB_3P3
I2C_1_SDA_HUB_3P3
ALS_INT_N
CAM_2M_LED#
PWR_BUTTON
10
9
8
7
6
5
12
4
3
11
2
1
50208-01001-001-10p-l
DFHD10MR060
Sensor CONN
GND
4
GND
VIBRATOR_OUT <9,23>
3
GND
C452
4.7U/10V_4
R562
2.2K_2
VIBRATOR_EN
U35
5
IN
6
IN
4
EN
G5287RR1U
1
OUT
3
DIS
2
GND
7
PAD
2
D18
BAS316
R554 *0_4/S
GND
GND
VIB_OUT+
C449
4.7U/10V_4
VIB_OUT-
PROJECT : Nobel
PROJECT : Nobel
PROJECT : Nobel
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5/RD4
NB5/RD4
NB5/RD4
Date: Sheet of
Date: Sheet of
Date: Sheet
CN19
123
88460-0201-2p-l
DFHS02FR027
Vibrator CONN
Intel Shark Bay ULT
Intel Shark Bay ULT
Intel Shark Bay ULT
Switch
Switch
Switch
1
4
GND
1A
1A
1A
of
27 36 Thursday, September 12, 2013
27 36 Thursday, September 12, 2013
27 36 Thursday, September 12, 2013
5
USB_HUB_5V
TP105
PGANG
PSELF
nOVRP2
nOVRP1
+3V_USB
U36
27
23
26
24
22
1
DD-0
2
DD+0
3
DD-1
4
DD+1
5
VCC_A_5
6
DD-2
7
DD+2
QFN28
HUB1_USB3_HUB1_USB3_+
28
VCC
VREG
OVR#[1]25OVR#[2]
I2C_SDA
GL850G-OHY31
RREF8VCC_A_99XIN10XOUT11DD-312DD+313VCC_A_14
XOUT
XIN
+3V_USB
RREF
GANG
OVR#[3]
OVR#[4]
RESET#
14
+3V_USB
VCC_D
SELFPWR
GND
D D
USBP6- <8>
USBP6+ <8>
C C
XIN
C460
18P/50V_4
R600 *0_4/S
R601 *0_4/S
USB_CAR_N <26>
USB_CAR_P <26>
USB_BT_N <20>
USB_BT_P <20>
1 2
12MHz
LCS
USBP6-_R
USBP6+_R
+3V_USB
Y4
3 4
XOUT
C459
18P/50V_4
GND GND
TEST
DD+4
DD-4
GND
29
GL850G-OHY31
4
52.4mA
21
20
19
18
17
16
15
RESET#_USB
+3V_USB_D
nOVRP3
nOVRP4
RESET#_USB
HUB1_USB4_+
HUB1_USB4_-
+3V_USB
R565 *0_4/S
+3V_USB
PV
RESET#_USB PLTRST#
R567
10K/F_4
C461
0.1U/10V_4
R638 *0R_2
R574
*47K_4
+3V
HUB1_USB3_+
HUB1_USB3_-
HUB1_USB4_+
HUB1_USB4_nOVRP1
nOVRP2
nOVRP3
nOVRP4
PSELF
PGANG
RREF
3
R564 *0_4/S
PLTRST# <6,11,19,20,23,25>
R598 1K_2
R599 1K_2
R566 *1K_2
R568 *1K_2
R569 10K_2
R570 10K_2
R571 10K_2
R572 10K_2
R573 10K_2
R575 100K_2
R576 680/F_4
+3V_USB
+3V_USB
15 mil
C455
0.1uF/10V_2
GND
C456
1uF/6.3_2
C457
1uF/6.3_2
C458
10uF/6.3V_4
2
C471
0.1uF/10V_2
C472
0.1uF/10V_2
C473
0.1uF/10V_2
C474
0.1uF/10V_2
1
28
GND
B B
+3V <2,6,7,8,9,10,11,16,17,18,19,20,21,23,24,25,26,27,31,34,35>
A A
5
4
3
GND
PROJECT : W03Z
PROJECT : W03Z
PROJECT : W03Z
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5
NB5
2
NB5
USB HUB - 1
USB HUB - 1
USB HUB - 1
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
28 36 Thursday, September 12, 2013
28 36 Thursday, September 12, 2013
28 36 Thursday, September 12, 2013
1A
1A
1A
5
4
3
2
1
29
D D
+3VS5 <6,9,10,11,20,26,27,30,35>
+5VS5 <17,26,27,30,32,33,34,35>
R608 *0_2
R609 *0_2
+3VS5 +3VS5
USBP5-_C
USBP5+_C
ST_MCU_PA13
ST_MCU_PA14
ST_MCU_BOOT0
4
R588 *0_4/S
U38
10
PA0-WKUP
11
PA1
12
PA2
13
PA3
14
PA4
15
PA5
16
PA6
17
PA7
29
PA8
30
PA9
31
PA10
32
PA11
33
PA12
34
PA13
37
PA14
38
PA15
44
BOOT0
7
NRST
STMCU_VDDA_PWR3V
C463
*1uF/6.3_2
1
24
36
48
VBAT
VDD_1
VDD_2
VDD_3
STM32F103CBU6C55
PC15-OSC32_OUT
VSSA8VDDA
VSS_1
VSS_2
GND
VSS_347GND
9
23
35
49
GND
PC13-TAMPER-RTC2PC14-OSC32_IN
*STM32F103CBU6C55
4
3
STMCU_VDDA_PWR3V
C470
*0.1U/10V_4
C464
*1uF/6.3_2
PB10
PB11
PB12
PB13
PB14
PB15
PD0-OSC_IN
PD1-OSC_OUT
3
C465
*1uF/6.3_2
18
PB0
19
PB1
20
PB2
39
PB3
40
PB4
41
PB5
42
PB6
43
PB7
45
PB8
46
PB9
21
22
25
26
27
28
5
6
C466
*1uF/6.3_2
GND
TP_IRQ#
I2C_TOUCH_SCL
I2C_TOUCH_SDA
R597 *0_2
R620 *10K_2
R590 *0_2
R591 *0_2
R606 *10K_2
R607 *10K_2
*12MHz
Y5
STMCU_VDDA_PWR3V
TOUCH_PAD_INT
EMU_LID
I2C_TOUCH_SCL <26>
I2C_TOUCH_SDA <26>
ST_MCU_OSCIN
3
4
1
2
ST_MCU_OSCOUT
STMCU_VDDA_PWR3V
STMCU_VDDA_PWR3V
C467
*18P/50V_4
C468
*18P/50V_4
TOUCH_PAD_INT <9,26>
EMU_LID <16,23>
PV
PV
GND
2
PROJECT : W03Z
PROJECT : W03Z
PROJECT : W03Z
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Touch PAD
Touch PAD
NB5
NB5
NB5
Touch PAD
Date: Sheet of
Date: Sheet of
Date: Sheet
1
1A
1A
1A
of
29 36 Thursday, September 12, 2013
29 36 Thursday, September 12, 2013
29 36 Thursday, September 12, 2013
C C
3 4
5
6 1
GND
MCU_PWREN
PV
Q27B
*PJ4N3KDW
USBP3- <8>
USBP3+ <8>
STMCU_VDDA_PWR3V
USBP3+ ST_MCU_PA8
R592 *1.5k/F_4
TP106
TP107
ST_MCU_RST
GND
R595 *20K/F_4
DOCK_IN_DET# <9,26,27>
Q27A
*PJ4N3KDW
R589 *200K_4
R639 *200K_4
D19
2 1
*RB500V-40
C469
*0.1U/10V_4
5
2
R594
*100K/F_4
+5VS5
+5V
SI Modify on 5/27
B B
STMCU_VDDA_PWR3V
TP_EC_RST <23>
SI Modify on 5/27
A A
5
4
3
2
1
DC/DC +3VS5/+5VS5
29
D D
Place these CAPs
close to FETs
+VIN
PL3
*0_8/S
PC50
+Vin=6V~8.4V
+5 Volt +/- 5%
Countinue current:2A
C C
B B
Peak current:3A
OCP minimum:4A
+5VS5
PJP3
*POWER_JP/S
1 2
+5V_ALWP
PR110
+
PC124
*0_2/S
PC130
15.4K/F_4
0.1U/10V_4
100U/6.3V_3528
PR100
PR99
10K/F_4
0.1U/25V_4
PL12
PCME061E-4R7MS/3.2A
VO=(2(R1+R2)/R2)
Place these CAPs
close to FETs
PC141
4.7U/10V_6
5V_PHASE1
PR127
*2.2_6
PC150
*2200P/50V_4
Rds(on) 18m ohm
PC140
*4.7U/10V_6
9
10
432
S1/D2
567
+VIN_5VS5
PC125
PC129
0.1U/25V_4
2200P/50V_4
PR109
*100K/F_4
PC105
0.1U/25V_4
PR40
10K/F_4
PR34
3VPCU_RST# <23,26,35>
1
D1
G1
5V_PHASE1 3V_PHASE2
PQ16
FDMC7200
G2
S2
8
+3VS5
*0_4/P
PR108
*100K/F_4
5V_UGATE1
PR104
2.2_6
PR41
*0_4/S
HWPG <4,11,23,32,33>
8243EN
5V_BST1
5V_LGATE1
5V_FB1
PGOOD
PC120
0.1U/25V_4
12
18
19
17
16
20
1
6
+VIN
ENLDO
UGATE1
BOOT1
PHASE1
LGATE1
BYP1
FB1
PGOOD
PR98
150K/F_4
PR44
10_8
PC118
11
VIN
4.7U/6.3V_6
ENTRIP1
2
ENTR1
+3VREG
+5VPCU
15
LDO3
PU6
RT8230AGQW
ENTRIP2
4
ENTR2
PR97
150K/F_4
PC121
F(3V/5V)=355KHz/300KHz
4.7U/6.3V_6
14
LDO5
13
ENM
TONSEL
UGATE2
BOOT2
PHASE2
LGATE2
ENM
3
8
7
9
10
5
FB2
GND
21
PC46
*0.1U/10V_4
TONSEL
3V_UGATE2
3V_BST2 3V_BST2_S 5V_BST1_S
3V_LGATE2 5V_FB1_S
3V_FB2
PR42
*0_4/S
PR101
100K/F_4
PR106
2.2_6
S5_ON
PC106
0.1U/25V_4
S5_ON <23>
1
G1
G2
8
PQ17
FDMC7200
Rds(on) 18m ohm
PC137
2
7
0.1U/25V_4
4
3
D1
S1/D2
S2
5
6
+VIN_3VS5
PC126
PC138
4.7U/10V_6
2200P/50V_4
9
PCME061E-4R7MS/3.2A
10
3V_PHASE2
PR57
*2.2_6
PC58
*2200P/50V_4
VO=(2(R1+R2)/R2)
PC133
+VIN
PL2
*0_8/S
PC49
*4.7U/10V_6
0.1U/25V_4
+Vin=6V~8.4V
+3.3 Volt +/- 5%
Countinue current:3A
Peak current:4A
OCP minimum:5A
PL15
+3.3V_ALWP
PR121
*0_2/S
3V_FB2_S
PR95
6.8K/F_4
PR96
10K/F_4
PC57
+3VS5
PJP1
*POWER_JP/S
1 2
+
PC145
0.1U/10V_4
100U/6.3V_3528
A A
PROJECT : Nobel
PROJECT : Nobel
PROJECT : Nobel
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5/RD4
NB5/RD4
NB5/RD4
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
Intel Shark Bay ULT
Intel Shark Bay ULT
Intel Shark Bay ULT
+3V/+5V(RT8230A)
+3V/+5V(RT8230A)
+3V/+5V(RT8230A)
1
1A
1A
30 36 Thursday, September 12, 2013
30 36 Thursday, September 12, 2013
30 36 Thursday, September 12, 2013
1A
5
4
3
2
1
ADP Voltage=19V
Base Voltage=12V
PV
PD3
PDZ16B
2 1
PR8 100K/F_4
1
2
3
4
5
6
7
8
PAD
9
PAD
CN8
GND
GND
0.01U/25V_4
PC70
SMD
SMC
GND
GND
GND
0.1U/25V_4
VDD
VDD
VDD
PR4
1K/F_4
+VAD +VA
PD8
PR65
200K_F_4
2 1
minimum
P4SMAJ20A
12V
PR64
PC13
0.1U/25V_4
PV
METR3904-G
PR10
1M_4
9
8
MBAT
7
6
5
4
TS
3
2
1
BAT_I2C_SCL <23>
+3VREG
PR3
200K_4
PC3
0.01U/25V_4
5
100K/F_4
2
PQ13
PC76
PR80
100K/F_4
1 3
+VA
EC4
1000P/50V_4
PC10
*100P/50V_4
PL4
80/5A
D D
PC65
0.1U/25V_4
+VAD
C C
DCIN_CONN
(45W ADP)
CN5
DC-IN CONN
DCIN
DCIN
DCIN
AD_ID
GND
GND
GND
B B
10
11
Battery Conn
51278-00941-001-9p-l
Place this cap
close to EC
TEMP_MBAT <23>
A A
PC41
AOD425
PR77
100K/F_4
0.1U/25V_4
PC66
0.1U/25V_4
AD_ID <23>
Battery 2S1P
PD4
PQ10
1
*0.01U/50V_4
PR9
10K/F_4
PDZ5.6B
+VAD_1 +VIN_AC
PQ9
EMB20P03V
6
4 3
7
8
PV
PC164
+VAD
5VSMB RST#
PR22 10K/F_4
MBAT
PC83
0.1U/25V_4
PR13
PR11
22_4
22_4
BAT_I2C_SDA BAT_I2C_SCL
PD5
2 1
2 1
PDZ5.6B
1 5
2
3
4
PR66
100K/F_4
2 1
PD2 BAS316
VREG_CHG_VDD
BAT_I2C_SDA 9519SDA
BAT_I2C_SCL
80/5A
80/5A
+3VREG
ACIN <23>
PL6
PL7
PC12
*100P/50V_4
PV
PC87
0.1U/25V_4
BAT_I2C_SDA <23>
4
PV
2 1
PR5
20K/F_4
SGATE
PR7
33_8
PR78 *1K/F_4
PR74 1K/F_4
PR24 57.6K/F_4
PR23 100K/F_4
PR20 *0_4/S
PR21 *0_4/S
SYS_I <23>
PC39
+3VREG VREG_CHG_VDD
PD7
BAS316
5VSMB
PC23
0.1U/10V_4
AGATE
ADET
DCIN
PC11
0.1U/25V_4
ACOK
9519SCL
PR14
*0_2/S
ISL9519HRTZ-T
0.01U/50V_4
Place this cap
close to EC
2 1
PV
PR69
*0_2/S
PD6
BAS316
12
26
13
14
10
11
BGATE
1
3
2
4
6
PR19
10/F_4
PR71
10/F_4
PC7
PR68
RC1206-R020
PC6
0.047U/25V_4
9519CSIP
0.1U/25V_4
28
VSMB
CSIP
SGATE
AGATE
ADET
DCIN
RST#
VFSW
ACOK
SDA
SCL
CELL
AMON
AGND29AGND30AGND31AGND32AGND
9
PC19
0.1U/10V_4
VREG_CHG_VDD
6 1
2
ABATSYS_I <23>
9519CSIN
27
PU1
CSIN
VCOMP
PGND
AGND
22
15
PR76
*10K/F_4
PQ12B
*2N7002KDW
PC40
2 1
PR70
10/F_4
UGATE
LGATE
PHASE
BOOT
ICOMP
CSOP
CSON
VFB
BGATE
VDD
VDDP
0.01U/50V_4
PR67
*0_2/S
PC5
0.1U/25V_4
24
21
23
25
PR6 0_6
5
9519ICOMP
18
9519CSOP
17
9519CSON
8
9519VFB
7
9519VCOMP
16
BGATE
19
20
33
5
PC30
0.1U/10V_4
Place this cap
close to EC
CHG_UGATE
CHG_LGATE
CHG_PHASE
VREG_CHG_VDD
PR12
4.7_6
PC14
PC9
1U/6.3V_4
9519ICOMP
3 4
PQ12A
*2N7002KDW
+3V
PR29
10/F_4
PC34
*100P/50V_4
3
1U/6.3V_4
CHG_PHASE
PR15
20K/F_4
PC16
470P/50V_4
PC78
0.047U/25V_4
PR79
0_4
3
V+
6
OUT
Gain=50
1
REF
PQ11
RJK03S3DPA
PC8
0.1U/25V_4
PU2
INA213
GND
PC15
IN-
IN+
9
+VIN_CHG
1
G1
S1/D2
G2
8
*470P/50V_4
5
4
2
2
D1
D1
S2
S2
765
PR18
3K/F_4
PC33
0.1U/10V_4
D1
S2
PC2
10U/25V_8
PR30
10/F_4
PR28
10/F_4
PC1
10U/25V_8
PCMB102T-3R3/6.2A
PR72
*2.2_6
PC71
*2200P/50V_4
PC18
100P/50V_4
PC20
1000P/50V_4
PL5
PR91
*0_2/S
PQ14
EMB20P03V
0.1U/25V_4
ABATSENSECSN
ABATSENSECSP
PC4
PR16
2.2/F_4
PC92
2
2200P/50V_4
4
PC68
RC1206-R010
PC17
1U/16V_4
321 5
6
7
8
0.1U/25V_4
PV
PR92
PR89
*0_2/S
1 2
+
PC67
*15U_25V_7343
PC28
22U/10V_8
2 1
PR17
0_4
PD10
*SBR3U30P1-7
RC1206-R010
PR93
*0_2/S
PR88
PC29
22U/10V_8
PC97
0.1U/25V_4
2 1
NB5/RD4
NB5/RD4
NB5/RD4
PC26
2200P/50V_4
PR87
*0_2/S
28
+VIN
DB Modify
PC93
PC94
1 2
1 2
+
PC27
0.1U/25V_4
PC96
22U/10V_8
+BATT +BATT
Place this cap
close to EC
PROJECT : Nobel
PROJECT : Nobel
PROJECT : Nobel
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Charger (ISL9519HRTZ-T)
Charger (ISL9519HRTZ-T)
Charger (ISL9519HRTZ-T)
Date: Sheet of
Date: Sheet of
Date: Sheet
+
62U_10V_3528
62U_10V_3528
+BATCHG
PC95
22U/10V_8
PV
+BATCHG
PR146
*470K/8
3
PQ19
*2N7002K
2
BATSHIP <23>
1
PV
+VAD +VA_AIR
PD1
2 1
BAS316
PR1
AD_AIR <23>
PC38
0.1U/10V_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
75K/F_4
PR2
12.4K/F_4
Intel Shark Bay ULT
Intel Shark Bay ULT
Intel Shark Bay ULT
of
31 36 Thursday, September 12, 2013
31 36 Thursday, September 12, 2013
1
31 36 Thursday, September 12, 2013
1A
1A
1A
5
4
3
2
1
+1.05V Volt +/- 5%
Countinue current:2A
Peak current:3A
OCP minimum:4A
PC139
*22U/6.3V_8
+1.05V
PR112
*POWER_JP/S
1 2
PC127
10U/6.3V_6
PC146
*22U/6.3V_8
PC162
NC
LX
LX
NC
FB
EN
PR140
*2.2_6
1
2
3
7
6
5
554NC_1.8V
554FB_1.8V 554SVIN_1.8V
554EN_1.8V
PL13
PCME061E-1R0MS/5.5A
PC157
*22P/50V_4
PC63
*68P/50V_4
PC64
*0.1U/10V_4
PR62 *0_4/S
554FB_1.8V_S
PR111
*0_2/S
PR139
7.5K/F_4
R1
PR145
R2
10K/F_4
V0=0.6*(R1+R2)/R2
MAINON <23,33,35>
+1.05V_L
PC123
0.1U/10V_4
D D
PR63
*0_4/S
HWPG <4,11,23,30,33>
+5VS5
C C
HWPG 554LX_1.8V
PR129
10_6
PC152
PC153
10U/6.3V_6
0.01U/50V_4
554PG_1.8V
554PVIN_1.8V
PC155
1U/6.3V_4
*2200P/50V_4
PU9
4
PG
9
PVIN
10
PVIN
RT8068A
8
SVIN
11
GND
31
B B
PR107
*0_6/S
+5VS5
PC109
4.7U/6.3V_6
4
PR102
*0_4/S
HWPG 8008LX1.5V
PR39
*0_4/S
MAINON
PC45
0.1U/10V_4
A A
5
1
PU5
PG
APW8824
EN
R2
6
VIN
FB
PR105
10K/F_4
GND
3
LX
2
R1
PR103
15K/F_4
VO=(0.6(R1+R2)/R2)
5
+1.5V +/- 5%
Countinue current:1A
Peak current:1.5A
OCP current:2A
DB Modify
PL9
1uH/2.6A_2520
PR94
*0_2/S
4
PC98
10U/6.3V_6
+1.5V
PC99
0.1U/10V_4
PROJECT : Nobel
PROJECT : Nobel
PROJECT : Nobel
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
+1.05V (RT8068)/1.5V
+1.05V (RT8068)/1.5V
NB5/RD4
NB5/RD4
3
2
NB5/RD4
+1.05V (RT8068)/1.5V
Date: Sheet of
Date: Sheet of
Date: Sheet of
Intel Shark Bay ULT
Intel Shark Bay ULT
Intel Shark Bay ULT
32 36 Thursday, September 12, 2013
32 36 Thursday, September 12, 2013
1
32 36 Thursday, September 12, 2013
1A
1A
1A
5
4
3
2
1
PR27
PU4
7
PC84
AIN
21
VCC
1U/6.3V_4
1
PGOOD
3
PFM
2
EN
23
SS
AOZ1237
MAINON <23,32,35>
+5VS5
D D
PR84
*0_4/S
HWPG <4,11,23,30,32>
SUSON <23>
C C
B B
PR26
*0_4/S
PR85
*0_2/S
PC85
0.1U/10V_4
1237PGDDR
1237PFMDDR
1237ENDDR
PC32
*0.1U/10V_4
TON
PGND
PGND
PGND
PGND
PGND
AGND
*10U/6.3V_6
SUSON
MAINON
PC77
BST
IN
IN
IN
LX
LX
LX
LX
LX
FB
8
9
22
20
1237BSTDDR
10
1237LX_DDR
11
16
17
18
12
13
14
15
19
4
5
1237FBDDR
+1.35VSUS
PR81 *0_4/S
PD9
*BAS316
PR75
*0_4/S
PR86
0_6
R2
PC80
10U/6.3V_6
2 1
PC35
0.1U/25V_4
PR83
3.48K/F_4
PC75
*0.1U/10V_4
PC91
4.7U/10V_6
PC89
0.1U/25V_4
R1
PR82
2.4K/F_4
VO=(0.8(R1+R2)/R2)
2
VLDOIN
1
VDDQSNS
9
S5
7
S3
120K/F_4
6
+VIN_DDR +VIN
PC36
4.7U/10V_6
PR90
*2.2_6
PC88
*2200P/50V_4
1237FBDDR_S 1237SSDDR
10
VIN
VTT
PU3
G2986
VTTSNS
VTTREF
PGND4GND
GND11GND12GND
8
PC90
2200P/50V_4
PCME061E-R82MS/7A
+5VS5
PC79
1U/6.3V_4
3
5
6
13
PL1
*0_8/S
PL8
PC73
0.1U/10V_4
+0.65V_DDR_VTT
PC72
*10U/6.3V_6
PR73
*100/F_4
PC25
0.1U/25V_4
( VTT/2A )
PC74
10U/6.3V_6
PC69
*0.1U/10V_4
+1.35VSUS_S2
PR25
*0_2/S
( 3mA )
DDR_VTTREF <12,14>
+Vin=6V~8.4V
+1.35VSUS Volt +/- 5%
Countinue current:6A
Peak current:6.4A
OCP minimum:9A
+1.35VSUS
PC86
PC24
0.1U/10V_4
PC22
22U/6.3V_8
22U/6.3V_8
PJP2
*POWER_JP/S
1 2
PC82
22U/6.3V_8
PC81
30
PC31
PC21
22U/6.3V_8
*22U/6.3V_8
*22U/6.3V_8
A A
PROJECT : Nobel
PROJECT : Nobel
PROJECT : Nobel
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
30 -- DDR3(AOZ1237_G2986)
30 -- DDR3(AOZ1237_G2986)
NB5/RD4
NB5/RD4
NB5/RD4
5
4
3
2
30 -- DDR3(AOZ1237_G2986)
Date: Sheet of
Date: Sheet of
Date: Sheet of
Intel Shark Bay ULT
Intel Shark Bay ULT
Intel Shark Bay ULT
33 36 Thursday, September 12, 2013
33 36 Thursday, September 12, 2013
1
33 36 Thursday, September 12, 2013
1A
1A
1A
5
4
3
Place close
to inductor
2
1
32
PC160
*680P/50V_4
PR58 24.3K/F_4
PR136 13K/F_4
81101ILIM
81101IOUT
21
20
ILIM
IOUT
ENABLE1VR_HOT#2SDIO3ALERT#
VR_HOT#
PC156
470P/50V_4
CSCOMP
CSSUM
19
18
CSSUM
CSCOMP
PU8
NCP81101MNTXG
4
SDIO
ALERT#
D D
POP Rb and
no POP Ra
for nex
version.
PC161
PR135
0_4
+5VS5
H_VR_ENABLE_MCP <4>
+3V
PC158
10P/50V_4
Ra
PR144
6.04K/F_4
Rb
PR53
2.2_6
VRON <23>
PR113 *75/F_4
H_PROCHOT#
IMVP_PWRGD
PR47 *10K/F_4
PR54
18.7K/F_4
81101ROSC
81101COM
81101FB
81101DIFFOUT
81101VSN
81101VSP
81101VCC
PC55
1U/6.3V_4
PR114 *0_4
PC60
470P/50V_4
22
23
24
25
26
27
28
29
PR120 *0_4/S
PR119 *0_4/S
PR50 *0_4/S
PR48 *0_4/S
PR49 *0_4/S
PR51 *0_4/S
ROSC
COMP
FB
DIFFOUT
VSN
VSP
VCC
GND
PR130
49.9/F_4
PR131 1K/F_4
C C
PR123 *0_4/S
VSS_SENSE <4>
VCC_SENSE <4>
+V1.05S_VCCST
B B
PR118
130/F_4
PR117
*75/F_4
PR122 *0_4/S
PR52
*0_4/S
PR116
54.9/F_4
SDIO
ALERT#
SCLK
PC128
0.1U/10V_4
PC148
1000P/50V_4
PC154
330P/50V_4
*1500P/50V_4
PC151
*2200P/50V_4
PR126 *0_4/S
+V1.05S_VCCST
H_PROCHOT# <2,23>
VR_SVID_DATA <4>
VR_SVID_ALERT# <4>
VR_SVID_CLK <4>
IMVP_PWRGD <4,6>
PR141
165K/F_4
PV
PR142
243K/F_6
PC159
2.2U/6.3V_6
PC61 1000P/50V_4
PR59 84.5K/F_4
CSREF
16
17
IMAX
CSREF
SCLK
VR_RDY
5
6
SCLK
VR_RDY
15
PVCC
VBOOT
TSENSE
VRMP
7
81101VRMP
HG
PGND
BST
SW
LG
PC53
0.01U/50V_4
+5VS5
14
13
9
11
8
10
12
PR115
1K/F_4
VBOOT
TSENSE
81101_BST
81101_PH
81101_LG
1 2
PR143
75K/F_4
SWN
Boot Voltage Table
R_boot V_boot
30.1K 0V
49.9K 1.65V
69.8K 1.7V
PR60 69.8K/F_4
PC56 0.01U/25V_4
PR125 1_6
PC144
0.22U/25V_6
+VIN_VCC_CORE
PR128
220K_6 NTC
1.75V 90.9K
81101_HG_G 81101_HG
PQ18
RJK03S3DPA
TSENSE
PR134
*0_4/S
1 2
PR133
PR138
8.25K/F_4
TH05-3L104FR
Place close
to MOSFET
+VIN_VCC_CORE +VIN
PC52
PC143
4.7U/10V_6
1
2
D1
D1
D1
G1
S1/D2
9
G2
S2
S2
S2
765
8
4.7U/10V_6
DCR=4.1m-ohm+/-5%
81101_PH
PR61
*2.2_6
PC62
*2200P/50V_4
PC54
PC142
4.7U/10V_6
PL14
PCMB102T-R36/17A
PL11
*0_8/S
PC147
2200P/50V_4
0.1U/25V_4
+VCC_CORE
PC51
*22U/6.3V_8
PR124 *0_2/S
PR132 *0_2/S
TDP=4~6W
Icc_Max=27A
I_TDC=5A
PL2(60s)=8A
I_Dynamic=22A
V_Operate=1.6V~1.8V
DC_LL=2m
AC_LL=7m
AC_LL_VOS=11.4m
VBOOT=1.7V
+VCC_CORE
+Vin=6V~8.4V
PC149
1 2
+
PC131
*62U_10V_3528
0.1U/25V_4
PC114
*22U/6.3V_8
PR137 10/F_4
PC134
1 2
+
CSREF
SWN
*62U_10V_3528
PC115
PC112
PC113
*22U/6.3V_8
*22U/6.3V_8
A A
5
4
3
2
PC111
*22U/6.3V_8
*22U/6.3V_8
PROJECT : Nobel
PROJECT : Nobel
PROJECT : Nobel
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5/RD4
NB5/RD4
NB5/RD4
Date: Sheet of
Date: Sheet of
Date: Sheet of
PC110
PC132
*22U/6.3V_8
*22U/6.3V_8
Intel Shark Bay ULT
Intel Shark Bay ULT
Intel Shark Bay ULT
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
32 -- CPU Core (NCP81101)ULT
32 -- CPU Core (NCP81101)ULT
32 -- CPU Core (NCP81101)ULT
1
34 36 Thursday, September 12, 2013
34 36 Thursday, September 12, 2013
34 36 Thursday, September 12, 2013
1A
1A
1A
5
4
3
2
1
Load switch
+3VS5
+5VS5
+3VREG
PR36 *0_6
+3VPCU
33
+VIN
OUT2
OUT2
GND
GND
ON2
2
PQ6
BSS138W
8
9
11
15
5
PC135
0.1U/10V_4
PC47
*0.1U/10V_4
1 3
+5VS5
PC103
0.1U/10V_4
PR46
*0_4/S
PR55
1M_4
0.6A
+5V
PC119
*10U/6.3V_6
MAINON
+1.05V_MODPHY
PR43
22_8
3
PQ7
2N7002K
2
1
1.05VMOD_ONG
+5VS5
2
PR56
1M_4
*LQ3E070BNFU7TB
1.05VMOD_OND
3
PQ8
2N7002K
1
PQ15
PC59
+VIN
PR31
100K_4
3 4
PQ3A
2N7002KDW
5
DOCK_IN_DET <23,27>
3VPCU_RST# <23,26,30>
+1.05V
678
PC117
*0.1U/10V_4
PC104
*0.1U/10V_4
1.84A
+1.05V_MODPHY
PL10
PC107
*10U/6.3V_6
+1.05V
80/5A
35241
0.01U/25V_4
3VPCU_RST#
PC116
0.1U/10V_4
PR32
PR33
100K_4
PQ3B
2N7002KDW
6 1
2
+3VPCU
2
PQ2
100K/F_4
PR35
*22_8
3
1
PQ5
EMB20P03V
1 5
2
3
4
PC42
0.1U/25V_4
3
2
*100K_4
*2N7002K
PR38
DB
Modify
PC163
PR37
10K/F_4
PQ1
2N7002K
6
7
8
2
0.1U/25V_4
3
PQ4
2N7002K
1
PC37
*0.1U/10V_4
VDD_12V_AC_BAT_BASE +VIN
PC43
0.01U/50V_4
+3VPCU
PC44
0.1U/25V_4
+3VREG
PC122
PC136
0.1U/10V_4
0.1U/10V_4
PC100
0.1U/10V_4
PC48
*0.1U/10V_4
13
VOUT1
14
VOUT1
4
VBIAS
3
ON1
PC101
1500P/50V_4
MPHY_PWREN <9>
1
VIN12VIN1
PU7
APL3523A
CT1
12
SI
7
VIN26VIN2
CT2
10
PC102
470P/50V_4
D D
2.8A
+3V
PC108
*10U/6.3V_6
+5VS5
MAINON <23,32,33>
C C
B B
PR45
*0_4/S
1
A A
PROJECT : Nobel
PROJECT : Nobel
PROJECT : Nobel
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5/RD4
NB5/RD4
NB5/RD4
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
Intel Shark Bay ULT
Intel Shark Bay ULT
Intel Shark Bay ULT
Load switch
Load switch
Load switch
1
1A
1A
35 36 Thursday, September 12, 2013
35 36 Thursday, September 12, 2013
35 36 Thursday, September 12, 2013
1A
5
4
3
2
1
Touch PAD INT
Touch PAD/Screen I2C
I2C Level Shifter
Touch PAD INT
Touch PAD
Touch PAD
34
EN
EC_BASE_EN
D D
Touch Screen INT
I2C1
GPIO14
GPIO52
LPC
Battery Charger
CPU Haswell ULT
Home Key
Slate
Slate
Touch Screen
Control
LPC
SMBUS1
SMBUS2
LPC
SMB1
SMB2 Thermal IC
EC
Slate
EN
Docking
I2C Level Shifter
IC2 IC2 IC2
I2C0(S)
EC
BASE
I2C2(S)
Keyboard
I2C1(M)
Battery Charger
Base
Slate
C C
ALS
Capella CM32181
GIPO50
SENSOR_HUB_INT_LS
I2C0
Sensor Hub
STM32F103RBH6TRC13
I2C_1
Accelerometer + Magentometer
HP303DLHCTR
HP3GD20HTR
Gyro
B B
A A
PROJECT : Nobel
PROJECT : Nobel
PROJECT : Nobel
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5/RD4
NB5/RD4
NB5/RD4
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
Intel Shark Bay ULT
Intel Shark Bay ULT
Intel Shark Bay ULT
Power sequence and I2C
Power sequence and I2C
Power sequence and I2C
1
1A
1A
36 36 Thursday, September 12, 2013
36 36 Thursday, September 12, 2013
36 36 Thursday, September 12, 2013
1A