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HEWLETT-PACKARD COMPANY
3000 Hanover Street
Palo Alto, California 94304
U.S.A.
UNIX is a registered trademark in the United States and other
countries, licensed exclusively through X/Open Company Limited.
This manual describes the use of the Precision Architecture RISC
(PA-RISC) Assembler on HP 9000 computers.
You need to be familiar with the machine instructions to use the
Assembler. For a complete description of the machine instruction set,
refer to PA-RISC 1.1 Architecture and Instruction Set Reference Manual
and PA-RISC 2.0 Architecture.
Note that, throughout this manual, there are references to PA-RISC 1.0,
1.1, and 2.0. Each version of the architecture is a superset of the
preceding version.
Any program written for PA-RISC 1.0 machines will execute on PA-RISC
1.1 and 2.0 machines, but programs using instructions unique to
PA-RISC 1.1 will not execute on PA-RISC 1.0 machines. Any program
written for PA-RISC 1.1 machines will execute on PA-RISC 2.0
machines, but programs using features unique to PA-RISC 2.0 will not
execute on PA-RISC 1.1 or 1.0 machines.
Printing History
New editions are complete revisions of the manual. Technical
addendums or release notes may be released as supplements.
The software version is the version level of the software product at the
time the manual was issued. Many product updates and fixes do not
require manual changes and, conversely, manual corrections may be
done without accompanying product changes. Therefore, do not expect a
one-to-one correspondence between product updates and manual
updates.
EditionDate
First EditionNovember 1986
Update 1March 1987
Update 1 IncorporatedMay 1987
You may send any suggestions for improvements in this manual to:
Languages Information Engineering Manager
Hewlett-Packard Company
Mailstop 42UD
11000 Wolfe Road
Cupertino CA 95014-9804
Electronic Mail: editor@cup.hp.com
Software
Version
Audience
This manual assumes that you are an experienced assembly language
programmer. In addition, you should have detailed understanding of the
PA-RISC and hardw are features, and a working knowledge of the HP-UX
operating system, program structures, procedure calling conventions,
and stack unwind procedures.
Related Documentation
For more information on HP-UX programming, refer to the following
documents:
• PA-RISC 2.0 Architecture by Gerry Kane (Prentice-Hall, ISBN
0-13-182734-0)
12
• HP-UX Linker and Libraries Online User Guide, (ld +help)
• 64-bit Runtime Architecture for PA-RISC 2.0. URL:
http://www.software.hp.com/STK/
Unless otherwise noted in the text, this manual uses the following
symbolic conventions.
computer font Computer font indicates commands, keywords, options,
literals, source code, system output, and path names.
In syntax formats, computer font indicates commands,
keywords, and punctuation that you must enter exactly
as shown.
bold face
textIn examples, bold face text represents user input.
italic typeIn syntax formats, words or characters in italics
represent values that you must supply. Italics are also
used for book titles and for emphasis.
{ }In syntax formats, braces enclose a list from which you
must choose an item.
...In syntax formats, a horizontal ellipsis indicates that
you can repeat the preceding item one or more times.
name(N)An italicized word followed by a number in parentheses
indicates an entry in HP-UX Reference. For example,
cc(1) refers to the cc entry in Section 1 of HP-UX
Reference.
In This Manual
The manual is organized as follows:
Chapter 1Introduces the Assembler for HP 9000 computers.
Chapter 2Explains assembly language program structure.
13
Chapter 3Explains programming in Assembler for HP-UX.
Chapter 4Describes the PA-RISC Assembler directives and
pseudo-operations.
Chapter 5Summarizes the pseudo-instructions for the PA-RISC
machine instructions.
Chapter 6Describes the assembly (as) command and the ways to
invoke the PA-RISC Assembler under the HP-UX
operating system.
Chapter 7Contains several sample assembly language programs.
Chapter 8Lists the diagnostic messages that the PA-RISC
Assembler can generate.
Summary of Technical Changes for HP-UX
11.0
The following features have changed for HP-UX 11.00 to support
PA-RISC 2.0W (wide), 64-bit mode . These changes are explained in detail
in the appropriate locations in this manual.
• In 64-bit mode, the linkage pointer register is %r27. See Table 2-11,
“Available Field Selectors,” on page 31.
• In 64-bit mode, the Executable and Linking Format (ELF) uses
segments and sections rather than spaces and subspaces. See
“Sections in 64-bit Mode” on page 44.
• The Assembler ignores the .CALL directive. This means that your
program must ensure that the caller and called procedure agree on
argument locations. See “.CALL Directive” on page 63.
• The .CALLINFO directive parameters include updates to support
64-bit mode.
• You can specify 2.0W with the .LEVEL directive to tell the the
Assembler to generate 64-bit object code. For details, see “.LEVEL
Directive” on page 93.
• New and changed Assembler error messages. F or details , see Chapter
8, “Diagnostic Messages,” on page 141.
14
1Introduction to PA-RISC
Assembly Language
The HP 9000 Assembly Language represents machine language
instructions symbolically, and permits declaration of addresses
symbolically as well. The Assembler's function is to translate an
assembly language program, stored in a source file, into machine
language. The result of this translation resides in a relocatable object file.
The object file is relocatable because it can still be combined with other
relocatable object files and libraries. Therefore, it is necessary to relocate
any addresses that the Assembler chooses for the symbols in the source
program.
This process of combining object files and libraries is performed by the
linker, ld. The linker's task is to transform one or more relocatable
object files into an executable program file. Every program must be
linked before it can be executed, even if the source file is complete within
itself and does not need to be combined with other files.
Assembler Features
The Assembler provides a number of features to make assembly
language programming convenient. These features include:
• Mnemonic Instructions. Each machine instruction is represented
by a mnemonic operation code, which is easier to remember than the
binary machine language operation code. The operation code,
together with operands, directs the Assembler to output a binary
machine instruction to the object file.
• Symbolic Addresses. You can select a symbol to refer to the address
of a location in virtual memory. The address is often referred to as the
value of the symbol, which should not be confused with the value of
the memory locations at that address. These symbols are called
relocatable symbols because the actual addresses represented by such
symbols are subject to relocation by the linker.
• Symbolic Constants. A symbol can also be selected to stand for an
integer constant. These symbols are called absolute symbols because
the values of such symbols are not relocatable.
15
Introduction to PA-RISC Assembly Language
Assembler Features
• Expressions. Arithmetic expressions can be formed from symbolic
addresses and constants, integer constants, and arithmetic operators .
Expressions involving only symbolic and integer constants, or the
difference between two relocatable symbols, defined in the current
module, are called absolute expressions. They can be used wherever
an integer constant can be used. Expressions involving the sum or
difference of a symbolic address and an absolute expression are called
relocatable expressions or address expressions. The constant part of
an expression, the part that does not refer to relocatable expressions,
can use parenthesized subexpressions to alter operator precedence.
• Storage Allocation. In addition to encoding machine language
instructions symbolically, storage may be initialized to constant
values or simply reserved. Symbolic addresses and labels can be
associated with these memory locations.
• Symbol Scope. When two or more object files are to be combined by
the linker, certain symbolic addresses can be defined in one module
and used in another . Such symbols must beexported from the defining
module and imported into the using module. In the defining module,
the symbol has universal scope , while in the using module, the symbol
is unsatisfied. Other symbols declared in the source program that are
not exported have local scope.
• Subspaces and Location Counters. You can organize code and
data into separate subspaces, and into separate location counters
within each subspace. The programmer can move among the
subspaces and location counters, while the Assembler changes the
code and data into the correct order. In 64-bit mode, however, the
Executable and Linking Format (ELF) uses segments and sections
rather than spaces and subspaces.
• Macro Processing. A macro is a user-defined word, which is
replaced by a sequence of instructions. Including a macro in a source
program causes the sequence of instructions to be inserted into the
program wherever the macro appears.
16Chapter 1
Introduction to PA-RISC Assembly Language
Summary of Changes for PA-RISC 2.0
Summary of Changes for PA-RISC 2.0
The following features have changed in P A-RISC 2.0 arc hitecture. These
changes are explained in more detail in the appropriate locations in this
manual.
• A new .DWORD directive reserves 64 bits (a double word) of storage
and initializes it to the given value.
• A .LEVEL 2.0 directive should be used as the first directive in the
source file to assemble it for a PA-RISC 2.0 system.
• New +DA2.0 option
• New and changed Assembler error messages
Summary of Changes for PA-RISC 2.0W
(Wide Mode, 64-bit)
The Assembler for PA-RISC 2.0W, the 64-bit version of PA-RISC 2.0,
maintains the same source syntax as that of PA1.x and PA2.0 32-bit
mode versions. However, PA2.0W features differ in the features listed
below.
• To assemble a source file for a PA-RISC 64-bit system, use a .LEVEL
2.0W directive as the first directive in the source file. See “.LEVEL
Directive” on page 93.
• The Assembler generates an Executable and Linking Format (ELF)
object file format with PA-RISC 2.0W. Refer to the ELF 64 Object FileFormat, URL: http://www.software.hp.com/STK/ for details on ELF
format.
• PA-RISC 2.0W supports a flat virtual address space of 2**64 bytes,
and therefore does not support use of space registers. Use the
following syntax when memory operations are used:
ex: LDD disp(b), tgt
Chapter 117
Introduction to PA-RISC Assembly Language
Summary of Changes for PA-RISC 2.0W (Wide Mode, 64-bit)
You can explicitly use space registers, however, the Assembler issues
a warning if it is other than sr0.
• Some of the completers on ADDB and ADDIB instructions are not valid
for PA2.0W. In addition, new completers are available.
For example: ZNV, SV, and OD are not valid whereas *=, *<, and *<=
are additional completers.
Please refer to the PA-RISC 2.0 Architecture guide for details.
• The displacement on both general load/store and floating load/store
instructions can be up to 16 bits. For example,
ex: FLDD disp(b),tgt ; displacement can be up to 16 bits.
Please refer to PA-RISC 2.0 Architecture for details.
• Y ou must change any.WORD directives that are initialized with a code
symbol or data symbol to .DWORD.
• You can not use space identification operations such as MTSP and
LDSID used for dealing with space registers in user level code.
Currently, the Assembler does not give any warning.
• The procedure calling conventions are different in the HP-UX
PA-RISC 2.0 64-bit architecture. In PA 2.0W, you can pass the first
eight parameters in registers (arg0-arg7). In earlier versions (PA1.0
and PA1.1) and on PA-RISC 2.0, you can only pass the first four
parameters in registers(arg0-arg3). For more information, please
refer to the 64-bit Runtime Architecture for PA-RISC 2.0, at URL:
http://www.software.hp.com/STK/.
18Chapter 1
2Program Structure
An assembly language program is a sequence of statements. There are
three classes of statements:
• Instructions
• Pseudo-operations
• Directives
Instructions represent a single machine instruction in symbolic form.
Pseudo-operations cause the Assembler to initialize or reserve one or
more words of storage for data, rather than machine instructions.
Directives communicate information about the program to the
Assembler, but do not generally cause the Assembler to output any
machine instructions.
An assembly statement contains four fields:
• Label
• Opcode
• Operands
• Comments
Each of these fields is optional. However the operands field cannot
appear without an opcode field.The label field is used to associate a
symbolic address with an instruction or data location, or to define a
symbolic constant using the .EQU, .REG, or .MACRO directives. This field
is optional for all but a few statement types; if present, the label must
begin in column one of a source program line. If a label appears on a line
by itself, or with a comment only, the label is associated with the next
address within the same subspace and location counter.
When the label field begins with the pound sign (#) character, it is not
treated as a label. If # is followed by white space and an integer, the
Assembler's line number counter, used when reporting errors, is reset to
the value of the integer. Otherwise, the line beginning with # is ignored.
This feature is for the use of the C language preprocessor cpp.
The opcode field contains either a mnemonic machine instruction, a
pseudo-operation code, or the name of an Assembler directive. It must be
separated from the label field by a blank or tab. For certain machine
instructions, the opcode field can also contain completers, separated from
the instruction mnemonic by commas.
19
Program Structure
The machine instruction mnemonics and completers are described in the
PA-RISC 1.1 Architecture and Instruction Set Reference Manual and
PA-RISC 2.0 Architecture.
The operands field follows the opcode field, separated by a blank or tab.
Operands are separated by commas. The meaning of the operands
depends on the specific statement type, determined by the opcode.
The number of operands permitted or required depends upon the specific
instruction.
The comments field is introduced with a semicolon, and causes the
Assembler to ignore the remainder of the source line. A comment can
appear on a line by itself.
The following listing contains several assembly language statements.
The headings identify the four fields.
LabelOpcodeOperandsComments
JAN.EQU1;declares a symbolic constant
SUM.WORD0;reserve a word and set to zero
LOOPLDW4(%r1),%r2
Statements are normally written on separate lines. It is sometimes
useful, especially when using a macro preprocessor, to be able to write
several statements on one line. This can be done by separating the
statements with the “!” character. When this feature is used, a label can
be placed only on the first statement of the line, and a comment can only
follow the last statement on the line. The .LABEL directive can override
this condition by providing a means for declaring a label within a
multi-statement line.
20Chapter 2
Program Structure
Symbols and Constants
Symbols and Constants
Both addresses and constants can be represented symbolically. Labels
represent a symbolic address except when the label is on an .EQU, .REG,
or .MACRO directive. If the label is on an .EQU or .REG directive, the
label represents a symbolic constant. If the label is the .MACRO directive,
the label represents a macro name.
Symbols are composed of uppercase and lowercase letters (A-Z and a-z),
decimal digits (0-9), dollar signs ($), periods (.), ampersands (&), pound
signs (#), and underscores (_). A symbol can begin with a letter, digit,
underscore, or dollar sign. If a symbol begins with a digit it must contain
a non-digit character. (The predefined register symbols begin with a
percent sign (%).)
The Assembler considers uppercase and lowercase letters in symbols to
be distinct. The mnemonics for operation codes, directives, and
pseudo-operations can be written in either case. There is no explicit limit
on the length of a symbol. The following are examples of legal symbols:
LOOP|1Contains an illegal character
&st_timeBegins with &
123Does not contain a nondigit
Integer constants can be written in decimal, octal, or hexadecimal
notation, as in the C language. “Integer Constants” on page 22 lists the
ranges of these integer constants.
Chapter 221
Program Structure
Symbols and Constants
Table 2-1Integer Constants
SignedUnsigned
Decimal-2147483648
through
2147483647
Octal020000000000
through
017777777777
Hexadecimal0x80000000
through
0x7FFFFFFF
The period (.) is a special symbol reserved to denote the current offset of
the location counter. It is useful in address expressions to refer to a
location relative to the current instruction or data word. This symbol is
considered relocatable, and can be used anywhere a relocatable symbol
can be used, with the exception of the label field.
The period cannot be used in an expression involving another label, such
as sym+., sym-., .+sym, or .-sym. It can be used in an expression that
has only a constant, such as .+8 or .-8.
0
through
4294967295
0
through
037777777777
0
through
0xFFFFFFFF
22Chapter 2
Program Structure
Registers and Register Mnemonics
Registers and Register Mnemonics
PA-RISC processors have four sets of registers:
• General
• Floating-point
• Space
• Control
Data is loaded from memory into general or floating-point registers and
stored into memory from general or floating-point registers. Arithmetic
and logical operations are performed on the contents of the general
registers. On P A-RISC 1.0 or 1.1 each general register is 32 bits wide . On
PA-RISC 2.0 each general register is 64 bits wide. On PA-RISC 2.0W
(true 64-bit environment) each general register is 64 bits wide.
There are 32 general registers, denoted as %r0 through %r31. General
register %r0 is special because “writes” into it are ignored, and it always
reads as zero. The remaining general registers can be used normally,
with the caution that %r1 is the implicit target register for the ADDIL
instruction, %r31 is the implicit link register for theBLE instruction, and
for PA-RISC 2.0 only, %r2 is the implicit link register for the BLVE
instruction. Certain general registers also have predefined conventional
uses. Refer to “Register Procedure Calling Conventions” on page 28. You
can find detailed information on both 32-bit and 64-bit runtime
architecture under the topic PA-RISC Architecture at
http://www.software.hp.com/STK/.
PA-RISC 1.0 machines ha ve 16 floating-point registers; P A-RISC 1.1, 2.0,
and 2.0W (true 64-bit environment) machines have 32 floating-point
registers. Each register is capable of holding either a single- or
double-precision floating-point number in IEEE format. These registers
are denoted %fr0 through %fr15 for PA-RISC 1.0 and %fr0 through
%fr31 for PA-RISC 1.1, 2.0, and 2.0W.
Registers %fr1, %fr2, and %fr3 are exception registers and are not
available to the programmer. Floating-point register %fr0 contains a
permanent floating-point zero when used in an arithmetic operation;
when written or read with floating-point loads or stores, the
floating-point status register is actually accessed.
Chapter 223
Program Structure
Registers and Register Mnemonics
In addition, on PA-RISC 1.1, 2.0. and 2.0W the left and right halves of
the floating-point registers can be accessed as separate single-precision
registers by using an L or R suffix.
For example, %fr8R accesses the right-most 32 bits of %fr8 as a
single-precision number.
The L or R suffixes can only be used on the predefined floating-point
registers in the form %frnn, where nn is the register number. It is not
legal to use L or R with an integer value. For example, %fr8R is legal; 8R
is not legal.
The space registers form the basis of the virtual memory system. Each of
the eight space registers can hold a 16- or 32-bit space identifier,
depending on the hardware model. The space registers are denoted as
%sr0 through %sr7. Space register %sr0 is set implicitly by the BLE
instruction, and space registers %sr5 through %sr7 cannot be modified
except by code running at the most privileged level.
The control registers contain system-state information. There are 25
control registers, denoted as %cr0 and %cr8 through %cr31. Of these
registers, only %cr11 (%sar), the shift amount register, and %cr16
(%itmt), the interval timer, are normally accessible to the user-level
programmer. The other registers are accessed only by code running at
the most privileged level.
Register operands are denoted by register-typed constants because the
Assembler needs to be able to differentiate between general registers,
space registers, floating point registers, and ordinary integer constants.
To make assembly code more readable , you can use the.REG directive to
declare a symbolic name as an alias for a predefined register. The
predefined registers have a register type associated with them. The
Assembler enforces register type checking and issues a warning message
if the wrong kind of register is used within an operand. A warning is also
issued when an integer constant or absolute expression is found where a
register is expected. You must use the .REG directive to define symbolic
register names. If a symbolic name defined in an .EQU directive is used
where a register symbol is expected, the Assembler issues a warning
message, because it considers an .EQU defined symbol to be a simple
integer constant.
NOTEIf an absolute expression is used instead of a register or register-typed
symbol name, the Assembler issues warning message number 41.
24Chapter 2
This warning can be suppressed with the -w41 command-line option.
Future versions of the Assembler may not always allow an absolute
expression where a register is expected.
The following example demonstrates the correct usage of the .REG
directive:
tblptr.REG%r20
aka_tbl.REGtblptr
Predefined registers are shown in the following tables. All of the
mnemonics begin with the % character, so they do not conflict with any
programmer-defined symbols.
Some additional predefined register mnemonics are provided in
“Register Procedure Calling Conventions” on page 28 to match the
standard procedure-calling convention. This is discussed briefly in
“HP-UX Architecture Conventions” on page 39. You can find detailed
information on both 32-bit and 64-bit calling conventions under the topic
PA-RISC Architecture at URL: http://www.software.hp.com/STK/.
Table 2-7Register Procedure Calling Conventions
RegisterSynonymsDescription
%fr4%farg0 %fretFloating argument, return value
%fr5%farg1Second floating argument
%fr6%farg2Third floating argument
%fr7%farg3Fourth floating argument
%r2%rpReturn link
%r19%t4Fourth temporary register
%r20%t3Third temporary register
%r21%t2Second temporary register
%r22%t1First temporary register
%r23%arg3Argument word 3
%r24%arg2Argument word 2
%r25%arg1Argument word 1
%r26%arg0Argument word 0
%r27%dpData pointer
%r28%ret0Return value
%r29%ret1 %slReturn value, static link
%r30%spStack pointer
%r31%mrpMillicode return link
%sr1%sret %sargReturn value, argument
In addition, there is a special register mnemonic defined as
%previous_sp, that allows access to the previous value of the stack
pointer.
%previous_sp must be used in the position of a base register; it can be
used only between .ENTER and .LEAVE pseudo-operations.
%previous_sp is the same as %sp unless the current .PROC has a large
28Chapter 2
frame (that is, .CALLINFO specified FRAME > 8191) or .CALLINFO
specified .ALLOCA_FRAME. In those two cases, %previous_sp is the
same as %r3, and %r3 is set up by the .ENTER pseudo-operation.
Expressions
Arithmetic expressions are often valuable in writing assembly code. The
Assembler allows expressions involving integer constants, symbolic
constants, and symbolic addresses. These terms can be combined with
the standard arithmetic operators shown in “Standard Arithmetic
Operators” on page 29 or with bit-wise operators shown in “Bit-Wise
Operators” on page 29.
Table 2-8Standard Arithmetic Operators
OperatorOperation
+Integer addition
Program Structure
Expressions
-Integer subtraction
*Integer multiplication
/Integer division (result is truncated)
The multiplication and division operators have precedence over addition
and subtraction. That is, multiplications and divisions are performed
first from left to right, then additions and subtractions are performed
from left to right. Therefore, the expression 2+3*4 evaluates to 14.
Table 2-9Bit-Wise Operators
OperatorOperation
|Logical OR
&Logical AND
~Unary logical complement (tilde)
Chapter 229
Program Structure
Expressions
Expressions produce either an absolute or a relocatable result. Any
operation involving only absolute terms yields an absolute result.
Relocatable terms are allowed only for the + and - operators. The legal
combinations involving relocatable terms are shown in “Legal
Combinations For Relocatable Terms” on page 30.
Table 2-10Legal Combinations For Relocatable Terms
For more information on the term relocatable, refer to “Assembler
Features” on page 15.
NOTEThe combination “relocatable-relocatable+relocatable” is not permitted.
For example, assume the symbols MONTH and YEAR are relocatable, and
JANUARY and FEBRUARY are absolute. The expressions MONTH+JANUARY
and MONTH+FEBRUARY-4 are relocatable, while the expressions
YEAR-MONTH and FEBRUARY-4 are absolute. The expression
MONTH+JANUARY*4 is also legal and produces a relocatable result,
because JANUARY*4 is evaluated first, producing an absolute
intermediate result that is added to MONTH. The expression MONTH+YEAR
is illegal, because the sum of two relocatable terms is not permitted.
Because all instructions are a single word in length, it is not possible to
form a complete 32-bit address in a single instruction. Therefore, it is
likely that the Assembler (or linker) may not be able to insert the final
address of a symbol into the instruction as desired. For example, to load
the contents of a word into a register, the following instruction could be
used:
LDWSTART,%r2
Because LDW provides only 14 bits for the address of START, the
Assembler or linker prints an error message if the address of START
requires more than 14 bits. There are two instructions,LDIL and ADDIL,
whose function is to form the left-most 21 bits of a 32-bit address. The
succeeding instruction, by using the target of the LDIL or ADDIL as a
30Chapter 2
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