HP hp8662 schematic

HEWLETT-PACKARD

Technical Information from the Laboratories of Hewlett-Packard Company

JOURNAL

Contents-

processor-based

FEBRUARY 1981 Volume 32 • Number 2

A High-Purity, Fast-Switching Synthesized Signal Generator, by

phase noise and high frequency

Digital Control for a

Chisholm

Front-panel,

High-Performance

internal,

agility

are

Programmable Signal Generator, by Hamilton C.

and remote

usually

control

conflicting

of a complex instrument calls for a micro-

controller.

8662A Power-On and Self-Test Sequences, by Albert W.

Kovalick

Roland

requirements.

The ROM and RAM

Hassun

tests have some clever twists.

Low-Noise RF Signal Generator Design, by Dieter

liam J. Crilly, Jr., and Donald W.

Mathiesen

Scherer,

Bill S. Chan, Fred H.

Seven phase-locked loops and some innova-

tive techniques did the job.

A Switching Power Supply for a Low-Noise Signal Generator, by Gerald L Ainsworth

unusual

choice, because of switching noise, but the benefits outweighed the problems.

A High-Purity Signal Generator Output Section, by David L. Plan and Donald T. This section

supplies

a low-noise output with unprecedented

level

accuracy.

Product Design for Precision and Purity, by Robert L DeVries Shielding and reliability

are major considerations.

Verifying High Spectral Purity and Level Accuracy in Production,

John W. Richardson

The question is how to test a state-of-the-art product without losing production-line efficiency.

Low

Ives,

Wil-

Borowski

In this Issue:

The quality of a precision laboratory signal generator is measured by how little noise and

spurious signals are present in its output along with the single-frequency signal that's

supposed to be there. No noise at all is an impossible ideal, but the subject of this issue, Model | 8662A I now available in its frequency range, which is 0.01 to 1280 megahertz.

I transmitters and receivers, and for testing this kind of equipment. In these systems, informaI tion is superimposed on a single-frequency carrier signal by modulating the carrier's

amplitude, frequency, or phase. A noisy carrier, one whose phase or amplitude jitters significantly, can severely limit the performance of a system. Phase noise tends to be particularly troublesome, and so the measurement of phase noise has become especially important. For phase-noise measurements, the 8662A is used as a stable source with which to compare the equipment under test. These measurements are done in the development laboratory, in production (where the 8662A's programmability makes automatic testing possible), and in maintenance.

In receiver testing, an important measurement is adjacent channel selectivity, aimed at finding out how well a receiver picks up a weak signal in one of its channels when there are strong interfering signals in adjacent channels. A clean interfering signal is needed for this test so the performance that's measured is the receiver's and not the signal generator's. Today, channels are being made narrower in an attempt to accommodate more customers in an increasingly crowded electromagnetic spectrum. The narrower the channels, the cleaner the test signal must be; hence the need for the 8662A.

Many applications lie above the 8662A's frequency range, but even in these cases, the 8662A's output can often be multiplied to the needed frequency and still be clean enough, even though its phase noise is multiplied, too. Our cover suggests an application like this. The 8662A feeds a step-recovery diode multiplier to provide the transmitted signal in a pulsed Doppler radar system. (In practice, a pair of 8662As would be used to generate both the transmitted signal and the receiver local oscillator signal). The radar scope in the foreground belongs to

the U.S. Federal Aviation Administration's Oakland TRACON (Traffic Control). This radar actually operates at

1030

MHz, within the 8662A's frequency range. We thank the FAA for letting us photograph it.

Synthesized

Signal Generator, comes as close to the ideal as any signal generator

Where are such super-clean, stable signals needed? Mostly in communications and radar

Illustrator, Nancy S. Vanderbloom • Administrative Services, Typography, Anne S. LoPresti • European Production Manager, Dick Leeksma

Editor, Richard P.

2 HEWLETT-PACKARD JOURNAL FEBRUARY 1981

Dolan

• Associate Editor, Kenneth A. Shaw • Art Director, Photographer, Arvid A. Danielson

©Hewlett-Packard

-R. P. Do/an

Company 1981 Printed in U.S.A.

Fig. 1. Exceptionally low phase

noise and spurious output make

Model 8662A Synthesized Signal

Generator suitable for such demanding applications as receiver adjacent channel

selectivity

measurements with closely spaced channels and low-noise local oscil-

lator service. Fast frequency

switching and sweep capability make the 8662A useful in frequency-agile and swept local oscillato applications. All functions are remotely programmable.

FEBRUARY 1981 HEWLETT-PACKARD

JOURNALS

Spectral Purity

Spectral purity is a measure of how much the spectrum of the output of a signal generator deviates from that of a pure sine wave. Factors affecting spectral purity are:

• Phase noise, manifested as random fluctuations of zero crossings in the time domain and spectrum spreading in the fre-

quency domain

• AM noise, manifested as envelope fluctuations in the time domain and spectrum spreading in the frequency domain

•

Nonharmonically

called spurs

• Harmonically related sidebands caused by harmonic

distortion.

Phase noise is of particular importance in establishing the limits of many modern communications systems. Harmonic distortion, on the other hand, is not an important factor for the great majority

of applications in communications systems. It can be substan-

tially reduced by means of simple low-pass filtering.

AM noise levels are generally at least

levels in most signal sources. Furthermore, many operating systems rely on angle modulation (phase or frequency) and are

therefore not sensitive to AM noise.

Discrete sidebands can cause both amplitude and phase modulation but occupy a much more restricted portion of the spectrum than random modulation caused by random phase and

amplitude fluctuations.

The total unwanted power occupying a particular communication channel consists of the sum of the power in the discrete sidebands plus the integral of the noise power in the channel

bandwidth. Both components therefore need to be minimized.

Phase Noise

The spectrum spreading of the carrier that is caused by the existence of phase noise extends from less than 1 Hz offset from the carrier to wherever the effect of additive active device

MHz away from the carrier. Close-in phase noise is understood to include offsets within 5 kHz of the carrier, while far-out phase noise is understood to be that beyond 5 kHz.

Phase noise, or more generally, sideband noise (i.e., a combi-

nation of phase and AM noise), is responsible for limiting the

resolving power of heterodyne systems such as FM receivers and spectrum analyzers. Resolving power in this case means the ability to detect a small signal in the presence of a large one (see Fig.

1).

Most mobile communications systems of the frequency multi-

plex kind have channel

6.25-kHz

high density of communications traffic. The system's ability to extract a desired low-level signal from an undesired high-level one (a nearby transmitter, for example) is limited by the sideband

noise of the receiver local oscillator and the selectivity of the IF system. It is assumed in Fig. 1 that the received signals are spectrally pure. In fact, any sideband noise on the undesired high-

level signal has the same effect as noise on the local oscillator.

low-noise sources to simulate the undesired high-level signal.

channel spacing is now used in some areas having a

Selectivity tests on high-quality mobile FM receivers require

related discrete sidebands, sometimes

dB below phase noise

noise—thermal

noise—begins

to dominate. This could be several

spacings

that exceed 5 kHz.

Forexample,

Close-in Phase Noise

Many modern developments have created a need for good long-term stability and low close-in phase noise. Moving-targetindicator radars, navigation systems (e.g., Navstar), very-large-

baseline interferometry and PSK (phase-shift keying) represent some of the applications where close-in phase noise plays a

major role.

The measurement of close-in phase noise on RF and microwave sources is becoming a very fundamental one, because some crucial aspects of performance in the above-mentioned systems are related to this effect.

A common application for a low-noise signal generator such as the 8662A is as a reference source in phase-noise measurement

setups.1 The 8662A's combination of good long-term phase sta-

bility, excellent close-in phase noise and very good far-out phase noise makes it possible to test signal sources at offsets from the carrier ranging from fractions of a hertz to many MHz.

Frequency Agility

Several new communications networks have an additional requirement for frequency switching on the order of several milliseconds. To provide dynamic test conditions for these systems, it is necessary for the test signal source to settle to a new frequency in somewhat under a millisecond.

The combination of this level of agility, low close-in and far-out noise and spurious sidebands represents an unusual engineering

challenge. How these objectives were achieved in the 8662A is discussed in the accompanying article.

Reference

1. D. Scherer, "Design Principles and Test Methods for Low Phase Noise RF and Microwave Sources," Hewlett-Packard RF and Microwave Symposium,

-Roland

1979.

Hassun

This is accomplished by measuring the actual level with an accuracy of ±0.5 dB at a large number of frequencies, de-

termining the proper error

4 HEWLETT-PACKARD JOURNAL FEBRUARY

correction,

storing this informa-

tion in ROM, and then using it to correct the errors in output

level as a function of frequency and attenuator setting. The

8662A's unprecedented level accuracy is essential for accu-

rate receiver sensitivity measurements.

Although primarily designed for high signal purity, the

8662A's indirect-type oscillator switches frequency with a

typical 12 ms total switching time (to within 100 Hz). RF

settling time is 0.5 ms. For testing frequency-agile receiv-

ers, a special learn mode may be used with the HP-IB*

programming bus to drive frequencies directly from the

bus, with

500-ju.s

switching speed.

All other front-panel functions are programmable via the

HP-IB, which is a standard feature. The microprocessor also

provides powerful diagnostic and error routines to aid the

user and service routines to aid in maintenance.

Flexible Control

A major design objective of the front-panel layout was to

improve measurement efficiency so that engineering and

production test productivity could be increased. Key func-

tions are grouped centrally. Frequencies are key-set to 0.1 Hz (or 0.2 Hz) and levels to

0.1

dB resolution. Values can be

incremented or decremented with up/down keys or a rotary

knob after keying in the desired step size. A store/recall

function allows up to nine complete front-panel control

settings to be retained and recalled singly or in a sequence of up to 10 steps.

Most increment and sequence steps can be triggered by

rear-panel inputs. A series of pins available on a rear-panel connector allows certain commands to be executed when

one of the pins is connected to ground (a debounce circuit is provided internally) or pulsed with a negative-going TTL-

compatible pulse of at least

5-/us

duration. This allows out-

puts to be tied back to inputs directly, thus creating a sequential system, or through decision-making logic. For example, if the sweep output is tied to the step-up pin, the whole frequency range of the 8662A can be sequentially

swept in specified increments. If a detector circuit and some

logic are also used, then the sweeping action can be stopped whenever a signal is detected.

Powerful sweep capability that preserves synthesizer

stability, resolution, and accuracy makes the 8662A ideal

for characterizing high-stability components such as crys-

tal filters. Start/stop or span sweeps can be selected. Five key-set markers plus linear or log sweep are available. By

using the sequence

function,

multiple sweeps can be ob-

served simultaneously.

Full signal-generator capability is provided, with high-

performance AM and FM modulation. AM rates to 40 kHz are possible depending on modulation depth and carrier frequency. FM deviations to 200 kHz and rates to 100 kHz

are available for external modulation inputs. A 400 or

1000-Hz

Architecture

internal source can be selected.

The architecture of the 8662A reflects the major design

goals, which included low phase noise close to the carrier

(less than 5 kHz offsets), low phase noise far from the car-

rier, submillisecond frequency switching speeds, spurious

sidebands more than 90 dB below the carrier,

0.1-Hz

fre-

quency resolution, and quality modulation capability. The phase-locked loop approach to frequency synthesis

was chosen because these objectives could be met with

a lower level of product complexity. Fig. 2 is the 8662A

•Compatible

with

IEEE

488

block diagram.

Divide ratios have been chosen so that noise on any of the reference signals going into the phase detectors does not undergo multiplication by more than 2 at the output. The use of

fractional-N

divider techniques (see article, page 12)

allows the achievement of a specific frequency resolution

while maintaining a wider loop bandwidth (leading to

higher switching speed) than would be possible without the use of fractional-N. At the same time, the divide ratio is

kept small.

Sidebands caused by reference signals leaking into the

VCOs (voltage-controlled oscillators) are kept below -100 dBc on the output signal in the majority of cases. This is

accomplished by filtering, isolation, and shielding.

The provision of frequency modulation required the ad-

dition of two phase-locked loops in the block diagram. One

loop is used to generate the frequency modulated signal by

applying the modulating signal to the VCO. The loop bandwidth is less than the lowest modulating signal frequency. The other loop is used to sum the modulated signal into the system.

Fig. 3 shows typical 8662A single-sideband phase noise.

Below 10 kHz, phase noise of the reference section domi-

nates. From 10 to 500 kHz the reference loop and sum loop

determine the phase noise performance, while beyond 500

kHz the sum loop oscillator is the dominant phase noise source.

This noise profile indicates that the HP 8662A is not only

an RF synthesizer with exceptional close-in noise perfor-

mance, but that it can also compete well at farther-out offset

frequencies where cavity oscillators were traditionally far

superior. With its switching speed of 500

/us

(RF settling

time), the HP 8662A meets the usually conflicting require-

ments of low phase noise and high frequency agility.

Assuring Reliability

The required improvements in signal generator spectral

purity and switching speed have made the 8662A an ex-

tremely complex product. The design philosophy for com-

plex products must include reliability and serviceability to

achieve operating cost levels acceptable to the user. There-

fore, reliability and serviceability goals were an integral

part of the early 8662A definition along with performance and cost

objectives.

Reliability was the subject of significant planning throughout the course of the project. Management support at all levels was inspirational in steadfastly pursu-

ing a goal that is difficult to measure.

A number of steps were taken to make a substantial im-

provement in reliability. A series of educational sessions for

the project team were held by the corporate and divisional

reliability groups. The strong commitment of all team members to reliability was a significant factor in maintain-

ing the emphasis over a period of several years.

The main thrust of the reliability effort in the develop-

ment phase was the creation of an environment within the

product that would favor component longevity. It was de-

cided very early to limit semiconductor junction tempera-

tures to less than

the specified maximum of

110°C

when the ambient temperature is at

55°C.

Junction temperature is a

parameter that is directly related to semiconductor failure

rate. It was measured by making body temperature

mea-

FEBRUARY 1981 HEWLETT-PACKARD JOURNAL 5

surements

using thermocouples on well over 100 components at several stages throughout the development cycle. Junction temperature was then computed with the knowl-

edge of the power dissipated in the device and its published junction-to-body thermal resistance. The goal was met with the exception of a microwave transistor chip used in the

output amplifier, whose junction temperature can reach

125°C (computed) in the very worst case. The use of a

high-efficiency switching regulated power supply that

saves approximately 70W and a carefully planned thermal

design approach were necessities in achieving the junction temperature goal.

Another step taken was the reduction of electrical stress

on the components used. Power dissipation, voltage and

current were checked on all transistors and passive compo-

nents. The reliability group helped establish safe derated

limits to which the designers adhered. Design margins on such crucial parameters as phase-locked loop acquisition

ranges were made very substantial.

Humidity and condensation tests carried out in the

course of a battery of environmental tests revealed some harmful chemical action. Growth of a clear, amorphous, nonconducting substance gave rise to intermittent contact

between printed circuit board connector fingers and their

sockets. The microprocessor-based controller was espe-

cially vulnerable to this, since missing a single pulse can

change a legitimate instruction to an unintelligible stream

of information. A task force consisting mainly of product

assurance and printed circuit board processing groups

traced the problem to contaminants in the water used in

the wash cycle. They were eliminated and the problem went away.

A number of assemblies containing novel designs were

put through life tests. This included prolonged periods of

operation at elevated ambient temperature

(55°C).

Two of

four switched reactance oscillators exhibited identical fail-

ure modes on the tenth and eleventh days of testing. A thin

layer of insulation was punched through causing a

mal-

function. The condition was corrected. The life tests proved very useful in identifying a number of systematic problems that generally only show up after lengthy periods of time

and may not be diagnosed as problems when not viewed in

the context of a disciplined test.

Furthermore, a sufficient number of prototypes were

built, operated almost continuously, and exercised

whenever possible to uncover weaknesses. This intensive

search for problems proved quite effective.

Most of the semiconductors used in the product are

burned in according to a program developed by HP's Stanford Park Division product assurance group. A 5:1 reduc-

tion in failure rate has been observed in a pilot program.

Failures detected are carefully analyzed and when systematic patterns emerge, the suppliers of the faulty devices

are notified.

Acknowledgments

The 8662A was a large project that spanned a considerable period of time. Many people have contributed to it in various disciplines. The reliability of the product has benefitted both in planning and execution from the close involvement of the Stanford Park Division Reliability Group under the leadership of Julius Trager, especially Randy White and Charles Sallsey. Bill Whitney's leadership and

Gary Sprader's inputs were very valuable in the field of

serviceability. Introduction to manufacturing was planned

and organized by Bob

Ickes.

The long involvement of Marilyn Lawrence and Tom Cottrell as test technicians, together with the assembly team of Shirley Flock and Edna Fleck, was much appreciated by the R&D team. Marketing activity

was managed by Mike Gallagher. Original product defini-

tion benefited from the inputs of Ned Barnholt, Marc Saun-

ders and

Wally

Rasmussen. The development project took

place in the Stanford Park Division R&D lab managed by

John Page and was part of Brian Unter's R&D section re-

sponsibility. I also wish to acknowledge John Hasen's many contributions as a member of the design team, especially in the later stages of the project.

Roland Hassun

Roily

Hassun received his BSEE degree from the Politecnico di and his

MSEE

State University at San Jose in 1963. He's also done graduate work at Stanford University.

he worked on the

studies on transistor noise, designed

synthesizers, and ultimately served as project manager for the 8662A Signal Generator. He's lectured on synthesizers and spectral purity on three continents in three languages. This arti-

cle is his third contribution to the HP

Journal. A member

Computer Society, and committee nis, bridge and spy novels. He's interested in world affairs and has served as an officer of a large philanthropic organization, receiving its

leadership award.

for

the IEEE's 1981 western convention. Roily enjoys ten-

AFCEA,

FEBRUARY

he's vice chairman of the program

1981

HEWLETT-PACKARD

Milano

degree from California

After

joining

41OC

the IEEE, the IEEE

in 1960

1961,

Voltmeter, did

JOURNAL?

Digital Control for a

High-Performance

Programmable Signal Generator

by Hamilton C. Chisholm

CURRENT PRODUCTION INSTRUMENT, the

Hewlett-Packard 8660A Synthesized Signal Gen-

erator, successfully demonstrates the concept of

keyboard control of a signal generator. By means of the Hewlett-Packard Interface Bus

means of solving many instrumentation problems calling for remote control. This previous development served as a

guide in the planning of the 8662A Synthesized Signal Generator. Many enhancements were developed to pro-

vide full control of all parameters. The panel arrangement provides the operator with easily understood parameter control. Interaction with a responding parameter display reinforces the learning of short key sequences. Where func-

tion control is not obvious from the front panel, a pullout

card beneath the instrument quickly provides assistance.

The

8662A

is basically a signal source of sinusoidal fre-

quencies with exceptional purity. With the addition of

amplitude control and selectable amplitude and frequency

modulation, the source becomes a signal generator. With step time and step frequency control, the generator is en-

(HP-IB),*

it also provides a

hanced with frequency sweeping capabilities.

Controller Design

The block diagram of the digital control unit of the 8662A

is shown in Fig.

for eleven digits of frequency from 10

0.1-Hz

resolution (0.2-Hz resolution above 640 MHz). Four

digits of amplitude in either

latched out for the control of electronic and electromechan-

ical attenuation. Modulation drive in the form of two binary control words is latched out for either AM or FM. The HP

Interface Bus signals are conducted to the rear panel. An additional set of external inputs can be used to control the functions increment up, increment down, start sweep, stop sweep, single sweep, and sequence. Also, a set of lines from

The controller has latched driver outputs

kHz

1.28

GHz with

dBm,

mV,

fj,V

units are also

the linear circuits provides the controller with information

pertaining to malfunctions of these circuits. All told, 132

lines are exercised by the digital control unit.

The choice of the 6800 microprocessor for the 8662A

•Compatible

with

IEEE 488-1978.

control unit was based on the 6800's advanced 8-bit concept, a system of components that includes the 6820 Peripheral Interface Adaptor and compatible ROM and

RAM devices, and availability within HP of suitable assem-

bler and loader programs that operate in HP computers.

The 8662A control system is designed with modularity

for servicing in mind. Access to all circuit boards is assured

by clever configuration of the card frame and by a tilt-down

front panel. The microprocessor circuitry and a few com-

ponents for signature analysis are on the processor control

board. Two boards with 12 kilobytes each of constitute major memory. The RAM board with 2 kilobytes

of CMOS RAM provides nonvolatile memory for variables,

stored parameters, and stored information for nine blocks of front-panel data (more about this later).

An input board provides malfunction inputs and the in-

terface to the keyboard and the set of external inputs. Two output boards contain the latched drivers for frequency and

modulation. The display board contains latching LED numeric displays and latched drivers for backlighted nomenclature. Readout control is nonscanning to avoid any radio frequency interference. All of the circuitry necessary for the HP-IB, including 2 kilobytes of program memory, is

on a card that can be removed from the controller without impairing normal local-mode operation.

The keyboards have specially designed keys to meet re-

quirements of random positioning, low profile, minimum spacing, and control LED lighting. The keystroke is short and has positive tactile feel. Gold plated, bifurcated spring

contacts make reliable, wiping contact with printed circuit

pads on boards that are readily serviceable.

Keyboard Operations

The central portion of the keyboard, on the sloping panel,

contains the major function qualifier keys and the numeric keypad. The expected key sequence is left to right: selection

of function, then numeric data, followed by execution with

a units key such as MHz. The numbers are visible in the function display as entered. When the units key is held

down, the justified entry is held visible. This is useful in the

x 8 PROM

8 HEWLETT-PACKARD JOURNAL FEBRUARY 1981

Fig. 1. Digital control unit of the

8662A Synthesized Generator exercises 132 control lines.

Signal

8662A Power-On and Self-Test

Sequences

by Albert W. Kovalick

With the introduction of microprocessor-based "smart" instruments, many conveniences were gained. However, some features of worth were lost. A typical instrument without a smart controller has the ability to remember user settings by virtue of its front-panel mechanical switches and dial settings. Most smart

instruments, on the other hand, require the user to key in most front-panel settings each time power is switched on. An alternative is to use the HP-IB and program the instrument externally. For simple stand-alone applications, however, manual initialization of

the instrument is a drawback.

The 8662A Synthesized Signal Generator solves this problem

by using a CMOS RAM powered by a battery to keep a record of all front-panel settings. When the user turns off the synthesizer or the power fails, the existing front-panel setting is saved. When power is restored the last saved front-panel setting is restored.

Power-on Sequence

When the 8662A is switched on, a hardware power-on circuit

resets all hardware functions and causes the controller program

to begin. Before the settings are restored a checksum is com-

puted from the saved front-panel data. This is compared to a reference checksum. If both checksums match, a software routine restores all frequency, modulation, and amplitude settings. If the checksums disagree, RAM data has been altered. This is unlikely, but it can occur if the battery discharges. In this event, the first valid front-panel setting from the store/recall memory is recalled. If all nine settings contain altered data then a default setting of 100 MHz and

RAM Testing

Testing of the entire 2K bytes of RAM is performed each time the instrument is switched on. This power-on RAM test checks for stuck bits in every RAM location without destroying any RAM data. Before the test can begin, a small section or kernel of RAM is tested. This kernel is needed to perform the larger 2K-byte test.

Each bit of RAM is now tested for the ability to found faulty, a user code is displayed to indicate this. By use of a special function code, a user may access this same test and run it

when desired.

A second, more extensive test is accessible by calling a routine in the diagnostics ROM. It is different from the simpler test in three ways. First, it checks for the case of multiple chips enabled. Second, it tests for CMOS memory fade problems. Last, it tests for

row/column decoding errors internal to the chips. This test is

exhaustive. It runs for about

chips.

The test for multiple chips enabled must be performed before

decoding problems can be detected. If more than one RAM chip is enabled, a read or write will affect more than the desired RAM.

The test is structured as follows.

All memory cleared to zero

2. Store a single RAM ID number in each RAM. RAM 1 (0-255) has a solitary 1 stored. RAM 2 (see

Fig.

3. The contents of the RAMs are now summed individually. If the sum of each RAM is equal to its original RAM ID number, then no RAMs are selected out of their address range.

4. If one or more RAMs are selected out of their address space

1a).

-30

dBm is used.

toggle.

If any bits are

1.5

minutes and pinpoints any faulty

(256-511)

has a 2 stored and

soon

then the RAM data will not sum to the value of the RAM ID

number (see Fig. faulty RAM number is displayed.

If no multiple read/write problems are detected then an exhaustive test for internal row/column decoding is performed. First, a memory location is set to a known value. Next, all remaining locations in each RAM are checked for alteration. If any data alteration is found, then the bad RAM is identified. Each memory

1b).

The bad chip is now identified and the

cell is similarly tested.

Finally, a data fade test is performed. Due to the inherent capacitive memory effect of CMOS memory, it is possible to store a 1 or 0 even though a given RAM cell is bad. This is a temporary memory effect, and leakage. We detect a fade problem by testing data over a period greater than one second.

ROM Testing

The 8662A has 26 ROMs that contain the operating program. The traditional method used to test a ROM is by use of a checksum. The reference checksums are usually stored in known

locations and compared to calculated checksums for each ROM

to prove ROM validity. This technique has the disadvantage of

storing the reference checksum. If it is stored in a known location outside the ROM, then when a ROM is modified, its reference

Fig.

(a) To detect multiple chips enabled, each RAM has only one number stored. The value is the same as its RAM ID number. Each stored value is at a different location to avoid

overlap,

(b) Example of multiple chip selection. RAM 3 was selected during RAM 2 addressing due to a faulty chip select decoder. The sum of RAM 3 data is 5, not 3 as it should be. Because of inherent sum of RAM 2 is 2, even though RAM 3 is selected.

time, the data fades away because of

wired-ANDing

on the RAM data bus, the

FEBRUARY 1981 HEWLETT-PACKARD

JOURNALS

checksum must also be changed. Hence, two ROMs may need changing. On the other hand, if each ROM has its checksum stored within it, then an exact location is required and this may interrupt the program code.

We have chosen to allocate the negative value of the checksum dynamically. Suppose a sequence of assembly language code could be produced that would not affect program operation and would rarely, if ever, be produced by a programmer. A branch around a

Once the program development is almost complete, this two-line code segment After assembly is complete the machine code is run through a second program to locate the two-line segment. Next, this program computes the checksum of all ROM data excluding the NOP. The NOP is then replaced by the two's complement of the checksum. The controller program is not affected by this change

MOP

(no operation) falls into this category.

PROGRAM CODE

BRA +3

NOP

PROGRAM CODE

inserted roughly into the middle of each ROM.

due to the branch. Computing the checksum of a given ROM yields zero as a result if all data is valid. The programmer never

needs to worry about the value of the checksum or the

location. To allow for easy ROM identification the actual value of

the total computed checksum can be one for ROM

ROM #2, and so on. This allows for easy detection of ROMs.

Albert W. Kovalick

Kovalick joined HP in receiving his MSEE degree from the

University

He's designed printer drive circuitry

for handheld and desktop cal-

culators and contributed to the design of the controller software and

power supply of the 8662A Signal

Generator. He's named as an inven-

tor on two patents and three pend-

ing patents. Al was born Francisco and now lives in Santa Clara, California. His wife, who works in HP's R&D labs as a programmer, has also contributed an

article to the HP Journal. Al is active in his church and enjoys read-

ing, woodworking, racquetball, and recreational mathematics.

of California at Berkeley.

MOP

#1,

two for

misloaded

1974

after

San

frequency mode where the display may be configured for

sweep display while a new parameter is entered. Should the

operator begin an entry but not complete

it,

the display can

be restored by striking any function select key.

The

INCR

SET key is

common

to all

function

keys

and a

function key qualifies its use in entering increment values. The justified value may be viewed on entry by holding the units key down. An increment value may be viewed at any

time

selecting

the

function,

then

holding

the

INCR

SET

key down.

The right-hand position of the keyboard contains mod-

ifiers in the form of increment up and down keys and a rotary control for manual tuning. The increment up and

down keys are qualified by the selected function. Holding either key down will cause a succession of increments at a

rate

of two per

second.

The

rotary

RESOLUTION

control

enabled for every new function by pressing either the x 10 or

-MO

key. Holding either of these down will enable blinking

of a digit that denotes the resolution digit to which the rotary control will apply. The digit may be moved by re-

peatedly keying

x10

-MO

to get ten times more or less

resolution.

The

increment

value

previously

entered

via the

INCR

SET

key may be used by the rotary control as its entry value. This

mode is enabled by pressing the blue key and then the

key,

which

has the

shifted

function

INCR

printed

beside

-MO

it.

Another useful mode is the separation of rotary control

operation from the increment key operation with respect to

function. For example, while in the amplitude mode, the

blue

key and

shift

key

HOLD

(x 10) are

pressed

succession.

Then when frequency is selected as the operating function,

the amplitude may be adjusted with the rotary control and

the frequency incremented with the increment up and

down keys.

Sweep Control

The left-hand keyboard contains all the sweep parameter

keys. Either a start/stop sweep or a span-type sweep may be

selected. Parameters are entered, for instance, by keying

START

FREQ,

numerics

and

units.

The start/stop sweep may be reversed by giving start a

larger frequency value than stop. The sweep step size and step time keys indicate the selected value with integral LEDs. Once selected, the values are remembered. A change from span to start/stop sweep, with different step size and time values, will be indicated by the LEDs in the keytops.

Execution

AUTO

SINGLE

sweep

will

cause a split

dis-

play in the frequency window, five digits for each of the two

frequency

parameters.

When

MANUAL

sweep

selected,

full eleven-digit sweep frequency display is presented. Control of the sweep is provided by dedicated use of the

rotary knob in the right-hand portion of the keyboard. Any

signal generator parameter value may be changed while in

the sweeping mode.

Up to five digital sweep frequency markers are selectable.

Each marker is entered as a frequency. The rear-panel out-

put for sweep markers provides Z-axis beam intensifying potential to give a bright CRT spot on an oscilloscope. Each spot may be identified on the CRT by holding the selected

marker key down. Each marker may be moved on the CRT

by means of the increment keys or the rotary control. When a marker key is held down, its frequency value is displayed.

Front-Panel Storage

To ease user operation of the 8662A, nine front-panel

configurations can be stored in memory. Each stored con-

figuration includes every parameter set on the front panel. Thus at any time, any of several totally different panel configurations can be recalled. This helps to reduce test setup time.

10 HEWLETT-PACKARD JOURNAL FEBRUARY 1981

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