HP 8540p, 8540w Schematics

A

1 1

B

C

D

E

Compal Confidential

Schematics Document

2 2

AUBURNDALE/CLARKSFIELD with
Intel IBEX PEAK-M core logic

Versace

3 3

2009-07-24

REV:0.4

4 4

http://hobi-elektronika.net

A

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2008/09/15 2009/09/15

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Custom

D

Date: Sheet

Compal Electronics, Inc.

Cover Sheet

LA-4951P

E

0.4

of

148Tuesday, July 28, 2009

A

Compal Confidential

File Name : Versace

Thermal Sensor
ADM1032

1 1

Display Port X 2
(Docking)

CRT to Docking

Page 29

Page 29

CRT+USB X
2 CONN

Express Card 54

& Card Reader

Sub-board

Page 30

*

2 2

PCI-E BUS

10/100/1000 LAN

Intel Hanksville-LM

82577LM

RJ45 CONN

3 3

MXM 3.0 Type A Connector

Page 21

**

DP conn

Page 20

WLAN Card

Page 24

PCI BUS

Page 22

Page 23

1394 port

B

Fan Control

Page 4Page 4

LCD conn

USB3.0 X 2

UPD720200F1

RICOH 835

Page 32

Card Reader
Conn

Page 20Page 19

Page 27

C

Versace

Mobile

PEG

LPC BUS

CPU Qual Core

Clarkesfield

Socket-rPGA989

37.5mm*37.5mm

Page 4,5,6,7,8

DMI X4

Intel Ibex Peak M

1071pins

25mm*27mm

Page 13,14,15,16,17,18

ONFI Interface

Braidwood

Page 28

Mini-Card
NAND Flash

Channel A

Channel B

USB X 2 (For I/O)

Page 19

USB2.0

Azalia

SATA0

SATA1

SATA2

USB2.0

D

DDR3-SO-DIMM X 2DDR3 1066/1333MHz 1.5V

BANK 0, 1, 2, 3

DDR3-SO-DIMM X 2DDR3 1066/1333MHz 1.5V

BANK 0, 1, 2, 3

USB x2(Docking)

*

USB x1(Sub/B for Exp Card)

Page 9

Page 10

Page 33

FingerPrinter VFM451
USBx1

Page 28

USB conn x 1 (For I/O)

BT Conn USB x 1
USB x1(Camera)

USB X1(WWAN Card)

Page 26

Page 20

Page 24

MDC V1.5

92HD75

*

Audio CKT

Sub-board

SATA ODD Connector

2.5" SATA HDD Connector

ESATA Connector

Page 25

Page 30

Page 13

Page 13

Page 13

Page 34

daughter board

RJ11 CONN

E

Accelerometer

LIS302DLTR

Page 31

XDP Conn.

Page 4

CK505

Clock Generator
ICS9LPRS397

Page 12

Page 23

LED

Page 29

Power OK CKT.

Docking CONN.

(2) PS/2 Interfaces
(2) USB 2.channels
(2) SATA Channels (SATA3&4)
(2) Display Port Channels
(1) Serial Port
(1) Parallel Port
(1) Line In
(1) Line Out
(1) RJ45 (10/100/1000)

4 4

(1) VGA
(1) 2 LAN indicator LED's
(1) Power Button
(1) I2C interface

Page. 27

http://hobi-elektronika.net

A

SLB9635TT

Page 28 page 31

Touch Pad CONN.

Page 25

TrackPoint CONN.

Page 25

SPI ROM
4MB X 2

Page 27

B

TPM1.2

SMSC KBC
1098

Int.KBD

Page 25

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DIS CLOSE D TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Super I/O
LPC47N217

COM1
( Docking )

Page 28

C

Page 33

LPT
( Docking )

2008/09/15 2009/09/15

*:

**:

Page 28

Compal Secret Data

Deciphered Date

We will inatll them on same sub
board via a board to board
connector.

Daughtor board for stack-up
USB CONN and VGA CONN.

Title

Size Document Number Rev

Custom

Date: Sheet

D

Power On/Off CKT.

DC/DC Interface CKT.

Compal Electronics, Inc.

Block Diagram

LA-4951P

E

Page 33

Page 25

Page 34

248Tuesday, July 28, 2009

0.4

of

A

Voltage Rails

power
plane

State

( O MEANS ON X MEANS OFF )

+RTCVCC

+B
+3VL +0.75V

+5VALW
+3VALW

+1.5V

+5VS
+3VS
+1.5VS
+NVVDD
+VCCP
+CPU_CORE
+1.05VS
+1.8VS

Symbol Note :

: means Digital Ground

: means Analog Ground

Install below 43 level BOM structure for ver. 0.1

S0

S1

S3

S5 S4/AC

S5 S4/ Battery only

S5 S4/AC & Battery
don't exist

1 1

O
O
O
O
O
O

O
O
O
O
O

X

O
O
O
O

X

O

XX
X

XX X

OO
OO

X

X

DEBUG@ : means just b uild w hen P CIE port 80 CARD function enable.
M92@ : Install for M92 Graphic controller
8072@ : Install for 8072 NIC controller
1098@ : Install for 1098 KBC controller
CK32@ : Ins ta ll for 32 pin CLOCK GEN

Install below 45 level BOM structure for ver. 0.1

45@ : means ju st put it in the BOM of 45 level.

Remove before MP

Reserve below BOM structure for ver. 0.1

@ : means just reserve , no build
CONN@ : means ME part.
M93@ : Install for M93 Graphic controller
8075@ : Install for 8075 NIC controller

SMBUS Control Table

SOURCE

BATT

THERMAL

SODIMM CLK CHIP

XDP G-SENSOR

MINI CARD

DOCK

NIC

SENSOR

1091@ : Install for 1091 KBC controller
CK72@ : Ins ta ll for 72 pin CLOCK GEN

SMB_EC_CK1
SMB_EC_DA1

SMBCLK
SMBDATA

SML0CLK
SML0DATA

SML1CLK
SML1DATA

SMSC1098

Calpella

Calpella

Calpella

V

X
X
X

http://hobi-elektronika.net

X

XX

VV

X

X

XX

X

VV

X

X

XX

X

V

X
X

XX
X

V

X

X
X

V

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

X
X
X

V

2008/09/15 2009/09/15

A

Compal Secret Data

Deciphered Date

Title

Size Document Number Re v

Custom

Date: Sheet

Compal Electronics, Inc.

Notes List

LA-4951P

0.4

of

348Tuesday, July 28, 2009

5

Thermal Sensor EMC2113 with CPU PWM FAN

+3VS

Change R5 to 22ohm
from 68ohm. 11/30

R5
22_0402_5%

1 2

D D

+3VS_THER

1

C2

2

H_THERMTRIP#

H_THERMTRIP#

C C

Change Q24.2 connect from +3VS to PWR_GD. 12/11

R35 10K_0402_5%

FAN_PWM31

R13 10K_0402_5%

+3VS

THERM_SCI#16,21

0.1U_0402_16V4Z

R18

1 2

+3VS

10K_0402_5%@

Add PD R211 for FAN_PWM. 11/30

FAN_PWM

Q24
2N7002_SOT23-3

D

1 3

Layout note:

1. Place C1 & C408 close to U1 pin.

2. Place U1 close to JCFAN1.

H_THERMDA

1 2

C1 2200P_0402_50V7K

1 2

FAN_PWM

1 2

1 2

R21 0_0402_5%

SMB_DATA_S39,10,12,14,26

R211 10K_0402_5%

1 2

S

G

2

H_THERMTRIP#_U1 21

PWR_GD 11,13,31,34

U1
EMC2113-2-AX_QFN16_4X4

1

DN

2

DP

3

VDD

4

PWM_IN

5

ADDR_SEL

6

ALERT#

7

SYS_SHDN#

8

SMDATA

17

SHDN_SEL

GND

DP2/DN3
DN2/DP3

TRIP_SET

GND

PWM

TACH

SMCLK

Add C408. 11/30

REMOTE2+H_THERMDC

16

REMOTE2-

15

R9 2.05K_0402_1%

1 2

14

R10 6.8K_0402_5%

1 2

13
12

FAN_PWM_OUT

11

TACH

10
9

REMOTE thermal sensor

Layout note:

1. Place Q1 close to bottom DDR DIMM.

1 2

C

Q1

2

B

MMBT3904W_SOT323-3

E

3 1

Layout Note:
place near the hottest spot area for

NB & top SODIMM.

H_THERMDA

100P_0402_50V8J

H_THERMDC

C3

4

Change
R10 to

6.8K to
setup Q1
E-diode1.
12/04

1 2

C4082200P_0402_50V7K

+3VS

R133

1 2

10K_0402_5%

SMB_CLK_S3 9,10,12,14,26

Install R133. 7/14

Intel S3

Change from +1.5V. 7/8

VCCP_1.5VSPWRGD11

+3VS

Layout rule 10mil wi：dth trace
length < 0.5", spacing 20mil

+VCCP

H_PECI16

H_PROCHOT#43

H_THERMTRIP#16

H_CPUPWRGD16

R33 1.5K_0402_1%

R34 750_0402_1%

H_PROCHOT#

H_CPURST#

H_PM_SYNC15

H_CPUPWRGD

H_CPUPWRGD

PM_DRAM_PWRGD15

VTTPWRGOOD34

BUF_PLT_RST#16

12
12

VDDPWRGOOD_R

Change R33, R34 value. 7/10

3

R1 20_0402_1%

1 2

R2 20_0402_1%

1 2

R3 49.9_0402_1%

1 2

R4 49.9_0402_1%

1 2

TP_SKTOCC#

T1PAD

H_CATERR#

1 2

R8 49.9_0402_1%

1 2

R11 0_0402_5%

1 2

R16 0_0402_5%

1 2

R22 0_0402_5%

1 2

R24 0_0402_5%

1 2

R25 0_0402_5%

1 2

R26 0_0402_5%

1 2

R27 0_0402_5%

1 2

R28 0_0402_5%

1 2

R30 0_0402_5%

1 2

R31 1.5K_0402_1%

H_PECI_ISO

H_PROCHOT#_D

H_THERMTRIP#_RH_THERMTRIP#

H_CPURST#_R

H_PM_SYNC_R

VCCPWRGOOD_1

VCCPWRGOOD_0

VDDPWRGOOD_R

H_PWRGD_XDP_RH_PWRGD_XDP

PLT_RST#_R

12

R32
750_0402_1%

AT23
AT24

G16

AT26

AH24

AK14

AT15

AN26

AK15

AP26

AL15

AN14

AN27

AK13

AM15

AM26

AL14

JCPU1B

COMP3
COMP2
COMP1
COMP0

SKTOCC#

CATERR#

PECI

PROCHOT#

THERMTRIP#

RESET_OBS#

PM_SYNC

VCCPWRGOOD_1

VCCPWRGOOD_0

SM_DRAMPWROK

VTTPWRGOOD

TAPPWRGOOD

RSTIN#

Intel S3

VDDPWRGOOD_R

MISC THERMAL

CLOCKS

DDR3

PWR MANAGEMENT

JTAG & BPM

R751 1.1K_0402_1%@

12

2

BCLK

BCLK#

BCLK_ITP

BCLK_ITP#

PEG_CLK

PEG_CLK#

DPLL_REF_SSCLK

DPLL_REF_SSCLK#

SM_DRAMRST#

SM_RCOMP[0]
SM_RCOMP[1]
SM_RCOMP[2]

PM_EXT_TS#[0]
PM_EXT_TS#[1]

MISC

PRDY#
PREQ#

TRST#

TDI_M

TDO_M

DBR#

BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
BPM#[4]
BPM#[5]
BPM#[6]
BPM#[7]

IC,AUB_CFD_rPGA,R1P0

+1.5VS_CPU_VDDQ

Removed RP1 & RP3 connect to U3. 10/27

A16
B16

CLK_CPU_XDP

AR30

CLK_CPU_XDP#

AT30
E16

D16
A18

A17

F6
AL1

AM1
AN1

AN15
AP15

AT28
AP27

AN28

TCK

AP28

TMS

AT27
AT29

TDI

AR27

TDO

AR29
AP29

AN25

AJ22
AK22
AK24
AJ24
AJ25
AH22
AK23
AH23

Intel doc 395136:
Remove R6 & R7 connect to GND directly. 11/06

SM_RCOMP0

R12 100_0402_1%

SM_RCOMP1

R14 24.9_0402_1%

SM_RCOMP2

R15 130_0402_1%

PM_EXTTS#0

R17 10K_0402_5%

PM_EXTTS#1

R19 0_0402_5%
R20 10K_0402_5%

XDP_PRDY#
XDP_PREQ#

XDP_TCK
XDP_TMS
XDP_TRST#

XDP_TDI
XDP_TDO
XDP_TDI_M
XDP_TDO_M

XDP_DBRESET#

XDP_BPM#0_R
XDP_BPM#1_R
XDP_BPM#2_R
XDP_BPM#3_R
XDP_BPM#4
XDP_BPM#5
XDP_BPM#6
XDP_BPM#7

CLK_CPU_BCLK_P 16
CLK_CPU_BCLK#_P 16

CLK_EXP 14
CLK_EXP# 14

1 2
1 2
1 2

1 2
1 2
1 2

Place close to JCPU1.

R23 51_0402_5%@

Follow DIOR's design. 2/20

XDP_DBRESET# 13,15

R126 0_0402_5%

1 2

R127 0_0402_5%

1 2

R141 0_0402_5%

1 2

R142 0_0402_5%

1 2

Place close to JCPU1.

H_PROCHOT#_D

R29 68_0402_5%

1 2

1 2

1

SM_DRAMRST# 11

+VCCP
+VCCP

XDP_BPM#0
XDP_BPM#1
XDP_BPM#2
XDP_BPM#3

PM_EXTTS#1_R 9,10

+VCCP

FAN Connector

+5VS

R40

1 2

+5VS+3VS

No install R41. 7/14

R41

1 2

10K_0402_5%

10K_0402_5%

@

4
3
2
1

JCFAN1

4
3
2

GND

1

GND

ACES_50273-0040N-001CONN@

XDP_BPM#05
XDP_BPM#15

XDP_BPM#25
XDP_BPM#35

CFG175
CFG165

6
5

+VCCP

H_CPUPWRGD

1

C4

0.1U_0402_16V4Z@

2

4

R45 1K_0402_5%

1 2

PM_PWRBTN#_R13,15

H_PWRGD_XDP

Disconnect from
SMB_DATA/CLK_S3. 0206

R47 0_0402_5%

1 2

B B

Remove D29 to
prevent FAN fully
turn issue. 7/2

A A

FAN_PWM_OUT
TACH

5

XDP_PREQ#
XDP_PRDY#

XDP_BPM#0
XDP_BPM#1

XDP_BPM#2
XDP_BPM#3

XDP_BPM#4
XDP_BPM#5

XDP_BPM#6
XDP_BPM#7

H_CPUPWRGD_R

T90PAD
T91PAD

XDP_TCK

XDP Connector

JXDP1

1

GND0

3

OBSFN_A0

5

OBSFN_A1

7

GND2

9

OBSDATA_A0

11

OBSDATA_A1

13

GND4

15

OBSDATA_A2

17

OBSDATA_A3

19

GND6

21

OBSFN_B0

23

OBSFN_B1

25

GND8

27

OBSDATA_B0

29

OBSDATA_B1

31

GND10

33

OBSDATA_B2

35

OBSDATA_B3

37

GND12

39

PWRGOOD/HOOK0

41

HOOK1

43

VCC_OBS_AB

45

HOOK2

47

HOOK3

49

GND14

51

SDA

53

SCL

55

TCK1

57

TCK0

59

GND16

SAMTE_BSH-030-01-L-D-A CONN@

XDP_RST#_R

1 2

R54 0_0402_5%@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONF IDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE C OMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFOR MATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

OBSFN_C0
OBSFN_C1

OBSDATA_C0
OBSDATA_C1

OBSDATA_C2
OBSDATA_C3

OBSFN_D0
OBSFN_D1

OBSDATA_D0
OBSDATA_D1

OBSDATA_D2
OBSDATA_D3

ITPCLK/HOOK4

ITPCLK#/HOOK5

VCC_OBS_CD

RESET#/HOOK6

DBR#/HOOK7

PLT_RST#

2

GND1

4
6
8

GND3

10
12
14

GND5

16
18
20

GND7

22
24
26

GND9

28
30
32

GND11

34
36
38

GND13

GND15

TRST#

GND17

TD0

TMS

CLK_CPU_XDP

40

CLK_CPU_XDP#

42
44

XDP_RST#_R

46

XDP_DBRESET#_R

48
50

XDP_TDO

52

XDP_TRST#

54

XDP_TDI

56

TDI

XDP_TMS

58
60

PLT_RST# 13,16,21,22,24,27,28,30

2008/09/15 2009/09/15

Compal Secret Data

CFG8 5
CFG9 5

CFG0 5
CFG1 5

CFG2 5
CFG3 5

CFG10 5
CFG11 5

CFG4 5
CFG5 5

CFG6 5
CFG7 5

R48 1K_0402_5%

1 2

R49 0_0402_5%

1 2

R51 51_0402_5%

1 2

Deciphered Date

Swap. 02/25

2

+VCCP

H_CPURST#

XDP_DBRESET#

+3VS

R43
1K_0402_5%

1 2

H_CPURST#_R

R36 68_0402_5%@

1 2

Remove R37, R38, R39. 2/17

XDP_TDO

R42 51_0402_5%

1 2

2/20.

Delete R44, R46, R52, R53, R50 and
short XDP_TDI_M to XDP_TDO_M (pins
AR29 and AP29 of JCPU1) like DIOR

Title

Size Document Number Re v

Custom

Date: Sheet

Compal Electronics, Inc.

Clarksfield(1/5)-Thermal/XDP

LA-4951P

+VCCP

1

448Tuesday, July 28, 2009

0.4

of

http://hobi-elektronika.net

5

D D

4

3

2

1

JCPU1E

AP25

RSVD1

CFG7
CFG4
CFG3

CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
CFG18

AL25

RSVD2

AL24

RSVD3

AL22

RSVD4

AJ33

RSVD5

AG9

RSVD6

M27

RSVD7

L28

RSVD8

J17

SA_DIMM_VREF

H17

SB_DIMM_VREF

G25

RSVD11

G17

RSVD12

E31

RSVD13

E30

RSVD14

AM30

CFG[0]

AM28

CFG[1]

AP31

CFG[2]

AL32

CFG[3]

AL30

CFG[4]

AM31

CFG[5]

AN29

CFG[6]

AM32

CFG[7]

AK32

CFG[8]

AK31

CFG[9]

AK28

CFG[10]

AJ28

CFG[11]

AN30

CFG[12]

AN32

CFG[13]

AJ32

CFG[14]

AJ29

CFG[15]

AJ30

CFG[16]

AK30

CFG[17]

H16

RSVD_TP_86

B19

RSVD15

A19

RSVD16

A20

RSVD17

B20

RSVD18

U9

RSVD19

T9

RSVD20

AC9

RSVD21

AB9

RSVD22

C1

RSVD_NCTF_23

A3

RSVD_NCTF_24

J29

RSVD26

J28

RSVD27

A34

RSVD_NCTF_28

A33

RSVD_NCTF_29

C35

RSVD_NCTF_30

B35

RSVD_NCTF_31

IC,AUB_CFD_rPGA,R1P0

RSVD_NCTF_37

RSVD_NCTF_40
RSVD_NCTF_41

RSVD_NCTF_42
RSVD_NCTF_43

RSVD_NCTF_54
RSVD_NCTF_55
RSVD_NCTF_56
RSVD_NCTF_57

RESERVED

Change net name. 7/9

JCPU1A

DMI_CRX_PTX_N015
DMI_CRX_PTX_N115
DMI_CRX_PTX_N215
DMI_CRX_PTX_N315

DMI_CRX_PTX_P015
DMI_CRX_PTX_P115
DMI_CRX_PTX_P215
DMI_CRX_PTX_P315

C C

DMI_CTX_PRX_N015
DMI_CTX_PRX_N115
DMI_CTX_PRX_N215
DMI_CTX_PRX_N315

DMI_CTX_PRX_P015
DMI_CTX_PRX_P115
DMI_CTX_PRX_P215
DMI_CTX_PRX_P315

B B

R61 1K_0402_5%

R65 1K_0402_5%

12

12

A24
C23
B22
A21

B24
D23
B23
A22

D24
G24
F23
H23

D25
F24
E23
G23

E22
D21
D19
D18
G21
E19
F21
G18

D22
C21
D20
C18
G22
E20
F20
G19

F17
E17

C17
F18

D17

DMI_RX#[0]
DMI_RX#[1]
DMI_RX#[2]
DMI_RX#[3]

DMI_RX[0]
DMI_RX[1]
DMI_RX[2]
DMI_RX[3]

DMI_TX#[0]
DMI_TX#[1]
DMI_TX#[2]
DMI_TX#[3]

DMI_TX[0]
DMI_TX[1]
DMI_TX[2]
DMI_TX[3]

FDI_TX#[0]
FDI_TX#[1]
FDI_TX#[2]
FDI_TX#[3]
FDI_TX#[4]
FDI_TX#[5]
FDI_TX#[6]
FDI_TX#[7]

FDI_TX[0]
FDI_TX[1]
FDI_TX[2]
FDI_TX[3]
FDI_TX[4]
FDI_TX[5]
FDI_TX[6]
FDI_TX[7]

FDI_FSYNC[0]
FDI_FSYNC[1]

FDI_INT
FDI_LSYNC[0]

FDI_LSYNC[1]

Intel doc 395136:
Tie FDI_F(L)SYNC[0:1]

via 1 1K to GND. (11/05)

A A

IC,AUB_CFD_rPGA,R1P0

PEG_ICOMPI

PEG_ICOMPO

PEG_RCOMPO

PEG_RBIAS
PEG_RX#[0]

PEG_RX#[1]
PEG_RX#[2]

DMI Intel(R) FDI

PEG_RX#[3]
PEG_RX#[4]
PEG_RX#[5]
PEG_RX#[6]
PEG_RX#[7]
PEG_RX#[8]

PEG_RX#[9]
PEG_RX#[10]
PEG_RX#[11]
PEG_RX#[12]
PEG_RX#[13]
PEG_RX#[14]
PEG_RX#[15]

PEG_RX[0]
PEG_RX[1]
PEG_RX[2]
PEG_RX[3]
PEG_RX[4]
PEG_RX[5]
PEG_RX[6]
PEG_RX[7]
PEG_RX[8]

PEG_RX[9]
PEG_RX[10]
PEG_RX[11]
PEG_RX[12]
PEG_RX[13]
PEG_RX[14]
PEG_RX[15]

PEG_TX#[0]
PEG_TX#[1]
PEG_TX#[2]
PEG_TX#[3]
PEG_TX#[4]
PEG_TX#[5]
PEG_TX#[6]
PEG_TX#[7]
PEG_TX#[8]
PEG_TX#[9]

PEG_TX#[10]
PEG_TX#[11]
PEG_TX#[12]
PEG_TX#[13]
PEG_TX#[14]

PCI EXPRESS -- GRAPHICS

PEG_TX#[15]

PEG_TX[0]
PEG_TX[1]
PEG_TX[2]
PEG_TX[3]
PEG_TX[4]
PEG_TX[5]
PEG_TX[6]
PEG_TX[7]
PEG_TX[8]

PEG_TX[9]
PEG_TX[10]
PEG_TX[11]
PEG_TX[12]
PEG_TX[13]
PEG_TX[14]
PEG_TX[15]

Layout rule trace len：gth < 0.5"

EXP_ICOMPI

R55 49.9_0402_1%

B26
A26
B27

EXP_RBIAS

A25

PCIE_CRX_GTX_C_N0

K35

PCIE_CRX_GTX_C_N1

J34

PCIE_CRX_GTX_C_N2

J33

PCIE_CRX_GTX_C_N3

G35

PCIE_CRX_GTX_C_N4

G32

PCIE_CRX_GTX_C_N5

F34

PCIE_CRX_GTX_C_N6

F31

PCIE_CRX_GTX_C_N7

D35

PCIE_CRX_GTX_C_N8

E33

PCIE_CRX_GTX_C_N9

C33

PCIE_CRX_GTX_C_N10

D32

PCIE_CRX_GTX_C_N11

B32

PCIE_CRX_GTX_C_N12

C31

PCIE_CRX_GTX_C_N13

B28

PCIE_CRX_GTX_C_N14

B30

PCIE_CRX_GTX_C_N15

A31

PCIE_CRX_GTX_C_P0

J35

PCIE_CRX_GTX_C_P1

H34

PCIE_CRX_GTX_C_P2

H33

PCIE_CRX_GTX_C_P3

F35

PCIE_CRX_GTX_C_P4

G33

PCIE_CRX_GTX_C_P5

E34

PCIE_CRX_GTX_C_P6

F32

PCIE_CRX_GTX_C_P7

D34

PCIE_CRX_GTX_C_P8

F33

PCIE_CRX_GTX_C_P9

B33

PCIE_CRX_GTX_C_P10

D31

PCIE_CRX_GTX_C_P11

A32

PCIE_CRX_GTX_C_P12

C30

PCIE_CRX_GTX_C_P13

A28

PCIE_CRX_GTX_C_P14

B29

PCIE_CRX_GTX_C_P15

A30

PCIE_CTX_GRX_C_N0

L33

PCIE_CTX_GRX_C_N1

M35

PCIE_CTX_GRX_C_N2

M33

PCIE_CTX_GRX_C_N3

M30

PCIE_CTX_GRX_C_N4

L31

PCIE_CTX_GRX_C_N5

K32

PCIE_CTX_GRX_C_N6

M29

PCIE_CTX_GRX_C_N7

J31

PCIE_CTX_GRX_C_N8

K29

PCIE_CTX_GRX_C_N9

H30

PCIE_CTX_GRX_C_N10

H29

PCIE_CTX_GRX_C_N11

F29

PCIE_CTX_GRX_C_N12

E28

PCIE_CTX_GRX_C_N13

D29

PCIE_CTX_GRX_C_N14

D27

PCIE_CTX_GRX_C_N15

C26

PCIE_CTX_GRX_C_P0

L34

PCIE_CTX_GRX_C_P1

M34

PCIE_CTX_GRX_C_P2

M32

PCIE_CTX_GRX_C_P3

L30

PCIE_CTX_GRX_C_P4

M31

PCIE_CTX_GRX_C_P5

K31

PCIE_CTX_GRX_C_P6

M28

PCIE_CTX_GRX_C_P7

H31

PCIE_CTX_GRX_C_P8

K28

PCIE_CTX_GRX_C_P9

G30

PCIE_CTX_GRX_C_P10

G29

PCIE_CTX_GRX_C_P11

F28

PCIE_CTX_GRX_C_P12

E27

PCIE_CTX_GRX_C_P13

D28

PCIE_CTX_GRX_C_P14

C27

PCIE_CTX_GRX_C_P15

C25

1 2

R56 750_0402_1%

1 2

C662 0.1U_0402_16V4Z

1 2

C663 0.1U_0402_16V4Z

1 2

C664 0.1U_0402_16V4Z

1 2

C665 0.1U_0402_16V4Z

1 2

C666 0.1U_0402_16V4Z

1 2

C667 0.1U_0402_16V4Z

1 2

C668 0.1U_0402_16V4Z

1 2

C669 0.1U_0402_16V4Z

1 2

C670 0.1U_0402_16V4Z

1 2

C671 0.1U_0402_16V4Z

1 2

C672 0.1U_0402_16V4Z

1 2

C673 0.1U_0402_16V4Z

1 2

C674 0.1U_0402_16V4Z

1 2

C675 0.1U_0402_16V4Z

1 2

C676 0.1U_0402_16V4Z

1 2

C677 0.1U_0402_16V4Z

1 2

C678 0.1U_0402_16V4Z

1 2

C679 0.1U_0402_16V4Z

1 2

C680 0.1U_0402_16V4Z

1 2

C681 0.1U_0402_16V4Z

1 2

C682 0.1U_0402_16V4Z

1 2

C683 0.1U_0402_16V4Z

1 2

C684 0.1U_0402_16V4Z

1 2

C685 0.1U_0402_16V4Z

1 2

C686 0.1U_0402_16V4Z

1 2

C687 0.1U_0402_16V4Z

1 2

C688 0.1U_0402_16V4Z

1 2

C689 0.1U_0402_16V4Z

1 2

C690 0.1U_0402_16V4Z

1 2

C691 0.1U_0402_16V4Z

1 2

C692 0.1U_0402_16V4Z

1 2

C693 0.1U_0402_16V4Z

1 2

C5 0.1U_0402_16V4Z

1 2

C6 0.1U_0402_16V4Z

1 2

C7 0.1U_0402_16V4Z

1 2

C8 0.1U_0402_16V4Z

1 2

C9 0.1U_0402_16V4Z

1 2

C10 0.1U_0402_16V4Z

1 2

C11 0.1U_0402_16V4Z

1 2

C12 0.1U_0402_16V4Z

1 2

C13 0.1U_0402_16V4Z

1 2

C14 0.1U_0402_16V4Z

1 2

C15 0.1U_0402_16V4Z

1 2

C16 0.1U_0402_16V4Z

1 2

C17 0.1U_0402_16V4Z

1 2

C18 0.1U_0402_16V4Z

1 2

C19 0.1U_0402_16V4Z

1 2

C20 0.1U_0402_16V4Z

1 2

C21 0.1U_0402_16V4Z

1 2

C22 0.1U_0402_16V4Z

1 2

C23 0.1U_0402_16V4Z

1 2

C24 0.1U_0402_16V4Z

1 2

C25 0.1U_0402_16V4Z

1 2

C26 0.1U_0402_16V4Z

1 2

C27 0.1U_0402_16V4Z

1 2

C28 0.1U_0402_16V4Z

1 2

C29 0.1U_0402_16V4Z

1 2

C30 0.1U_0402_16V4Z

1 2

C31 0.1U_0402_16V4Z

1 2

C32 0.1U_0402_16V4Z

1 2

C33 0.1U_0402_16V4Z

1 2

C34 0.1U_0402_16V4Z

1 2

C35 0.1U_0402_16V4Z

1 2

C36 0.1U_0402_16V4Z

1 2

PCIE_CRX_GTX_N0 21
PCIE_CRX_GTX_N1 21
PCIE_CRX_GTX_N2 21
PCIE_CRX_GTX_N3 21
PCIE_CRX_GTX_N4 21
PCIE_CRX_GTX_N5 21
PCIE_CRX_GTX_N6 21
PCIE_CRX_GTX_N7 21
PCIE_CRX_GTX_N8 21
PCIE_CRX_GTX_N9 21
PCIE_CRX_GTX_N10 21
PCIE_CRX_GTX_N11 21
PCIE_CRX_GTX_N12 21
PCIE_CRX_GTX_N13 21
PCIE_CRX_GTX_N14 21
PCIE_CRX_GTX_N15 21

PCIE_CRX_GTX_P0 21
PCIE_CRX_GTX_P1 21
PCIE_CRX_GTX_P2 21
PCIE_CRX_GTX_P3 21
PCIE_CRX_GTX_P4 21
PCIE_CRX_GTX_P5 21
PCIE_CRX_GTX_P6 21
PCIE_CRX_GTX_P7 21
PCIE_CRX_GTX_P8 21
PCIE_CRX_GTX_P9 21
PCIE_CRX_GTX_P10 21
PCIE_CRX_GTX_P11 21
PCIE_CRX_GTX_P12 21
PCIE_CRX_GTX_P13 21
PCIE_CRX_GTX_P14 21
PCIE_CRX_GTX_P15 21

PCIE_CTX_GRX_N0 21
PCIE_CTX_GRX_N1 21
PCIE_CTX_GRX_N2 21
PCIE_CTX_GRX_N3 21
PCIE_CTX_GRX_N4 21
PCIE_CTX_GRX_N5 21
PCIE_CTX_GRX_N6 21
PCIE_CTX_GRX_N7 21
PCIE_CTX_GRX_N8 21
PCIE_CTX_GRX_N9 21
PCIE_CTX_GRX_N10 21
PCIE_CTX_GRX_N11 21
PCIE_CTX_GRX_N12 21
PCIE_CTX_GRX_N13 21
PCIE_CTX_GRX_N14 21
PCIE_CTX_GRX_N15 21

PCIE_CTX_GRX_P0 21
PCIE_CTX_GRX_P1 21
PCIE_CTX_GRX_P2 21
PCIE_CTX_GRX_P3 21
PCIE_CTX_GRX_P4 21
PCIE_CTX_GRX_P5 21
PCIE_CTX_GRX_P6 21
PCIE_CTX_GRX_P7 21
PCIE_CTX_GRX_P8 21
PCIE_CTX_GRX_P9 21
PCIE_CTX_GRX_P10 21
PCIE_CTX_GRX_P11 21
PCIE_CTX_GRX_P12 21
PCIE_CTX_GRX_P13 21
PCIE_CTX_GRX_P14 21
PCIE_CTX_GRX_P15 21

R57 3.01K_0402_1%@

R58 3.01K_0402_1%@
R59 3.01K_0402_1%@

R60 3.01K_0402_1%

12

12
12

12

CFG84

CFG94
CFG104
CFG114

XDP_BPM#04
XDP_BPM#14
XDP_BPM#24
XDP_BPM#34

CFG164

Add per XDP DG. 11/13
Change R120, R122, R123,

R125 to NI. 11/30

CFG174

R120 0_0402_5%@

1 2

R122 0_0402_5%@

1 2

R123 0_0402_5%@

1 2

R125 0_0402_5%@

1 2

CFG74
CFG44
CFG34
CFG04

CFG14
CFG24

CFG54
CFG64

V_CPU_DDR_REF0

V_CPU_DDR_REF1

T16 PAD

R68 0_0402_5%@

1 2

R69 0_0402_5%@

1 2

RSVD32
RSVD33

RSVD34
RSVD35

RSVD36

RSVD38
RSVD39

RSVD45
RSVD46
RSVD47
RSVD48
RSVD49
RSVD50
RSVD51
RSVD52
RSVD53

RSVD58

RSVD_TP_59
RSVD_TP_60

RSVD62
RSVD63
RSVD64
RSVD65

RSVD_TP_66
RSVD_TP_67
RSVD_TP_68
RSVD_TP_69
RSVD_TP_70
RSVD_TP_71
RSVD_TP_72
RSVD_TP_73
RSVD_TP_74
RSVD_TP_75

RSVD_TP_76
RSVD_TP_77
RSVD_TP_78
RSVD_TP_79
RSVD_TP_80
RSVD_TP_81
RSVD_TP_82
RSVD_TP_83
RSVD_TP_84
RSVD_TP_85

KEY

VSS

AJ13
AJ12

AH25
AK26

AL26
AR2

AJ26
AJ27

AP1
AT2

AT3
AR1

AL28
AL29
AP30
AP32
AL27
AT31
AT32
AP33
AR33
AT33
AT34
AP35
AR35
AR32

E15
F15
A2
D15
C15

R63 0_0402_5%@

AJ15

R64 0_0402_5%@

AH15

AA5
AA4
R8
AD3
AD2
AA2
AA1
R9
AG7
AE3

V4
V5
N2
AD5
AD7
W3
W2
N3
AE5
AD9

R70 0_0402_5%@

AP34

1 2
1 2

M_CLK_A_DDR2 9
M_CLK_A_DDR#2 9
DDR_CKE2_DIMMA 9
DDR_CS2_DIMMA# 9
M_A_ODT2 9
M_CLK_A_DDR3 9
M_CLK_A_DDR#3 9
DDR_CKE3_DIMMA 9
DDR_CS3_DIMMA# 9
M_A_ODT3 9

M_CLK_B_DDR2 10
M_CLK_B_DDR#2 10
DDR_CKE2_DIMMB 10
DDR_CS2_DIMMB# 10
M_B_ODT2 10
M_CLK_B_DDR3 10
M_CLK_B_DDR#3 10
DDR_CKE3_DIMMB 10
DDR_CS3_DIMMB# 10
M_B_ODT3 10

1 2

5

http://hobi-elektronika.net

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONF IDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE C OMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFOR MATION IT CONTAINS

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2008/09/15 2009/09/15

Compal Secret Data

Deciphered Date

2

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

Clarksfield(2/5)-DMI/PEG/FDI

LA-4951P

1

548Tuesday, July 28, 2009

of

0.4

5

4

3

2

1

DDR_B_D[0..63]

DDR SYSTEM MEMORY - B

SB_CK[0]
SB_CK#[0]
SB_CKE[0]

SB_CK[1]
SB_CK#[1]
SB_CKE[1]

SB_CS#[0]
SB_CS#[1]

SB_ODT[0]
SB_ODT[1]

SB_DM[0]
SB_DM[1]
SB_DM[2]
SB_DM[3]
SB_DM[4]
SB_DM[5]
SB_DM[6]
SB_DM[7]

SB_DQS#[0]
SB_DQS#[1]
SB_DQS#[2]
SB_DQS#[3]
SB_DQS#[4]
SB_DQS#[5]
SB_DQS#[6]
SB_DQS#[7]

SB_DQS[0]
SB_DQS[1]
SB_DQS[2]
SB_DQS[3]
SB_DQS[4]
SB_DQS[5]
SB_DQS[6]
SB_DQS[7]

SB_MA[0]
SB_MA[1]
SB_MA[2]
SB_MA[3]
SB_MA[4]
SB_MA[5]
SB_MA[6]
SB_MA[7]
SB_MA[8]

SB_MA[9]
SB_MA[10]
SB_MA[11]
SB_MA[12]
SB_MA[13]
SB_MA[14]
SB_MA[15]

W8
W9
M3

V7
V6
M2

AB8
AD6

AC7
AD1

D4
E1
H3
K1
AH1
AL2
AR4
AT8

D5
F4
J4
L4
AH2
AL4
AR5
AR8

C5
E3
H4
M5
AG2
AL5
AP5
AR7

U5
V2
T5
V3
R1
T8
R2
R6
R4
R5
AB5
P3
R3
AF7
P5
N1

DDR_B_DM0
DDR_B_DM1
DDR_B_DM2
DDR_B_DM3
DDR_B_DM4
DDR_B_DM5
DDR_B_DM6
DDR_B_DM7

DDR_B_DQS#0
DDR_B_DQS#1
DDR_B_DQS#2
DDR_B_DQS#3
DDR_B_DQS#4
DDR_B_DQS#5
DDR_B_DQS#6
DDR_B_DQS#7

DDR_B_DQS0
DDR_B_DQS1
DDR_B_DQS2
DDR_B_DQS3
DDR_B_DQS4
DDR_B_DQS5
DDR_B_DQS6
DDR_B_DQS7

DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8
DDR_B_MA9
DDR_B_MA10
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13
DDR_B_MA14
DDR_B_MA15

M_CLK_B_DDR0 10
M_CLK_B_DDR#0 10
DDR_CKE0_DIMMB 10

M_CLK_B_DDR1 10
M_CLK_B_DDR#1 10
DDR_CKE1_DIMMB 10

DDR_CS0_DIMMB# 10
DDR_CS1_DIMMB# 10

M_B_ODT0 10
M_B_ODT1 10

DDR_B_DM[0..7]

DDR_B_DQS#[0..7]

DDR_B_DQS[0..7]

DDR_B_MA[0..15]

DDR_B_DM[0..7] 10

DDR_B_DQS#[0..7] 10

DDR_B_DQS[0..7] 10

DDR_B_MA[0..15] 10

DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D8
DDR_B_D9
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_D48
DDR_B_D49
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63

DDR_B_D[0..63]10

JCPU1D

B5

SB_DQ[0]

A5

SB_DQ[1]

C3

SB_DQ[2]

B3

SB_DQ[3]

E4

SB_DQ[4]

A6

SB_DQ[5]

A4

SB_DQ[6]

C4

SB_DQ[7]

D1

SB_DQ[8]

D2

SB_DQ[9]

F2

SB_DQ[10]

F1

SB_DQ[11]

C2

SB_DQ[12]

F5

SB_DQ[13]

F3

SB_DQ[14]

G4

SB_DQ[15]

H6

SB_DQ[16]

G2

SB_DQ[17]

J6

SB_DQ[18]

J3

SB_DQ[19]

G1

SB_DQ[20]

G5

SB_DQ[21]

J2

SB_DQ[22]

J1

SB_DQ[23]

J5

SB_DQ[24]

K2

SB_DQ[25]

L3

SB_DQ[26]

M1

SB_DQ[27]

K5

SB_DQ[28]

K4

SB_DQ[29]

M4

SB_DQ[30]

N5

SB_DQ[31]

AF3

SB_DQ[32]

AG1

SB_DQ[33]

AJ3

SB_DQ[34]

AK1

SB_DQ[35]

AG4

SB_DQ[36]

AG3

SB_DQ[37]

AJ4

SB_DQ[38]

AH4

SB_DQ[39]

AK3

SB_DQ[40]

AK4

SB_DQ[41]

AM6

SB_DQ[42]

AN2

SB_DQ[43]

AK5

SB_DQ[44]

AK2

SB_DQ[45]

AM4

SB_DQ[46]

AM3

SB_DQ[47]

AP3

SB_DQ[48]

AN5

SB_DQ[49]

AT4

SB_DQ[50]

AN6

SB_DQ[51]

AN4

SB_DQ[52]

AN3

SB_DQ[53]

AT5

SB_DQ[54]

AT6

SB_DQ[55]

AN7

SB_DQ[56]

AP6

SB_DQ[57]

AP8

SB_DQ[58]

AT9

SB_DQ[59]

AT7

SB_DQ[60]

AP9

SB_DQ[61]

AR10

SB_DQ[62]

AT10

SB_DQ[63]

AB1

SB_BS[0]

W5

SB_BS[1]

R7

SB_BS[2]

AC5

SB_CAS#

Y7

SB_RAS#

AC6

SB_WE#

JCPU1C

SA_DQ[0]
SA_DQ[1]
SA_DQ[2]
SA_DQ[3]
SA_DQ[4]
SA_DQ[5]
SA_DQ[6]
SA_DQ[7]
SA_DQ[8]
SA_DQ[9]
SA_DQ[10]
SA_DQ[11]
SA_DQ[12]
SA_DQ[13]
SA_DQ[14]
SA_DQ[15]
SA_DQ[16]
SA_DQ[17]
SA_DQ[18]
SA_DQ[19]
SA_DQ[20]
SA_DQ[21]
SA_DQ[22]
SA_DQ[23]
SA_DQ[24]
SA_DQ[25]
SA_DQ[26]
SA_DQ[27]
SA_DQ[28]
SA_DQ[29]
SA_DQ[30]
SA_DQ[31]
SA_DQ[32]
SA_DQ[33]
SA_DQ[34]
SA_DQ[35]
SA_DQ[36]
SA_DQ[37]
SA_DQ[38]
SA_DQ[39]
SA_DQ[40]
SA_DQ[41]
SA_DQ[42]
SA_DQ[43]
SA_DQ[44]
SA_DQ[45]
SA_DQ[46]
SA_DQ[47]
SA_DQ[48]
SA_DQ[49]
SA_DQ[50]
SA_DQ[51]
SA_DQ[52]
SA_DQ[53]
SA_DQ[54]
SA_DQ[55]
SA_DQ[56]
SA_DQ[57]
SA_DQ[58]
SA_DQ[59]
SA_DQ[60]
SA_DQ[61]
SA_DQ[62]
SA_DQ[63]

SA_BS[0]
SA_BS[1]
SA_BS[2]

SA_CAS#
SA_RAS#
SA_WE#

DDR_A_D[0..63]

SA_CK[0]
SA_CK#[0]
SA_CKE[0]

SA_CK[1]
SA_CK#[1]
SA_CKE[1]

SA_CS#[0]
SA_CS#[1]

SA_ODT[0]
SA_ODT[1]

SA_DM[0]
SA_DM[1]
SA_DM[2]
SA_DM[3]
SA_DM[4]
SA_DM[5]
SA_DM[6]
SA_DM[7]

SA_DQS#[0]
SA_DQS#[1]
SA_DQS#[2]
SA_DQS#[3]
SA_DQS#[4]
SA_DQS#[5]
SA_DQS#[6]
SA_DQS#[7]

SA_DQS[0]
SA_DQS[1]
SA_DQS[2]
SA_DQS[3]
SA_DQS[4]
SA_DQS[5]
SA_DQS[6]
SA_DQS[7]

DDR SYSTEM MEMORY A

SA_MA[0]

SA_MA[1]

SA_MA[2]

SA_MA[3]

SA_MA[4]

SA_MA[5]

SA_MA[6]

SA_MA[7]

SA_MA[8]

SA_MA[9]

SA_MA[10]
SA_MA[11]
SA_MA[12]
SA_MA[13]
SA_MA[14]
SA_MA[15]

AA6
AA7
P7

Y6
Y5
P6

AE2
AE8

AD8
AF9

B9
D7
H7
M7
AG6
AM7
AN10
AN13

C9
F8
J9
N9
AH7
AK9
AP11
AT13

C8
F9
H9
M9
AH8
AK10
AN11
AR13

Y3
W1
AA8
AA3
V1
AA9
V8
T1
Y9
U6
AD4
T2
U3
AG8
T3
V9

DDR_A_DM0
DDR_A_DM1
DDR_A_DM2
DDR_A_DM3
DDR_A_DM4
DDR_A_DM5
DDR_A_DM6
DDR_A_DM7

DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_DQS#3
DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#7

DDR_A_DQS0
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS3
DDR_A_DQS4
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS7

DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13
DDR_A_MA14
DDR_A_MA15

M_CLK_A_DDR0 9
M_CLK_A_DDR#0 9
DDR_CKE0_DIMMA 9

M_CLK_A_DDR1 9
M_CLK_A_DDR#1 9
DDR_CKE1_DIMMA 9

DDR_CS0_DIMMA# 9
DDR_CS1_DIMMA# 9

M_A_ODT0 9
M_A_ODT1 9

DDR_A_DM[0..7]

DDR_A_DQS#[0..7]

DDR_A_DQS[0..7]

DDR_A_MA[0..15]

DDR_A_DM[0..7] 9

DDR_A_DQS#[0..7] 9

DDR_A_DQS[0..7] 9

DDR_A_MA[0..15] 9

DDR_B_BS010
DDR_B_BS110
DDR_B_BS210

DDR_B_CAS#10
DDR_B_RAS#10
DDR_B_WE#10

DDR_A_D[0..63]9

D D

DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27

C C

B B

DDR_A_CAS#9
DDR_A_RAS#9
DDR_A_WE#9

DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63

DDR_A_BS09
DDR_A_BS19
DDR_A_BS29

AG5

AJ10
AL10

AK12

AK11

AM10
AR11
AL11

AM9

AT11
AP12
AM12
AN12
AM13
AT14
AT12
AL13
AR14
AP14

A10
C10

C7

A7
B10
D10
E10

A8

D8

F10

E6

F7
E9
B7
E7
C6

H10

G8
K7

J8
G7

G10

J7

J10

L7
M6
M8

L9

L6
K8
N8
P9

AH5
AF5
AK6
AK7
AF6

AJ7
AJ6

AJ9

AK8
AL7

AL8
AN8

AN9

AC3
AB2

U7

AE1
AB3
AE9

IC,AUB_CFD_rPGA,R1P0

IC,AUB_CFD_rPGA,R1P0

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC . AND CONTAINS CONFIDEN TIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE C OMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFOR MATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOU T PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2008/09/15 2009/09/15

Compal Secret Data

Deciphered Date

2

Title

Size Document Number Re v

Custom
Date: Sheet

Compal Electronics, Inc.

Clarksfield(2/6)-DDR3 A/B CH

LA-4951P

1

648Tuesday, July 28, 2009

of

0.4

http://hobi-elektronika.net

5

4

3

2

1

+CPU_CORE

D D

C C

B B

A A

JCPU1F

48A

AG35

VCC1

AG34

VCC2

AG33

VCC3

AG32

VCC4

AG31

VCC5

AG30

VCC6

AG29

VCC7

AG28

VCC8

AG27

VCC9

AG26

VCC10

AF35

VCC11

AF34

VCC12

AF33

VCC13

AF32

VCC14

AF31

VCC15

AF30

VCC16

AF29

VCC17

AF28

VCC18

AF27

VCC19

AF26

VCC20

AD35

VCC21

AD34

VCC22

AD33

VCC23

AD32

VCC24

AD31

VCC25

AD30

VCC26

AD29

VCC27

AD28

VCC28

AD27

VCC29

AD26

VCC30

AC35

VCC31

AC34

VCC32

AC33

VCC33

AC32

VCC34

AC31

VCC35

AC30

VCC36

AC29

VCC37

AC28

VCC38

AC27

VCC39

AC26

VCC40

AA35

VCC41

AA34

VCC42

AA33

VCC43

AA32

VCC44

AA31

VCC45

AA30

VCC46

AA29

VCC47

AA28

VCC48

AA27

VCC49

AA26

VCC50

Y35

VCC51

Y34

VCC52

Y33

VCC53

Y32

VCC54

Y31

VCC55

Y30

VCC56

Y29

VCC57

Y28

VCC58

Y27

VCC59

Y26

VCC60

V35

VCC61

V34

VCC62

V33

VCC63

V32

VCC64

V31

VCC65

V30

VCC66

V29

VCC67

V28

VCC68

V27

VCC69

V26

VCC70

U35

VCC71

U34

VCC72

U33

VCC73

U32

VCC74

U31

VCC75

U30

VCC76

U29

VCC77

U28

VCC78

U27

VCC79

U26

VCC80

R35

VCC81

R34

VCC82

R33

VCC83

R32

VCC84

R31

VCC85

R30

VCC86

R29

VCC87

R28

VCC88

R27

VCC89

R26

VCC90

P35

VCC91

P34

VCC92

P33

VCC93

P32

VCC94

P31

VCC95

P30

VCC96

P29

VCC97

P28

VCC98

P27

VCC99

P26

VCC100

IC,AUB_CFD_rPGA,R1P0

5

CPU CORE SUPPLY

POWER

CPU VIDS

SENSE LINES

1.1V RAIL POWER

PROC_DPRSLPVR

VTT_SELECT

VCC_SENSE
VSS_SENSE

VTT_SENSE

VSS_SENSE_VTT

18A

VTT0_10
VTT0_11
VTT0_12
VTT0_13
VTT0_14
VTT0_15
VTT0_16
VTT0_17
VTT0_18
VTT0_19
VTT0_20
VTT0_21
VTT0_22
VTT0_23
VTT0_24
VTT0_25
VTT0_26
VTT0_27
VTT0_28
VTT0_29
VTT0_30
VTT0_31
VTT0_32

VTT0_33
VTT0_34
VTT0_35
VTT0_36
VTT0_37
VTT0_38
VTT0_39
VTT0_40
VTT0_41
VTT0_42
VTT0_43
VTT0_44

VTT0_1
VTT0_2
VTT0_3
VTT0_4
VTT0_5
VTT0_6
VTT0_7
VTT0_8
VTT0_9

VID[0]
VID[1]
VID[2]
VID[3]
VID[4]
VID[5]
VID[6]

ISENSE

PSI#

Chnage 10uF to 22uF for DB1.
12/03

AH14
AH12
AH11
AH10
J14
J13
H14
H12
G14
G13
G12
G11
F14
F13
F12
F11
E14
E12
D14
D13
D12
D11
C14
C13
C12
C11
B14
B12
A14
A13
A12
A11

AF10
AE10
AC10
AB10
Y10
W10
U10
T10
J12
J11
J16
J15

AN33

AK35
AK33
AK34
AL35
AL33
AM33
AM35
AM34

G15

C37

@

10U_0805_6.3V6M

1

2

10U_0805_6.3V6M

C50

1

2

22U_0805_6.3V6M

C62

1

2

+VTT_43
+VTT_44

H_VID0
H_VID1
H_VID2
H_VID3
H_VID4
H_VID5
H_VID6
PM_DPRSLPVR_R

C38

@

10U_0805_6.3V6M

1

2

10U_0805_6.3V6M

C51

1

2

+VCCP

22U_0805_6.3V6M

C63

1

2

R74 0_0603_5%
R75 0_0603_5%

R76 0_0402_5%

H_VTTVID1 = Low, 1.1V
H_VTTVID1 = High, 1.05V

AN35

VCC_SENSE

R79 0_0402_5%

AJ34
AJ35

B15
A15

VSS_SENSE

1 2

R80 0_0402_5%

1 2

4

22U_0805_6.3V6M

22U_0805_6.3V6M

C40

C39

1

1

2

2

10U_0805_6.3V6M

10U_0805_6.3V6M

C52

C53

1

1

2

2

Chnage 10uF
to 22uF for
DB1. 12/03

1 2
1 2

PSI# 43
H_VID[0..6] 43

1 2

H_VTTVID1 40

IMVP_IMON 43

VTT_SENSE 40
VSS_SENSE_VTT 40

C41

1

2

10U_0805_6.3V6M

22U_0805_6.3V6M

C42

1

2

+VCCP

Close to CPU

Update 10/27

VCCSENSE
VSSSENSE

10U_0805_6.3V6M

C43

C44

1

1

2

2

PROC_DPRSLPVR 43

VCC_SENSE

R77 100_0402_1%

VSS_SENSE

R78 100_0402_1%

Del C81, C82. 5/15

+CPU_CORE

+VCCP

10U_0805_6.3V6M

10U_0805_6.3V6M

C45

1

2

Chnage 10uF
to 22uF for
DB1. 12/03

1 2
1 2

VCCSENSE 43
VSSSENSE 43

C79

12

@

47P_0402_50V8J

C80

12

@

47P_0402_50V8J

+VCCP

C46

12

@

47P_0402_50V8J

+CPU_CORE

JCPU1G

AT21

VAXG1

AT19

VAXG2

AT18

VAXG3

AT16

VAXG4

AR21

VAXG5

AR19

VAXG6

AR18

VAXG7

C48

C47

12

C49

12

12

@

@

3

@

47P_0402_50V8J

47P_0402_50V8J

+VCCP

47P_0402_50V8J

+VCCP

22U_0805_6.3V6M

C64

1

2

22U_0805_6.3V6M

22U_0805_6.3V6M

C70

1

2

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONF IDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE C OMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFOR MATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C71

1

2

Issued Date

22U_0805_6.3V6M

C72

1

2

AR16

VAXG8

AP21

VAXG9

AP19

VAXG10

AP18

VAXG11

AP16

VAXG12

AN21

VAXG13

AN19

VAXG14

AN18

VAXG15

AN16

VAXG16

AM21

VAXG17

AM19

VAXG18

AM18

VAXG19

AM16

VAXG20

AL21

VAXG21

AL19

VAXG22

AL18

VAXG23

AL16

VAXG24

AK21

VAXG25

AK19

VAXG26

AK18

VAXG27

AK16

VAXG28

AJ21

VAXG29

AJ19

VAXG30

AJ18

VAXG31

AJ16

VAXG32

AH21

VAXG33

AH19

VAXG34

AH18

VAXG35

AH16

VAXG36

J24

VTT1_45

J23

22U_0805_6.3V6M

VTT1_46

H25

C65

1

2

22U_0805_6.3V6M

C73

1

2

VTT1_47

K26

VTT1_48

J27

VTT1_49

J26

VTT1_50

J25

VTT1_51

H27

VTT1_52

G28

VTT1_53

G27

VTT1_54

G26

VTT1_55

F26

VTT1_56

E26

VTT1_57

E25

VTT1_58

IC,AUB_CFD_rPGA,R1P0

2008/09/15 2009/09/15

15A

GRAPHICS

FDI PEG & DMI

Compal Secret Data

Deciphered Date

VAXG_SENSE

VSSAXG_SENSE

SENSE

LINES

GFX_DPRSLPVR

GRAPHICS VIDs

3A

POWER

DDR3 - 1.5V RAILS

1.1V1.8V

0.6A

2

GFX_VID[0]
GFX_VID[1]
GFX_VID[2]
GFX_VID[3]
GFX_VID[4]
GFX_VID[5]
GFX_VID[6]

GFX_VR_EN

GFX_IMON

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8

VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15
VDDQ16
VDDQ17
VDDQ18

VTT0_59
VTT0_60
VTT0_61
VTT0_62

VTT1_63
VTT1_64
VTT1_65
VTT1_66
VTT1_67
VTT1_68

VCCPLL1
VCCPLL2
VCCPLL3

AR22
AT22

AM22
AP22
AN22
AP23
AM23
AP24
AN24

R71 4.7K_0402_5%

1 2

AR25

R72 10K_0402_5%@

1 2

AT25

R73 1K_0402_5%

AM24

AJ1
AF1
AE7
AE4
AC1
AB7
AB4
Y1
W7
W4
U1
T7
T4
P1
N7
N4
L1
H1

P10
N10
L10
K10

J22
J20
J18
H21
H20
H19

L26
L27
M26

1U_0603_10V4Z

C55

1

2

1U_0402_6.3V4Z

C74

1

2

12

1U_0603_10V4Z

1U_0603_10V4Z

C56

1

2

1U_0603_10V4Z

C57

C58

1

2

C59

1

2

Intel S3

+1.5VS_CPU_VDDQ

22U_0805_6.3V6M

22U_0805_6.3V6M

1U_0603_10V4Z

C61

C60

1

2

1

1

2

2

Remove C54. 7/14

Chnage 10uF to 22uF DB1. 12/16

+VCCP

10U_0805_6.3V6M

C67

C66

1

+VCCP

2

22U_0805_6.3V6M

22U_0805_6.3V6M

C69

C68

1

1

2

2

+1.8VS

4.7U_0603_6.3V6K

2.2U_0603_6.3V4Z

1U_0402_6.3V4Z

C76

C75

1

1

2

2

Title

Size Document Number Rev

Custom

LA-4951P

Date: Sheet

22U_0805_6.3V6M

C77

C78

1

1

2

2

Chnage 10uF
to 22uF for
DB1. 12/03

Compal Electronics, Inc.

Clarksfield(4/5)-PWR

1

748Tuesday, July 28, 2009

of

10U_0805_6.3V6M

1

2

0.4

http://hobi-elektronika.net

5

4

3

2

1

T17
T18
T19
T20
T21
T22
T23

+CPU_CORE

C83

1

2

10U_0805_6.3V6M

10U_0805_6.3V6M

C84

1

2

10U_0805_6.3V6M

C85

1

2

10U_0805_6.3V6M

C86

1

2

+CPU_CORE

C105

1

2

10U_0805_6.3V6M

C87

C88

1

2

10U_0805_6.3V6M

10U_0805_6.3V6M

C106

1

2

22U_0805_6.3V6M

C89

1

2

10U_0805_6.3V6M

C107

1

2

22U_0805_6.3V6M

C90

1

2

10U_0805_6.3V6M

C108

1

2

+CPU_CORE

C115

22U_0805_6.3V6M

C91

1

2

10U_0805_6.3V6M

C109

1

2

330U_X_2VM_R6M

C116

1

+

2

10U_0805_6.3V6M

C92

1

2

10U_0805_6.3V6M

C110

1

2

C117

330U_X_2VM_R6M

1

+

2

10U_0805_6.3V6M

C93

1

2

10U_0805_6.3V6M

C111

1

2

330U_X_2VM_R6M

C118

1

+

2

10U_0805_6.3V6M

C94

1

2

10U_0805_6.3V6M

C112

1

2

330U_X_2VM_R6M

1

+

2

22U_0805_6.3V6M

1

2

C113

1

2

Install for
DB1. 12/03

C119

1

2

22U_0805_6.3V6M

C95

1

2

10U_0805_6.3V6M

C114

C120

330U_X_2VM_R6M

+

10U_0805_6.3V6M

C96

1

2

Add for debug. 5/13

10U_0805_6.3V6M

1

2

330U_X_2VM_R6M

1

+

2

Chnage 330uF ESR from 7m to 6m for DB1. 12/16

10U_0805_6.3V6M

C97

1

2

22U_0805_6.3V6M

C712

1

2

10U_0805_6.3V6M

C98

1

2

22U_0805_6.3V6M

C713

1

2

10U_0805_6.3V6M

C99

1

2

22U_0805_6.3V6M

C714

1

2

22U_0805_6.3V6M

C100

1

2

22U_0805_6.3V6M

C101

1

2

22U_0805_6.3V6M

C102

1

2

22U_0805_6.3V6M

C103

1

2

22U_0805_6.3V6M

C104

1

2

JCPU1H

AT20

VSS1

AT17

VSS2

AR31

VSS3

AR28

VSS4

AR26

VSS5

AR24

VSS6

AR23

VSS7

AR20

D D

C C

B B

AR17
AR15
AR12

AP20
AP17
AP13
AP10

AN34
AN31
AN23
AN20

AN17
AM29
AM27
AM25
AM20
AM17
AM14
AM11

AL34
AL31
AL23
AL20
AL17
AL12

AK29

AK27

AK25

AK20

AK17

AJ31
AJ23
AJ20
AJ17
AJ14
AJ11

AH35

AH34

AH33

AH32

AH31

AH30

AH29

AH28

AH27

AH26

AH20

AH17

AH13

AG10

AE35

VSS8
VSS9
VSS10
VSS11

AR9

VSS12

AR6

VSS13

AR3

VSS14
VSS15
VSS16
VSS17
VSS18

AP7

VSS19

AP4

VSS20

AP2

VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33

AM8

VSS34

AM5

VSS35

AM2

VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42

AL9

VSS43

AL6

VSS44

AL3

VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56

AJ8

VSS57

AJ5

VSS58

AJ2

VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72

AH9

VSS73

AH6

VSS74

AH3

VSS75
VSS76

AF8

VSS77

AF4

VSS78

AF2

VSS79
VSS80

VSS

VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98

VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160

AE34
AE33
AE32
AE31
AE30
AE29
AE28
AE27
AE26
AE6
AD10
AC8
AC4
AC2
AB35
AB34
AB33
AB32
AB31
AB30
AB29
AB28
AB27
AB26
AB6
AA10
Y8
Y4
Y2
W35
W34
W33
W32
W31
W30
W29
W28
W27
W26
W6
V10
U8
U4
U2
T35
T34
T33
T32
T31
T30
T29
T28
T27
T26
T6
R10
P8
P4
P2
N35
N34
N33
N32
N31
N30
N29
N28
N27
N26
N6
M10
L35
L32
L29
L8
L5
L2
K34
K33
K30

JCPU1I

K27

VSS161

K9

VSS162

K6

VSS163

K3

VSS164

J32

VSS165

J30

VSS166

J21

VSS167

J19

VSS168

H35

VSS169

H32

VSS170

H28

VSS171

H26

VSS172

H24

VSS173

H22

VSS174

H18

VSS175

H15

VSS176

H13

VSS177

H11

VSS178

H8

VSS179

H5

VSS180

H2

VSS181

G34

VSS182

G31

VSS183

G20

VSS184

G9

VSS185

G6

VSS186

G3

VSS187

F30

VSS188

F27

VSS189

F25

VSS190

F22

VSS191

F19

VSS192

F16

VSS193

E35

VSS194

E32

VSS195

E29

VSS196

E24

VSS197

E21

VSS198

E18

VSS199

E13

VSS200

E11

VSS201

E8

VSS202

E5

VSS203

E2

VSS204

D33

VSS205

D30

VSS206

D26

VSS207

D9

VSS208

D6

VSS209

D3

VSS210

C34

VSS211

C32

VSS212

C29

VSS213

C28

VSS214

C24

VSS215

C22

VSS216

C20

VSS217

C19

VSS218

C16

VSS219

B31

VSS220

B25

VSS221

B21

VSS222

B18

VSS223

B17

VSS224

B13

VSS225

B11

VSS226

B8

VSS227

B6

VSS228

B4

VSS229

A29

VSS230

A27

VSS231

A23

VSS232

A9

VSS233

VSS

VSS_NCTF1
VSS_NCTF2
VSS_NCTF3
VSS_NCTF4
VSS_NCTF5
VSS_NCTF6
VSS_NCTF7

NCTF

AT1
AR34
B34
B2
B1
A35

VSS_NCTF2_R
VSS_NCTF3_R
VSS_NCTF4_R
VSS_NCTF5_R
VSS_NCTF6_R
VSS_NCTF7_R

VSS_NCTF1_R

AT35

IC,AUB_CFD_rPGA,R1P0

A A

5

IC,AUB_CFD_rPGA,R1P0

4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONF IDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE C OMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFOR MATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2008/09/15 2009/09/15

Compal Secret Data

Deciphered Date

2

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

Clarksfield(5/5)-GND/Bypass

LA-4951P

1

848Tuesday, July 28, 2009

of

0.4

http://hobi-elektronika.net

V_DDR_CPU_REF0

3A @ 1 . 5 V

0.6 5 A @ 0 . 7 5 V

3A @ 1 . 5 V

0.6 5 A @ 0 . 7 5 V

R84 0_0402_5%

1 2

C124

2.2U_0402_6.3V6M

C123

0.1U_0402_16V4Z

1

1

D D

C C

B B

2

2

DDR_CKE2_DIMMA5

DDR_A_BS26

M_CLK_A_DDR25
M_CLK_A_DDR#25

DDR_A_BS06
DDR_A_WE#6

DDR_A_CAS#6

DDR_CS3_DIMMA#5

V_DDR_CPU_REF _A
+1.5V

12

R85

1K_0402_1%

12

R86

1K_0402_1%

SPD address 0xA2

+3VS

A A

Change. 2/17

R88 10K_0402_5%

C165

2.2U_0402_6.3V6M

1

2

5

V_DDR_CPU_REF_DA

DDR_A_D0
DDR_A_D1

DDR_A_DM0
DDR_A_D2

DDR_A_D3
DDR_A_D8

DDR_A_D9
DDR_A_DQS#1

DDR_A_DQS1
DDR_A_D10

DDR_A_D11
DDR_A_D16

DDR_A_D17
DDR_A_DQS#2

DDR_A_DQS2
DDR_A_D18

DDR_A_D19
DDR_A_D24

DDR_A_D25
DDR_A_DM3
DDR_A_D26

DDR_A_D27

DDR_A_BS2
DDR_A_MA12

DDR_A_MA9
DDR_A_MA8

DDR_A_MA5
DDR_A_MA3

DDR_A_MA1

DDR_A_MA10
DDR_A_BS0

DDR_A_WE#
DDR_A_CAS#

DDR_A_MA13

DDR_A_D32
DDR_A_D33

DDR_A_DQS#4
DDR_A_DQS4

DDR_A_D34
DDR_A_D35

DDR_A_D40
DDR_A_D41

DDR_A_DM5
DDR_A_D42

DDR_A_D43
DDR_A_D48

DDR_A_D49
DDR_A_DQS#6

DDR_A_DQS6
DDR_A_D50

DDR_A_D51
DDR_A_D56

DDR_A_D57
DDR_A_DM7
DDR_A_D58

DDR_A_D59

1 2

C166

0.1U_0402_16V4Z

+0.75VS

10K_0402_5%

1

12

R90

2

5

+1.5V +1.5V

DDR3 SO-DIMM A

JDIMM2

VREF_DQ1VSS1

3

VSS2

5

DQ0

7

DQ1
VSS49DQS#0

11

DM0

13

VSS5

15

DQ2

17

DQ3

19

VSS7

21

DQ8

23

DQ9

25

VSS9

27

DQS#1
DQS129RESET#
VSS1131VSS12

33

DQ10

35

DQ11
VSS1337VSS14

39

DQ16

41

DQ17
VSS1543VSS16

45

DQS#2

47

DQS2

49

VSS18

51

DQ18

53

DQ19

55

VSS20

57

DQ24

59

DQ25
VSS2261DQS#3

63

DM3
VSS2365VSS24

67

DQ26

69

DQ27
VSS2571VSS26

73

CKE0

75

VDD1

77

NC1

79

BA2

81

VDD3
A12/BC#83A11

85

A9

87

VDD5

89

A8

91

A5

93

VDD7

95

A3

97

A1
VDD999VDD10

101

CK0

103

CK0#

105

VDD11

107

A10/AP

109

BA0

111

VDD13

113

WE#

115

CAS#

117

VDD15

119

A13

121

S1#

123

VDD17

125

NCTEST

127

VSS27

129

DQ32

131

DQ33

133

VSS29

135

DQS#4

137

DQS4

139

VSS32

141

DQ34

143

DQ35

145

VSS34

147

DQ40

149

DQ41

151

VSS36

153

DM5

155

VSS37

157

DQ42

159

DQ43

161

VSS39

163

DQ48

165

DQ49

167

VSS41

169

DQS#6

171

DQS6

173

VSS44

175

DQ50

177

DQ51

179

VSS46

181

DQ56

183

DQ57

185

VSS48

187

DM7

189

VSS49

191

DQ58

193

DQ59

195

VSS51

197

SA0

199

VDDSPD

201

SA1

203

VTT1

205

G1

FOX_AS0A626-U4SG-7HCONN@

DQ4
DQ5

VSS3
DQS0

VSS6

DQ6

DQ7
VSS8
DQ12
DQ13

VSS10

DM1

DQ14
DQ15

DQ20
DQ21

DM2

VSS17

DQ22
DQ23

VSS19

DQ28
DQ29

VSS21

DQS3
DQ30

DQ31

CKE1
VDD2

VDD4

VDD6

VDD8

CK1
CK1#

VDD12

RAS#

VDD14

ODT0

VDD16

ODT1

NC2

VDD18

VREF_CA

VSS28

DQ36
DQ37

VSS30

DM4

VSS31

DQ38
DQ39

VSS33

DQ44
DQ45

VSS35

DQS#5

DQS5

VSS38

DQ46
DQ47

VSS40

DQ52
DQ53

VSS42

DM6

VSS43

DQ54
DQ55

VSS45

DQ60
DQ61

VSS47

DQS#7

DQS7

VSS50

DQ62
DQ63

VSS52

EVENT#

SDA

SCL
VTT2

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72

74
76
78

A15

80

A14

82
84
86

A7

88
90

A6

92

A4

94
96

A2

98

A0

100
102
104
106
108

BA1

110
112
114

S0#

116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204

206

G2

TOP SIDE STD

(LOW)

DDR_A_D4
DDR_A_D5

DDR_A_DQS#0
DDR_A_DQS0

DDR_A_D6
DDR_A_D7

DDR_A_D12
DDR_A_D13

DDR_A_DM1
DRAMRST#

DDR_A_D14
DDR_A_D15

DDR_A_D20
DDR_A_D21

DDR_A_DM2
DDR_A_D22

DDR_A_D23
DDR_A_D28

DDR_A_D29
DDR_A_DQS#3

DDR_A_DQS3
DDR_A_D30

DDR_A_D31

DDR_A_MA15
DDR_A_MA14

DDR_A_MA11
DDR_A_MA7

DDR_A_MA6
DDR_A_MA4

DDR_A_MA2
DDR_A_MA0

DDR_A_BS1
DDR_A_RAS#

DDR_A_D36
DDR_A_D37

DDR_A_DM4
DDR_A_D38

DDR_A_D39
DDR_A_D44

DDR_A_D45
DDR_A_DQS#5

DDR_A_DQS5
DDR_A_D46

DDR_A_D47
DDR_A_D52

DDR_A_D53
DDR_A_DM6
DDR_A_D54

DDR_A_D55
DDR_A_D60

DDR_A_D61
DDR_A_DQS#7

DDR_A_DQS7
DDR_A_D62

DDR_A_D63
PM_EXTTS#1_R

SMB_DATA_S3
SMB_CLK_S3

+0.75VS

ME/iAMT debug

SMB_DATA_S3
SMB_CLK_S3

4

1. Remove R682, R683.

2. Change R81 & R83 to 1K to another divider.

3. Install R82, R84.

+1.5V

Layout Note: Place near JDIMM1

C126

10U_0603_6.3V6M

1

@

2

C127

10U_0603_6.3V6M

1

@

2

C130

10U_0603_6.3V6M

1

@

2

C131

10U_0603_6.3V6M

1

2

C132

10U_0603_6.3V6M

1

2

C133

1

2

4/30

C134

0.1U_0201_6.3V6K

10U_0603_6.3V6M

1

2

3

C135

0.1U_0201_6.3V6K

1

2

V_DDR_CPU_REF_DA

V_DDR_CPU_REF0

C136

0.1U_0201_6.3V6K

C137

0.1U_0201_6.3V6K

1

1

2

2

C125

1

+

2

Remove C128, C129, C138, & C145. 5/11

+1.5V

Layout Note: Place near JDIMM2

C144

C139

10U_0603_6.3V6M

C141

10U_0603_6.3V6M

C140

10U_0603_6.3V6M

C142

1

1

@

@

2

2

1027: Change JDIMM1.1 and JDIMM2.1 to connect to V_DDR_CPU_REF_A via
R682 & R683 and move V_DDR_CPU_REF0 option and resistors R82 and R84
to JDIMM1.1 and JDIMM2.1. (Will check with Intel whether we should
use separate divider for VREF_DQ and VREF_CA for M1 solution?)

DDR_CKE3_DIMMA 5

M_CLK_A_DDR3 5
M_CLK_A_DDR#3 5

DDR_A_BS1 6
DDR_A_RAS# 6

DDR_CS2_DIMMA# 5
M_A_ODT2 5

M_A_ODT3 5

C152

0.1U_0402_16V4Z

C153

1

1

2

2

PM_EXTTS#1_R 4,10
SMB_DATA_S3 4,10,12,14,26
SMB_CLK_S3 4,10,12,14,26

As short as possible

2.2U_0402_6.3V6M

V_DDR_CPU_REF _A

10U_0603_6.3V6M

1

1

2

2

DDR_A_D[0..63]6

DDR_A_DM[0..7]6
DDR_A_DQS[0..7]6
DDR_A_DQS#[0..7]6

DDR_A_MA[0..15]6

Layout Note: Place near
JDIMM3.203 & JDIMM3.204

+0.75VS +0.75VS

C154

1U_0603_10V4Z

1

@

2

10U_0603_6.3V6M

C143

10U_0603_6.3V6M

1

1

@

2

2

C156

C155

1

@

2

C157

1U_0603_10V4Z

1U_0603_10V4Z

1

1

2

2

+0.75VS

C162

10U_0603_6.3V6M

1

Layout Note: Place between
JDIMM3 & JDIMM3.

2

Change ESR to 6m for DB1. 12/16

C149

C146

0.1U_0201_6.3V6K

C147

0.1U_0201_6.3V6K

1

1

2

2

Layout Note: Place near
JDIMM4.203 & JDIMM4.204

1U_0603_10V4Z

@

0.1U_0201_6.3V6K

C148

0.1U_0201_6.3V6K

1

1

2

2

C158

1U_0603_10V4Z

C159

1U_0603_10V4Z

1

1

2

2

C160

1U_0603_10V4Z

1

2

SPD address 0xA0

Change. 2/17

VREFDQ

JiAMT1

3

3

2

2

1

1

4

2/10

5

G2

4

G1

ACES_85204-03001CONN@

V_DDR_CPU_REF_AM1

M3 V_DDR_CPU_REF0

R81, R83, R682, R683

R82, R84

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC . AND CONTAINS CONFIDEN TIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE C OMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFOR MATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOU T PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

R82 0_0402_5%

1 2

C121

0.1U_0402_16V4Z

C122

1

1

330U_X_2VM_R6M

2

2

DDR_CKE0_DIMMA6

M_CLK_A_DDR06
M_CLK_A_DDR#06

DDR_CS1_DIMMA#6

C161

1U_0603_10V4Z

1

@

2

+3VS

C163

1

2

2008/09/15 2009/09/15

DDR_A_D0

2.2U_0402_6.3V6M

DDR_A_D1
DDR_A_DM0
DDR_A_D2

DDR_A_D3
DDR_A_D8

DDR_A_D9
DDR_A_DQS#1

DDR_A_DQS1
DDR_A_D10

DDR_A_D11
DDR_A_D16

DDR_A_D17
DDR_A_DQS#2

DDR_A_DQS2
DDR_A_D18

DDR_A_D19
DDR_A_D24

DDR_A_D25
DDR_A_DM3
DDR_A_D26

DDR_A_D27

DDR_A_BS2
DDR_A_MA12

DDR_A_MA9
DDR_A_MA8

DDR_A_MA5
DDR_A_MA3

DDR_A_MA1

DDR_A_MA10
DDR_A_BS0

DDR_A_WE#
DDR_A_CAS#

DDR_A_MA13

DDR_A_D32
DDR_A_D33

DDR_A_DQS#4
DDR_A_DQS4

DDR_A_D34
DDR_A_D35

DDR_A_D40
DDR_A_D41

DDR_A_DM5
DDR_A_D42

DDR_A_D43
DDR_A_D48

DDR_A_D49
DDR_A_DQS#6

DDR_A_DQS6
DDR_A_D50

DDR_A_D51
DDR_A_D56

DDR_A_D57
DDR_A_DM7
DDR_A_D58

DDR_A_D59

R87 10K_0402_5%

1 2

C164

0.1U_0402_16V4Z

2.2U_0402_6.3V6M

+0.75VS

10K_0402_5%

1

12

R89

2

Compal Secret Data

Deciphered Date

+1.5V

2

DDR3 SO-DIMM A

JDIMM1

FOX_AS0A626-J8SG-7HCONN@

VREF_DQ1VSS1

3

VSS2

5

DQ0

7

DQ1
VSS49DQS#0

11

DM0

13

VSS5

15

DQ2

17

DQ3

19

VSS7

21

DQ8

23

DQ9

25

VSS9

27

DQS#1
DQS129RESET#
VSS1131VSS12

33

DQ10

35

DQ11
VSS1337VSS14

39

DQ16

41

DQ17
VSS1543VSS16

45

DQS#2
DQS247VSS17
VSS1849DQ22

51

DQ18

53

DQ19
VSS2055DQ28

57

DQ24

59

DQ25
VSS2261DQS#3

63

DM3
VSS2365VSS24

67

DQ26

69

DQ27
VSS2571VSS26

73

CKE0

75

VDD1

77

NC1

79

BA2

81

VDD3
A12/BC#83A11

85

A9

87

VDD5

89

A8

91

A5

93

VDD7

95

A3

97

A1
VDD999VDD10

101

CK0

103

CK0#

105

VDD11

107

A10/AP

109

BA0

111

VDD13

113

WE#

115

CAS#

117

VDD15

119

A13

121

S1#

123

VDD17

125

NCTEST

127

VSS27

129

DQ32

131

DQ33

133

VSS29

135

DQS#4

137

DQS4

139

VSS32

141

DQ34

143

DQ35

145

VSS34

147

DQ40

149

DQ41

151

VSS36

153

DM5

155

VSS37

157

DQ42

159

DQ43

161

VSS39

163

DQ48

165

DQ49

167

VSS41

169

DQS#6

171

DQS6

173

VSS44

175

DQ50

177

DQ51

179

VSS46

181

DQ56

183

DQ57

185

VSS48

187

DM7

189

VSS49

191

DQ58

193

DQ59

195

VSS51

197

SA0

199

VDDSPD

201

SA1

203

VTT1

205

G1

TOP SIDE STD

(HIGHT)

2

VSS3

DQS0

VSS6

VSS8
DQ12
DQ13

VSS10

DQ14
DQ15

DQ20
DQ21

DQ23

VSS19

DQ29

VSS21

DQS3
DQ30

DQ31

CKE1
VDD2

VDD4

VDD6

VDD8

CK1#

VDD12

RAS#

VDD14

ODT0

VDD16

ODT1

VDD18

VREF_CA

VSS28

DQ36
DQ37

VSS30
VSS31

DQ38
DQ39

VSS33

DQ44
DQ45

VSS35

DQS#5

DQS5

VSS38

DQ46
DQ47

VSS40

DQ52
DQ53

VSS42
VSS43

DQ54
DQ55

VSS45

DQ60
DQ61

VSS47

DQS#7

DQS7

VSS50

DQ62
DQ63

VSS52

EVENT#

VTT2

1

2
4

DQ4

6

DQ5

8
10
12
14
16

DQ6

18

DQ7

20
22
24
26
28

DM1

30
32
34
36
38
40
42
44
46

DM2

48
50
52
54
56
58
60
62
64
66
68
70
72

74
76
78

A15

80

A14

82
84
86

A7

88
90

A6

92

A4

94
96

A2

98

A0

100
102

CK1

104
106
108

BA1

110
112
114

S0#

116
118
120
122

NC2

124
126
128
130
132
134
136

DM4

138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170

DM6

172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

SDA

202

SCL

204
206

G2

DDR_A_D4
DDR_A_D5

DDR_A_DQS#0
DDR_A_DQS0

DDR_A_D6
DDR_A_D7

DDR_A_D12
DDR_A_D13

DDR_A_DM1
DRAMRST#

DDR_A_D14
DDR_A_D15

DDR_A_D20
DDR_A_D21

DDR_A_DM2
DDR_A_D22

DDR_A_D23
DDR_A_D28

DDR_A_D29
DDR_A_DQS#3

DDR_A_DQS3
DDR_A_D30

DDR_A_D31

+1.5V

DDR_A_MA15
DDR_A_MA14

DDR_A_MA11
DDR_A_MA7

DDR_A_MA6
DDR_A_MA4

DDR_A_MA2
DDR_A_MA0

DDR_A_BS1
DDR_A_RAS#

DDR_A_D36
DDR_A_D37

DDR_A_DM4
DDR_A_D38

DDR_A_D39
DDR_A_D44

DDR_A_D45
DDR_A_DQS#5

DDR_A_DQS5
DDR_A_D46

DDR_A_D47
DDR_A_D52

DDR_A_D53
DDR_A_DM6
DDR_A_D54

DDR_A_D55
DDR_A_D60

DDR_A_D61
DDR_A_DQS#7

DDR_A_DQS7
DDR_A_D62

DDR_A_D63
PM_EXTTS#1_R

SMB_DATA_S3
SMB_CLK_S3

+0.75VS

Title

Size Document Number Re v

Custom
Date: Sheet

Compal Electronics, Inc.

DDRIII-SODIMM CHANNEL A

LA-4951P

DRAMRST# 10,11

DDR_CKE1_DIMMA 6

M_CLK_A_DDR1 6
M_CLK_A_DDR#1 6

DDR_CS0_DIMMA# 6
M_A_ODT0 6

M_A_ODT1 6

As short as possible

C151

C150

0.1U_0402_16V4Z

1

1

2

2

Add. 4/30

V_DDR_CPU_REF_DA

+1.5V

R81

R83

1

V_DDR_CPU_REF _A

2.2U_0402_6.3V6M

12

1K_0402_1%

12

1K_0402_1%

948Tuesday, July 28, 2009

of

0.4

http://hobi-elektronika.net

5

3A @ 1 . 5 V

0.6 5 A @ 0 . 7 5 V

3A @ 1 . 5 V

0.6 5 A @ 0 . 7 5 V

V_DDR_CPU_REF1

D D

C C

B B

SPD address 0xA4

+3VS

A A

Change. 2/17

V_DDR_CPU_REF_DB

R95 0_0402_5%

C170

C169

0.1U_0402_16V4Z

1

1

2

2

DDR_CKE0_DIMMB6

DDR_B_BS26

M_CLK_B_DDR06

M_CLK_B_DDR#06

DDR_B_BS06
DDR_B_WE#6

DDR_B_CAS#6

DDR_CS1_DIMMB#6

V_DDR_CPU_REF_B
+1.5V

12

R96

1K_0402_1%

12

R97

1K_0402_1%

C211

1

2

1 2

DDR_B_D0

2.2U_0402_6.3V6M

DDR_B_D1
DDR_B_DM0
DDR_B_D2

DDR_B_D3
DDR_B_D8

DDR_B_D9
DDR_B_DQS#1

DDR_B_DQS1
DDR_B_D10

DDR_B_D11
DDR_B_D16

DDR_B_D17
DDR_B_DQS#2

DDR_B_DQS2
DDR_B_D18

DDR_B_D19
DDR_B_D24

DDR_B_D25
DDR_B_DM3
DDR_B_D26

DDR_B_D27

DDR_CKE0_DIMMB

DDR_B_BS2
DDR_B_MA12

DDR_B_MA9
DDR_B_MA8

DDR_B_MA5
DDR_B_MA3

DDR_B_MA1
M_CLK_B_DDR0

M_CLK_B_DDR#0
DDR_B_MA10

DDR_B_BS0
DDR_B_WE#

DDR_B_CAS#
DDR_B_MA13

DDR_CS1_DIMMB#

DDR_B_D32
DDR_B_D33

DDR_B_DQS#4
DDR_B_DQS4

DDR_B_D34
DDR_B_D35

DDR_B_D40
DDR_B_D41

DDR_B_DM5
DDR_B_D42

DDR_B_D43
DDR_B_D48

DDR_B_D49
DDR_B_DQS#6

DDR_B_DQS6
DDR_B_D50

DDR_B_D51

Install R96 & R97. 12/17

DDR_B_D56
DDR_B_D57

DDR_B_DM7
DDR_B_D58

DDR_B_D59

R99 10K_0402_5%

1 2

2.2U_0402_6.3V6M

C212

0.1U_0402_16V4Z

1

2

+1.5V +1.5V

DDR3 SO-DIMM B

JDIMM4

VREF_DQ1VSS1

3

VSS2

5

DQ0

7

DQ1
VSS49DQS#0

11

DM0

13

VSS5

15

DQ2

17

DQ3

19

VSS7

21

DQ8

23

DQ9
VSS925VSS10

27

DQS#1
DQS129RESET#
VSS1131VSS12

33

DQ10

35

DQ11
VSS1337VSS14

39

DQ16

41

DQ17
VSS1543VSS16

45

DQS#2
DQS247VSS17

49

VSS18

51

DQ18
DQ1953VSS19

55

VSS20

57

DQ24
DQ2559VSS21
VSS2261DQS#3

63

DM3
VSS2365VSS24

67

DQ26

69

DQ27
VSS2571VSS26

73

CKE0

75

VDD1

77

NC1

79

BA2

81

VDD3
A12/BC#83A11

85

A9

87

VDD5

89

A8

91

A5

93

VDD7

95

A3

97

A1
VDD999VDD10

101

CK0

103

CK0#

105

VDD11

107

A10/AP

109

BA0

111

VDD13

113

WE#

115

CAS#

117

VDD15

119

A13

121

S1#

123

VDD17

125

NCTEST

127

VSS27

129

DQ32

131

DQ33

133

VSS29

135

DQS#4

137

DQS4

139

VSS32

141

DQ34

143

DQ35

145

VSS34

147

DQ40

149

DQ41

151

VSS36

153

DM5

155

VSS37

157

DQ42

159

DQ43

161

VSS39

163

DQ48

165

DQ49

167

VSS41

169

DQS#6

171

DQS6

173

VSS44

175

DQ50

177

DQ51

179

VSS46

181

DQ56

183

DQ57

185

VSS48

187

DM7

189

VSS49

191

DQ58

193

DQ59

195

VSS51

197

SA0

199

VDDSPD

201

SA1

+0.75VS

10K_0402_5%

12

R101

203

VTT1

205

G1

BOT SIDE STD

+3VM

5

FOX_AS0A626-U4SG-7HCONN@

VREF_CA

(LEFT)

VSS3
DQS0

VSS6

VSS8
DQ12
DQ13

DQ14
DQ15

DQ20
DQ21

DQ22
DQ23

DQ28
DQ29

DQS3
DQ30

DQ31

CKE1
VDD2

VDD4

VDD6

VDD8

CK1#

VDD12

RAS#

VDD14

ODT0

VDD16

ODT1
VDD18
VSS28

DQ36

DQ37
VSS30

VSS31

DQ38

DQ39
VSS33

DQ44

DQ45
VSS35

DQS#5

DQS5
VSS38

DQ46

DQ47
VSS40

DQ52

DQ53
VSS42

VSS43

DQ54

DQ55
VSS45

DQ60

DQ61
VSS47

DQS#7

DQS7
VSS50

DQ62

DQ63
VSS52

EVENT#

VTT2

2

DDR_B_D4

4

DQ4
DQ5

DQ6
DQ7

DM1

DM2

A15
A14

A7
A6

A4
A2

A0

CK1

BA1

S0#

NC2

DM4

DM6

SDA
SCL

G2

DDR_B_D5

6
8

DDR_B_DQS#0

10

DDR_B_DQS0

12
14

DDR_B_D6

16

DDR_B_D7

18
20

DDR_B_D12

22

DDR_B_D13

24
26

DDR_B_DM1

28

DRAMRST#

30
32

DDR_B_D14

34

DDR_B_D15

36
38

DDR_B_D20

40

DDR_B_D21

42
44

DDR_B_DM2

46
48

DDR_B_D22

50

DDR_B_D23

52
54

DDR_B_D28

56

DDR_B_D29

58
60

DDR_B_DQS#3

62

DDR_B_DQS3

64
66

DDR_B_D30

68

DDR_B_D31

70
72

DDR_CKE1_DIMMB

74
76

DDR_B_MA15

78

DDR_B_MA14

80
82

DDR_B_MA11

84

DDR_B_MA7

86
88

DDR_B_MA6

90

DDR_B_MA4

92
94

DDR_B_MA2

96

DDR_B_MA0

98
100

M_CLK_B_DDR1

102

M_CLK_B_DDR#1 DDR_CS2_DIMMB#

104
106

DDR_B_BS1

108

DDR_B_RAS#

110
112

DDR_CS0_DIMMB#

114

M_B_ODT0

116
118

M_B_ODT1

120
122
124
126
128

DDR_B_D36

130

DDR_B_D37

132
134

DDR_B_DM4

136
138

DDR_B_D38

140

DDR_B_D39

142
144

DDR_B_D44

146

DDR_B_D45

148
150

DDR_B_DQS#5

152

DDR_B_DQS5

154
156

DDR_B_D46

158

DDR_B_D47

160
162

DDR_B_D52

164

DDR_B_D53

166
168

DDR_B_DM6

170
172

DDR_B_D54

174

DDR_B_D55

176
178

DDR_B_D60

180

DDR_B_D61

182
184

DDR_B_DQS#7

186

DDR_B_DQS7

188
190

DDR_B_D62

192

DDR_B_D63

194
196

PM_EXTTS#1_R

198

SMB_DATA_S3

200

SMB_CLK_S3

202
204

+0.75VS

206

Change R99.1 to GND (SPD address
should be 0xA4)Change R98.1 to
+3VM (SPD address should be
0xA6)

4

1. Remove R91, R684.

2. Change R92 & R94 to 1K to another divider.

3. Install R93, R95.

+1.5V

Layout Note: Place near JDIMM3

C175

10U_0603_6.3V6M

C177

C176

C174

1

@

2

10U_0603_6.3V6M

10U_0603_6.3V6M

1

1

@

@

2

2

10U_0603_6.3V6M

C178

1

2

C179

10U_0603_6.3V6M

1

2

1

2

Remove C172, C173, C184, & C185. 5/11

+1.5V

1027: Change JDIMM3.1 and JDIMM4.1 to connect to V_DDR_CPU_REF_B via
R91 & R684 and move V_DDR_CPU_REF1 option and resistors R93 and R95
to JDIMM3.1 and JDIMM4.1. (Will check with Intel whether we should
use separate divider for VREF_DQ and VREF_CA for M1 solution?)

DDR_CKE1_DIMMB 6

M_CLK_B_DDR1 6
M_CLK_B_DDR#1 6 DDR_CS2_DIMMB# 5

DDR_B_BS1 6
DDR_B_RAS# 6

DDR_CS0_DIMMB# 6
M_B_ODT0 6

M_B_ODT1 6

C198

0.1U_0402_16V4Z

1

2

PM_EXTTS#1_R 4 ,9
SMB_DATA_S3 4,9,12,14,26
SMB_CLK_S3 4,9,12,14,2 6

C199

1

2

V_DDR_CPU_REF_B

2.2U_0402_6.3V6M

Layout Note: Place near JDIMM4

C187

10U_0603_6.3V6M

C189

C186

10U_0603_6.3V6M

1

1

@

2

2

As short as possible

Layout Note: Place near
JDIMM2.203 & JDIMM2.204

+0.75VS +0.75VS

C200

1U_0603_10V4Z

1

@

2

C188

DDR_B_DQS#[0..7]6
DDR_B_D[0..63]6
DDR_B_DM[0..7]6
DDR_B_DQS[0..7]6
DDR_B_MA[0..15]6

C201

1

2

10U_0603_6.3V6M

1

2

C202

1U_0603_10V4Z

@

1

@

2

1U_0603_10V4Z

1

2

10U_0603_6.3V6M

C191

C190

10U_0603_6.3V6M

1

1

@

2

2

C203

1U_0603_10V4Z

1

2

+0.75VS

C208

10U_0603_6.3V6M

1

Layout Note: Place between
JDIMM3 & JDIMM3.

2

VREFDQ

V_DDR_CPU_REF_BM1

V_DDR_CPU_REF1M3

4

R91, R92, R94, R684

R93, R95

3

4/30

10U_0603_6.3V6M

C180

1

2

0.1U_0201_6.3V6K

C181

V_DDR_CPU_REF_DB

C182

0.1U_0201_6.3V6K

1

1

2

2

V_DDR_CPU_REF1

0.1U_0201_6.3V6K

Change ESR to 6m for DB1. 12/16

10U_0603_6.3V6M

C192

0.1U_0201_6.3V6K

C194

0.1U_0201_6.3V6K

C193

0.1U_0201_6.3V6K

1

2

Layout Note: Place near
JDIMM1.203 & JDIMM1.204

1

1

2

2

C206

C205

1U_0603_10V4Z

C204

1U_0603_10V4Z

1

1

1

@

@

2

2

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC . AND CONTAINS CONFIDEN TIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE C OMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFOR MATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOU T PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

C183

0.1U_0201_6.3V6K

C171

1

1

+

2

2

C195

0.1U_0201_6.3V6K

1

2

C207

1U_0603_10V4Z

1U_0603_10V4Z

1

2

SPD address 0xA6

+3VS

Change. 2/17

R93 0_0402_5%

1 2

C168

C167

0.1U_0402_16V4Z

1

1

330U_X_2VM_R6M

2

2

DDR_CKE2_DIMMB5

M_CLK_B_DDR25
M_CLK_B_DDR#25

DDR_CS3_DIMMB#5

C209

1

2

2008/09/15 2009/09/15

DDR_B_D0

2.2U_0402_6.3V6M

DDR_B_D1
DDR_B_DM0
DDR_B_D2

DDR_B_D3
DDR_B_D8

DDR_B_D9
DDR_B_DQS#1

DDR_B_DQS1
DDR_B_D10

DDR_B_D11
DDR_B_D16

DDR_B_D17
DDR_B_DQS#2

DDR_B_DQS2
DDR_B_D18

DDR_B_D19
DDR_B_D24

DDR_B_D25
DDR_B_DM3
DDR_B_D26

DDR_B_D27

DDR_B_BS2
DDR_B_MA12

DDR_B_MA9
DDR_B_MA8

DDR_B_MA5
DDR_B_MA3

DDR_B_MA1
M_CLK_B_DDR2

M_CLK_B_DDR#2
DDR_B_MA10

DDR_B_BS0
DDR_B_WE#

DDR_B_CAS#
DDR_B_MA13

DDR_CS3_DIMMB#

DDR_B_D32
DDR_B_D33

DDR_B_DQS#4
DDR_B_DQS4

DDR_B_D34
DDR_B_D35

DDR_B_D40
DDR_B_D41

DDR_B_DM5
DDR_B_D42

DDR_B_D43
DDR_B_D48

DDR_B_D49
DDR_B_DQS#6

DDR_B_DQS6
DDR_B_D50

DDR_B_D51
DDR_B_D56

DDR_B_D57
DDR_B_DM7
DDR_B_D58

DDR_B_D59

R98 10K_0402_5%

1 2

C210

0.1U_0402_16V4Z

2.2U_0402_6.3V6M

+0.75VS +0.75VS

10K_0402_5%

1

12

R100

2

+3VM

Compal Secret Data

Deciphered Date

+1.5V

2

DDR3 SO-DIMM B

JDIMM3

FOX_AS0A626-U4RG-7HCONN@

VREF_DQ1VSS1

3

VSS2

5

DQ0

7

DQ1
VSS49DQS#0

11

DM0

13

VSS5

15

DQ2

17

DQ3

19

VSS7

21

DQ8

23

DQ9

25

VSS9

27

DQS#1
DQS129RESET#
VSS1131VSS12

33

DQ10

35

DQ11
VSS1337VSS14

39

DQ16

41

DQ17
VSS1543VSS16

45

DQS#2

47

DQS2

49

VSS18

51

DQ18

53

DQ19

55

VSS20

57

DQ24

59

DQ25
VSS2261DQS#3

63

DM3
VSS2365VSS24

67

DQ26

69

DQ27
VSS2571VSS26

73

CKE0

75

VDD1

77

NC1

79

BA2

81

VDD3

83

A12/BC#

85

A9

87

VDD5

89

A8

91

A5

93

VDD7

95

A3

97

A1
VDD999VDD10

101

CK0

103

CK0#

105

VDD11

107

A10/AP

109

BA0

111

VDD13

113

WE#

115

CAS#

117

VDD15

119

A13

121

S1#

123

VDD17

125

NCTEST

127

VSS27

129

DQ32

131

DQ33

133

VSS29

135

DQS#4

137

DQS4

139

VSS32

141

DQ34

143

DQ35

145

VSS34

147

DQ40

149

DQ41

151

VSS36

153

DM5

155

VSS37

157

DQ42

159

DQ43

161

VSS39

163

DQ48

165

DQ49

167

VSS41

169

DQS#6

171

DQS6

173

VSS44

175

DQ50

177

DQ51

179

VSS46

181

DQ56

183

DQ57

185

VSS48

187

DM7

189

VSS49

191

DQ58

193

DQ59

195

VSS51

197

SA0

199

VDDSPD

201

SA1

203

VTT1

205

G1

VREF_CA

VSS3

DQS0

VSS6

VSS8
DQ12
DQ13

VSS10

DQ14
DQ15

DQ20
DQ21

VSS17

DQ22
DQ23

VSS19

DQ28
DQ29

VSS21

DQS3

DQ30
DQ31

CKE1

VDD2

VDD4

VDD6

VDD8

CK1#

VDD12

RAS#

VDD14

ODT0

VDD16

ODT1

VDD18

VSS28

DQ36
DQ37

VSS30
VSS31

DQ38
DQ39

VSS33

DQ44
DQ45

VSS35

DQS#5

DQS5

VSS38

DQ46
DQ47

VSS40

DQ52
DQ53

VSS42
VSS43

DQ54
DQ55

VSS45

DQ60
DQ61

VSS47

DQS#7

DQS7

VSS50

DQ62
DQ63

VSS52

EVENT#

VTT2

DQ4
DQ5

DQ6
DQ7

DM1

DM2

A15
A14

A11

A7
A6

A4
A2

A0

CK1

BA1

S0#

NC2

DM4

DM6

SDA
SCL

G2

BOT SIDE REV

(RIGHT)

2

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72

74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204

206

DDR_B_D4
DDR_B_D5

DDR_B_DQS#0
DDR_B_DQS0

DDR_B_D6
DDR_B_D7

DDR_B_D12
DDR_B_D13

DDR_B_DM1
DRAMRST#

DDR_B_D14
DDR_B_D15

DDR_B_D20
DDR_B_D21

DDR_B_DM2
DDR_B_D22

DDR_B_D23
DDR_B_D28

DDR_B_D29
DDR_B_DQS#3

DDR_B_DQS3
DDR_B_D30

DDR_B_D31

+1.5V

DDR_CKE3_DIMMBDDR_CKE2_DIMMB
DDR_B_MA15

DDR_B_MA14
DDR_B_MA11

DDR_B_MA7
DDR_B_MA6

DDR_B_MA4
DDR_B_MA2

DDR_B_MA0
M_CLK_B_DDR3

M_CLK_B_DDR#3
DDR_B_BS1

DDR_B_RAS#

M_B_ODT2
M_B_ODT3

DDR_B_D36
DDR_B_D37

DDR_B_DM4
DDR_B_D38

DDR_B_D39
DDR_B_D44

DDR_B_D45
DDR_B_DQS#5

DDR_B_DQS5
DDR_B_D46

DDR_B_D47
DDR_B_D52

DDR_B_D53
DDR_B_DM6
DDR_B_D54

DDR_B_D55
DDR_B_D60

DDR_B_D61
DDR_B_DQS#7

DDR_B_DQS7
DDR_B_D62

DDR_B_D63
PM_EXTTS#1_R

SMB_DATA_S3
SMB_CLK_S3

Title

Size Document Number Rev

Custom
Date: Sheet

C196

1

2

Compal Electronics, Inc.

DDRIII-SODIMM CHANNEL B

LA-4951P

1

DRAMRST# 9,11

DDR_CKE3_DIMMB 5

M_CLK_B_DDR3 5
M_CLK_B_DDR#3 5

M_B_ODT2 5
M_B_ODT3 5

0.1U_0402_16V4Z

V_DDR_CPU_REF_B

As short as possible

C197

2.2U_0402_6.3V6M

1

2

Add. 4/30

V_DDR_CPU _REF_D B
+1.5V

R92

R94

1

12

1K_0402_1%

12

1K_0402_1%

10 48Tuesday, July 28, 2009

0.4

of

http://hobi-elektronika.net

Intel S3

5

4

3

2

1

D D

Reserve R756 & R757. 7/19

Q72
AP2302GN_SOT23

D

S

V_DDR_CPU_REF0

V_DDR_CPU_REF1

PCH_DDR_RST

1 3

2

G

1 3

Q73
AP2302GN_SOT23

D

Remove Q77. 7/19
Remove R747. 7/20

+1.5V

C C

Q74
2N7002_SOT23-3

D

S

SM_DRAMRST#4

+3VALW

12

R754
100K_0402_5%

@

B B

13

G

2

PCH_DDR_RST

12

R745

100K_0402_5%@

12

C719

1

2

R756 100K_0402_5%@

1 2

S

R757 100K_0402_5%@

G

2

1 2

Reserve R756 & R757. 7/19

R743
1K_0402_5%

DRAMRST# 9,10

PCH_DDR_RST 16

470P_0402_50V8J

@

V_CPU_DDR_REF0

V_CPU_DDR_REF1

+1.5V

0.1U_0402_10V6K

C648

1

2

RUNON35

Add C722. 7/20

Modify. 7/9

SLP_S3

VCCP_EN21,34,40

Q76
AO4430 1N SOIC-8

8
7

5

4

R749 0_0402_5%

1 2

+1.5V to +1.5VS_CPU_VDDQ Transfer

+1.5VS_CPU_VDDQ

1
2
36

C649

C722 0.01U_0402_50V7K@

1 2

0.1U_0402_10V6K

1

2

+1.5V

C715 0.1U_02 01_6.3V6K@

1 2

C716 0.1U_02 01_6.3V6K@

1 2

C717 0.1U_02 01_6.3V6K

1 2

C718 0.1U_02 01_6.3V6K

1 2

C720 0.1U_04 02_16V4Z

1 2

C721 0.1U_04 02_16V4Z

1 2

Add on 7/14. close to CPU side.

+3VALW

R748

0_0402_5%@

U3

5

1

IN1

VCC

2

IN2

GND

3

MC74VHC1G08DFT 2G_SC 70- 5

4

OUT

1 2

+1.5VS_CPU_VDDQ

R750 0_0402_5%@

1 2

SLP_S335

VCCP_1.5VSPWRGD 4

Change R746
to 220ohm.
7/14

SLP_S3

PWR_GD 4,13,31,34

+1.5VS_CPU_VDDQ

12

R746
220_0402_5%

13

D

Q75

2

SSM3K7002F_SC59-3

G

S

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC . AND CONTAINS CONFIDEN TIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE C OMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFOR MATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOU T PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2008/09/15 2009/09/15

Compal Secret Data

Deciphered Date

2

Title

Size Document Number Re v

Custom
Date: Sheet

Compal Electronics, Inc.

Intel S3 power saving

LA-4951P

1

11 48Tuesday, July 28, 2009

of

0.4

http://hobi-elektronika.net

5

EMI Capacitor

REF_0/CPU_SEL

12

C213 10P_0402_50V8C@

D D

Change on 2/24.

+1.05VS_CK505

(Default)

0 133MHz

1

100MHz 100MHz

CPU_1PIN 30 CPU_0

133MHz

CLK_BUF_DOT9614

CLK_BUF_DOT96#14

CLK_BUF_CKSSCD14

CLK_BUF_CKSSCD#14

CLK_DMI14

CLK_DMI#14

+3VS_CK505

R113 10K_0402_5%@

1 2

R114 10K_0402_5%

1 2

R102 0_0402_5%

1 2

R104 0_0402_5%

1 2

R106 0_0402_5%

1 2

R108 0_0402_5%

1 2

R110 0_0402_5%

1 2

R111 0_0402_5%

1 2

R119 10K_0402_5%

1 2

REF_0/CPU_SEL

4

Add on 7/9.

3

SCL
SDA

VDD_REF

XTAL_IN

XTAL_OUT

VSS_REF

VDD_CPU

CPU_0

CPU_0#

VSS_CPU

CPU_1

CPU_1#

VDD_SRC

+3VS_CK505 +1.05VS_CK505+3VS/+1.5VS_CK505 +1.05VS_CK505

32
31
30
29
28
27
26
25

24
23
22
21
20
19
18
17

REF_0/CPU_SEL
CLK_XTAL_IN

CLK_XTAL_OUT
CK_PWRGD

R_CLK_BUF_BCLK#

Add on 7/9.

+3VS/+1.5VS_CK505

U2

1

VDD_DOT

2

L_CLK_BUF_DOT96
L_CLK_BUF_DOT96#

+3VS_CK505

L_CLK_BUF_CKSSCD R_CLK_BUF_BCLK
L_CLK_BUF_CKSSCD#

L_CLK_DMI
L_CLK_DMI#

CPU_STOP#

VSS_DOT

3

DOT_96

4

DOT_96#

5

VDD_27

6

27MHZ

7

27MHZ_SS

8

VSS_27

9

VSS_SATA

10

SRC_1/SATA

11

SRC_1#/SATA#

12

VSS_SRC

13

SRC_2

14

SRC_2#

15

VDD_SRC_IO

16

CPU_STOP#

SLG8SP585VTR_QFN32_5X5

REF_0/CPU_SEL

CKPWRGD/PD#

VDD_CPU_IO

TGND

33

2

R103 33_0402_5%

R107 0_0402_5%
R109 0_0402_5%

1 2
1 2

CK_PWRGD

12

Q2
2N7002_SOT23-3

13

D

S

SMB_CLK_S3 4,9,10,14,26
SMB_DATA_S3 4,9,10,14,26

CLK_14M_PCH 14

CLK_BUF_BCLK 14
CLK_BUF_BCLK# 14

R112 10K_0402_5%

1 2

2

G

CLK_EN# 43

+3VS_CK505

C214

33P_0402_50V8J

1

14.31818MHZ_20P_1BX14318BE1A

CLK_XTAL_OUT
CLK_XTAL_IN

Y1

12

2

2

C215

1

33P_0402_50V8J

1

Closed to U2

+1.05VS_CK505+1.05VS

R115 0_0603_5%

1 2

C C

+3VS

R121 0_0603_5%

1 2

C221

+3VS_CK505

C230

1

2

1

2

10U_0805_10V4Z

C222

C231

10U_0805_10V4Z

1

2

1

2

@

C224

10U_0805_10V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C223

1

2

C232

1

2

C225

0.1U_0402_16V4Z

1

1

2

@

2

+3VS/+1.5VS_CK505 +3VS+1.5VS

0.1U_0402_16V4Z

C233

1

2

C710

C226

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

47P_0402_50V8J

1

12

Install C710. 7/21

2

R752 0_0603_5%@

1 2

R753 0_0603_5%

1 2

C234

0.1U_0402_16V4Z

C236

C235

0.1U_0402_16V4Z

1

2

1

1

2

2

0.1U_0402_16V4Z

C711

47P_0402_50V8J

12

@

B B

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC . AND CONTAINS CONFIDEN TIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE C OMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFOR MATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOU T PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2008/09/09 2009/09/09

Compal Secret Data

Deciphered Date

2

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

CLOCK GENERATOR

LA-4951P

1

of

12 48Tuesday, July 28, 2009

0.4

http://hobi-elektronika.net

5

4

3

2

1

SATA HDD CONN.

RTCIHDA

SPI JTAG

D1

HF

HDA_SPKR

FWH0 / LAD0
FWH1 / LAD1
FWH2 / LAD2
FWH3 / LAD3

FWH4 / LFRAME#

LDRQ0#

LDRQ1# / GPIO23

LPC

SERIRQ

SATA0RXN
SATA0RXP

SATA0TXN
SATA0TXP

SATA1RXN
SATA1RXP

SATA1TXN
SATA1TXP

SATA2RXN
SATA2RXP

SATA2TXN
SATA2TXP

SATA3RXN
SATA3RXP

SATA3TXN
SATA3TXP

SATA4RXN
SATA4RXP

SATA4TXN

SATA

SATA4TXP

SATA5RXN
SATA5RXP

SATA5TXN
SATA5TXP

SATAICOMPO

SATAICOMPI

SATALED#

SATA0GP / GPIO21
SATA1GP / GPIO19

1 2

12

2

1 2

3

R196 1K_0402_5%

D33
B33
C32
A32

C34
A34

F34

Change net name. 2/24

AB9

SATA_PRX_DTX_N0

AK7

SATA_PRX_DTX_P0

AK6

SATA_PTX_DRX_N0

AK11

SATA_PTX_DRX_P0

AK9

SATA_PRX_DTX_N1

AH6

SATA_PRX_DTX_P1

AH5

SATA_PTX_DRX_N1

AH9

SATA_PTX_DRX_P1

AH8
AF11

AF9
AF7
AF6

SATA_PRX_DTX_N3

AH3

SATA_PRX_DTX_P3

AH1

SATA_PTX_DRX_N3

AF3

SATA_PTX_DRX_P3

AF1

SATA_PRX_DTX_N4

AD9

SATA_PRX_DTX_P4

AD8

SATA_PTX_DRX_N4

AD6

SATA_PTX_DRX_P4

AD5
AD3

AD1
AB3
AB1

AF16

SATACOMP

AF15

R183 10K_0402_5%

T3

SATA_DET#0

Y9

GPIO19

V1

R191

20K_0402_5%@

PCH_JTAG_RST#

R195

10K_0402_5%@

R187 51_0402_5%

BATT1.1+VREG3_51125+RTCVCC

Move C264~C267 to docking side. 2/24

LPC_LAD0 24,28,31,33
LPC_LAD1 24,28,31,33
LPC_LAD2 24,28,31,33

LPC_LAD3 24,28,31,33
LPC_LFRAME# 24,28,31,33
LPC_LDRQ#0 33

R167 10K_0402_5%

1 2

T100 PAD
T101 PAD
T102 PAD
T103 PAD

Layout rule trace len：gth < 0.5"

R180 37.4_0402_1%

1 2

1 2

R152 0_0402_5%

1 2

USB_OC#016
USB_OC#116

USB_OC#216
USB_OC#316

USB_OC#416
USB_OC#516

USB_OC#616 PCH_XDP_GPIO16 16
USB_OC#716,30

PWR_GD4,11,31,34

PM_PWRBTN#_R4,15

+3VS +3VS

1 2

Reverse signals of
pin1&2. 1/19

4

JBATT1

NC13NC2

ACES_50273-0020N-001 CONN@

112

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC . AND CONTAINS CONFIDEN TIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE C OMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFOR MATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOU T PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

Change net name. 5/11

NAND_DET# 24

R140 10K_0402_5%

SIRQ 28,31,32,33

+3VS

SATA_PRX_DTX_N2 29
SATA_PRX_DTX_P2 29
SATA_PTX_C_DRX_N2 29
SATA_PTX_C_DRX_P2 29

Change SATA assignments to
support PM (Port Multiplier):
Move SATA port#4 to SATA port#5
Move SATA port#2 to SATA port#4
Move SATA port#3 to SATA port#2

SATA_PRX_DTX_N5 29
SATA_PRX_DTX_P5 29
SATA_PTX_C_DRX_N5 29
SATA_PTX_C_DRX_P5 29

+3VS

SATA_LED# 29,30

HDD_HALTLED

R702 33_0402_5%@
R703 33_0402_5%@

R704 33_0402_5%@
R705 33_0402_5%@

R134 33_0402_5%@
R706 33_0402_5%@

R707 33_0402_5%@
R708 33_0402_5%@

R179 0_0402_5%

PCH_JTAG_TCK PCH_JTAG_T C K_R

1 2

R184

10K_0402_5%

HDD_HALTLED
SATA_DET#0

+1.05VS

HDD_HALTLED 30

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

1 2

T92PAD
T93PAD

1 2

R181 0_0402_1%

+3VS

1 2

1 2

XDP_FN0
XDP_FN1

XDP_FN2
XDP_FN3

XDP_FN4
XDP_FN5 XDP_FN13

XDP_FN6
XDP_FN7

XDP_PWRBTN#_R

2008/09/15 2009/09/15

+3VS

R185
10K_0402_5%

2/10

Change JTAG DDEBUG CONN to 60pin. 12/02

1
3
5
7

9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59

Compal Secret Data

Deciphered Date

R162 1K_0402_5%@

+3VS

1

C253

+RTCVCC

R163
20K_0402_5%

1 2

D D

1 2

R164
20K_0402_5%

Del signal connect to LID_SW#. 7/7

C C

C268 47P_0402_50V8J@

1 2

C269 47P_0402_50V8J@

1 2

C270 47P_0402_50V8J@

1 2

C271 47P_0402_50V8J@

1 2

1 2

R161 10M_0402_5%

1

C251

2

18P_0402_50V8J

Y3

B B

RefDes

D51

1

PJDLC05_SOT23-3@

SATA_PTX_DRX_P4
SATA_PTX_DRX_N4

SATA_PRX_DTX_N4
SATA_PRX_DTX_P4

R189
R193

R192

R194
R187
R191
R195

PCH_JTAG_TDO

PCH_JTAG_TMS

PCH_JTAG_TDI*

PCH_JTAG_TCK
PCH_JTAG_RST#

A A

E-SATA CONN.

12

2

1U_0603_10V4Z

CLRP1

SHORT PADS

R165 1M_0402_5%

1 2

R166 330K_0402_5%

1 2

High = Internal VR Enabled(Default)

R168 33_0402_5%

1 2

R169 33_0402_5%

1 2

R170 33_0402_5%

1 2

R171 33_0402_5%

1 2

R172 33_0402_5%

1 2

R173 33_0402_5%

1 2

AQUAWHITE_BATLED

R174 33_0402_5%

1 2

R175 33_0402_5%

1 2

R176 1K_0402_5%

1 2

R177 10K_0402_5%

1 2

HDA_BIT_CLK_MD C 25

HDA_BIT_CLK_CODEC 30

HDA_SDOUT_MDC 25

HDA_SDOUT_CODEC 30

KBC_SPI_CLK_R31
KBC_SPI_CS0#_R31
KBC_SPI_CS1#_R31

KBC_SPI_SI_R31

KBC_SPI_SO31

ES2
No Install
No Install
No Install
No Install
No InstallR190
No Install100ohm
51ohm
No Install
No Install

D52

1

PJDLC05_SOT23-3@

HDA_SYNC_MDC25

HDA_SYNC_CODEC30

HDA_RST#_MDC25

HDA_RST#_CODEC30

AQUAWHITE_BATLED30

18P_0402_50V8J

ES2
200ohm
100ohm
200ohm
100ohm
200ohm
100ohm
51ohm
20Kohm
10Kohm

+RTCVCC

HDA_BIT_CLK_CODEC

HDA_SPKR30

HDA_SDIN030
HDA_SDIN125

HDA_SDOUT_MDC
HDA_SDOUT_CODEC

+3VALW

Change R182 & R186 to 0 ohm. 11/24

ES1
No Install
No Install
No InstallR188
No Install
20Kohm
10Kohm
51ohm
No Install
No Install

SATA_PTX_C_DRX_P4
SATA_PTX_C_DRX_N4

SATA_PRX_C_DTX_N4
SATA_PRX_C_DTX_P4

Remove

1

C258

CLRP2.
4/25

2

1U_0603_10V4Z

HDA_BIT_ C LK_MDC
HDA_BIT_CLK_CODEC
HDA_SDOUT_MDC
HDA_SDOUT_CODEC

PCH_RTCX1
PCH_RTCX2

32.768KHZ_12.5PF_Q13MC14610002

1

2

1

C252

OSC4OSC

2

NC3NC

PCH JTAG Enable PCH JTAG Disable
ES1PCH Pin
No Install
No Install
200ohm
100ohm
200ohm

51ohm
20Kohm
10Kohm

SATA_PTX_C_DRX_P4

3

SATA_PTX_C_DRX_N4 SATA_PRX_C_DTX_P4

2

C241 0.01U_0402_50V7K

1 2

C242 0.01U_0402_50V7K

1 2

C245 0.01U_0402_50V7K

1 2

C246 0.01U_0402_50V7K

1 2

5

PCH_RTCX1
PCH_RTCX2

PCH_RTCRST#
PCH_SRTCRST#
SM_INTRUDER#
PCH_INTVRMEN

HDA_BIT_C LKHDA_BIT_ C LK_MDC
HDA_SYNC
HDA_SPKR
HDA_RST#

HDA_SDIN0
HDA_SDIN1

HDA_SDOUT

GPIO33AQUAWHITE_BATLED

PCH_JTAG_TCK
PCH_JTAG_TMS
PCH_JTAG_TDI
PCH_JTAG_TDO
PCH_JTAG_RST#

R182 0_0402_5%

1 2

R186 0_0402_5%

1 2

Change R188 ~ R195 to NO INSTALL. 7/14

+3VALW +3VALW +3VALW +3VALW

12

R188

200_0402_5%@

PCH_JTAG_TMS

12

R192

100_0402_1%@

SATA_PRX_C_DTX_N4

3
2

JETA1

1

GND

2

A+

3
4
5
6
7

SUYIN_127365MR007S406ZRCONN@

A­GND
B­B+
GND

GND
GND
GND
GND

8
9
10
11

D13

C14
D17

D29

C30

G30

H32

BA2
AV3
AY3

AY1
AV1

12

R189

200_0402_5%@

PCH_JTAG_TDO XDP_FN12

12

R193

100_0402_1%@

4

1 2

LOW=Default HIGH=No Reboot

U4A

B13

RTCX1
RTCX2

RTCRST#
SRTCRST#

A16

INTRUDER#

A14

INTVRMEN

A30

HDA_BCLK
HDA_SYNC

P1

SPKR
HDA_RST#

HDA_SDIN0

F30

HDA_SDIN1

E32

HDA_SDIN2

F32

HDA_SDIN3

B29

HDA_SDO

HDA_DOCK_EN# / GPIO33

J30

HDA_DOCK_RST# / GPIO13

M3

JTAG_TCK

K3

JTAG_TMS

K1

JTAG_TDI

J2

JTAG_TDO

J4

TRST#

SPI_CLK
SPI_CS0#
SPI_CS1#

SPI_MOSI
SPI_MISO

IBEXPEAK-M_FCBGA1071

1

C272
1U_0603_10V4Z

2

R190

200_0402_5%@

1 2

PCH_JTAG_TDI

R194

100_0402_1%@

1 2

+3VL to +VREG3_51125. 7/22

1

BAV70W_SOT323-3

JHDD1

26

boss

25

boss

24

GND

23

GND

ALLTO_C16674-12204-L_NRCONN@

SATA ODD CONN.

JODD1

14

GND

15

GND

OCTEK_SLS-13DJ1G_N R

PCH XDP Conn.

JTAG1

GND0
OBSFN_A0
OBSFN_A1
GND2
OBSDATA_A0
OBSDATA_A1
GND4
OBSDATA_A2
OBSDATA_A3
GND6
OBSFN_B0
OBSFN_B1
GND8
OBSDATA_B0
OBSDATA_B1
GND10
OBSDATA_B2
OBSDATA_B3
GND12
PWRGOOD/HOOK0
HOOK1
VCC_OBS_AB
HOOK2
HOOK3
GND14
SDA
SCL
TCK1
TCK0
GND16

SAMTE_BSH-030-01-L-D-ACONN@

2

1

GND

2

RX+

3

RX-

4

GND

5

TX-

6

TX+

7

GND

8

3.3V

9

3.3V

10

3.3V

11

GND

12

GND

13

GND

14

5V

15

5V

16

5V

17

GND

18

Rsv

19

GND

20

12V

21

12V

22

12V

1

GND

2

A+

3

A-

4

GND

5

B-

6

B+

7

GND

8

DP

9

V5

10

V5

11

MD

12

GND

13

GND

CONN@

GND1
OBSFN_C0
OBSFN_C1

GND3

OBSDATA_C0
OBSDATA_C1

GND5

OBSDATA_C2
OBSDATA_C3

GND7
OBSFN_D0
OBSFN_D1

GND9

OBSDATA_D0
OBSDATA_D1

GND11
OBSDATA_D2
OBSDATA_D3

GND13

ITPCLK/HOOK4

ITPCLK#/HOOK5

VCC_OBS_CD

RESET#/HOOK6

DBR#/HOOK7

GND15

TRST#

TMS

GND17

SATA_PTX_C_DRX_P0
SATA_PTX_C_DRX_N0

SATA_PRX_C_DTX_N0
SATA_PRX_C_DTX_P0

+5VS

SATA_PTX_C_DRX_P1
SATA_PTX_C_DRX_N1

SATA_PRX_C_DTX_N1 SATA_PRX_DTX_N1

R569

0_0402_5%@

1 2

+5VS

Swap. 4/24

2

XDP_FN16

4

XDP_FN17

6
8

XDP_FN8

10

XDP_FN9

12
14

XDP_FN10

16

XDP_FN11

18
20
22
24
26
28
30
32

XDP_FN14

34

XDP_FN15

36
38
40
42
44

R178 1K_0402_5%

46
48
50

PCH_JTAG_TDO#_R

52

TD0

PCH_JTAG_RST#_R

54

PCH_JTAG_TDI_R

56

TDI

PCH_JTAG_TMS_R

58
60

C239 0.01U_0402_50V7K

1 2

C240 0.01U_0402_50V7K

1 2

C243 0.01U_0402_50V7K

1 2

C244 0.01U_0402_50V7K

1 2

+5VS

10U_0805_10V4Z

0.1U_0402_16V4Z

1

1

C247

C248

2

2

C254 0.01U_0402_50V7K

1 2

C255 0.01U_0402_50V7K

1 2

C256 0.01U_0402_50V7K

1 2

C257 0.01U_0402_50V7K

1 2

ODD_DET# 16

1

C259

0.1U_0402_16V4Z@

2

Change C259 NI and
RV R569. 11/24

PCH_JTAG_TDO
PCH_JTAG_TMS
PCH_JTAG_TDI
PCH_JTAG_RST#

R709 33_0402_5%@

1 2

R710 33_0402_5%@

1 2

R711 33_0402_5%@

1 2

R712 33_0402_5%@

1 2

R713 33_0402_5%@

1 2

R714 33_0402_5%@

1 2

R715 33_0402_5%@

1 2

R716 33_0402_5%@

1 2

R717 33_0402_5%@

1 2

R718 33_0402_5%@

1 2

1 2

R719 0_0402_1%

1 2

R720 0_0402_1%@

1 2

R721 0_0402_1%

1 2

R722 0_0402_1%

1 2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

1

C250

C249

2

2

+5VS

C260

R740 51_0402_5%@

1 2

R741 51_0402_5%@

1 2

R742 51_0402_5%@

1 2

R744 51_0402_5%@

1 2

PLT_RST# 4,16,21,22,24,27,28,30
XDP_DBRESET# 4,15

1

2

NI R720. 0206

Title

Size Document Number Re v

Custom
Date: Sheet

Compal Electronics, Inc.

IBEX-M(1/6)-HDA/JTAG/SATA

LA-4951P

1

SATA_PTX_DRX_P0
SATA_PTX_DRX_N0

SATA_PRX_DTX_N0
SATA_PRX_DTX_P0

SATA_PTX_DRX_P1
SATA_PTX_DRX_N1

SATA_PRX_DTX_P1SATA_PRX_C_DTX_P1

1U_0603_10V4Z

0.1U_0402_16V4Z

1

C261

2

PCH_XDP_GPIO28 16
PCH_XDP_GPIO0 16,27

PCH_XDP_GPIO20 14

PCH_XDP_GPIO18 14

SATA_DET#0
GPIO19

PCH_XDP_GPIO36 16
PCH_XDP_GPIO37 16

PCH_XDP_GPIO49 16

PCH_JTAG_TDO
PCH_JTAG_RST#
PCH_JTAG_TDI
PCH_JTAG_TMS

13 48Tuesday, July 28, 2009

1

C262

2

of

10U_0805_10V4Z

+1.05VS

1

C263

2

10U_0805_10V4Z

0.4

http://hobi-elektronika.net

5

4

3

2

1

D D

PCIE_PRX_DTX_N230

WLAN

EXP

PCIE_PRX_DTX_P230
PCIE_PTX_C_DRX_N230
PCIE_PTX_C_DRX_P230

PCIE_PRX_DTX_N424
PCIE_PRX_DTX_P424
PCIE_PTX_C_DRX_N424
PCIE_PTX_C_DRX_P424

PCIE_PRX_DTX_N622
PCIE_PRX_DTX_P622
PCIE_PTX_C_DRX_N622
PCIE_PTX_C_DRX_P622

PCIE_PRX_DTX_N827
PCIE_PRX_DTX_P827
PCIE_PTX_C_DRX_N827
PCIE_PTX_C_DRX_P827

+3VS

CLK_PCIE_LAN_REQ#_R22

CLK_PCIE_EXP_PCH#30
CLK_PCIE_EXP_PCH30

PCH_XDP_GPIO2013

CLK_PCIE_MCARD_PCH#24
CLK_PCIE_MCARD_PCH24

R210 10K_0402_5%

CLKREQ_WLAN#24

EXP

WLAN

NIC

C C

New add for USB3.0. 11/20

USB3.0

Add R459 and connect to
CLK_PCIE_LAN_REQ#_R.

B B

C273 0.1U_0402_16V4Z
C274 0.1U_0402_16V4Z

C275 0.1U_0402_16V4Z
C276 0.1U_0402_16V4Z

C279 0.1U_0402_16V4Z
C280 0.1U_0402_16V4Z

C653 0.1U_0402_16V4Z
C654 0.1U_0402_16V4Z

PCH_XDP_GPIO1813

1 2

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

+3VALW

Remove R724.7/21

+3VALW

Change power rail from +3VS. 11/11

New for USB30. 11/20

CLK_PCIE_USB30_PCH#27
CLK_PCIE_USB30_PCH27

PEG_B_CLKREQ#27

NIC

Move CLK_PCIE_LAN_PCH/# differential clock
from CLKOUT_PEG_B_P/N to
CLKOUT_PCIE6P/N...and move CLK_PCIE_LAN_REQ
to PCIECLKREQ6# (GPIO45) and add R300
pull-up to +3VS. 10/30

A A

+3VALW

5

+3VALW

R701 10K_0402_5%@

1 2

@ R701. 12/02

PCIE_PRX_DTX_N2
PCIE_PRX_DTX_P2
PCIE_PTX_DRX_N2
PCIE_PTX_DRX_P2

PCIE_PRX_DTX_N4
PCIE_PRX_DTX_P4
PCIE_PTX_DRX_N4
PCIE_PTX_DRX_P4

PCIE_PRX_DTX_N6
PCIE_PRX_DTX_P6
PCIE_PTX_DRX_N6
PCIE_PTX_DRX_P6

PCIE_PRX_DTX_N8
PCIE_PRX_DTX_P8
PCIE_PTX_DRX_N8
PCIE_PTX_DRX_P8

R208 10K_0402_5%

1 2

R459 0_0402_1%

1 2

CLKREQ_EXP#

R217 10K_0402_5%

1 2

R223 10K_0402_5%

1 2

R729
10K_0402_5%

1 2

U4B

BG30

PERN1

BJ30

PERP1

BF29

PETN1

BH29

PETP1

AW30

PERN2

BA30

PERP2

BC30

PETN2

BD30

PETP2

AU30

PERN3

AT30

PERP3

AU32

PETN3

AV32

PETP3

BA32

PERN4

BB32

PERP4

BD32

PETN4

BE32

PETP4

BF33

PERN5

BH33

PERP5

BG32

PETN5

BJ32

PETP5

BA34

PERN6

AW34

PERP6

BC34

PETN6

BD34

PETP6

AT34

PERN7

AU34

PERP7

AU36

PETN7

AV36

PETP7

BG34

PERN8

BJ34

PERP8

BG36

PETN8

BJ36

PETP8

AK48

CLKOUT_PCIE0N

AK47

CLKOUT_PCIE0P

P9

PCIECLKRQ0# / GPIO73

AM43

CLKOUT_PCIE1N

AM45

CLKOUT_PCIE1P

U4

PCIECLKRQ1# / GPIO18

AM47

CLKOUT_PCIE2N

AM48

CLKOUT_PCIE2P

N4

PCIECLKRQ2# / GPIO20

AH42

CLKOUT_PCIE3N

AH41

CLKOUT_PCIE3P

A8

PCIECLKRQ3# / GPIO25

AM51

CLKOUT_PCIE4N

AM53

CLKOUT_PCIE4P

M9

PCIECLKRQ4# / GPIO26

AJ50

CLKOUT_PCIE5N

AJ52

CLKOUT_PCIE5P

H6

PCIECLKRQ5# / GPIO44

AK53

CLKOUT_PEG_B_N

AK51

CLKOUT_PEG_B_P

P13

PEG_B_CLKRQ# / GPIO56

XTAL25_IN

XTAL25_OUT

4

SMBus

PCI-E*

Link

Controller

PEG_A_CLKRQ# / GPIO47

PEG

CLKOUT_DP_N / CLKOUT_BCLK1_N
CLKOUT_DP_P / CLKOUT_BCLK1_P

From CLK BUFFER

CLKIN_SATA_N / CKSSCD_N

CLKIN_SATA_P / CKSSCD_P

Clock Flex

R52 0_0402_5%

1 2

1 2

R229 1M_0402_5%

Y4

1 2

@

25MHZ_20P_1BG25000CK1A

@

18P_0402_50V8J

1

C281

2

No install. 4/25
Add PD R52. 5/4

SMBALERT# / GPIO11

SMBCLK

SMBDATA

SML0ALERT# / GPIO60

SML0CLK

SML0DATA

SML1ALERT# / GPIO74

SML1CLK / GPIO58

SML1DATA / GPIO75

CL_CLK1

CL_DATA1

CL_RST1#

CLKOUT_PEG_A_N

CLKOUT_PEG_A_P

CLKOUT_DMI_N

CLKOUT_DMI_P

CLKIN_DMI_N
CLKIN_DMI_P

CLKIN_BCLK_N
CLKIN_BCLK_P

CLKIN_DOT_96N
CLKIN_DOT_96P

REFCLK14IN

CLKIN_PCILOOPBACK

XTAL25_IN

XTAL25_OUT

XCLK_RCOMP

CLKOUTFLEX0 / GPIO64

CLKOUTFLEX1 / GPIO65

CLKOUTFLEX2 / GPIO66

CLKOUTFLEX3 / GPIO67

IBEXPEAK-M_FCBGA1071

@

18P_0402_50V8J

@

1

C282

2

B9
H14
C8

J14
C6
G8

M14
E10
G12

T13
T11
T9

PEG_CLKREQ_R#

H1

AD43
AD45

AN4
AN2

AT1
AT3

AW24
BA24

AP3
AP1

F18
E18

AH13
AH12

P41

J42

AH51
AH53

AF38

T45

P43

CLK_14M_SIO_P

T42

CLK_48M_USB3_P

N50

CLK_14M_SIO_P
CLK_14M_PCH
CLK_48M_USB3_P

Add D12. 7/7

LID_SW#_ISO
SMBCLK
SMBDATA

SML0ALERT#
SML0CLK
SML0DATA

GPIO74
SML1CLK
SML1DATA

CLK_DP#
CLK_DP

CLK_14M_PCH

XTAL25_IN
XTAL25_OUT

2 1

CH751H-40PT_SOD323-2

R206 10K_0402_5%

R222 90.9_0402_1%

1 2

T82 PAD

T83 PAD

R625 22_0402_5%

R228 22_0402_5%

C216 10P_0402_50V8C@
C217 10P_0402_50V8C@
C218 22P_0402_50V8J

Install 5/27.

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC . AND CONTAINS CONFIDEN TIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE C OMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFOR MATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOU T PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

D12

T25 PAD

SML0CLK 22

SML0DATA 22

CL_CLK1 24
CL_DATA1 24
CL_RST#1 24

1 2

CLK_PEG_VGA_PCH# 21
CLK_PEG_VGA_PCH 21

CLK_EXP# 4
CLK_EXP 4

T26 PAD
T27 PAD

CLK_DMI# 12
CLK_DMI 12

CLK_BUF_BCLK# 12
CLK_BUF_BCLK 12

CLK_BUF_DOT96# 12
CLK_BUF_DOT96 12

CLK_BUF_CKSSCD# 12
CLK_BUF_CKSSCD 12

CLK_14M_PCH 12

CLK_PCI_FB 16

U4B.AF38 : Layout

：

rule trace length

+1.05VS

12

12

12
12
12

LID_SW# 20,25,31

GPIO74

SMBCLK

SMBDATA

SML0CLK

+3VALW

1 2

R377

10K_0402_5%@

Q64

SMBCLK
SMBDATA

1 3

2N7002_SOT23-3@

D

G

2

R915

1 2

+3VS

S

10K_0402_5%@

R215 0_0402_5%@

1 2

R218 0_0402_5%@

1 2

PEG_CLKREQ# 21

SML0DATA

SML1CLK

SML1DATA

LID_SW#_ISO

SML0ALERT#

Q3A
2N7002DW-T/R7_SOT363-6

SMBCLK

+3VS

Q3B
2N7002DW-T/R7_SOT363-6

SMBDATA

+3VS

SML1CLK
SML1DATA

< 0.5"

Q7A
2N7002DW-T/R7_SOT363-6

SML1CLK

Swap. 2/27

CLK_14M_SIO_PCH 33

CLK_48M_USB3_PCH 27

2008/09/15 2009/09/15

Q7B
2N7002DW-T/R7_SOT363-6

SML1DATA

+3VALW

Compal Secret Data

Deciphered Date

2

61

2

3

4

5

Add PU R148. 12/11

R148 10K_0402_5%

1 2

R197 2.2K_0402_5%

1 2

R198 2.2K_0402_5%

1 2

R199 2.2K_0402_5%

1 2

R200 2.2K_0402_5%

1 2

R201 4.7K_0402_5%

1 2

R202 4.7K_0402_5%

1 2

R204 100K_0402_5%

1 2

R205 10K_0402_5%

1 2

2

5

SMB_CLK_S3

SMB_DATA_S3

4

6 1

3

Install. 2/6

Q23A
2N7002DW-T/R7_SOT363-6

SML1CLK_R

SML1DAT_R

6 1

R916
0_0402_5%

12

Q23B
2N7002DW-T/R7_SOT363-6

3

R917
0_0402_5%

12

+3VALW

Change R199, R200 from

4.7K to 2.2K. 4/23

Change R204 from
10K to 100K. 7/7

SMB_CLK_S3 4,9,10,12,26

SML1CLK_MXM

12

R207 0_0402_5%@

SMB_DATA_S3 4,9,10,12,26

SML1DAT_MXM

12

R209 0_0402_5%@

+3VS

PCH_XDP_GPIO20

SMB_CLK_S3
SMB_DATA_S3

Title

Size Document Number Re v

Custom
Date: Sheet

1 2

R687 10K_0402_5%

1 2

R213 10K_0402_5%

1 2

R214 10K_0402_5%

2

5

4

SML1CLK_MXM

+3VS

SML1DAT_MXM

+3VS

SML1CLK_MXM 21

CAP_CLK 25,31

SML1DAT_MXM 21

CAP_DAT 25,31

Compal Electronics, Inc.

IBEX-M(2/6)-PCI-E/SMBUS/CLK

LA-4951P

1

14 48Tuesday, July 28, 2009

of

0.4

http://hobi-elektronika.net

5

4

3

2

1

R245

U4D

T48

L_BKLTEN

T47

L_VDD_EN

Y48

L_BKLTCTL

AB48

L_DDC_CLK

Y45

L_DDC_DATA

AB46

L_CTRL_CLK

V48

L_CTRL_DATA

AP39

LVD_IBG

AP41

LVD_VBG

AT43

LVD_VREFH

AT42

LVD_VREFL

AV53

LVDSA_CLK#

AV51

LVDSA_CLK

BB47

LVDSA_DATA#0

BA52

LVDSA_DATA#1

AY48

LVDSA_DATA#2

AV47

LVDSA_DATA#3

BB48

LVDSA_DATA0

BA50

LVDSA_DATA1

AY49

LVDSA_DATA2

AV48

LVDSA_DATA3

AP48

LVDSB_CLK#

AP47

LVDSB_CLK

AY53

LVDSB_DATA#0

AT49

LVDSB_DATA#1

AU52

LVDSB_DATA#2

AT53

LVDSB_DATA#3

AY51

LVDSB_DATA0

AT48

LVDSB_DATA1

AU50

LVDSB_DATA2

AT51

LVDSB_DATA3

AA52

CRT_BLUE

AB53

CRT_GREEN

AD53

CRT_RED

V51

CRT_DDC_CLK

V53

CRT_DDC_DATA

Y53

CRT_HSYNC

Y51

CRT_VSYNC

AD48

DAC_IREF

AB51

CRT_IRTN

IBEXPEAK-M_FCBGA1071

LVDS

CRT

SDVO_TVCLKINN
SDVO_TVCLKINP

SDVO_STALLN
SDVO_STALLP

SDVO_INTN
SDVO_INTP

SDVO_CTRLCLK

SDVO_CTRLDATA

DDPB_AUXN
DDPB_AUXP

DDPB_HPD

DDPB_0N

DDPB_0P

DDPB_1N

DDPB_1P

DDPB_2N

DDPB_2P

DDPB_3N

DDPB_3P

DDPC_CTRLCLK

DDPC_CTRLDATA

DDPC_AUXN

DDPC_AUXP

DDPC_HPD

DDPC_0N
DDPC_0P
DDPC_1N
DDPC_1P
DDPC_2N
DDPC_2P
DDPC_3N
DDPC_3P

Digital Display Interface

DDPD_CTRLCLK

DDPD_CTRLDATA

DDPD_AUXN

DDPD_AUXP

DDPD_HPD

DDPD_0N
DDPD_0P
DDPD_1N
DDPD_1P
DDPD_2N
DDPD_2P
DDPD_3N
DDPD_3P

BJ46
BG46

BJ48
BG48

BF45
BH45

T51
T53

BG44
BJ44
AU38

BD42
BC42
BJ42
BG42
BB40
BA40
AW38
BA38

Y49
AB49

BE44
BD44
AV40

BE40
BD40
BF41
BH41
BD38
BC38
BB36
BA36

U50
U52

BC46
BD46
AT38

BJ40
BG40
BJ38
BG38
BF37
BH37
BE36
BD36

U4C

DMI_CTX_PRX_N05
DMI_CTX_PRX_N15
DMI_CTX_PRX_N25
DMI_CTX_PRX_N35

DMI_CTX_PRX_P05
DMI_CTX_PRX_P15
DMI_CTX_PRX_P25

D D

XDP_DBRESET#4,13

Connect directly after remove R237. 5/15

PDG_IN31

Change R339 to 1K and
link to PDG_IN. 5/14

C C

PM_DRAM_PWRGD4

+3VALW

PM_PWRBTN#_R4,13

DMI_CTX_PRX_P35
DMI_CRX_PTX_N05

DMI_CRX_PTX_N15
DMI_CRX_PTX_N25
DMI_CRX_PTX_N35

DMI_CRX_PTX_P05
DMI_CRX_PTX_P15
DMI_CRX_PTX_P25
DMI_CRX_PTX_P35

+1.05VS

R233 49.9_0402_1%

1 2

Layout rule：trace
length < 0.5"

R236 0_0402_5%

VGATE43

R339 1K_0402_5%

1 2

M_PWROK34

RPGOOD39
PM_RSMRST#31
SUS_PWR_ACK31

R242 10K_0402_5%

1 2

ON/OFFBTN#25

AC_PRESENT31

DMI_IRCOMP

1 2

VGATE

R238 0_0402_5%

1 2

R239 0_0402_5%

1 2

R240 0_0402_5%

1 2

R241 10K_0402_5%

1 2

R352 0_0402_5%

1 2

R243 0_0402_5%

1 2

AC_PRESENT

Remove to KBC. 12/05

B B

PM_CLKRUN#

1 2

R246 10K_0402_5%

BC24

DMI0RXN

BJ22

DMI1RXN

AW20

DMI2RXN

BJ20

DMI3RXN

BD24

DMI0RXP

BG22

DMI1RXP

BA20

DMI2RXP

BG20

DMI3RXP

BE22

DMI0TXN

BF21

DMI1TXN

BD20

DMI2TXN

BE18

DMI3TXN

BD22

DMI0TXP

BH21

DMI1TXP

BC20

DMI2TXP

BD18

DMI3TXP

BH25

DMI_ZCOMP

BF25

DMI_IRCOMP

SYS_RST#

T6

SYS_RESET#

M6

SYS_PWROK

B17

PWROK

K5

MEPWROK

A10

LAN_RST#

D9

DRAMPWROK

C16

RSMRST#

M1

SUS_PWR_DN_ACK / GPIO30

P5

PWRBTN#

P7

+3VS

ACPRESENT / GPIO31

A6

BATLOW# / GPIO72

F14

RI#

VGATE

R249 10K_0402_5%

LOW_BAT#_R

IBEX_R#

Correct connect to VGATE. 5/19

DMI

FDI

CLKRUN# / GPIO32

SUS_STAT# / GPIO61

SUSCLK / GPIO62

SLP_S5# / GPIO63

System Power Management

SLP_LAN# / GPIO29

IBEXPEAK-M_FCBGA1071

1 2

FDI_RXN0
FDI_RXN1
FDI_RXN2
FDI_RXN3
FDI_RXN4
FDI_RXN5
FDI_RXN6
FDI_RXN7

FDI_RXP0
FDI_RXP1
FDI_RXP2
FDI_RXP3
FDI_RXP4
FDI_RXP5
FDI_RXP6
FDI_RXP7

FDI_INT
FDI_FSYNC0
FDI_FSYNC1
FDI_LSYNC0
FDI_LSYNC1

WAKE#

SLP_S4#

SLP_S3#

SLP_M#

TP23

PMSYNCH

BA18
BH17
BD16
BJ16
BA16
BE14
BA14
BC12

BB18
BF17
BC16
BG16
AW16
BD14
BB14
BD12

R230 1K_0402_5%

1 2

BJ14

R231 1K_0402_5%

1 2

BF13

R232 1K_0402_5%

1 2

BH13

R234 1K_0402_5%

1 2

BJ12

R235 1K_0402_5%

1 2

BG14

PCIE_WAKE#

J12

PM_CLKRUN#

Y1

Connect to TPM. 11/30

SUS_STAT#

P8

SUS_CLK

F3

E4

H7

P12

K8

N2

BJ10

PM_SLP_LAN#

F6

LOW_BAT#_R
IBEX_R#
PCIE_WAKE#

PM_SLP_LAN#
AC_PRESENT
SYS_RST#

PCIE_WAKE# 24,27,30

PM_CLKRUN# 28,31,32,33

SUS_STAT# 28,32,33

T29PAD

SLP_S5# 29

SLP_S4# 35,42

SLP_S3# 30,31,34,35,38,40,41

PM_SLP_M# 31,34,35

H_PM_SYNC 4

PM_SLP_LAN# 35,42

R248 10K_0402_5%

1 2

R250 10K_0402_5%

1 2

R251 1K_0402_5%

1 2

R252 10K_0402_5%

1 2

R253 10K_0402_5%@

1 2

R254 10K_0402_5%@

1 2

+3VALW

NI R253. 5/14

1K_0402_0.5%

12

A A

http://hobi-elektronika.net

5

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC . AND CONTAINS CONFIDEN TIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE C OMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFOR MATION IT CONTAINS

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOU T PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2008/09/15 2009/09/15

Compal Secret Data

Deciphered Date

2

Title

Size Document Number Re v

Custom
Date: Sheet

Compal Electronics, Inc.

IBEX-M(3/6)-DMI/GPIO/LVDS

LA-4951P

1

15 48Tuesday, July 28, 2009

of

0.4

5

PCI_AD[0..31]32

D D

PCI_CBE0#32
PCI_CBE1#32
PCI_CBE2#32
PCI_CBE3#32

C C

B B

CLK_PCI_SIO_PCH33
CLK_PCI_KBC_PCH31

CLK_PCI_DEBUG_PCH24

CLK_PCI_DB_PCH28

CLK_PCI_TPM_PCH28

A A

PCI_REQ2#32

T42 PAD
T104 PAD

PCI_GNT2#32

PCI_PIRQE#32
ODD_DET#13

PCI_PIRQG#32

ACCEL_INT#26

PCI_RST#24,32

PCI_SERR#28,31,32
PCI_PERR#32

PCI_IRDY#32

PCI_PAR32
PCI_DEVSEL#32
PCI_FRAME#32

PCI_STOP#32
PCI_TRDY#32

PCI_PME#32

PLT_RST#4,13,21,22,24,27,28,30

CLK_PCI_139432

CLK_PCI_FB14

R266 22_0402_5%
R267 22_0402_5%
R271 22_0402_5%
R273 22_0402_5%
R276 22_0402_5%
R277 22_0402_5%
R281 22_0402_5%

PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#

PCI_REQ0#
PCI_REQ1#
PCI_REQ2#
PCI_REQ3#

PCI_GNT0#

MODEM_DISABLE#

PCI_GNT2#
PCI_GNT3#

PCI_PIRQE#
ODD_DET#
PCI_PIRQG#
ACCEL_INT#

PCI_SERR#
PCI_PERR#

PCI_IRDY#
PCI_PAR
PCI_DEVSEL#
PCI_FRAME#

PCI_LOCK#
PCI_STOP#

PCI_TRDY#

CLK_PCI_KBC_R
CLK_PCI_FB_R
CLK_PCI_TPM_R
CLK_PCI_1394_R
CLK_PCI_DB_P

1 2
1 2
1 2
1 2
1 2
1 2
1 2

5

PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31

PCI_REQ1#
PCI_FRAME#
PCI_TRDY#
ACCEL_INT#

PCI_REQ0#
PCI_PIRQB#
ODD_DET#
PCI_REQ3#

PCI_PIRQG#
PCI_PIRQC#
PCI_PIRQE#
PCI_STOP#

U4E

H40

AD0

N34

AD1

C44

AD2

A38

AD3

C36

AD4

J34

AD5

A40

AD6

D45

AD7

E36

AD8

H48

AD9

E40

AD10

C40

AD11

M48

AD12

M45

AD13

F53

AD14

M40

AD15

M43

AD16

J36

AD17

K48

AD18

F40

AD19

C42

AD20

K46

AD21

M51

AD22

J52

AD23

K51

AD24

L34

AD25

F42

AD26

J40

AD27

G46

AD28

F44

AD29

M47

AD30

H36

AD31

J50

C/BE0#

G42

C/BE1#

H47

C/BE2#

G34

C/BE3#

G38

PIRQA#

H51

PIRQB#

B37

PIRQC#

A44

PIRQD#

F51

REQ0#

A46

REQ1# / GPIO50

B45

REQ2# / GPIO52

M53

REQ3# / GPIO54

F48

GNT0#

K45

GNT1# / GPIO51

F36

GNT2# / GPIO53

H53

GNT3# / GPIO55

B41

PIRQE# / GPIO2

K53

PIRQF# / GPIO3

A36

PIRQG# / GPIO4

A48

PIRQH# / GPIO5

K6

PCIRST#

E44

SERR#

E50

PERR#

A42

IRDY#

H44

PAR

F46

DEVSEL#

C46

FRAME#

D49

PLOCK#

D41

STOP#

C48

TRDY#

M7

PME#

D5

PLTRST#

N52

CLKOUT_PCI0

P53

CLKOUT_PCI1

P46

CLKOUT_PCI2

P51

CLKOUT_PCI3

P48

CLKOUT_PCI4

CLK_PCI_1394_R
CLK_PCI_KBC_R
CLK_PCI_DB_P

CLK_PCI_FB_R
CLK_PCI_TPM_R

RP5

1 8
2 7
3 6
4 5

8.2K_0804_8P4R_5%
RP7

1 8
2 7
3 6
4 5

8.2K_0804_8P4R_5%
RP9

1 8
2 7
3 6
4 5

8.2K_0804_8P4R_5%

NV_DQ0 / NV_IO0
NV_DQ1 / NV_IO1
NV_DQ2 / NV_IO2
NV_DQ3 / NV_IO3
NV_DQ4 / NV_IO4
NV_DQ5 / NV_IO5
NV_DQ6 / NV_IO6
NV_DQ7 / NV_IO7
NV_DQ8 / NV_IO8

NV_DQ9 / NV_IO9
NV_DQ10 / NV_IO10
NV_DQ11 / NV_IO11

NVRAM

NV_DQ12 / NV_IO12
NV_DQ13 / NV_IO13
NV_DQ14 / NV_IO14
NV_DQ15 / NV_IO15

PCI

NV_WR#0_RE#
NV_WR#1_RE#

NV_WE#_CK0
NV_WE#_CK1

USB

OC0# / GPIO59
OC1# / GPIO40
OC2# / GPIO41
OC3# / GPIO42
OC4# / GPIO43

OC5# / GPIO9
OC6# / GPIO10
OC7# / GPIO14

IBEXPEAK-M_FCBGA1071

Install 5/27.

C227 15P_0402_50V8J

12

C228 15P_0402_50V8J

12

C229 15P_0402_50V8J

12

C220 15P_0402_50V8J

12

+3VS

WWAN _DET #

PCI_PIRQA#
PCI_IRDY#
PCI_REQ2#
PCI_PIRQD#

PCI_LOCK#
PCI_PERR#
PCI_DEVSEL#
PCI_SERR#

PCI_REQ3#

4

AY9

NV_CE#0

BD1

NV_CE#1

AP15

NV_CE#2

BD8

NV_CE#3

AV9

NV_DQS0

BG8

NV_DQS1

AP7
AP6
AT6
AT9
BB1
AV6
BB3
BA4
BE4
BB6
BD6
BB7
BC8
BJ8
BJ6
BG6

NV_ALE

BD3

NV_ALE

NV_CLE

NV_RCOMP

NV_RB#

USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N

USBP9P
USBP10N
USBP10P
USBP11N
USBP11P
USBP12N
USBP12P
USBP13N
USBP13P

USBRBIAS#

USBRBIAS

1 8
2 7
3 6
4 5

8.2K_0804_8P4R_5%

1 8
2 7
3 6
4 5

8.2K_0804_8P4R_5%

1 2

R303 8.2K_0402_5%

NV_CLE

AY6

U4.AU2 Layout rule trace l：ength < 0.5"

R262 32.4_0402_1%

1 2

AU2
AV7
AY8

AY5
AV11

BF5

H18

Change JUSBL1from port0 to port1. 0204

J18
A18
C18
N20
P20
J20
L20
F20
G20
A20

Remove USB from DP. 0224

C20
M22
N22
B21
D21
H22
J22
E22
F22
A22
C22
G24
H24
L24
M24
A24
C24

USBRBIAS Layout rule trace

USBRBIAS

B25
D25

USB_OC#0

N16

USB_OC#1

J16

USB_OC#2

F16

USB_OC#3

L16

USB_OC#4

E14

USB_OC#5

G16

USB_OC#6

F12

USB_OC#7

T15

R258

1 2

10K_0402_5%

RP6

RP8

4

NV_CE0# 24
NV_CE1# 24
NV_CE2# 24
NV_CE3# 24

NV_DQS0 24
NV_DQS1 24

NV_DQ0 24
NV_DQ1 24
NV_DQ2 24
NV_DQ3 24
NV_DQ4 24
NV_DQ5 24
NV_DQ6 24
NV_DQ7 24
NV_DQ8 24
NV_DQ9 24
NV_DQ10 24
NV_DQ11 24
NV_DQ12 24
NV_DQ13 24
NV_DQ14 24
NV_DQ15 24

NV_ALE 24
NV_CLE 24

NV_RB# 24
NV_RE#_WR#0 24

NV_RE#_WR#1 24
NV_WE#_CK0 24

NV_WE#_CK1 24

USB20_N1 26
USB20_P1 26
USB20_N2 19
USB20_P2 19
USB20_N3 19
USB20_P3 19
USB20_N4 30
USB20_P4 30

USB20_N8 26
USB20_P8 26
USB20_N9 24
USB20_P9 24
USB20_N10 28
USB20_P10 28
USB20_N11 29
USB20_P11 29
USB20_N12 20
USB20_P12 20
USB20_N13 29
USB20_P13 29

：

R265 22.6_0402_1%

1 2

A16 swap overide Strap/Top-Block
Swap Override jumper

PCI_GNT3#

PCI_GNT3#

R278 1K_0402_5%@

+3VS

Delete R297, duplicate on
R32. 2/10

NV_ALE

NV_CLE

PCH_XDP_GPIO3613

CONN
CONN
CONN
EXPRESS

Dream color

WLAN

Bluetooth
WWAN
Fingerprint
DOCK
USB Camera
DOCK

length < 0.5"

USB_OC#0 13
USB_OC#1 13
USB_OC#2 13
USB_OC#3 13
USB_OC#4 13

USB_OC#5 13
USB_OC#6 13
USB_OC#7 13,30

Low=A16 swap
override/Top-Block
Swap Override enabled
High=Default

1 2

USB_OC#6

BUF_PLT_RST#4

3

R255 10K_0402_5%

+3VS

Danbury Technology Enable
NV_ALE High=Endabled

Low=Disable (@)

R257 1K_0402_5%@

1 2

Reserve R53. 4/25

DMI Termination Voltage
NV_CLE Set to Vss when LOW

Set to Vcc when HIGH

R263 1K_0402_5%@

1 2

Change to WWAN_DET#. 4/25

WWA N _TR ANSMIT _OF F #24

PCH_XDP_GPIO2813

R1007 0_0402_5%

WLAN_TRANSMIT_OFF#24

USB_OC#4

R147 0_0402_5%

USB_OC#1

Change net na me from GPIO43. 2/6

PCH_XDP_GPIO37
USB_OC#3

1 2

R725 0_0402_5%

1 2

R151 0_0402_5%

1 2

R726 0_0402_5%

1 2

R727 0_0402_5%

1 2

Boot BIOS Strap

PCI_GNT0#

0
0
1
11

MODEM_DISABLE#

PCI_GNT0#

R728 0_0402_5%

1 2

Change & Add on 02/23.

R282 0_0402_5%

1 2

+3VS

5

P

IN1

4

O

IN2

G

U6

3

3

PCH_XDP_GPIO013,27

1 2

+V_NVRAM_VCCQ

1 2

MODEM_DISABLE# Boot BIOS Location

LED_LINK_LAN#_R22,23,31

1
2

SN74AHC1G08DCKR_SC70-5@

OCP#44

RUNSCI_EC#31

THERM_SCI#4,21

LAN_DIS#22,23

PCH_XDP_GPIO1613

+3VS

ALS_EN#20

WWAN_DET #24

NPCI_RST#31,33

PCH_XDP_GPIO3713

DockID029
DockID129

CLK_PCIE_LAN_REQ#22

R264 10K_0402_5%

+3VALW

PCH_XDP_GPIO4913

PCH_NCTF618
PCH_NCTF718

PCH_NCTF1918

USB_OC#4_R

BT_OFF 26

PCH_NCTF2618

ISO_PREP#USB_OC#5

FPR_OFF 28

Change net name. 4/25

0
1
0

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC . AND CONTAINS CONFIDEN TIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE C OMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFOR MATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOU T PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

LPC
Reserved(NAND)
PCI
SPI*

R268 1K_0402_5%@

1 2

R272 1K_0402_5%@

1 2

PLT_RST#

Issued Date

PCH_XDP_GPIO0

RUNSCI_EC#

PCH_DDR_RST
LAN_DIS#
GPIO15
PCH_XDP_GPIO16
ALS_EN#

WWAN _DET #

GPIO24
WWAN _TRANSMIT_OFF#
PCH_XDP_GPIO28

STP_PCI#

SATA_CLKREQ#

PCH_XDP_GPIO37

DockID0

DockID1

1 2

GPIO48

PCH_XDP_GPIO49

WLAN_TRANSMIT_OFF#

ISO_PREP# 29

WEBCAM_ON 20

PCH_DDR_RST11

R300 10K_0402_5%@

1 2

WWA N_TRANSMIT_OFF#

2008/09/15 2009/09/15

WLAN_TRANSMIT_OFF#

U4F

Y3

BMBUSY# / GPIO0

C38

TACH1 / GPIO1

D37

TACH2 / GPIO6

J32

TACH3 / GPIO7

F10

GPIO8

K9

LAN_PHY_PWR_CTRL / GPIO12

T7

GPIO15

AA2

SATA4GP / GPIO16

F38

TACH0 / GPIO17

Y7

SCLOCK / GPIO22

H10

GPIO24

AB12

GPIO27

V13

GPIO28

M11

STP_PCI# / GPIO34

V6

SATACLKREQ# / GPIO35

AB7

SATA2GP / GPIO36

AB13

SATA3GP / GPIO37

V3

SLOAD / GPIO38

P3

SDATAOUT0 / GPIO39

H3

PCIECLKRQ6# / GPIO45

F1

PCIECLKRQ7# / GPIO46

AB6

SDATAOUT1 / GPIO48

AA4

SATA5GP / GPIO49

F8

GPIO57

A4

VSS_NCTF_1

A49

VSS_NCTF_2

A5

VSS_NCTF_3

A50

VSS_NCTF_4

A52

VSS_NCTF_5

A53

VSS_NCTF_6

B2

VSS_NCTF_7

B4

VSS_NCTF_8

B52

VSS_NCTF_9

B53

VSS_NCTF_10

BE1

VSS_NCTF_11

BE53

VSS_NCTF_12

BF1

VSS_NCTF_13

BF53

VSS_NCTF_14

BH1

VSS_NCTF_15

BH2

VSS_NCTF_16

BH52

VSS_NCTF_17

BH53

VSS_NCTF_18

BJ1

VSS_NCTF_19

BJ2

VSS_NCTF_20

BJ4

VSS_NCTF_21

BJ49

VSS_NCTF_22

BJ5

VSS_NCTF_23

BJ50

VSS_NCTF_24

BJ52

VSS_NCTF_25

BJ53

VSS_NCTF_26

D1

VSS_NCTF_27

D2

VSS_NCTF_28

D53

VSS_NCTF_29

E1

VSS_NCTF_30

E53

VSS_NCTF_31

IBEXPEAK-M_FCBGA1071

USB_OC#2
USB_OC#4_R
USB_OC#0
USB_OC#7
GPIO8

LED_LINK_LAN#_R

PCH_DDR_RST

GPIO24
GPIO15

PCH_XDP_GPIO28

Compal Secret Data

2

MISC

CLKOUT_BCLK0_N / CLKOUT_PCIE8N

CLKOUT_BCLK0_P / CLKOUT_PCIE8P

GPIO

CPU

NCTF

RSVD

R66 10K_0402_5%

1 2

R143 10K_0402_5%

1 2

R269 10K_0402_5%

1 2

R274 10K_0402_5%

1 2

NI. 4/25

R279 10K_0402_5%@

1 2

R283 10K_0402_5%

1 2

R53 0_0402_5%@

1 2

R289 10K_0402_5%@

1 2

R291 10K_0402_5%

1 2

R293 10K_0402_5%

1 2

R295 1K_0402_5%

1 2

R298 10K_0402_5%

1 2

Remove R300. 10/30

R302 10K_0402_5%

1 2

Deciphered Date

2

+3VALW

Add. 4/25

Intel S3

CLKOUT_PCIE6N
CLKOUT_PCIE6P

CLKOUT_PCIE7N
CLKOUT_PCIE7P

A20GATE

PECI

RCIN#

PROCPWRGD

THRMTRIP#

TP10
TP11
TP12
TP13
TP14
TP15
TP16
TP17
TP18
TP19
NC_1
NC_2
NC_3
NC_4
NC_5

INIT3_3V#

TP24

Update on 10/30.

1

AH45
AH46

AF48
AF47

R256 10K_0402_5%

U2

AM3
AM1

PCH_PECI_R

BG10

KB_RST#

T1
BE10

H_THERMTRIP#_L

BD10

+VCCP

BA22

TP1
TP2
TP3
TP4
TP5
TP6
TP7
TP8
TP9

NPCI_RST#
SATA_CLKREQ#
PCH_XDP_GPIO49
KB_RST#
ALS_EN#
RUNSCI_EC#
PCH_XDP_GPIO37
PCH_XDP_GPIO16
DockID0
DockID1
GPIO48ISO_PREP#
STP_PCI#

T32 PAD

AW22

T33 PAD

BB22

T34 PAD

AY45

T35 PAD

AY46

T36 PAD

AV43

T37 PAD

AV45

T38 PAD

AF13

T39 PAD

M18

T40 PAD

N18

T41 PAD

AJ24

T43 PAD

AK41

T44 PAD

AK42

T45 PAD

M32

T46 PAD

N32

T47 PAD

M30

T48 PAD

N30

T49 PAD

H12

T50 PAD

AA23

T51 PAD

AB45

T52 PAD

AB38

T53 PAD

AB42

T54 PAD

AB41

T55 PAD

T39

T56 PAD

P6

T57 PAD

C10

T58 PAD

Title

Size Document Number Re v

Custom

LA-4951P

Date: Sheet

CLK_PCIE_LAN_PCH# 22
CLK_PCIE_LAN_PCH 22

12

CLK_CPU_BCLK#_P 4
CLK_CPU_BCLK_P 4

R259 0_0402_5%

1 2

KB_RST# 31
H_CPUPWRGD 4

1 2

R260

1 2

R261 56_0402_5%

R270 10K_0402_5%

1 2

R275 10K_0402_5%

1 2

R280 10K_0402_5%

1 2

R284 10K_0402_5%

1 2

R286 10K_0402_5%

1 2

R288 10K_0402_5%

1 2

R290 10K_0402_5%

1 2

R292 10K_0402_5%

1 2

R294 10K_0402_5%

1 2

R296 10K_0402_5%

1 2

R299 10K_0402_5%

1 2

R301 10K_0402_5%

1 2

+3VS

54.9_0402_1%

GATEA20 31

+3VS

Compal Electronics, Inc.

IBEX-M(4/6)-PCI/USB/RSVD

1

16 48Tuesday, July 28, 2009

NIC

H_PECI 4

H_THERMTRIP# 4

0.4

of

http://hobi-elektronika.net

5

0.2 A @ 3 . 3 V

0.4 A @ 3 . 3 V

0.1 A @ 1 . 1 V

2 m A @ 3 . 3 V

4

3

2

1

U4J

0.035A

0.072A

0.073A

>1mA

POWER

0.052A

0.344A

1.998A

3.208A

2mA

VCCSUS3_3[10]
VCCSUS3_3[11]
VCCSUS3_3[12]
VCCSUS3_3[13]

USB

VCCSUS3_3[14]
VCCSUS3_3[15]
VCCSUS3_3[16]

0.163A

VCCSUS3_3[17]
VCCSUS3_3[18]
VCCSUS3_3[19]
VCCSUS3_3[20]
VCCSUS3_3[21]
VCCSUS3_3[22]
VCCSUS3_3[23]
VCCSUS3_3[24]
VCCSUS3_3[25]
VCCSUS3_3[26]
VCCSUS3_3[27]

VCCSUS3_3[28]

>1mA

>1mA

Clock and Miscellaneous

0.357A

PCI/GPIO/LPC

VCCSATAPLL[1]

0.032A

VCCSATAPLL[2]

SATA

PCI/GPIO/LPC

CPU

6mA

RTC

IBEXPEAK-M_FCBGA1071

HDA

4

VCCIO[5]
VCCIO[6]
VCCIO[7]
VCCIO[8]

VCCSUS3_3[1]
VCCSUS3_3[2]
VCCSUS3_3[3]
VCCSUS3_3[4]
VCCSUS3_3[5]
VCCSUS3_3[6]
VCCSUS3_3[7]
VCCSUS3_3[8]
VCCSUS3_3[9]

VCCIO[56]

V5REF_SUS

V5REF

VCC3_3[8]

VCC3_3[9]
VCC3_3[10]
VCC3_3[11]
VCC3_3[12]
VCC3_3[13]

VCC3_3[14]

VCCIO[9]

VCCVRM[4]

VCCIO[10]

VCCIO[11]

VCCIO[12]

VCCIO[13]

VCCIO[14]

VCCIO[15]

VCCIO[16]

VCCIO[17]

VCCIO[18]

VCCIO[19]

VCCIO[20]
VCCME[13]

VCCME[14]
VCCME[15]
VCCME[16]

VCCSUSHDA

Chnage to TP. 2/6

1

2

+VCCRTCEXT

+VCCSST

C329

0.1U_0402_16V4Z

1

2

0.1U_0402_16V4Z

C334

1

2

AP51
AP53

AF23
AF24

AD38
AD39
AD41

AF43
AF41
AF42

AU24

BB51
BB53

BD51
BD53

AH23

AJ35

AH35

AF34

AH34

AF32

AT18

AU18

Y20

V39
V41
V42
Y39
Y41
Y42

V9

V12

Y22

P18
U19
U20
U22

V15
V16
Y16

A12

VCCACLK[1]
VCCACLK[2]

VCCLAN[1]
VCCLAN[2]

DCPSUSBYP

VCCME[1]
VCCME[2]
VCCME[3]
VCCME[4]
VCCME[5]
VCCME[6]
VCCME[7]
VCCME[8]
VCCME[9]
VCCME[10]
VCCME[11]
VCCME[12]

DCPRTC

VCCVRM[3]

VCCADPLLA[1]
VCCADPLLA[2]

VCCADPLLB[1]
VCCADPLLB[2]

VCCIO[21]
VCCIO[22]
VCCIO[23]

VCCIO[2]
VCCIO[3]
VCCIO[4]
DCPSST

DCPSUS

VCCSUS3_3[29]
VCCSUS3_3[30]
VCCSUS3_3[31]
VCCSUS3_3[32]

VCC3_3[5]
VCC3_3[6]
VCC3_3[7]

V_CPU_IO[1]

V_CPU_IO[2]

VCCRTC

T94PAD

+1.05VM

D D

C299

1

C C

B B

A A

2

Chnage 10uF
to 22uF for
DB1. 12/03

+1.05VM

22U_0805_6.3V6M

22U_0805_6.3V6M

C300

1

2

C295

1

2

C301

1

2

+1.05VS

C312

1

2

5

C288

1U_0402_6.3V4Z

1

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

C313

+RTCVCC

T59PAD

C292

0.1U_0402_16V4Z

1 2

C302 0.1U_0402_16V4Z

+1.8VS

+V1.05S_VCCA_B_DPL

1U_0402_6.3V4Z

1U_0402_6.3V4Z

C314

1

1

2

2

1 2

C316 0.1U_0402_16V4Z

+V1.1A_INT_VCCSUS

1 2

C317 0.1U_0402_16V4Z

+3VALW

1 2

C322 0.1U_0402_16V4Z

+3VS

1 2

C323 0.1U_0402_16V4Z

+VCCP

C328

0.1U_0402_16V4Z

C327

4.7U_0603_6.3V6K

1

1

2

2

0.1U_0402_16V4Z

C333

1

2

+1.05VS

V24
V26
Y24

1

C285

Y26

1U_0402_6.3V4Z

V28

2

U28
U26
U24
P28
P26
N28
N26
M28

+3VALW

M26
L28
L26
J28

C293

J26
H28
H26
G28
G26
F28
F26
E28
E26
C28
C26
B27
A28
A26

U23
V23
F24

K49

J38
L38
M36
N36
P36
U35

AD13

1

2

+1.05VS

ICH_V5REF_SUS

ICH_V5REF_RUN

+3VS

1

2

+3VS

Chnage to TP. 2/6

AK3
AK1

AH22

AT20

+1.8VS

AH19
AD20
AF22
AD19

AF20
AF19
AH20

AB19
AB20
AB22
AD22

+PCH_VCC 1_1_20

AA34

+PCH_VCC 1_1_21

Y34

+PCH_VCC 1_1_22

Y35

+PCH_VCC 1_1_23

AA35

L30

1

C331

2

1U_0402_6.3V4Z

0.1U_0402_16V4Z

C294

0.1U_0402_16V4Z

1

2

Chnage C298 to
1uF. 5/15

C309

0.1U_0402_16V4Z

C315 0.1U_0402_16V4Z

1 2

T96 PAD

+1.05VS

C324

1U_0402_6.3V4Z

1

2

R309 0_0402_5%

1 2

R311 0_0402_5%

1 2

R312 0_0402_5%

1 2

R313 0_0402_5%

1 2

R314 0_0402_5%

1 2

R306

100_0402_1%

R307

100_0402_1%

+3VALW

+3VALW+5VALW

12

21

D2
CH751H-40PT_SOD323-2

ICH_V5REF_SUS

20 mils

1

C298
1U_0402_6.3V4Z

2

+5VS +3VS

21

12

D3
CH751H-40PT_SOD323-2

ICH_V5REF_RUN+V1.05S_VCCA_A_DPL

20 mils

1

C310
1U_0402_6.3V4Z

2

Chnage to TP. 2/6

+1.05VS

+1.05VM

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC . AND CONTAINS CONFIDEN TIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE C OMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFOR MATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOU T PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

L4

10UH_LB2012T100MR_20%_0805

1 2

1U_0402_6.3V4Z

L5

10UH_LB2012T100MR_20%_0805

1 2

1U_0402_6.3V4Z

Chnage to TP. 2/6

+1.05VS

10U_0603_6.3V6M

C307

C303

1

1

2

2

+1.8VS

1

HF

C326

2

1

HF

C332

2

2008/09/15 2009/09/15

+1.05VS

C286

1U_0603_10V4Z

1

2

T95PAD

C306

C305

1U_0402_6.3V4Z

C304

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

1

2

2

+3VS

Add on 11/24.

1

C219

0.1U_0402_16V4Z

2

+3VS

R308 0_0402_5%

1 2

T97PAD

+1.05VS

+V1.05S_VCCA_A_DPL

1

+

C325
220U_D2_4VM_R15

2

+V1.05S_VCCA_B_DPL

1

+

C330
220U_D2_4VM_R15

2

Compal Secret Data

Deciphered Date

U4G

AB24

VCCCORE[1]

AB26

C287

10U_0805_6.3V6M

VCCCORE[2]

AB28

VCCCORE[3]

AD26

1

2

+1.05VS

1

2

VCCCORE[4]

AD28

VCCCORE[5]

AF26

VCCCORE[6]

AF28

VCCCORE[7]

AF30

VCCCORE[8]

AF31

VCCCORE[9]

AH26

VCCCORE[10]

AH28

VCCCORE[11]

AH30

VCCCORE[12]

AH31

VCCCORE[13]

AJ30

VCCCORE[14]

AJ31

VCCCORE[15]

AK24

VCCIO[24]

BJ24

VCCAPLLEXP

AN20

VCCIO[25]

AN22

VCCIO[26]

AN23

VCCIO[27]

AN24

VCCIO[28]

AN26

VCCIO[29]

AN28

VCCIO[30]

BJ26

VCCIO[31]

BJ28

VCCIO[32]

AT26

VCCIO[33]

AT28

VCCIO[34]

AU26

VCCIO[35]

AU28

VCCIO[36]

AV26

1U_0402_6.3V4Z

VCCIO[37]

AV28

VCCIO[38]

AW26

VCCIO[39]

AW28

VCCIO[40]

BA26

VCCIO[41]

BA28

VCCIO[42]

BB26

VCCIO[43]

BB28

VCCIO[44]

BC26

VCCIO[45]

BC28

VCCIO[46]

BD26

VCCIO[47]

BD28

VCCIO[48]

BE26

VCCIO[49]

BE28

VCCIO[50]

BG26

VCCIO[51]

BG28

VCCIO[52]

BH27

VCCIO[53]

AN30

VCCIO[54]

AN31

VCCIO[55]

AN35

VCC3_3[1]

AT22

VCCVRM[1]

BJ18

VCCFDIPLL

AM23

VCCIO[1]

Remove R310. 4/25

2

POWER

1.524A

0.042A

0.035A
6mA

0.069A

CRTLVDS

0.030A

VCC CORE

0.059A

HVCMOS

0.061A

DMI

PCI E*

0.156A

NAND / SPI

0.085A

FDI

IBEXPEAK-M_FCBGA1071

AE50

VCCADAC[1]

AE52

VCCADAC[2]

AF53

VSSA_DAC[1]

AF51

VSSA_DAC[2]

R304 0_0603_5%

1 2

AH38

VCCALVDS

AH39

VSSA_LVDS

VCCTX_LVDS[1]
VCCTX_LVDS[2]
VCCTX_LVDS[3]
VCCTX_LVDS[4]

VCC3_3[2]
VCC3_3[3]
VCC3_3[4]

VCCVRM[2]

VCCDMI[1]
VCCDMI[2]

VCCPNAND[1]
VCCPNAND[2]
VCCPNAND[3]
VCCPNAND[4]
VCCPNAND[5]
VCCPNAND[6]
VCCPNAND[7]
VCCPNAND[8]
VCCPNAND[9]

VCCME3_3[1]
VCCME3_3[2]
VCCME3_3[3]
VCCME3_3[4]

Title

Size Document Number Re v

Custom
Date: Sheet

R305 0_0603_5%

1 2

AP43
AP45
AT46
AT45

+3VS

AB34
AB35
AD35

AT24

AT16
AU16

AM16
AK16
AK20
AK19
AK15
AK13
AM12
AM13
AM15

AM8
AM9
AP11
AP9

1 2

C297 0.1U_0402_16V4Z

+1.8VS

+VCCP

1 2

C308 1U_0603_10V4Z

+V_NVRAM_VCCQ

C311

1

2

+3VM

C321

1

2

Compal Electronics, Inc.

IBEX-M(5/6)-PWR

LA-4951P

1

C289

1

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.01U_0402_16V7K
C290

1

2

+3VS

0.1U_0402_16V4Z
C291

1

2

17 48Tuesday, July 28, 2009

10U_0805_6.3V6M

0.4

of

http://hobi-elektronika.net

5

4

3

2

1

U4I

AY7

VSS[159]

B11

VSS[160]

B15

VSS[161]

B19

VSS[162]

B23

VSS[163]

B31

VSS[164]

B35

VSS[165]

B39

VSS[166]

B43

VSS[167]

B47

D D

C C

B B

BG12
BB12
BB16
BB20
BB24
BB30
BB34
BB38
BB42
BB49

BC10
BC14
BC18

BC22
BC32
BC36
BC40
BC44
BC52

BD48
BD49

BE12
BE16
BE20
BE24
BE30
BE34
BE38
BE42
BE46
BE48
BE50

BF49
BF51
BG18
BG24

BG50
BH11
BH15
BH19
BH23
BH31
BH35
BH39
BH43
BH47

AF39

VSS[168]

B7

VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]

BB5

VSS[180]
VSS[181]
VSS[182]
VSS[183]

BC2

VSS[184]
VSS[185]
VSS[186]
VSS[187]
VSS[188]
VSS[189]
VSS[190]

BH9

VSS[191]
VSS[192]
VSS[193]

BD5

VSS[194]
VSS[195]
VSS[196]
VSS[197]
VSS[198]
VSS[199]
VSS[200]
VSS[201]
VSS[202]
VSS[203]
VSS[204]
VSS[205]

BE6

VSS[206]

BE8

VSS[207]

BF3

VSS[208]
VSS[209]
VSS[210]
VSS[211]
VSS[212]

BG4

VSS[213]
VSS[214]
VSS[215]
VSS[216]
VSS[217]
VSS[218]
VSS[219]
VSS[220]
VSS[221]
VSS[222]
VSS[223]

BH7

VSS[224]

C12

VSS[225]

C50

VSS[226]

D51

VSS[227]

E12

VSS[228]

E16

VSS[229]

E20

VSS[230]

E24

VSS[231]

E30

VSS[232]

E34

VSS[233]

E38

VSS[234]

E42

VSS[235]

E46

VSS[236]

E48

VSS[237]

E6

VSS[238]

E8

VSS[239]

F49

VSS[240]

F5

VSS[241]

G10

VSS[242]

G14

VSS[243]

G18

VSS[244]

G2

VSS[245]

G22

VSS[246]

G32

VSS[247]

G36

VSS[248]

G40

VSS[249]

G44

VSS[250]

G52

VSS[251]
VSS[252]

H16

VSS[253]

H20

VSS[254]

H30

VSS[255]

H34

VSS[256]

H38

VSS[257]

H42

VSS[258]

VSS[259]
VSS[260]
VSS[261]
VSS[262]
VSS[263]
VSS[264]
VSS[265]
VSS[266]
VSS[267]
VSS[268]
VSS[269]
VSS[270]
VSS[271]
VSS[272]
VSS[273]
VSS[274]
VSS[275]
VSS[276]
VSS[277]
VSS[278]
VSS[279]
VSS[280]
VSS[281]
VSS[282]
VSS[283]
VSS[284]
VSS[285]
VSS[286]
VSS[287]
VSS[288]
VSS[289]
VSS[290]
VSS[291]
VSS[292]
VSS[293]
VSS[294]
VSS[295]
VSS[296]
VSS[297]
VSS[298]
VSS[299]
VSS[300]
VSS[301]
VSS[302]
VSS[303]
VSS[304]
VSS[305]
VSS[306]
VSS[307]
VSS[308]
VSS[309]
VSS[310]
VSS[311]
VSS[312]
VSS[313]
VSS[314]
VSS[315]
VSS[316]
VSS[317]
VSS[318]
VSS[319]
VSS[320]
VSS[321]
VSS[322]
VSS[323]
VSS[324]
VSS[325]
VSS[326]
VSS[327]
VSS[328]
VSS[329]
VSS[330]
VSS[331]
VSS[332]
VSS[333]
VSS[334]
VSS[335]
VSS[336]
VSS[337]
VSS[338]
VSS[339]
VSS[340]
VSS[341]
VSS[342]
VSS[343]
VSS[344]
VSS[345]
VSS[346]
VSS[347]
VSS[348]
VSS[349]
VSS[350]
VSS[351]
VSS[352]
VSS[353]
VSS[354]
VSS[355]
VSS[356]
VSS[366]

H49
H5
J24
K11
K43
K47
K7
L14
L18
L2
L22
L32
L36
L40
L52
M12
M16
M20
N38
M34
M38
M42
M46
M49
M5
M8
N24
P11
AD15
P22
P30
P32
P34
P42
P45
P47
R2
R52
T12
T41
T46
T49
T5
T8
U30
U31
U32
U34
P38
V11
P16
V19
V20
V22
V30
V31
V32
V34
V35
V38
V43
V45
V46
V47
V49
V5
V7
V8
W2
W52
Y11
Y12
Y15
Y19
Y23
Y28
Y30
Y31
Y32
Y38
Y43
Y46
P49
Y5
Y6
Y8
P24
T43
AD51
AT8
AD47
Y47
AT12
AM6
AT13
AM5
AK45
AK39
AV14

U4H

AB16

VSS[0]

AA19

VSS[1]

AA20

VSS[2]

AA22

VSS[3]

AM19

VSS[4]

AA24

VSS[5]

AA26

VSS[6]

AA28

VSS[7]

AA30

VSS[8]

AA31

VSS[9]

AA32

VSS[10]

AB11

VSS[11]

AB15

VSS[12]

AB23

VSS[13]

AB30

VSS[14]

AB31

VSS[15]

AB32

VSS[16]

AB39

VSS[17]

AB43

VSS[18]

AB47

VSS[19]

AB5

VSS[20]

AB8

VSS[21]

AC2

VSS[22]

AC52

VSS[23]

AD11

VSS[24]

AD12

VSS[25]

AD16

VSS[26]

AD23

VSS[27]

AD30

VSS[28]

AD31

VSS[29]

AD32

VSS[30]

AD34

VSS[31]

AU22

VSS[32]

AD42

VSS[33]

AD46

VSS[34]

AD49

VSS[35]

AD7

VSS[36]

AE2

VSS[37]

AE4

VSS[38]

AF12

VSS[39]

Y13

VSS[40]

AH49

VSS[41]

AU4

VSS[42]

AF35

VSS[43]

AP13

VSS[44]

AN34

VSS[45]

AF45

VSS[46]

AF46

VSS[47]

AF49

VSS[48]

AF5

VSS[49]

AF8

VSS[50]

AG2

VSS[51]

AG52

VSS[52]

AH11

VSS[53]

AH15

VSS[54]

AH16

VSS[55]

AH24

VSS[56]

AH32

VSS[57]

AV18

VSS[58]

AH43

VSS[59]

AH47

VSS[60]

AH7

VSS[61]

AJ19

VSS[62]

AJ2

VSS[63]

AJ20

VSS[64]

AJ22

VSS[65]

AJ23

VSS[66]

AJ26

VSS[67]

AJ28

VSS[68]

AJ32

VSS[69]

AJ34

VSS[70]

AT5

VSS[71]

AJ4

VSS[72]

AK12

VSS[73]

AM41

VSS[74]

AN19

VSS[75]

AK26

VSS[76]

AK22

VSS[77]

AK23

VSS[78]

AK28

VSS[79]

IBEXPEAK-M_FCBGA1071

VSS[80]
VSS[81]
VSS[82]
VSS[83]
VSS[84]
VSS[85]
VSS[86]
VSS[87]
VSS[88]
VSS[89]
VSS[90]
VSS[91]
VSS[92]
VSS[93]
VSS[94]
VSS[95]
VSS[96]
VSS[97]
VSS[98]

VSS[99]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]

AK30
AK31
AK32
AK34
AK35
AK38
AK43
AK46
AK49
AK5
AK8
AL2
AL52
AM11
BB44
AD24
AM20
AM22
AM24
AM26
AM28
BA42
AM30
AM31
AM32
AM34
AM35
AM38
AM39
AM42
AU20
AM46
AV22
AM49
AM7
AA50
BB10
AN32
AN50
AN52
AP12
AP42
AP46
AP49
AP5
AP8
AR2
AR52
AT11
BA12
AH48
AT32
AT36
AT41
AT47
AT7
AV12
AV16
AV20
AV24
AV30
AV34
AV38
AV42
AV46
AV49
AV5
AV8
AW14
AW18
AW2
BF9
AW32
AW36
AW40
AW52
AY11
AY43
AY47

+3VS

12

R315

100K_0402_5%

PCH_NCTF616

+3VS

R316

100K_0402_5%

PCH_NCTF716

+3VS

R317

100K_0402_5%

PCH_NCTF1916

+3VS

R318

100K_0402_5%

PCH_NCTF2616

2

12

5

12

2

12

5

61

Q4A
2N7002DW-T/R7_SOT363-6

CRACK_BGA

3

Q4B
2N7002DW-T/R7_SOT363-6

4

CRACK_BGA

61

Q5A
2N7002DW-T/R7_SOT363-6

CRACK_BGA

3

Q5B
2N7002DW-T/R7_SOT363-6

4

CRACK_BGA 31

BGA Ball Cracking Prevention and Detection

A A

5

IBEXPEAK-M_FCBGA1071

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC . AND CONTAINS CONFIDEN TIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE C OMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFOR MATION IT CONTAINS

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOU T PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2008/09/15 2009/09/15

Compal Secret Data

Deciphered Date

2

Title

Size Document Number Rev

Custom
Date: Sheet

Compal Electronics, Inc.

IBEX-M(6/6)-GND

LA-4951P

1

18 48Tuesday, July 28, 2009

of

0.4

http://hobi-elektronika.net

A

Place cloce to JMXM1

L

L6
0805CS-390XJLC_0805

DAC_RED21

DAC_GRN21

1 1

2 2

DAC_BLU21

Remove R319~R321, they
will put on MXM board.
11/11

1 2

L8
0805CS-390XJLC_0805

1 2

L10
0805CS-390XJLC_0805

1 2

VGA_RED29

VGA_GRN29

VGA_BLU29

R329

DAC_RE

DAC_GR

DAC_BL

18P_0402_50V8J

C336

1

2

150_0402_1%

R330

1 2

1

2

150_0402_1%

1 2

B

18P_0402_50V8J

C337

1

2

150_0402_1%

R331

1 2

L7
0805CS-111XJLC_0805

1 2

L9
0805CS-111XJLC_0805

1 2

L11
0805CS-111XJLC_0805

1 2

18P_0402_50V8J

C338

C724

C723

10P_0402_50V8C@

1

2

Reserve for EMI. 7/21

C725

10P_0402_50V8C@

10P_0402_50V8C@

1

1

2

2

RED_R 29

GREEN_R 29

BLUE_R 29

R323 0_0805_5%

1 2

R325 0_0805_5%

1 2

R327 0_0805_5%

1 2

C

F1

1.1A_6VDC_FUSE

21

VGA_RED_R

VGA_GRN_R

C340

C339

10P_0402_50V8C@

1

1

2

2

VGA_BLU_R

C341

10P_0402_50V8C@

10P_0402_50V8C@

1

2

R324 0_0805_5%

1 2

R326 0_0805_5%

1 2

R328 0_0805_5%

1 2

D4
CH491D_SC59

2 1

0.1U_0402_10V6K

Add C614~C616 for Nvidia request.
11/15

W=40mils

1

C335

2

Remove R319~R321, they will put
on MXM board. 11/11

C615

C616

10P_0402_50V8C@

1

1

2

2

D

JVGA1

1
3
5

VGA_B

VGA_G

VGA_R

D_HSYNC

D_VSYNC

7

9
11
13
15
17
19
21
23

ACES_50611-0120N-001

CONN@

+5VALW

1

2

+CRTVDD+RCRT_VCC+5VS

USB20_N216
USB20_P216

USB20_N316
USB20_P316

VGA_R

VGA_G

VGA_B

C614

10P_0402_50V8C@

10P_0402_50V8C@

1

2

2

1

2

4

3

4

6

5

6

8

7

8

10

9

10

12

11

12

14

13

14

16

15

16

18

17

18

20

19

20

22

21

22

24

23

24

JUSBU1

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

10

10

ACES_87212-10G0CONN@

DAN217T146_SC59-3

DAN217T146_SC59-3

1

D5

D6

@

@

3

2

3

G11119
G12

1

D7

2

E

VGA_R
VGA_G
VGA_B
D_HSYNC

D_VSYNC
D_DDCDATA

D_DDCCLK

12

DAN217T146_SC59-3

@

3

2

+CRTVDD+CRTVDD

SLP_S4 26,27,35

Connect to SLP_S4
from dummy. 1/22

DAN217T146_SC59-3

DAN217T146_SC59-3

1

1

D9

D8

@

@

2

3

3

+CRTVDD

Close to JVGA1

3 3

CRT_HSYNC21

74AHCT1G125GW_SOT353-5

CRT_VSYNC21

4 4

A

U7

+5VS

C342

0.1U_0402_16V4Z

1 2

1

5

P

A2Y

G

3

+5VS

C343

0.1U_0402_16V4Z

1 2

4

OE#

1

5

P

OE#

A2Y

G

U8

74AHCT1G125GW_SOT353-5

3

Change R337 & R336
to 0ohm. 3/9

HSYNC D_HSYNC

R336 0_0402_5%

1 2

VSYNC

R337 0_0402_5%

4

1 2

B

Place cloce to JMXM1

L

C344

5P_0402_50V8C

1

2

1

C345
5P_0402_50V8C

2

D_HSYNC 29

D_VSYNC 29 CRT_DDC_DATA 21

D_HSYNC & D_VSYNC

L

should be routed to
docking connector then
to VGA connector

C

+CRTVDD

Change R332 & R333
to 4.7K. 11/15

D_DDCDATA29

D_DDCCLK29

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC . AND CONTAINS CONFIDEN TIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE C OMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFOR MATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOU T PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008/09/15 2009/09/15

Compal Secret Data

Deciphered Date

D

D_DDCDATAD_VSYNC

D_DDCCLK

R332

4.7K_0402_5%

12

+3VS

R333

4.7K_0402_5%

12

2

G

1 3

D

Q11
2N7002_SOT23-3

Q12
2N7002_SOT23-3

Title

Size Document Number Re v

Date: Sheet

Remove R334 & R335,
should istall to MXM
board. 11/15

S

2

G

1 3

D

S

Compal Electronics, Inc.

CRT & USB Connector

LA-4951P

E

CRT_DDC_CLK 21

of

19 48Tuesday, July 28, 2009

0.4

http://hobi-elektronika.net

5

LCD POWER CIRCUIT

+LCDVDD+LCDVDD

12

R338
100_0402_1%

D D

ENAVDD21

100K_0402_1%

NI. 3/6

R344

@

3

Q8B
2N7002DW-T/R7_SOT363-6

5

4

2

IN

12

R341 47K_0402_5%

1 2

C347

0.1U_0402_16V4Z

1

OUT

Q15

HF

DTC124EKAT146_SC59-3

GND

3

1

2

1

C348

4.7U_0805_10V4Z

2

Remove Q61 & R501. 3/2

C C

Change Design. 4/25

WEBCAM_ON16

R287 10K_0402_5%

1 2

Q13
SI2305DS-T1-E3_SOT23-3

31

2

R340 1M_0402_5%

1 2

C346 0.1U_0402_16V4Z

1 2

+5VALW

C350

1U_0603_10V4Z

1

2

2

4

1

C349

4.7U_0805_10V4Z@

2

100K_0402_5%

R346

12

1 2

R348 47K_0402_5%

0.1U_0402_16V4Z

61

Q8A
2N7002DW-T/R7_SOT363-6

+3VS

Q16

AP2301GN 1P_SOT23

D

S

13

G

2

1

C358

2

C351

+5VALW

3

LCD/PANEL BD. CONN.

Modify pin assignment. 2/23

+5VS

12

JLCD1

1

1

3

3

5

5

7

7

9

9

11

11

13

13

15

15

17

17

19

19

21

21

23

23

25

25

27

27

29

29

31

31

33

33

35

35

37

37

39

39
414142
434344
454546
474748
494950
GND51GND

LID_SW#

10K_0402_5%

2

G

1 3

D

Q34
2N7002_SOT23-3

2

2

DPD_HPD_R

4

4

6

6

8

8

DPD_C_AUX

10

10

DPD_C_AUX#

12

12

14

14

16

16

18

18

20

20

22

22

24

24

26

26

28

28

30

30

32

32

34

34

36

36

38

38

40

40

42
44
46
48
50
52

ACES_50238-05071-001CONN@

S

1

2

C360

USB20_P12_R

USB20_N12_R

S

G

DPD_C_TXP0
DPD_C_TXN0

DPD_C_TXP1
DPD_C_TXN1

DPD_C_TXP2
DPD_C_TXN2

DPD_C_TXP3
DPD_C_TXN3

R146

C695 0.1U_0402_16V4Z

1 2

C696 0.1U_0402_16V4Z

DPD_TXN021

LVDS_A0P21

LVDS_A0N21

DPD_TXP121

DPD_TXN121

LVDS_A1P21

LVDS_A1N21

DPD_TXP221

DPD_TXN221

LVDS_A2P21

LVDS_A2N21

DPD_TXP321

DPD_TXN321

LVDS_ACLKP21

LVDS_ACLKN21

USB20_P1216
USB20_N1216

+5V_WEBCAM

0.01U_0402_16V7K

47P_0402_50V8J@

12

0.1U_0402_16V4Z

C352

C354

C353

1

2

1

1

2

2

1 2

C697 0.1U_0402_16V4Z

1 2

C698 0.1U_0402_16V4Z

1 2

C699 0.1U_0402_16V4Z

1 2

C700 0.1U_0402_16V4Z

1 2

C701 0.1U_0402_16V4Z

1 2

C702 0.1U_0402_16V4Z

1 2

R3420_0402_5%

12

R3450_0402_5%

12

+LCDVDD

+5V_WEBCAM

4.7U_0805_10V4Z

+5V_KL +5VS

+5V_KL

Q14

AP2301GN 1P_SOT23

D

1 3

2

2

DPD_HPD_R

C703 0.1U_04 02_16V4Z

1 2

C704 0.1U_04 02_16V4Z

1 2

DISP_OFF# ENABLT

+LCDVDD

C357 680P_0402_50V7K

INVPWR_B+

@

47P_0402_50V8J

680P_0402_50V7K

1

12

2

C361

C362

Change power source from
+5VALW to +5VS. 10/27

USB20_N12_R

+5VS

Modify. 0204

1 2

@

@

4.7U_0805_25V6-K

4.7U_0805_25V6-K

1

2

C283

D10

3
4

CM1293A-02SR_SOT143-4@

LVDS_B1P 21

LVDS_B1N 21

ALS_EN# 16
LVDS_B2P 21

LVDS_B2N 21

EDID_CLK 21

EDID_DATA 21
LVDS_BCLKP 21
LVDS_BCLKN 21

IO2

GND

PWR

12

IO1

R349
0_0805_5%

2
1

B+

USB20_P12_R

L20

10UH_LB2012T100MR_20%_0805

1 2

1

C390
220P_0402_50V7K

2

LVDS_B0P 21

LVDS_B0N 21

DPD_AUX 21
DPD_AUX# 21

+3VS

Add L20 & C390. 3/6

1

C356
680P_0402_50V7K

2

Change R46 to 100ohm. 7/19

R46

100_0402_1%

1 2

1

2

C3590.1U_0402_16V4Z

2 1

C439680P_0402_50V7K

12

D11 CH751H-40PT_SOD323-2

Add C439 on DISP_OFF# near the
connecor and change C359 to

0.1U. 2/10

@

DPD_C_AUX#
DPD_C_AUX

1

DPD_HPD 21

INV_PWM 21DPD_TXP021

R347 100K_0402_5%@

1 2

LID_SW#

R617 100K_0402_5%

1 2

R618 100K_0402_5%

1 2

ENABLT 21

LID_SW# 14,25,31

+DPA_VCC

Display port Connector

B B

DPA_C_AUX-21
DPA_C_AUX+21

DPA_TXN321

12

R363

5.1M_0402_5%

DPA_TXP321
DPA_TXN221

DPA_TXP221
DPA_TXN121

DPA_TXP121
DPA_TXN021

DPA_TXP021

+3VS

1

D48

2

3

A A

BAV99-7-F_SOT23-3 @

Add on 12/08.

5

+3VS

21

R360

1 2

D13

@

SDM10U45-7_SOD523-2

+DPA_VCC

21

F2

NANOSMDC050F 0.5A 13.2V POLY-FUSE

Del R365 & change F2. 3/2

C363 0.1U_0402_16V4Z

1 2

C364 0.1U_0402_16V4Z

1 2

C365 0.1U_0402_16V4Z

1 2

C366 0.1U_0402_16V4Z

1 2

C367 0.1U_0402_16V4Z

1 2

C368 0.1U_0402_16V4Z

1 2

C369 0.1U_0402_16V4Z

1 2

C370 0.1U_0402_16V4Z

1 2

4

0_1206_5%

+DPA_3V

1

2

C277

0.01U_0402_16V7K

1

2

C278

10U_0805_10V4Z

DPA_HPD_R
DPA_C_AUX-

DPA_C_AUX+
DCAD

R_DPA_TXN3
R_DPA_TXP3

R_DPA_TXN2
R_DPA_TXP2

R_DPA_TXN1
R_DPA_TXP1

R_DPA_TXN0
R_DPA_TXP0

Add by Nvidia. 11/15

DPA_C_AUX­DPA_C_AUX+

20
19
18
17
16
15
14
13
12
11
10

9
8
7
6
5
4
3
2
1

JDP1

DP_PWR
RTN
HP_DET
AUX_CH­GND
AUX_CH+
GND
CA_DET
LANE3­LANE3_shield
LANE3+
LANE2­LANE2_shield
LANE2+
LANE1­LANE1_shield
LANE1+
LANE0­LANE0_shield
LANE0+

MOLEX_105020-0001CONN@

R334 100K_0402_5%

1 2

R335 100K_0402_5%

1 2

GND
GND
GND
GND

3

+DPA_VCC

Remove R367 pulldown on DPA_HPD.
There is a 100K pulldown on the
module. 11/15

24
23
22
21

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONF IDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE C OMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFOR MATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

DPA_HPD_R

2008/09/15 2009/09/15

L16

10UH_LB2012T100MR_20%_0805

1 2

1

C378
220P_0402_50V7K

2

Compal Secret Data

Deciphered Date

DPA_HPD 21

2

Add by Nvidia. 12/08

DDC1_EN21

2N7002DW-7-F_SOT363-6

Q68A

Title

LCD & DP CONN

Size Document Number Rev

LA-4951P

Date: Sheet

+5VS +5VS

12

R368
10K_0402_5%

R367
10K_0402_5%

61

1 2

2

3

Q68B
2N7002DW-7-F_SOT363-6

DCAD

5

4

Compal Electronics, Inc.

1

R351

1 2

1M_0402_5%

0.4

of

20 48Tuesday, July 28, 2009

http://hobi-elektronika.net

5

Layout Note: DPB_HPD and DPC_HPD must
not routed close to high speed
signals.

D D

JMXM1A

1

PWR_SRC

3

PWR_SRC

5

PWR_SRC

7

PWR_SRC

9

PWR_SRC

11

PWR_SRC

13

PWR_SRC

15

PWR_SRC

17

PWR_SRC

19

PWR_SRC

21

GND

23

GND

25

GND

27

GND

29

GND

31

GND

33

+5VS

PCIE_CRX_GTX_N155
PCIE_CRX_GTX_P155

PCIE_CRX_GTX_N145
PCIE_CRX_GTX_P145

PCIE_CRX_GTX_N135
PCIE_CRX_GTX_P135

PCIE_CRX_GTX_N125
PCIE_CRX_GTX_P125

PCIE_CRX_GTX_N115
PCIE_CRX_GTX_P115

PCIE_CRX_GTX_N105
PCIE_CRX_GTX_P105

PCIE_CRX_GTX_N95
PCIE_CRX_GTX_P95

PCIE_CRX_GTX_N85
PCIE_CRX_GTX_P85

PCIE_CRX_GTX_N75
PCIE_CRX_GTX_P75

PCIE_CRX_GTX_N65
PCIE_CRX_GTX_P65

PCIE_CRX_GTX_N55
PCIE_CRX_GTX_P55

PCIE_CRX_GTX_N45
PCIE_CRX_GTX_P45

DDC1_EN20

ENABLT20

HDMI_CEC

EDID_DATA20

EDID_CLK20

DPA_ AUX-

DPA_ AUX+

Add R357. 12/05

R357 10K_0603_5%

1 2

ENAVDD_G
ENABLT
INV_PWM_G

R379 0_0402_5%

12

DDC1_EN

2

Q67A
2N7002DW-T/R7_SOT363-6

2

DDC1_EN

1

2

5

Q20A
2N7002DW-T/R7_SOT363-6

C265

0.1U_0402_16V4Z

61

C655 0.1U_0402_16V4Z
C656 0.1U_0402_16V4Z

61

C C

B B

Add to support DP/DVI dual mode. 11/24
Modify. 12/08

A A

http://hobi-elektronika.net

GND

35

GND

37

GND

39

GND

41

5V

43

5V

45

5V

47

5V

49

5V

51

GND

53

GND

55

GND

57

GND

59

PEX_STD_SW#

61

VGA_DISABLE#

63

PNL_PWR_EN

65

PNL_BL_EN

67

PNL_BL_PWM

69

HDMI_CEC

71

DVI_HPD

73

LVDS_DDC_DAT

75

LVDS_DDC_CLK

77

GND

79

OEM

81

OEM

83

OEM

85

OEM

87

GND

89

PEX_RX15#

91

PEX_RX15

93

GND

95

PEX_RX14#

97

PEX_RX14

99

GND

101

PEX_RX13#

103

PEX_RX13

105

GND

107

PEX_RX12#

109

PEX_RX12

111

GND

113

PEX_RX11#

115

PEX_RX11

117

GND

119

PEX_RX10#

121

PEX_RX10

123

GND

125

PEX_RX9#

127

PEX_RX9

129

GND

131

PEX_RX8#

133

PEX_RX8

135

GND

137

PEX_RX7#

139

PEX_RX7

141

GND

143

PEX_RX6#

145

PEX_RX6

147

GND

149

PEX_RX5#

151

PEX_RX5

153

GND

155

PEX_RX4#

157

PEX_RX4

INV_PWM20

ENAVDD20

354

1 2
1 2

Q67B
2N7002DW-T/R7_SOT363-6

354

Add R265 close to
Q20, Q67 gate pin.
4/25

R384 0_0402_5%

12

R386 0_0402_5%

12

R390 10K_0402_5%@

12

R392 10K_0402_5%@

NI R390 & R392. 3/6

12

Q20B
2N7002DW-T/R7_SOT363-6

FOX_AS0B826-S43B-4HCONN@

DPA_C_AUX- 20

DPA_C_AUX+ 20

PWR_GOOD

PWR_LEVEL

TH_OVERT#

TH_ALERT#

INV_PWM_G
ENAVDD_G

INV_PWM_G
ENAVDD_G

4

Remove Q19 & R376. 2/24
Remove C377. 7/10

B+B+

2

PWR_SRC

4

PWR_SRC

6

PWR_SRC

8

PWR_SRC

10

PWR_SRC

12

PWR_SRC

14

PWR_SRC

16

PWR_SRC

18

PWR_SRC

20

PWR_SRC

22

GND

24

GND

26

GND

28

GND

30

GND

32

GND

34

GND

36

GND

38

GND

40

PRSNT_R#

WAKE#

PWR_EN

RSVD
RSVD
RSVD
RSVD

TH_PWM

GPIO0
GPIO1

GPIO2
SMB_DAT
SMB_CLK

OEM
OEM
OEM
OEM

PEX_TX15#

PEX_TX15

PEX_TX14#

PEX_TX14

PEX_TX13#

PEX_TX13

PEX_TX12#

PEX_TX12

PEX_TX11#

PEX_TX11

PEX_TX10#

PEX_TX10
PEX_TX9#

PEX_TX9

PEX_TX8#

PEX_TX8

PEX_TX7#

PEX_TX7

PEX_TX6#

PEX_TX6

PEX_TX5#

PEX_TX5

PEX_TX4#

PEX_TX4

4

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

PRSNT_R#

42

WAKE#

44

MXM_VGA_POK_R

46
48
50
52
54
56

PWR_LEVEL

58

TH_OVERT#

60
62

TH_PWM

64
66
68
70

SML1DAT_MXM

72

SML1CLK_MXM

74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156

Place close to JDOCK1. 11/30
Modify net. 12/02

DPB_HPD29

220P_0402_50V7K@

DPC_HPD29

220P_0402_50V7K@

R62 0_0402_5%
R378 0_0402_5%

R212 0_0402_5%

1 2

R219 0_0402_5%@

1 2

PCIE_CTX_GRX_N15 5
PCIE_CTX_GRX_P15 5

PCIE_CTX_GRX_N14 5
PCIE_CTX_GRX_P14 5

PCIE_CTX_GRX_N13 5
PCIE_CTX_GRX_P13 5

PCIE_CTX_GRX_N12 5
PCIE_CTX_GRX_P12 5

PCIE_CTX_GRX_N11 5
PCIE_CTX_GRX_P11 5

PCIE_CTX_GRX_N10 5
PCIE_CTX_GRX_P10 5

PCIE_CTX_GRX_N9 5

PCIE_CTX_GRX_N8 5

PCIE_CTX_GRX_N7 5

PCIE_CTX_GRX_N6 5

PCIE_CTX_GRX_N5 5

PCIE_CTX_GRX_N4 5

L17 0_0603_5%

1

C379

2

L15 0_0603_5%

1

C371

2

1 2
1 2

SML1DAT_MXM 14
SML1CLK_MXM 14

PCIE_CTX_GRX_P9 5

PCIE_CTX_GRX_P8 5

PCIE_CTX_GRX_P7 5

PCIE_CTX_GRX_P6 5

PCIE_CTX_GRX_P5 5

PCIE_CTX_GRX_P4 5

DPA_HPD20

1 2

1 2

3

B+

1

1

1

C372

C374

C373

2

2

2

0.1U_0603_50V4Z

22U_1210_25V6-M

Layout Note:
Place as close as to MXM connector

PCIE_CTX_GRX_N35
PCIE_CTX_GRX_P35

PCIE_CRX_GTX_N25
PCIE_CRX_GTX_P25

PCIE_CRX_GTX_N15
PCIE_CRX_GTX_P15

PCIE_CRX_GTX_N05
PCIE_CRX_GTX_P05

CLK_PEG_VGA_PCH#14

CLK_PEG_VGA_PCH14

MXM_VGA_POK

H_THERMTRIP#_U1 4

THERM_SCI# 4,16

T109PAD

MXM_VGA_POK 34

VCCP_EN 11,34,40

T110PAD

Docking

M/N DP

Place close to JMXM1. 11/30

R380 10K_0603_5%

1 2

DPB_HPD_G

Nvidia: No need 10K,
so change to 0 ohm.
11/15

Remove R395 and
R364. 11/30

DPC_HPD_G

3

D14
BAV99-7-F_SOT23-3

D15

Reserve D15 & D38. 12/08

D38

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM T HE CUSTODY OF THE COMPETENT DIVISION OF R &D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+3VS

1

C375

2

22U_1210_25V6-M

LVDS_BCLKN20

LVDS_BCLKP20

Reverse. 01/19

LVDS_B2N20

LVDS_B2P20

LVDS_B1N20

LVDS_B1P20

LVDS_B0N20

LVDS_B0P20

DPC_TXN029
DPC_TXP029

DPC_TXN129
DPC_TXP129

DPC_TXN229
DPC_TXP229

DPC_TXN329
DPC_TXP329

DPC_AUX#29

DPC_AUX29

DPA_TXN020
DPA_TXP020

DPA_TXN120
DPA_TXP120

DPA_TXN220
DPA_TXP220

DPA_TXN320
DPA_TXP320

DPA_HPD_G

3

1

2

3

1

2

BAV99-7-F_SOT23-3 @

3

1

2

BAV99-7-F_SOT23-3 @

2

Install Q69. 2/24

+5VS

1

C376

2

4.7U_0805_10V4Z
22U_1210_25V6-M

ADP_PRES31 ,35,38,44

JMXM1B

158

GND

160

PEX_TX3#

162

PEX_TX3

164

GND

166

GND

168

PEX_RX2#

170

PEX_RX2

172

GND

174

PEX_RX1#

176

PEX_RX1

178

GND

180

PEX_RX0#

182

PEX_RX0

184

GND

186

PEX_REFCLK#

188

PEX_REFCLK

190

GND

192

RSVD

194

RSVD

196

RSVD

198

RSVD

200

RSVD

202

LVDS_UCLK#

204

LVDS_UCLK

206

GND

208

LVDS_UTX3#

210

LVDS_UTX3

212

GND

214

LVDS_UTX2#

216

LVDS_UTX2

218

GND

220

LVDS_UTX1#

222

LVDS_UTX1

224

GND

226

LVDS_UTX0#

228

LVDS_UTX0

230

GND

232

DP_C_L0#

234

DP_C_L0

236

GND

238

DP_C_L1#

240

DP_C_L1

242

GND

244

DP_C_L2#

246

DP_C_L2

248

GND

250

DP_C_L3#

252

DP_C_L3

254

GND

256

DP_C_AUX#

258

DP_C_AUX

260

RSVD

262

RSVD

264

RSVD

266

RSVD

268

RSVD

270

RSVD

DPA_ AUX­DPA_ AUX+
PRSNT_L#

+3VS

+3VS

272
274
276
278
280
282
284
286
288
290
292
294
296
298
300
302
304
306
308
310
312
314
316
318

Add PU. 12/08

Nvidia: NC

RSVD

pin277. 11/15

RSVD
RSVD
RSVD
RSVD
RSVD
GND
DP_A_L0#
DP_A_L0
GND
DP_A_L1#
DP_A_L1
GND
DP_A_L2#
DP_A_L2
GND
DP_A_L3#
DP_A_L3
GND
DP_A_AUX#
DP_A_AUX
PRSNT_L#
GND
GND

FOX_AS0B826-S43B-4H CONN@

Change value from 10K to 2.2K. 3/6

SML1DAT_MXM
SML1CLK_MXM

MXM_VGA_POK

EDID_DATA
EDID_CLK
WAKE#

Remove R387. 02/04

TH_OVERT#
HDMI_CEC

PRSNT_L#

+3VS

2005/03/10 2006/03/10

Compal Secret Data

PRSNT_R#

Change R387, R391, R393, and R394 to 10K. 11/11
Remove R393 because duplicate to other page. 12/02
NI R387, because have PR120 PU to +3VL. 12/05
Change R394 to NI and install R381 & R382. 12/08

Deciphered Date

2

2

G

159

GND

161

PEX_RX3#

163

PEX_RX3

165

GND

167

GND

169

PEX_TX2#

171

PEX_TX2

173

GND

175

PEX_TX1#

177

PEX_TX1

179

GND

181

PEX_TX0#

183

PEX_TX0

185

GND

PEX_CLK_REQ#

187
189

PEX_RST#

191

VGA_DDC_DAT

193

VGA_DDC_CLK

195

VGA_VSYNC

197

VGA_HSYNC

199

GND

201

VGA_RED

203

VGA_GREEN

205

VGA_BLUE

207

GND

209

LVDS_LCLK#

211

LVDS_LCLK

213

GND

215

LVDS_LTX3#

217

LVDS_LTX3

219

GND

221

LVDS_LTX2#

223

LVDS_LTX2

225

GND

227

LVDS_LTX1#

229

LVDS_LTX1

231

GND

233

LVDS_LTX0#

235

LVDS_LTX0#

237

GND

239

DP_D_L0#

241

DP_D_L0

243

GND

245

DP_D_L1#

247

DP_D_L1

249

GND

251

DP_D_L2#

253

DP_D_L2

255

GND

257

DP_D_L3#

259

DP_D_L3

261

GND

263

DP_D_AUX#

265

DP_D_AUX

267

DP_C_HPD

269

DP_D_HPD

271

RSVD

273

RSVD

275

RSVD

277

RSVD

279

DP_B_L0#

281

DP_B_L0

283

GND

285

DP_B_L1#

287

DP_B_L1

289

GND

291

DP_B_L2#

293

DP_B_L2

295

GND

297

DP_B_L3#

299

DP_B_L3

301

GND

303

DP_B_AUX#

305

DP_B_AUX

307

DP_B_HPD

309

DP_A_HPD

311

3V3

313

3V3

315

GND

317

GND

R129 2.2K_0402_5%

1 2

R130 2.2K_0402_5%

1 2

R518 10K_0402_5%

1 2

R381 4.7K_0402_5%

1 2

R382 4.7K_0402_5%

1 2

R383 10K_0402_5%

1 2

R391 10K_0402_5%

1 2

R394 10K_0402_5%@

1 2

R396 100K_0402_5%

1 2

R397 100K_0402_5%

1 2

+3VS

1 2

1 2
13

D

S

R135
100K_0402_5%

R388
47K_0402_5%

Q69
2N7002_SOT23-3

PEG_CLKREQ#

MMBT3906_SOT23-3

LVDS_ACLKN 20
LVDS_ACLKP 20

1

Q70

C

PWR_LEVEL

123

E

B

R118

8.2K_0402_5%

1 2

PCIE_CRX_GTX_N3 5

PCIE_CRX_GTX_P3 5

PCIE_CTX_GRX_N2 5

PCIE_CTX_GRX_P2 5

PCIE_CTX_GRX_N1 5

PCIE_CTX_GRX_P1 5

PCIE_CTX_GRX_N0 5

PCIE_CTX_GRX_P0 5

PEG_CLKREQ# 14

PLT_RST# 4,13,16,22,24,27,28,30
CRT_DDC_DATA 19
CRT_DDC_CLK 19

CRT_VSYNC 19

CRT_HSYNC 19

DAC_RED 19
DAC_GRN 19
DAC_BLU 19

Reverse. 01/19Remove R287. 02/04

LVDS_A2N 20
LVDS_A2P 20

LVDS_A1N 20
LVDS_A1P 20

LVDS_A0N 20
LVDS_A0P 20

DPD_TXN0 20
DPD_TXP0 20

DPD_TXN1 20
DPD_TXP1 20

Dream Color Panel

DPD_TXN2 20
DPD_TXP2 20

DPD_TXN3 20
DPD_TXP3 20

DPD_AUX# 20

DPC_HPD_G
DPD_HPD_G

Change R322 to 2.2K. 3/6

DPB_HPD_G
DPA_HPD_G

DPD_AUX 20

R322 10K_0603_5%

1 2

DPB_TXN0 29
DPB_TXP0 29

DPB_TXN1 29
DPB_TXP1 29

Docking

DPB_TXN2 29
DPB_TXP2 29

DPB_TXN3 29
DPB_TXP3 29

DPB_AUX# 29
DPB_AUX 29

+3VS

1

3

+3VS

Add D41. 3/6

Change to dummy. 12/22

+3VS

Add FET near PCH for isolation. 11/11

PEG_CLKREQ#

R385 10K_0402_5%@

12

Compal Electronics, Inc.

Title

MXM-III CONN

Size Document Number Rev

LA-4951P

Date: Sheet

1

DPD_HPD 20

DPD_HPD_G

D41
BAV99-7-F_SOT23-3

2

of

21 48Tuesday, July 28, 2009

+3VS

0.4

5

4

3

2

1

Update on 10/27.

D D

+3VM +3VM_LAN

R398 0_0603_5%

1 2

0.1U_0402_16V4Z

1

1

C380

C381

2

2

10U_0805_10V4Z

+1.0VM_LAN

1

C386

2

R403 0_0603_5%

10U_0805_6.3V6M

0.1U_0402_16V4Z

1

C387

2

1 2

+1.05V_LAN_M

Remove C382, C383, C384, C385, C694, R401,
R366, Q21 and R402 as not needed. 2/17

Remove note. 0205

Remove C388, C389, C390, & C393 on +1.0VM_LAN; Remove C394, C396
& C397 on +3.3VM_LAN_OUT_R; Remove C399 & C400 on +1.0VM_LAN4;
Remove C401 on +1.0VM_LAN3; and Remove C402 on +1.0VM_LAN2 as
done in Intel's RedFort CRB

C C

+3VALW

12

R406
10K_0402_5%

CLK_PCIE_LAN_REQ#16

PLT_RST#4,13,16,21,24,27,28,30

CLK_PCIE_LAN_PCH16

CLK_PCIE_LAN_PCH#16

PCIE_PRX_DTX_P614
PCIE_PRX_DTX_N614

PCIE_PTX_C_DRX_P614
PCIE_PTX_C_DRX_N614

B B

LAN_DIS#16,23

LED_LINK_LAN#_R16,23,31

LED_LINK_LAN#23

LAN_ACT#23,29

C391 0.1U_0402_16V7K
C392 0.1U_0402_16V7K

LAN_DIS#

Swap signals to U9.26&27. 02/23

R415 10K_0402_5%@

1 2

R417 10K_0402_5%@

1 2

LAN_DIS#

R558 10K_0402_5%

A A

1 2

+3VM_LAN

Change R558 PU to +3VM_LAN. 5/11

5

NI R407. 5/11

CLK_PCIE_LAN_REQ#_R14

R407 0_0402_5%@

1 2

R408 0_0402_5%

1 2

1 2
1 2

SML0CLK14
SML0DATA14

R412 0_0402_5%

1 2

R285 0_0402_5%@

1 2

LAN_JTAG_TMS
LAN_JTAG_TCK

R421 1K_0402_5%
R423 3.01K_0402_1%

PLT_RST#_LAN

PCIE_PRX_DTX_P6_C
PCIE_PRX_DTX_N6_C

XTAL1
XTAL2

1 2
1 2

LAN_DIS#_R

T60PAD
T61PAD

4

U9

48

CLK_REQ_N

36

PE_RST_N

44

PE_CLKP

45

PE_CLKN

38

PETp

39

PETn

41

PERp

42

PERn

28

SMB_CLK

31

SMB_DATA

3

LAN_DISABLE_N

26

LED0

27

LED1

25

LED2

32

JTAG_TDI

34

JTAG_TDO

33

JTAG_TMS

35

JTAG_TCK

9

XTAL_OUT

10

XTAL_IN

30

TEST_EN

12

RBIAS

WG82577LM_QFN48P

Add on 12/4.

C647 10P_0402_25V8K

1 2

Y5

25MHZ_20P_1BG25000CK1A

1 2

2

C403
27P_0402_50V8J

1

PCIE

SMBUS

JTAG LED

MDI_PLUS0

MDI_MINUS0

MDI_PLUS1

MDI_MINUS1

MDI

MDI_PLUS2

MDI_MINUS2

MDI_PLUS3

MDI_MINUS3

RSVD_VCC3P3_1
RSVD_VCC3P3_2

VDD3P3_IN

VDD3P3_OUT

VDD3P3_15
VDD3P3_19
VDD3P3_29

VDD1P0_47
VDD1P0_46
VDD1P0_37

VDD1P0_43
VDD1P0_11
VDD1P0_40

VDD1P0_22
VDD1P0_16

VDD1P0_8

CTRL_1P0

VSS_EPAD

XTAL1

XTAL2

2

C404
27P_0402_50V8J

1

13
14

17
18

20
21

23
24

6

VCT

1
2
5

4
15

19
29

47
46
37

43
11
40

22
16
8

7
49

Remove Q17, R124, and R405 (Intel
confirmed isolation not required for
Hanksville)

LAN_MDI0P 23
LAN_MDI0N 23

LAN_MDI1P 23
LAN_MDI1N 23

LAN_MDI2P 23
LAN_MDI2N 23

LAN_MDI3P 23
LAN_MDI3N 23

TRM_CT

C395 1U_0402_6.3V4Z@

1 2

R411 3.01K_0402_1%

1 2

R319 3.01K_0402_1%

1 2

+3.3VM_LAN_OUT
+3.3VM_LAN_OUT_R

+1.0VM_LAN4

+1.0VM_LAN3
+1.0VM_LAN2

LAN_CTRL_10

1 2

R413 0_0603_5%

R414 0_0603_5%

1 2

R416 0_0603_5%

1 2

R418 0_0603_5%

1 2

R419 0_0603_5%

1 2

T107 PAD

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC . AND CONTAINS CONFIDEN TIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE C OMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFOR MATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOU T PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2/23

+3VM_LAN

C398 1U_0603_10V4Z

1 2

+1.0VM_LAN+3VM_LAN

2008/09/15 2009/12/31

Compal Secret Data

Deciphered Date

Remove R354, R355, Q22A, Q22B; and
connect SML0CLK and SML0DATA directly to
LAN_SM_CLK and LAN_SM_DAT. 2/23

Title

Size Document Number Re v

2

Date: Sheet

Compal Electronics, Inc.

Intel 82578 Hanksville-LM

LA-4951P

1

0.4

of

22 48Tuesday, July 28, 2009

http://hobi-elektronika.net

5

4

3

2

1

Modify. 0223

D D

LAN_ACT#22,29

C411 680P_0402_50V7K@

1 2

LED_LINK_LAN#22

C416 680P_0402_50V7K@

C C

1 2

+3VM_LAN

R424

10K_0402_5%

12

R557

10K_0402_5%

12

+3VM_LAN_LED

1 2

+3VM_LAN_LED

1 2

R426
300_0603_5%

R430
300_0603_5%

LAN_ACT# LAN_ACT_R#

+3VM_LAN

Change combo connector to RJ45 only. 2/16

LED_LINK_LAN_R#LED_LINK_LAN#

JLAN1

13

Yellow LED+

14

8
7
6
5
4
3
2

1
11
12

Yellow LED­PR4­PR4+
PR2­PR3­PR3+
PR2+
PR1­PR1+
Green LED+
Green LED-

FOX_JM3611A-P1123-7HCCONN@

MDO3­MDO3+
MDO1­MDO2­MDO2+
MDO1+
MDO0­MDO0+

Note. Close to JLAN1

LED_LINK_LAN_R#

2

3

D39

1

DETECT PIN1

DETCET PIN2

LAN_ACT_R#

PJSOT05C_SOT23-3@

SHLD2

SHLD1

16
9

10
15

LAN_MDI0P22

LAN_MDI0N22

1 2

C409 0.1 U_0402_16V7K

LAN_MDI1P22
LAN_MDI1N22

1 2

C412 0.1 U_0402_16V7K

LAN_MDI2P22
LAN_MDI2N22

1 2

C414 0.1 U_0402_16V7K

LAN_MDI3P22
LAN_MDI3N22

1 2

C417 0.1 U_0402_16V7K

TRM_CT_R

TRM_CT_R

TRM_CT_R

TRM_CT_R

Change. 5/16

U11

12

TD4-

11
10

9

8
7
6

5
4
3

2
1

NS892402 1G

1

C264

2

1U_0603_10V4Z

TD4+
TCT4
TD3-

TD3+
TCT3
TD2-

TD21+
TCT2
TD1-

TD1+
TCT1

1:1

1:1

1:1

1:1

HF

MX4+
MCT4

MX3+
MCT3

MX2+
MCT2

MX1+
MCT1

MX4-

MX3-

MX2-

MX1-

MDO0+

13

MDO0-

14

MCT0

15

MDO1+

16

MDO1-

17

MCT1

18

MDO2+

19

MDO2-

20

MCT2

21

MDO3+

22

MDO3-

23

MCT3

24

MDO0+ 29

MDO0- 29

C410 0.01U_0402_50V7K

1 2

MDO1+ 29

MDO1- 29

C413 0.01U_0402_50V7K

1 2

MDO2+ 29

MDO2- 29

C415 0.01U_0402_50V7K

1 2

MDO3+ 29

MDO3- 29

C418 0.01U_0402_50V7K

1 2

R425

75_0402_1%

1 2

R427

75_0402_1%

1 2

R429

75_0402_1%

1 2

R431

75_0402_1%

1 2

C419 1000P_1808_3KV7K

1 2

Add C264. 4/23

Change on 12/17.Modify & remove Q63A & R132. 02/23

B B

R203 0_0402_5%

LED_LINK_LAN#_R16,22,31

LED_LINK_LAN_DOCK#29

1 2

Q63B
2N7002DW-T/R7_SOT363-6

3

4

5

LED_LINK_LAN#

LAN_DIS# 16,22

R510 10K_0402_5%

+3VALW

Move R510 close to Q28, and PU to
+3VALW. 5/19

+3VM_LAN +3VM_LAN_LED

R138

100K_0402_5%

DOCK_ID29

12

20 mil

12

2

G

S

G

D

13

Q60
FDN338P_SOT23

2

13

D

Q28
2N7002_SOT23-3

S

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC . AND CONTAINS CONFIDEN TIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE C OMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFOR MATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOU T PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2008/09/15 2009/09/15

Compal Secret Data

Deciphered Date

2

Title

Size Document Number Re v

Date: Sheet

Compal Electronics, Inc.

Magnetic & RJ45

LA-4951P

1

of

23 48Tuesday, July 28, 2009

0.4

http://hobi-elektronika.net

Change to 0805. 2/24

A

+3V_WWAN

Disconnection. 2/10

C706

C707

@

@

4.7U_0805_25V6-K

4.7U_0805_25V6-K

1

1

1 1

2

2

+3V_WWAN

T62 PAD
T63 PAD

1
3
5
7

Close to JWWAN1 pin2 and pin52.

6
5
4

VCC

RST
CLK

GND
GND

+3V_WWAN

12

1

C443

+

2

T64 PAD

UIM_PWR

1

UIM_RST

2

UIM_CLK

3

1

@

C432

18P_0402_50V8J

C433

2

8
9

VCC_11VCC_22VCC_33VCC_440VCC_541VCC_6

150U_B2_6.3VM_R35M

6

DQ0

7

DQ1

45

DQ2

46

DQ3

12

DQ4

13

DQ5

51

DQ6

52

DQ7

28

DQ8

29

DQ9

67

DQ10

68

DQ11

34

DQ12

35

DQ13

73

DQ14

74

DQ15

18

CLE_0

57

CLE_1

19

ALE_0

58

ALE_1

60

W/R_1#/RE_1#

21

W/R_0#/RE_0#

5

VSS_1

8

VSS_2

11

VSS_3

14

VSS_4

17

VSS_5

20

VSS_6

23

VSS_7

26

VSS_8

27

VSS_9

30

VSS_10

33

VSS_11

36

VSS_12

JNAND1

D18

DAN217T146_SC59-3@

1

4.7U_0805_10V4Z

C434

0.1U_0402_16V4Z

1

1

2

2

+V_NVRAM_VCCQ+3.3V_NVRAM+3VS

42

CK_0/WE_0#
CK_1/WE_1#

CONN@

FOX_AS0B726-N2SN-7F

VCCQ_138VCCQ_239VCCQ_3

DOS_0#

DOS_0

DOS_1#

DOS_1
RFU_1

RFU_2
RFU_3
RFU_4

CE_0#
CE_2#
CE_1#
CE_3#
CE_4#
CE_6#
CE_5#
CE_7#

CK_0#
CK_1#

R/B#
WP#

VREF

VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24

FOXCONN AS 0B226-S40N- 7F 52PCONN@

78

U12

1

CH1

CH4

2

Vn

Vp

CH23CH3

S DIO(BR ) N U P4301MR 6T1 T SO P- 6@

JSIM1

4

UIM_VPP
UIM_DATA

2 2

R450

47K_0402_5%@

3 3

4 4

Change net name. 5/11

GND

5

VPP

6

I/O

7

DET

12

UIM_PWR

Remove C444~C447,
and change C443 to
150uF. 4/27

NV_DQ016
NV_DQ116
NV_DQ216
NV_DQ316
NV_DQ416
NV_DQ516
NV_DQ616

NV_DQ716
NV_DQ816
NV_DQ916

NV_DQ1016
NV_DQ1116
NV_DQ1216
NV_DQ1316
NV_DQ1416
NV_DQ1516

NV_CLE16

NV_ALE16

NV_RE#_WR#116
NV_RE#_WR#016

NAND_DET#13

A

SANTA_135306-3CONN@

R453 0_0603_5%

B

+3V_WWAN

JWWAN1

1
3
5
7
9910
111112
131314
151516
171718
191920
212122
232324
252526
272728
292930
313132
333334
353536
373738
393940
414142
434344
454546
474748
494950
515152

GND153GND2

+3V_WWAN

3
2

2

2

4

4

6

6

8

8

10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

54

NI. 7/7 NI. 7/7

MC1_DISABLE31

Install. 4/25

2A

R433 0_0805_5%@

1 2

UIM_PWR
UIM_DATA
UIM_CLK
UIM_RST
UIM_VPP

R131 10K_0402_5%

1 2

R132 0_0402_5% @

1 2

WW _LED #

+3V_WWAN

C429

39P_0402_50V8J@

C430

39P_0402_50V8J@

1

1

2

2

+3VALW

12

R448

10K_0402_5%@

R451

1 2

220K_0402_1%

+3VALW +3VALW

+3VS

CH751H-40PT_SOD323-2

2 1

D16

WWAN_DET # 16

USB20_N9 16
USB20_P9 16

WW_LED# 30

C426

C431

1

2

0.1U_0402_16V4Z

0.01U_0402_16V7K

39P_0402_50V8J@

1

2

SI2305DS-T1-E3_SOT23-3

C605

WWAN

(USB Only)

Remove PLT_RST# on
JWWAN1.22. 2/24

WWAN_TRANSMIT_OFF# 16

+3VS

Add. 7/7

+3V_WWAN

C427

0.1U_0402_16V4Z

C428

4.7U_0805_10V4Z

1

1

2

2

Q26

31

2

1

HF HF

2

C

+3V_WWAN

NAND FLASH

R454 0_0603_5%@
R455 0_0603_5%

1

C448

2

9
10
31
32

15
16
63
64

24
25
22
61
4
43
37
76

48
49
70
71

54
55

77

44
47
50
53
56
59
62
65
66
69
72
75

12
12

22U_0805_6.3V6M

TP_NV_DOS_0#
TP_NV_DOS_1#

TP_NV_RFU_1
TP_NV_RFU_2
TP_NV_RFU_3
TP_NV_RFU_4

TP_NV_CK_0#
TP_NV_CK_1#

TP_NV_WP0#
TP_NV_VREF

B

+3VS
+1.8VS

Remove C499~C452,
and change C448 to
22uF. 4/27

T66PAD
T67PAD

T68PAD
T69PAD
T70PAD
T71PAD

T72PAD

NV_WE#_CK0 16

T73PAD

NV_WE#_CK1 16
NV_RB# 16

T74PAD
T75PAD

NV_DQS0 16
NV_DQS1 16

NV_CE0# 16
NV_CE1# 16
NV_CE2# 16
NV_CE3# 16

C

D

WLAN

CLK_PCIE_MCARD_PCH#14

CLK_PCIE_MCARD_PCH14

Swap. 12/22

MC2_DISABLE31

Reserved 10/27.

CLKREQ_WLAN#14

PCIE_PRX_DTX_N414
PCIE_PRX_DTX_P414

PCIE_PTX_C_DRX_N414
PCIE_PTX_C_DRX_P414

C709

47P_0402_50V8J

12

@

PCIE_WAKE#15,27,30

C420

1

2

+3VALW

+3V_WLAN

0.01U_0402_16V7K

C421

0.1U_0402_16V4Z

1

2

12

R449

10K_0402_5%@

1 2

220K_0402_1%

C708

C422

4.7U_0805_10V4Z

1

12

2

Remove R441 of pin5. 2/10

+3VALW

R443 0_0402_5%

1 2

R444 0_0402_5%

1 2

CL_CLK114
CL_DATA114
CL_RST#114

SI2305DS-T1-E3_SOT23-3

R452

C606

0.1U_0402_16V4Z @

+1.5VS

47P_0402_50V8J

C425

4.7U_0805_10V4Z

C424

0.1U_0402_16V4Z

C423

0.01U_0402_16V7K

1

1

1

2

2

2

@

R442 10K_0402_5%

1 2

PCI_RST#_R
CLK_PCI_DEBUG

PCIE_C_RXN4
PCIE_C_RXP4

+3V_WLAN

R445 0_0402_5%
R446 0_0402_5%
R447 0_0402_5%

1

2

12
12
12

T65 PAD

Q27

31

2

+3V_WLAN

DEG_FRAME#
DEBUG_AD3
DEBUG_AD2
DEBUG_AD1
DEBUG_AD0
PCI_RST #_R

CLK_PCI_DEBUG

Removed R439 connect to U3. 10/27

JWLAN1

1
3
5
7

Change from GND to +3VALW. 12/09

Remove UWB. (10/24)

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC . AND CONTAINS CONFIDEN TIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE C OMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFOR MATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOU T PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008/09/15 2009/09/15

Compal Secret Data

Deciphered Date

D

R432 0_0402_5%

1 2

R434 0_0402_5%

1 2

R435 0_0402_5%

1 2

R436 0_0402_5%

1 2

R437 0_0402_5%

1 2

R438 0_0402_5%

1 2

R440 0_0402_5%

1 2

+3V_WLAN

1
3
5
7
9910
111112
131314
151516
171718
191920
212122
232324
252526
272728
292930
313132
333334
353536
373738
393940
414142
434344
454546
474748
494950
515152

GND153GND2

2

2

4

4

6

6

8

8

10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

54

MOLEX_67910-5700CONN@

Title

Size Document Number Re v

Date: Sheet

E

LPC_LFRAME# 13,28,31,33
LPC_LAD3 13,28,31,33
LPC_LAD2 13,28,31,33
LPC_LAD1 13,28,31,33
LPC_LAD0 13,28,31,33

PCI_RST# 16,32

CLK_PCI_DEBUG_PCH 16

+1.5VS

DEG_FRAME#
DEBUG_AD3
DEBUG_AD2
DEBUG_AD1
DEBUG_AD0

D17 CH751H-40PT_SOD323-2

2 1

PLT_RST#

T98 P AD
T99 P AD

WL_LED#

Remove USB20_P6 and USB20_N6
connections to JWLAN1.36 and 38.
2/10

WLAN_TRANSMIT_OFF# 16
PLT_RST# 4,13,16,21,22,27,28,30

WL_LED# 30

Compal Electronics, Inc.

WWAN/NAND mini

LA-4951P

E

0.4

of

24 48Tuesday, July 28, 2009

http://hobi-elektronika.net

+3VL +3VL

1

1

C608

C607

2

2

0.1U_0402_16V4Z @

1000P_0402_50V7K@

CAP_CLK14,31
CAP_DAT14,31

CAP_SENS_INT31

HDA_SDOUT_MDC13
HDA_SYNC_MDC13

HDA_SDIN113

HDA_RST#_MDC13

Remove modem disable GPIO and U13. Connect
HDA_RST#_MDC to JMDC1.11. 2/10

12

R468

ON/OFF#

1U_0603_10V4Z

C462

1

2

CAP SWITCH BOARD.

+3VL +3VS +3VL

5.1K_0402_5%

5.1K_0402_5%

12

12

R462

R463

CAP_RST_EC31
WL/BT_LED#30

CAP_CLK
CAP_DAT
CAP_SENS_INT

10K_0402_5%

12

R464

100K_0402_5%

2

STB_LED#29,30
ON/OFF#29
LID_SW#14,20,31

R465 33_0402_5%

1 2

+3VL +3VL+3VL

U14

5

SN74LVC1G14DCKR_SC70-5

V

R469 100K_0402_5%

4

A

Y

NC

G

1

3

1 2

JSW1

CAP_RST_EC
WL/BT_LED#

STB_LED#
ON/OFF#
LID_SW#

1
3
5
7

9
11
13
15
17
19
21
23

2

1

2

4

3

4

6

5

6

8

7

8

10

9

10

12

11

12

14

13

14

16

15

16

18

17

18

20

19

20

22

21

22

24

23

24

ACES_50611-0120N-001CONN@

MDC 1.5 Conn.

JMDC1

1

1

3

3

5

5

7

HDA_SDIN1_MDC

C463

1U_0603_10V4Z

7

9

9

11

11

13

GND
GND
GND

C455

1

2

ACES_88020-12101CONN@

+3VS

1000P_0402_50V7K

C456

1

2

12

R467
100K_0402_5%

13

D

Q29
2N7002_SOT23-3

S

GND
GND
GND

0.1U_0402_16V4Z

14
15

2

G

1

2

+3VL

KSO[0..13]31

+3VS+3VL

LID_SW#

Modify circuit to correct the
connection. 4/22

CAP_CLK CAP_DAT

CAP_SENS_INT STB_LED#

ON/OFF# LID_SW#

+3VS

2

2

4

4

6

6

8

8

10

10

12

12

16
17
18

C457

4.7U_0805_10V4Z

1

2

@

R466 0_0402_5%

1 2

C454 10P_0402_25V8K@

1 2

Add R216. 7/7

R216

1 2

100K_0402_5%

D53

PJUSB208_SOT23-6@

1

I/O1

I/O4

2

REF1

REF2

I/O23I/O3

1

I/O1

I/O4

2

REF1

REF2

I/O23I/O3

D54 PJUSB208_SOT23-6@

CAP_RST_ECWL/BT_LED#

6
5
4
6
5
4

HDA_BIT_CLK_MDC 13

+5VS

+5VS

KSI[0..7]31

KSO11
KSO0
KSO2
KSO5
KSI_D_14
KSI_D_8
KSI_D_12
KSI_D_10
KSI_D_0
KSI_D_4
KSI_D_2
KSI_D_1
KSI_D_3
KSO3
KSO8
KSO4
KSO7
KSO6
KSO10
KSO1
KSI_D_5
KSI_D_6
KSI7
KSI_D_13
KSI_D_11
KSI_D_9
KSO9
KSO12
KSO13

Track Point CONN.

+5VS

C461

1

SP_CLK31

2

Power button

ON/OFFBTN_KBC# 31

1 2

21

R470 100K_0402_5%@

ON/OFFBTN# 15

1 2

R758 0_0402_5%

D28

CH751H-40PT_SOD323-2@

Add on 7/21

+3VALW

PWRBTN_OUT# 31

0.1U_0402_16V4Z

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS C ONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE C OMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFOR MATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

KSO[0..13]
KSI[0..7]

JKB1

1
3

3

5
7

9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59

61

G1

63

G3

HRS_FH12HP-30S-1SV 55

CONN@

JTO1

1
3
5
7

9

11

2008/09/15 2009/09/15

221

4

4
665

887
10109
121211
141413
161615
181817
202019
222221
242423
262625
282827
303029
323231
343433
363635
383837
404039
424241
444443
464645
484847
505049
525251
545453
565655
585857
606059

62

G2

64

G4

221
443
665
887

10

G1

G2

12

G3

G4

ACES_87153-08011CONN@

Compal Secret Data

KSO11
KSO0
KSO2
KSO5
KSI_D_14
KSI_D_8
KSI_D_12
KSI_D_10
KSI_D_0
KSI_D_4
KSI_D_2
KSI_D_1
KSI_D_3
KSO3
KSO8
KSO4
KSO7
KSO6
KSO10
KSO1
KSI_D_5
KSI_D_6
KSI7
KSI_D_13
KSI_D_11
KSI_D_9
KSO9
KSO12
KSO13

D20

KSI0

1

CHP202UPT_SOT323-3
D22

KSI1

1

CHP202UPT_SOT323-3
D24

KSI2

1

CHP202UPT_SOT323-3

LEFT
RIGHT

Deciphered Date

KSI_D_0

2

KSI_D_8

3

KSI_D_1

2

KSI_D_9

3

KSI_D_2 KSI_D_5

2

KSI_D_10

3

SP_DATA 31

INT_KBD CONN.

KSO11
KSO0
KSO2
KSO5

KSI_D_0
KSI_D_4
KSI_D_2
KSI_D_1

KSO7
KSO6
KSO10
KSO1

KSO13

KSI3

KSI4

KSI5

KSI6

100P_1206_8P4C_50V8K @

100P_1206_8P4C_50V8K @

100P_1206_8P4C_50V8K@

CP1

2
3
4 5

CP3

2
3
4 5

CP5

2
3
4 5

1 2

C453
100P_0402_50V8J@

D21

2

1

3

CHP202UPT_SOT323-3
D23

2

1

3

CHP202UPT_SOT323-3
D25

2

1

3

CHP202UPT_SOT323-3
D26

2

1

3

CHP202UPT_SOT323-3

81
7
6

81
7
6

81
7
6

KSI_D_3
KSI_D_11

KSI_D_4
KSI_D_12

KSI_D_13

KSI_D_6
KSI_D_14

KSI_D_14
KSI_D_8
KSI_D_12
KSI_D_10

KSI_D_3
KSO3
KSO8
KSO4

KSI_D_5
KSI_D_6
KSI7
KSI_D_13

KSI_D_11
KSI_D_9
KSO9
KSO12

2
3
4 5

100P_1206_8P4C_50V8K @

2
3
4 5

100P_1206_8P4C_50V8K@

2
3
4 5

100P_1206_8P4C_50V8K@

2
3
4 5

100P_1206_8P4C_50V8K@

CP2

CP4

CP6

CP7

Touch Pad CONN.

+5VS

1

C460

0.1U_0402_16V4Z

2

+5VS

TP_DATA31
TP_CLK31

TP_DATA
TP_CLK

Title

Size Document Number Re v

LA-4951P

Date: Sheet

JTP1

7

8

7

8

5

6

5

6

3

4

3

4

2

112

ACES_50611-0040N-001

CONN@

2

3

D27
PACDN042Y3R_SOT23-3@

1

Compal Electronics, Inc.

MDC/KBD/ON_OFF/LID

81
7
6

81
7
6

81
7
6

81
7
6

0.4

of

25 48Tuesday, Jul y 28, 2009

http://hobi-elektronika.net

5

4

3

2

1

BT Connector

JBT1

D D

+5VALW +5VALW +USB_VCCA

(2A,100mils ,Via NO.=4)

U15

1

GND

2

IN

3

IN

SLP_S419,27,35

C C

C464

4.7U_0805_10V4Z

1

2

4

EN#

G548A2P8U_MSOP8

Low Active

8

OUT

7

OUT

6

OUT

5

OC#

R473
10K_0402_5%

1 2

W=100mils

0.1U_0402_16V4Z

150U_B2_6.3VM_R35M

1

1

+

C465

2

2

1000P_0402_50V7K

C466

+USB_VCCA

C467

Change connection

1

from port0. 0204

2

JUSBL1

1

1

USB20_N116
USB20_P116

D31

3
4

2

IO1

IO2

1

GND

PWR

CM1293A-02SR_SOT143-4@

2

2

3

3

4

4

5

GND

6

GND

7

GND

8

GND

SUYIN_020167GR004S568ZRCONN@

USB20_P1USB20_N1

1
2

USB20_P8_R

R471 0_0402_5%

3

USB20_N8_R

4
5

ACES_87212-05G0_5PCONN@

1 2

R472 0_0402_5%

1 2

Add on 11/11.

Q30

S

0.1U_0402_16V4Z

G

12

R474
10K_0402_5%

R475

BT_OFF16

1 2

220K_0402_1%

2

C237

1

2

+3VAUX_BT

D

13

AP2301GN 1P_SOT23

Add on 11/15.

+3VAUX_BT

12

R500

470_0402_5%@

13

D

Q42

2

2N7002_SOT23-3@

G

S

USB20_P8 16
USB20_N8 16
BT_LED 30

+3VAUX_BT+3VALW

C468 0.1U_0402_16V4Z

1

2

C469 10U_0805_10V4Z

1

2

ACCELEROMETER

+3VS_ACL

B B

+3VS_ACL_IO

+3VS_ACL

+3VS_ACL

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC . AND CONTAINS CONFIDEN TIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE C OMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFOR MATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOU T PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2008/09/15 2009/09/15

+3VS +3VS_ACL

D30
CH751H-40PT_SOD323-2

2 1

ACCEL_INT#16

SMB_DATA_S34,9,10,12,14

SMB_CLK_S34,9,10,12,14

R479 10K_0402_5%

12

Must be placed in the center of the system.

L

Compal Secret Data

Deciphered Date

2

U17

LIS302DL

1

VDD_IO

6

VDD

8

INT 1
INT 29GND

12

SDO

13

SDA / SDI / SDO

14

SCL / SPC

7

CS

HP302DLTR8_LGA14_3X5

GND
GND
GND

RSVD
RSVD

+3VS_ACL_IO

R478
0_0603_5%

1 2

2
4
5
10

3
11

Title

USB & BT Connector & Acclerometer

Size Document Number Re v

Date: Sheet

0.1U_0402_16V4Z

10U_0805_6.3V6M

C474

C475

1

1

2

2

+3VS_ACL

Compal Electronics, Inc.

LA-4951P

1

0.4

of

26 48Tuesday, July 28, 2009

http://hobi-elektronika.net

5

+3VS

C617 0.1U_0402_16V4Z

2

2

1

1

D D

C C

C622 0.01U_0402_16V7K

2

2

2

2

1

1

1

1

CLK_PCIE_USB30_PCH14
CLK_PCIE_USB30_PCH#14

PCIE_PRX_DTX_P814
PCIE_PRX_DTX_N814

PCIE_PTX_C_DRX_P814
PCIE_PTX_C_DRX_N814

+3VS

C638 0.1U_0402_16V4Z
C639 0.1U_0402_16V4Z

PLT_RST#4,13,16,21,22,24,28,30

PCIE_WAKE#15,24,30

PCH_XDP_GPIO013,16

R691 10K_0402_5%

D40 1SS355_SOD323-2

1 2

C621 0.01U_0402_16V7K

C619 0.01U_0402_16V7K

C620 0.01U_0402_16V7K

C618 0.01U_0402_16V7K

C625 0.01U_0402_16V7K

C624 0.01U_0402_16V7K

C623 0.01U_0402_16V7K

2

2

2

1

1

1

12
12

R321 0_0402_5%@

R688 100K_0402_1%

PSEL

R310 0_0402_5%

Add on 7/7.

12

Change to use 48MHz from DB2. 3/3

R693 100_0402_5%

X2

1 2

R369

0_0402_5%

B B

24MHZ_20PF_1BX24000BK1A~D@

2

C644

1 2

12P_0402_50V8J@

1

2

C645

12P_0402_50V8J@

1

Install. 3/3

CLK_48M_USB3_PCH14

Add on 11/24.

CLKREQ#_USB30

D

S

PSEL

1 3

Q25
2N7002_SOT23-3@

G

2

+3VS

+3VS

R700
10K_0402_5%

1 2

R918 10K_0402_5%@

1 2

5

PEG_B_CLKREQ#14

A A

C627 0.01U_0402_16V7K

C626 0.01U_0402_16V7K

2

2

1

1

1 2

1 2
1 2

12

C643

12

@

+3VS

12

C629 0.1U_0402_16V4Z

C630 0.1U_0402_16V4Z

C628 0.01U_0402_16V7K

2

2

2

1

1

1

PCIE_PRX_DTX_C_P8
PCIE_PRX_DTX_C_N8

CLKREQ#_USB30

SPISCK
SPICSB
SPISI
SPISO

1U_0805_25V6K

USB3XI
USB3XO

R371

1 2

1 2

0_0402_5%

0_0402_5%

+3VS

R699
10K_0402_5%

C631 0.1U_0402_16V4Z

2

1

R536

1 2

0_0402_5%

@

K13
K14

C14

N14

M14

R537

A11
A13
A14

B11
B13
B14

C10
C11

4

+1.05VS+1.05VSR

+3VS

D10

F13

F14

VDD33

VDD33

B2

PECLKP

B1

PECLKN

D2

PETXP

D1

PETXN

F2

PERXP

F1

PERXN

H2

PERSTB

K1

PEWAKEB

K2

PECREQB

J2

AUXDET

J1

PSEL

H1

SMIB

P5

PONRSTB

M2

SPISCK

N2

SPISCB

N1

SPISI

M1

SPISO

GND
GND

J13

GND

P4

GND

GND

Layout note:

keep the R369 & R371 as close to the traces of USB3XI

XT1

& USB3XO to keep the stub length at the minimum.

XT2

P6

CSEL=0 : 24MHz XTAL; CSEL=1: 48MHz Clock

CSEL

A1

GND

A2

GND

A3

GND

A4

GND

A5

GND

A7

GND

A9

GND
GND
GND
GND

B3

GND

B4

GND

B5

GND

B7

GND

B9

GND
GND
GND
GND

C1

GND

C2

GND

C3

GND
GND
GND

GND

GND

C12

C13

+3VS

R696

47K_0402_5%

SPICSB
SPISO

4

L10

L13

VDD33

VDD33F3VDD33G3VDD33G4VDD33L9VDD33

Layout note:

1. +3VS --> 100mA

2. +1.05VS --> 700mA

GNDD3GNDD4GND

GND

GND

GND

GNDE1GNDE2GND

E13

D11

E14

D12

D13

D14

12

12

R697
10K_0402_5%

AT25F512AN-10SU-2.7_SO8~D

R428

0_0603_5%

1 2

L14

VDD33

VDD33

VDD33N4VDD33N5VDD33N6VDD33P3VDD10C4VDD10C5VDD10C6VDD10C7VDD10D5VDD10C8VDD10C9VDD10D8VDD10D9VDD10E3VDD10E4VDD10

GND

GNDF4GNDF6GNDF7GNDF8GNDF9GND

1
2
3
4

U40

CS#
SO
WP#
GND

GNDG1GNDG2GNDG6GNDG7GNDG8GND

GND

F11

F12

VCC

HOLD#

SCK

SI

0.1U_0402_16V4Z

GND

GND

G9

G11

8
7
6
5

C651

+1.05VSR

G13

G12

GNDH6GND

2

1

GNDH7GNDH8GNDH9GND

SPISCK
SPISI

3

Del D57~D60, but change D55. 5/14

Change power rail to 3.3V.

+3VS

+3VA

E11

E12

H11

K11

K12

L8

D7

P13

U41

VDD10

U3TXDP2
U3TXDN2

U3RXDP2

U3RXDN2

U3TXDP1
U3TXDN1

U3RXDP1

U3RXDN1

U2AVSS
U2PVSS
U3AVSS

L4

U3AVDO33

U2DM2

U2DP2

OCI2B
OCI1B

PPON2
PPON1

U2DM1

U2DP1

RREF

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

U2AVDD10

UPD720200F1-XXX-A_FBGA176

B6
A6

N8
P8

B8
A8

G14
H13

H14
J14

B10
A10

N10
P10

B12
A12

P12
N12

N11
D6

P14
P11
P9
P7
P2
P1
N13
N9
N7
N3
M13
M12
M11
M10
M9
M8
M7
M6
M5
M4
M3
L12
L11
L7
L6

GNDJ3GNDJ4GNDJ6GNDJ7GNDJ8GNDJ9GND

H12

VDD10

VDD10H3VDD10H4VDD10L5VDD10

J11

J12

VDD10

VDD10

GND

GNDK3GNDK4GNDL1GNDL2GNDL3GND

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET N OR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTR ONICS, INC.

3

L13

10UH_LB2012T100MR_20%_0805

1 2

U3TX_C_DP2
U3TX_C_DN2

U2DN2
U2DP2

U3RXDP2
U3RXDN2

OCI2B
OCI1B

PPON2
PPON1

U3TX_C_DP1
U3TX_C_DN1

U2DN1
U2DP1

U3RXDP1
U3RXDN1

R692 1.6K_0603_1%

1 2

2008/09/15 2009/09/15

+3VA

2

C652

1

10U_0805_10V4Z

C637 0.1U_0402_16V4Z
C640 0.1U_0402_16V4Z

R689 10K_0402_5%

1 2

R690 10K_0402_5%

1 2

Del R226, R227, R458, R459. 5/11

C641 0.1U_0402_16V4Z
C642 0.1U_0402_16V4Z

SLP_S419 ,26,35

Compal Secret Data

Deciphered Date

2

U3TXDP2
U3TXDN2
U3RXDP2
U3RXDN2

U2DN2
U2DP2

12
12

12
12

+5VALW +5VALW

SLP_S4

C470

4.7U_0805_10V4Z

+5VALW +5VALW

SLP_S4

C657

4.7U_0805_10V4Z

2

D55

1
2
4
5
3

8

RCLAMP0524P.TCT~D@
D56

3
2

PJDLC05_SOT23-3@

U3TXDP1
U3TXDN1

1

+USB3_VCCA

+3VS

+USB3_VCCB

10
9
7
6

9
1
8
2
7
3
6
4
5

Add D57 for USB2.0. 5/16

U2DN1

3

U2DP1

2

(2A,100mils ,Via NO.=4)

U16

1

GND

2

IN

3

IN

4

1

2

EN#

G548A2P8U_MSOP8

Low Active

(2A,100mils ,Via NO.=4)

U42

1

GND

2

IN

3

IN

4

1

2

EN#

G548A2P8U_MSOP8

Low Active

U3TXDP2
U3TXDN2
U3RXDP2
U3RXDN2

JUSB3A

SSTX+
VBUS
SSTX­D­GND
D+
SSRX+
GND
SSRX-

D57

PJDLC05_SOT23-3@

OUT
OUT
OUT
OC#

OUT
OUT
OUT
OC#

Close to U41.D7 Close to U41.P13

C632 0.1U_0402_16V4Z

2

1

JUSB3B

U3TXDP2

9
1

U3TXDN2

8
2
7
3
6
4
5

Correct
JUSB3A/B. 05/11

R220 0_0603_5%

10

GND

11

GND

12

GND

13

GND

TYCO_1932260-1CONN@

1

8
7
6
5

8
7
6
5

Title

Size Document Number Re v

Custom

LA-4951P

Date: Sheet

1

+3VA+3VA

C633 0.01U_0402_16V7K

1

2

SSTX+
VBUS
SSTX­D­GND
D+
SSRX+
GND
SSRX-

TYCO_1932260-1CONN@

1 2

C437 0.1U_0402_16V4Z@

R477
10K_0402_5%

1 2

150U_B2_6.3VM_R35M

+

R723
10K_0402_5%

1 2

150U_B2_6.3VM_R35M

+

C634 5P_0402_50V8C

GND
GND
GND
GND

12

U3TXDP1
U3TXDN1
U3RXDP1
U3RXDN1

1

C471

2

1

C406

2

2

1

W=100mils

W=100mils

C635 0.1U_0402_16V4Z

2

1

R221 0_0603_5%

10

1 2
11
12
13

C438 0.1U_0402_16V4Z@

Reserve D58 for
USB3.0. 7/15

D58

1
2
4
5
3

8

RCLAMP0524P.TCT~D@

+USB3_VCCA

10U_0805_10V4Z

0.1U_0402_16V4Z

C407

10U_0805_10V4Z

C658

1

2

0.1U_0402_16V4Z

1

2

C472

+USB3_VCCB

C659

1

2

1

2

C636 0.01U_0402_16V7K

1

2

12

10
9
7
6

1000P_0402_50V7K

1

2

1000P_0402_50V7K

1

2

Compal Electronics, Inc.

USB3.0 Connectors

1

27 48Tuesday, July 28, 2009

C650 5P_0402_50V8C

2

1

U3TXDP1
U3TXDN1
U3RXDP1
U3RXDN1

C473

C660

of

0.4

http://hobi-elektronika.net

5

SL B 96 35 T T 1. 2

Finger printer

+3VALW

Add on 11/11.

D D

R483
10K_0402_5%

1 2

R488
220K_0402_1%

FPR_OFF16

C C

1 2

Q31
AP2301GN 1P_SOT23

S

0.1U_0402_16V4Z

G

C238

1

2

Add on 11/15.

+USB20_N1_PWR

2

G

+USB20_N1_PW R

D

13

C483 10U_0805_10V4Z

C482 0.1U_0402_16V4Z

1

R509

1

2

2

470_0402_5%@

Q65

2N7002_SOT23-3@

2

12

13

D

S

4

3

TPM1.2 on board

C476 22P_0402_50V8J

1 2

JFP1

2

USB20_N1016
USB20_P1016

USB20_N10 PLT_RST#

+5VALW

USB20_N10
USB20_P10

D32

3

IO2

4

GND

PWR

CM1293A-02SR_SOT143-4

112

3

4

3

4

5

6

5

6

7

8

7

8

ACES_50611-0040N-001CONN@

USB20_P10

2

IO1

1

Change net name. 11/30

Y6

2

IN

NC

3

OUT

NC

32.768KHZ 1 T JS125D J4A420P

C481 22P_0402_50V8J

1 2

+3VS

R481 10K_0402_5%@

C484

12

R484

4.7K_0402_5%@

Have internal PD,
del R489. 11/30

SUS_STAT#15,32,33

10P_0402_50V8K@

SUS_STAT#

1
4

1 2

TPM_XTALI

12

R480
10M_0402_5%

TPM_XTALO

Change R481 to no
install. 11/30

1 2

R485 10_0402_5%@

1 2

PM_CLKRUN#15,31,32,33

SIRQ
CLK_PCI_TPM_PCH

2

C477

1

2

LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
LPC_LFRAME#

SUS_STAT#

TPM_XTALO
TPM_XTALI

0.1U_0402_16V4Z

C478

1

2

26
23
20
17
22
16
28
27
21

15

14
13

0.1U_0402_16V4Z

U18

LAD0
LAD1
LAD2
LAD3
LFRAME#
LRESET#
LPCPD#
SERIRQ
LCLK

CLKRUN#

7

PP

XTALO
XTALI/32K IN

+3VS

C479

0.1U_0402_16V4Z

1

2

10

19

24

VDD

VDD

5mA

TESTB1/BADD

GND

GND

11

18

25

+3VALW

C480

0.1U_0402_16V4Z

1

2

5

VSB

VDD

25mA

6

GPIO

2

GPIO2

Base I/O Address
0 = 02Eh
1 = 04Eh*

8

TEST1

9

3

NC

12

NC

1

NC

GND

GND

SLB 9635 TT 1.2_TSSOP28

4

TPM_GPIO
TPM_GPIO2

R486 0_0402_5%

1 2

1

+3VS+3VS

T76PAD
T77PAD

12

R482

4.7K_0402_5%

12

R487

4.7K_0402_5%@

Removed R490 connect to U3. 10/27

CLK_PCI_TPM_PCH16

CLK_PCI_TPM_PCH

BIOS ROM(8MB)

0.1U_0402_16V4Z

20mils

R493 3.3K_0402_5%

+3VL
SPI_CS0#31
SPI_CLK31

B B

SPI_SI31

+3VL

Reserve for 8M rom not ready 12/02.

1 2

R6 100K_0402_5%@

1 2

Add R6. 4/23

+3VL

SPI_HOLD#_1 SPI_CLK

SPI_CS0#

+3VL

1

C485

20mils

2

SPI_WP#
SPI_HOLD#_1
SPI_CS0#
SPI_CLK

SPI ROM Socket

U34

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

WIESO_G6179-07000002-00

Colay 16 pins SPI ROM

WIESO_G6179-100000_8P

16

16

15

15

14

14

13

13

12

12

11

11

10

10

9

9

SPI ROM Socket

U19

8

VCC

VSS

3

W

7

HOLD

1

S

6

C

5

Q

D

SPI_SI

SPI_WP#SPI_SO_R

SPI_CLK

R145 0_0402_5%

1 2

Install on DB2.

4

&U1

EMI request close to
U19/34. 12/11

SPI ROM

45@

SST25VF032B-66_SO8

R494
33_0402_5%

SPI_SO_RSPI_SI

2

1 2

SPI_SO 31

&U2

SPI ROM

45@

SST25VF032B-66_SO8

C705

12

@

47P_0402_50V8J

Add & Change. 11/11

PCI_SERR#16,31,32

8051_RECOVER#31
DEBUG_KBCRST39

8051_RECOVER#

+3VL

12

R492

100K_0402_5%

CLK_PCI_DB_PCH16

LPC_LFRAME#13,24,31,33

SPI_CS1#31

Modify. 12/05

SIRQ13,31,32,33

PLT_RST#4,13,16,21,22,24,27,30
LPC_LAD013,24,31,33

LPC_LAD113,24,31,33
LPC_LAD213,24,31,33
LPC_LAD313,24,31,33

8051TX31
8051RX31

LPC Debug Port

Change from B+.
1209

Vin_Debug

SIRQ

SPI_CLK_JP
SPI_CS0#_JP
SPI_SI_JP
SPI_SO_JP
SPI_HOLD#_0

Connect pin3 &

23. 11/11

JDBG1

1

GND

2

LPC_PCI_CLK

3

GND

4

LPC_FRAME#

5

+3VS

6

LPC_RESET#

7

+3VS

8

LPC_AD0

9

LPC_AD1

10

LPC_AD2

11

LPC_AD3

12

VCC_3VA

13

PWR_LED#

14

CAPS_LED#

15

NUM_LED#

16

VCC1_PWRGD

17

SPI_CLK

18

SPI_CS#

19

SPI_SI

20

SPI_SO

21

SPI_HOLD#

22

RSV

23

RSV

24

RSV

25

GND

26

GND

ACES_50238-02471-001CONN@

Removed R500, R501 connect to U3. 10/27

A A

SPI_CS0# SPI_CS0#_JP
SPI_SO_R SPI_SO_JP

R497 0_0402_5%

1 2

R498 0_0402_5%

1 2

R499 0_0402_5%

1 2

R502 0_0402_5%

1 2

R503 0_0402_5%

1 2

5

SPI_HOLD#_0SPI_HOLD#_1
SPI_CLK_JPSPI_CLK
SPI_SI_JPSPI_SI

R495 3.3K_0402_5%

+3VL

20mils

1 2

4

SPI_WP#

R496 0_0402_5%@

1 2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC . AND CONTAINS CONFIDEN TIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE C OMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFOR MATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOU T PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2008/09/15 2009/09/15

Compal Secret Data

Deciphered Date

2

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

TCG/BIOS ROM/PS2/SW LPC DEBUG

LA-4951P

1

of

28 48Tuesday, July 28, 2009

0.4

http://hobi-elektronika.net

VIN

L1

1 2

HCB2012KF-121T50_0805

L18

1 2

HCB2012KF-121T50_0805

EMI request. 11/24

VA

DPB_TXP021
DPB_TXN021

DPB_TXP121
DPB_TXN121

DPB_TXP221
DPB_TXN221

DPB_TXP321
DPB_TXN321

DPB_AUX21

DPB_AUX#21

DOCKING CONNECTOR (190 pins)

DOCK_RED

VA

12A

C490

0.1U_0603_50V4Z

C489

0.1U_0603_50V4Z

1

1

2

MDO3+23

MDO3-23

2

MDO2+23

MDO2-23

DETECT

+5VS

Add. 0224

2

3

D42

PJSOT24C_SOT23@

1

Remove C512, C513, C514, C515, R117 & R118, they will
place at dock side. 11/30

Remove C496 ~ C511, because put
them to docking side. 2/17

190

188
187
186
185
184
183
182

181
180
179
178
177
176
175
174
173
172
171
170
169
168
167
166
165
164
163
162
161
160
159
158
157
156
155
154
153
152
151
150
149
148
147
146
145
144

JDOCK1A

P1

188
187
186
185
184
183
182

181
180
179
178
177
176
175
174
173
172
171
170
169
168
167
166
165
164
163
162
161
160
159
158
157
156
155
154
153
152
151
150
149
148
147
146
145
144

FOX_QL0094L-D26601-8HCONN@

189

G1

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

13

14

14

15

15

16

16

17

17

18

18

19

19

20

20

21

21

22

22

23

23

24

24

25

25

26

26

27

27

28

28

29

29

30

30

31

31

32

32

33

33

34

34

35

35

36

36

37

37

38

38

39

39

40

40

41

41

42

42

43

43

44

44

45

45

MDO1+ 23
MDO1- 23

MDO0+ 23
MDO0- 23

LED_LINK_LAN_DOCK# 23
LAN_ACT# 22,23

+5VS

Add. 0224

USB20_N11 16
USB20_P11 16

C492

Correct to swap them. 4/23

Change. 0223

10U_0805_10V4Z

C493

0.1U_0402_16V4Z

1

1

2

2

DPC_TXP0 21
DPC_TXN0 21

DPC_TXP1 21
DPC_TXN1 21

DPC_TXP2 21
DPC_TXN2 21

DPC_TXP3 21
DPC_TXN3 21

DPC_AUX 21
DPC_AUX# 21

Add. 4/25

STB_LED#25,30

(2) PS/2 Interfaces
(2) USB 2.channels
(2) SATA Channels
(2) Display Port Channels
(1) Serial Port
(1) Parallel Port
(1) Line In
(1) Line Out
(1) RJ45 (10/100/1000)
(1) VGA
(1) 2 LAN indicator LED's
(1) Power Button
(1) I2C interface

+5VS

C494

0.1U_0402_16V4Z

C495

0.1U_0402_16V4Z

1

1

2

2

+5VALW

1 2

13

D

2

G

S

SATA_PTX_C_DRX_P513
SATA_PTX_C_DRX_N513

SATA_PRX_DTX_P513

SATA_PRX_DTX_N513

SATA_PTX_C_DRX_P213
SATA_PTX_C_DRX_N213

SATA_PRX_DTX_P213

SATA_PRX_DTX_N213

R67
10K_0402_5%

STB_LED#_R

Q71
2N7002_SOT23-3

ADP_SIGNAL

USB20_N1316
USB20_P1316

R520 150_0402_1%@

DOCK_GRN

R521 150_0402_1%@

DOCK_BLU

R522 150_0402_1%@

DPB_HPD21

SLP_S5#15

DPB_AUX

R736 0_0402_5%

DPB_AUX#

R737 0_0402_5%

Add on 12/10.

LPTSTB#33
LPTAFD#33
LPTERR#33
LPTACK#33
LPTBUSY33

LPTSLCT33

LPTSLCTIN#33

LPTINIT#33

SATA_LED#13,30

DOCK_ID23

ISO_PREP#16

Remove R514~R517.

SATA port4 chage to port5.
SATA port3 chage to port2. 2/10

Place close to R506 ~ R508. 11/11

DOCK_RED

12
12
12

T84 PAD
T87 PAD

R504 1K_0402_5%

1 2
1 2

LPTPE33

LPD733
LPD633
LPD533
LPD433
LPD333
LPD233
LPD133
LPD033

DCAD

12

DPB_DDC2CLK
DPB_DDC2DATA

STB_LED#_R

DOCK_ID

2/26

DOCK_GRN
DOCK_BLU

C516 0.1U_0402_10V6K@
C517 0.1U_0402_10V6K@
C518 0.1U_0402_10V6K@

JDOCK1B

143

143

142

142

141

141

140

140

139

139

138

138

137

137

136

136

135

135

134

134

133

133

132

132

131

131

130

130

129

129

128

128

127

127

126

126

125

125

124

124

123

123

122

122

121

121

120

120

119

119

118

118

117

117

116

116

115

115

114

114

113

113

112

112

111

111

110

110

109

109

108

108

107

107

106

106

105

105

104

104

103

103

102

102

101

101

100

100

99

99

98

98

97

97

96

96

95

95

192

G2

194

G4

196

G6

198

G8

200

G10

FOX_QL0094L-D26601-8HCONN@

1 2
1 2
1 2

DCAD2

46

46

47

47

48

48

49

49

50

50

DPC_DDC6CLK

51

51

DPC_DDC6DATA

52

52

53

53

54

54

55

55

56

56

57

57

58

58

59

59

60

60

61

61

62

62

R_DOCK_RED

63

63

64

64

R_DOCK_GRN

65

65

R_DOCK_BLU

66

66

67

67

68

68

69

69

70

70

71

71

72

72

73

73

74

74

75

75

76

76

77

77

78

78

79

79

80

80

81

81

82

82

83

83

84

84

85

85

86

86

87

87

88

88

89

89

90

90

91

91

92

92

93

93
94

G1
G3
G5
G7
G9

DETECT

94

191
193
195
197
199

R_DOCK_RED
R_DOCK_GRN
R_DOCK_BLU

R738 0_0402_5%

1 2

R739 0_0402_5%

1 2

Add on 12/10.

R506 0_0402_5%

1 2

R507 0_0402_5%

1 2

R508 0_0402_5%

1 2

T111PAD

C486 0.1U_0402_16V4Z@

1 2

C487 0.1U_0402_16V4Z@

1 2

C488 0.1U_0402_16V4Z@

1 2

T85PAD
T88PAD

DPC_HPD 21

ON/OFF# 25

D_DDCDATA 19

D_DDCCLK 19

D_VSYNC 19
D_HSYNC 19

DCD#1 33
RI#1 33
DTR#1 33

CTS#1 33
RTS#1 33

DSR#1 33

TXD1 33

RXD1 33

DockID0 16
DockID1 16

KBD_DATA 31
KBD_CLK 31
PS2_DATA 31
PS2_CLK 31
LINE_IN_SENSE 30

LINE_OUT_SENSE 30

DOCK_LINE_IN_L 30
DOCK_LINE_IN_R 30

DLINE_OUT_L 30
DLINE_OUT_R 30

DPC_AUX
DPC_AUX#

DOCK_RED
DOCK_GRN

DOCK_BLU

Change to GND. 12/04

Disconnect SER_SHD. 4/25

1K_0402_5%

Change net name from DOCK_HPS#. 11/11

R505

0.1U_0402_16V4Z

C491

12

1

2

RGB Q-Switch

ON

OFF

NO<-->COM

OFF

ON

IN

NC<-->COM

L

H

http://hobi-elektronika.net

U20

VGA_RED19 VGA_GRN19

DOCK_RED

1

NO

2

GND

NC3COM

TS5A3157_SC70-6

DOCK_ID DOCK_ID DOCK_ID

6

IN

VCC

+3VS +3VS +3VS

C519 0.1U_04 02_16V4Z

5

4

12

U21

1

2

DOCK_GRN

TS5A3157_SC70-6

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PR OPERTY OF COMPAL ELECTRONICS, INC . AND CONTAINS CONFIDEN TIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE C OMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFOR MATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOU T PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

NO

GND

NC3COM

Issued Date

6

IN

VCC

5

4

C520 0.1U_0402_16V4Z

12

GREEN_R 19

2008/09/15 2009/09/15

VGA_BLU19

DOCK_BLU

Compal Secret Data

Deciphered Date

U22

1

NO

2

GND

VCC

NC3COM

TS5A3157_SC70-6

6

IN

C521 0.1U_0402_16V4Z

5

4

Custom

12

BLUE_R 19RED_R 19

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

DOCK CONN

LA-4951P

29 48Tuesday, July 28, 2009

of

0.4

5

4

3

2

1

Audio/Express/LEDs/Card Read Connector

JEXP1

DOCK_LINE_IN_L29

DOCK_LINE_IN_R29 DLINE_OUT_R 29

LINE_IN_SENSE29 LINE_OUT_SENSE 29

HDA_SDIN013

HDA_SDOUT_CODEC13

HDA_RST#_CODEC13

D D

C C

HDA_SYNC_CODEC13

HDA_BIT_CLK_CODEC13

Add 1 pin for +1.5VS. 4/29

CLK_PCIE_EXP_PCH#14
CLK_PCIE_EXP_PCH14

SD_MMC_MS_XDC_D032
SD_MMC_MS_XDC_D132
SD_MMC_MS_XDC_D232
SD_MMC_MS_XDC_D332

USB_OC#713,16

+3VL
+3VALW
+3VALW

+5VS

+3VS

+3VS

+1.5VS

PCIE_WAKE#15,24,27

PLT_RST#4,13,16,21,22,24,27,28

SLP_S3#15,31,34,35,38,40,41

MMC_XDC_D432
MMC_XDC_D532
MMC_XDC_D632
MMC_XDC_D732

XDCLE32
XDALE32

R759 0_0402_5%

1 2

PLT_RST#
CPPE#

11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69

ACES_50026-07071-001

CONN@

CPPE#

Change CLKREQ_EXP# to CPPE# and connect to GPIO14. 7/21

B B

PLT_RST#

2

112

4

334

6

556

8

778

10

9910

121211

14

13

14

16

15

16

18

17

18

20

19

20

22

21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
G171G2

22

24

24

26

26

28

28

30

30

32

32

34

34

36

36

38

38

40

40

42

42

44

44

46

46

48

48

50

50

52

52

54

54

56

56

58

58

60

60

62

62

64

64

66

66

68

68

70

70

72

STB_LED#
WL/BT_LED#

+5VALW

Add for debuging. 3/3

D50

LTST-S110TBKT-5A

2 1
12

R354
1K_0402_5%

DLINE_OUT_L 29

A_SD# 31
MUTE_LED_CNTL 31

HDA_SPKR 13
AMBER_BATLED# 31
AQUAWHITE_BATLED# 31
SATA_LED# 13,29
HDD_HALTLED 13
STB_LED# 25,29
WL/BT_LED# 25

PCIE_PTX_C_DRX_N2 14
PCIE_PTX_C_DRX_P2 14

PCIE_PRX_DTX_N2 14

PCIE_PRX_DTX_P2 14

USB20_N4 16

USB20_P4 16
SDCD#_MMCCD#_XDCD0# 32

MS_XDC1D# 32
XDCE# 32
SDWP#_XDR/B# 32
SDPWR0_MMC_MS_XDPWR 32
SDPWR1_XDWP# 32
SD_MMCCMD_MSBS_XDWE# 32
SD_MMC_MSCLK_XDRE# 32

Add on 7/21.

+3VL +3VALW +5VS +3VS +1.5VS

1

1

C523

C524

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

Change net name from DOCK_HPS#. 11/11

Change net name from A_SD. 5/04

Change net name from EAPD. 5/04

Power Button Connector

Removed Power button JPB1 & C522, combin with
JSWITCH1. 11/10

Change R734 & R735 to NI. 02/06

+3VS

R735

R734

1 2

AQUAWHITE_BATLED#

1

1

1

C525

2

C527

C526

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

+3VS

Q32

DTA114YKAT146_SOT23-3@

R456 0_0402_5%

WL_LED#24

1 2

WL/BT_LED#

Add on 5/11.

Q33

DTA114YKAT146_SOT23-3@

R458 0_0402_5%

WW_LED#24

1 2

WL/BT_LED#

47K

10K

2

HF

1 3

13

HF

2

10K

47K

10K_0402_5%@

1 2

330K_0402_5%

@

13

D

Q66

2

2N7002_SOT23-3

G

S

2N7002DW-T/R7_SOT363-6

BT_LED26

WL_LED

BT_LED

R524 100K_0402_5%

WL_LED

R525 100K_0402_5%

AQUAWHITE_BATLED 13

BT_LED

1 2

1 2

Q9A

+3VS

12

R523
47K_0402_5%

WL/BT_LED#

61

2

3

Q9B
2N7002DW-T/R7_SOT363-6

5

4

+3VS

A A

http://hobi-elektronika.net

5

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

4

MAY BE USED BY OR DIS CLOSE D TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2008/09/01 2010/09/01

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Custom

2

Date: Sheet

Compal Electronics, Inc.

CR&LEDS&PW&Audio&Exp Conn

LA-4951P

1

of

30 48Tuesday, July 28, 2009

0.4

C535 33P_0402_50V8J

1

1

Y7

IN

2

2

Remove R587 PD. 4/25

+3VL

1 8
2 7
3 6
4 5

10K_0804_8P4R_5%

1 8
2 7
3 6
4 5

10K_0804_8P4R_5%

+5VS

1 8
2 7
3 6
4 5

10K_0804_8P4R_5%

1 8
2 7
3 6
4 5

10K_0804_8P4R_5%

4

OUT

NC3NC

32.768KHZ 1TJS125DJ4A420P

+RTCVCC

12

R584
0_0402_5%

C537

1U_0603_10V4Z

1

2

RP21

RP22

RP24

RP25

C536 33P_0402_50V8J

1

2

KSI0
KSI1

KSI1 & 3 swap. 11/20

KSI2
KSI3

KSI7
KSI6
KSI5
KSI4

TP_CLK
TP_DATA
KBD_CLK
KBD_DATA

SP_CLK
SP_DATA
PS2_CLK
PS2_DATA

BAT_ALARM37

KBC_SPI_CLK_R13

SPI_CLK28

MC2_DISABLE24

KBC_SPI_C S1#_R13

SPI_CS1#28

MC1_DISABLE24

PMC38

OCP_A_IN44

C538

0.1U_0402_16V4Z

1

2

KBC_SPI_SI_R13

SPI_CS0#28

KBC_SPI_CS0#_R13

KBC_SPI_SO13

KSO[0..13]25

KSI[0..7]25

TP_CLK25
TP_DATA25
SP_CLK25
SP_DATA25
PS2_CLK29

PS2_DATA29

Removed R548, R549 connect
to U3. 10/27

PM_CLKRUN#15,28,32,33

CLK_PCI_KBC_PCH16

RUNSCI_EC#16

LPC_LAD313,24,28,33
LPC_LAD213,24,28,33
LPC_LAD113,24,28,33
LPC_LAD013,24,28,33

LPC_LFRAME#13,24,28,33

NPCI_RST#16,33

EMI: 12/11
Add R144.

R144 0_0402_5%

1 2

R139 300_0402_5%

1 2

R149 300_0402_5%

1 2

Add. 5/04

+VCC0

SPI_SI28

SPI_SO28

KSO[0..13]

SIRQ13,28,32,33

KSI[0..7]

+VCC0

KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13

KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7

TP_CLK
TP_DATA
SP_CLK
SP_DATA
PS2_CLK
PS2_DATA

RUNSCI_EC#

CRY1
CRY2

2

2

C3892200P_0402_50V7K

C3932200P_0402_50V7K

1

1

A_GND

C529

0.1U_0402_16V4Z

C528

0.1U_0402_16V4Z

1

1

2

128
127

97
96
95
94

21
20
19
18
17
16
13
12
10

9
8
7
6
5

29
28
27
26
25
24
23
22

35
36
61
62
66
67

55
57
54
76

51
50
48
46

52
53

70
71

68

1
2

3
30
31
32
33
34
43
44

1

2

2

U23

FLDATAOUT
HSTDATAOUT/GPIO45
FLCS0#
HSTCS0#/GPIO44
FLDATAIN
HSTDATAIN/GPIO43

KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12/GPIO00/KBRST
KSO13/GPIO18

KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7

IMCLK
IMDAT
KCLK
KDAT
EMCLK
EMDAT

CLKRUN#
SER_IRQ
PCI_CLK
EC_SCI#

LAD[3]
LAD[2]
LAD[1]
LAD[0]

LFRAME#
LRESET#

XTAL1
XTAL2

VCC0
Alarm [CKT#2]/GPIO36

HSTCLK/GPIO41
FLCLK
GPIO39
HSTCS1#/GPIO42
FLCS1#
GPIO38
GPIO37
ADC1/GPIO46
ADC_TO_PWM_IN

KBC1098-NU_TQFP128_14X14

+3VL

C531

0.1U_0402_16V4Z

C532

C530

0.1U_0402_16V4Z

4.7U_0805_10V4Z

1

1

2

2

Keyboard/Mouse Interface

Power Mgmt/SIRQ

LPC
Bus

AGND

VSS11VSS37VSS47VSS56VSS

72

+3VS

R527
0_0402_5%

1 2

1

14

106

VCC1

VCC139VCC158VCC184VCC1

SMSC_1098-NU_TQFP-128P

2

119

49

VCC1

VCC2

ADP_PRES[CKT#2]/GPIO27/WK_SE05

General Purpose I/O Interface

Access Bus Interface

32KHZ_OUT/GPIO22/WK_SE01

ADC_TO_PWM_OUT/GPIO19

Miscellaneous

AVSS

VSS82VSS

45

Add. 5/04

104

117

A_GND

R137
0_0402_5%

1 2

0.1U_0402_16V4Z
C533

CFETA/OUT7/nSMI

GPIO11/AB2A_DATA

GPIO12/AB2A_CLK

GPIO13/AB2B_DATA

GPIO14/AB2B_CLK
GPIO15/FAN_TACH1
GPIO16/FAN_TACH2

RESET_OUT#/GPIO06

PWR_LED#/8051TX

FDD_LED#/8051RX

AC[CKT#2]/GPIO23

GPIO28
GPIO29
GPIO30
GPIO31
GPIO32

OUT0/(SCI)

OUT1/IRQ8#

OUT8/KBRST

OUT9/PWM2

OUT10/PWM0

PWM_CHRGCTL

GPIO01
GPIO02

GPIO03
GPIO04/KSO14
GPIO05/KSO15

GPIO07/PWM3

GPIO08/RXD
GPIO09/TXD

GPIO17/A20M

GPIO20/PS2CLK
GPIO21/PS2DAT

GPIO24/KSO16

AB1A_DATA

AB1A_CLK

AB1B_DATA

AB1B_CLK

GPIO25
GPIO26/KSO17

NC_CLOCKI

PWRGD

VCC1_RST#

TEST PIN

CFETB/GPIO10

BAT_LED#

ADC2/GPIO40

Q/GPIO33

GPIO34

GPIO35

AVCC

Q10A

KSI3

R526 0_0402_5%@

1 2

KSI2

R528 0_0402_5%

1 2

KSI1

R529 0_0402_5%

1 2

KSI0

R530 0_0402_5%@

1 2

C534 4.7U_0805_10V4Z

15

CAP

93
98
99
100
126

124
125

123
122
121
120
118

107
79
80
81
83

85
86
87

88
89
90
91
92
101
102

103
105
4
74

111
112

109
110

73
108

59
75
60
78
77
38

69

116
113
115
114

41
42
65
64
63
40

1 2

KBC_PWR_ON
AQUAWHITE_BATLED#

FET_A
KBRST#

T89 PAD

PM_RSMRST#
CRACK_BGA

AB2A_DATA
AB2A_CLK

ADP_DET#

KBD_CLK
KBD_DATA

PWRBTN_OUT#

AB1A_DATA
AB1A_CLK

AB1B_DATA
AB1B_CLK

32K_CLK
PDG_IN

VCC1_PWRGD

TEST

FET_B

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PR OPERTY OF COMPAL ELECTRONICS, INC . AND CONTAINS CONFIDEN TIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE C OMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFOR MATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOU T PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

T108 PAD

R539 0_0402_5%
R540 0_0402_5%
R542 0_0402_5%
R543 0_0402_5%

R755 0_0402_5%@

R552 0_0402_5%

1 2

R555 0_0402_5%

1 2

R556 220_0402_5%

1 2

R560 1K_0402_5%

1 2

R566 100K_0402_5%

R136 300_0402_5%

R572 0_0402_5%

2

C388
2200P_0402_50V7K

1

A_GND

Issued Date

D33

CH751H-40PT_SOD323-2

1 2
1 2
1 2
1 2

1 2

1 2

1 2

1 2

Add R136, C388. 5/04

2N7002DW-T/R7_SOT363-6

6 1

2

3

4

Q10B
2N7002DW-T/R7_SOT363-6

5

PM_SLP_M# 15,34,35
SUS_PWR_ACK 15
AC_PRESENT 15
MUTE_LED_CNTL 30
PCI_SERR# 16,28,32

21

ADP_EN

LATCH

+3VL

2008/09/15 2009/09/15

SLP_S3# 15,30,34,35,38,40,41
8051_RECOVER# 28

ADP_DET# 44

AB1A_DATA 36
AB1A_CLK 36

AB1B_DATA 36
AB1B_CLK 36

CAP_SENS_INT 25
ADP_ID_CHK 44

VCC1_PWRGD 39,44

+3VL

Compal Secret Data

KB_RST# 16
FAN_PWM 4
BAT_PWM_OUT 38
CHGCTRL 38

THM_TRAVEL# 36
ON/OFFBTN_KBC# 25

PM_RSMRST# 15
CRACK_BGA 18

CAP_DAT 14,25
CAP_CLK 14,25
CELLS 38
A_SD# 30

THM_MAIN# 36
GATEA20 16

KBD_CLK 29
KBD_DATA 29
LED_LINK_LAN#_R 16,22,23
ADP_PRES 21,35,38,44

ADP_EN 44

PM_PWROK 43

PWR_GD 4,11,13,34

OCP 44

FET_B 37
AMBER_BATLED# 30
8051TX 28
8051RX 28

AC_ADP_PRES 38
ADP_A_ID 44
LATCH 37
LID_SW# 14,20,25
CAP_RST_EC 25

Deciphered Date

Change design on 2/17.

74LVC1G02GW_SOT353-5

KBC_PWR_ON 39
AQUAWHITE_BATLED# 30

FET_A 37

+3VS

U44

12

R150

5

AQUAWHITE_BATLED#

1

P

B

4

O

47K_0402_5%@

ADP_EN

2

A

G

3

Change net name from EAPD. 5/04

Leave TP. 2/23

PWRBTN_OUT#

Add R755 and connect
GPIO24 to D228.2. 7/19

PDG_IN

PWRBTN_OUT# 25

PDG_IN 15

Title

Size Document Number Rev

Date: Sheet

System Board ID Detect

R526 R528 R529 R530

ID

DB2
DBx

X X
SI1
SI2

X

SIx
PV
N/A
N/A
PVx

X
N/A
N/A
MV

X: mean install

BATCON
KBRST#
CRACK_BGA
VCC1_PWRGD
8051TX

R531 10K_0402_5%@
R532 10K_0402_5%@
R533 100K_0402_5%
R535 10K_0402_5%
R919 100K_0402_5%

Change from 10K. 5/11

PDG_IN
PM_RSMRST#
KBC_PWR_ON
LATCH
FET_A
FET_B
ADP_EN

R538 10K_0402_5% @
R541 100K_0402_5%
R544 10K_0402_5%
R545 10K_0402_5%
R546 10K_0402_5%
R547 10K_0402_5%
R128 47K_0402_5%

Compal Electronics, Inc.

KBC1098

LA-4951P

XX

XDB1

X

XX

X

X

+3VL

1 2
1 2
1 2
1 2
1 2

1 8
2 7
3 6
4 5

of

+3VL

0.4

AB1A_CLK
AB1A_DATA
AB1B_CLK
AB1B_DATA

1 2
1 2
1 2
1 2
1 2
1 2
1 2

RP23

4.7K_0804_8P4R_5%

31 48Tuesday, July 28, 2009

http://hobi-elektronika.net

5

PCI_AD[0..31]16

CLK_PCI_1394

@

R590

10_0402_5%

12

Remove R591

D D

and C558 keep
R731 and C661,
because
duplicated.
12/05

PCI_AD22 CBS_IDSEL

1 2

R592 100_0402_5%

C C

Layout Note: Add GND shield.

CLK_PCI_139416

PM_CLKRUN#15,28,31,33

PCI_PME#16

R598

+3VS

10K_0402_5%

+SC_PWR

Add on 12/02.

B B

Change value. 2/6

12

+SC_PWR
+SC_PWR

PCI_PIRQE#16
PCI_PIRQG#16

SUS_STAT#15,28,33

1 2

D43 1SS355_SOD323-2

1 2

D44 1SS355_SOD323-2

1 2

D45 1SS355_SOD323-2

+3VS

12

R731
100K_0402_1%

CBS_GRST#

1

C661
1U_0603_10V4Z X5R

2

@

C557

4.7P_0402_50V8C

1

2

PCI_FRAME#16

PCI_DEVSEL#16

Change on 11/14.

R595 10K_0402_5%@

1 2

R597 0_0402_5%

1 2

R732 0_0402_5%@

1 2

R224 15K_0402_5%

1 2

R225 15K_0402_5%

1 2

R599 15K_0402_5%

1 2

R601 10K_0402_5%

1 2

Add on 12/02.

R730 0_0402_5%@
R602 10K_0402_5%

+3VS

R603 100K_0402_5%

SC_DATA

C565 12P_0402_50V8J

SC_RST

C566 12P_0402_50V8J

SC_CLK

C567 12P_0402_50V8J

PCI_CBE3#16
PCI_CBE2#16
PCI_CBE1#16
PCI_CBE0#16

PCI_TRDY#16
PCI_IRDY#16
PCI_STOP#16

PCI_PERR#16
PCI_SERR#16,28,31

PCI_REQ2#16
PCI_GNT2#16

1 2
1 2
1 2

PCI_PAR16

PCI_RST#16,24

CLK_PCI_1394

1 2
1 2
1 2

PCI_AD31
PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
PCI_AD19
PCI_AD18
PCI_AD17
PCI_AD16
PCI_AD15
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD11
PCI_AD10

PCI_AD9
PCI_AD8
PCI_AD7
PCI_AD6
PCI_AD5
PCI_AD4
PCI_AD3
PCI_AD2
PCI_AD1
PCI_AD0

PCI_PAR
PCI_FRAME#
PCI_TRDY#
PCI_IRDY#
PCI_STOP#
PCI_DEVSEL#

PCI_PERR#
PCI_SERR#

CBS_GRST#

U24

121

AD31

122

AD30

123

AD29

124

AD28

125

AD27

126

AD26

127

AD25

1

AD24

4

AD23

5

AD22

7

AD21

9

AD20

10

AD19

12

AD18

13

AD17

14

AD16

27

AD15

28

AD14

29

AD13

30

AD12

31

AD11

32

AD10

34

AD9

36

AD8

39

AD7

40

AD6

41

AD5

42

AD4

43

AD3

44

AD2

45

AD1

46

AD0

2

C/BE3#

15

C/BE2#

26

C/BE1#

37

C/BE0#

25

PAR

16

FRAME#

18

TRDY#

17

IRDY#

21

STOP#

19

DEVSEL#

3

IDSEL

22

PERR#

24

SERR#

120

REQ#

119

GNT#

117

PCICLK

116

PCIRST#

82

GBRST#

114

CLKRUN#

78

PME#

SC_RST

89

SCRST

SC_CLK

88

SCCLK

SC_DATA

87

SCIO

SC_CD#

86

SCCD#

SCSENSE

85

SCSENSE

112

INTA#

113

INTB#

77

HWSPND#

81

TEST

98

AGND

101

AGND

105

AGND

109

AGND

R5C835-TQFP128P_TQFP128_14X14

SMART Card connector

+3VS

R364 100K_0402_5%

Change. 4/24

A A

+3VS

SCVCC3EN#

R366

10K_0402_5%

1 2

SCVCC5EN#

http://hobi-elektronika.net

5

2.5mA

R5C835

49mA

0.2mA

10mA

25.6mA

1 2

Add. 2/25

4

VCC_PCI3V
VCC_PCI3V
VCC_PCI3V
VCC_PCI3V

VCC_ROUT
VCC_ROUT
VCC_ROUT
VCC_ROUT
VCC_ROUT

VCC_MD3V

AVCC_PHY3V
AVCC_PHY3V
AVCC_PHY3V

2mA

SCVCC5EN#
SCVCC3EN#

UDIO0/SRIRQ#

+5VS

R158

2

G

4

VCC_RIN

VCC_3V

VCC_SC

TPBIAS0

TPAP0
TPAN0

TPBP0
TPBN0

MDIO00
MDIO01
MDIO02
MDIO03
MDIO04
MDIO05
MDIO06
MDIO07
MDIO08
MDIO09
MDIO10
MDIO11
MDIO12
MDIO13
MDIO14
MDIO15
MDIO16
MDIO17
MDIO18
MDIO19

XI

XO

REXT
VREF

UDIO1
UDIO2
UDIO3
UDIO4
UDIO5

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

JSC1

2
4
6
8

10
12
14
16
18
20

AP2301GN_SOT23-3

12

+5VS

10K_0402_5%

13

D

Q19
2N7002_SOT23-3

S

3

C540

6
23
38
118

92
11

33
59
91
111

79
54
97

104
108

90

IEEE1394_TPBIAS0

110

IEEE1394_TPAP0

107

IEEE1394_TPAN0

106

IEEE1394_TPBP0

103

IEEE1394_TPBN0

102

SDCD#_MMCCD#_XDCD0#

70

MS_XDC1D#

69

XDCE#

63

SDWP#_XDR/B#

68

SDPWR0_MMC_MS_XDPWR

67

SDPWR1_XDWP#

66

4IN1_LED#

65

TP_MSEXTCK

64

SD_MMCCMD_MSBS_XDWE#

62

SD_MMC_MSCLK_XDRE#_R

60

SD_MMC_MS_XDC_D0

58

SD_MMC_MS_XDC_D1

57

SD_MMC_MS_XDC_D2

56

SD_MMC_MS_XDC_D3

55

MMC_XDC_D4

53

MMC_XDC_D5

52

MMC_XDC_D6

51

MMC_XDC_D7

50

XDCLE

49

XDALE

48

SCVCC5EN#

83

SCVCC3EN#

84

R5C832XI

95

R5C832XO UDIO4

96
100

99

SIRQ

76

TP_UDIO1

75

TP_UDIO2

74

UDIO3

73

UDIO4

72

UDIO5

71
8

20
35
47
61
80
93
94
115
128

112
334
556
778

9910
111112
131314
151516
171718
191920

E-T_6900-Q10N-00RCONN@

SCVCC3EN#

Q35

+3VS

1

1

2

2

C384

0.1U_0603_50V4Z

R159

12

0_0402_5%

1

2

Layout Note:
Place these cap close to U24.

+3VS_PHY

+SC_PWR

SC_RST
SC_CLK

SC_DATA

SC_CD#

2

G

D

31

S

AP2301GN_SOT23-3

Add. 3/02

C385

0.1U_0603_50V4Z

HF

Q36

3 1

S

D

AP2301GN_SOT23-3

G

2

1

2

C383

0.1U_0603_50V4Z@

+5VS

1

1

2

2

1

2

C555

T79PAD

R733 33_0402_5%

T80PAD
T81PAD

+SC_PWR

0.01U_0402_16V7K

C569

1

2

+SC_PWR

2

G

D

S

3 1

HFHF

Q17

C572

0.01U_0402_16V7K

SDCD#_MMCCD#_XDCD0# 30
MS_XDC1D# 30
XDCE# 30
SDWP#_XDR/B# 30
SDPWR0_MMC_MS_XDPWR 30
SDPWR1_XDWP# 30

SD_MMC_MS_XDC_D0 30
SD_MMC_MS_XDC_D1 30
SD_MMC_MS_XDC_D2 30
SD_MMC_MS_XDC_D3 30
MMC_XDC_D4 30
MMC_XDC_D5 30
MMC_XDC_D6 30
MMC_XDC_D7 30
XDCLE 30
XDALE 30

SIRQ 13,28,31,33

0.01U_0402_16V7K

0.01U_0402_16V7K

0.01U_0402_16V7K
C542

C541

10U_0805_10V4Z

0.01U_0402_16V7K

C543

C544

1

1

Layout Note:

2

+3VS

10U_0805_10V4Z

1

2

C556

Change+3V_PHY to
+3VS_PHY. 10/27

12

Place these cap close to U24.

2

0.01U_0402_16V7K

0.01U_0402_16V7K

1

1

2

2

C551

C550

Add. 3/7

1

2

0.1U_0603_50V4Z

3

+3VS

0.01U_0402_16V7K

1

0.47U_0603_16V4Z

0.47U_0603_16V4Z

1

1

2

C546

2

2

C553

C552

C559

1

2

Layout Note:

add GND shield

SD_MMCCMD_MSBS_XDWE# 30
SD_MMC_MSCLK_XDRE# 30

0.1U_0402_16V4Z

1

2

C547

+SC_PWR

C560

0.01U_0402_16V7K

1

2

+3VS

10U_0805_10V4Z

0.01U_0402_16V7K

1

1

2

2

C549

C548

10U_0805_10V4Z

C545

1 2

16P_0603_50V8

C554

1 2

16P_0603_50V8

L19
MBK2012601YZF_2P

1 2

+3VS

Layout Note:
Place these cap close to U24.

Layout Note:
Add GND shield for
SD_MMC_MSCLK_XDRE#.

Layout Note : Shield GND and pl ace C564 and R600 clo se to U24.

0.01U_0402_16V7K
R600

10K_0603_1%

12

1

C564

2

Layout Note:
Add GND shield for 1394.

GND
GND
GND

Security Classification

Issued Date

THIS SHEET OF ENGI NEERING DRAWING I S T HE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CON FIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZ ED BY COMPAL E LECTRONIC S, INC. NEITH ER THIS SHEET NOR THE INF ORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WI THOUT PRIOR WRITTEN CO NSENT OF CO MPAL ELECTR ONICS, INC.

IEEE1394_TPBN0
IEEE1394_TPBP0
IEEE1394_TPAN0
IEEE1394_TPAP0

IEEE1394_TPBIAS0

2008/03/13 2009/05/11

Compal Secret Data

2

Layout Note : Place close t o R5C835
and Shield GND.

R5C832XI

12

X1

24.576MHz_16P_3XG-24576-43E1

R5C832XO

1000P_0402_25V8J

10U_0805_6.3V6M

C601

C562

C561

1

2

1

1

2

2

Function set pin define

Pull-down Disable MS,xD Card,serial ROM

Layout Note:
Please them close to U14.

270P_0402_50V7K

C568

12

1

2

R605

56.2_0402_1%

12

12

56.2_0402_1%

12

12

R611

0.01U_0402_16V7K

1

1

C570

2

2

@

Deciphered Date

2

1

SD,MMC,MS,XD muti-function pin define

MDIO
PIN Name

MDIO00
MDIO01
MDIO02
MDIO03
MDIO04
MDIO05
MDIO06
MDIO07
MDIO08

+3VS_PHY

0.01U_0402_16V7K

UDIO3 UDIO5UDIO4 Function

MDIO09 SDCCLK
MDIO10
MDIO11

0.01U_0402_16V7K

MDIO12

C563

MDIO13

1

MDIO14
MDIO15

2

MDIO16
MDIO17
MDIO18
MDIO19

Pull-down Pull-up

Pull-upPull-up Ensable MS,xD Card,disable serial ROM

UDIO5
UDIO3

R604

5.1K_0402_1%

R606

56.2_0402_1%

Reserve them for test
if any EMI issue

R607 0_0402_5%

1 2

R608 0_0402_5%

1 2

R609 0_0402_5%

1 2

R610 0_0402_5%

1 2

56.2_0402_1%
R612

0.33U_0603_16V4Z
C571

SD Card
PIN Name

SDCD#

SDWP#
SDPWR0
SDPWR1
SDLED#

SDCCMD

SDCDAT0
SDCDAT1
SDCDAT2
SDCDAT3

Pull-downPull-upPull-up

Pull-up

R593 10K_0402_5%
R594 10K_0402_5%
R596 10K_0402_5%

Title

Size Document Number Re v

Custom

Date: Sheet

MMC Card
PIN Name

MMCCD#

MMCPWR0
MMCPWR1
MMCLED#

MMCCMD
MMCCLK
MMCDAT0
MMCDAT1
MMCDAT2
MMCDAT3
MMCDAT4
MMCDAT5
MMCDAT6
MMCDAT7

Enable serial EEPROM

1 2
1 2
1 2

J13941

1

XTPB0-

2

XTPB0+

3

XTPA0-

4

XTPA0+

5

GND1

6

GND2

7

GND3

8

GND4

SUYIN_020204FR004S506ZLCONN@

Layout Note: Shield GND for
IEEE1394_TPA and TPB

Compal Electronics, Inc.

RICOH & Card Reader

LA-4951P

1

+3VS

MS Card
PIN Name

MSCD#

MSPWR

MSLED#
MSEXTCK
MSBS
MSCCLK
MSCDAT0
MSCDAT1
MSCDAT2
MSCDAT3

XD Card
PIN Name

XDCD0#
XDCD1#

XDCE#

XDR/B#
XDPWR
XDWP#

XDLED#

XDWE#
XDRE#

XDCDAT0

XDCDAT1

XDCDAT2

XDCDAT3

XDCDAT4

XDCDAT5

XDCDAT6

XDCDAT7
XDCLE
XDALE

32 48Tuesday, July 28, 2009

0.4

of

5

D D

4

3

2

1

U25

LPC_LAD013,24,28,31
LPC_LAD113,24,28,31
LPC_LAD213,24,28,31
LPC_LAD313,24,28,31

LPC_LFRAME#13,24,28,31

LPC_LDRQ#013

NPCI_RST#16,31

SUS_STAT#15,28,32
PM_CLKRUN#15,28,31,32

C C

B B

+3VS

CLK_PCI_SIO_PCH16

1 2

R614 10K_0402_5%

CLK_14M_SIO_PCH14

SIRQ13,28,31,32

CLK_PCI_SIO_PCH

SIO_PME#

CLK_14M_SIO_PCH

SIO_GPIO41
SIO_GPIO42
SIO_GPIO43
SIO_GPIO44
SIO_GPIO45
SIO_GPIO46
SIO_GPIO47
SIO_GPIO10
SYSOPT
SIO_GPIO12
SIO_IRQ

SIO_GPIO23

CLK_PCI_SIO_PCH

12

R622

10_0402_5%@

1

C578

18P_0402_50V8J

@

2

9

LAD0

11

LAD1

12

LAD2

13

LAD3

14

LFRAME#

15

LDRQ#

16

PCI_RESET#

17

LPCPD#

18
19
20

6
8

21
22
24
25
26
27
28
29
30
31
32
33
34

57

LPC I/F

CLKRUN#
PCI_CLK
SER_IRQ
IO_PME#

CLK14

CLOCK

GPIO41
GPIO42
GPIO43
GPIO44
GPIO45

GPIO

GPIO46
GPIO47
GPIO10
GPIO11/SYSOPT
GPIO12/IO_SMI#
GPIO13/IRQIN1
GPIO14/IRQIN2
GPIO23

POWER

EPAD

LPC47N217N-ABZJ_QFN56_8X8

CLK_14M_SIO_PCH

12

R623

10_0402_5%@

1

C579

10P_0402_25V8K

@

2

SERIAL I/FPARALLEL I/F

RXD1

TXD1
DSR1#
RTS1#
CTS1#
DTR1#

DCD1#

INIT#

SLCTIN#

SLCT

BUSY
ACK#

ERROR#

ALF#

STROBE#

RXD1

54

TXD1

55

DSR#1

56

RTS#1

1

CTS#1

2

DTR#1

3

RI#1

4

RI1#

PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7

VTR
VCC
VCC
VCC
VCC

DCD#1

5

LPTINIT#

35

LPTSLCTIN#

36

LPD0

37

LPD1

39

LPD2

40

LPD3

41

LPD4

42

LPD5

43

LPD6

44

LPD7

45

LPTSLCT

47

LPTPE

48

PE

LPTBUSY

49

LPTACK#

50

LPTERR#

51

LPTAFD#

52

LPTSTB#

53

7
10
23
38
46

+3VS

1

C5730.1U_0402_10V6K

2

1

C5740.1U_0402_10V6K

2

1

C5750.1U_0402_10V6K

2

RXD1 29
TXD1 29
DSR#1 29
RTS#1 29
CTS#1 29
DTR#1 29
RI#1 29
DCD#1 29

LPTINIT# 29
LPTSLCTIN# 29
LPD0 29
LPD1 29
LPD2 29
LPD3 29
LPD4 29
LPD5 29
LPD6 29
LPD7 29
LPTSLCT 29
LPTPE 29
LPTBUSY 29
LPTACK# 29
LPTERR# 29
LPTAFD# 29
LPTSTB# 29

1

C5764.7U_0805_10V4Z

2

+3VS

SIO_GPIO23

R613 10K_0402_5%

SIO_GPIO41

R616 10K_0402_5%

SIO_GPIO42

R548 10K_0402_5%

SYSOPT

R549 10K_0402_5%

Base I/O Address

0 = 02Eh
1 = 04Eh*

RI#1

RP26 4.7K_0804_8P4R_5%

CTS#1
DSR#1
DCD#1

SIO_GPIO46
SIO_GPIO45
SIO_GPIO44
SIO_GPIO43

SIO_IRQ

SIO_GPIO12
SIO_GPIO10

RXD1

R615 1K_0402_5%

SIO_GPIO47

Disconnect SER_SHD to dock,
but add PD here. 4/25

R7 10K_0402_5%

1 8
2 7
3 6
4 5

RP10

1 8
2 7
3 6
4 5

RP11

1 8
2 7
3 6
4 5

1 2

12
12
12
12

10K_0804_8P4R_5%

10K_0804_8P4R_5%

12

Change SER_SHD to SIO_GPIO47. 5/04

+3VS

+3VS

LPTERR#

R621 4.7K_0402_5%

1 2

Change to 4.7K. 3/3

LPTPE

RP27 4.7K_0804_8P4R_5%

LPTBUSY
LPTACK#
LPTSLCTIN#

LPD1
LPD0
LPTSTB#
LPTSLCT

LPD5
LPD4
LPD3
LPD2

LPTAFD#
LPTINIT#
LPD7
LPD6

1 8
2 7
3 6
4 5

RP28 4.7K_0804_8P4R_5%

1 8
2 7
3 6
4 5

RP29 4.7K_0804_8P4R_5%

1 8
2 7
3 6
4 5

RP30 4.7K_0804_8P4R_5%

1 8
2 7
3 6
4 5

+5VS+5VS_PRN

21

D35

CH751H-40PT_SOD323-2

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC . AND CONTAINS CONFIDEN TIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE C OMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFOR MATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOU T PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2008/09/15 2009/09/15

Compal Secret Data

Deciphered Date

2

Title

Size Document Number Rev

Custom
Date: Sheet

Compal Electronics, Inc.

Super I/O LPC47N217

LA-4951P

1

33 48Tuesday, July 28, 2009

of

0.4

http://hobi-elektronika.net

1.5V_POK42

M_PWROK

SLP_S3#15,30,31,35,38,40,41

New add. 2/26

1.8VS_POK41

1.5V_POK

R633 3.3K_0402_5%

R634 3.3K_0402_5%

+1.05VS

+3VS

R627 3.3K_0402_5%

1 2

R628 76.8K_0402_1%

+5VS

+0.75VS

1 2

1 2

1 2

R631 11.5K_0402_1%

1 2

R638 16.2K_0603_1%

1 2

R641 49.9K_0402_1%

1 2

Modify. 2/26

R637 3.3K_0402_5%

1 2

R642 11.5K_0402_1%

+1.5VS

1 2

D36

CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

56.2K_0402_1%

21

D37

21

R643

1 2

R629 10K_0402_5%

2VREF_51125

1

C581
3300P_0402_25V7K

2

R639 10K_0402_5%

1

C582
3300P_0402_25V7K

2

R156 10K_0402_5%

1 2

2VREF_393

1 2

R630 34.8K_0402_1%

1 2

R632 49.9K_0402_1%

1 2

1 2

R624 1M_0402_5%

1 2

+5VALW

8

3

+

2

-

4

1

C580
1000P_0402_50V7K

2

R636 1M_0402_5%

1 2

+5VALW

5

2VREF_393

2VREF_393

+

6

-

R157 1M_0402_5%

1 2

+5VALW

5

+

6

-

U26A

P

1

O

G

LM393DR_SO8

8

U26B

P

O

G

LM393DR_SO8

4

8

U28B

P

O

G

LM393DR_SO8

4

+3VS

12

R626
10K_0402_5%

1 2

J1 SHORT PADS

+3VL --> +3VALW. 12/08

+3VALW

5

1

P

IN1

4

O

VCCP_POK40

MC74AHC1G08DFT2G SC70 5P

7

2

IN2

G

U27

3

12

R635

4.99K_0402_1%

12

R640

2.49K_0402_1%

VCCP_EN 11,21,40

MC74AHC1G 0 8 DFT2G SC70 5P

PWR_GD_R

MXM_VGA_POK21

VTTPWRGOOD 4

+3VALW

U43

5

1

P

IN1

2

IN2

G

3

H23
HOLEA

Add for debuging. 3/3Removed R625 and 1.05VM_LAN_POK. 12/08

D49

LTST-S110TBKT-5A

2 1
12

R353
1K_0402_5%

4

O

H24
HOLEA

1

1

PWR_GD 4,11,13,31

H20
HOLEA

1

H21
HOLEA

1

MDC STANDOFF

H7

H6

HOLEA

HOLEA

1

1

MXMWWAN STANDOFFWLAN STANDOFF

H1
HOLEA

1

H2
HOLEA

1

Around M/B

H9

H8

7

HOLEA

H10

HOLEA

HOLEA

1

1

H12

H11

HOLEA

HOLEA

1

1

1

H13
HOLEA

1

H14
HOLEA

1

H15
HOLEA

1

H22
HOLEA

1

H5
HOLEA

1

61.9K_0402_1%~D

R646 3.3K_0402_5%

1.05VM_LAN_POK42
+3VM

+1.05VM

PM_SLP_M#15,31,35

Change PM_SLP_LAN# to PM_SLP_M#. 2/24

1 2

R648 46.4K_0402_1%

1 2

R649 14.7K_0402_1%

1 2

R650 3.3K_0402_5%

1 2

1N4148WS-7-F_SOD323- 2

http://hobi-elektronika.net

R155

D46

1 2

86.6K_0402_1%

1 2

1

C318
3300P_0402_25V7K

2

12

R651

2VREF_51125

D47

2 1

CH751H-40PT_SOD323-2

12

C583
3300P_0402_50V7K

R644 1M_0402_5%

+5VALW

R647 10K_0402_5%

12

2VREF_393_1

1 2

R519 41.2K_0402_1%

1 2

R511 71.5K_0402_1%

R513 1M_0402_5%

1 2

C513 0.068U_0603_16V7K

1 2

1

2

3

+

2

-

C512
1000P_0402_50V7K

8

4

Change C513 from 0.047uF to 0.068uF. 7/22

12

U28A

P

1

O

G

LM393DR_SO8

+3VALW

H4

H3

HOLEA

HOLEA

1

1

R645

3.3K_0402_5%

1 2

M_PWROK

12

R512
1K_0402_5%

M_PWROK 15

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PR OPERTY OF COMPAL ELECTRONICS, INC . AND CONTAINS CONFIDEN TIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE C OMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFOR MATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOU T PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008/09/15 2009/09/15

Compal Secret Data

Deciphered Date

H16
HOLEA

1

H17
HOLEA

1

H18
HOLEA

1

H19
HOLEA

1

ZZZ1

H26
HOLEA

1

H28
HOLEA

1

FM2

FM1

1

1

PCB-MB

Title

Size Document Number Re v

Date: Sheet

Compal Electronics, Inc.

POK CKT

LA-4951P

FM3

FM4

1

1

0.4

of

34 48Tuesday, July 28, 2009

A

B

C

D

E

+3VALW to +3VS Transfer

4

+3VS+3VALW

1
2
35

C590

1

2

12

R664
470_0402_5%

1

C597

0.01U_0402_16V7K

2

SLP_S311

SLP_S3#15,30,31,34,38,40,41

PM_SLP_M#

0.1U_0402_16V4Z
C591

1

2

2N7002_SOT23-3

PM_SLP_M

2N7002_SOT23-3

B+

12

R660

1 1

2 2

330K_0402_5%

12

13

2

G

SLP_S4

Q44

2N7002_SOT23-3

D

S

ADP_PRES

2

SLP_S3

ADP_PRES21,31,38,44

Chnage AC_PRESENT
to ADP_PRES. 5/14

SLP_S4#15,42

SI7326DN-T1-E3_PAK1212-8

U31

HF

1

C589

2

10U_0805_10V4Z

RUNON

J2
SHORT PADS

2N7002_SOT23-3

G

12

R663
820K_0402_5%

Q41

13

D

Q43

2

2N7002_SOT23-3

G

S

+3VL +3VL

12

R667
100K_0402_5%

13

D

S

Q39 be remove. 7/22

3 3

PM_SLP_M#15,31,34

+1.05VM_LAN to +1.05VM Transfer

Change from +1.05VMP_LAN
to +1.05V_LAN_M. 11/11

U30
SI7326DN-T1-E3_PAK1212-8

HF

C893

0.1U_0402_16V4Z

1

2

4

Q59 2N7002_SOT23-3

Add on 5/14.

12

R370 820K_0402_5%

Modify on 10/28.

+3VALW to +3VM Transfer

10U_0805_10V4Z

SLP_S3

Q40

Q45

2

G

B+

2

G

+3VL

12

R659
100K_0402_5%

13

D

S

Q6
2N7002_SOT23-3

12

R668
100K_0402_5%

13

D

S

+1.05V_LAN_M +1.05VM

C892

10U_0805_10V4Z

1

2

R914 330K_0402_5%

1 2

D

S

13

G

2

ADP_PRES

Change to 330uF. 12/03

1

Reserve C320. 11/24

2
35

1 3

C895

10U_0805_10V4Z

C894

0.1U_0402_16V4Z

1

1

2

2

D

S

G

2

PM_SLP_M

+1.05VM to +1.05VS Transfer

+1.05VS+1.05V_LAN_M

U35
AO4430 1N SOIC-8

HF

8
7

10U_0805_10V4Z

C611

0.1U_0402_16V4Z

1

2

AP2301GN 1P_SOT23

LAN_EN#

5

RUNON

S

C610

C320

1

+

2

330U_X_2VM_R6M

0.1U_0402_16V4Z

1

C602

2

PM_SLP_LAN#15,42

2

1

2

Change from

+1.05VM_LAN. 12/09

Add on 10/27.

+3VALW +3VM

12

R669
47K_0402_5%

1 2

R670 4.7K_0402_5%

13

D

Q47
2N7002_SOT23-3

G

S

1
2
36

4

Q46

D

13

G

2

Install for DB1. 12/04
Change to 330uF. 12/03
Reserve C405. 11/24

C612

0.1U_0402_16V4Z

C405

C613

10U_0805_10V4Z

1

2

1

C604
10U_0805_10V4Z

2

1

+

2

1

2

0.1U_0402_16V4Z

1

C603

2

330U_X_2VM_R6M

+1.5V to +1.5VS Transfer

Q38
AO4430 1N SOIC-8

8
7

10U_0805_10V4Z

5

C594

0.1U_0402_16V4Z

1

2

RUNON

C593

1

2

1
2
36

HF

4

+5VALW to +5VS Transfer

SI7326DN-T1-E3_PAK1212-8

1

C598
10U_0805_10V4Z

2

U32

HF

4

RUNON

+5VS+5VALW

1
2
35

+1.5VS+1.5V

Install for DB1. 12/04Install for DB1. 12/04

C595

1

2

0.1U_0402_16V4Z

C599

1

2

RUNON 11

0.1U_0402_16V4Z

C596

10U_0805_10V4Z

1

2

1

C600
10U_0805_10V4Z

2

C646

1

+

2

330U_X_2VM_R6M

Discharge circuit-1

4 4

SLP_S419,26,27

+1.05VS +1.5VS

12

R672
470_0402_5%

13

SLP_S3

SLP_S4 SLP_S3

D

2

Q48

G

2N7002_SOT23-3

S

+1.5V +0.75VS

12

A

2

G

R679
470_0402_5%

13

D

Q55

2N7002_SOT23-3

S

Change to
22ohm. 7/14

+3VS +5VS

2

G

2

G

12

R674
470_0402_5%

13

D

2N7002_SOT23-3

S

+1.8VS

12

R681
470_0402_5%

13

D

2N7002_SOT23-3

S

Q50

Q57

12

R673
470_0402_5%

13

D

SLP_S3 SLP_S3SLP_S3

2

Q49

G

2N7002_SOT23-3

S

12

R680
22_0402_5%

13

2

G

D

Q56
2N7002_SOT23-3

S

SLP_S3

B

2

G

12

R675
470_0402_5%

13

D

Q51

2N7002_SOT23-3

S

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC . AND CONTAINS CONFIDEN TIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE C OMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFOR MATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOU T PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2008/09/15 2009/09/15

Compal Secret Data

Deciphered Date

D

Discharge circuit-2 for V-M

PM_SLP_M

2N7002_SOT23-3

+1.05VM

12

R676
470_0402_5%

13

D

2

G

S

LAN_EN#

Q52

2N7002_SOT23-3

Change LAN_EN# to PM_SLP_M. 7/22

Title

Size Document Number Re v

Date: Sheet

Compal Electronics, Inc.

DC/DC Circuits

LA-4951P

E

+3VM

12

R677
470_0402_5%

13

D

2

Q53

G

S

0.4

of

35 48Tuesday, July 28, 2009

http://hobi-elektronika.net

A

B

C

D

ADP_SIGNAL

VIN

12

1000P_0402_50V7K

PL2

SMB3025500YA_2P

1 2

+3VL

VMB_B

SMB3025500YA_2P

1 2

12

PC11
1000P_0402_50V7K

12

PR1
@15K_0402_5%

BATT_A

12

PC6

0.01U_0402_50V4Z

AB1A_DATA 31

AB1A_CLK 31

PH1 under CPU botten side :

CPU thermal protection at 90 +-3 degree C
(Need to be checked)

BATT_B

PL3

12

PC10

0.01U_0402_50V4Z

0.1

Security Classification

Close to CPU

PC12

0.1U_0603_25V7K

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2VREF_51125

12

PH1
100K_0603_1%_TSM1A104F4361RZ

PR12

150K_0603_1%

12

12

2008/09/15 2009/09/15

PR16

37.4K_0402_1%

2VREF_51125

Compal Secret Data

1 2

1 2

PR13

75K_0402_1%

150K_0402_1%

Deciphered Date

C

PR17

12

5
6

12

PC13

1000P_0402_50V7K

470K_0402_1%

1 2

8

P

+

-

G

LM393DR_SO8

4

O

PR8

7

PU15B

VL

PR10
100K_0402_5%

1 2

13

D

PQ1

2

G

SSM3K7002FU_SC70-3

S

Title

Size Document Number R e v

Custom

Date: Sheet

Compal Electronics, Inc.

DC-IN/ BATTERY CONN

LA-4891

D

EN0 39

of

36 48Tuesday, July 28, 2009

1 1

2 2

3 3

4 4

PJP1

1

1

2

2

3

3

4

4

5

5

@ACES_88334-057N

PJP2

1

1

2

2

3

3

4

4

5

5
6
7
8

@SUYIN_200046MR008G102ZR

THM_MAIN#31

SSM3K7002FU_SC70-3

OCP_ADJ44

PCN1

@SUYIN_20163S-06G1-K

210K_0402_1%

PR2 1M_0402_1%

6
7
8

PR4

100K_0402_5%

PQ30

1

BATT+

2

SMD

3

SMC

4

B/I

5

TS

6

GND

+3VL

PR9

D

S

1K_0402_5%

1 2

12

12

MMBT3906_SOT23-3

13

2

G

220K_0402_5%

294K_0402_1%

1 2

PR11

PR92

1 2

PQ29

PR91

PC27

ADPIN

VL+3VL

E

3

C

1
12

12

100P_0402_50V8J

2

PD1

1

@PJSOT24C_SOT23

69.8K_0402_1%

12

B

2

12

150K_0402_1%

2

PJSOT24C_SOT23

1

BAV99WT1G_SC70-3

http://hobi-elektronika.net

PD18

2

3

A

3

PR88

1 2

PR89

100K_0402_1%

PR90

3

PD3

1

PJSOT24C_SOT23

2

PR3

1K_0402_5%

3

PD4

1

2

12

12

PC1

PC2
1000P_0402_50V7K

100P_0402_50V8J

12

12

PC7

100P_0402_50V8J

PD15

1

BAV99WT1G_SC70-3

VL

3

12

PC28

PR14

100_0402_5%

100P_0402_50V8J

PD19

1

BAV99WT1G_SC70-3

2

3

SMB3025500YA_2P

1 2

12

PR5

100_0402_5%

PD16

1

BAV99WT1G_SC70-3

2

3

12

PR15

100_0402_5%

2

PL1

100P_0402_50V8J

12

PR6

PC8

100P_0402_50V8J

12

12

1

PD20
BAV99WT1G_SC70-3

3

PC3

12

VMB_A

12

12

100_0402_5%

PD17

1

BAV99WT1G_SC70-3

2

3

PR7

1K_0402_5%

1 2

PC29
100P_0402_50V8J

+3VL

PC4

12

PC5
1000P_0402_50V7K

PC9
100P_0402_50V8J

AB1B_DATA 31
AB1B_CLK 31THM_TRAVEL#31

B

A

1 2

PR18

5
6

VL

8

P

+

-

G

4

1M_0402_5%

12

PC30

0.1U_0603_50V4Z

7

O

PU10B
LM393DR_SO8

+3VL

12

PR20

100K_0402_5%

BAT_ALARM 31

2VREF_51125

BATT

12

1 1

12

PR19

93.1K_0603_1%

PR21
20K_0402_1%

12

PR93
10K_0402_5%

B

BATT_B

LATCH31

BATT_A

Vin_Debug

C

Vin

PD12

1SS355_SOD323-2

PD2
RB715F_SOT323-3

2
3

PQ27

S

G

2

D

12

PR37

0_0402_5%

1 2

PD8

GLZ27D_LL34-2

B++ 51125_PWR

12

PD22

1SS355_SOD323-2

12

PR23

100_0805_5%

1

1 2

12

PC15

0.1U_0603_50V4Z

D

13

BSS84LT1G_SOT23-3

BATT_IN

BATT

2 2

12

PR28
470K_0402_5%

1

2

CFET_A44

PR32

10K_0402_5%

1 2

BATT_IN

10K_0402_5%

CFET_A

34

PQ10B
2N7002KDW-2N_SOT363-6

5

12

PR30

61

2

PQ10A

2N7002KDW-2N_SOT363-6

1 2

PD5
1SS355_SOD323-2

PQ8
PMBT2222A_SOT23-3

3

BATT

3 3

4 4

FET_A 31

FET_B 31

1 2

PR44

10K_0402_5%

CFET_B

BATT_IN

CFET_B

5

10K_0402_5%

34

12

PR36
470K_0402_5%

12

PR42

2

PQ19B
2N7002KDW-2N_SOT363-6

1 2

PD9
1SS355_SOD323-2

61

PQ19A
2N7002KDW-2N_SOT363-6

1

2

PQ17

3

PR29
470K_0402_5%

1 2

3 6
2
1

PQ12
AO4407A

PQ15

AO4407A

1
2
3 6

PR39

470K_0402_5%

1 2

PMBT2222A_SOT23-3

PD6

SX34-40_SMA

21

4

4

21

PD7

SX34-40_SMA

BATT_IN

BATT_A_P

5
7

8

8
7

5

BATT_IN

BATT_B_P

5
7

8

8
7

5

2

5

PQ13
AO4407A

PQ14
AO4407A

2

5

61

PQ7A
2N7002KDW-2N_SOT363-6

PQ7B

34

2N7002KDW-2N_SOT363-6

4

36
2
1

1
2
36

4

61

PQ20A
2N7002KDW-2N_SOT363-6

34

PQ20B
2N7002KDW-2N_SOT363-6

12

PR31

4.7K_0402_5%

12

PR33
470K_0402_5%

12

PR35
470K_0402_5%

12

PR41

4.7K_0402_5%

BATT_A

BATT_B

http://hobi-elektronika.net

A

Security Classification

Issued Date

THIS SHEET OF EN GINEE RING D RAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

2008/09/15 2009/09/15

Compal Secret Data

Deciphered Date

C

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

Battery selector

LA-4891

D

of

37 48Tuesday, July 28, 2009

A

VIN

8
7

5

3

+

2

-

12

PR140

23.7K_0402_1%

PR118

1 2

255K_0402_1%

5

+

6

-

2VREF_51125

PQ102
AO4407A

VL

1 2

100K_0402_5%

1 2

1M_0402_5%

8

P

O

G

PU10A
LM393DR_SO8

4

BAT_PWM_OUT31

8

P

O

G

PU103B
LM393DR_SO8

4

4

12

PR105
15K_0402_5%

13

D

S

PR138

PR139

1

7

PQ101
SI4459_SO8

1
2
3 6

1 1

1 2

PC101

0.1U_0603_25V7K

1 2

PR101

200K_0402_5%

ADP_EN#

4

P2BATT

1 2

PR136

100K_0402_1%

2 2

P2

12

PR119
200K_0402_1%

12

PR123

3 3

41.2K_0402_1%

4

12

PR111
150K_0402_5%

PR135

100K_0402_1%

1 2

PR137

24K_0603_1%

1 2

8
7

5

P4

1
2
36

1 2

PR103

47K_0402_5%

2

G

PQ104
SSM3K7002FU_SC70-3

1 2

422K_0402_1%

1U_0603_6.3V6M

+3VL

12

PR120

22K_0402_5%

+3VL

PR104

1 2

56K_0402_1%

SLP_S3#15,30,31,34,35,40,41

PC111
1U_0603_6.3V6M

12

PR113
453K_0402_1%

PR114

PC116

12

12

PR115
1M_0402_1%

AC Detector
High 11.85
Low 10.55

ADP_PRES 21,31,35,44

Charge Detector

1 2

43.2K_0402_1%

IADAPT44

High 17.588

1 2

PR125

604K_0402_1%

3
2

VL

8

P

+

-

G

4

12

PC124

0.1U_0402_10V7K

1

O

PU103A
LM393DR_SO8

AC_ADP_PRES

VIN

12

PR128

76.8K_0402_1%

4 4

P2

12

PR127
@76.8K_0402_1%

@

12

PR131
10K_0603_0.1%

2VREF_51125

Low 17.292

+3VL

PR147
22K_0402_5%

1 2

AC_ADP_PRES31

12

PC107

0.01U_0402_16V7K

PR109

0_0402_5%

1 2

BQ24740VREF

+3VL

PR116

100P_0402_50V8J

CHGCTRL

B

8

9

10

11

12

13

14

12

IADAPT

PC119

PR130

1K_0402_5%

1 2

0.047U_0402_16V7K

Note: X7R type

ACDET

+3VL

7

IADSLP

AGND

VREF

VDAC

VADJ

EXTPWR

ISYNSET

15

12

PC108

5

6

LPREF

ACSET

ACDET

PU101
BQ24740RHDR_QFN28_5X5

BAT

IADAPT

SRSET

17

16

BATT

12

PR124
147K_0402_1%

PD103
1SS355_SOD323-2

12

12

PC123

PR102

0.01_2512_1%

1
2

ACP

PC105

1U_0603_6.3V6M

1 2

12

0.1U_0603_50V7K

4

3

ACP

LPMD

SRP

SRN

19

18

12

PC122
1U_0603_6.3V6M

12

PR134

470K_0402_5%

4
3

ACN

12

PC106
@0.1U_0603_25V7K

2

ACN

CELLS

20

PR122

210K_0402_1%

+3VL

12

12

PR133
220K_0402_5%

CHGEN#

13

D

2

G

S

B+

PL101

HCB2012KF-121T50_0805

1 2

CHGEN#

1

29

TP

CHGEN

28

PVCC

BST_CHG

27

BTST

DH_CHG

26

HIDRV

LX_CHG

25

PH

REGNVADJ

24

REGN

DL_CHG

23

LODRV

22

PGND

DPMDET

21

SRSET 44

12

PR126

100K_0402_5%

PQ109
BSS138_SOT23-3

CHGCTRL 31

B

2

12

PC102

1 2

PC109
1U_0805_25V6K

1 2

0_0402_5%

1 2

0_0402_5%

PD102

RLS4148_LL34-2

PC118

12

1U_0603_10V6K

+3VL

E

3

PQ108

MMBT3906_SOT23-3

C

1

1 2

PR129

47K_0402_5%

C

12

4.7U_0805_25V6M

PR110
10_0805_5%

1 2

PR121

PR145

12

0.1U_0603_50V7K

12

PC103

4.7U_0805_25V6M

PC110

0.1U_0402_10V7K

1 2

PR117
100K_0402_5%

1 2

PC120

ACDETACDET

PR132
300K_0402_5%

12

PC104

4.7U_0805_25V6M

PQ107

AO4468_SO8

CELLS 31

12

D

P4P2

PQ103

AO4407A

4

PR106
0_0402_5%

1 2

12

8
7

5

P2

PC112

12

PC113

4.7U_0805_25V6M

0.01_1206_1%

1 2

4.7U_0805_25V6M

PC117

0.1U_0402_10V7K

PR112

1 2

CHG_B+

CHG_B+

5

D8D7D6D

PQ106

S1S2S3G

AO4466_SO8

4

578

3 6

241

12

PC121
@0.1U_0603_25V7K

1
2
3 6

PL102

10U_LF919AS-100M-P3_4.5A_20%

1 2

PR141
@4.7_1206_5%

1 2
12

PC126

@680P_0603_50V8J

NOTE:PU104-2 , PC127-2, PR144-2 GND near PU101-9 AGND

IADAPT

PR142

11K_0402_5%

1 2

PC127

1U_0603_10V6K

12

PR144

49.9K_0402_1%

PU104

1

+IN

2

V-

3

-IN

LMV321AS5X_SOT23-5

1 2

12

PR143

39.2K_0402_1%

OUT

+5VALW

5

V+

4

12

12

PC128 4.7U_0805_25V6M

PMC 31

BATT

12

4.7U_0805_25V6M

PC114

PC115 4.7U_0805_25V6M

http://hobi-elektronika.net

A

Security Classification

Issued Date

THIS SHEET OF EN GINEE RING DR AWING IS THE P ROPRIE TARY P ROPER TY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SEC RET INFOR MATIO N. T HIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY O R DISCL OSED T O ANY TH IRD PAR TY WIT HOUT P RIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

2008/09/15 2009/09/15

Compal Secret Data

Deciphered Date

C

Title

Size Document Number R e v

Date: Sheet

Compal Electronics, Inc.

Charger

LA-4891

D

38 48Tuesday, July 28, 2009

of

0.1

A

B

C

D

E

2VREF_51125

12

PC302

1U_0603_16V7

1 1

PR301

13.7K_0402_1%

+3VALWP

B+

PL301

HCB2012KF-121T50_0805

1 2

1

+

PC316
@100U_25V_M

2

2 2

12

4.7UH_SIQB74B-4R7PF_4A_20%

+3VALWP

1

+

PC310

150U_D_6.3VM

3 3

SSM3K7002FU_SC70-3

4 4

PQ305

2

ENTRIP1

13

D

2

G

S

SSM3K7002FU_SC70-3

B++

PC317

@0.1U_0603_50V7K

PL302

@4.7_1206_5%

@680P_0603_50V8J

13

D

S

PQ307

12

PC301

@2200P_0402_50V7K

12

PR311

PC312

2

G

100K_0402_5%

1 2

2

G

12

PC303

4.7U_0805_25V6-K

12

12

ENTRIP2

13

D

PQ306
SSM3K7002FU_SC70-3

S

PR316

PR317

330K_0402_5%

12

PD304
1SS355_SOD323-2

PD301
1SS355_SOD323-2

241

241

1 2

12

12

578

PQ301
AO4466_SO8

UG1_3V

3 6

578

PQ304
AO4468_SO8

3 6

VL

PR318
100K_0402_5%

12

PC307

2.2U_0805_10V6K

PR309

0_0402_5%

1 2

0.1U_0402_10V7K

+5VALWP

+3VALWP

PC308

KBC_PWR_ON 31

DEBUG_KBCRST 28

VCC1_PWRGD 31,44

+3VLP

1 2

1 2

1 2

PR307

1 2

0_0402_5%

PJP301

PAD-OPEN 4x4m
PJP303

PAD-OPEN 4x4m

EN0 36

http://hobi-elektronika.net

A

B

1 2

PR303

20K_0402_1%

1 2

PR305

100K_0402_1%

BST_3V
UG_3V
LX_3V
LG_3V

PR315

@620K_0402_5%

+5VALW

+3VALW

2 1

2 1

2 1

PAD-OPEN 2x2m

1 2

PAD-OPEN 2x2m

PAD-OPEN 2x2m

PJP305

ENTRIP2

6

25

P PAD

7

VO2

8

VREG3

9

VBST2

10

DRVH2

11

LL2

12

DRVL2

13

51125_PWR

12

ENTRIP2

EN0

5

VFB2

SKIPSEL

14

4

15

TONSEL

GND

3

VREF

VIN

16

12

2VREF_51125

PC314

0.1U_0603_25V7K

(4.5A,180mils ,Via NO.= 9)

(3A,120mils ,Via NO.= 6)

PJP302

+VREG3_51125+3VLP

PJP304

VL+5VLP

1U_0603_16V6K

+3VL+3VEXTLP

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLO SED TO ANY THI RD PART Y WITHO UT P RIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008/09/15 2009/09/15

C

PR302

30.9K_0402_1%

1 2

PR304

20K_0402_1%

1 2

PR306

113K_0402_1%

ENTRIP1

1 2

1

2

VFB1

ENTRIP1

24

VO1

23

PGOOD

22

VBST1

21

DRVH1

20

LL1

19

DRVL1

VREG5

VCLK

PU301

17

18

TPS51125RGER_QFN24_4X4

+5VLP

12

12

PC322

PC315

10U_0805_10V6K

10U_0805_10V6K

PR320

255K_0402_1%

12

PC321

PR308

0_0402_5%

BST_5V

1 2

UG_5V
LX_5V
LG_5V

+3VL

12

PR314
@100K_0402_5%

10U_0805_10V6K

P2

12

12

PR321

PU302

1

+IN

2

V-

3

-IN

LMV321AS5X_SOT23-5

11.5K_0402_1%

Compal Secret Data

Deciphered Date

+5VALWP

PC309

0.1U_0402_10V7K

1 2

RPGOOD 15

PC319

DEBUG_KBCRST

OUT

PR310

0_0402_5%

1 2

PQ303

S TR AO4712L 1N SO8

+5VLP

12

12

PR325

220K_0402_5%

+5VLP

5

V+

4

1 2

D

PU303

1

VIN

2

GND

3

EN

12

PR326

470K_0402_5%

PR327

680K_0402_1%

B++

12

578

PQ302
AO4466_SO8

3 6

241

786

5

4

123

12

12

PC318

PC304

@0.1U_0603_50V7K

PL303

4.7UH_PCMC063T-4R7MN_5.5A_20%

1 2

12

PR312

4.7_1206_5%

12

PC313
680P_0603_50V8J

PC305

@2200P_0402_50V7K

4.7U_0805_25V6-K

1

+

2

12

+5VALWP

PC311
150U_D_6.3VM

+3VEXTLP

12

PR322

5

VOUT

4

FB

APL5317

PR324

16.5K_0402_1%

12

PD305
1SS355_SOD323-2

Title

Size Document Number R e v

Custom
Date: Sheet

64.9K_0402_1%

12

PR323

20K_0402_1%

12

Compal Electronics, Inc.

12

PC320

2.2U_0603_6.3V6K

<BOM Structure>

3.3VALWP/5VALWP

LA-4961P

E

PC306

4.7U_0805_25V6-K

0.1

of

39 48Tuesday, July 28, 2009

A

B

C

D

1 1

2 2

3 3

B+

PL401

HCB2012KF-121T50_0805

1 2

12

PC416

SLP_S3#15,30,31,34,35,38,41

VCCP_EN11,21,34

VCCP_B+

12

PC401

0.1U_0402_25V6
2200P_0402_50V7K

+6269_VCC

2.2U_0603_6.3V6K

12

12

PC402

4.7U_0805_25V6-K

PC407

1 2

@0_0402_5%

1 2

0_0402_5%

H_VTTVID17

H_VTTVID1= Low, 1.1V
H_VTTVID1= High, 1.05V

PC403

12

PR406

PR428

4.7U_0805_25V6-K

12

PC404

4.7U_0805_25V6-K

PR405

0_0402_5%

1 2

22P_0402_50V8J

1 2

35.7K_0402_1%

+3VS

12

PR427

@10K_0402_5%

10K_0402_5%

VCCP_POK34

PU401

1

VIN

2

VCC

3

FCCM

4

EN

12

PC411
@0.1U_0402_25V4K

12

PC414

PR416

+VCCP

12

PR401

16

17

GND

PGOOD

COMP5FB6FSET

12

FB_VCCP

PR409

90.9K_0402_1%

12

PC415

6800P_0603_50V7K

LX_VCCP

15

PHASE

7

12

PR410

49.9K_0402_1%

1 2

PR411

1.58K_0402_1%

12

PR412

1.96K_0402_1%

BST_VCCP

DH_VCCP

13

14

UG

BOOT

PVCC

PGND

ISEN

VO

ISL6269ACRZ-T_QFN16

8

+1.05V_VCCP

12

PC413

1 2

PR402

2.2_0603_5%

PR403

0_0402_5%

12

11

LG

10

9

0.01U_0402_16V7K

+5VALW

12

DL_VCCP

SE_VCCP

1 2

1 2

0.22U_0603_16V7K

PR404

2.2_0603_5%

1 2

1 2

1 2

7.87K_0402_1%

PR413
10_0402_5%

PR414
0_0402_5%

1 2

PR417

0_0603_5%

1 2

PC405

+6269_VCC

PC406

2.2U_0603_6.3V6K

PR407

+1.05V_VCCP

DH_VCCP1

AON6718L

VTT_SENSE 7

PQ402

578

3 6

241

3 5

241

PQ401
AO4474_SO8

12

PR418

4.7_1206_5%

PC417

1 2

1000P_0603_50V7K

+1.05V_VCCP

PL402

0.47UH_FDV0630-R47M-P3_18A_20%

1 2

12

PR408

4.7_1206_5%

PC412

1 2

1000P_0603_50V7K

PJP401

1 2

PAD-OPEN 4x4m
PJP402

1 2

PAD-OPEN 4x4m

+VCCP

1

+

PC408

2

330U_X_2VM_R6M

1

1

+

+

PC410

2

2

PC409

330U_X_2VM_R6M

(18A,720mils ,Via NO.= 36)

+1.05V_VCCP

330U_X_2VM_R6M

PC418
@0.1U_0402_10V7K

1 2

1 2

PR415
0_0402_5%

4 4

Security Classification

Issued Date

THIS SHEET OF EN GINEE RING DR AWING IS THE P ROPRIE TARY P ROPER TY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SEC RET INFOR MATIO N. T HIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

http://hobi-elektronika.net

A

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY O R DISCL OSED T O ANY TH IRD PAR TY WIT HOUT P RIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

VSS_SENSE_VTT 7

2008/09/15 2009/09/15

Compal Secret Data

Deciphered Date

C

Title

Size Document Number R e v

Date: Sheet

Compal Electronics, Inc.

1.05V_VCCP

LA-4891

D

40 48Tuesday, July 28, 2009

of

0.1

A

B

C

D

1 1

+5VALW

PR604

10K_0402_5%

SLP_S3#

5,38,40

2 2

3 3

1 2

PD601

1 2

1SS355_SOD323-2

0.1U_0402_16V7K

PC606

12

12

PR602
10K_0402_5%

2N7002KDW-2N_SOT363-6

34

PQ601B
2N7002KDW-2N_SOT363-6

5

+0.75VSP

1.8VS_POK34

+1.5V

12

10U_0805_6.3V6M

61

PQ601A

2

PJP601

1 2

PAD-OPEN 3x3m

1 2

PR609

0_0402_5%

PC617

@0.01U_0402_16V7K

12

12

PR601
1K_0402_1%

PC602

PC601

@10U_0805_10V4Z

12

PR603
1K_0402_1%

+0.75VS

6

PU602

7

POK

8

EN

12

1

APL5930KAI-TRG SOP 8P

PU601

VIN1VCNTL

2

GND

3

VREF

4

VOUT

G2992F1U_SO8

12

12

12

0.1U_0402_10V7K

PC604

PC605
10U_0805_6.3V6M

PC607
10U_0805_6.3V6M

(2A,80mils ,Via NO.= 4)

+5VALW

12

PC618
1U_0603_6.3V6M

5

VIN

4

VOUT

VCNTL

3

VOUT

2

FB

9

TP

GND

15K_0402_1%

12K_0402_1%

12

PR611

12

PR610

NC
NC
NC

TP

+0.75VSP

12

PC614
150P_0402_50V8J

6
5
7
8
9

+3VS

12

12

12

PC615
10U_0805_10V6K

+1.8VSP

PC616
22U_0805_6.3V6M

PC603
1U_0603_10V6K

+5VALW

PJP602

+1.8VSP

4 4

1 2

PAD-OPEN 3x3m

Security Classification

THIS SHEET OF EN GINEE RING DR AWING IS THE P ROPRIE TARY P ROPER TY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SEC RET INFOR MATIO N. T HIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

http://hobi-elektronika.net

A

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY O R DISCL OSED T O ANY TH IRD PAR TY WIT HOUT P RIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

(1.5A,60mils ,Via NO.= 3)

+1.8VS

Issued Date

2008/09/15 2009/09/15

Compal Secret Data

Deciphered Date

C

Title

Size Document Number R e v

Date: Sheet

Compal Electronics, Inc.

0.75VSP/PCIE/1.8VSP

LA-4891

D

41 48Tuesday, July 28, 2009

of

0.1

A

B

C

D

PR516

12

PR518

0_0402_5%

+1.05VMP_LAN

PC520

0_0402_5%

12

PR521

PM_SLP_LAN#15,35

1 1

+5VALW

+5VALW

2 2

1 2

316_0402_1%

1U_0603_10V6K

SLP_S4#15,35

+1.05VMP_LAN

12

PC519

12

@1000P_0402_50V7K

PR716
255K_0402_1%

1 2

1 2

PR519 0_0402_5%

PR503

1 2

4.22K_0402_1%

<BOM Structure>

1 2

PC526

@10P_0402_50V8J

PR504

10K_0402_1%

PC524

12

@1000P_0402_50V7K

UG_1.05V
LX_1.05V

PR517

1 2

+5VALW
LG_1.05V

PC511

0.1U_0402_10V7K

1 2

15.4K_0402_1%

12

PC521

4.7U_0805_10V6K

PR509

0_0402_5%

1 2

SIS412DN

UG1_1.05V

PQ502

4

3 5

241

786

5

S TR AO4712L 1N SO8

123

+1.05VMP_LAN

PQ504

PR511

0_0402_5%

BST_1.05V

1 2

15

14

1

PU501

2

TON

3

VOUT

4

V5FILT

5

VFB

6

PGOOD

12

TP

VBST

EN_PSV

DRVH

TRIP

V5DRV

DRVL

GND7PGND

TPS51117RGYR_QF N 14_3.5x3.5

8

1.05VM_LAN_POK 34

13
12

LL

11
10
9

12

PR510

0_0402_5%

BST_1.5V

1 2

15

14

1

3 3

PC522

+1.5VP

+1.5VP

12

@10P_0402_50V8J

+5VALW

+5VALW

1U_0603_10V6K

1 2

PR522

316_0402_1%

PR715
255K_0402_1%

1 2

1 2

PR520 0_0402_5%

PR501

1 2

10.2K_0603_0.1%

1 2

PC525

PR502

10K_0603_0.1%

PU502

2

TON

3

VOUT

4

V5FILT

5

VFB

6

PGOOD

12

TP

VBST

EN_PSV

DRVH

TRIP

V5DRV

DRVL

GND7PGND

TPS51117RGYR_QF N 14_3.5x3.5

8

13
12

LL

11
10
9

UG_1.5V
LX_1.5V

PR515

1 2

+5VALW
LG_1.5V

PC510

0.1U_0402_10V7K

1 2

8.25K_0402_1%

12

PC523

4.7U_0805_10V6K

PR508

0_0402_5%

1 2

S TR STS14N3LLH5 1N SO8

UG1_1.5V

578

PQ501
AO4466_SO8

3 6

241

<BOM Structure>

786

5

PQ503

4

123

12

12

PC527

4.7U_0805_25V6M

1.05VS_B+

12

12

PC505

PC504

@0.1U_0402_25V6

@1000P_0402_50V7K

2.2UH_PCMC063T-2R2MN_8A_20%

1 2

12

PR513

4.7_1206_5%

12

PC517
680P_0603_50V8J

PJP501

1 2

PAD-OPEN 4x4m

1.5V_B+

12

12

PC502

PC501

@0.1U_0402_25V6

@1000P_0402_50V7K

1UH_PCMC063T-1R0MN_11A_20%

1 2

12

PR512
@4.7_1206_5%

12

PC516
@680P_0603_50V8J

PC506

4.7U_0805_25V6M

PL503

4.7U_0805_6.3V6K

PC508

4.7U_0805_25V6M

PL502

4.7U_0805_6.3V6K

PL501

HCB1608KF-121T30_0603

1 2

12

PC507

4.7U_0805_25V6M

1

12

PC514

+

2

+1.05V_LAN_M

HCB1608KF-121T30_0603

(8A,320mils ,Via NO.= 16)

PL504

1 2

12

PC509

4.7U_0805_25V6M

12

PC513

B+

+1.05VMP_LAN

PC518

330U_V_2.5VM_R6M

B+

+1.5VP

1

+

PC512

2

330U_V_2.5VM_R6M

1

+

PC515

2

@330U_4V_M

1.5V_POK 34

PJP502

4 4

http://hobi-elektronika.net

A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SE CRET INFOR MATI ON. T HIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

2008/09/15 2009/09/15

Compal Secret Data

Deciphered Date

C

+1.5VP

1 2

PAD-OPEN 4x4m

Title

Size Document Number R e v

Date: Sheet

Compal Electronics, Inc.

1.5VP/1.05VSP

(8A,320mils ,Via NO.= 16)

+1.5V

LA-4891

D

0.1

of

42 48Tuesday, July 28, 2009

8

H H

H_VID0

H_VID07

H_VID1

H_VID17

H_VID2

H_VID27

H_VID3

H_VID37

H_VID4

H_VID47

H_VID5

H_VID57

H_VID6

PROC_DPRSLPVR7

H_PROCHOT#4

PR227 @4.02K_0402_1%

12

PR234

@249K_0402_1%

PC227

150P_0402_50V8J

VCCSENSE7

VSSSENSE7

H_VID67

PM_PWROK31

PROC_DPRSLPVR

CLK_EN#12

VGATE15

PSI#

PSI#7

1 2

PR223 147K _0402_1%

+VCCP

PC220 @56P_0402_50V8

1 2

1 2

1 2

@470K_0402_5%_TSM0B474J4702RE

12

12

PC222

PR235

8.06K_0402_1%
1000P_0402_50V7K

1 2

PC225

33P_0402_50V8J

1 2

1 2

PR241

324K_0402_1%

PR251 0_0402_5%

PR263 0_0402_5%

PR219
0_0402_5%

1 2

1 2

1 2

PR225

0_0402_5%

PH202

1 2

PR236

562_0402_1%

ISEN3
ISEN2
ISEN1

1 2

1 2

1 2
1 2

0_0402_5%
PR222

1 2

PR224

68_0402_5%

390P_0402_50V7K

1 2

1 2

PR238

2.37K_0402_1%

+3VALW

47K_0402_5%

1 2

PC221

@22P_0402_50V8J

PC224

12

PC235

330P_0402_50V7K

1000P_0402_50V7K

G G

F F

E E

D D

C C

B B

PR209 0_0402_5%
PR210 0_0402_5%

PR215

1 2

PSI#1

12

0.22U_0402_10V6K
PC236

PC244

PC247

7

1
2
3
4
5
6
7
8
9

10
41

12

0.22U_0402_10V6K
PC237

12

12

CLK_EN#

PU201

PGOOD
PSI#
RBIAS
VR_TT#
NTC
VW
COMP
FB
ISEN3
ISEN2

AGND

0.22U_0402_10V6K

12

PC248

38

39

37

40

VR_ON

CLK_EN#

DPRSLPVR

ISEN111VSEN12RTN13ISUM-14ISUM+15VDD

330P_0402_50V7K

35

VID4

UGATE2
PHASE2

LGATE2

LGATE1
PHASE1

VIN

IMON18BOOT119UGATE1

ISL62883HR Z-T_QFN40_5X5

17

16

20

12

PC228

1U_0603_10V6K

82.5_0402_1%

PR250

12

PC245

0.01U_0402_25V7K

PR260
768_0402_1%

1 2

VID031VID132VID233VID334VID536VID6
BOOT2

VSSP2

VCCP

PWM3

VSSP1

12

1 2

1 2

PC229

6

H_VID0
H_VID1
H_VID2
H_VID3
H_VID4
H_VID5
H_VID6
PROC_DPRSLPVR

PSI#1

PC211
1U_0603_10V6K

1 2

30
29
28
27
26
25
24
23
22
21

12

PC223
1U_0603_10V6K

PR242 0_0402_5%

PR244 1_0402_5%

6.81K_0402_1%

0.22U_0603_25V7K

12

PC241

0.022U_0402_25V7K

+5VALW

PR228

@0_0402_5%

1 2

CPU_B+

+5VALW

12

0.33U_0603_10V7K

PC242

12
12
12
12
12
12
12
12

PR221 @1K_0402_5%

12

PR239 0_0402_5%

12

PR246

12

0.068U_0603_16V7K

PC243

PR262

11K_0402_1%

PR266 @1K_0402_5%
PR267 @1K_0402_5%
PR268 1K_0402_5%
PR269 1K_0402_5%
PR270 @1K_0402_5%
PR271 1K_0402_5%
PR272 @1K_0402_5%
PR273 1K_0402_5%

12

1 2

IMVP_IMON 7

PR240 @0_0402_5%

1 2

12

PC230

0.22U_0603_25V7K

VSSSENSE

VSUM+

12

PR252

2.61K_0402_1%

12

12

PH201
10KB_0603_5%_ERTJ1VR103J

VSUM-

+VCCP

+5VALW

PC218

+VCCP

BOOST_CPU2
UGATE_CPU2
PHASE_CPU2

LGATE_CPU2

1U_0603_10V6K

5
6
2
3

5

H_VID0
H_VID1
H_VID2
H_VID3
H_VID4
H_VID5
H_VID6
PROC_DPRSLPVR

PSI#1

PU202

BOOT

VCC
FCCM

UGATE

PWM

PHASE
LGATE

GND

ISL6208CRZ-T_QFN8

BOOST_CPU1

PR208

2.2_0603_5%

BOOST_CPU3

1

UGATE_CPU3

8

PHASE_CPU3

7

LGATE_CPU3

4

UGATE_CPU1

PHASE_CPU1

LGATE_CPU1

PR280 1K_0402_5%

12

PR281 1K_0402_5%

12

PR282 @1K_0402_5%

12

PR275 @1K_0402_5%

12

PR276 1K_0402_5%

12

PR277 @1K_0402_5%

12

PR278 1K_0402_5%

12

PR279 @1K_0402_5%

12

PR283 1K_0402_5%

12

12

PR226

2.2_0603_5%

1 2

PR248

2.2_0603_5%

PC209

0.22U_0603_10V7K

1 2

0.22U_0603_10V7K

1 2

12

4

PR249

0_0603_5%

PC219

PR264
0_0603_5%

1 2

PR274
0_0603_5%

PC240

0.22U_0603_10V7K

1 2

12

UGATE1_CPU1

12

UGATE1_CPU2

UGATE1_CPU3

578

578

578

3 6

3 6

241

3 5

241

3 6

241

3 5

241

3 5

241

PQ201
AO4474_SO8

PQ202
TPCA8036

PQ203
AO4474_SO8

PQ204
TPCA8036

241

PQ205
AO4474_SO8

PQ206
TPCA8036

3

CPU_B+

12

PC201

0.1U_0402_25V6

PC231

0.1U_0402_25V6

PC202

12

PC212

0.1U_0402_25V6

12

12

2200P_0402_50V7K

PC213

12

PC232

2200P_0402_50V7K

PC207

PC210

12

2200P_0402_50V7K

PR229

PC226

680P_0603_50V7K

PR253

PC246

680P_0603_50V7K

4.7U_0805_25V6-K

12

PR211

12

680P_0603_50V7K

12

2.2_1206_5%

12

12

2.2_1206_5%

12

2

PL201

SMB3025500YA_2P

12

12

PC203

4.7U_0805_25V6-K

2.2_1206_5%

PC214

4.7U_0805_25V6-K

PC233

4.7U_0805_25V6-K

12

12

PC204

PC208

4.7U_0805_25V6-K

4.7U_0805_25V6-K

FL1 V2N

12

12

PR213

PR214

10K_0402_1%

3.65K_0603_1%

ISEN2
VSUM+

12

PR231

12

PR255

12

12

PC216

PC215

4.7U_0805_25V6-K

4.7U_0805_25V6-K

12

12

PR232

10K_0402_1%

3.65K_0603_1%

ISEN3
VSUM+

12

PC238

PC234

4.7U_0805_25V6-K

4.7U_0805_25V6-K

12

12

PR256

10K_0402_1%

3.65K_0603_1%

ISEN1

VSUM+

12

PL202

0.36UH_PCMC104T-R36MN1R17_30A_20%

1

4
3

2

CPU_B+

12

PC217

4.7U_0805_25V6-K

PL203

0.36UH_PC MC104T-R36MN1R17_30A_20%

1

FL2 V3N

2

CPU_B+

12

12

PC239

4.7U_0805_25V6-K

PL204

0.36UH_PC MC104T-R36MN1R17_30A_20%

1

FL3 V1N

2

Iccmax= 48A
I_TDC=TDB
OCP=TDBA, Intel spec=TDBA

1

B+

1

1

+

+

PC206

PC205

100U_25V_M

@100U_25V_M

2

2

+CPU_CORE

12

PR216
1_0402_5%

VSUM-

4
3

VSUM-

4
3

VSUM-

12

PR233
1_0402_5%

12

PR257
1_0402_5%

+CPU_CORE

+CPU_CORE

12

A A

http://hobi-elektronika.net

8

7

PC250

0.1U_0402_16V7K

6

5

Security Cl assification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONT AINS CONFIDENT IAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTOD Y OF THE COMPE TENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NO R THE INFORMAT ION IT CONTAI NS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTR ONICS, INC.

4

2008/09/15 2009/09/15

Compal Secret Data

Deciphered Date

3

Compal Electronics, Inc.

Title

Size Docu m en t N u m ber R e v

Date: Sheet

2

CPU_CORE

LA-4891

of

43 48Tuesday, July 28, 2009

1

0.1

5

BQ24740VREF

12

PR50
165K_0402_1%

IADAPT38

D D

CFET_A37

ADP_SIGNAL

4.7K_0402_5%

PD23

1SS355_SOD323-2

2

G

1 2

100_0402_5%

PR1001

8.66K_0402_1%

12

ADP_PRES

,38

C C

VIN

12

PR70
68K_0402_5%

12

PR80
33K_0402_5%

12

PR81

B B

2VREF_51125

12

PR1003
130K_0402_1%

A A

12

PR1004
10K_0402_1%

http://hobi-elektronika.net

1 2

PR51

10K_0402_1%

1 2

150K_0402_5%

BSS138_SOT23-3

13

D

PQ34

S

SSM3K7002FU_SC70-3

PR58

1 2

12

12

12

3
2

1 2

10K_0402_5%

PR43

8.06K_0402_1%

E

3

C

PQ35

1

MMBT3906_SOT23-3

ADP_A_ID

PR1002

45.3K_0402_1%

1 2

PR1005

1M_0402_5%

VL

8

P

+

O

-

G

PU15A

4

LM393DR_SO8

ADP_A_ID

PR1007

5

13K_0402_1%

2

1

PR95

PR45

B

PQ33

1 3

D

+3VL

2

G

S

S

OCP_ADJ 36

1 3

ADP_ID_CHK31

+3VL

12

PR1006
22K_0402_5%

ADP_A_ID 31

G

2

13

D

PQ32

BSS138_SOT23-3

NDS0610_NL_SOT23-3

D

S

PQ36

G

2

SSM3K7002FU_SC70-3

1

2

3

12

PQ24

ADP_DET# 31

4

PC21

0.22U_0603_10V7K

1 2

PU12

+IN

V-

OUT

-IN

LMV321AS5X_SOT23-5

PR49
105K_0402_1%

PD21

1SS355_SOD323-2

D

S

13

G

2

4

3

+5VS

5

V+

4

12

12

PC31

0.01U_0402_16V7K

12

PR52
2K_0402_5%

PD11
1SS355_SOD323-2

1 2

12

1

PR59

2

3.9K_0402_5%

OCP31

PC23

3900P_0402_50V7K

2N7002KDW-2N_SOT363-6

2N7002KDW-2N_SOT363-6

1 2

100K_0402_5%

1 2

PR100

100_0402_5%

PR60

OCP_A_IN

PQ28A

PQ28B

2

B

12

PD24
GLZ4.7B_LL34-2

61

34

E

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLO SED TO ANY THI RD PART Y WITHO UT P RIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

SRSET 38

C

PQ26

MMBT3904W_SOT323-3

3 1

OCP_A_IN 31

0.01U_0402_16V7K

ADP_EN# 38

2

VCC1_PWRGD 31,39

5

3

ADP_EN 31

2008/09/15 2009/09/15

Compal Secret Data

Deciphered Date

PC32

2

PR56

27.4K_0402_1%

1 2

PR61

1 2

100K_0402_1%

12

2

1

+3VS

PR55
10K_0402_5%

1 2

1 2

PR57
0_0402_5%

13

D

1 2

PR63
@0_0402_5%

PR62

200K_0402_1%

1 2

PU1

1

IN+

2

GND

3

IN-

LMV331IDCKRG4_SC70-5

1 2

PR66

100K_0402_1%

PR65
100K_0402_1%

1 2

Title

Size Document Number R e v

Custom
Date: Sheet

+5VS

5

VCC+

4

OUT

+3VS

Compal Electronics, Inc.

LA-4891

2

G

S

PQ25
SSM3K7002FU_SC70-3

+3VS

PR64
10K_0402_5%

1 2

ADP_OCP

1

OCP# 16

of

44 48Tuesday, July 28, 2009

5

4

3

2

Version change list (P.I.R. List) Power section Page 1 of 1

1

Item Reason for change PG# Modify List

Date

Phase

1

D D

2

3
4

5

6

7

C C

B B

A A

http://hobi-elektronika.net

5

Security Classification

Issued Date

THIS SHEET OF EN G INE ER ING D RA WI NG IS TH E PROPRIETAR Y PROPERTY OF COMPAL ELECT RONICS, IN C. AND CO NTAINS CON FIDENTIAL
AND TRADE S ECR ET INFORMATIO N. THIS SHEET MAY NOT BE TRANSF ERED FROM T HE CUSTODY O F THE COMPET ENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRON ICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRON ICS, INC.

3

Compal Secret Data

2008/09/15 2009/09/15

Deciphered Date

2

Compal Electronics, Inc.

Title

Changed-List History

Size Document Number Rev

Date: Sheet

LA-4961P

of

45 48Tuesday, July 28, 2009

1

0.1

5

Version Change List ( P. I. R. List ) for HW Circuit

Item Issue DescriptionDate

Request
Owner

Solution Description

Rev.Page#

Title

1

21

Compal

MXM PEG Bus

01/19

Can't detect GPU of MXM board Need reverse TX & RX bus of PEG. 0.2

0.2

2

21 MXM LVDS Bus

Compal

Need reverse LVDS low&high bit BUS.No display of LVDS panel

13 RTC

Compal

RTC no function Reverse signals of RTC connector. 0.2

3
4

JVGAFFC129

Compal

0.2

5

0.2

6

0.2

7
8
9

01/19
01/19
01/20

JVGAFFC1 pin23&24 was dummy, USB cacn't work Connect JVGAFFC1 pin23&24 to SLP_S4.

02/02
02/02

Compal
Compal

2020DISP_OFF#

Left USB port

Use wrong power rail for this signal.
It's wrong port for debug

Currently panel spec is +3VS.
Change connection from port0 to port1 for debug.

0.2

0.2

0.2

02/04 Compal

21 PWR_LEVEL Need isolation circit per HP request. Add Q69, Q70, R397, R388, R118.
4 CPU FAN CONN

02/06 Compal

No GND pin of FAN connector. Change Connector to 4 pin with GND pin.

4,13,24 SM BUS

HP

HP request to remove SM bus to XDP, JTAG & WLAN. Leave TP and remove signals.

22

HP

Intel change design to remove some caps. Remove these caps as Intel CRB design.

10

11

Compal11

Data & CLK signals are reverse of U36. Reverse CLK & DATA.

Intel LAN
DDR M2 support

02/06
02/06
02/08

12

30

HP

No install R734 & R735.LED CTL circuit

02/06

13

15

HP

HP request to update LED control circuit.

Duplicate

02/06

Remove R247.

14

13

HP

Change R720 to NO INSTALL.PCH_JTAG_RST#

02/06

No install R720.

15

13

HP

Change GPIO43_R to USB_OC#4 & reserve 33 ohm serial.GPIO

02/06

Add R134 but no install.

Remove R247 because of R541existing.

LED control

HP

Remove GND & change connection of R176.13

16 02/06

Change R176 to 1K with install it.

17

14 CLKREQ_EXP#

HP

Change R687 PU for CLKREQ_EXP# to INSTALL.

02/06

Install R687.

18

17 PCH Power Rail

HP

Some power rail of PCH are no use.

02/06

Remove these power and add TP.

19

32 Card Reader

02/06 HP

It will need find tune value of R731 & C661. Change R731 to 100K & C661 to 1uF X5R as Cartier first.

21

16 WWAN CONN

HP

WOW# to WWAN connector is no longer supported. Remove R117 and signal.

22

13 SATA port

02/10 HP

Change SATA assignments to support PM. Port 4 --> 5, Port2 --> 4, Port3 -->2.

02/10

20

Debug port9

02/10 HP

HP request to add debug port for iAMT. Add JiAMT1.

23

31 KBC1091

02/10 HP

Remove ADP_DET# on U23 GPIO9. Add R320 PD on GPIO9.

24

24 WLAN

02/10 HP

Remove R441 and connection to JWLAN1.5 Remove R441.

25

24 USB port6

02/10 HP

Remove USB signals to JWLAN1.36 and 38. Remove them.

26

20 WLAN

02/10 HP

Add 680P on DISP_OFF# close JLCD1 and change C359. Change C359 to 0.1uF and add C439.

27

22 Intel 82578

02/10 HP

Can remove Q17, R405 & R124 if no leakage. Reserve Q17, R405 and R124 in DB2.

28

4, 16 Intel Change

02/10 HP

414044 DG update 1.11 Change R31/R32 to 1.5K/750ohm and R297 to 100K.

29

31 System ID control

02/17 HP

Common Design with other project. Del D49, R149 and Q154 and Add U44.

30

20 Webcam

02/17 HP

WEBCAM_OFF is active high, so need change design. Add R287 to turn on Gate.

31

15 PWR_GD

02/17 HP

HP request to change design. Add R399 and install R237.

32

15 NAND Flash

02/17 HP

HP request to change design. Add NAND_DETECT# form U4.Y7 to JNAND1.17.

33

4 XDP PU

02/17 HP

HP request to change design. Del R37, R38, R39.

34

22 LAN Power

02/17 HP

Remove power switch from 3V to 1V and related parts. Remove C382, C383, C384, C385, C694, R401, R366, Q21 and R402.

35

29 Docking

02/17 HP

HP agree to remove caps for DP from MB to DOCKING.Remove C496 ~ C511 from MB.

0.2

0.2

0.2

0.2

0.2

0.2

0.2

0.2

0.2

0.2

0.2

0.2

0.2

0.2

0.2

0.2

0.2

0.2

0.2

0.2

0.2

0.2

0.2

0.2

0.

2

0.2

36

33 Super I/O

02/17 Compal

Common design change to SMSC.

4

3

2

1

D D

C C

B B

A A

http://hobi-elektronika.net

5

4

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DIS CLOSE D TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2006/02/28 2007/02/28

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

2

Date: Sheet

Compal Electronics, Inc.

HW Changed-List History-(0.1 to 0.2)

LA-4951P

1

0.4

of

46 48Tuesday, July 28, 2009

5

Version Change List ( P. I. R. List ) for HW Circuit

Item Issue DescriptionDate

Request
Owner

Solution Description

Rev.Page#

Title

1

25

Compal

ESD DIODE

04/23

Wrong connection of D53 & D54, system can't boot. Swap +5VS & GND of D53 & D54 pin 2 & 5. 0.3

0.3

2

29 SATA Port 5

Compal

Swap SATA_PTX_C_DRX_P5/N5 of connector side.It have wrong connection of JDOCK1 pin108 & pin109.

28 SPI_

CS0#

HP

HP request to add pull up resistor close to SPI ROM. Reserve R6 close to U19.

3
4

SM BUS14

HP
5
6
7
8
9

04/23

Intel request to change PU to 2.2K. Change R199, R200 from 4.7K to 2.2K

HP

HP

2313LAN Transfermer

JTAG Port

Intel request to add 1uF cap between TRM caps to GND.

HP review need swap

JTAG1 pin4 & pin6.

Add C264 to GND.

Swap XDP_FN16 & XDP_FN17 at JTAG1 side.

HP

17 PCH +1.05VS HP review will no need connect resistor between them. Remove R310.
14 PCH 25MHz Crystall

HP

No need 25MHz for PCH as common design. No install R229, C281, C282, Y4 but add R52.

31 KBC1098 VCC0

HP

The VCC0 will never connect to GND. Remove R587 from schematic.

16

HP

GPIO12 of PCH have internal PU. No install R279 and reserve R53 PD.

10

21

HP11

Need 0.1uF cap for Q20, Q67 gate pin. Add C265.

LAN_DIS#
DPA AUX

12

30

HP

Change GPIO of PCH to WWAN_DET#.WWAN_DET#

13

16

HP

Design Change PCH GPIO22 to WWAN_DET#.

Webcam control Modify WEBCAM_OFF to WEBCAM_ON, add R66 PU for GP

IO47.

14

20

HP

Del R350.

15

13

HP

Need inverter for docking power LED signal.DOCK LED Add Q71 & R67.

Chnage the control pin from GPIO47 to GPIO22 of PCH.

SER_SHD

HP

HP request to remove SER_SHD from SIO to docking.33

16

Disconnect SER_SHD at docking side, add R7 PU to +3VS.

17

9, 10 DDR3 M1 & M3

HP

Need implement M1, M3 but reserve M2 for SI1. Remove R91, R682~R684 and add divider for V_DDR_CPU_REF0/1.

18

17 PCH Power Rail

HP

Some power rail of PCH are no use. Remove these power and add TP.

19

32 Card Reader

HP

It will need find tune value of R731 & C661. Change R731 to 100K & C661 to 1uF X5R as Cartier first.

21

16 WWAN CONN

HP

WOW# to WWAN connector is no longer supported. Remove R117 and signal.

22

13 SATA port

HP

Change SATA assignments to support PM. Port 4 --> 5, Port2 --> 4, Port3 -->2.

20

Debug port9

HP

HP request to add debug port for iAMT. Add JiAMT1.

23

31 KBC1091

HP

Remove ADP_DET# on U23 GPIO9. Add R320 PD on GPIO9.

24

24 WLAN

HP

Remove R441 and connection to JWLAN1.5 Remove R441.

25

24 USB port6

HP

Remove USB signals to JWLAN1.36 and 38. Remove them.

26

20 WLAN

HP

Add 680P on DISP_OFF# close JLCD1 and change C359. Change C359 to 0.1uF and add C439.

27

22 Intel 82578

HP

Can remove Q17, R405 & R124 if no leakage. Reserve Q17, R405 and R124 in DB2.

28

4, 16 Intel Change

HP

414044 DG update 1.11 Change R31/R32 to 1.5K/750ohm and R297 to 100K.

29

31 System ID control

HP

Common Design with other project. Del D49, R149 and Q154 and Add U44.

30

20 Webcam

HP

WEBCAM_OFF is active high, so need change design. Add R287 to turn on Gate.

31

15 PWR_GD

HP

HP request to change design. Add R399 and install R237.

32

15 NAND Flash

HP

HP request to change design. Add NAND_DETECT# form U4.Y7 to JNAND1.17.

33

4 XDP PU

HP

HP request to change design. Del R37, R38, R39.

34

22 LAN Power

HP

Remove power switch from 3V to 1V and related parts. Remove C382, C383, C384, C385, C694, R401, R366, Q21 and R402.

35

29 Docking

HP

HP agree to remove caps for DP from MB to DOCKING.Remove C496 ~ C511 from MB.

36

33 Super I/O

Compal

Common design change to SMSC.

0.3

0.3

0.3

0.3

0.3

0.3

0.3

0.3

0.3

0.3

0.3

0.3

0.3

0.3

0.3

0.3

0.3

0.3

0.3

0.3

0.3

0.3

0.3

0.3

0.3

0.3

0.3

0.3

0.3

0.3

0.3

04/23
04/23
04/23
04/24
04/25
04/25
04/25
04/25
04/25
04/25
04/25

Webcam control

04/25

Chnage the control pin from GPIO47 to GPIO22 of PCH.

04/25
04/25
04/30

4

3

2

1

D D

C C

B B

A A

http://hobi-elektronika.net

5

4

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DIS CLOSE D TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2006/02/28 2007/02/28

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

2

Date: Sheet

Compal Electronics, Inc.

HW Changed-List History-(0.1 to 0.2)

LA-4951P

1

of

47 48Tuesday, July 28, 2009

0.4

5

Version Change List ( P. I. R. List ) for HW Circuit

Item Issue DescriptionDate

Request
Owner

Solution Description

Rev.Page#

Title

1

4

HP

FAN CTRL Circuit

07/2

FAN always 100% turn after power on Del D29 & NI R133 to prevent this issue. 0.4

0.3

2

29 SATA Port 5

Compal

Swap SATA_PTX_C_DRX_P5/N5 of connector side.It have wrong connection of JDOCK1 pin108 & pin109.

28 SPI_

CS0#

HP

HP request to add pull up resistor close to SPI ROM. Reserve R6 close to U19.

3
4

SM BUS14

HP
5
6
7
8
9

04/23

Intel request to change PU to 2.2K. Change R199, R200 from 4.7K to 2.2K

HP

HP

2313LAN Transfermer

JTAG Port

Intel request to add 1uF cap between TRM caps to GND.

HP review need swap

JTAG1 pin4 & pin6.

Add C264 to GND.

Swap XDP_FN16 & XDP_FN17 at JTAG1 side.

HP

17 PCH +1.05VS HP review will no need connect resistor between them. Remove R310.
14 PCH 25MHz Crystall

HP

No need 25MHz for PCH as common design. No install R229, C281, C282, Y4 but add R52.

31 KBC1098 VCC0

HP

The VCC0 will never connect to GND. Remove R587 from schematic.

16

HP

GPIO12 of PCH have internal PU. No install R279 and reserve R53 PD.

10

21

HP11

Need 0.1uF cap for Q20, Q67 gate pin. Add C265.

LAN_DIS#
DPA AUX

12

30

HP

Change GPIO of PCH to WWAN_DET#.WWAN_DET#

13

16

HP

Design Change PCH GPIO22 to WWAN_DET#.

Webcam control Modify WEBCAM_OFF to WEBCAM_ON, add R66 PU for GP

IO47.

14

20

HP

Del R350.

15

13

HP

Need inverter for docking power LED signal.DOCK LED Add Q71 & R67.

Chnage the control pin from GPIO47 to GPIO22 of PCH.

SER_SHD

HP

HP request to remove SER_SHD from SIO to docking.33

16

Disconnect SER_SHD at docking side, add R7 PU to +3VS.

17

9, 10 DDR3 M1 & M3

HP

Need implement M1, M3 but reserve M2 for SI1. Remove R91, R682~R684 and add divider for V_DDR_CPU_REF0/1.

18

17 PCH Power Rail

HP

Some power rail of PCH are no use. Remove these power and add TP.

19

32 Card Reader

HP

It will need find tune value of R731 & C661. Change R731 to 100K & C661 to 1uF X5R as Cartier first.

21

16 WWAN CONN

HP

WOW# to WWAN connector is no longer supported. Remove R117 and signal.

22

13 SATA port

HP

Change SATA assignments to support PM. Port 4 --> 5, Port2 --> 4, Port3 -->2.

20

Debug port9

HP

HP request to add debug port for iAMT. Add JiAMT1.

23

31 KBC1091

HP

Remove ADP_DET# on U23 GPIO9. Add R320 PD on GPIO9.

24

24 WLAN

HP

Remove R441 and connection to JWLAN1.5 Remove R441.

25

24 USB port6

HP

Remove USB signals to JWLAN1.36 and 38. Remove them.

26

20 WLAN

HP

Add 680P on DISP_OFF# close JLCD1 and change C359. Change C359 to 0.1uF and add C439.

27

22 Intel 82578

HP

Can remove Q17, R405 & R124 if no leakage. Reserve Q17, R405 and R124 in DB2.

28

4, 16 Intel Change

HP

414044 DG update 1.11 Change R31/R32 to 1.5K/750ohm and R297 to 100K.

29

31 System ID control

HP

Common Design with other project. Del D49, R149 and Q154 and Add U44.

30

20 Webcam

HP

WEBCAM_OFF is active high, so need change design. Add R287 to turn on Gate.

31

15 PWR_GD

HP

HP request to change design. Add R399 and install R237.

32

15 NAND Flash

HP

HP request to change design. Add NAND_DETECT# form U4.Y7 to JNAND1.17.

33

4 XDP PU

HP

HP request to change design. Del R37, R38, R39.

34

22 LAN Power

HP

Remove power switch from 3V to 1V and related parts. Remove C382, C383, C384, C385, C694, R401, R366, Q21 and R402.

35

29 Docking

HP

HP agree to remove caps for DP from MB to DOCKING.Remove C496 ~ C511 from MB.

36

33 Super I/O

Compal

Common design change to SMSC.

0.3

0.3

0.3

0.3

0.3

0.3

0.3

0.3

0.3

0.3

0.3

0.3

0.3

0.3

0.3

0.3

0.3

0.3

0.3

0.3

0.3

0.3

0.3

0.3

0.3

0.3

0.3

0.3

0.3

0.3

0.3

04/23
04/23
04/23
04/24
04/25
04/25
04/25
04/25
04/25
04/25
04/25

Webcam control

04/25

Chnage the control pin from GPIO47 to GPIO22 of PCH.

04/25
04/25
04/30

4

3

2

1

D D

C C

B B

A A

http://hobi-elektronika.net

5

4

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DIS CLOSE D TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2006/02/28 2007/02/28

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

2

Date: Sheet

Compal Electronics, Inc.

HW Changed-List History-(0.3 to 0.4)

LA-4951P

1

of

48 48Tuesday, July 28, 2009

0.4