DDD Discrete
GDDR1
PV Build
2007.06.21
DATE CHANGE NO.
REV
DRAWER
DESIGN
CHECK
RESPONSIBLE
FILE NAME : XXXX-XXXXXX-XX
P/N
EE
3
XXXXXXXXXXXX
DATE
POWER
VER :
DATE
INVENTEC
TITLE
DDD-Discrete
CODE
SIZE
A3
DOC. NUMBERSIZE =
1310A21516 A01
CS
SHEET
REV
OF
531
TABLE OF CONTENTS
PAGE
5- DC& BATTERY CHARGER
6- SELECT & BATTERY CONN
7- SYSTEM POWER(3V/5V)
8- SYSTEM POWER(+V1.8/+V1.25S)
9- GRAPHIC POWER(+VGFX_CORE)
10- SYSTEM POWER(+VCCP/+V1.5S)
11- CPU POWER(VCC_CORE)
12- DDR TERMINATION VOLTAGE
PAGE
15- CLOCK_GENERATOR
16- MEROM-1
17- MEROM-2
18- MEROM-3
19- THERMAL&FAN CONTROLLER
20- Crestline-1
21- Crestline-2
22- Crestline-3
23- Crestline-413- POWER(SLEEP)
14- POWER(SEQUENCE) 24- Crestline-5
25- Crestline-6
26- DDR2-DIMM0
27- DDR2-DIMM1
28- DDR2-DAMPING
29- VGA CONN
30- LCM CONN
31- ICH8-1
32- ICH8-2
33- ICH8-3
34- ICH8-4
35- ICH8-5
PAGE
36- SYSTEM BIOS&ODD EXTEND/B
37- HDD&ODD CONN
38- USB CONN
39- KBC
40- KB&TP CONN
41- AUDIO CODEC
42- MDC CONN & AUDIO JACK
43- NIC 10/100- CONTROLLER
44- NIC 10/100- RJ45 CONN
45- MINICARD CONN & BLUETOOTH
46- NEW CARD & SD/MMC
47- LED & BUTTON
48- SCREW
49- ATI M64S-1
50- ATI M64S-2
51- ATI M64S-3
52- ATI M64S-4
53- VIDEO RAM(GDDR1)
CHANGE by
Drawer_Name
14-Jun-2007
INVENTEC
TITLE
DDD-Discrete
CS
SHEET
DOC. NUMBERCODE
253
A3
REVSIZE
A011310A21516
OF
Merom/Penrym
(478 uFCPGA)
P.16
Clock Generator
ICS9LPRS355
P.15
MAIN BATT
System Charger &
DC/DC System power
V-RAM
LCM
VGA
SD/MMC
Conn
P.46
DDR1
P.53
LVDS
P.30
CRT
P.29
FIXED ODD
CARD READER
ALCOR AU6371
(USB3)
USB0
Conn
USB1
Conn
USB2
Conn
P.38
P.38
P.38
P.46
ATI
M62S
(M64S)
SYSTEM
BIOS
P.37
PCI_EXPRESS
P.49
P.36
USB2.0
BlueTooth
SPI
PATA
CNTR
(USB6)
Crestline
965PM
(1299 PCBGA)
ICH8-M
676 BGA
P.45
HDA
FSB
DMI
LPC
P.20
SATA
LAN
PCI_EXPRESS
P.31
DDR2
DDR2
HDD
P.37
MINI CARD
CONN
(WLAN)
DDR II _SODIMM0
DDR II _SODIMM1
New Card
P.45
CONN
(USB4)
P.46
P.26
P.27
NIC 10/100
INTEL
82562GT
RJ45
P.44
P.43
MDC V1.5
CONNECTOR
RJ11
P.42
P.42
AUDIO CODEC
AD_1981HD
Mic IN
Headphone
P.41
P.41
P.41
Speaker
P.41
SMSC KBC1070
Keyboard
P.40
KBC
P.39
TouchPad
P.40
CHANGE by
Drawer_Name
14-Jun-2007
INVENTEC
TITLE
DDD-Discrete
SIZE
A3
DOC. NUMBER
CODE
1310A21516 A01
CS
SHEET
REV
OF
533
Adapter
(90W)
LIMIT_SIGNAL
+VBDC
OCP
Charger
(BQ24703)
ADP_EN
OCP_OC#
ADP_PS0
ADP_PS1
CHGCTRL_3
ADP_PRES
AC_AND_CHG
ADP_PRES
KBC_PW_ON
5/3.3V
(TPS51120)
+V5A
+V3A
+V5AL
+V3AL
+V5S
+V3S
BATSELB
AC_AND_CHG
CHGCTRL_3
Selector
(Discrete)
+VBATR
+VBATA
BATCON
Main Battery
PWR_GOOD_3
PM_DPRSLPVR
PSI#
H_DPRSTP#
SLP_S5#_3R
SLP_S3#_3R
SLP_S3#_5R
IO POWER
(TPS51124)
ATI
GPU POWER
(TPS51511)
IMVP VI
(ADP3208)
SLP_S3#
+V1.8
+V1.25S
V1.8_PG
V1.25S_PG
+VDD_CORE
+VPCIE
VGA_PG
SLP_S3#
SLP_S3#
+VCC_CORE
LR
(G2997)
LR
(APL5913)
LR
VR_PWRGD_CK505
+V0.9S
M_VREF
+V1.5S
V1.5S_PG
+VCCP
VCCP_PG
CHANGE by
Drawer_Name 14-Jun-2007
INVENTEC
TITLE
DDD-Discrete
SIZE
A3
DOC. NUMBER
CODE
1310A21516 A01
CS
SHEET
REV
OF
534
DC JACK
JACK500
4
3.3A_150mil
1
2
3
G1
1
R503
15K_5%
2
R505
8.25K_1%
R511
14.3K_1%
C573
0.1uF_25v
1
2
12
1
2
2VREF
7-,14-
+VBDC
R512
100K_1%
5-,6-
G2
FOX_JPD1041_NB073_7F_4P
1
2
+VADPTR
C572
10pF_50v
L505
NFM60R30T222
3
1
2
270K_5%
3
2
C501
1
2
0.01uF_16v
+VADP
R3
12
100K_1%
3.3A_150mil
12
4
C574
0.1uF_25v
R504
12
+V5AL
5-,7-
C502
0.1uF_16v
8
U500-A
+
1
OUT
-
ON_LM393DR2G_SOP_8P
4
R502
1M_5%
12
+V5AL
5-,7-
8
U500-B
5
+
7
OUT
6
-
ON_LM393DR2G_SOP_8P
4
CHGCTRL_3
5-,6-
R6
12
100K_1%
R4
12
24K_1%
FAIR_LM324AM_SOP_14P
+VADP
5-,6-
1
C571
1
2
10pF_50v
2
PDS540_5A_40V
Q2
8
D
7
6
54
AM4825P_AP
12
6-
AC_AND_CHG
2
5
UM6K1N
6-,39-
R26
12
1M_5%
1
R25
23.7K_1%
2
MICREL_LMC7101BIM5_SOT23_5P
1
2
G
G1
G2
D4
+V5AL
3
IN+IN-
4
1
S
2
3
Q8
1
S1
6
D1
3
D2
4
S2
5-,7-
U503-D
14
3
ADP_PRES
+V3AL
6-,7-,14-,31-,39-,40-,47-
R517
191K_1%
0.1uF_16v
C5
0.1uF_16v
1V+2
U1
OUT
V-
5
4
OUT
11
1
R41
4.7K_5%
ALARM
2
1
100K_5%
2
C525
12
+
+
12
-
13
-
+VADP1
5-
R7
12
20K_5%
6-,7-,39-,43-
R523
10K_5%
R45
2
24703VREF
1
1
2
1
2
0.1uF_25v
1
R125
0_5%
2
Kevin sense
+VADP1
5-
1
2
1
R522
150K_5%
2
R67
12
100_5%
12
R518
140K_1%
1N4148
D500
1
R123
10K_1%
2
R533
12
100K_1%
C531
3
ANODE
U504
ANPEC_APL431LBAC_SOT23_3P
1
R124
0_5%
+VBATR
2
R8
12
0.003_1%_1W
1
R13
2
100_1%
2
1
1
2
C524
1uF_6.3v
R535
12
124_1%
2
CATHODE
1
REF
5-,7-,8-,9-,11-,13-,30-,39-
+VADP2
R40
6-
0.018_1%_1W
12
C6
12
1uF_6.3v
R46
12
1.62K_1%
Kevin sense
R49
12
1K_5%
R524
100K_5%
12
1
R516
60.4K_1%
2
150pF_50v
4.7uF_6.3v
C27
1
2
1
R515
43.2K_1%
2
12
R534
9.1K_1%
2
R14
100_1%
1
U2
8
9
ACP
26
ACDET
5
ENABLE
28
ACSEL
19
ALARM
2
SRSET
3
ACSET
27
ACPRES
13
IBAT
4
VREF
7
COMP
14
23
NC
TI_BQ24703_QFN_28P
C26
1
2
1
2
1
2
1
R47
150_5%
2
C29
4.7uF_6.3v
C24
4.7uF_25v
ACDRV#ACN
BATDRV#
BATSET
BATDEP
THERMAL
FAIR_LM324AM_SOP_14P
4
+
U503-B
+
5
OUT
7
-
6
11
-
C532
12
2200pF_50v
+VBATR
5-,7-,8-,9-,11-,13-,30-,39-
C522
1uF_25v
1
2
D502
MMGZ2548B
25
22
VCC
21
PWM#
16
SRP
15
SRN
12
BATP
24
18
VS
20
VHSP
6
1
17
GND
11
NCNC
10
NC
29
Q13
1
B
MMBT3906
R514
12
237K_1%
2
R5
1
1K_5%
1
2
FAIR_LM324AM_SOP_14P
+
3
-
2
1
R537
10K_5%
2
2
E
C
3
SSM3K7002F
1
R538
47K_5%
1
R88
10K_5%
2
SSM3K7002F
2
3
1
1
1
R48
174K_1%
2
1
R66
20K_1%
2
C28
180pF_50v
1
R65
7.87K_1%
2
2
D1
CHENMKO_BAT54_3P
1
2
4
+
U503-A
OUT
11
-
G
1
Q18
Q17
1
G
1
C22
2
0.1uF_25v
Q508
3
D
S
2
SSM3K7002F
1
Q14
1
B
MMBT3906
2
S
D
3
3
D
S
2
C518
4.7uF_25v
1
G
C25
OPEN
1
R531
4.7K_5%
2
2
E
C
3
1
2
3
4
1
R44
0_5%
2
1
2
S
G
FDS4435BZ
Drawer_Name
1
R145
133K_1%
2
1
R148
80.6K_1%
2
5-
R87
12
412K_1%
Q6
8
D
7
6
5
1
2
1
R9
13.7K_1%
2
1
R10
300K_0.1%
2
1
R11
24K_0.1%
2
1
R12
8.87K_1%
2
FAIR_LM324AM_SOP_14P
4
+
U503-C
+
10
OUT
8
-
11
9
-
C85
1
2
6800pF_25v
H_STPCLK
32-
OCP_OC#
5-,11-,13-,14-,19-,29-,30-,32-,34-,37-,40-,41-,42-
1
R120
215K_1%
2
1
R122
80.6K_1%
2
L500
12
PLFC1045R_10uH
D2
SSM34_3A40V
Q3
3
D
G
S
2
SSM3K7002F
14-Jun-2007
5-,11-,13-,14-,19-,29-,30-,32-,34-,37-,40-,41-,42-
R146
12
100K_5%
R147
12
383K_1%
3
R149
12
36.5K_1%
1
D506
BAT54C_30V_0.2A
2
1
2
C530
1uF_10v
Place near L19
2
E
Q10
1
B
MMBT3906
C
Q512
1
2
C23
2
5
UM6K1N
R121
1M_5%
2
2
G1
G2
12
1K_1%
R43
S1
D1
D2
S2
1
6
3
4
1
2
C503
10uF_25v
10uF_25v
3
1
R89
330K_5%
2
R506
0.015_1%_1W
1
12
R42
1K_1%
0.033uF_16v
1
Kevin sense
Note:
R9640
12
1K_5%
6CELLSEL#=1,Vcharger=12.6V
1
6CELLSEL#=0,Vcharger=16.8V
6-
6CELLSEL#
INVENTEC
TITLE
DDD-Discrete
DC &BATTERY CHARGER
CODE
SIZE
A3
CS
SHEET
D15
1
2
BAT54S_30V_0.2A
3
1
C402
2
1uF_25v
1
R397
10_5%
2
7-
MAX_LX5
+V5S
+V5S
1
R90
220K_5%
2
5-
H_STPCLK
+VBDC
5-,6-
C504
C521
1
1
2
2
4.7uF_25v
high power trace
OFCHANGE by
553
REVDOC. NUMBER
A011310A21516
CHGCTRL_3
CHENKO_LL4148_2P
FIX39
FIX_MASK
FIX40
FIX_MASK
FIX41
FIX_MASK
FIX42
FIX_MASK
C523
1000pF_50v
2
5-,39-
D505
CN4001
TYCO_1746707_1_6P
G1
G2
EX17_BAT_GND
SCREW2.8_7_1P
S26
EX17_BAT_GND
1
C527
0.047uF_10v
2
1
R525
12
1K_5%
1
1
2
1
R526
470K_5%
2
+VBATA_EX17_BAT
CN4000
SYN_200046MR006G101ZR_6P
1
1
2
2
3
3
4
4
5
5
G
6
6
G
1
2
3
4
5
6
SCREW2.8_7_1P
S27
17.0’W BATTERY EXTEND/B
1
R528
470K_5%
2
24
3
D
G
S
2
Q511
SSM3K7002F
1
2
3
4
G1
G
5
G2
G
6
EX17_BAT_GND
SCREW2.8_7_1P
S28
EX17_BAT_GNDEX17_BAT_GND
+V3AL
5-,6-,7-,14-,31-,39-,40-,47-
5
U502
TC7S14F
3
AC_AND_CHG
ADP_PRES
5-
5-,7-,39-,43-
+VADP
5-
1
R70
10K_5%
2
R513
12
3K_5%
MMGZ2548B
Q11
SSM3K7002F
2
D
S
G
1
D501
2
+V3AL
3
+VADP2
5-
1
1
2
3
AM4825P_AP
5-,6-,7-,14-,31-,39-,40-,47-
12
R71
220K_5%
+VBATA
6-
CHENKO_LL4148_2P
21
Q507
S
D504
8
D
7
6
54
G
+V3AL
5-,6-,7-,14-,31-,39-,40-,47-
5- 6-
2
3
4
POWERPAD_4A
Q500
8
D
S
7
6
54
G
AM4825P_AP
SSM3K7002F
R50
12
3
D
G
1
S
2
1.5M_5%
SSM3K7002F
3
Q4
D
G
1
S
2
PAD500
1
1
2
3
Q7
Q509
1
G
D2004
CHENKO_LL4148_2P
6-
CFET#
0_5%_OPEN
D
S
R9667
1
1
R68
470K_5%
2
1
R69
4.7K_5%
2
3
2
+VBATA+VBDC
1
2
6-
CFET#
SSM3K7002F
THM_MAIN#
R7014
220K_5%
1
2
C34
2
SDA_MAIN
SCL_MAIN
OPEN
1
2
CHANGE by
3939-
+V3AL
5-,6-,7-,14-,31-,39-,40-,47-
D2007
CHENMKO_BAV99
+V3AL
5-,6-,7-,14-,31-,39-,40-,47-
12
R15
100K_0.5%
39-
+V3AL
5-,6-,7-,14-,31-,39-,40-,47-
5
U7003
4
2
74HC1G14GV
3
Drawer_Name
R508
10K_5%
1
2
39-
+V3AL
5-,6-,7-,14-,31-,39-,40-,47-
1
2
3
BATCON
1
R507
10K_5%
2
10_5%
R9669
1
3
2
D2006
CHENMKO_BAV99
1
2
21-Jun-2007
10_5%
R9668
12
21
R17
12
100_5%
1
C7
2
47pF_50v
C7005
0.1uF_16v
1
R16
10K_5%
2
5-
MAIN BATT
SYN_200046MR006G100ZU_6P
CN501
1
1
2
2
3
3
4
4
5
5
6
6
C505
1
2
0.1uF_25v
INVENTEC
TITLE
DDD-Discrete
SELECT & BATTERY CONN
SIZE
CODE
DOC. NUMBER
A3
1310A21516 A01
CS
SHEET
6CELLSEL#
7
7
8
8
OF
536
REV
ADP_PRES
KBC_PW_ON
13-,14-,30-,32-,33-,34-,36-,43-,45-,46-,47-
+V3A
PAD505
POWERPAD_2_0610
1
C717
2
1uF_10v
5-,6-,39-,43-
39-
17.4K_1%
4.7uF_25v
CYNTEC_PCMC063_3R3
1
2
330uF_4v
2
C357
R367
+VBATP
7-
1
2
L520
1
1
2
12
+V5AL
5
3
1
2
+VBATR
5-,7-
U19
4
TC7SET32FU
R400
7.32K_1%
C356
4.7uF_25v
5-,8-,9-,11-,13-,30-,39-
POWERPAD_4A
12
51120GND
S1_D2
567
4
S2
Q34
FDS6900AS
PAD3
D1
G1
G2
+VBATP
7-
3
4
2VREF
5-,7-,14-
1
C378
2
1000pF_50v
51120GND
8
7
VO2
COMP2
TI_TPS51120_QFN_32P
9
EN5
10
C355
4.7_5%
0.1uF_16v
1
2
8
12
R366
12
3
+V3AL
5-,6-,14-,31-,39-,40-,47-
C718
1
C374
4.7uF_6.3v
2
11
12
13
14
15
16
C373
4.7uF_6.3v
EN3
PGOOD2
EN2
VBST2
DRVH2
LL2
DRVL2
R683
15.4K_1%
+V5AL
5-,7-
1
2
PGND2
17
CS2
18
1
2
6
VFB2
VREG3
19
5
GND
V5FILT
20
1
2
3
4
2
VO1
VFB1
VREF2
COMP1
SKIPSEL
TONSEL
PGOOD1
VIN
VREG5
PGND1
CS1
22
21
23
12
R682
7.32K_1%
R684
12
10_5%
C376
0.1uF_16v
R401
12
0_5%
U18
1
33
32
31
30
29
EN1
28
VBST1
27
DRVH1
26
LL1
25
DRVL1
24
51120GND
51120GND
SLP_S3#_3R
8-,9-,10-,12-,13-,14-,32-,39-,43-,46-
2VREF
5-,7-,14-
4.7_5%
C377
R398
0.1uF_16v
2
1
12
RSMRST#
32-,39-
C406
1
2
4.7uF_25v
C375
1
2
1uF_10v
5-
7.32K_1%
R686
12
MAX_LX5
30K_1%
R685
12
5
876
D
G
4S123
SI4800DY
8765
D
G
S
123
4
1
2
Q38
Q37
FDS6690AS
+VBATP
1
C404
2
4.7uF_25v
L523
12
SLF10040_4R7N7R0
7-
C405
4.7uF_25v
220uF_6.3v
C753
1
1
2
2
8-,9-,10-,11-,12-,13-,14-,29-,30-,34-,38-
+V5A
PAD506
POWERPAD_2_0610
C754
1uF_10v
INVENTEC
TITLE
DDD-Discrete
SYSTEM POWER(3V/5V/12V)
CODE
CS
SHEET OFCHANGE by
DOC. NUMBERSIZE
753
14-Jun-2007Drawer_Name
A3
REV
A011310A21516
R134
1
43.2K_1%
2
R135
12
30K_1%
51124GND
51124GND
R138
12
30K_1%
R136
12
20.5K_1%
+V1.8
9-,10-,12-,13-,20-,23-,24-,26-,27-
PAD501
POWERPAD_2_0610
1
C526
2
220uF_2.5v
+VBATR
5-,7-,8-,9-,11-,13-,30-,39-
C43
C42
1
1
2
2
CYNTEC_PCMC063_1R5
4.7uF_25v
L501
12
4.7uF_25v
FDS6676AS
Q12
SI4800DY
14-
V1.8_PG
12-,32-
SLP_S4#_3R
65
87
D
G
41S23
8
765
D
G
S
123
4
Q9
0.1uF_16v
C79
12
12
4.7_5%
R127
12
0_5%_OPEN
6
VO2
7
PGOOD2
8
EN2
VBST2
10
DRVH2
TI_TPS51124RGER_QFN_24P
11
LL2
12
DRVL2
PGND2
13
R128
12
0_5%
51124GND
5
4
VFB2
TONSEL
TRIP2
V5FILT
14
15
1
R131
15.4K_1%
2
GND
V5IN
3
16
2
VO1
VFB1
PGOOD1
TRIP1
PGND1
17
1
R130
15.4K_1%
2
1
VBST1
DRVH1
DRVL1
18
U3
25
GND
24
23
EN1
229
21
20
LL1
19
14-
C78
R132R91
12
4.7_5%
0.1uF_16v
7-,9-,10-,11-,12-,13-,14-,29-,30-,34-,38-
R129
12
10_5%
C77
1
2
1uF_10v
V1.25S_PG
12
+V5A
1
2
C76
4.7uF_6.3v
7-,9-,10-,12-,13-,14-,32-,39-,43-,46-
SLP_S3#_3R
8765
D
G
Q22
FDS8884
41S23
8765
D
G
Q19
1S23
4
FDS6690AS
+VBATR
5-,7-,8-,9-,11-,13-,30-,39-
C86
1
2
4.7uF_25v
L502
12
PCMC063T_2R2MN
1
2
C87
4.7uF_25v
1
C555
220uF_2.5v
2
PAD503
POWERPAD_2_0610
+V1.25S
10-,20-,24-,34-
INVENTEC
TITLE
DDD-Discrete
SYSTEM POWER(+V1.8/+V1.25S)
CHANGE by
Drawer_Name
14-Jun-2007
CODE
CS
SHEET
DOC. NUMBERSIZE
853
A3
REV
A011310A21516
OF
+VPCIE
49-,50-,51-
POW_SW
+V1.8
8-,10-,12-,13-,20-,23-,24-,26-,27-
C347
OPEN
C343
12
10uF_6.3v
2
3
4
5
6
7
8
9
21
U15
NC
VLDO
VLDOFB
GND
ODOFF
OD
COMP
VOSW
TML-PAD
1
20
VBST
DRVH
VLDOIN
LL
DRVL
PGND
CS
V5IN
PGOOD
ENSW
VSWFB
ENLDO
TI_TPS51511_RHL_20P
10
11
19
18
17
16
15
14
13
12
R327
12
0_5%
R330
12
10K_1%
R333
12
10K_1%
14-
VGA_PG
C345
0.1uF_16v
12
+V5A
7-,8-,10-,11-,12-,13-,14-,29-,30-,34-,38-
C346
1
2
4.7uF_6.3v
G
G
4
8
765
D
1S2
3
Q516
SI7336ADP
Q32
C307
567894
1
4.7uF_25v
2
321
SI7686DP_T1_E3
9
1
2
1
R328
1
R331
0_5%
2
1
2
2
VGAP_AGND
12.4K_1%
R329
20K_1%
1
R338
39K_1%
2
1
2
C344
1
2
22uF_6.3v
C342
1
2
1uF_10v
49-
C309
1
2
4.7uF_25v
D511
SSM34_3A40V
+VBATR
5-,7-,8-,11-,13-,30-,39-
C306
1
2
4.7uF_25v
L515
12
MPC1040_0R88
C349
1
2
OPEN
1
R335
10K_1%
2
C304
330uF_2v_9mR_Panasonic
1
R334
36.5K_1%
2
VGAP_AGND
2
PAD504
3
1
4
POWERPAD_4A
12
+VDD_CORE
49-,51-
1
2
C285
220uF_2.5v
SLP_S3#_3R
7-,8-,10-,12-,13-,14-,32-,39-,43-,46-
R336
12
150K_1%
1
2
C7006
0.1uF_16v
C348
12
0.1uF_16v
CHANGE by
Drawer_Name
14-Jun-2007
INVENTEC
TITLE
DDD-Discrete
GRAPHIC POWER (+VGFX_CORE)
CODE
A3
1310A21516 A01
CS
SHEET
OF
539
REVSIZE DOC. NUMBER
+V5A
7-,8-,9-,10-,11-,12-,13-,14-,29-,30-,34-,38-
+V1.8
8-,9-,12-,13-,20-,23-,24-,26-,27-
G9338
SC339
C89
0.1uF_16v
VCCP_PG
R579
0 ohm
OPEN
+V5A
1
2
+V1.25S
1
2
7-,8-,9-,10-,11-,12-,13-,14-,29-,30-,34-,38-
GMT_G9338_ADJTBUf_SOT23_6P
1
2
3
1
R156
OPEN
2
14-
R578
OPEN
0 ohm
R577
0 ohm
OPEN
R576
OPEN
0 ohm
8-,20-,24-,34-
C533
4.7uF_6.3v
1
VCC
GND
PGD
U7005
FDS6690AS
8
7
6
54
R157
2
OPEN
6
DRV
5
ADJ
4
EN
1
C88
2
OPEN
7-,8-,9-,12-,13-,14-,32-,39-,43-,46-
Q515
D
+VCCP
10-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-
1
S
2
3
G
1
R158
47_5%
2
C90
1
2
0.033uF_16v
1
R153
OPEN
2
1
R160
113_1%
2
1
R159
100_1%
2
1
2
C535
10uF_6.3v
PAD502
POWERPAD_2_0610
C534
1
2
10uF_6.3v
+VCCP
10-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-
C669
1
2
1uF_10v
U12
6
VCNTL
7
POK
8
EN FB
VIN
GND
9
1
ANPEC_APL5913_KAC_TRL_SOP_8P
14-
VOUT
VOUT
VIN
1
2
5
3
4
2
V1.5S_PG
C268
22uF_6.3v
C702
1
2
22uF_6.3v
1
2
C267
1uF_10v
1
2
39pF_50v
C299
PAD1
POWERPAD_2_0610
1
R276
27.4K_1%
2
1
R274
30K_1%
2
+V1.5S
13-,18-,24-,34-,45-,46-
SLP_S3#_3R
Added for VGA
R322
100K_5%
1
2
C339
0.1uF_16v
+V3S
1
2
+V5A
C340
0.1uF_16v
1
2
7-,8-,9-,10-,11-,12-,13-,14-,29-,30-,34-,38-
+V3S
10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-
GMT_G964_25_SOP8_8P
C212
1
4.7uF_6.3v
2
U14
1
2
3
4
POK
VEN
VIN VO
VPP
8
GND
7
ADJ
6
5
NC
10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-
1
R323
10K_5%
2
1
2
R286
OPEN
POWERPAD_2_0610
C305
1
10uF_6.3v
2
+V2.5S
13-,49-,50-,51-
PAD2
CHANGE by
Drawer_Name
14-Jun-2007
INVENTEC
TITLE
DDD-Discrete
SYSTEM POWER(+VCCP/+V1.5S)
CODE
SIZE
A3
CS
SHEET
DOC. NUMBER
OF
10 53
REV
A011310A21516
10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-
VR_PWRGD_CK505
PWR_GOOD_3
VR_PWRGD_CK505
C664
330pF_50v
12
R222
1.65K_1%
0.012uF_16v
R226
1K_5%
11-,15-
H_DPRSTP#
PM_DPRSLPVR
14-
11-,15-
12
C263
+V3S
PSI#
C261
220pF_25v
12
1
2
1
2
17-
17-,20-,31-
20-,32-
R223
12
68K_1%
C264
680pF_50v
R217
12
OPEN
1
C262
18pF_50v
2
1
2
12
1K_5%_OPEN
+V5S
VCOREGND
5-,13-,14-,19-,29-,30-,32-,34-,37-,40-,41-,42-
11-
CSREF
18-
1
VCOREGND
C665
1000pF_50v
2
R589
12
0_5%
18-
VCCSENSE
VSSSENSE
R227
R219
12
OPEN
R220
12
499_1%
VCOREGND
C663
4700pF_25v
12
C643
1000pF_50v
R9643
12
0_5%
10
11
12
CHENKO_LL4148_2P_OPEN
D12
21
R229
12
665K_1%_OPEN
0.1uF_16v_OPEN
H_VID6
H_VID5
H_VID4
H_VID3
H_VID2
H_VID1
H_VID0
1
EN
2
PWRGD
3
PGDELAY
4
CLKEN
5
FBRTN
6
FB
7
COMP
8
SS
9
ST
VARFREQ
VRTT
TTSEN
113K_1%
VCOREGND
1
2
VCOREGND
1
C266
2
18181818181818-
45
44
TML
48
U9
13
47
DPRSLP
DPRSTP
PMON
PMONFS
14
2
42
46
PSI
VID0
VID1
VID243VID3
CSCOMP
CSFEF19CSSUM
CLIM
LLINE
17
18
15
16
49
ADI_ADP3208_LFCSP_48P
R225
1
1
C215
1000pF_50v
2
+V3S
10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-
12
0.1uF_16v_OPEN
C265
5
U10
2
3
32-
4
TI_SN74LVC1G17DCKR_SC70_5P_OPEN
SB_3S_VRMPWRGD
+V5A
7-,8-,9-,10-,12-,13-,14-,29-,30-,34-,38-
2
R587
10_5%
C214
1
1
2
2.2uF_16v
C642
1
41
40
VID4
VID5
VRPM
RAMP20RPM22RT
21
2
1
2
R588
100K_5%
1
37
39
SP
VCC
VID6
DRVH1
PVCC1
DRVL1
PGND1
PGND2
DRVL2
PVCC2
DRVH2
GND
23 38
24
R193
215K_1%
12
R195
150K_1%
0.01uF_16v
R194
274K_1%
2
1
2
2
VCOREGND
36
BST1
35
34
SW1
33
32
31
30
29
28
27
SW2
26
25
BST2
12
C216
VCOREGND
1
1
C164
2
1000pF_50v
VCOREGND
R591
12
169K_1%
R590
12
169K_1%
R192
12
220K_1%
C217
330pF_50v
2.2uF_16v
2
R228
76.8K_1%
1
R190
12
4.7_5%
R191
12
4.7_5%
+VBATR
R172
12
100_5%
BAT54A
1uF_16v
D510
12
12
C163
1uF_16v
5-,7-,8-,9-,11-,13-,30-,39-
1
R569
220K_5%
2
NTC thermistor, place near L16
+VBATR
5-,7-,8-,9-,11-,13-,30-,39-
1
C550
2
100uF_25v
1
2
2
1
C575
C122
4.7uF_25v
1
2
C124
4.7uF_25v
1
2
C120
4.7uF_25v
4.7uF_25v
3
2
1
C161
C162
1
2
OPEN
C119
1
2
4.7uF_25v
C123
1
2
FDS6676AS
4.7uF_25v
Q23
1
2
765
G
4
C121
4.7uF_25v
X 3
6
5
G
41S23
Q26
FDS6676AS
G
4321
8
5
D
G
4
1S23
G
43
5
87
D
G
41S23
56789
6
Q25
87
FDS6676AS
D
S
123
56789
SI7686DP_T1_E3
21
6
87
D
Q21
SI7686DP_T1_E3
OPEN
C107
OPEN
Q27
Q24
FDS6676AS
R163
C213
OPEN
CYNTEC_PCMC104T_R36MN_2P
1
2
1
2
1
R189
OPEN
2
1
2
L503
12
2
R570
10_1%
1
11-
CSREF
2
R571
10_1%
1
L508
12
CYNTEC_PCMC104T_R36MN_2P
+VCC_CORE
18-
INVENTEC
TITLE
DDD-Discrete
CPU POWER(VCC_CORE)
CODE
CHANGE by
SIZE
A3
CS
SHEET
14-Jun-2007Drawer_Name
11 53
REVDOC. NUMBER
A011310A21516
OF
SLP_S4#_3R
SLP_S3#_3R
8-,32-
7-,8-,9-,10-,13-,14-,32-,39-,43-,46-
+V1.8
8-,9-,10-,13-,20-,23-,24-,26-,27-
1
2
C82
4.7uF_6.3v
+V5A
7-,8-,9-,10-,11-,13-,14-,29-,30-,34-,38-
U5
GMT_G2997F6U_MSOP10_10P
TML11VDDQSNS
10 2
VIN
9
S5
GND8PGND
7
S3
6
VTTREF
C81
1
2
1uF_10v
C49
1
0.1uF_16v
2
NOTE: DDR2 REGULATOR
20-,26-,27-
VLDOIN
VTTSNS
VTT
1
3
4
5
M_VREF
+V0.9S
1
2
28-
C47
10uF_6.3v
1
2
C48
10uF_6.3v
CHANGE by
Drawer_Name 14-Jun-2007
INVENTEC
TITLE
DDD-Discrete
DDR TERMINATION VOLTAGE
SIZE
A3
DOC. NUMBERCODE
1310A21516 A01
CS
OFSHEET
REV
5312
7-,13-,14-,30-,32-,33-,34-,36-,43-,45-,46-,47-
+V3A
6
5
2
R430
120K_1%
12
13-
GATE_3S GATE_5S
13
FDC655BN
C408
1
2
0.047uF_16v
+V3S
10-,11-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-
Q39
4
D
S
G
1
1
R414
47_5%
C389
10uF_6.3v
2
2
7-,8-,9-,10-,11-,12-,14-,29-,30-,34-,38-
R435
120K_1%
2
1
13-
+V5A
C409
1
2
0.047uF_16v
Q36
6
D
5
2
1
G
FDC655BN
+V5S
5-,11-,14-,19-,29-,30-,32-,34-,37-,40-,41-,42-
4
S
3
1
R415
100_5%
2
Added for VGA
+V1.8
8-,9-,10-,12-,20-,23-,24-,26-,27-
6
5
2
13
FDC655BN
6
5
R144
120K_1%
12
13-
GATE_3S
1
C390
2
10uF_6.3v
C84
1
2
0.047uF_16v
2
1
FDC655BN
+V1.8S
S
S
4
4
3
R161
100_5%
51-,52-,53-
1
2
+V2.5S
10-,49-,50-,51-
C308
1
1
1
R287
C97
100_5%
2
10uF_6.3v
10uF_6.3v
2
2
R460
100_5%
+V1.5S
10-,18-,24-,34-,45-,46-
1
2
Q15
D
G
Q16
D
G
SLP_S3#_3R
Q41
3
D
1
G
S
2
SSM3K7002F
1
C437
0.033uF_16v
2
SLP_S3#_3R
7-,13-,14-,30-,32-,33-,34-,36-,43-,45-,46-,47-
7-,8-,9-,10-,12-,13-,14-,32-,39-,43-,46-
7-,8-,9-,10-,12-,13-,14-,32-,39-,43-,46-
SSM3K7002F
Q43
G
1
+VBATR
+V3A
D
S
5-,7-,8-,9-,11-,13-,30-,39-
1
R462
47K_5%
2
1
B
Q47
MMBT3904
1
R431
100K_5%
2
SSM3K7002F
3
2
3
C
E
2
1
R461
130K_1%
2
+VBATR
5-,7-,8-,9-,11-,13-,30-,39-
1
2
Q44
2
E
1
B
C
3
MMBT3906
Q42
3
D
1
G
S
2
R463
2.7K_5%
Q45
1
G
SSM3K7002F
R432
12
1K_5%
Q20
3
D
S
2
1
R437
D16
1
MMGZ2548B2
2
1
2
0_5%
R434
0_5%
13-
GATE_5S GATE_3S
1
2
1
2
R436
0_5%
R433
0_5%
1
G
SSM3K7002F
3
D
S
2
13-
Q33
1
G
SSM3K7002F
3
D
S
2
Q40
1
G
SSM3K7002F
3
D
S
2
INVENTEC
TITLE
DDD-Discrete
POWER(SLEEP)
CODE REV
SIZE
CHANGE by OF
14-Jun-2007Drawer_Name
A3
CS
SHEET
DOC. NUMBER
13 53
A011310A21516
5-,6-,7-,14-,31-,39-,40-,47-
1
R444
100K_1%
2
C413
1
2
0.1uF_16v
+V3AL+V3AL
5-,6-,7-,14-,31-,39-,40-,47-
C414
1
0.1uF_16v
2
5
U524
2
PHP_74LVC1G17_SOT753_5P
3
4
1
R443
100K_5%
2
39-
VCC1_POR#_3
PWR_GOOD_3
SLP_S3#_3R
10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-
7-,8-,9-,10-,12-,13-,32-,39-,43-,46-
9-
VGA_PG
+V3S
5-,11-,13-,19-,29-,30-,32-,34-,37-,40-,41-,42-
+V5S
12
V1.25S_PG
V1.5S_PG
V1.8_PG
VCCP_PG
11-,14-
12
R98
1K_5%
DAP202K
R102
1K_5%
8-
10-
8-
10-
R99
12
68.1K_1%
R103
12
102K_1%
D5
R137
1
10K_5%
12
10K_5%
12
10K_5%
1
10K_5%
R143
12
140K_1%
1
2
2
R97
R93
R95
2
49.9K_1%
R100
R101
12
1M_5%
CHENKO_LL4148_2PD6
21
R104
12
1
2
C46
0.1uF_16v
1
2
R105
OPEN
20K_5%
ON_LM393DR2G_SOP_8P
+V5A
7-,8-,9-,10-,11-,12-,13-,14-,29-,30-,34-,38-
U4-A
8
3
+
1
OUT
2
1
4
2
C80
0.1uF_16v
+V3A
7-,13-,30-,32-,33-,34-,36-,43-,45-,46-,47-
1
R141
10K_5%
2
39-
PWR_GOOD_KBC
3
10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-
+V3S
1
R139
10K_5%
2
R140
12
100K_5%
2VREF
5-,7-
R94
12
1M_5%
+V5A
7-,8-,9-,10-,11-,12-,13-,14-,29-,30-,34-,38-
8
U4-B
5
+
7
OUT
6
-
ON_LM393DR2G_SOP_8P
4
11-,14-
PWR_GOOD_3
1
2
C45
1
1000pF_50v
2
R96
12
20K_5%
1
2
C44
0.1uF_16v
INVENTEC
TITLE
DDD-Discrete
POWER(SEQUENCE)
CHANGE by
SIZE CODE
14-Jun-2007Drawer_Name
A3
CS
SHEET
DOC. NUMBER
14 53
REV
A011310A21516
OF
+V3S
10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-
L517
BLM18AG471SN1D
1
2
10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-
R289 10K_5%
CLKREQ_R_SATA#
15-,32-
+VCCP
10-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-
2
10K_5%
R642
1
CPU_BSEL1
CPU_BSEL2
CLK_3S_REF
17-,2017-,2015-
C693
1
2
CLKREQ_R_MCH#
R646
10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-
OPEN
20-
VR_PWRGD_CK505
FSB
FSC
FSA HOST CLOCK
1
1
0
1
FSB CLOCK
FREQUENCY
0
0
12
10K_5%
667
800
R644
+V3S
1
R362
2
11-
*CLKREQ# pin controls SRC Table.
Byte5: bit6 =0(PWD)
SRC0
CR#_A
Byte5: bit7=0, disable CR#_A; 1,enable CR#_A
Byte5: bit2 =0(PWD)
SRC0
CR#_C
Byte5: bit3=0, disable CR#_C; 1,enable CR#_C
Byte5: bit6 =1
SRC2
Byte5: bit2 =1
SRC2
Layout note: All decoupling 0.1uF disperse closed to pin
1
2
C714
10uF_6.3v
1
2
C322
0.1uF_16v
1
2
C321
0.1uF_16v
1
2
0.1uF_16v
C319
+V3S
2
1
CPU_BSEL0
C351
1
CLK_R3S_ICH48
2
22pF_50v
10K_5%
12
10K_5%
R364
475_1%
12
FREQUENCY
166
200
CLKREQ_R_SATA#
CLK_R3S_DEBUG
ICH_3S_SMCLK CLK_R_PCIE_ICH
ICH_3S_SMDATA CLK_R_PCIE_ICH#
15-,32-
39-
10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-
C352
1
OPEN
2
CLK_R3S_MINICARD
19-,26-,27-,3219-,26-,27-,32-
14.31818MHZ
1
C716
33pF_50v
2
Please place close to CLKGEN within 500mils
Byte5: bit4 =0(PWD)
CR#_B
SRC1
Byte5: bit5=0, disable CR#_B; 1,enable CR#_B
Byte5: bit0 =0(PWD)
CR#_D
SRC1
Byte5: bit1=0, disable CR#_D; 1,enable CR#_D
2
10-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-
17-,20-
32-
0.1uF_16v
0.1uF_16v
R352
10K_5%_OPEN
R356
12
2.2K_5%
R357
OPEN
12
R350
33_5%
R288 475_1%12
12
R361
33_5%
C318
C316
1
1
2
+V3S
R353
45-
X501
12
1
2
C715
33pF_50v
30PPM
Byte5: bit4 =1
SRC4
Byte5: bit0 =1
SRC4
C315
1
2
0.1uF_16v
+VCCP
1
2
2
1
R360
12
10K_5%
12
CLK_3S_DEBUG
33_5%
CLK_3S_ICH48
CLKREQ_SATA#
CLKREQ_MCH#
CLK_3S_MINICARD
CR#_E
CR#_F
CR#_G
CR#_H
+V3S
10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-
Layout note: All decoupling 0.1uF disperse closed to pin
L518
BLM18AG471SN1D
1
2
C694
1
2
10uF_6.3v
U516
26
VDDSRC_IO
45
VDDSRC_IO
36
VDDSRC_IO
12
VDD96_IO
39
VDDSRC
61
VDDREF
20
VDDPLL3_IO
49
VDDCPU_IO
9
VDD48
2
VDDPCI
55
VDDCPU
16
VDD
10
SUB_48MHZ_FSLA
57
FSLB_TEST_MODE
62
REF0_FSLC_TEST_SEL
1
PCI0_CR#_A
3
PCI1_CR#_B
4
PCI2_TME
5
PCI3
56
CK_PWRGD_PD#
64
SCLK
63
SDTAT
60
X1
59
X2
8
GNDPCI
11
GND48
15
GND
19
GND
23
GNDSRC
29
27MHz_NonSS_SRCT1_SE1
GNDSRC
42
58
52
GNDSRC
GNDREF
GNDCPU
27MHz_SS_SRCC1_SE2
ICS_ICS9LPRS355BGLFT_TSSOP_64P
C323
C695
1
1
2
2
0.1uF_16v
10uF_6.3v
NC
PCI_STOP#
CPU_STOP#
CPUT1_F
CPUC1_F
CPUT0
CPUC0
CPUT2_ITP_SRCT8
CPUC2_ITP_SRCC8
SRCT11_CR#_H
SRCC11_CR#_G
SRCT10
SRCC10
SRCT9
SRCC9
SRCT7_CR#_F
SRCC7_CR#_E
SRCT6
SRCC6
PCI4_27_Select
PCI_F5_ITP_EN
SRCT4
SRCC4
SRCT3_CR#_C
SRCC3_CR#_D
SRCT2_SATAT
SRCC2_SATAC
SRCC0_DOTT_96
SRCT0_DOTC_96
10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-
Byte6: bit7=0, disable CR#_E; 1,enable CR#_E
SRC6
Byte6: bit6=0, disable CR#_F; 1,enable CR#_F
SRC8
Byte6: bit5=0, disable CR#_G; 1,enable CR#_G
SRC9
Byte6: bit4=0, disable CR#_H; 1,enable CR#_H
SRC10
48
38
37
51
50
54
53
47
46
33
32
34
35
30
31
44
43
41
40
6
7
27
28
24
25
21
22
17
18
13
14
10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-
C325
1
2
0.1uF_16v
CLK_R_REQH#
CLK_REQG#
CLK_3S_KBPCI
CLK_3S_ICHPCI
1
2
C324
0.1uF_16v
10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-
+V3S
C320
1
2
0.1uF_16v
CLK_3S_REF
C317
1
2
0.1uF_16v
10K_5%_OPEN
C326
1
2
0.1uF_16v
R271
ITP_EN =0
SRC8/SRC8#
ITP_EN =1
ITP/ITP#
15-
1
1
R270
10K_5%_OPEN
2
2
475_1%12
475_1%
12
22_5% R359
12
33_5% R349
12
R645
12
R647
R269
12
R655
R351
10K_5%
R348
OPEN
12
12
22_5%
22_5%
LAYOUT NOTES : THE R684 , R685 , R683 CLOSED TO U21
CHANGE by
Drawer_Name
14-Jun-2007
1
1
R654
R268
10K_5%
10K_5%
2
2
3232-
2121-
1616-
19-
19-
4645-
46-
CLK_R_PCIE_NEWCARD
46-
CLK_R_PCIE_NEWCARD#
4545-
5050-
3933-
2020-
3232-
3131-
+V3S+V3S
R363
12
OPEN
R358
12
10K_5%
39-
CLK_R3S_KBC14
32-
CLK_R3S_ICH14
INVENTEC
TITLE
DDD-Discrete
CLOCK_GENERATOR
CODE
SIZE
A3
DOC. NUMBER
1310A21516 A01
CS
SHEET
PCISTOP#_3
CPUSTOP#_3
CLK_R_MCHBCLK
CLK_R_MCHBCLK#
CLK_R_CPUBCLK
CLK_R_CPUBCLK#
CLK_R_XDP
CLK_R_XDP#
CLK_R_REQH#
CLK_R_REQG#
CLK_R_PCIE_MINI2
CLK_R_PCIE_MINI2#
CLK_R_DREF
CLK_R_DREF#
CLK_R3S_KBPCI
CLK_R3S_ICHPCI
CLK_R_PEG_MCH
CLK_R_PEG_MCH#
CLK_R_SATA1
CLK_R_SATA1#
27_Selet =0
LCD_SST 100MHZ
27_Selet =1
27MHZ non-spread clock
OF
5315
REV
W6
W2
W5
W3
AA4
AB2
AA3
D22
J4
L5
L4
K5
M3
N2
J1
N3
P5
P2
L2
P4
P1
R1
M1
K3
H2
K2
J3
L1
Y2
U5
R3
U4
Y5
U1
R4
T5
T3
Y4
U2
V4
V1
A6
A5
C4
D5
C6
B4
A3
M4
N5
T2
V3
B2
C3
D2
D3
F6
CN506-1
A3#
A4#
A5#
A6#
A7#
A8#
A9#
A10#
A11#
A12#
A13#
A14#
A15#
A16#
ADSTB0#
REQ0#
REQ1#
REQ2#
REQ3#
REQ4#
A17#
A18#
A19#
A20#
A21#
A22#
A23#
A24#
A25#
A26#
A27#
A28#
A29#
A30#
A31#
A32#
A33#
A34#
A35#
ADSTB1#
A20M#
FERR#
IGNNE#
STPCLK#
LINT0
LINT1
SMI#
RSVD01
RSVD02
RSVD03
RSVD04
RSVD05
RSVD06
RSVD07
RSVD08
RSVD09
RSVD010
ADS#
BNR#
BPRI#
DEFER#
DRDY#
DBSY#
BR0#
IERR#
ADDR GROUP 0
INIT#
CONTROL
LOCK#
RESET#
RS0#
RS1#
RS2#
TRDY#
HIT#
HITM#
BPM0#
BPM1#
BPM2#
BPM3#
PRDY#
PREQ#
TCK
ADDR GROUP 1
TDO
TMS
XDP/ITP SIGNALS
TRST#
DBR#
THERMAL
PROCHOT#
THERMDA
THERMDC
THERMTRIP#
ICH
H CLK
BCLK0
BCLK1
RESERVED
19-,21-
16-,1916-,1916-,19-
16-,19-
19-,32-
19-,49-
19-,20-,31-
212121-
212121-
21-
31-
21-
21-
2121-
1919191919-
19-
19-
1515-31-
H1
E2
G5
H5
F21
E1
F1
D20
B3
H4
C1
F3
F4
G3
G2
G6
E4
AD4
AD3
AD1
AC4
AC2
AC1
AC5
AA6
TDI
AB3
AB5
AB6
C20
10-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-
R166
D21
A24
B25
C7
A22
A21
56_5%12
+VCCP
10mils/10mils
+VCCP
H_A#(35:3)
21-
H_A#(3)
H_A#(4)
H_A#(5)
H_A#(6)
H_A#(7)
H_A#(8)
H_A#(9)
H_A#(10)
H_A#(11)
H_A#(12)
H_A#(13)
H_A#(14)
H_A#(15)
H_A#(16)
H_REQ#(4:0) H_RS#(2:0)
H_A#(17)
H_A#(18)
H_A#(19)
H_A#(20)
H_A#(21)
H_A#(22)
H_A#(23)
H_A#(24)
H_A#(25)
H_A#(26)
H_A#(27)
H_A#(28)
H_A#(29)
H_A#(30)
H_A#(31)
H_A#(32)
H_A#(33)
H_A#(34)
H_A#(35)
H_ADSTB#1
H_STPCLK#
21-
31-
H_A20M#
31-
H_FERR#
31-
H_IGNNE#
3131-
H_INTR
31-
H_NMI
H_SMI# CLK_R_CPUBCLK#
21-
H_REQ#(0)
H_REQ#(1)
H_REQ#(2)
H_REQ#(3)
H_REQ#(4)
H_ADSTB#0
21-
FOX_PZ4782K_274M_41_478P
GMCH
CPU
ICH8
+VCCP
H_ADS#
H_BNR#
H_BPRI#
H_DEFER#
H_DRDY#
H_DBSY#
H_BREQ#0
H_INIT#
H_LOCK#
H_CPURST#
H_TRDY#
H_HIT#
H_HITM#
H_BPM0_XDP#
H_BPM1_XDP#
H_BPM2_XDP#
H_BPM3_XDP#
H_BPM4_PRDY#
H_BPM5_PREQ#
H_TCK
TDI_FLEX
H_TDO
H_TMS
+VCCP
R240
12
51_5%
H_RS#(0)
H_RS#(1)
H_RS#(2)
XDP_DBRESET#
H_THERMDA
THERM_MINUS
PM_THRMTRIP#
CLK_R_CPUBCLK
10-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-
R630
12
51_5%
R234
12
51_5%
R235
12
51_5%
R639
12
51_5%
+VCCP
10-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-
10-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-
21-
16-,19-
H_BPM5_PREQ#
16-,19-
TDI_FLEX
16-,19-
H_TMS
16-,19-
H_TCK
1
R165
56_5%
CLOSED TO CPU
2
51 ohm +/-1% pull-up to +VCCP
(VCCP) if ITP is implemented
19-
1
2
R233
51_5%
H_TRST#
PM_THRMTRIP# should be T at CPU
CHANGE by
Drawer_Name
14-Jun-2007
INVENTEC
TITLE
DDD-Discrete
MEROM-1
CODESIZE
A3
1310A21516 A01
CS
SHEET
REVDOC. NUMBER
OF
5316