HP 541 Schematics DDD DISCRETE

DDD Discrete GDDR2

PV Build

2007.06.15

DATE CHANGE NO.

REV

DRAWER
DESIGN
CHECK
RESPONSIBLE

SIZE =
FILE NAME :

P/N

EE

3

XXXX-XXXXXX-XX

XXXXXXXXXXXX

DATE POWER

VER :

DATE

INVENTEC

TITLE

DDD Discrete

CODE

SIZE

A3

DOC. NUMBER

Model_No A01

CS

SHEET

REV

OF

551

TABLE OF CONTENTS

PAGE
5- DC& BATTERY CHARGER

6- SELECT & BATTERY CONN
7- SYSTEM POWER(3V/5V)
8- SYSTEM POWER(+V1.8/+V1.25S)

9- GRAPHIC POWER(+VGFX_CORE)
10- SYSTEM POWER(+VCCP/+V1.5S)
11- CPU POWER(VCC_CORE)
12- DDR TERMINATION VOLTAGE
13- POWER(SLEEP)
14- POWER(SEQUENCE)

PAGE
15- CLOCK_GENERATOR

16- MEROM-1
17- MEROM-2
18- MEROM-3

19- THERMAL&FAN CONTROLLER
20- Crestline-1
21- Crestline-2

22- Crestline-3
23- Crestline-4
24- Crestline-5
25- Crestline-6
26- DDR2-DIMM0
27- DDR2-DIMM1
28- DDR2-DAMPING
29- VGA CONN
30- LCM CONN

31- ICH8-1
32- ICH8-2
33- ICH8-3
34- ICH8-4
35- ICH8-5

PAGE
36- SYSTEM BIOS&ODD EXTEND/B

37- HDD&ODD CONN
38- USB CONN
39- KBC

40- KB&TP CONN
41- AUDIO CODEC
42- MDC CONN & AUDIO JACK

43- NIC 10/100- CONTROLLER
44- NIC 10/100- RJ45 CONN

45- MINICARD CONN & BLUETOOTH
46- NEW CARD & SD/MMC
47- LED & BUTTON

48- SCREW
49- ATI M64S-1

50- ATI M64S-2
51- ATI M64S-3
52- ATI M64S-4

53- VIDEO RAM-1
54- VIDEO RAM-2

CHANGE by

Thomas Ho

13-Jun-2007

INVENTEC

TITLE

DDD Discrete

CS

SHEET

DOC. NUMBERCODE

255

A3

REVSIZE

A01Model_No

OF

Merom/Penrym

(478 uFCPGA)

P.16

Clock Generator

ICS9LPRS355

P.15

MAIN BATT

System Charger &

DC/DC System power

V-RAM

P.53

LCM

P.30

VGA

P.29

FIXED ODD

SD/MMC

Conn

CARD READER

P.46

DDR2

LVDS

CRT

P.37

BLUETOOTH

USB0

Conn

USB1

Conn

USB2

Conn

ALCOR AU6371

(USB3)

P.45

P.38

P.38

P.38

P.46

ATI

M64S

SYSTEM

BIOS

PCI_EXPRESS

P.49

P.36

PATA

USB2.0

SPI

FSB

Crestline

965PM

(1299 PCBGA)

DMI

ICH8-M

676 BGA

HDA

LPC

P.20

SATA

LAN

PCI_EXPRESS

P.31

DDR2

DDR2

HDD

P.37

MINI CARD

CONN

(WLAN)

DDR II _SODIMM0

DDR II _SODIMM1

New Card

P.45

CONN

(USB4)

P.46

P.26

P.27

NIC 10/100

INTEL

82562GT

P.43

RJ45

P.44

MDC V1.5

CONNECTOR

RJ11

P.42

P.42

AUDIO CODEC

AD_1981HD

Mic IN

Headphone

P.41 P.41

P.41

Speaker

P.41

KBC

SMSC KBC1070

P.39

Keyboard TouchPad

P.40P.40

CHANGE by

Thomas Ho

13-Jun-2007

INVENTEC

TITLE

DDD Discrete

CODE

CS

SHEET

DOC. NUMBER

355

SIZE

A3

REV

A01Model_No

OF

Adapter

(90W)

LIMIT_SIGNAL

+VBDC

OCP

Charger

(BQ24703)

ADP_EN

OCP_OC#

ADP_PS0
ADP_PS1

CHGCTRL_3

ADP_PRES

AC_AND_CHG

ADP_PRES

KBC_PW_ON

5/3.3V

(TPS51120)

+V5A
+V3A

+V5AL

+V3AL

+V5S

+V3S

BATSELB

AC_AND_CHG

CHGCTRL_3

Selector

(Discrete)

+VBATR

+VBATA

BATCON

Main Battery

PWR_GOOD_3

PM_DPRSLPVR

PSI#

H_DPRSTP#

SLP_S5#_3R

SLP_S3#_3R

SLP_S3#_5R

IO POWER

(TPS51124)

ATI

GPU POWER

(TPS51511)

IMVP VI

(ADP3208)

SLP_S3#

+V1.8

+V1.25S

V1.8_PG

V1.25S_PG

+VDD_CORE

+VPCIE

VGA_PG

SLP_S3#

SLP_S3#

+VCC_CORE

LR

(G2997)

LR

(APL5913)

LR

VR_PWRGD_CK410

+V0.9S

M_VREF

+V1.5S

V1.5S_PG

+VCCP

VCCP_PG

CHANGE by

INVENTEC

TITLE

DDD Discrete

CODE

SIZE

13-Jun-2007Thomas Ho

A3

CS

SHEET

DOC. NUMBER

OF

455

REV

A01Model_No

SINGA_2DC_G726_I04_4P

JACK500

4
1
2
3

G1G2

0.1uF_25v

1

R503

15K_5%

2

R505

8.25K_1%

R511

14.3K_1%

DC JACK

3.3A_150mil

+VADPTR

C573

1
2

1

R512

100K_1%

2

12

1

2

2VREF

7-,14-

+VBDC

5-,6-

NFM60R30T222

1

C572

10pF_50v

2

C501

1
2

0.022uF_16v

R3

12

100K_1%

L505

3.3A_150mil

12

3

4

R504

1

2

270K_5%

+V5AL

5-,7-

8

U500-A

3

+

1

OUT

2

-

ON_LM393DR2G_SOP_8P

4

R502

1M_5%

12

+V5AL

5-,7-

8
U500-B

5

+

7

OUT

6

-

ON_LM393DR2G_SOP_8P

4

CHGCTRL_3

+VADP

5-,6-

1

100K_1%

R4

12

24K_1%

C574

0.1uF_25v

C502

12

0.1uF_16v

6-

R6

2

+VADP

5-,6-

AC_AND_CHG

1

2

C571

1
2

D4

1

3

2

PDS540_5A_40V

1

S

D

2
3
4

G

U503-D

FAIR_LM324AM_SOP_14P

1

2

10pF_50v

Q2
8
7
6
5

AM4825P_AP

ADP_PRES

+V3AL

Q8

1

S1

2

G1

6

D1

3

D2

5

G2

4

S2

UM6K1N

6-,39-

191K_1%

R26

12

1M_5%

+V5AL

5-,7-

0.1uF_16v

34

1

2

V+

IN+

OUT

R25

23.7K_1%

MICREL_LMC7101BIM5_SOT23_5P

V-

IN-

5

4

+

+

12

OUT

14

-

11

13

-

+VADP1

R7

12

20K_5%

6-,7-,39-,43-

R523

10K_5%

6-,7-,14-,31-,39-,40-,47-

1

R41

4.7K_5%

ALARM

2

R45

1

100K_5%

2

1

R517

C525 1

0.1uF_16v

2

C5

12

U1

5-

+VADP1

1

2

2

24703VREF

R67

12

100_5%

1
2

0.1uF_25v

1

R125

0_5%

2

Kevin sense

5-

1

R522

150K_5%

2

1

R518

140K_1%

2

1N4148

D500

1

R123

10K_1%

2

R533

12

100K_1%

C531

3

ANODE

U504

ANPEC_APL431LBAC_SOT23_3P

1

R124

0_5%

+VBATR

2

R8

12

0.003_1%_1W

1

R13

2

100_1%

2

1

1
2

4.7uF_6.3v

C524

1uF_6.3v

R535

12

124_1%

2

CATHODE

1

REF

5-,7-,8-,9-,11-,13-,30-,39-

+VADP2

R40

6-

0.018_1%_1W

12

C6

12

1uF_6.3v

R46

12

1.62K_1%

Kevin sense

R49

12

1K_5%

R524

100K_5%

12

1

R516

60.4K_1%

2

1

C27

2

1

R515

43.2K_1%

2

1

R534

9.1K_1%

2

2

R14

100_1%

1

U2

ACN

9

ACP

26

ACDET

5

ENABLE

28

ACSEL

19

ALARM

2

SRSET

3

ACSET

27

ACPRES

13

IBAT

4

VREF

7

COMP
NC

23

NC

TI_BQ24703_QFN_28P

1

2

1

C26

2

1
2

150pF_50v

1
2

R47

150_5%

C29

4.7uF_6.3v

C24

ACDRV#

BATDRV#

BATSET
BATDEP

THERMAL

FAIR_LM324AM_SOP_14P

U503-B

4

+

+

5

OUT

7

-

6

11

-

C532

12

2200pF_50v

+VBATR

5-,7-,8-,9-,11-,13-,30-,39-

1uF_25v

D502

1

4.7uF_25v

PWM#

BATP

VHSP

MMGZ2548B

2

258
22

VCC

21
16

SRP

15

SRN

12
24
18

VS

20
6
1
17

GND

1114

NC

10

NC

29

R514

12

237K_1%

C522

2

1

1
2

1

R537

10K_5%

2

Q13

2

E

1

B

C

3

MMBT3906

1

R538

47K_5%

2

R5

1K_5%

3

1

D1

CHENMKO_BAT54_3P

1

2

1

R66

20K_1%

2

1

C28

2

180pF_50v

1

2

FAIR_LM324AM_SOP_14P

U503-A

4

+

+

3

OUT

1

-

2

11

-

Q14
1

B

MMBT3906

SSM3K7002F

1

R88

10K_5%

SSM3K7002F

2

R48

174K_1%

R65

7.87K_1%

C22

1
2

G

1

Q18
Q17

1

G

0.1uF_25v

Q508

3

D

G

S

2

SSM3K7002F

2

S

D

3
3

D

S

2

1

CHANGE by

1

2

2

E

C

3

1

22uF_25v

2

C25

OPEN

R531

4.7K_5%

C518

1
2

1

R145

133K_1%

2

1

R148

80.6K_1%

2

12

412K_1%

1

S

2
3

FDS4435BZ

1

R44

0_5%

2

1

R9

13.7K_1%

2
1

R10

300K_0.1%

2

1

R11

24K_0.1%

2

1

R12

8.87K_1%

2

Thomas Ho

R87

G

FAIR_LM324AM_SOP_14P

U503-C

4

+

+

10

OUT

8

-

11

9

-

C85

1
2

6800pF_25v

5-

H_STPCLK

32-

OCP_OC#

5-,11-,13-,14-,19-,29-,30-,32-,34-,37-,40-,41-,42-

1

R120

215K_1%

2

1

R122

80.6K_1%

2

Q6

8

D

7
6

L500

54

12

PLFC1045R_10uH

1

D22

SSM34_3A40V

Q3

3

D

G

S

2

SSM3K7002F

13-Jun-2007

5-,11-,13-,14-,19-,29-,30-,32-,34-,37-,40-,41-,42-

R146

2

1

100K_5%

R147

12

383K_1%

R149

12

36.5K_1%

3

1

D506

BAT54C_30V_0.2A

2

1
2

2

C530

1uF_10v

Place near L19

2

E

Q10

1

B

MMBT3906

C

Q512

1

2

C23

2

5

UM6K1N

R121

1M_5%

2

G1

G2

1K_1%

12

S1
D1

D2
S2

R43

1

6
3

4

1
2

C503

10uF_25v

C504

10uF_25v

3

1

R89

330K_5%

2

R506

0.015_1%_1W

12

12

R42

1K_1%

0.033uF_16v

1

Kevin sense

Note:

R9640

12

1K_5%

6CELLSEL#=1,Vcharger=12.6V

1

6CELLSEL#=0,Vcharger=16.8V

6-

6CELLSEL#

INVENTEC

TITLE

DDD Discrete

DC &BATTERY CHARGER

CODE

SIZE

A3

DOC. NUMBER

Model_No A01

CS

SHEET

D15

3

1

C402

2

1uF_25v

1

R397

10_5%

2

7-

+V5S

1

2

5-

+VBDC

C521

1

1

2

2

high power trace

OF

+V5S

1

BAT54S_30V_0.2A

MAX_LX5

R90

220K_5%

H_STPCLK

5-,6-

4.7uF_25v

REV

555

CHGCTRL_3

CHENKO_LL4148_2P

FIX39

FIX_MASK

FIX40

FIX_MASK

FIX41

FIX_MASK

FIX42

FIX_MASK

C523

1000pF_50v

2

5-,39-

D505

CN4001

TYCO_1746707_1_6P

G1
G2

EX17_BAT_GND

SCREW2.8_7_1P

S26

EX17_BAT_GND

1

C527

0.047uF_10v

2

1

R525

12

1K_5%

1

1

2

1

R526

470K_5%

2

+VBATA_EX17_BAT

CN4000

SYN_200046MR006G101ZR_6P

1

1

2

2

3

3

4

4

5

G

5

6

G

6

1
2
3
4
5
6

SCREW2.8_7_1P

S27

EX17_BAT_GND

17.0’W BATTERY EXTEND/B

1

R528

470K_5%

2

3

D

G

S

2

Q511

SSM3K7002F

1
2
3
4

G

5

G

6

EX17_BAT_GND

S28

EX17_BAT_GND

G1
G2

SCREW2.8_7_1P

+V3AL

5-,6-,7-,14-,31-,39-,40-,47-

5

U502

24

TC7S14F

3

AC_AND_CHG

ADP_PRES

5-

5-,7-,39-,43-

+VADP

5-

1

R70

10K_5%

2

R513

12

3K_5%

Q11

SSM3K7002F

2

S

D

G

1

D501

21

MMGZ2548B

+V3AL

220K_5%

3

+VADP2

5-

Q507

1

S

2
3
4

AM4825P_AP

5-,6-,7-,14-,31-,39-,40-,47-

12

R71

+VBATA

6-

CHENKO_LL4148_2P

2

D504

1

G

8

D

7
6
5

12

1.5M_5%

+V3AL

5-,6-,7-,14-,31-,39-,40-,47-

5- 6-

2

PAD500

3

1

4

POWERPAD_4A

Q500

8

1

S

D

2

7

3

6
5

4

G

AM4825P_AP

Q7

3

D

G

1

S

2

SSM3K7002F

SSM3K7002F

R50

SSM3K7002F

3

Q4

D

G

1

S

2

+VBATA+VBDC

1

R68

470K_5%

2

1

R69

4.7K_5%

2

Q509

3

D

1

G

S

2

THM_MAIN#

R7014

220K_5%

D2004

CHENKO_LL4148_2P

1

R9660

12

0_5%_OPEN

1
2

C34

OPEN

2

CHANGE by

SDA_MAIN
SCL_MAIN

+V3AL

D2007

CHENMKO_BAV99

+V3AL

39-

+V3AL

5-,6-,7-,14-,31-,39-,40-,47-

1

5

2

2

3

74HC1G14GV

+V3AL

R508

10K_5%

39­39-

5-,6-,7-,14-,31-,39-,40-,47-

1

3

2

5-,6-,7-,14-,31-,39-,40-,47-

1

R9657

100K_0.5%

2

U7003

4

39-

Thomas Ho

5-,6-,7-,14-,31-,39-,40-,47-

1

1

R507

10K_5%

2

2

1

3

2

D2006

CHENMKO_BAV99

BATCON

10_5%

R9661

12
12

10_5%R9662

C71

2

47pF_50v

C7005

1

0.1uF_16v

2

15-Jun-2007

1

R16

10K_5%

2

SYN_200046MR006G100ZU_6P

R17

12

100_5%

1
2

INVENTEC

TITLE

DDD Discrete

SELECT & BATTERY CONN

CODE

SIZE

A3

CS

SHEET

5-

6CELLSEL#

MAIN BATT

CN501

1

1

2

2

3

3

4

4

5

7

5

7

6

8

6

8

C505

0.1uF_25v

DOC. NUMBER

OF

655

REV

A01Model_No

ADP_PRES

KBC_PW_ON

13-,14-,30-,32-,33-,34-,36-,43-,45-,46-,47-

+V3A

PAD505

POWERPAD_2_0610

1

C717

2

1uF_6.3v

5-,6-,39-,43-

39-

17.4K_1%

4.7uF_25v

CYNTEC_PCMC063_3R3

1

C718

2

330uF_4v

C357

R367

+VBATP

7-

2

1
2

L520

12

1
2

1

+V5AL

5

3

1
2

+VBATR

5-,7-

U19

4

TC7SET32FU

R400

7.32K_1%

C356

4.7uF_25v

5-,8-,9-,11-,13-,30-,39-

POWERPAD_4A

12

51120GND

S1_D2

5
67

4

S2

Q34

FDS6900AS

PAD3

D1

G1

G2

+VBATP

7-

3
4

2VREF

5-,7-,14-

1

C378

2

1000pF_50v

51120GND

7

8

VO2

COMP2

TI_TPS51120_QFN_32P

9

EN5

10

EN3

C355

0.1uF_16v

12

R366

1

4.7_5%

1
2
8

3

+V3AL

5-,6-,14-,31-,39-,40-,47-

1

C374

4.7uF_6.3v

2

11

PGOOD2

12

2

EN2

13

VBST2

14

DRVH2

15

LL2

16

DRVL2

R683

15.4K_1%

+V5AL

5-,7-

C3731

4.7uF_6.3v

2

PGND2

17

CS2

18

1

2

6

VFB2

VREG3

19

5

GND

V5FILT

20

1
2

3

2

1

4

VO1

VFB1

VREF2

COMP1

SKIPSEL
TONSEL
PGOOD1

CS1

VIN

VREG5

PGND1

23

22

21

24

1

R682

7.32K_1%

2

R684

12

10_5%

C376

0.1uF_16v

R401

12

0_5%

U18

33
32
31
30
29

EN1

28

VBST1

27

DRVH1

26

LL1

25

DRVL1

1
2

51120GND

C375

1uF_10v

32-,39-

RSMRST#

1
2

R398

12

4.7_5%

C406

4.7uF_25v

8-,9-,10-,12-,13-,14-,32-,39-,43-,46-

2VREF

C377

12

0.1uF_16v

51120GND

SLP_S3#_3R

5-,7-,14-

5-

7.32K_1%

R686

12

MAX_LX5

30K_1%

R685

12

8

65

7

D

G

1S23

4

SI4800DY

765

8

D

G

S

Q37

FDS6690AS

41

23

Q38

1
2

+VBATP

7-

C405

1

C404

2

4.7uF_25v

4.7uF_25v

L523

12

SLF10040_4R7N7R0

C753

220uF_6.3v

1

1

C754

2

1uF_6.3v

2

8-,9-,10-,11-,12-,13-,14-,29-,30-,34-,38-

+V5A

PAD506

POWERPAD_2_0610

Thomas Ho 13-Jun-2007

INVENTEC

TITLE

DDD Discrete

SYSTEM POWER(3V/5V/12V)

CODE

DOC. NUMBERSIZE

A3

Model_No A01

CS

SHEET OFCHANGE by

REV

557

R134

12

43.2K_1%

R135

12

30K_1%

51124GND

51124GND

R138

12

30K_1%

R136

12

20.5K_1%

+V1.8

9-,10-,12-,13-,20-,23-,24-,26-,27-

PAD501

POWERPAD_2_0610

1

C526

2

220uF_2.5v

+VBATR

5-,7-,8-,9-,11-,13-,30-,39-

C42

1
2

4.7uF_25v

L501

12

C43

4.7uF_25v

1
2

CYNTEC_PCMC063_1R5

FDS6676AS

Q12

SI4800DY

Q9

8765

D

8

765

D

S

123

G

41S23

G

4

V1.8_PG

SLP_S4#_3R

0.1uF_16v

12-,32-

C79

12

14-

R91

12

4.7_5%

R127

12

0_5%_OPEN

6

VO2

7

PGOOD2

8

EN2

VBST2

10

DRVH2

TI_TPS51124RGER_QFN_24P

11

LL2

12

DRVL2

PGND2

13

R128

12

0_5%

51124GND

5

VFB2

TONSEL

TRIP2

V5FILT

14

1

R131

15.4K_1%

2

7-,9-,10-,12-,13-,14-,32-,39-,43-,46-

SLP_S3#_3R

U3

2

1

4

3

VO1

GND

VFB1

25

GND

24

PGOOD1

23

EN1

229

VBST1

21

DRVH1

20

LL1

19

DRVL1

TRIP1

V5IN

PGND1

17

15

16

18

14-

V1.25S_PG

C78

R132

12

7-,9-,10-,11-,12-,13-,14-,29-,30-,34-,38-

4.7_5%

12

0.1uF_16v

+V5A

G

41S23

G

4

R129

12

1

R130

15.4K_1%

2

1
2

C77

1uF_10v

10_5%

C76

1
2

4.7uF_6.3v

8765

D

Q22

FDS8884

8765

D

Q19

1S23

FDS6690AS

+VBATR

5-,7-,8-,9-,11-,13-,30-,39-

C86

1
2

4.7uF_25v

L502

12

PCMC063T_2R2MN

1
2

C87

4.7uF_25v

PAD503

POWERPAD_2_0610

1

C555

220uF_2.5v_R35

2

+V1.25S

10-,20-,24-,34-

INVENTEC

TITLE

DDD Discrete

CHANGE by

Thomas Ho

13-Jun-2007

SYSTEM POWER(+V1.8/+V1.25S)

CODE

CS

SHEET

DOC. NUMBERSIZE

855

A3

REV

A01Model_No

OF

+VPCIE

49-,50-,51-

POW_SW

+V1.8

8-,10-,12-,13-,20-,23-,24-,26-,27-

C347

OPEN

C343

12

10uF_6.3v

2
3
4
5
6
7
8
9

21

U15

NC
VLDO
VLDOFB
GND
ODOFF
OD
COMP
VOSW

TML-PAD

20

1

VBST

DRVH

VLDOIN

DRVL
PGND

V5IN

PGOOD

ENSW

ENLDO

VSWFB

TI_TPS51511_RHL_20P

11

10

C307

G

432

54

G

1

6

8D7

S

123

Q516

56789

1
2

Q32

SI7686DP_T1_E3

9

1

2

R327

12

0_5%

19
18

LL

17
16

R330

1

15

CS

14

10K_1%

13
12

R333

12

10K_1%

C345

0.1uF_16v

12

+V5A

2

7-,8-,10-,11-,12-,13-,14-,29-,30-,34-,38-

1
2

C346

4.7uF_6.3v

SI7336ADP

14-

VGA_PG

1

R328

2

1

2

R331

12

0_5%

VGAP_AGND

12.4K_1%

R329

20K_1%

1

R338

39K_1%

2

1
2

C344

1
2

22uF_6.3v

C342

1
2

1uF_10v

49-

C309

1
2

4.7uF_25v

D511

SSM34_3A40V

+VBATR

5-,7-,8-,11-,13-,30-,39-

C306

1

24.7uF_25v

4.7uF_25v

L515

12

MPC1040_0R88

C349

1
2

OPEN

1

R335

10K_1%

2

330uF_2v_9mR_Panasonic

1

R334

36.5K_1%

2

VGAP_AGND

C304

2

PAD504

3

1

4

POWERPAD_4A

12

+VDD_CORE

49-,51-

1

2

C285

220uF_2.5v_R35

SLP_S3#_3R

7-,8-,10-,12-,13-,14-,32-,39-,43-,46-

R336

12

150K_1%

1
2

C7006

0.1uF_16v

C348

1

0.1uF_16v

2

INVENTEC

TITLE

DDD Discrete

GRAPHIC POWER (+VGFX_CORE)

CHANGE by OF

Thomas Ho

2-Jun-2007

A3

CODE

CS

SHEET

DOC. NUMBER

955

REVSIZE

A01Model_No

+V5A

7-,8-,9-,10-,11-,12-,13-,14-,29-,30-,34-,38-

+V1.8

8-,9-,12-,13-,20-,23-,24-,26-,27-

G9338

SC339

C89

0.1uF_16v

VCCP_PG

0 ohm

OPEN

+V5A

1
2

+V1.25S

1
2

7-,8-,9-,10-,11-,12-,13-,14-,29-,30-,34-,38-

GMT_G9338_ADJTBUf_SOT23_6P

1

2

3

1

R156

OPEN

2

14-

R578

OPEN

0 ohm

R577

0 ohm

OPEN

R576R579

OPEN

0 ohm

8-,20-,24-,34-

C533

4.7uF_6.3v

12

OPEN

VCC

GND

PGD

U6

FDS6690AS

8
7
6
5

R157

6

DRV

5

ADJ

4

EN

C88

OPEN

7-,8-,9-,12-,13-,14-,32-,39-,43-,46-

1
2

Q515

D

+VCCP

10-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-

1

S

2
3
4

G

1

R158

47_5%

2

C90

1
2

0.033uF_16v

1

R153

OPEN

2

1

R160

113_1%

2

1

R159

100_1%

2

1
2

C535

10uF_6.3v

PAD502

POWERPAD_2_0610

C534

1
2

10uF_6.3v

+VCCP

10-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-

C669

1
2

1uF_10v

U12

6

VCNTL

7

POK

82

EN

VIN

GND

9

1

ANPEC_APL5913_KAC_TRL_SOP_8P

C268

1
2

22uF_6.3v

+V1.5S

13-,18-,24-,34-,45-,46-

PAD1

C299

39pF_50v

POWERPAD_2_0610

1

R276

27.4K_1%

2

1

R274

30K_1%

2

C267

C702

1

1

2

2

22uF_6.3v

5

VIN

3

VOUT

4

VOUT

FB

14-

V1.5S_PG

1uF_10v

1
2

SLP_S3#_3R

Added for VGA

R322

100K_5%

1

2

C339

0.1uF_16v

+V3S

1
2

+V5A

C340

0.1uF_16v

1
2

7-,8-,9-,10-,11-,12-,13-,14-,29-,30-,34-,38-

+V3S

10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-

U14

1

POK

2

VEN

36

VIN

4

VPP

GMT_G964_25_SOP8_8P

C212

1

4.7uF_6.3v

2

8

GND

7

ADJ

VO

5

NC

10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-

1

R323

10K_5%

2

1

2

R286

OPEN

POWERPAD_2_0610

C305

1

10uF_6.3v

2

+V2.5S

13-,49-,50-,51-

PAD2

CHANGE by

Thomas Ho

13-Jun-2007

INVENTEC

TITLE

DDD Discrete

SYSTEM POWER(+VCCP/+V1.5S)

CODE

SIZE

A3

DOC. NUMBER

Model_No A01

CS

SHEET

OF

REV

5510

10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-

VR_PWRGD_CK505

PWR_GOOD_3

VR_PWRGD_CK505

C664

330pF_50v

12

R222

1.65K_1%

0.012uF_16v

11-,15-

H_DPRSTP#

PM_DPRSLPVR

14-

11-,15-

12

C263

+V3S

R226

1K_5%

PSI#

C261

220pF_25v

12

1
2

1

2

17-

17-,20-,31-

20-,32-

R223

1

68K_1%

C264

680pF_50v

1
2

2

1
2

12

1K_5%_OPEN

R217

12

OPEN

C262

18pF_50v

+V5S

VCOREGND

5-,13-,14-,19-,29-,30-,32-,34-,37-,40-,41-,42-

11-

CSREF

18-

VCCSENSE

18-

1
2

VCOREGND

C665

1000pF_50v

R589

12

0_5%

VSSSENSE

CHENKO_LL4148_2P_OPEN

R227

H_VID6
H_VID5
H_VID4
H_VID3
H_VID2
H_VID1
H_VID0

R219

12

OPEN

R220

12

499_1%

VCOREGND

C663

4700pF_25v

1
2

12

3
4
5
6
7
8

9
10
11
12

C643

1000pF_50v

VCOREGND

D12

21

R229

12

665K_1%_OPEN

12

EN
PWRGD
PGDELAY
CLKEN
FBRTN
FB
COMP
SS
ST
VARFREQ
VRTT
TTSEN

1
2

C266

0.1uF_16v_OPEN

R9643

0_5%

18­18­18­18­18­18­18-

45

44

46

49

48

47

PSI

TML

VID0

DPRSLP

DPRSTP

U9

ADI_ADP3208_LFCSP_48P

CLIM

LLINE

PMON

PMONFS

17

16

13

14

15

2

R225

113K_1%

1

VCOREGND

VID1

VID243VID3

CSCOMP

CSFEF19CSSUM

18

1
2

42

+V3S

10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-

C265

12

0.1uF_16v_OPEN

5

2

3

TI_SN74LVC1G17DCKR_SC70_5P_OPEN

1

U10

32-

4

SB_3S_VRMPWRGD

2

+V5A

7-,8-,9-,10-,12-,13-,14-,29-,30-,34-,38-

2

R587

10_5%

1

C214

1

2

C642

2.2uF_16v

2

R228

76.8K_1%

1

2.2uF_16v

R190

12

4.7_5%

R191

12

4.7_5%

R172

12

100_5%

2

BAT54A

1uF_16v

+VBATR

41

40

39

VID4

VID5

VID6

RAMP20RPM22RT

VRPM

21

2

R195

150K_1%

1

274K_1%

2

C215

1000pF_50v

2

R588

100K_5%

1

37

SP

VCC

BST1

DRVH1

SW1
PVCC1
DRVL1

PGND1
PGND2

DRVL2
PVCC2

SW2

DRVH2

BST2

GND

23 38

24

R193

215K_1%

12

12

C216

0.01uF_16v

R194

1

1
2

VCOREGND

1

220K_1%

1

C217

2

330pF_50v

1

2

VCOREGND

36
35
34
33
32
31
30
29
28
27
26
25

VCOREGND

C164

1000pF_50v

R591

12

169K_1%

R590

12

169K_1%

R192

D510

3

2

1

C161

12

C162

1
2

12
C163

1uF_16v

5-,7-,8-,9-,11-,13-,30-,39-

1

R569

220K_5%

2

NTC thermistor, place near L16

OPEN

1

2

C550

100uF_25v

4.7uF_25v

1
2

+VBATR

C575

5-,7-,8-,9-,11-,13-,30-,39-

C122

1
2

C119

1
2

4.7uF_25v

4.7uF_25v

C123

1
2

4.7uF_25v

C124

1
2

4.7uF_25v

FDS6676AS

X 3

Q23

1
2

1
2

C121

4.7uF_25v

Q26

FDS6676AS

CHANGE by

C120

4.7uF_25v

G

4

G

41S23

56789

Q21

SI7686DP_T1_E3

G

321

4

L503

CYNTEC_PCMC104T_R36MN_2P

+VCC_CORE

18-

12

G

4321

G

3

4

G

4

Q25

8765

FDS6676AS

D

S

12

56789

Q27

SI7686DP_T1_E3

8765

D

Q24

FDS6676AS

S

23

1

R163

OPEN

C107

OPEN

C213

OPEN

1
2

R189

OPEN

1

2

CSREF

2
R570

10_1%

1

11-

2
R571

10_1%

1

L508

12

1

2

1
2

CYNTEC_PCMC104T_R36MN_2P

765

8

D

1S23

8765

D

INVENTEC

TITLE

DDD Discrete

CPU POWER(VCC_CORE)

CODE

SIZE

A3

CS

13-Jun-2007Thomas Ho

SHEET

11 55

REVDOC. NUMBER

A01Model_No

OF

SLP_S4#_3R

SLP_S3#_3R

8-,32-

7-,8-,9-,10-,13-,14-,32-,39-,43-,46-

+V1.8

8-,9-,10-,13-,20-,23-,24-,26-,27-

1
2

C82

4.7uF_6.3v

+V5A

7-,8-,9-,10-,11-,13-,14-,29-,30-,34-,38-

+V0.9S

28-

U5

GMT_G2997F6U_MSOP10_10P

11

TML1VDDQSNS

10

VIN VLDOIN

9

S5

8

GND4PGND

7

S3

6

C81

1uF_10v

1
2

VTTREF

C49

0.1uF_16v

11
2

20-,26-,27-

VTTSNS

VTT

2
3

5

M_VREF

1
2

C47

10uF_6.3v

2

C48

10uF_6.3v

NOTE: DDR2 REGULATOR

CHANGE by

INVENTEC

TITLE

DDD Discrete

DDR TERMINATION VOLTAGE

SIZE

2-Jun-2007Thomas Ho

A3

DOC. NUMBERCODE

CS

12 55

REV

A01Model_No

OFSHEET

7-,13-,14-,30-,32-,33-,34-,36-,43-,45-,46-,47-

+V3A

6
5
2

C408

1
2

0.047uF_16v

1

FDC655BN

R430

120K_1%

12

13-

GATE_3S GATE_5S

+V3S

10-,11-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-

Q39

4

D

S

3

G

1

1
R414

47_5%

C389

10uF_6.3v

2

2

7-,8-,9-,10-,11-,12-,14-,29-,30-,34-,38-

R435

120K_1%

12

13-

+V5A

6

D

5
2

13

FDC655BN

C409

1
2

0.047uF_16v

Q36

+V5S

5-,11-,14-,19-,29-,30-,32-,34-,37-,40-,41-,42-

4

S

G

GATE_3S

1

C390

2

10uF_6.3v

1

R415

100_5%

2

Added for VGA

R144

120K_1%

12

13-

C84

1
2

0.047uF_16v

+V1.8

8-,9-,10-,12-,20-,23-,24-,26-,27- 51-,52-,53-,54-

6
5
2

1

FDC655BN

6
5

2
13

FDC655BN

+V1.8S

Q15

4

D

S

3

G

Q16

4

D

S

G

R161

100_5%

+V2.5S

10-,49-,50-,51-

C308

1

1

1
2

1

2

C97

10uF_6.3v

R287

100_5%

10uF_6.3v

2

2

R460

100_5%

+V1.5S

10-,18-,24-,34-,45-,46-

1

2

SLP_S3#_3R

Q41

3

D

1

G

S

SSM3K7002F

2

1

C437

0.033uF_16v

2

SLP_S3#_3R

7-,13-,14-,30-,32-,33-,34-,36-,43-,45-,46-,47-

7-,8-,9-,10-,12-,13-,14-,32-,39-,43-,46-

7-,8-,9-,10-,12-,13-,14-,32-,39-,43-,46-

SSM3K7002F

Q43

G

1

+VBATR

+V3A

D

S

5-,7-,8-,9-,11-,13-,30-,39-

1

R462

47K_5%

2

1

B

Q47

MMBT3904

1

R431

100K_5%

2

SSM3K7002F

3

2

3

C

E

2

1

R461

130K_1%

2

+VBATR

5-,7-,8-,9-,11-,13-,30-,39-

1

2

E

B

1

C

Q42

3

D

1

G

S

2

R463

2.7K_5%

2

Q44

MMBT3906

3

Q45

1

G

SSM3K7002F

R432

12

1K_5%

3

D

S

2

D16

1

MMGZ2548B

2

1

R437

0_5%

2

13- 13-

1

R434

0_5%

2

Q33

1

G

SSM3K7002F

3

D

S

2

1

SSM3K7002F

SSM3K7002F

1

R436

0_5%

2

Q20

3

D

1

G

S

2

GATE_3SGATE_5S

1

R433

0_5%

2

INVENTEC

TITLE

DDD Discrete

POWER(SLEEP)

CODE REV

SIZE

A3

CHANGE by OF

Thomas Ho 13-Jun-2007

CS

SHEET

Q40

3

D

G

S

2

DOC. NUMBER

Model_No A01

5513

5-,6-,7-,14-,31-,39-,40-,47-

1

R444

100K_1%

2

C413

1
2

0.1uF_16v

+V3AL+V3AL

5-,6-,7-,14-,31-,39-,40-,47-

C414

1

0.1uF_16v

2

5

PHP_74LVC1G17_SOT753_5P

4

2

U524

3

1

R443

100K_5%

2

39-

VCC1_POR#_3

PWR_GOOD_3

SLP_S3#_3R

10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-

7-,8-,9-,10-,12-,13-,32-,39-,43-,46-

9-

VGA_PG

+V3S

5-,11-,13-,19-,29-,30-,32-,34-,37-,40-,41-,42-

+V5S

1

V1.25S_PG

V1.5S_PG

V1.8_PG

VCCP_PG

11-,14-

12

R98

1K_5%

DAP202K

R102

2

1K_5%

8-

10-

8-

10-

R99

12

68.1K_1%

R103

12

102K_1%

D5

R137

1

10K_5%

R97

12

10K_5%

R93

12

10K_5%

R95

1

10K_5%

CHENKO_LL4148_2PD6

21

R143

12

140K_1%

1

3

2

2

2

R100

49.9K_1%

1

2

1
2

1
2

C46

0.1uF_16v

R96

12

20K_5%

C45

1000pF_50v

1

2

R105

OPEN

R104

12

20K_5%

ON_LM393DR2G_SOP_8P

R140

12

100K_5%

C44

1
2

0.1uF_16v

R101

12

1M_5%

+V5A

7-,8-,9-,10-,11-,12-,13-,14-,29-,30-,34-,38-

U4-A

8

3

+

1

OUT

2

­4

2VREF

5-,7-

R94

12

1M_5%

1
2

+V5A

7-,8-,9-,10-,11-,12-,13-,14-,29-,30-,34-,38-

8

U4-B

5

+

7

OUT

6

-

ON_LM393DR2G_SOP_8P

4

+V3A

7-,13-,30-,32-,33-,34-,36-,43-,45-,46-,47-

1

R141

10K_5%

2

39-

C80

PWR_GOOD_KBC

0.1uF_16v

10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-

+V3S

1

R139

10K_5%

2

11-,14-

PWR_GOOD_3

CHANGE by

INVENTEC

TITLE

DDD Discrete

POWER(SEQUENCE)

CS

SHEET

DOC. NUMBER

OF

14 55

REV

A01Model_No

SIZE CODE

13-Jun-2007Thomas Ho

A3

+V3S

10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-

L517

BLM18AG471SN1D

2

1

10uF_6.3v

10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-

CLKREQ_R_SATA#

15-,32-

+VCCP

10-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-

2

10K_5%

R642

1

CPU_BSEL1

CPU_BSEL2

CLK_3S_REF

FSA

1
0

17-,20­17-,20­15-

C693

1
2

CLKREQ_R_MCH#

VR_PWRGD_CK505

FSB

FSC

0

1

0

1

R646

10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-

OPEN

20-

FSB CLOCK
FREQUENCY

12

R362

10K_5%

11-

667
800

R644

+V3S

*CLKREQ# pin controls SRC Table.

Byte5: bit6 =0(PWD)

SRC0

CR#_A

Byte5: bit7=0, disable CR#_A; 1,enable CR#_A

Byte5: bit2 =0(PWD)

SRC0

CR#_C

Byte5: bit3=0, disable CR#_C; 1,enable CR#_C

Byte5: bit6 =1

SRC2

Byte5: bit2 =1

SRC2

Layout note: All decoupling 0.1uF disperse closed to pin

C322

C714

1

1

2

2

0.1uF_16v

1
2

C321

0.1uF_16v

1
2

0.1uF_16v

+V3S

10K_5%R289

12

CPU_BSEL0

C351

1

CLK_R3S_ICH48

2

22pF_50v

10K_5%

12

10K_5%

1

R364

475_1%

2

12

HOST CLOCK

FREQUENCY

166
200

CLKREQ_R_SATA#

CLK_R3S_DEBUG

ICH_3S_SMCLK

ICH_3S_SMDATA

15-,32-

39-

10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-

C352

1

OPEN

2

CLK_R3S_MINICARD

19-,26-,27-,32­19-,26-,27-,32-

1

C716

33pF_50v

2

Please place close to CLKGEN within 500mils

Byte5: bit4 =0(PWD)

CR#_B

SRC1

Byte5: bit5=0, disable CR#_B; 1,enable CR#_B

Byte5: bit0 =0(PWD)

CR#_D

SRC1

Byte5: bit1=0, disable CR#_D; 1,enable CR#_D

C319

C316

1
2

0.1uF_16v

10-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-

10K_5%_OPEN

R356

12

17-,20-

2.2K_5%

12

R350

32-

33_5%

12

12

R361

45-

X501

14.31818MHZ

12

1
2

C715

33pF_50v

30PPM

C318

1
2

0.1uF_16v

+VCCP

R352

R357

OPEN

33_5%

+V3S

12

10K_5%

12

R353

Byte5: bit4 =1

SRC4

Byte5: bit0 =1

SRC4

2

1

475_1%R288

R360

1
2

1

2

C315

0.1uF_16v

33_5%

CLK_3S_ICH48

CLKREQ_SATA#

CLKREQ_MCH#

CLK_3S_DEBUG

CLK_3S_MINICARD

+V3S

10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-

Layout note: All decoupling 0.1uF disperse closed to pin

L518

BLM18AG471SN1D

1

2

1

C694

10uF_6.3v

2

U516

26

VDDSRC_IO

45

VDDSRC_IO

36

VDDSRC_IO

12

VDD96_IO

39

VDDSRC

61

VDDREF

20

VDDPLL3_IO

49

VDDCPU_IO

9

VDD48

2

VDDPCI

55

VDDCPU

16

VDD

10

SUB_48MHZ_FSLA

57

FSLB_TEST_MODE

62

REF0_FSLC_TEST_SEL

1

PCI0_CR#_A

3

PCI1_CR#_B

4

PCI2_TME

5

PCI3

56

CK_PWRGD_PD#

64

SCLK

63

SDTAT

60

X1

59

X2

8

GNDPCI

11

GND48

15

GND

19

GND

23

GNDSRC

29

GNDSRC

42

GNDSRC

58

GNDREF

52

GNDCPU

ICS_ICS9LPRS355BGLFT_TSSOP_64P

Byte6: bit7=0, disable CR#_E; 1,enable CR#_E

CR#_E

SRC6

Byte6: bit6=0, disable CR#_F; 1,enable CR#_F

CR#_F

SRC8

Byte6: bit5=0, disable CR#_G; 1,enable CR#_G

CR#_G

SRC9

Byte6: bit4=0, disable CR#_H; 1,enable CR#_H

CR#_H

SRC10

1

2

27MHz_NonSS_SRCT1_SE1

27MHz_SS_SRCC1_SE2

C323

C695

1

10uF_6.3v

2

0.1uF_16v

48

NC

38

PCI_STOP#

37

CPU_STOP#

51

CPUT1_F

50

CPUC1_F

54

CPUT0

53

CPUC0

CPUT2_ITP_SRCT8

CPUC2_ITP_SRCC8

SRCC0_DOTT_96
SRCT0_DOTC_96

47
46

33

SRCT11_CR#_H

32

SRCC11_CR#_G

34

SRCT10

35

SRCC10

30

SRCT9

31

SRCC9

44

SRCT7_CR#_F

43

SRCC7_CR#_E

41

SRCT6

40

SRCC6

6

PCI4_27_Select

7

PCI_F5_ITP_EN

27

SRCT4

28

SRCC4

24

SRCT3_CR#_C

25

SRCC3_CR#_D

21

SRCT2_SATAT

22

SRCC2_SATAC

17
18

13
14

10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-

10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-

C325

1

1

2

2

0.1uF_16v

0.1uF_16v

CLK_R_MCHBCLK
CLK_R_MCHBCLK#

CLK_R_CPUBCLK
CLK_R_CPUBCLK#

CLK_R_XDP

CLK_R_XDP#

CLK_REQH#
CLK_REQG#

CLK_R_PCIE_NEWCARD

CLK_R_PCIE_NEWCARD#

CLK_R_PCIE_MINI2
CLK_R_PCIE_MINI2#

CLK_R_DREF
CLK_R_DREF#

CLK_3S_KBPCI

CLK_3S_ICHPCI
CLK_R_PEG_MCH
CLK_R_PEG_MCH#
CLK_R_PCIE_ICH
CLK_R_PCIE_ICH#
CLK_R_SATA1
CLK_R_SATA1#

C324

10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-

+V3S

R271

10K_5%_OPEN

C320

1
2

0.1uF_16v

CLK_3S_REF

1
2

C317

0.1uF_16v

C326

1
2

0.1uF_16v

ITP_EN =0
SRC8/SRC8#

ITP_EN =1
ITP/ITP#

15-

1

1

R270

10K_5%_OPEN

2

2

2

475_1%
475_1%

22_5% 12

12

12

R645

12

R647

R2691

12

R655

R359
R34933_5%

R351

10K_5%

R348

OPEN

1

2

12

12

22_5%

22_5%

LAYOUT NOTES : THE R684 , R685 , R683 CLOSED TO U21

CHANGE by

Thomas Ho

13-Jun-2007

1

R654

R268

10K_5%

10K_5%

2

32­32-

21­21-

16­16-

19-

19-

46­45-

46-

CLK_R_PCIE_NEWCARD

46-

CLK_R_PCIE_NEWCARD#

45­45-

50­50-

39­33-

20­20-

32­32-

31­31-

+V3S+V3S

R363

12

OPEN

R358

12

10K_5%

39-

CLK_R3S_KBC14

32-

CLK_R3S_ICH14

INVENTEC

TITLE

DDD Discrete

CLOCK_GENERATOR

CODE

CS

SHEET

DOC. NUMBER

SIZE

A3

PCISTOP#_3
CPUSTOP#_3

CLK_R_MCHBCLK
CLK_R_MCHBCLK#

CLK_R_CPUBCLK
CLK_R_CPUBCLK#

CLK_R_XDP

CLK_R_XDP#
CLK_R_REQH#

CLK_R_REQG#

CLK_R_PCIE_MINI2
CLK_R_PCIE_MINI2#

CLK_R_DREF
CLK_R_DREF#

CLK_R3S_KBPCI
CLK_R3S_ICHPCI

CLK_R_PEG_MCH
CLK_R_PEG_MCH#

CLK_R_PCIE_ICH
CLK_R_PCIE_ICH#

CLK_R_SATA1
CLK_R_SATA1#

27_Selet =0

LCD_SST 100MHZ

27_Selet =1

27MHZ non-spread clock

OF

15 55

REV

A01Model_No

H_A#(35:3)

H_ADSTB#1

H_STPCLK#

H_A20M#
H_FERR#

H_IGNNE#

H_INTR

H_NMI

H_SMI#

21-

H_A#(3)
H_A#(4)
H_A#(5)
H_A#(6)
H_A#(7)
H_A#(8)
H_A#(9)
H_A#(10)
H_A#(11)
H_A#(12)
H_A#(13)
H_A#(14)
H_A#(15)
H_A#(16)

H_REQ#(4:0) H_RS#(2:0)

H_A#(17)
H_A#(18)
H_A#(19)
H_A#(20)
H_A#(21)
H_A#(22)
H_A#(23)
H_A#(24)
H_A#(25)
H_A#(26)
H_A#(27)
H_A#(28)
H_A#(29)
H_A#(30)
H_A#(31)
H_A#(32)
H_A#(33)
H_A#(34)
H_A#(35)

21-

31­31­31-

31­31­31-

21-

H_REQ#(0)
H_REQ#(1)
H_REQ#(2)
H_REQ#(3)
H_REQ#(4)

H_ADSTB#0

21-

CN506-1

J4

A3#

L5

A4#

L4

A5#

K5

A6#

M3

A7#

N2

A8#

J1

A9#

N3

A10#

P5

A11#

P2

A12#

L2

A13#

P4

A14#

P1

A15#

R1

A16#

M1

ADSTB0#

K3

REQ0#

H2

REQ1#

K2

REQ2#

J3

REQ3#

L1

REQ4#

Y2

A17#

U5

A18#

R3

A19#

W6

A20#

U4

A21#

Y5

A22#

U1

A23#

R4

A24#

T5

A25#

T3

A26#

W2

A27#

W5

A28#

Y4

A29#

U2

A30#

V4

A31#

W3

A32#

AA4

A33#

AB2

A34#

AA3

A35#

V1

ADSTB1#

A6

A20M#

A5

FERR#

C4

IGNNE#

D5

STPCLK#

C6

LINT0

B4

LINT1

A3

SMI#

M4

RSVD01

N5

RSVD02

T2

RSVD03

V3

RSVD04

B2

RSVD05

C3

RSVD06

D2

RSVD07

D22

RSVD08

D3

RSVD09

F6

RSVD010

FOX_PZ4782K_274M_41_478P

GMCH

CPU

ADS#
BNR#
BPRI#

DEFER#

DRDY#
DBSY#

BR0#

IERR#

ADDR GROUP 0

INIT#

CONTROL

LOCK#

RESET#

RS0#

RS1#

RS2#

TRDY#

HIT#

HITM#

BPM0#
BPM1#
BPM2#
BPM3#
PRDY#
PREQ#

TCK

ADDR GROUP 1

TDO
TMS

XDP/ITP SIGNALS

TRST#

DBR#

THERMAL

PROCHOT#

THERMDA
THERMDC

THERMTRIP#

ICH

H CLK

BCLK0
BCLK1

RESERVED

H1
E2
G5

H5
F21
E1

F1

D20
B3

H4

C1
F3
F4
G3
G2

G6
E4

AD4
AD3
AD1
AC4
AC2
AC1
AC5
AA6

TDI

AB3
AB5
AB6
C20

+VCCP

10mils/10mils

ICH8

10-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-

56_5%

12

R166

D21
A24
B25

C7

A22
A21

+VCCP

21-

H_ADS#

21-

H_BNR#

21-

H_BPRI#

21-

H_DEFER#

21-

H_DRDY#

21-

H_DBSY#

21-

H_BREQ#0

31-

H_INIT#

21-

H_LOCK#

19-,21-

H_CPURST#

21-

H_TRDY#

21-

H_HIT#

21-

H_HITM#

19-

H_BPM0_XDP#

19-

H_BPM1_XDP#

19-

H_BPM2_XDP#

19-

H_BPM3_XDP#

19-

H_BPM4_PRDY#

16-,19-

H_BPM5_PREQ#

16-,19-

H_TCK

16-,19-

TDI_FLEX

19-

H_TDO

16-,19-

H_TMS

19-,32-

XDP_DBRESET#

19-

H_THERMDA

19-,49-

THERM_MINUS

19-,20-,31-

PM_THRMTRIP#

15-

CLK_R_CPUBCLK

15-31-

CLK_R_CPUBCLK#

+VCCP

10-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-

R240

2

1

51_5%

H_RS#(0)
H_RS#(1)
H_RS#(2)

R630

12

51_5%

R234

2

1

51_5%

R235

2

1

51_5%

R639

12

51_5%

+VCCP

10-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-

21-

16-,19-

H_BPM5_PREQ#

16-,19-

TDI_FLEX

16-,19-

H_TMS

16-,19-

H_TCK

+VCCP

10-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-

1

R165

56_5%

CLOSED TO CPU

2

51 ohm +/-1% pull-up to +VCCP
(VCCP) if ITP is implemented

19-

1

R233

51_5%

2

H_TRST#

PM_THRMTRIP# should be T at CPU

CHANGE by

Thomas Ho

2-Jun-2007

INVENTEC

TITLE

DDD Discrete

MEROM-1

CODESIZE

A3

CS

SHEET

16 55

REVDOC. NUMBER

A01Model_No

OF

H_D#(63:0)

H_DSTBN#0
H_DSTBP#0

H_DINV#0

H_D#(63:0)

+VCCP

10-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-

1

R543

1K_1%

2

1

2

R544

2K_1%

GTLREF

Layout note: Zo=55 ohm,

0.5" max for GTLREF.

17-,21-

21­21­21-

17-,21-

H_DSTBN#1
H_DSTBP#1

H_DINV#1

CPU_BSEL0
CPU_BSEL1
CPU_BSEL2

CN506-2

H_D#(0)
H_D#(1)
H_D#(2)
H_D#(3)
H_D#(4)
H_D#(5)
H_D#(6)
H_D#(7)
H_D#(8)
H_D#(9)
H_D#(10)
H_D#(11)
H_D#(12)
H_D#(13)
H_D#(14)
H_D#(15)

H_D#(16)
H_D#(17)
H_D#(18)
H_D#(19)
H_D#(20)
H_D#(21)
H_D#(22)
H_D#(23)
H_D#(24)
H_D#(25)
H_D#(26)
H_D#(27)
H_D#(28)
H_D#(29)
H_D#(30)
H_D#(31)

21­21­21-

15-,20­15-,20­15-,20-

1

2

R164

OPEN

1

2

R547

OPEN

C549

1
2

0.1uF_16v_OPEN

Place C549(0.1uF_16V) close to the TEST4 pin.
Make sure TEST4 routing is reference
to GND and away from other noisy signals.

E22

D0#

F24

D1#

E26

D2#

G22

D3#

F23

D4#

G25

D5#

E25

D6#

E23

D7#

K24

D8#

G24

DATA GRP 0

D9#

J24

D10#

J23

D11#

H22

D12#

F26

D13#

K22

D14#

H23

D15#

J26

DSTBN0#

H26

DSTBP0#

H25

DINV0#

N22

D16#

K25

D17#

P26

D18#

R23

D19#

L23

D20#

M24

D21#

L22

D22#

M23

D23#

P25

D24#

P23

D25#

P22

DATA GRP 1

D26#

T24

D27#

R24

D28#

L25

D29#

T25

D30#

N25

D31#

L26

DSTBN1#

M26

DSTBP1#

N24

DINV1#

AD26

GTLREF

C23

TEST1

D25

TEST2

C24

TEST3

MISC

AF26

TEST4

AF1

TEST5

A26

TEST6

B22

BSEL0

B23

BSEL1

C21

BSEL2

FOX_PZ4782K_274M_41_478P

D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#

DATA GRP 2DATA GRP 3

D41#
D42#
D43#
D44#
D45#
D46#
D47#

DSTBN2#

DSTBP2#

DINV2#

D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63#

DSTBN3#

DSTBP3#

DINV3#

COMP0
COMP1
COMP2
COMP3

DPRSTP#

DPSLP#
DPWR#

PWRGOOD

SLP#

PSI#

Y22
AB24
V24
V26
V23
T22
U25
U23
Y25
W22
Y23
W24
W25
AA23
AA24
AB25
Y26
AA26
U22

AE24
AD24
AA21
AB22
AB21
AC26
AD20
AE22
AF23
AC25
AE21
AD21
AC22
AD23
AF22
AC23
AE25
AF24
AC20

R26
U26
AA1
Y1

E5
B5
D24
D6
D7
AE6

1

2

R238

OPEN

11-,20-,31-

12

R546 27.4_1%

12

R545 54.9_1%

12

27.4_1%R236

12

R237

H_DPRSTP#

54.9_1%

CLOSED TO CPU

+VCCP

10-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-

H_D#(32)
H_D#(33)
H_D#(34)
H_D#(35)
H_D#(36)
H_D#(37)
H_D#(38)
H_D#(39)
H_D#(40)
H_D#(41)
H_D#(42)
H_D#(43)
H_D#(44)
H_D#(45)
H_D#(46)
H_D#(47)

H_D#(48)
H_D#(49)
H_D#(50)
H_D#(51)
H_D#(52)
H_D#(53)
H_D#(54)
H_D#(55)
H_D#(56)
H_D#(57)
H_D#(58)
H_D#(59)
H_D#(60)
H_D#(61)
H_D#(62)
H_D#(63)

21-

H_DSTBN#3

21-

H_DSTBP#3

21-

H_DINV#3

31-

H_DPSLP#

21-

H_DPWR#

21-

H_CPUSLP#

11-

PSI#

Place series resistor (R211 = 1K ohm) on H_PWRGD_XDP without stub

17-,21-

17-,21-

21­21­21-

H_D#(63:0)

H_DSTBN#2
H_DSTBP#2
H_DINV#2

H_D#(63:0)

R239

12

1K_5%

31-

H_PWRGD

19-

H_PWRGD_XDP

CHANGE by

INVENTEC

TITLE

DDD Discrete

MEROM-2

CODE

SIZE

2-Jun-2007Thomas Ho

A3

CS

SHEET

DOC. NUMBER

17 55

REV

A01Model_No

OF