HP 4520s Schematics

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Wistron Confidential
C C
PV
2009/10/19 REV :PV-01
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A A
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http://hobi-elektronika.net
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<Variant Name>
<Variant Name>
<Variant Name>
Wistron Incorporated
Wistron Incorporated
Wistron Incorporated
21F, 88, Hsin Tai Wu Rd
21F, 88, Hsin Tai Wu Rd
21F, 88, Hsin Tai Wu Rd Hsichih, Taipei
Hsichih, Taipei
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
S-Class Intel
S-Class Intel
S-Class Intel
S-Class Intel
S-Class Intel
S-Class Intel
Hsichih, Taipei
1
162Wednesday, October 28, 2009
162Wednesday, October 28, 2009
162Wednesday, October 28, 2009
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SYSTEM DC/DC
Intel Calpella Arrandale Block Diagram
VRAM
Clock Generator
D D
ICS9LRS3197
23
64MBx16 64MBx16
4
29
DDR3
DDRIII
800/1066/1333
DDRIII
800/1066/1333
Slot 0
Slot 1
12
13
DDRII Channel A
DDR II Channel B
FDIx4
Intel CPU
Arrandale
4,5,6,7,8,9,10
DMIx4
PCI EXPRESS GRAPHIC
ATI M93-S3
24,25,26,27,28
Thermal Sensor
GMT G781
Accelerometer
ST HP302DL
Fringer printer
VFS451
CAMERA
BLUETOOTH
USB x 3 HDD
LCD
31
32
33
38
36
47
R.G.B
LVDS
HDMI
USB 2.0
PCIE
HD Audio
Intel
PCH
14 USB 2.0/1.1 ports
ETHERNET (10/100/1000Mb)
High Definition Audio
6 SATA ports
8 PCIE ports
ACPI 1.1
LPC I/F
PCI/PCI BRIDGE
SMBus
USB 2.0
SATAII
SATAII+USB2.0
LPC Bus
CRT
1600X1200@75
C C
WXGA+
HDMI
SD/MMC MS/MS Pro/xD
38
RJ45 CONN
B B
37
RJ11 CONN
RealTek
RTS5138
CardReader
RealTek
RTL8151DH
10/100/1000
MODEM MDC V1.5 HP Vulcan
DIGITAL MIC
Pre-AMP
MIC IN TLV2462
42
HEADPHONE
A A
2CH SPEAKER
AUDIO CODEC
IDT 92HD80
41
PCIE+USB 2.0
G577DSR91U
35
Express Card
35
14,15...,21,22
PCIE+USB 2.0
Mini-Card
WLAN
39
USB 2.0
Mini-Card
WWAN
SIM Card
5
4
http://hobi-elektronika.net
3
SPI
SPI
40
40
Flash ROM
4 MB
VRAM
DDR3
R.G.B
LVDS
HDMI
11
39
34
32
44
KBC
SMSC KBC1098
Touch PAD
45 47
47
2
4
30
CRT
31
1600X1200@75
LCD
WXGA+
HDMI
32
33
SYSTEM DC/DC
RT8207GQW
INPUTS
DCBATOUT
+.1.5VU +0.75VS
OUTPUTS
+1.5VU
56
SYSTEM DC/DC
RT8208AGQW
INPUTS
DCBATOUT
e-SATA
LPC debug
46
Int. KB
OUTPUTS
+VGA_CORE
59
3544
ODD
35
44
45
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
Block Diagram
Block Diagram
Block Diagram
S-Class Intel
S-Class Intel
S-Class Intel
RT8205A
INPUTS
DCBATOUT
OUTPUTS
+5VALW
+3VALW
+3VL
SYSTEM DC/DC
RT8209B
INPUTS
DCBATOUT
OUTPUTS
+1.05VS_VTT
+1.05VS
SYSTEM DC/DC
ADP3211MNR2G
INPUTS
DCBATOUT +VCC_GFX_CORE
OUTPUTS
TI CHARGER
BQ24740
INPUTS
OUTPUTS
BT+
DCBATOUT
18V 3.0A
5V 100mA
CPU DC/DC
ADP3212MNR2G
INPUTS
DCBATOUT
OUTPUTS
+VCC_CORE
0.844~1.3V 65A
SYSTEM DC/DC
APL5930/APL5930
INPUTS
+3VS
+1.5VS +1.1V_REG
OUTPUTS
+1.8VS_NB +1.8VS_VGA
PCB 6 LAYER
Signal 1
L1:
GND
L2:
Signal 2
L3: L4:
Signal 3 VCC
L5: L6:
Signal 4
Wistron Incorporated
Wistron Incorporated
Wistron Incorporated
21F, 88, Hsin Tai Wu Rd
21F, 88, Hsin Tai Wu Rd
21F, 88, Hsin Tai Wu Rd Hsichih, Taipei
Hsichih, Taipei
Hsichih, Taipei
262Wednesday, October 28, 2009
262Wednesday, October 28, 2009
262Wednesday, October 28, 2009
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Calpella Schematic Checklist Rev.0_7
Name Schematics Notes
SPKR
4 4
3 3
INIT3_3V# Weak internal pull-down. Do not pull high.
GNT3#/ GPIO55
INTVRMEN
GNT0#, GNT1#
GNT2#/ GPIO53
GPIO33
SPI_MOSI
NV_ALE
NC_CLE Weak internal pull-up. Do not pull low.
HAD_DOCK_EN# /GPIO[33]
HDA_SDO Weak internal pull-down. Do not pull high.
HDA_SYNC
GPIO15
GPIO8
GPIO27
2 2
LANE2
LANE4
LANE6 LAN
1 1
Reboot option at power-up
Internal weak Pull-down.
Default Mode:
Connect to Vcc3_3 with 8.2-kȍ
No Reboot Mode with TCO Disabled:
- 10-kȍ weak pull-up resistor.
Internal pull-up.
Default Mode:
(Connect to ground with 4.7-kȍ weak
Low (0) = Top Block Swap Mode
pull-down resistor).
High (1) = Integrated VRM is enabled Low (0) = Integrated VRM is disabled
Left both GNT0# and GNT1# floating. No pull up
Default (SPI):
required.
Connect GNT1# to ground with 1-kȍ pull-down
Boot from PCI:
resistor. Leave GNT0# Floating.
Connect both GNT0# and GNT1# to ground with 1-kȍ
Boot from LPC:
pull-down resistor.
Default - Internal pull-up.
= Configures DMI for ESI compatible operation (for servers
Low (0)
only. Not for mobile/desktops).
Do not pull low.
Default:
Connect to ground with 1-kȍ
Disable ME in Manufacturing Mode:
pull-down resistor.
Connect to Vcc3_3 with 8.2-kȍ weak pull-up resistor.
Enable iTPM:
Left floating, no pull-down required.
Disable iTPM:
Connect to Vcc3_3 with 8.2-kȍ weak pull-up
Enable Danbury:
resistor. Connect to ground with 4.7-kȍ weak pull-down
Disable Danbury:
resistor.
Flash Descriptor Security will be overridden.
Low (0):
Flash Descriptor Security will be in effect.
High (1) :
Weak internal pull-down. Do not pull high.
Weak internal pull-down. Do not pull high.
Weak internal pull-up. Do not pull low.
Default = Do not connect (floating)
High(1) = Enables the internal VccVRM to have a clean supply for analog rails. No need to use on-board filter circuit. Low (0) = Disables the VccVRM. Need to use on-board filter circuits for analog rails.
page 15 page 18
EXP
WLAN
USB TablePCIE Routing
Pair
0
1
2
3
4 NEW CARD
5
6
7
8
9
10
11
12
13
Device
External USB2
USB1 (Debug port)
ESATA USB4
Card Reader
FREE
WLAN
FREE
BLUETOOTH
WWAN
Fingerprint
External USB3
CAMERA
FREE
091019-1
Pin Name
CFG[4] Disabled - No Physical Display Port attached to
CFG[3]
CFG[0]
CFG[7]
Strap Description Configuration (Default value for each bit is
DisplayPort Presence
PCI-Express Static Lane Reversal
PCI-Express Configuration Select
Reserved ­Temporarily used for early Clarksfield samples.
SMBUS Control Table
AB1A_DATA AB1A_CLK
SML1CLK SML1DATA
PCH_SMB_DATA PCH_SMB_CLK
1 unless specified otherwise)
1:Embedded
Embedded DisplayPort.
Enabled - An external Display Port device is
0:
connected to the Embedded Display Port.
Normal Operation.
1:
Lane Numbers Reversed 15 -> 0, 14 -> 1, ...
0:
Single PCI-Express Graphics
1:
Bifurcation enabled
0:
-
Clarksfield (only for early samples pre-ES1)
Connect to GND with 3.01K Ohm/5% resistor
Only temporary for early CFD samples
Note:
(rPGA/BGA) [For details please refer to the WW33 MoW and sighting report]. For a common motherboard design (for AUB and CFD), the pull-down resistor should be used. Does not impact AUB functionality.
SOURCE
SMSC1098
Calpella
Calpella
http://hobi-elektronika.net
A
B
C
Calpella Schematic Checklist Rev.0_7
Default Value
1
1
1
0
BATT
THERMAL SENSOR
CLK GEN
SODIMM G-SENSOR
SMSC1098
V XX X X X
XX X X
X
X VV V V
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet of
Date: Sheet
D
Date: Sheet
V
X
Notes List
Notes List
Notes List
S-Class Intel
S-Class Intel
S-Class Intel
E
090901-1
M93
X
V
X
Wistron Incorporated
Wistron Incorporated
Wistron Incorporated
21F, 88, Hsin Tai Wu Rd
21F, 88, Hsin Tai Wu Rd
21F, 88, Hsin Tai Wu Rd Hsichih, Taipei
Hsichih, Taipei
Hsichih, Taipei
of
of
362Wednesday, October 28, 2009
362Wednesday, October 28, 2009
362Wednesday, October 28, 2009
SD
SD
SD
Processor StrappingPCH Strapping
5
A
4
3
2
1
CPU(1/7)
1 OF 9
U1A
A24 C23 B22 A21
B24 D23 B23 A22
D24 G24 F23 H23
D25 F24 E23 G23
E22 D21 D19 D18 G21 E19 F21 G18
D22 C21 D20 C18 G22 E20 F20 G19
F17 E17
C17 F18
D17
U1A
DMI_RX0# DMI_RX1# DMI_RX2# DMI_RX3#
DMI_RX0 DMI_RX1 DMI_RX2 DMI_RX3
DMI_TX0# DMI_TX1# DMI_TX2# DMI_TX3#
DMI_TX0 DMI_TX1 DMI_TX2 DMI_TX3
FDI_TX0# FDI_TX1# FDI_TX2# FDI_TX3# FDI_TX4# FDI_TX5# FDI_TX6# FDI_TX7#
FDI_TX0 FDI_TX1 FDI_TX2 FDI_TX3 FDI_TX4 FDI_TX5 FDI_TX6 FDI_TX7
FDI_FSYNC0 FDI_FSYNC1
FDI_INT FDI_LSYNC0
FDI_LSYNC1
AUBURNDALE
AUBURNDALE
D D
DMI_TXN016 DMI_TXN116 DMI_TXN216 DMI_TXN316
DMI_TXP016 DMI_TXP116 DMI_TXP216 DMI_TXP316
DMI_RXN016 DMI_RXN116 DMI_RXN216 DMI_RXN316
DMI_RXP016 DMI_RXP116 DMI_RXP216 DMI_RXP316
FDI_TXN016 FDI_TXN116 FDI_TXN216
C C
FDI_TXN316 FDI_TXN416 FDI_TXN516 FDI_TXN616 FDI_TXN716
FDI_TXP016 FDI_TXP116 FDI_TXP216 FDI_TXP316 FDI_TXP416 FDI_TXP516 FDI_TXP616 FDI_TXP716
FDI_FSYNC016 FDI_FSYNC116
FDI_INT16 FDI_LSYNC016
FDI_LSYNC116
B B
AUBURUNF
AUBURUNF
1 OF 9
PEG_ICOMPI
PEG_ICOMPO
PEG_RCOMPO
PEG_RBIAS
PEG_RX0# PEG_RX1# PEG_RX2#
DMI
DMI
PEG_RX3# PEG_RX4# PEG_RX5# PEG_RX6# PEG_RX7# PEG_RX8#
PEG_RX9# PEG_RX10# PEG_RX11# PEG_RX12# PEG_RX13# PEG_RX14# PEG_RX15#
PEG_RX0 PEG_RX1 PEG_RX2 PEG_RX3 PEG_RX4 PEG_RX5
Intel(R) FDI
Intel(R) FDI
PEG_RX6 PEG_RX7 PEG_RX8
PEG_RX9 PEG_RX10 PEG_RX11 PEG_RX12 PEG_RX13 PEG_RX14 PEG_RX15
PEG_TX0# PEG_TX1# PEG_TX2# PEG_TX3# PEG_TX4# PEG_TX5# PEG_TX6# PEG_TX7# PEG_TX8# PEG_TX9#
PEG_TX10# PEG_TX11# PEG_TX12# PEG_TX13# PEG_TX14# PEG_TX15#
PEG_TX0
PEG_TX1
PEG_TX2
PEG_TX3
PCI EXPRESS -- GRAPHICS
PCI EXPRESS -- GRAPHICS
PEG_TX4
PEG_TX5
PEG_TX6
PEG_TX7
PEG_TX8
PEG_TX9 PEG_TX10 PEG_TX11 PEG_TX12 PEG_TX13 PEG_TX14 PEG_TX15
B26 A26 B27 A25
K35 J34 J33 G35 G32 F34 F31 D35 E33 C33 D32 B32 C31 B28 B30 A31
J35 H34 H33 F35 G33 E34 F32 D34 F33 B33 D31 A32 C30 A28 B29 A30
L33 M35 M33 M30 L31 K32 M29 J31 K29 H30 H29 F29 E28 D29 D27 C26
L34 M34 M32 L30 M31 K31 M28 H31 K28 G30 G29 F28 E27 D28 C27 C25
PEG_IRCOMP_R
EXP_RCOMPO
PEG_RXN15 PEG_RXN14 PEG_RXN13 PEG_RXN12 PEG_RXN11 PEG_RXN10 PEG_RXN9 PEG_RXN8 PEG_RXN7 PEG_RXN6 PEG_RXN5 PEG_RXN4 PEG_RXN3 PEG_RXN2 PEG_RXN1 PEG_RXN0
PEG_RXP15 PEG_RXP14 PEG_RXP13 PEG_RXP12 PEG_RXP11 PEG_RXP10 PEG_RXP9 PEG_RXP8 PEG_RXP7 PEG_RXP6 PEG_RXP5 PEG_RXP4 PEG_RXP3 PEG_RXP2 PEG_RXP1 PEG_RXP0
P_TXN15 P_TXN14 P_TXN13 P_TXN12 P_TXN11 P_TXN10 P_TXN9 P_TXN8 P_TXN7 P_TXN6 P_TXN5 P_TXN4 P_TXN3 P_TXN2 P_TXN1 P_TXN0
P_TXP15 P_TXP14 P_TXP13 P_TXP12 P_TXP11 P_TXP10 P_TXP9 P_TXP8 P_TXP7 P_TXP6 P_TXP5 P_TXP4 P_TXP3 P_TXP2 P_TXP1 P_TXP0
R516
R516
1 2
R515
R515
1 2
1 2
DIS
DIS
1 2
DIS
DIS
1 2
DIS
DIS
1 2
DIS
DIS
1 2
DIS
DIS
1 2
DIS
DIS
1 2
DIS
DIS
1 2
DIS
DIS
1 2
DIS
DIS
1 2
DIS
DIS
1 2
DIS
DIS
1 2
DIS
DIS
1 2
DIS
DIS
1 2
DIS
DIS
1 2
DIS
DIS
1 2
DIS
DIS
1 2
DIS
DIS
1 2
DIS
DIS
1 2
DIS
DIS
1 2
DIS
DIS
1 2
DIS
DIS
1 2
DIS
DIS
1 2
DIS
DIS
1 2
DIS
DIS
1 2
DIS
DIS
1 2
DIS
DIS
1 2
DIS
DIS
1 2
DIS
DIS
1 2
DIS
DIS
1 2
DIS
DIS
1 2
DIS
DIS
1 2
DIS
DIS
49D9R2F-GP
49D9R2F-GP
750R2F-GP
750R2F-GP
C168SCD1U10V2KX-5GP
C168SCD1U10V2KX-5GP C145SCD1U10V2KX-5GP
C145SCD1U10V2KX-5GP C151SCD1U10V2KX-5GP
C151SCD1U10V2KX-5GP C170SCD1U10V2KX-5GP
C170SCD1U10V2KX-5GP C179SCD1U10V2KX-5GP
C179SCD1U10V2KX-5GP C178SCD1U10V2KX-5GP
C178SCD1U10V2KX-5GP C187SCD1U10V2KX-5GP
C187SCD1U10V2KX-5GP C194SCD1U10V2KX-5GP
C194SCD1U10V2KX-5GP C198SCD1U10V2KX-5GP
C198SCD1U10V2KX-5GP C201SCD1U10V2KX-5GP
C201SCD1U10V2KX-5GP C203SCD1U10V2KX-5GP
C203SCD1U10V2KX-5GP C208SCD1U10V2KX-5GP
C208SCD1U10V2KX-5GP C212SCD1U10V2KX-5GP
C212SCD1U10V2KX-5GP C219SCD1U10V2KX-5GP
C219SCD1U10V2KX-5GP C223SCD1U10V2KX-5GP
C223SCD1U10V2KX-5GP C229SCD1U10V2KX-5GP
C229SCD1U10V2KX-5GP C158SCD1U10V2KX-5GP
C158SCD1U10V2KX-5GP C150SCD1U10V2KX-5GP
C150SCD1U10V2KX-5GP C156SCD1U10V2KX-5GP
C156SCD1U10V2KX-5GP C172SCD1U10V2KX-5GP
C172SCD1U10V2KX-5GP C183SCD1U10V2KX-5GP
C183SCD1U10V2KX-5GP C176SCD1U10V2KX-5GP
C176SCD1U10V2KX-5GP C191SCD1U10V2KX-5GP
C191SCD1U10V2KX-5GP C196SCD1U10V2KX-5GP
C196SCD1U10V2KX-5GP C200SCD1U10V2KX-5GP
C200SCD1U10V2KX-5GP C204SCD1U10V2KX-5GP
C204SCD1U10V2KX-5GP C207SCD1U10V2KX-5GP
C207SCD1U10V2KX-5GP C210SCD1U10V2KX-5GP
C210SCD1U10V2KX-5GP C218SCD1U10V2KX-5GP
C218SCD1U10V2KX-5GP C221SCD1U10V2KX-5GP
C221SCD1U10V2KX-5GP C226SCD1U10V2KX-5GP
C226SCD1U10V2KX-5GP C231SCD1U10V2KX-5GP
C231SCD1U10V2KX-5GP
FOR DISCRETE
PEG_RXN[15..0] 24 PEG_RXP[15..0] 24
PEG_TXN[15..0] 24 PEG_TXP[15..0] 24
PEG_TXN15 PEG_TXN14 PEG_TXN13 PEG_TXN12 PEG_TXN11 PEG_TXN10 PEG_TXN9 PEG_TXN8 PEG_TXN7 PEG_TXN6 PEG_TXN5 PEG_TXN4 PEG_TXN3 PEG_TXN2 PEG_TXN1 PEG_TXN0
PEG_TXP15 PEG_TXP14 PEG_TXP13 PEG_TXP12 PEG_TXP11 PEG_TXP10 PEG_TXP9 PEG_TXP8 PEG_TXP7 PEG_TXP6 PEG_TXP5 PEG_TXP4 PEG_TXP3 PEG_TXP2 PEG_TXP1 PEG_TXP0
4
http://hobi-elektronika.net
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Incorporated
Wistron Incorporated
Wistron Incorporated
21F, 88, Hsin Tai Wu Rd
21F, 88, Hsin Tai Wu Rd
21F, 88, Hsin Tai Wu Rd Hsichih, Taipei
Hsichih, Taipei
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
CPU (1/7)-PEG / DMI / FDI
CPU (1/7)-PEG / DMI / FDI
CPU (1/7)-PEG / DMI / FDI
S-Class Intel
S-Class Intel
S-Class Intel
Hsichih, Taipei
462Wednesday, October 28, 2009
462Wednesday, October 28, 2009
462Wednesday, October 28, 2009
of
of
of
1
SD
SD
SD
A
5
A
+1.05VS_VTT
Processor Pullups
1 2
R157 49D9R2F-GPR157 49D9R2F-GP
1 2
DY
DY
R171 68R2-GP
R171 68R2-GP
H_CATERR#
H_CPURST#_R
D D
H_PM_SYNC16
C C
VCCP_1.5VSPWRGD 49
R128
R128 1K5R2F-2-GP
1K5R2F-2-GP
1 2
VDDPWRGOOD_R
12
R124
R124 750R2F-GP
750R2F-GP
H_PWRGD19
PM_DRAM_PWRGD16
H_VTTPWRGD49
PLT_RST#18,26,35,36,39,45
Processor Compensation Signals
1 2
R460 20R2F-GPR460 20R2F-GP
1 2
R462 20R2F-GPR462 20R2F-GP
1 2
R501 49D9R2F-GPR501 49D9R2F-GP
1 2
R463 49D9R2F-GPR463 49D9R2F-GP
TP60
TP60
1
TPAD14-GP
TPAD14-GP
H_PECI19
+1.05VS_VTT
H_PROCHOT#11,54
H_THRMTRIP-A#11,19,25
H_PWRGD_XDP
1 2
0R0402-PAD-1-GP
0R0402-PAD-1-GP
1 2
R379 68R2-GPR379 68R2-GP
R121
R121
R130
R130
1 2
0R0402-PAD-1-GP
0R0402-PAD-1-GP
1 2
R127 1K5R2F-2-GPR127 1K5R2F-2-GP
4
R176
R176
1 2
0R0402-PAD-1-GP
0R0402-PAD-1-GP
R117
R117
1 2
0R0402-PAD-1-GP
0R0402-PAD-1-GP
VDDPWRGOOD_R
H_COMP3 H_COMP2 H_COMP1 H_COMP0
SKTOCC#_R
H_CATERR#
H_PECI
H_PROCHOT#
H_THRMTRIP-A#
H_CPURST#_RH_CPURST#
H_PM_SYNC
VCCPWRGOOD
VCCPWRGOOD_0
H_VTTPWRGD
PLT_RST#_R
12
R129
R129 750R2F-GP
750R2F-GP
AT23 AT24
G16
AT26
AH24
AK14
AT15
AN26
AK15
AP26
AL15
AN14
AN27
AK13
AM15
AM26
AL14
U1B
U1B
COMP3 COMP2 COMP1 COMP0
SKTOCC#
CATERR#
PECI
PROCHOT#
THERMTRIP#
RESET_OBS#
PM_SYNC
VCCPWRGOOD_1
VCCPWRGOOD_0
SM_DRAMPWROK
VTTPWRGOOD
TAPPWRGOOD
RSTIN#
AUBURUNF
AUBURUNF
3
CPU(2/7)
MISC
MISC
DPLL_REF_SSCLK
CLOCKS
CLOCKS
DPLL_REF_SSCLK#
AUBURNDALE
AUBURNDALE
THERMAL PWR MANAGEMENT
THERMAL PWR MANAGEMENT
DDR3
MISC
DDR3
MISC
JTAG & BPM
JTAG & BPM
2 OF 9
2 OF 9
BCLK
BCLK#
BCLK_ITP
BCLK_ITP#
PEG_CLK
PEG_CLK#
SM_DRAMRST#
SM_RCOMP0 SM_RCOMP1 SM_RCOMP2
PM_EXT_TS0# PM_EXT_TS1#
PRDY#
PREQ#
TCK TMS
TRST#
TDO
TDI_M
TDO_M
DBR#
BPM0# BPM1# BPM2# BPM3# BPM4# BPM5# BPM6# BPM7#
TDI
BCLK_CPU_P_R
A16
BCLK_CPU_N_R
B16
BCLK_ITP_P_R
AR30
BCLK_ITP_N_R
AT30
PEG_CLK_R
E16
PEG_CLK#_R
D16
DPLL_REF_SSCLK_R
A18
DPLL_REF_SSCLK#_R
A17
DDR3_DRAMRST#_R
F6
SM_RCOMP_0
AL1
SM_RCOMP_1
AM1
SM_RCOMP_2
AN1 AN15
AP15
XDP_PRDY#
AT28
XDP_PREQ#
AP27
XDP_TCK
AN28
XDP_TMS
AP28
XDP_TRST#
AT27
XDP_TDI
AT29
XDP_TDO
AR27
XDP_TDI_TDO_M
AR29
XDP_TDI_TDO_M_R
AP29
XDP_DBRESET#
AN25
XDP_BPM#0
AJ22
XDP_BPM#1
AK22
XDP_BPM#2
AK24
XDP_BPM#3
AJ24
XDP_BPM#4_R
AJ25
XDP_BPM#5_R
AH22
XDP_BPM#6_R
AK23
XDP_BPM#7_R
AH23
2
RN62
RN62
RN4
RN4
RN60
RN60
RN61
RN61
12K4R2F-GP
12K4R2F-GP
R461
R461
1 2
1 2 1 2 1 2 1 2
2 3 1
1 2 3
2 3 1
1 2 3
1 2 3
R105
R105
DY
DY
091019-1
RN54
RN54 SRN10KJ-5-GP
SRN10KJ-5-GP
12
DY
DY
SRN0J-10-GP-U
SRN0J-10-GP-U
SRN0J-10-GP-U
SRN0J-10-GP-U
SRN0J-10-GP-U
SRN0J-10-GP-U
SRN0J-10-GP-U
SRN0J-10-GP-U
0R0402-PAD-1-GP
0R0402-PAD-1-GP
R168 0R0402-PAD-1-GPR168 0R0402-PAD-1-GP R158 0R0402-PAD-1-GPR158 0R0402-PAD-1-GP R150 0R0402-PAD-1-GPR150 0R0402-PAD-1-GP R145 0R0402-PAD-1-GPR145 0R0402-PAD-1-GP
4 4
4 4
4
12
R108
R108 12K4R2F-GP
12K4R2F-GP
+1.05VS_VTT
XDP_BPM#4 XDP_BPM#5 XDP_BPM#6 XDP_BPM#7
BCLK_CPU_P 19 BCLK_CPU_N 19
CLK_CPU_XDP CLK_CPU_XDP#
CLK_EXP_P 15 CLK_EXP_N 15
CLK_DP_P 15 CLK_DP_N 15
PM_EXTTS#0_R 12 PM_EXTTS#1_R 13
12
R253
R253 100KR2J-1-GP
100KR2J-1-GP
090813-1-SI
XDP_TMS
XDP_PREQ#
DDR3 Compensation Signal s
SM_RCOMP_0
R136 100R2F-L1-GP-UR136 100R2F-L1-GP-U
SM_RCOMP_1
R135 24D9R2F-L-GPR135 24D9R2F-L-GP
SM_RCOMP_2
R134 130R2F-1-GPR134 130R2F-1-GP
R252
R252
1 2
DY
DY
0R2J-2-GP
0R2J-2-GP
BSS138-7F-GP
BSS138-7F-GP
G
12
+1.5VU
Q17
Q17
DS
091019-1
R771
R771
1 2
0R0402-PAD-1-GP
0R0402-PAD-1-GP C978
C978 SC470P50V2KX-3GP
SC470P50V2KX-3GP
1 2
DY
DY
R132 51R2J-2-GP
R132 51R2J-2-GP
1 2
DY
DY
R141 51R2J-2-GP
R141 51R2J-2-GP
1
1 2 1 2 1 2
12
R257
R257 1KR2J-1-GP
1KR2J-1-GP
5
DDR3_DRAMRST# 12,13
PCH_DDR_RST 19
+1.05VS_VTT
closed to XDP
B B
XDP_PREQ# XDP_PRDY#
XDP_BPM#0 XDP_BPM#1
XDP_BPM#2 XDP_BPM#3
XDP_BPM#4 XDP_BPM#5
1 1
XDP_BPM#6 XDP_BPM#7
H_CPUPWRGD_R
XDP1_TP2 XDP1_TP3
XDP_TCK
4
090901-1
DY
H_PWRGD
H_PWRGD_XDP
+1.05VS_VTT
090824-1-SI
PWRBTN_OUT#16,45,46
DY
1 2
XR1 1KR2J-1-GP
XR1 1KR2J-1-GP
TP4TPAD14-GP TP4TPAD14-GP TP3TPAD14-GP TP3TPAD14-GP
5
XDP1
XDP1
1 2 3 4
5 6 7 8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28
DY
DY
29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60
STC-CONN60A-GP-U1
STC-CONN60A-GP-U1
20.F0971.060
20.F0971.060
NP1 61
62
CLK_CPU_XDP
63 64 NP2
CLK_CPU_XDP#
XDP_DBRESET#_R
XDP_TRST# XDP_TDI XDP_TMS
090901-1
XR4 1KR2J-1-GP
XR4 1KR2J-1-GP
1 2
DY
DY
1 2
XR2 0R2J-2-GP
XR2 0R2J-2-GP
DY
DY
XDP_RST#_R
XR3 0R2J-2-GP
XR3 0R2J-2-GP
1 2
DY
DY
http://hobi-elektronika.net
3
XDP_TRST#
12
R431
R431 51R2J-2-GP
51R2J-2-GP
Place those AFTP at bottom side.
XDP_TDO
XDP_TRST#
+3VS+1.05VS_VTT
12
12
R432
R432
R435
R435
51R2J-2-GP
51R2J-2-GP
10KR2J-3-GP
10KR2J-3-GP
H_CPURST#XDP_RST#_R
XDP_TDO
PLT_RST# 18,26,35, 36,39,45
XDP_TMS XDP_TDI XDP_TCK
XDP_DBRESET# 16
2
TP38 TPAD14-G PTP38 TPAD14-GP
1
TP37 TPAD14-G PTP37 TPAD14-GP
1
TP40 TPAD14-G PTP40 TPAD14-GP
1
TP36 TPAD14-G PTP36 TPAD14-GP
1
TP2 TPAD14-GPTP2 TPAD14-GP
1
<Core Design>
<Core Design>
<Core Design>
Wistron Incorporated
Wistron Incorporated
Wistron Incorporated
21F, 88, Hsin Tai Wu Rd
21F, 88, Hsin Tai Wu Rd
21F, 88, Hsin Tai Wu Rd Hsichih, Taipei
Hsichih, Taipei
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
CPU (2/7)-HOST
CPU (2/7)-HOST
CPU (2/7)-HOST
S-Class Intel
S-Class Intel
S-Class Intel
Hsichih, Taipei
562Wednesday, October 28, 2009
562Wednesday, October 28, 2009
562Wednesday, October 28, 2009
of
of
of
1
SD
SD
SD
A
5
U1C
U1C
4
3 OF 9
3 OF 9
3
CPU(3/7)
U1D
U1D
2
4 OF 9
4 OF 9
1
6
W8
AA6
SA_CK0
AA7
M_A_DQ[63..0]12
D D
C C
B B
M_A_DQ[63..0]
M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63
M_A_BS012 M_A_BS112 M_A_BS212
M_A_CAS#12 M_A_RAS#12 M_A_WE#12
A10
C10
B10 D10 E10
F10
H10
G10
J10
AH5 AF5 AK6 AK7 AF6 AG5
AJ7 AJ6
AJ10
AJ9
AL10
AK12
AK8
AL7
AK11
AL8
AN8 AM10 AR11 AL11
AM9
AN9 AT11 AP12 AM12 AN12 AM13 AT14 AT12 AL13 AR14 AP14
AC3
AB2
AE1
AB3
AE9
SA_DQ0 SA_DQ1
C7
SA_DQ2
A7
SA_DQ3 SA_DQ4 SA_DQ5 SA_DQ6
A8
SA_DQ7
D8
SA_DQ8 SA_DQ9
E6
SA_DQ10
F7
SA_DQ11
E9
SA_DQ12
B7
SA_DQ13
E7
SA_DQ14
C6
SA_DQ15 SA_DQ16
G8
SA_DQ17
K7
SA_DQ18
J8
SA_DQ19
G7
SA_DQ20 SA_DQ21
J7
SA_DQ22 SA_DQ23
L7
SA_DQ24
M6
SA_DQ25
M8
SA_DQ26
L9
SA_DQ27
L6
SA_DQ28
K8
SA_DQ29
N8
SA_DQ30
P9
SA_DQ31 SA_DQ32 SA_DQ33 SA_DQ34 SA_DQ35 SA_DQ36 SA_DQ37 SA_DQ38 SA_DQ39 SA_DQ40 SA_DQ41 SA_DQ42 SA_DQ43 SA_DQ44 SA_DQ45 SA_DQ46 SA_DQ47 SA_DQ48 SA_DQ49 SA_DQ50 SA_DQ51 SA_DQ52 SA_DQ53 SA_DQ54 SA_DQ55 SA_DQ56 SA_DQ57 SA_DQ58 SA_DQ59 SA_DQ60 SA_DQ61 SA_DQ62 SA_DQ63
SA_BS0 SA_BS1
U7
SA_BS2
SA_CAS# SA_RAS# SA_WE#
SA_CK0#
P7
SA_CKE0
AUBURNDALE
AUBURNDALE
DDR SYSTEM MEMORY A
DDR SYSTEM MEMORY A
SA_CK1 SA_CK1# SA_CKE1
SA_CS0# SA_CS1#
SA_ODT0 SA_ODT1
SA_DM0
SA_DM1
SA_DM2
SA_DM3
SA_DM4
SA_DM5
SA_DM6
SA_DM7
SA_DQS0# SA_DQS1# SA_DQS2# SA_DQS3# SA_DQS4# SA_DQS5# SA_DQS6# SA_DQS7#
SA_DQS0 SA_DQS1 SA_DQS2 SA_DQS3 SA_DQS4 SA_DQS5 SA_DQS6 SA_DQS7
SA_MA0
SA_MA1
SA_MA2
SA_MA3
SA_MA4
SA_MA5
SA_MA6
SA_MA7
SA_MA8
SA_MA9 SA_MA10 SA_MA11 SA_MA12 SA_MA13 SA_MA14 SA_MA15
Y6 Y5 P6
AE2 AE8
AD8 AF9
B9 D7 H7 M7 AG6 AM7 AN10 AN13
C9 F8 J9 N9 AH7 AK9 AP11 AT13
C8 F9 H9 M9 AH8 AK10 AN11 AR13
Y3 W1 AA8 AA3 V1 AA9 V8 T1 Y9 U6 AD4 T2 U3 AG8 T3 V9
M_A_DQS#0M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7
M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7
M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15
M_A_DM0 M_A_DM1 M_A_DM2 M_A_DM3 M_A_DM4 M_A_DM5 M_A_DM6 M_A_DM7
M_CLK_DDR0 12 M_CLK_DDR#0 12 M_CKE0 12
M_CLK_DDR1 12 M_CLK_DDR#1 12 M_CKE1 12
M_CS#0 12 M_CS#1 12
M_ODT0 12 M_ODT1 12
M_B_DQ[63..0]13
M_A_DM[7..0] 12
M_A_DQS#[7..0] 12
M_A_DQS[7..0] 12 M_A_A[15..0] 12
M_B_DQ[63..0]
M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63
M_B_BS013 M_B_BS113 M_B_BS213
M_B_CAS#13 M_B_RAS#13 M_B_WE#13
AR10
AT10
AF3 AG1
AK1 AG4 AG3
AH4 AK3 AK4 AM6 AN2 AK5 AK2 AM4 AM3 AP3 AN5 AT4 AN6 AN4 AN3 AT5 AT6 AN7 AP6 AP8 AT9 AT7 AP9
AB1
AC5 AC6
B5
SB_DQ0
A5
SB_DQ1
C3
SB_DQ2
B3
SB_DQ3
E4
SB_DQ4
A6
SB_DQ5
A4
SB_DQ6
C4
SB_DQ7
D1
SB_DQ8
D2
SB_DQ9
F2
SB_DQ10
F1
SB_DQ11
C2
SB_DQ12
F5
SB_DQ13
F3
SB_DQ14
G4
SB_DQ15
H6
SB_DQ16
G2
SB_DQ17
J6
SB_DQ18
J3
SB_DQ19
G1
SB_DQ20
G5
SB_DQ21
J2
SB_DQ22
J1
SB_DQ23
J5
SB_DQ24
K2
SB_DQ25
L3
SB_DQ26
M1
SB_DQ27
K5
SB_DQ28
K4
SB_DQ29
M4
SB_DQ30
N5
SB_DQ31 SB_DQ32 SB_DQ33
AJ3
SB_DQ34 SB_DQ35 SB_DQ36 SB_DQ37
AJ4
SB_DQ38 SB_DQ39 SB_DQ40 SB_DQ41 SB_DQ42 SB_DQ43 SB_DQ44 SB_DQ45 SB_DQ46 SB_DQ47 SB_DQ48 SB_DQ49 SB_DQ50 SB_DQ51 SB_DQ52 SB_DQ53 SB_DQ54 SB_DQ55 SB_DQ56 SB_DQ57 SB_DQ58 SB_DQ59 SB_DQ60 SB_DQ61 SB_DQ62 SB_DQ63
SB_BS0
W5
SB_BS1
R7
SB_BS2
SB_CAS#
Y7
SB_RAS# SB_WE#
AUBURNDALE
AUBURNDALE
DDR SYSTEM MEMORY - B
DDR SYSTEM MEMORY - B
SB_CK0 SB_CK0# SB_CKE0
SB_CK1 SB_CK1# SB_CKE1
SB_CS0# SB_CS1#
SB_ODT0 SB_ODT1
SB_DM0
SB_DM1
SB_DM2
SB_DM3
SB_DM4
SB_DM5
SB_DM6
SB_DM7
SB_DQS0# SB_DQS1# SB_DQS2# SB_DQS3# SB_DQS4# SB_DQS5# SB_DQS6# SB_DQS7#
SB_DQS0 SB_DQS1 SB_DQS2 SB_DQS3 SB_DQS4 SB_DQS5 SB_DQS6 SB_DQS7
SB_MA0
SB_MA1
SB_MA2
SB_MA3
SB_MA4
SB_MA5
SB_MA6
SB_MA7
SB_MA8
SB_MA9 SB_MA10 SB_MA11 SB_MA12 SB_MA13 SB_MA14 SB_MA15
W9 M3
V7 V6 M2
AB8 AD6
AC7 AD1
D4 E1 H3 K1 AH1 AL2 AR4 AT8
D5 F4 J4 L4 AH2 AL4 AR5 AR8
C5 E3 H4 M5 AG2 AL5 AP5 AR7
U5 V2 T5 V3 R1 T8 R2 R6 R4 R5 AB5 P3 R3 AF7 P5 N1
M_B_DQS#0 M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7
M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7
M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15
M_B_DM0 M_B_DM1 M_B_DM2 M_B_DM3 M_B_DM4 M_B_DM5 M_B_DM6 M_B_DM7
M_CLK_DDR2 13 M_CLK_DDR#2 13 M_CKE2 13
M_CLK_DDR3 13 M_CLK_DDR#3 13 M_CKE3 13
M_CS#2 13 M_CS#3 13
M_ODT2 13 M_ODT3 13
M_B_DM[7..0] 13
M_B_DQS#[7..0] 13
M_B_DQS[7..0] 13 M_B_A[15..0] 13
AUBURUNF
AUBURUNF
A A
5
4
http://hobi-elektronika.net
3
AUBURUNF
AUBURUNF
<Core Design>
<Core Design>
<Core Design>
Wistron Incorporated
Wistron Incorporated
Wistron Incorporated
21F, 88, Hsin Tai Wu Rd
21F, 88, Hsin Tai Wu Rd
21F, 88, Hsin Tai Wu Rd Hsichih, Taipei
Hsichih, Taipei
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
2
Date: Sheet
CPU (3/7)-MEM INTERFACE
CPU (3/7)-MEM INTERFACE
CPU (3/7)-MEM INTERFACE
A3
A3
A3
S-Class Intel
S-Class Intel
S-Class Intel
Hsichih, Taipei
1
662Wednesday, October 28, 2009
662Wednesday, October 28, 2009
662Wednesday, October 28, 2009
of
of
of
5
4
3
2
1
CPU(4/7)
6 OF 9
U1F
U1F
D D
+VCC_CORE
091015-1 091015-1
C520
DY
DY
C520
12
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
DY
DY
C107
C107
C531
C504
C504
12
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
C531
12
12
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
DY
DY
PROCESSOR CORE POWER
C556
C556
C553
C553
12
12
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
DY
DY
DY
DY
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
091015-1091015-1
C495
C495
C539
C539
12
12
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
DY
DY
C C
091015-1
C132
C132
C98
C98
12
12
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
DY
DY
DY
DY
C118
C118
C485
C485
12
12
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
DY
DY
DY
DY
C110
C110
C121
C121
12
12
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
091015-1
C96
C96
C131
C131
C104
C104
12
12
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
DY
DY
C92
C92
C130
12
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
C130
12
12
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
091015-1
C500
C558
C558
C557
C137
C137
C133
C133
12
12
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
DY
DY
DY
DY
5
DY
DY
B B
A A
C557
12
12
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
DY
DY
C500
C492
C492
12
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
DY
DY
C511
C511
12
12
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
40A
DY
DY
C563
C563
12
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
091015-1
C90
C90
12
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
+VCC_CORE
AG35
VCC
AG34
VCC
AG33
VCC
AG32
VCC
AG31
VCC
AG30
VCC
AG29
VCC
AG28
VCC
AG27
VCC
AG26
VCC
AF35
VCC
AF34
VCC
AF33
VCC
AF32
VCC
AF31
VCC
AF30
VCC
AF29
VCC
AF28
VCC
AF27
VCC
AF26
VCC
AD35
VCC
AD34
VCC
AD33
VCC
AD32
VCC
AD31
VCC
AD30
VCC
AD29
VCC
AD28
VCC
AD27
VCC
AD26
VCC
AC35
VCC
AC34
VCC
AC33
VCC
AC32
VCC
AC31
VCC
AC30
VCC
AC29
VCC
AC28
VCC
AC27
VCC
AC26
VCC
AA35
VCC
AA34
VCC
AA33
VCC
AA32
VCC
AA31
VCC
AA30
VCC
AA29
VCC
AA28
VCC
AA27
VCC
AA26
VCC
Y35
VCC
Y34
VCC
Y33
VCC
Y32
VCC
Y31
VCC
Y30
VCC
Y29
VCC
Y28
VCC
Y27
VCC
Y26
VCC
V35
VCC
V34
VCC
V33
VCC
V32
VCC
V31
VCC
V30
VCC
V29
VCC
V28
VCC
V27
VCC
V26
VCC
U35
VCC
U34
VCC
U33
VCC
U32
VCC
U31
VCC
U30
VCC
U29
VCC
U28
VCC
U27
VCC
U26
VCC
R35
VCC
R34
VCC
R33
VCC
R32
VCC
R31
VCC
R30
VCC
R29
VCC
R28
VCC
R27
VCC
R26
VCC
P35
VCC
P34
VCC
P33
VCC
P32
VCC
P31
VCC
P30
VCC
P29
VCC
P28
VCC
P27
VCC
P26
VCC
AUBURUNF
AUBURUNF
4
AUBURNDALE
AUBURNDALE
CPU CORE SUPPLY
CPU CORE SUPPLY
CPU VIDS
CPU VIDS
POWER
POWER
SENSE LINES
SENSE LINES
http://hobi-elektronika.net
6 OF 9
VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0
1.1V RAIL POWER
1.1V RAIL POWER
VTT0 VTT0
VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0
PSI#
VID0 VID1 VID2 VID3 VID4 VID5 VID6
PROC_DPRSLPVR
VTT_SELECT
ISENSE
VCC_SENSE VSS_SENSE
VTT_SENSE
VSS_SENSE_VTT
AH14 AH12 AH11 AH10 J14 J13 H14 H12 G14 G13 G12 G11 F14 F13 F12 F11 E14 E12 D14 D13 D12 D11 C14 C13 C12 C11 B14 B12 A14 A13 A12 A11
AF10 AE10 AC10 AB10 Y10 W10 U10 T10 J12 J11 J16 J15
AN33
H_VID0H_VID0
AK35
H_VID1
AK33
H_VID2
AK34
H_VID3
AL35
H_VID4
AL33
H_VID5
AM33
H_VID6
AM35 AM34
G15
H_VTTVID1 = Low, 1.1V H_VTTVID1 = High, 1.05V
AN35
VCC_SENSE_R
AJ34
VSS_SENSE_R
AJ35
VTT_SENSE
B15
VSS_SENSE_VTT
A15
3
H_VTTVID1
VSS_SENSE_VTT
C616
C616
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
12
12
C491
C491
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
12
C129
C129
PM_DPRSLPVR 54
TP63 TPAD14-GPTP63 TPAD14-GP
1
IMVP_IMON 54
091019-1
R178 0R0402-PAD-1-GPR178 0R0402-PAD-1-GP
1 2
R173 0R0402-PAD-1-GPR173 0R0402-PAD-1-GP
1 2
VTT_SENSE 58 VSS_SENSE_VTT 58
12
12
C590
C590
C555
C555
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
C115
C115
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
DY
DY
12
C108
C108 SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
DY
DY
+VTT_43+VTT_43+VTT_43+VTT_43 +VTT_44+VTT_44+VTT_44+VTT_44
PSI# 54 H_VID[6..0] 54
R512
R512 100R2F-L1-GP-U
100R2F-L1-GP-U
VTT_SENSE
12
12
C499
C499
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
DY
DY
12
12
C134
C134
C119
C119
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
R624 0R0402-PAD-1-GPR624 0R0402-PAD-1-GP
1 2
R700 0R0402-PAD-1-GPR700 0R0402-PAD-1-GP
1 2
091019-1
+VCC_CORE
12
R177
R177 100R2F-L1-GP-U
100R2F-L1-GP-U
12
R172
R172 100R2F-L1-GP-U
100R2F-L1-GP-U
2
C135
C135
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
DY
DY
12
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
+1.05VS_VTT
+1.05VS_VTT
+1.05VS_VTT
12
C528
C528
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
12
R508
R508 100R2F-L1-GP-U
100R2F-L1-GP-U
12
C93
C93
+1.05VS_VTT
+1.05VS_VTT
12
12
C99
C99
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
DY
DY
DY
DY
The decoupling capacitors, filter recommendations and sense resistors on the CPU/PCH Rails are specific to t he CRB Implementation. Customers need to follow the recommendations in the Calpella Platform Design Guide.
Please note that the VT T Rail values are Auburndale VTT=1.05V Clarksfield VTT=1.1V
VCC_SENSE 54
VSS_SENSE 54
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
CPU (4/7)-POWER
CPU (4/7)-POWER
CPU (4/7)-POWER
S-Class Intel
S-Class Intel
S-Class Intel
Wistron Incorporated
Wistron Incorporated
Wistron Incorporated
21F, 88, Hsin Tai Wu Rd
21F, 88, Hsin Tai Wu Rd
21F, 88, Hsin Tai Wu Rd Hsichih, Taipei
Hsichih, Taipei
Hsichih, Taipei
1
7
SD
SD
SD
of
of
of
762Wednesday, October 28, 2009
762Wednesday, October 28, 2009
762Wednesday, October 28, 2009
5
R126
R126
12
DIS
DIS
VCC_GFXCORE
C474
C474
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
D D
0R2J-2-GP
0R2J-2-GP
C C
Please note that the VTT Rail values are Auburndale VTT=1.05V Clarksfield VTT=1.1V
+1.05VS_VTT
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
B B
+1.05VS_VTT
18A
C546
C546
C209
C209
12
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
DY
DY
4
CPU(5/7)
3
2
VCC_GFXCORE
1
12
R464
R464 100R2F-L1-GP-U
100R2F-L1-GP-U
8
22AUMA
3A
12
C569
C569
C570
C570
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
DY
DY
12
C573
C573
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
GFXCORE_VDD_SENSE
GFXCORE_GND_SENSE
R138
+1.5VS
R138
1 2
4K7R2J-2-GP
4K7R2J-2-GP
GFX_VR_EN
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
090829-1
+1.8VS_NB
12
R465
R465 100R2F-L1-GP-U
100R2F-L1-GP-U
7 OF 9
U1G
U1G
AT21
VAXG1
AT19
C469
C469
12
12
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
UMA
UMA
DY
DY
C476
C476
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
UMA
UMA
C478
C478
12
12
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
UMA
UMA
091015-1
12
12
C536
C536
DY
DY
C559
C559 SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
AT18
AT16 AR21 AR19 AR18 AR16 AP21 AP19 AP18 AP16 AN21 AN19 AN18 AN16
AM21 AM19 AM18 AM16
AL21
AL19
AL18
AL16 AK21 AK19 AK18 AK16
AJ21
AJ19
AJ18
AJ16 AH21 AH19 AH18 AH16
VAXG2 VAXG3 VAXG4 VAXG5 VAXG6 VAXG7 VAXG8 VAXG9 VAXG10 VAXG11 VAXG12 VAXG13 VAXG14 VAXG15 VAXG16 VAXG17 VAXG18 VAXG19 VAXG20 VAXG21 VAXG22 VAXG23 VAXG24 VAXG25 VAXG26 VAXG27 VAXG28 VAXG29 VAXG30 VAXG31 VAXG32 VAXG33 VAXG34 VAXG35 VAXG36
J24
VTT1
J23
VTT1
H25
VTT1
GRAPHICS
GRAPHICS
SENSE
SENSE
AUBURNDALE
AUBURNDALE
FDI PEG & DMI
FDI PEG & DMI
POWER
POWER
091015-1
K26
VTT1
J27
H27 G28 G27 G26 F26 E26 E25
J26 J25
VTT1 VTT1 VTT1 VTT1 VTT1 VTT1 VTT1 VTT1 VTT1 VTT1
AUBURUNF
AUBURUNF
12
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
DY
DY
12
DY
DY
12
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
C211
C211
C220
C220
7 OF 9
GFX_VID0 GFX_VID1 GFX_VID2 GFX_VID3 GFX_VID4 GFX_VID5 GFX_VID6
GFX_IMON
VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ
VTT1 VTT1 VTT1 VTT1
VTT1 VTT1 VTT1 VTT1 VTT1 VTT1
VTT1 VTT1 VTT1
AR22 AT22
AM22 AP22 AN22 AP23 AM23 AP24 AN24
AR25 AT25 AM24
AJ1 AF1 AE7 AE4 AC1 AB7 AB4 Y1 W7 W4 U1 T7 T4 P1 N7 N4 L1 H1
P10 N10 L10 K10
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
J22 J20 J18 H21 H20 H19
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
L26 L27 M26
VAXG_SENSE
VSSAXG_SENSE
LINES
LINES
GFX_VR_EN
GFX_DPRSLPVR
GRAPHICS VIDs
GRAPHICS VIDs
DDR3 - 1.5V RAILS
DDR3 - 1.5V RAILS
1.1V1.8V
1.1V1.8V
GFXCORE_VDD_SENSE 55 GFXCORE_GND_SENSE 55
GFXVID0 55 GFXVID1 55 GFXVID2 55 GFXVID3 55 GFXVID4 55 GFXVID5 55 GFXVID6 55
GFX_VR_EN 55
TP41 TPAD14-GPTP41 TPAD14-GP
1
GFX_IMON 16,55
091015-1
12
12
C483
C483
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
DY
DY
C498
C498
C515
C515
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
12
12
091015-1
12
12
C510
C510
DY
DY
12
12
C205
C205
DY
DY
090821-1-SI
12
12
C552
C552
SC1U10V3KX-3GP
SC1U10V3KX-3GP
12
C560
C560
C535
C535
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
DY
DY
C598
C598 SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
C581
C581 SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
12
C551
C551
12
C571
C571
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC1U10V3KX-3GP
SC1U10V3KX-3GP
12
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
+1.05VS_VTT
+1.05VS_VTT
0.6A
C554
C554
SC2D2U10V3ZY-1GP
SC2D2U10V3ZY-1GP
DY
DY
A A
5
4
http://hobi-elektronika.net
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Incorporated
Wistron Incorporated
Wistron Incorporated
21F, 88, Hsin Tai Wu Rd
21F, 88, Hsin Tai Wu Rd
21F, 88, Hsin Tai Wu Rd Hsichih, Taipei
Hsichih, Taipei
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
CPU (5/7)-Graphic POWER
CPU (5/7)-Graphic POWER
CPU (5/7)-Graphic POWER
A3
A3
A3
S-Class Intel
S-Class Intel
S-Class Intel
Hsichih, Taipei
1
862Wednesday, October 28, 2009
862Wednesday, October 28, 2009
862Wednesday, October 28, 2009
of
of
of
5
4
3
2
1
9
CPU(6/7)
8 OF 9
U1H
D D
C C
B B
AT20
AT17 AR31 AR28 AR26 AR24 AR23 AR20 AR17 AR15 AR12
AR9 AR6
AR3 AP20 AP17 AP13 AP10
AP7 AP4
AP2 AN34 AN31 AN23 AN20 AN17 AM29 AM27 AM25 AM20 AM17 AM14 AM11
AM8 AM5
AM2 AL34 AL31 AL23 AL20 AL17 AL12
AL9 AL6
AL3 AK29 AK27 AK25 AK20 AK17
AJ31 AJ23 AJ20 AJ17 AJ14 AJ11
AH35 AH34 AH33 AH32 AH31 AH30 AH29 AH28 AH27 AH26 AH20 AH17 AH13
AH9 AH6 AH3
AG10
AF8
AF4
AF2 AE35
U1H
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
AJ8
VSS
AJ5
VSS
AJ2
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
AUBURNDALE
AUBURNDALE
VSS
VSS
8 OF 9
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
AE34 AE33 AE32 AE31 AE30 AE29 AE28 AE27 AE26 AE6 AD10 AC8 AC4 AC2 AB35 AB34 AB33 AB32 AB31 AB30 AB29 AB28 AB27 AB26 AB6 AA10 Y8 Y4 Y2 W35 W34 W33 W32 W31 W30 W29 W28 W27 W26 W6 V10 U8 U4 U2 T35 T34 T33 T32 T31 T30 T29 T28 T27 T26 T6 R10 P8 P4 P2 N35 N34 N33 N32 N31 N30 N29 N28 N27 N26 N6 M10 L35 L32 L29 L8 L5 L2 K34 K33 K30
H35 H32 H28 H26 H24 H22 H18 H15 H13 H11
G34 G31 G20
D33 D30 D26
C34 C32 C29 C28 C24 C22 C20 C19 C16
U1I
U1I
K27
VSS
K9
VSS
K6
VSS
K3
VSS
J32
VSS
J30
VSS
J21
VSS
J19
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
H8
VSS
H5
VSS
H2
VSS VSS VSS VSS
G9
VSS
G6
VSS
G3
VSS
F30
VSS
F27
VSS
F25
VSS
F22
VSS
F19
VSS
F16
VSS
E35
VSS
E32
VSS
E29
VSS
E24
VSS
E21
VSS
E18
VSS
E13
VSS
E11
VSS
E8
VSS
E5
VSS
E2
VSS VSS VSS VSS
D9
VSS
D6
VSS
D3
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
B31
VSS
B25
VSS
B21
VSS
B18
VSS
B17
VSS
B13
VSS
B11
VSS
B8
VSS
B6
VSS
B4
VSS
A29
VSS
A27
VSS
A23
VSS
A9
VSS
AUBURNDALE
AUBURNDALE
VSS
VSS
NCTF TEST PIN:
A35,AT1,AT35,B1,A3,A33,A34,AP1,AP35,
AR1,AR35,AT2,AT3,AT33,AT34,B35,C1,C35
NCTF TEST PIN:
A35,AT1,AT35,B1,A3,A33,A34,AP1,AP35,
AR1,AR35,AT2,AT3,AT33,AT34,B35,C1,C35
9 OF 9
9 OF 9
VSS_NCTF#AR34
VSS_NCTF#B34
VSS_NCTF#B2
VSS_NCTF#B1 VSS_NCTF#A35 VSS_NCTF#AT1
VSS_NCTF#AT35 RSVD_NCTF#AT33 RSVD_NCTF#AT34 RSVD_NCTF#AP35 RSVD_NCTF#AR35
RSVD_NCTF#AT3 RSVD_NCTF#AR1 RSVD_NCTF#AP1 RSVD_NCTF#AT2
RSVD_NCTF#C1
RSVD_NCTF#A3 RSVD_NCTF#C35 RSVD_NCTF#B35
RSVD_NCTF#A34 RSVD_NCTF#A33
All NCTF pins should be Test Points and should be routed as trace.
VSS_NCTF_1
AR34
VSS_NCTF_2
B34
VSS_NCTF_3
B2
TP_MCP_VSS_NCTF7
B1
TP_MCP_VSS_NCTF1
A35
TP_MCP_VSS_NCTF2
AT1
TP_MCP_VSS_NCTF6
AT35 AT33 AT34 AP35 AR35 AT3 AR1 AP1 AT2 C1 A3 C35 B35 A34 A33
1 1 1
TP8 TPAD14-GPTP8 TPAD14-GP TP14 TPAD14-GPTP14 TPAD14-GP TP12 TPAD14-GPTP12 TPAD14-GP
090901-1
CRACK_BGA19,28,46
+3VS
R641
R641 100KR2J-1-GP
100KR2J-1-GP
1 2
TP_MCP_VSS_NCTF1
CRACK_BGA
+3VS
R376
R376 100KR2J-1-GP
100KR2J-1-GP
1 2
TP_MCP_VSS_NCTF2
CRACK_BGA
090829-1
U101
U101
1 2 3 4
DMN66D0LDW-7-GP
DMN66D0LDW-7-GP
U52
U52
1 2 3 4
DMN66D0LDW-7-GP
DMN66D0LDW-7-GP
CRACK_BGA
6
TP_MCP_VSS_NCTF7
5
CRACK_BGA
6
TP_MCP_VSS_NCTF6
5
R620
R620 100KR2J-1-GP
100KR2J-1-GP
1 2
R611
R611 100KR2J-1-GP
100KR2J-1-GP
1 2
AUBURUNF
A A
AUBURUNF
5
4
AUBURUNF
AUBURUNF
http://hobi-elektronika.net
3
<Core Design>
<Core Design>
<Core Design>
Wistron Incorporated
Wistron Incorporated
Wistron Incorporated
21F, 88, Hsin Tai Wu Rd
21F, 88, Hsin Tai Wu Rd
21F, 88, Hsin Tai Wu Rd Hsichih, Taipei
Hsichih, Taipei
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
2
Date: Sheet
CPU (6/7)-VSS
CPU (6/7)-VSS
CPU (6/7)-VSS
S-Class Intel
S-Class Intel
S-Class Intel
Hsichih, Taipei
1
962Wednesday, October 28, 2009
962Wednesday, October 28, 2009
962Wednesday, October 28, 2009
of
of
of
5
4
3
2
1
10
CPU(7/7)
D D
SO-DIMM VREFDQ (M3) Circuit
U1E
U1E
for Clarksfield Processor
CFG0
CFG3
C C
CFG4
CFG7
B B
A A
DY
DY
DY
DY
DY
DY
5
12
R140
R140 3K01R2F-3-GP
3K01R2F-3-GP
12
R149
R149 3K01R2F-3-GP
3K01R2F-3-GP
12
R156
R156 3K01R2F-3-GP
3K01R2F-3-GP
12
R167
R167 3K01R2F-3-GP
3K01R2F-3-GP
PCI-Express Configuration Select
1:Single PEG
CFG0
0:Bifurcation enabled
CFG3 - PCI-Express Static Lane Reversal
1 :Normal Operation
CFG3
0 :Lane Numbers Reversed 15 -> 0, 14 -> 1, ...
CFG4 - Display Port Presence
1:Disabled; No Physical Display Port
CFG4
attached to Embedded Display Port 0:Enabled; An external Display Port device is connected to the Embedded Display Port
0829 SA
CFG7(Reserved) - Temporarily used for early Clarksfield samples.
CFG7 Clarksfield (only for early samples pre-ES1) -
Connect to GND with 3.01K Ohm/5% resistor. Note: Only temporary for early CFD sample
(rPGA/BGA) [For details please refer to the WW33 MoW and sighting report]. For a common M/B design (for AUB and CFD), the pull-down resistor shouble be used. Does not impact AUB functionality.
4
090901-1
091019-1
R7040R 0402-PAD-1-GP R7040R0402-PAD-1-GP
1 2
R7120R 0402-PAD-1-GP R7120R0402-PAD-1-GP
1 2
http://hobi-elektronika.net
H_RSVD17_R H_RSVD18_R
3
CFG0
CFG3 CFG4
CFG7
AP25
AL25 AL24 AL22 AJ33
AG9
AM30 AM28
AP31
AL32 AL30
AM31
AN29
AM32
AK32 AK31 AK28
AJ28 AN30 AN32
AJ32
AJ29
AJ30 AK30
M27
H17 G25 G17 E31 E30
AC9
L28 J17
H16
B19 A19
A20 B20
U9
T9
AB9
J29 J28
RSVD#AP25 RSVD#AL25 RSVD#AL24 RSVD#AL22 RSVD#AJ33 RSVD#AG9 RSVD#M27 RSVD#L28 SA_DIMM_VREF# SB_DIMM_VREF# RSVD#G25 RSVD#G17 RSVD#E31 RSVD#E30
CFG0 CFG1 CFG2 CFG3 CFG4 CFG5 CFG6 CFG7 CFG8 CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15 CFG16 CFG17 RSVD_TP#H16
RSVD#B19 RSVD#A19
RSVD#A20 RSVD#B20
RSVD#U9 RSVD#T9
RSVD#AC9 RSVD#AB9
RSVD#J29 RSVD#J28
AUBURUNF
AUBURUNF
AUBURNDALE
AUBURNDALE
RESERVED
RESERVED
5 OF 9
5 OF 9
RSVD#AJ13 RSVD#AJ12
RSVD#AH25 RSVD#AK26
RSVD#AL26
RSVD_NCTF#AR2
RSVD#AJ26 RSVD#AJ27
RSVD#AL28
RSVD#AL29 RSVD#AP30 RSVD#AP32
RSVD#AL27 RSVD#AT31 RSVD#AT32 RSVD#AP33 RSVD#AR33
RSVD#AR32
RSVD_TP#E15
RSVD_TP#F15
KEY RSVD#D15 RSVD#C15
RSVD#AJ15
RSVD#AH15
RSVD_TP#AA5 RSVD_TP#AA4
RSVD_TP#R8 RSVD_TP#AD3 RSVD_TP#AD2 RSVD_TP#AA2 RSVD_TP#AA1
RSVD_TP#R9 RSVD_TP#AG7 RSVD_TP#AE3
RSVD_TP#V4
RSVD_TP#V5
RSVD_TP#N2 RSVD_TP#AD5 RSVD_TP#AD7
RSVD_TP#W3 RSVD_TP#W2
RSVD_TP#N3 RSVD_TP#AE5 RSVD_TP#AD9
VSS
2
AJ13 AJ12
AH25 AK26
AL26 AR2
AJ26 AJ27
AL28 AL29 AP30 AP32 AL27 AT31 AT32 AP33 AR33
AR32
E15 F15 A2 D15 C15 AJ15 AH15
AA5 AA4 R8 AD3 AD2 AA2 AA1 R9 AG7 AE3
V4 V5 N2 AD5 AD7 W3 W2 N3 AE5 AD9
AP34
RSVD64_R RSVD65_R
VSS (AP34) can be left NC is CRB implementation; EDS/DG recommendation to GND.
RSVD_VSS
R749 0R0402-PAD-1-GPR749 0R0402-PAD-1-GP
1 2
R773 0R0402-PAD-1-GPR773 0R0402-PAD-1-GP
1 2
R144 0R0402-PAD-1-GPR144 0R0402-PAD-1-GP
1 2
091019-1
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
CPU (7/7)-RESERVED
CPU (7/7)-RESERVED
CPU (7/7)-RESERVED
S-Class Intel
S-Class Intel
S-Class Intel
1
Wistron Incorporated
Wistron Incorporated
Wistron Incorporated
21F, 88, Hsin Tai Wu Rd
21F, 88, Hsin Tai Wu Rd
21F, 88, Hsin Tai Wu Rd Hsichih, Taipei
Hsichih, Taipei
Hsichih, Taipei
10 62Wednesday, October 28, 2009
10 62Wednesday, October 28, 2009
10 62Wednesday, October 28, 2009
of
of
of
5
4
3
2
1
4 WIRE PWM Fan Control circuit
11
+5VS
D D
090903-1
KBC control signal is LOW , Fan ON
090903-1
+3VS
090901-1
H_PROCHOT#_R
12
R776
R776 10KR2J-3-GP
10KR2J-3-GP
090903-1
H_PROCHOT#5,54
+1.05VS_VTT
C C
090903-1
R777
R777
1 2
10KR2J-3-GP
10KR2J-3-GP
KBC_PWM_FAN46
Q55
Q55
C
E
CH3904PT-GP
CH3904PT-GP
B
U102
U102
1
A
VCC
2
B GND3Y
74LVC1G00GW -GP
74LVC1G00GW -GP
NAND gate
D24
D24
1SS355PT-GP
1SS355PT-GP
+3VS
5 4
FAN_TACH46
T8 H/W Shutdown Control circuit
51125_VREF
Put TH1 between PCH and CPU
TH1
TH1 NTC-4360K-GP
NTC-4360K-GP
R=100K B=4360K
1 2
51125_VREF
C126
C126
SCD022U16V2KX-5GP
SCD022U16V2KX-5GP
B B
12
12
R137
R137 51K1R2F-GP
51K1R2F-GP
R254
R254
150KR2F-L-GP
150KR2F-L-GP
1 2
1 2
R265
R265 75KR2F-GP
75KR2F-GP
150KR2F-L-GP
150KR2F-L-GP
R427
R427
THERM_RES_UTHERM_RES THERM_RES_D
12
1 2
3 2
12
C303
C303 SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
R470
R470
470KR2F-GP
470KR2F-GP
+5VL
84
+
+
-
-
KA
091015-1
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
C405
C405
12
FAN_PWM
U55A
U55A
HW_SHUTDOWN#_L
1
LM393DR2G-GP
LM393DR2G-GP
091019-1
FAN_TACH
L70
L70
DY
DY
MLVS0402M04-GP
MLVS0402M04-GP
1 2
090820-1-SI
090829-1
R484
R484
1 2
0R0402-PAD-1-GP
0R0402-PAD-1-GP
+5VL
12
R481
R481 100KR2J-1-GP
100KR2J-1-GP
G
S
FAN_TACH_C
12
C399
C399
DY
DY
Q18
Q18
.....
.....
2N7002E-1-GP
2N7002E-1-GP
ETY-CON4-33-GP
ETY-CON4-33-GP
SC47P50V2JN-3GP
SC47P50V2JN-3GP
D
090820-1-SI
FAN1
FAN1
56
1 2
3 4
20.F1579.004
20.F1579.004
090829-1
HW_SHUTDOWN# 53
+5VS FAN_PWM FAN_TACH_C
GND GND GND
AFTP150 AFTE14P-GPAFTP150 AFTE14P-GP
1
AFTP151 AFTE14P-GPAFTP151 AFTE14P-GP
1
AFTP152 AFTE14P-GPAFTP152 AFTE14P-GP
1
AFTP153 AFTE14P-GPAFTP153 AFTE14P-GP
1
AFTP196 AFTE14P-GPAFTP196 AFTE14P-GP
1
AFTP197 AFTE14P-GPAFTP197 AFTE14P-GP
1
090820-1-SI
+5VS
Thermal IC Control circuit
090824-1-SI
DXP1
DXN1
<Core Design>
<Core Design>
<Core Design>
Wistron Incorporated
Wistron Incorporated
Wistron Incorporated
21F, 88, Hsin Tai Wu Rd
21F, 88, Hsin Tai Wu Rd
21F, 88, Hsin Tai Wu Rd Hsichih, Taipei
Hsichih, Taipei
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
2
Date: Sheet
G787S11U-GP THERMAL
G787S11U-GP THERMAL
G787S11U-GP THERMAL
S-Class Intel
S-Class Intel
S-Class Intel
Hsichih, Taipei
11 62Wednesday, October 28, 2009
11 62Wednesday, October 28, 2009
11 62Wednesday, October 28, 2009
1
SD
SD
SD
of
of
of
SMBCLK
SMBDATA
ALERT#
090820-1-SI
8 7 6 5
4
ALERT#
PCH_SMBCLK 12,13,15,23,39 PCH_SMBDATA 12,13,15,23,39
R471
R471
1 2
0R0402-PAD-1-GP
0R0402-PAD-1-GP
091019-1
http://hobi-elektronika.net
THERM_SCI# 19
MMBT3904WT1G-GP
MMBT3904WT1G-GP
3
C
Q53
Q53
B
SC2200P50V2KX-2GP
E
SC2200P50V2KX-2GP
12
C472
C472
SC1U10V3ZY-6GP
SC1U10V3ZY-6GP
A A
H_THRMTRIP-A#5,19,25
5
1 2
0R0402-PAD-1-GP
0R0402-PAD-1-GP
091019-1
R756
R756
DXP1 DXN1 H_THRMTRIP-A#_TH
U62
U62
1
VCC
2
DXP
3
DXN THERM#4GND
G781P8F-GP
G781P8F-GP
C127
C127
12
5
4
3
2
1
R450
R450
+1.5VU
M_A_DM[7..0] 6 M_A_DQS#[7..0] 6
M_A_DQS[7..0] 6 M_A_A[15..0] 6
M_A_RAS# 6 M_A_WE# 6 M_A_CAS# 6
M_CS#0 6 M_CS#1 6
M_CKE0 6 M_CKE1 6
M_CLK_DDR0 6 M_CLK_DDR#0 6
M_CLK_DDR1 6 M_CLK_DDR#1 6
1 2
0R0402-PAD-1-GP
0R0402-PAD-1-GP
12
C462
C462
+1.5VU
Layout Note: Place these Caps near SO-DIMMA.
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
12
DY
DY
SA1_DIM0 SA0_DIM0
PM_EXTTS#0_R 5
C465
C465
SC2D2U10V3ZY-1GP
SC2D2U10V3ZY-1GP
090901-1
Note: If SA0 DIM0 = 0, SA1_DIM0 = 0 SO-DIMMA SPD Address is 0xA0 SO-DIMMA TS Address is 0x30
4
RN55
RN55 SRN10KJ-5-GP
SRN10KJ-5-GP
1
2 3
R449 0R0402-PAD-1-GPR449 0R0402-PAD-1-GP
1 2
R448 0R0402-PAD-1-GPR448 0R0402-PAD-1-GP
1 2
If SA0 DIM0 = 1, SA1_DIM0 = 0 SO-DIMMA SPD Address is 0xA2 SO-DIMMA TS Address is 0x32
+3VS
SODIMM A DECOUPLING
C490
C490
C537
C564
C564
C537
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC4D7U6D3V3KX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC4D7U6D3V3KX-GP
12
12
2
091015-1091015-1
C516
C516
C481
C481
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
12
12
DY
DY
PCH_SMBDATA 11,13,15,23,39 PCH_SMBCLK 11,13,15,23,39
C509
C509
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
12
12
DY
DY
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Wistron Incorporated
Wistron Incorporated
Wistron Incorporated
21F, 88, Hsin Tai Wu Rd
21F, 88, Hsin Tai Wu Rd
21F, 88, Hsin Tai Wu Rd Hsichih, Taipei
Hsichih, Taipei
Hsichih, Taipei
DDRIII Socket DM1
DDRIII Socket DM1
DDRIII Socket DM1
S-Class Intel
S-Class Intel
S-Class Intel
1
12 62Wednesday, October 28, 2009
12 62Wednesday, October 28, 2009
12 62Wednesday, October 28, 2009
12
of
of
of
SD
SD
SD
DIMM2
DIMM2
M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4
D D
M_A_BS26 M_A_BS06
M_A_BS16
M_A_DQ[63..0]6
Place between DM1 and DM2.
C C
B B
A A
Place these caps close to VTT1 and VTT2.
+0.75VS
12
DDR_VREF_S3
R224
R224 0R0402-PAD-1-GP
0R0402-PAD-1-GP
1 2
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
DDR_VREF_S3
R271
R271 0R0402-PAD-1-GP
0R0402-PAD-1-GP
1 2
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
+0.75VS
R444
R444 0R0402-PAD-1-GP
0R0402-PAD-1-GP
1 2
12
C59
C59
C456
C456
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
C455
C455 SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
12
C140
C140
12
C266
C266
12
C58
C58
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
DY
DY
DY
DY
M_VREF_CA_DIMM0
12
C148
C148
SC1200P50V2JX-GP
SC1200P50V2JX-GP
WWAN
WWAN
M_VREF_DQ_DIMM0
12
C264
C264
DY
DY
SC2D2U10V3ZY-1GP
SC2D2U10V3ZY-1GP
MA_VTT MA_VTT
12
12
C457
C457
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
M_ODT06 M_ODT16
DDR3_DRAMRST#5,13
M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15
M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63
M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7
M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7
M_VREF_CA_DIMM0 M_VREF_DQ_DIMM0
MA_VTT MA_VTT
H = 9.2mm
5
4
DIMM2
98
A0
97
A1
96
A2
95
A3
92
A4
91
A5
90
A6
86
A7
89
A8
85
A9
107
A10/AP
84
A11
83
A12
119
A13
80
A14
78
A15
79
A16/BA2
109
BA0
108
BA1
5
DQ0
7
DQ1
15
DQ2
17
DQ3
4
DQ4
6
DQ5
16
DQ6
18
DQ7
21
DQ8
23
DQ9
33
DQ10
35
DQ11
22
DQ12
24
DQ13
34
DQ14
36
DQ15
39
DQ16
41
DQ17
51
DQ18
53
DQ19
40
DQ20
42
DQ21
50
DQ22
52
DQ23
57
DQ24
59
DQ25
67
DQ26
69
DQ27
56
DQ28
58
DQ29
68
DQ30
70
DQ31
129
DQ32
131
DQ33
141
DQ34
143
DQ35
130
DQ36
132
DQ37
140
DQ38
142
DQ39
147
DQ40
149
DQ41
157
DQ42
159
DQ43
146
DQ44
148
DQ45
158
DQ46
160
DQ47
163
DQ48
165
DQ49
175
DQ50
177
DQ51
164
DQ52
166
DQ53
174
DQ54
176
DQ55
181
DQ56
183
DQ57
191
DQ58
193
DQ59
180
DQ60
182
DQ61
192
DQ62
194
DQ63
10
DQS0#
27
DQS1#
45
DQS2#
62
DQS3#
135
DQS4#
152
DQS5#
169
DQS6#
186
DQS7#
12
DQS0
29
DQS1
47
DQS2
64
DQS3
137
DQS4
154
DQS5
171
DQS6
188
DQS7
116
ODT0
120
ODT1
126
VREF_CA
1
VREF_DQ
30
RESET#
203
VTT1
204
VTT2
DDR3-204P-50-GP
DDR3-204P-50-GP
http://hobi-elektronika.net
62.10017.I11
62.10017.I11
RAS#
WE#
CAS#
CS0# CS1#
CKE0 CKE1
CK0#
CK1#
EVENT# VDDSPD
NC#1 NC#2
NC#/TEST
VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8
VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18
NP1
NP1
NP2
NP2
110 113 115
114 121
73 74
101
CK0
103 102
CK1
104
M_A_DM0
11
DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7
SDA SCL
SA0 SA1
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
M_A_DM1
28
M_A_DM2
46
M_A_DM3
63
M_A_DM4
136
M_A_DM5
153
M_A_DM6
170
M_A_DM7
187
SODIMM0_1_SMB_DATA_R
200
SODIMM0_1_SMB_CLK_R
202
TS#_DIMM0
198 199
SA0_DIM0
197
SA1_DIM0
201 77
122 125
75 76 81 82 87 88 93 94 99 100 105 106 111 112 117 118 123 124
2 3 8 9 13 14 19 20 25 26 31 32 37 38 43 44 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 196 205 206
3
5
D D
M_B_DQ[63..0]6
C C
DDR_VREF_S3
R476
R476 0R0402-PAD-1-GP
0R0402-PAD-1-GP
1 2
DDR_VREF_S3
B B
A A
Place these caps close to VTT1 and VTT2.
C464
C464
5
R258
R258 0R0402-PAD-1-GP
0R0402-PAD-1-GP
1 2
12
12
C463
C463
C458
C458
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
DY
DY
M_VREF_CA_DIMM1
12
12
C480
12
C459
C459
DY
DY
DY
DY
M_VREF_DQ_DIMM1
12
DY
DY
+0.75VS
1 2
12
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
C480
SC2D2U10V3ZY-1GP
SC2D2U10V3ZY-1GP
12
C224
C224
SC2D2U10V3ZY-1GP
SC2D2U10V3ZY-1GP
R443
R443 0R0402-PAD-1-GP
0R0402-PAD-1-GP
MB_VTT MB_VTT
DDR3_DRAMRST#5,12
C473
C473
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C225
C225
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
4
DIMM1
M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14
M_B_BS26 M_B_BS06
M_B_BS16
M_ODT26 M_ODT36
M_B_A15
M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63
M_B_DQS#0 M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7
M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7
M_VREF_CA_DIMM1 M_VREF_DQ_DIMM1
DIMM1
98
A0
97
A1
96
A2
95
A3
92
A4
91
A5
90
A6
86
A7
89
A8
85
A9
107
A10/AP
84
A11
83
A12
119
A13
80
A14
78
A15
79
A16/BA2
109
BA0
108
BA1
5
DQ0
7
DQ1
15
DQ2
17
DQ3
4
DQ4
6
DQ5
16
DQ6
18
DQ7
21
DQ8
23
DQ9
33
DQ10
35
DQ11
22
DQ12
24
DQ13
34
DQ14
36
DQ15
39
DQ16
41
DQ17
51
DQ18
53
DQ19
40
DQ20
42
DQ21
50
DQ22
52
DQ23
57
DQ24
59
DQ25
67
DQ26
69
DQ27
56
DQ28
58
DQ29
68
DQ30
70
DQ31
129
DQ32
131
DQ33
141
DQ34
143
DQ35
130
DQ36
132
DQ37
140
DQ38
142
DQ39
147
DQ40
149
DQ41
157
DQ42
159
DQ43
146
DQ44
148
DQ45
158
DQ46
160
DQ47
163
DQ48
165
DQ49
175
DQ50
177
DQ51
164
DQ52
166
DQ53
174
DQ54
176
DQ55
181
DQ56
183
DQ57
191
DQ58
193
DQ59
180
DQ60
182
DQ61
192
DQ62
194
DQ63
10
DQS0#
27
DQS1#
45
DQS2#
62
DQS3#
135
DQS4#
152
DQS5#
169
DQS6#
186
DQS7#
12
DQS0
29
DQS1
47
DQS2
64
DQS3
137
DQS4
154
DQS5
171
DQS6
188
DQS7
116
ODT0
120
ODT1
126
VREF_CA
1
VREF_DQ
30
RESET#
203
VTT1
204
VTT2
DDR3-204P-62-GP
DDR3-204P-62-GP
62.10017.R11
62.10017.R11
RAS# CAS# CS0#
CS1# CKE0
CKE1
CK0#
CK1#
EVENT#
VDDSPD
NC#1 NC#2
NC#/TEST
VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8
VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18
WE#
DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7
SDA
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
NP1 NP2
CK0
CK1
SCL
SA0 SA1
H = 5.2mm
http://hobi-elektronika.net
4
NP1 NP2
110 113 115
114 121
73 74
101 103
102 104
M_B_DM0
11
M_B_DM1
28
M_B_DM2
46
M_B_DM3
63
M_B_DM4
136
M_B_DM5
153
M_B_DM6
170
M_B_DM7
187
SODIMM1_1_SMB_DATA_R
200
SODIMM1_1_SMB_CLK_R
202
TS#_DIMM1
198 199
SA0_DIM1
197
SA1_DIM1
201 77
122 125
75 76 81 82 87 88 93 94 99 100 105 106 111 112 117 118 123 124
2 3 8 9 13 14 19 20 25 26 31 32 37 38 43 44 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 196 205 206
3
DIMM1
R451
R451
+1.5VU
3
M_B_RAS# 6 M_B_WE# 6 M_B_CAS# 6
M_CS#2 6 M_CS#3 6
M_CKE2 6 M_CKE3 6
M_CLK_DDR2 6 M_CLK_DDR#2 6
M_CLK_DDR3 6 M_CLK_DDR#3 6
12
0R0402-PAD-1-GP
0R0402-PAD-1-GP
12
12
C461
C461
DY
DY
C460
C460
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SC2D2U10V3ZY-1GP
SC2D2U10V3ZY-1GP
Layout Note: Place these Caps near SO-DIMMB.
SO-DIMMB is placed farther from the Processor than SO-DIMMA
R445 0R0402-PAD-1-GPR445 0R0402-PAD-1-GP R446 0R0402-PAD-1-GPR446 0R0402-PAD-1-GP
PM_EXTTS#1_R 5
+1.5VU
2
M_B_DM[7..0] 6 M_B_DQS#[7..0] 6
M_B_DQS[7..0] 6 M_B_A[15..0] 6
Note: SO-DIMMB SPD Address is 0xA4 SO-DIMMB TS Address is 0x34
12 12
+3VS
PCH_SMBDATA 11,12,15,23,39 PCH_SMBCLK 11,12,15,23,39
SODIMM B DECOUPLING
C477
C477
C523
C523
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
12
2
1
+3VS
090813-1-SI
SA1_DIM1 SA0_DIM1
RN56
RN56
4
SRN10KJ-5-GP
SRN10KJ-5-GP
23 1
091015-1
C566
C566
C530
C567
C567
12
C530
C479
C479
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
12
12
12
DY
DY
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
12
DY
DY
Wistron Incorporated
Wistron Incorporated
Wistron Incorporated
21F, 88, Hsin Tai Wu Rd
21F, 88, Hsin Tai Wu Rd
21F, 88, Hsin Tai Wu Rd Hsichih, Taipei
Hsichih, Taipei
Hsichih, Taipei
DDRIII Socket DM2
DDRIII Socket DM2
DDRIII Socket DM2
S-Class Intel
S-Class Intel
S-Class Intel
1
13 62Wednesday, October 28, 2009
13 62Wednesday, October 28, 2009
13 62Wednesday, October 28, 2009
13
of
of
of
SD
SD
SD
5
4
3
2
1
+RTCVCC
1 2
R365
R365 20KR2J-L2-GP
12
20KR2J-L2-GP
SC1U10V3KX-3GP
SC1U10V3KX-3GP
HDA_BIT_CLK HDA_SYNC
HDA_RST#
HDA_SDOUT
C395
C395
HDA_BITCLK_CODEC
HDA_BITCLK_MDC
D D
12
C392
C392
SC33P50V2JN-3GP
SC33P50V2JN-3GP
12
C391
C391
SC33P50V2JN-3GP
SC33P50V2JN-3GP
090909-1
12
R785
R785
12
R786
R786
0R2J-2-GP
0R2J-2-GP
+RTCVCC
0R2J-2-GP
0R2J-2-GP
091015-1 091015-1
HDA_BITCLK_CODEC41 HDA_SYNC_CODEC41 HDA_RST#_CODEC41 HDA_SDOUT_CODEC41
HDA_BITCLK_MDC47 HDA_SYNC_MDC47 HDA_RST#_MDC47 HDA_SDOUT_MDC47
C C
+3VS
NO REBOOT STRAP
+RTCVCC
1 2
R364
R364 20KR2J-L2-GP
20KR2J-L2-GP
SC1U10V3KX-3GP
SC1U10V3KX-3GP
1 2
R699 1MR2J-1-GPR699 1MR2J-1-GP
1 2
R707 330KR2F-L-GPR707 330KR2F-L-GP
RN50
RN50
1 2 3 4 5
SRN33J-7-GP
SRN33J-7-GP
RN49
RN49
1 2 3 4 5
SRN33J-7-GP
SRN33J-7-GP
C390
C390
8 7 6
8 7 6
090829-1
DY
DY
HDA_SPKR
SIRQ
No Reboot Strap R336
HDA_SPKR
Low = Default High = No Reboot
1 2
R336 10KR2J-3-GP
R336 10KR2J-3-GP
1 2
R636 10KR2J-3-GPR636 10KR2J-3-GP
VTAP Assumed as 1.1V
PCH_JTAG_RST#
PCH_JTAG_TCK
PCH_JTAG_TMS
B B
PCH_JTAG_TDO
PCH_JTAG_TDI
PCH_JTAG_RST#
090825-1-SI 090825-1-SI
C386
C386
SC15P50V2JN-2-GP
SC15P50V2JN-2-GP
A A
1 2
DY
DY
R347 51R2F-2-GP
R347 51R2F-2-GP
1 2
R338 4K7R2J-2-GPR338 4K7R2J-2-GP
1 2
DY
DY
R342 51R2F-2-GP
R342 51R2F-2-GP
1 2
DY
DY
R351 51R2F-2-GP
R351 51R2F-2-GP
1 2
DY
DY
R345 51R2F-2-GP
R345 51R2F-2-GP
1 2
DY
DY
R349 10KR2J-3-GP
R349 10KR2J-3-GP
Oscillator
1 2
R358
R358 10MR2J-L-GP
10MR2J-L-GP
090903-1
X1
X1
1
4
12
2 3
X-32D768KHZ-38GPU
X-32D768KHZ-38GPU
82.30001.691
82.30001.691
32.768Khz 12.5pf 10ppm 1st: 82.30001.691 (KDS)
5
+1.05VS
Place the resistors on RST, TCK, TMS, and TDI near PCH.
Place the resistors on TDO near XDP.
ICH_RTCX1 ICH_RTCX2
12
C387
C387
SC15P50V2JN-2-GP
SC15P50V2JN-2-GP
090813-1-SI
KBC_SPI_CS0#46 KBC_SPI_CS1#46
KBC_SPI_SI46
KBC_SPI_SO46
BIOS have Default code & Run code. If we want to flash default code area, we should set GPIO33 be Low when SYS_PWROK assert.
WHITE_BATLED#46,51
4
21
12
G24
G24 GAP-OPEN
GAP-OPEN
ICH_RTCX1 ICH_RTCX2
ICH_RTCRST# SRTCRST# SM_INTRUDER# ICH_INTVRMEN
HDA_SPKR41
HDA_SDIN041
TP117TPAD14-GP TP117TPAD14-GP TP110TPAD14-GP TP110TPAD14-GP
HDA_SDIN147
1 1
HDA_SDIN0
HDA_SDIN1 HDA_SDIN2 HDA_SDIN3
GPIO33
090829-1
PCH_JTAG_TCK PCH_JTAG_TMS PCH_JTAG_TDI PCH_JTAG_TDO PCH_JTAG_RST#
091008-1
R692
R692
1 2
1KR2F-3-GP
1KR2F-3-GP
KBC_SPI_CLK_R
KBC_SPI_CS0#_R KBC_SPI_CS1#_R
KBC_SPI_SI_R
GPIO33GPIO33_1
3
R295 33R2J-2-GPR295 33R2J-2-GP
KBC_SPI_CLK46
+3VS
091019-1
2N7002E-1-GP
2N7002E-1-GP
1 2
R755 100KR2J-1-GPR755 100KR2J-1-GP
1 2
R303
R303
1 2
0R0402-PAD-1-GP
0R0402-PAD-1-GP
R300
R300
1 2
0R0402-PAD-1-GP
0R0402-PAD-1-GP
R297 33R2J-2-GPR297 33R2J-2-GP
1 2
091008-1
+3VS
12
R719
R719 10KR2J-3-GP
10KR2J-3-GP
DY
DY
D
Q48
Q48
.
.
.
. .
. .
.
.
.
S
G
R718
R718
1 2
DY
DY
0R2J-2-GP
0R2J-2-GP
http://hobi-elektronika.net
PCH(1/9)
INTVRMEN- Integrated SUS
1.1V VRM Enable High - Enable internal VRs
U3A
U3A
B13
RTCX1
D13
RTCX2
C14
RTCRST#
D17
SRTCRST#
A16
INTRUDER#
A14
INTVRMEN
A30
HDA_BCLK
D29
HDA_SYNC
P1
SPKR
C30
HDA_RST#
G30
HDA_SDIN0
F30
HDA_SDIN1
E32
HDA_SDIN2
F32
HDA_SDIN3
B29
HDA_SDO
H32
HDA_DOCK_EN#/GPIO33
J30
HDA_DOCK_RST#/GPIO13
M3
JTAG_TCK
K3
JTAG_TMS
K1
JTAG_TDI
J2
JTAG_TDO
J4
TRST#
BA2
SPI_CLK
AV3
SPI_CS0#
AY3
SPI_CS1#
AY1
SPI_MOSI
AV1
SPI_MISO
IBEXPEAK-M-GP-NF
IBEXPEAK-M-GP-NF
RTC Battery
+RTCVCC BATT1.1
091019-1
R352
R352
1 2
0R0402-PAD-1-GP
0R0402-PAD-1-GP
W=20mils
12
C372
C372
SC1U10V3KX-3GP
SC1U10V3KX-3GP
RTCIHDA
RTCIHDA
SATA
SATA
SPI JTAG
SPI JTAG
W=20mils
RTC_PWR_L
FWH4/LFRAME#
LDRQ1#/GPIO23
LPC
LPC
SATAICOMPO
SATA0GP/GPIO21 SATA1GP/GPIO19
090919-1
3
CH715FPT-GP
CH715FPT-GP
integrated VccSus1_05,VccSus1_5,VccCL1_5
INTVRMEN
High=Enable Low=Disable
integrated VccLan1_05VccCL1_05
1 OF 10
1 OF 10
FWH0/LAD0 FWH1/LAD1 FWH2/LAD2 FWH3/LAD3
LDRQ0#
SERIRQ
SATA0RXN SATA0RXP SATA0TXN
SATA0TXP
SATA1RXN SATA1RXP SATA1TXN
SATA1TXP
SATA2RXN SATA2RXP SATA2TXN
SATA2TXP
SATA3RXN SATA3RXP SATA3TXN
SATA3TXP
SATA4RXN SATA4RXP SATA4TXN
SATA4TXP
SATA5RXN SATA5RXP SATA5TXN
SATA5TXP
SATAICOMPI
SATALED#
U43
U43
LAN100_SLP
LPC_AD0
D33
LPC_AD1
B33
LPC_AD2
C32
LPC_AD3
A32 C34 A34
F34 AB9
AK7 AK6 AK11 AK9
AH6 AH5 AH9 AH8
AF11 AF9 AF7 AF6
AH3 AH1 AF3 AF1
AD9 AD8 AD6 AD5
AD3 AD1 AB3 AB1
AF16 AF15
T3
Y9
HDD_HALTLED_1
V1
3D3V_AUX_S5_5_51125
2
RTC_PWR
1
W=20mils
High=Enable Low=Disable
LPC_AD[0..3]
PCH_GPIO23
SATAICOMP
SATA_LED#
10KR2J-3-GP
SATA0GPSATA0GP
10KR2J-3-GP R633
R633
0R0402-PAD-1-GP
0R0402-PAD-1-GP
090829-1
R353
R353
1 2
1KR2J-1-GP
1KR2J-1-GP
090829-1
2
14
LPC_AD[0..3] 45,46
LPC_FRAME# 45,46
1
SIRQ 45,46
SATA_RXN0 35 SATA_RXP0 35 SATA_TXN0 35 SATA_TXP0 35
SATA_RXN1 35 SATA_RXP1 35 SATA_TXN1 35 SATA_TXP1 35
SATA_RXN4 44 SATA_RXP4 44 SATA_TXN4 44 SATA_TXP4 44
1 2
R634
R634 37D4R2F-GP
37D4R2F-GP
SATA_LED# 34
1 2 1 2
R326
R326
+3VS
091019-1
W=20mils
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
PCH (1/9)-SATA/SPI/LPC
PCH (1/9)-SATA/SPI/LPC
PCH (1/9)-SATA/SPI/LPC
090821-1-SI
TP112 TP AD14-GPTP112 TPAD14-GP
+1.05VS
SC470P50V2KX-3GP
SC470P50V2KX-3GP
HDD_HALTLED 34
S-Class Intel
S-Class Intel
S-Class Intel
HDD
ODD
ESATA
SATA_LED#
090901-1
EC984
EC984
HDD_HALTLED
BAT-BB10201-C1401-7H-GP
BAT-BB10201-C1401-7H-GP
1 2
DY
DY
R323 10KR2J-3-GP
R323 10KR2J-3-GP
090819-1-SI
RTC1
RTC1
1
PWR
2
GND
NP1
NP1
NP2
NP2
62.70001.031
62.70001.031
Wistron Incorporated
Wistron Incorporated
Wistron Incorporated
21F, 88, Hsin Tai Wu Rd
21F, 88, Hsin Tai Wu Rd
21F, 88, Hsin Tai Wu Rd Hsichih, Taipei
Hsichih, Taipei
Hsichih, Taipei
14 62Wednesday, October 28, 2009
14 62Wednesday, October 28, 2009
14 62Wednesday, October 28, 2009
1
12
+3VS
of
of
of
5
BG30
BJ30
BF29
TXN2 TXP2
TXN4 TXP4
TXN6 TXP6
BH29
AW30
BA30 BC30 BD30
AU30
AT30 AU32 AV32
BA32 BB32 BD32 BE32
BF33 BH33 BG32
BJ32 BA34
AW34
BC34 BD34
AT34 AU34 AU36 AV36
BG34
BJ34 BG36
BJ36
AK48 AK47
AM43 AM45
AM47 AM48
AH42 AH41
AM51 AM53
AJ50
AJ52
AK53 AK51
NEWCARD_CLKREQ#35
CLKREQ_WLAN#39
CLK_PCIE_NEW#35 CLK_PCIE_NEW35
WLAN
+3VALW
EXP
WLAN
LAN
+3VALW
PCIE_RXN235
PCIE_RXP235 PCIE_TXN235 PCIE_TXP235
PCIE_RXN439 PCIE_RXP439
PCIE_TXN439 PCIE_TXP439
PCIE_RXN636 PCIE_RXP636
PCIE_TXN636 PCIE_TXP636
+3VS
1 2 3 4 5
5
+3VS
091019-1
R346
R346
1 2
10KR2J-3-GP
10KR2J-3-GP
091019-1
RN88
RN88
2 3 1
SRN10KJ-5-GP
SRN10KJ-5-GP
RN80
RN80
SRN10KJ-6-GP
SRN10KJ-6-GP
10KR2J-3-GP
10KR2J-3-GP
R649
R649
1 2
1 2 1 2
R689
R689
R7900R0402-PAD-1-GP R7900R0402-PAD-1-GP
1 2
R7910R0402-PAD-1-GP R7910R0402-PAD-1-GP
1 2
4
PEG_B_CLKREQ#
8
CLKREQ_WLAN#
7
PCIECLKREQ0#
6
12 12
12 12
12 12
PCIECLKREQ0#
CLK_PCIE_NEW#_R
R7740R0402-PAD-1-GP R7740R0402-PAD-1-GP
CLK_PCIE_NEW_R
R7890R0402-PAD-1-GP R7890R0402-PAD-1-GP
NEWCARD_CLKREQ#_R
12
0R0402-PAD-1-GP
0R0402-PAD-1-GP
PCIECLKRQ3#
CLKREQ_WLAN#
PCIECLKRQ5#
PEG_B_CLKREQ#
C321SCD1U10V2KX-5GP C321SCD1U10V2KX-5GP C320SCD1U10V2KX-5GP C320SCD1U10V2KX-5GP
C326SCD1U10V2KX-5GP C326SCD1U10V2KX-5GP C327SCD1U10V2KX-5GP C327SCD1U10V2KX-5GP
C768SCD1U10V2KX-5GP C768SCD1U10V2KX-5GP C765SCD1U10V2KX-5GP C765SCD1U10V2KX-5GP
PCIECLKRQ1#
CLK_PCIE_MINI_2#_R CLK_PCIE_MINI_2_R
D D
C C
EXP
B B
CLK_PCIE_MINI2#39 CLK_PCIE_MINI239
A A
4
U3B
U3B
PERN1 PERP1 PETN1 PETP1
PERN2 PERP2 PETN2 PETP2
PERN3 PERP3 PETN3 PETP3
PERN4 PERP4 PETN4 PETP4
PERN5 PERP5 PETN5 PETP5
PERN6 PERP6 PETN6 PETP6
PERN7 PERP7 PETN7 PETP7
PERN8 PERP8 PETN8 PETP8
CLKOUT_PCIE0N CLKOUT_PCIE0P
P9
PCIECLKRQ0#/GPIO73
CLKOUT_PCIE1N CLKOUT_PCIE1P
U4
PCIECLKRQ1#/GPIO18
CLKOUT_PCIE2N CLKOUT_PCIE2P
N4
PCIECLKRQ2#/GPIO20
CLKOUT_PCIE3N CLKOUT_PCIE3P
A8
PCIECLKRQ3#/GPIO25
CLKOUT_PCIE4N CLKOUT_PCIE4P
M9
PCIECLKRQ4#/GPIO26
CLKOUT_PCIE5N CLKOUT_PCIE5P
H6
PCIECLKRQ5#/GPIO44
CLKOUT_PEG_B_N CLKOUT_PEG_B_P
P13
PEG_B_CLKRQ#/GPIO56
IBEXPEAK-M-GP-NF
IBEXPEAK-M-GP-NF
4
PCH(2/9)
SMBALERT#/GPIO11
SML0ALERT#/GPIO60
SML1ALERT#/GPIO74
SMBus
SMBus
PCI-E*
PCI-E*
Controller
Controller
PEG
PEG
CLKOUT_DP_N/CLKOUT_BCLK1_N CLKOUT_DP_P/CLKOUT_BCLK1_P
From CLK BUFFER
From CLK BUFFER
Clock Flex
Clock Flex
PCIECLKRQ{0,3,4,5,6,7}# should have a 10K pull-up to +3VALW.
PCIECLKRQ{1,2} should have a 10K pull-up to +1.05VS (But CRB is pull-up to +3VS).
SML1CLK/GPIO58
SML1DATA/GPIO75
Link
Link
PEG_A_CLKRQ#/GPIO47
CLKOUT_PEG_A_N CLKOUT_PEG_A_P
CLKOUT_DMI_N CLKOUT_DMI_P
CLKIN_DMI_N CLKIN_DMI_P
CLKIN_BCLK_N
CLKIN_BCLK_P
CLKIN_DOT_96N CLKIN_DOT_96P
CLKIN_SATA_N/CKSSCD_N CLKIN_SATA_P/CKSSCD_P
CLKIN_PCILOOPBACK
XCLK_RCOMP
CLKOUTFLEX0/GPIO64
CLKOUTFLEX1/GPIO65
CLKOUTFLEX2/GPIO66
CLKOUTFLEX3/GPIO67
http://hobi-elektronika.net
REFCLK14IN
XTAL25_OUT
2 OF 10
2 OF 10
SMBCLK
SMBDATA
SML0CLK
SML0DATA
CL_CLK1 CL_DATA1 CL_RST1#
XTAL25_IN
B9 H14 C8
J14 C6 G8
M14 E10 G12
T13 T11 T9
H1
AD43 AD45
AN4 AN2
AT1 AT3
AW24 BA24
AP3 AP1
F18 E18
AH13 AH12
P41
J42
AH51 AH53
AF38
T45
P43
T42
N50
3
090915-1
090901-1
PCH_SMB_CLK PCH_SMB_DATA
PCH_UPEK_INIT#
LPD_SPI_INTR#
SML1CLK SML1DAT
PEG_CLKREQ#
CLK_PCH_PEGA_N CLK_PCH_PEGA_P
CLK_EXP_N CLK_EXP_P
CLK_DP_N CLK_DP_P
CLK_CPU_DMI# CLK_CPU_DMI
CLK_CPU_BCLK# CLK_CPU_BCLK
DREFCLK# DREFCLK
CLK_PCIE_SATA# CLK_PCIE_SATA
CLK_ICH14
CLK_PCI_FB
XCLK_RCOMP
CLK_PCI_SIO_DOCK
CLK_PCI_LPC
CLK_PCH_REF14
CLK48_GPIO
091019-1
R672 22R2J-2-GPR672 22R2J-2-GP
R764
R764
12
+3VALW
10KR2J-3-GP
10KR2J-3-GP
D32
D32
A K
CH751H-40-1-GP
CH751H-40-1-GP
SML0_CLK SML0_DATA
090820-1-SI
R792 0R0402-PAD-1-GPR792 0R0402-PAD-1-GP
1 2
R793 0R0402-PAD-1-GPR793 0R0402-PAD-1-GP
1 2
CLK_EXP_N 5 CLK_EXP_P 5
CLK_DP_N 5 CLK_DP_P 5
CLK_CPU_DMI# 23 CLK_CPU_DMI 23
CLK_CPU_BCLK# 23 CLK_CPU_BCLK 23
DREFCLK# 23 DREFCLK 23
CLK_PCIE_SATA# 23 CLK_PCIE_SATA 23
CLK_ICH14 23
CLK_PCI_FB 18
1 2
R631 90D9R2F- 1-GPR631 90D9R2F-1-GP
TP97 TPAD14-GPTP97 TPAD14-GP
1
TP105 TPAD14-GPTP105 TPAD 14-GP
1
TP98 TPAD14-GPTP98 TPAD14-GP
1
1 2
CLK48_5158
C844
C844
DY
DY
SC33P50V2JN-3GP
SC33P50V2JN-3GP
090829-1
XTAL25_IN XTAL25_OUT
12
DY
DY
CLK48_5158 38
2
LID_SW# 32,45,46
CLK_PCIE_VGA# 24 CLK_PCIE_VGA 24
PCH_SMBDATA11,12,13,23,39
+1.05VS
1MR2J-1-GP
1MR2J-1-GP
090824-1-SI
CLKOUTFLEX3/GPIO67: Configurable as an programmable output clock 48MHz output to SIO.
3
2
SML1CLK_KBC25,46
R761
R761
XTAL25_OUT
+3VALW +3VALW
123
45
RN85
RN85 SRN2K2J-2-GP
SRN2K2J-2-GP
+3VS
1
23
4
PCH_SMB_CLK
+3VL
678
PCH_SMB_CLK
PCH_SMB_DATA
PCH_SMB_CLK SML0_CLK
PCH_SMB_DATA
RN52
RN52
SRN2K2J-1-GP
SRN2K2J-1-GP
U47
U47
1 2 3 4
DMN66D0LDW-7-GP
DMN66D0LDW-7-GP
SML0_CLK SML0_DATA
090820-1-SI
1
23
RN92
RN92
SRN2K2J-1-GP
SRN2K2J-1-GP
4
U99
1 2 3 4
DMN66D0LDW-7-GP
DMN66D0LDW-7-GP
C795
C795
1 2
UMA
UMA
12
X3
X3 XTAL-25MHZ-113-GP
XTAL-25MHZ-113-GP
C807
C807
1 2
UMA
UMA
U99
090818-1-SI
XTAL25_IN
12
UMA
UMA
UMA
UMA
82.30020.971
82.30020.971
SML1DAT
090825-1-SI
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet of
1
1
23
RN53
RN53 SRN2K2J-1-GP
SRN2K2J-1-GP
090903-1
C901
C901
SC33P50V2JN-3GP
SC33P50V2JN-3GP
6 5
SC12P50V2JN-3GP
SC12P50V2JN-3GP
SC12P50V2JN-3GP
SC12P50V2JN-3GP
PCH (2/9)-PCIE/SMBUS
PCH (2/9)-PCIE/SMBUS
PCH (2/9)-PCIE/SMBUS
4
SML1DAT SML1CLK
091015-1
12
12
C388
C388
C385
C385
SC33P50V2JN-3GP
SC33P50V2JN-3GP
DY
DY
DY
DY
+3VS
6 5
+3VALW
SML1CLK
PEG_CLKREQ#
S-Class Intel
S-Class Intel
S-Class Intel
PCH_UPEK_INIT#
LPD_SPI_INTR#
SML0_DATA
12
12
C383
C383
SC33P50V2JN-3GP
SC33P50V2JN-3GP
SC820P50V3KX-GP
SC820P50V3KX-GP
DY
DY
WWAN
WWAN
PCH_SMB_DATA
PCH_SMBCLK 11,12,13,23,39
SML1DAT_KBC 25,46
R355
R355
1 2
10KR2J-3-GP
10KR2J-3-GP
Wistron Incorporated
Wistron Incorporated
Wistron Incorporated
21F, 88, Hsin Tai Wu Rd
21F, 88, Hsin Tai Wu Rd
21F, 88, Hsin Tai Wu Rd Hsichih, Taipei
Hsichih, Taipei
Hsichih, Taipei
15 62Wednesday, October 28, 2009
15 62Wednesday, October 28, 2009
15 62Wednesday, October 28, 2009
1
15
+3VALW
4
1
2 3
of
of
RN89
RN89
SRN10KJ-5-GP
SRN10KJ-5-GP
5
4
3
2
1
1
TP64TPAD14-GP TP64TPAD14-GP
DMI_RXN04 DMI_RXN14
D D
+1.05VS
1 2
R599 49D9R2F-GPR599 49D9R2F-GP
C C
XDP_DBRESET#5
091019-1
DMI_RXN24 DMI_RXN34
DMI_RXP04 DMI_RXP14 DMI_RXP24 DMI_RXP34
DMI_TXN04 DMI_TXN14 DMI_TXN24 DMI_TXN34
DMI_TXP04 DMI_TXP14 DMI_TXP24 DMI_TXP34
DMI_IRCOMP_R
R659
R659
1 2
0R0402-PAD-1-GP
0R0402-PAD-1-GP
+3VS
DY
DY
12
R663
R663 10KR2J-3-GP
10KR2J-3-GP
PM_SYSRST#_RPM_SYSRST#_RPM_SYSRST#_RPM_SYSRST#_R
091019-1
R344
R344
1 2
090924-1
PWRBTN_OUT#5,45,46
AC_PRESENT25,36,46
1 2
0R0402-PAD-1-GP
0R0402-PAD-1-GP
R618
R618
1 2
0R0402-PAD-1-GP
0R0402-PAD-1-GP
R616
R616
1 2
10KR2J-3-GP
10KR2J-3-GP
091019-1
SUS_PWR_ACK46
PM_BATLOW#_R
PM_RI#
CPUCORE_PWRGD46,54
R671 10KR2J-3-GPR671 10KR2J-3-GP
PM_DRAM_PWRGD5
090924-1
PM_RSMRST#46
RT8205_PGOOD53
090824-1-SI
B B
090901-1
090901-1
PM_R_PWROK
1 2
R359 10KR2J-3-GPR359 10KR2J-3-GP
PM_DRAM_PWRGD
PM_RSMRST#_R
SUS_PWR_ACK
PWRBTN_OUT#
AC_PRESENT
LAN_RST#1
U3C
U3C
BC24
DMI0RXN
BJ22
DMI1RXN
AW20
DMI2RXN
BJ20
DMI3RXN
BD24
DMI0RXP
BG22
DMI1RXP
BA20
DMI2RXP
BG20
DMI3RXP
BE22
DMI0TXN
BF21
DMI1TXN
BD20
DMI2TXN
BE18
DMI3TXN
BD22
DMI0TXP
BH21
DMI1TXP
BC20
DMI2TXP
BD18
DMI3TXP
BH25
DMI_ZCOMP
BF25
DMI_IRCOMP
T6
SYS_RESET#
M6
SYS_PWROK
B17
PWROK
K5
MEPWROK
A10
LAN_RST#
D9
DRAMPWROK
C16
RSMRST#
M1
SUS_PWR_DN_ACK/GPIO30
P5
PWRBTN#
P7
ACPRESENT/GPIO31
A6
BATLOW#/GPIO72
F14
RI#
IBEXPEAK-M-GP-NF
IBEXPEAK-M-GP-NF
PCH(3/9)
3 OF 10
3 OF 10
FDI_RXN0 FDI_RXN1 FDI_RXN2 FDI_RXN3 FDI_RXN4 FDI_RXN5 FDI_RXN6 FDI_RXN7
FDI_RXP0 FDI_RXP1 FDI_RXP2 FDI_RXP3 FDI_RXP4 FDI_RXP5 FDI_RXP6 FDI_RXP7
FDI_INT
FDI_FSYNC0
DMI
FDI
DMI
FDI
FDI_FSYNC1 FDI_LSYNC0 FDI_LSYNC1
WAKE#
CLKRUN#/GPIO32
SUS_STAT#/GPIO61
SUSCLK/GPIO62
SLP_S5#/GPIO63
SLP_S4#
SLP_S3#
SLP_M#
System Power Management
System Power Management
TP23
PMSYNCH
SLP_LAN#/GPIO29
BA18 BH17 BD16 BJ16 BA16 BE14 BA14 BC12
BB18 BF17 BC16 BG16 AW16 BD14 BB14 BD12
BJ14 BF13 BH13 BJ12 BG14
J12
Y1
P8
F3
E4
H7
P12
K8
N2
BJ10
F6
PM_SUS_STAT#
ICH_SUSCLK
PM_SLP_S5#
SLP_S4#_R
SLP_S3#_R
PM_SLP_DSW#
H_PM_SYNC
PM_SLP_LAN#
FDI_TXN0 FDI_TXN1 FDI_TXN2 FDI_TXN3 FDI_TXN4 FDI_TXN5 FDI_TXN6 FDI_TXN7
FDI_TXP0 FDI_TXP1 FDI_TXP2 FDI_TXP3 FDI_TXP4 FDI_TXP5 FDI_TXP6 FDI_TXP7
FDI_INT FDI_FSYNC0 FDI_FSYNC1 FDI_LSYNC0 FDI_LSYNC1
FDI_TXN0 4 FDI_TXN1 4 FDI_TXN2 4 FDI_TXN3 4 FDI_TXN4 4 FDI_TXN5 4 FDI_TXN6 4 FDI_TXN7 4
FDI_TXP0 4 FDI_TXP1 4 FDI_TXP2 4 FDI_TXP3 4 FDI_TXP4 4 FDI_TXP5 4 FDI_TXP6 4 FDI_TXP7 4
FDI_INT 4 FDI_FSYNC0 4 FDI_FSYNC1 4 FDI_LSYNC0 4 FDI_LSYNC1 4
TP101 TP AD14-GPTP101 TPAD14-GP
1
TP109 TP AD14-GPTP109 TPAD14-GP
1
TP115 TP AD14-GPTP115 TPAD14-GP
1
R695
R695
12
0R0402-PAD-1-GP
0R0402-PAD-1-GP R683
R683
12
0R0402-PAD-1-GP
0R0402-PAD-1-GP
TP104 TP AD14-GPTP104 TPAD14-GP
1
1
TP111 TPAD14-GPTP111 TPAD14-GP
SRN1KJ-4-GP
SRN1KJ-4-GP
PCIE_WAKE# 35,36,39
PM_CLKRUN# 46
SLP_S4# 35,48,56
SLP_S3# 25,35,36,46,48,49,52,56,57,58,59
Layout Note: Place these near PCH.
678
RN70
RN70
DIS
DIS
4 5
H_PM_SYNC 5
FDI_LSYNC1 FDI_FSYNC1 FDI_LSYNC0 FDI_FSYNC0 FDI_INT
GFX_IMON
R598
R598
1KR2J-1-GP
1KR2J-1-GP
123
DIS
DIS
GFX_IMON 8,55
12
12
R133
R133
1KR2J-1-GP
1KR2J-1-GP
DIS
DIS
16
+3VALW
PM_BATLOW#_R
PCIE_WAKE#
A A
1 2
R360 8K2R2J-3-GPR360 8K2R2J-3-GP
1 2
R711 1KR2J-1-GPR711 1KR2J-1-GP
5
PM_CLKRUN#
1 2
R321 8K2R2J-3-GPR321 8K2R2J-3-GP
4
+3VS
090824-1-SI
http://hobi-elektronika.net
PM_RI# AC_PRESENT PWRBTN_OUT# SUS_PWR_ACK
3
RN87
RN87
1 2 3 4 5
SRN10KJ-6-GP
SRN10KJ-6-GP
+3VALW
8 7 6
<Core Design>
<Core Design>
<Core Design>
Wistron Incorporated
Wistron Incorporated
Wistron Incorporated
21F, 88, Hsin Tai Wu Rd
21F, 88, Hsin Tai Wu Rd
21F, 88, Hsin Tai Wu Rd Hsichih, Taipei
Hsichih, Taipei
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
2
Date: Sheet
PCH (3/9)-DMI/SYS PWR
PCH (3/9)-DMI/SYS PWR
PCH (3/9)-DMI/SYS PWR
S-Class Intel
S-Class Intel
S-Class Intel
Hsichih, Taipei
1
16 62Wednesday, October 28, 2009
16 62Wednesday, October 28, 2009
16 62Wednesday, October 28, 2009
of
of
of
5
4
3
2
1
PCH(4/9)
+3VS
1 2
UMA
UMA
M_BLUE M_GREEN M_RED
CRT_DDC_CLK31 CRT_DDC_DATA31
M_REDM93_RED M_GREEN M_BLUE
L_BKLT_EN32 PCH_L_VDD_EN32
PCH_L_BKLTCTL32 DDC2_R_CLK32
DDC2_R_DATA32
TPAD14-GP
TPAD14-GP
1 2
UMA
UMA
R621 0R2J-2-GP
R621 0R2J-2-GP
TXCLKA_A_L-32 TXCLKA_A_L+32
TXOUTA_A_L0-32 TXOUTA_A_L1-32 TXOUTA_A_L2-32
TXOUTA_A_L0+32 TXOUTA_A_L1+32 TXOUTA_A_L2+32
TXCLKB_B_L-32 TXCLKB_B_L+32
TXOUTB_B_L0-32 TXOUTB_B_L1-32 TXOUTB_B_L2-32
TXOUTB_B_L0+32 TXOUTB_B_L1+32 TXOUTB_B_L2+32
CRT_HSYNC31 CRT_VSYNC31
TP89
TP89
RN44
RN44
UMA
UMA
SRN0J-7-GP
SRN0J-7-GP
4 5 3 2 1
R635
R635
1 2
1KR2D-1-GP
1KR2D-1-GP
LCTLA_CLK
LCTLB_DATA
LVD_IBG LVD_VBG
1
LVD_VREFH
M_BLUE_1
6
M_GREEN_1
7
M_RED_1
8
DAC_IREF
1K 0.5% ohm
RN79
RN79
LCTLA_CLK
1
C825
C825
4
SC33P50V2JN-3GP
SC33P50V2JN-3GP
SRN10KJ-5-GP
SRN10KJ-5-GP
D D
UMA
UMA
12
DY
DY
C804
C804
LCTLB_DATA
23
DDC2_R_DATA
12
SC33P50V2JN-3GP
SC33P50V2JN-3GP
DY
DY
DDC2_R_CLK
R625 2K4R2F-GP
R625 2K4R2F-GP
UMA LVDS
C C
UMA CRT
RN68
RN68
DIS
DIS
SRN0J-7-GP
B B
M93_RED25 M93_GREEN25 M93_BLUE25
M93_GREEN M93_BLUE
SRN0J-7-GP
4 5 3 2 1
6 7 8
U3D
U3D
T48
L_BKLTEN
T47
L_VDD_EN
Y48
L_BKLTCTL
AB48
L_DDC_CLK
Y45
L_DDC_DATA
AB46
L_CTRL_CLK
V48
L_CTRL_DATA
AP39
LVD_IBG
AP41
LVD_VBG
AT43
LVD_VREFH
AT42
LVD_VREFL
AV53
LVDSA_CLK#
AV51
LVDSA_CLK
BB47
LVDSA_DATA#0
BA52
LVDSA_DATA#1
AY48
LVDSA_DATA#2
AV47
LVDSA_DATA#3
BB48
LVDSA_DATA0
BA50
LVDSA_DATA1
AY49
LVDSA_DATA2
AV48
LVDSA_DATA3
AP48
LVDSB_CLK#
AP47
LVDSB_CLK
AY53
LVDSB_DATA#0
AT49
LVDSB_DATA#1
AU52
LVDSB_DATA#2
AT53
LVDSB_DATA#3
AY51
LVDSB_DATA0
AT48
LVDSB_DATA1
AU50
LVDSB_DATA2
AT51
LVDSB_DATA3
AA52
CRT_BLUE
AB53
CRT_GREEN
AD53
CRT_RED
V51
CRT_DDC_CLK
V53
CRT_DDC_DATA
Y53
CRT_HSYNC
Y51
CRT_VSYNC
AD48
DAC_IREF
AB51
CRT_IRTN
IBEXPEAK-M-GP-NF
IBEXPEAK-M-GP-NF
LVDS
LVDS
Digital Display Interface
Digital Display Interface
CRT
CRT
4 OF 10
4 OF 10
SDVO_TVCLKINN SDVO_TVCLKINP
SDVO_STALLN SDVO_STALLP
SDVO_INTN SDVO_INTP
SDVO_CTRLCLK
SDVO_CTRLDATA
DDPB_AUXN DDPB_AUXP
DDPB_HPD
DDPB_0N DDPB_0P DDPB_1N DDPB_1P DDPB_2N DDPB_2P DDPB_3N DDPB_3P
DDPC_CTRLCLK
DDPC_CTRLDATA
DDPC_AUXN
DDPC_AUXP
DDPC_HPD
DDPC_0N
DDPC_0P
DDPC_1N
DDPC_1P
DDPC_2N
DDPC_2P
DDPC_3N
DDPC_3P
DDPD_CTRLCLK
DDPD_CTRLDATA
DDPD_AUXN
DDPD_AUXP
DDPD_HPD
DDPD_0N
DDPD_0P
DDPD_1N
DDPD_1P
DDPD_2N
DDPD_2P
DDPD_3N
DDPD_3P
BJ46 BG46
BJ48 BG48
BF45 BH45
T51 T53
BG44 BJ44 AU38
BD42 BC42 BJ42 BG42 BB40 BA40 AW38 BA38
Y49 AB49
BE44 BD44 AV40
BE40 BD40 BF41 BH41 BD38 BC38 BB36 BA36
U50 U52
BC46 BD46 AT38
BJ40 BG40 BJ38 BG38 BF37 BH37 BE36 BD36
DPD_AUXN DPD_AUXP
DPD_0N DPD_0P DPD_1N DPD_1P DPD_2N DPD_2P DPD_3N DPD_3P
1 1
UMA-HDMI
UMA-HDMI UMA-HDMI
UMA-HDMI UMA-HDMI
UMA-HDMI UMA-HDMI
UMA-HDMI UMA-HDMI
UMA-HDMI UMA-HDMI
UMA-HDMI UMA-HDMI
UMA-HDMI UMA-HDMI
UMA-HDMI
DPD_CTRLCLK 33 DPD_CTRLDATA 33
TP88 TPAD14-G PTP88 TPAD14-GP TP86 TPAD14-G PTP86 TPAD14-GP
DPD_HPD 33
C313 SCD1U16V2KX-3GP
C313 SCD1U16V2KX-3GP
1 2
C312 SCD1U16V2KX-3GP
C312 SCD1U16V2KX-3GP
1 2
C315 SCD1U16V2KX-3GP
C315 SCD1U16V2KX-3GP
1 2
C314 SCD1U16V2KX-3GP
C314 SCD1U16V2KX-3GP
1 2
C316 SCD1U16V2KX-3GP
C316 SCD1U16V2KX-3GP
1 2
C317 SCD1U16V2KX-3GP
C317 SCD1U16V2KX-3GP
1 2
C318 SCD1U16V2KX-3GP
C318 SCD1U16V2KX-3GP
1 2
C319 SCD1U16V2KX-3GP
C319 SCD1U16V2KX-3GP
1 2
HDMI_DATA2­HDMI_DATA2+ HDMI_DATA1­HDMI_DATA1+ HDMI_DATA0­HDMI_DATA0+ HDMI_CLK­HDMI_CLK+
HDMI_DATA2- 33 HDMI_DATA2+ 33 HDMI_DATA1- 33 HDMI_DATA1+ 33 HDMI_DATA0- 33 HDMI_DATA0+ 33 HDMI_CLK- 33 HDMI_CLK+ 33
UMA HDMI
17
090926-1
L6
L9
M_BLUE
M_GREEN
M_RED
A A
5
1 2
R335 75R2F-2-GPR335 75R2F-2-GP
1 2
R329 75R2F-2-GPR329 75R2F-2-GP
1 2
R325 75R2F-2-GPR325 75R2F-2-GP
M_RED M_RED_M
M_GREEN
M_BLUE
DY
DY
DY
DY
12
C143
C143
4
L9
1 2
BLM18BB470SN1D-GP
BLM18BB470SN1D-GP
L7
L7
1 2
BLM18BB470SN1D-GP
BLM18BB470SN1D-GP
L3
L3
1 2
BLM18BB470SN1D-GP
BLM18BB470SN1D-GP
DY
DY
12
12
C136
C136
C113
C113
SC10P50V2JN-4GP
SC10P50V2JN-4GP
SC10P50V2JN-4GP
SC10P50V2JN-4GP
SC10P50V2JN-4GP
SC10P50V2JN-4GP
12
M_GREEN_M
M_BLUE_M
C111
C111
SC18P50V2JN-1-GP
SC18P50V2JN-1-GP
http://hobi-elektronika.net
L6
1 2
IND-120NH-4-GP
IND-120NH-4-GP
L5
L5
1 2
IND-120NH-4-GP
IND-120NH-4-GP
L4
L4
1 2
IND-120NH-4-GP
IND-120NH-4-GP
C139
C139
C122
C122
12
12
SC18P50V2JN-1-GP
SC18P50V2JN-1-GP
SC18P50V2JN-1-GP
SC18P50V2JN-1-GP
3
RED 31
GREEN 31
BLUE 31
<Core Design>
<Core Design>
<Core Design>
Wistron Incorporated
Wistron Incorporated
Wistron Incorporated
21F, 88, Hsin Tai Wu Rd
21F, 88, Hsin Tai Wu Rd
21F, 88, Hsin Tai Wu Rd Hsichih, Taipei
Hsichih, Taipei
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
2
Date: Sheet
PCH (4/9)-LVDS/CRT
PCH (4/9)-LVDS/CRT
PCH (4/9)-LVDS/CRT
S-Class Intel
S-Class Intel
S-Class Intel
Hsichih, Taipei
1
17 62Wednesday, October 28, 2009
17 62Wednesday, October 28, 2009
17 62Wednesday, October 28, 2009
of
of
of
5
RN82
PCI_SERR# PCI_FRAME# PCI_TRDY# ACCEL_INT#
+3VS
D D
INT_PIRQG# INT_PIRQC# INT_PIRQE# PCI_STOP#
+3VS
C C
PCI_GNT0# PCI_GNT1#
PCI_GNT3#
RN82
1 2 3 4 5 6
SRN8K2J-2-GP-U
SRN8K2J-2-GP-U
RN86
RN86
1 2 3 4 5 6
SRN8K2J-2-GP-U
SRN8K2J-2-GP-U
+3VS
R678 1KR2J-1-GP
R678 1KR2J-1-GP R665 1KR2J-1-GP
R665 1KR2J-1-GP
RN48
RN48
1 2 3 4 5
SRN8K2J-4-GP
SRN8K2J-4-GP
1 2
DY
DY
1 2
DY
DY
1 2
DY
DY
R676 4K7R2J-2-GP
R676 4K7R2J-2-GP
8 7 6
10 9 8
PCI_PERR#
7
10 9 8 7
PCI_REQ3# INT_PIRQF# INT_PIRQB# PCI_REQ0#
+3VS
INT_PIRQA# PCI_DEVSEL#
PCI_PLOCK#
+3VS
PCI_REQ1# PCI_REQ2# INT_PIRQD# PCI_IRDY#
USE SPI
BOOT BIOS Strap
PCI_GNT#1 BOOT BIOS LocationPCI_GNT#0
0 0 LPC(Default)
0 1 Reserved
PCI
090903-1
5
01
11
CLK_PCI_DB45 CLK_PCI_FB15 CLK_PCI_KBC46
090821-1-SI
1 2 3
1 2
R362 0R2J-2-GP
R362 0R2J-2-GP
SPI
+3VALW
U46
U46
B
VCC
A GND
74LVC1G08GW -1-GP
74LVC1G08GW -1-GP
DY
DY
AND GATE
5 4
Y
PCI_PLTRST#
R339 22R2J-2-GPR339 22R2J-2-GP R654 22R2J-2-GPR654 22R2J-2-GP R677 22R2J-2-GPR677 22R2J-2-GP
TP99TPAD14-GP TP99TPAD14-GP TP100TPAD14-GP TP100TPAD14-GP
PLT_RST#
B B
CLK_PCI_DB CLK_PCI_FB CLK_PCI_KBC
12
12
C854
C854
C857
C857
SC33P50V2JN-3GP
SC33P50V2JN-3GP
A A
12
C862
C862
SC33P50V2JN-3GP
SC33P50V2JN-3GP
SC33P50V2JN-3GP
SC33P50V2JN-3GP
PCI_PLTRST#
ACCEL_INT#39
1 2 1 2 1 2
PCI_SERR#45,46
1 1
DY
DY
4
TP116TPAD14-GP TP116TPAD14-GP
TP113TPAD14-GP TP113TPAD14-GP
TP106TPAD14-GP TP106TPAD14-GP
12
R357
R357 100KR2J-1-GP
100KR2J-1-GP
4
INT_PIRQA# INT_PIRQB# INT_PIRQC# INT_PIRQD#
PCI_REQ0# PCI_REQ1# PCI_REQ2# PCI_REQ3#
PCI_GNT0# PCI_GNT1# PCI_GNT2#
1
PCI_GNT3# INT_PIRQE#
INT_PIRQF#
1
INT_PIRQG# ACCEL_INT#
PCI_SERR# PCI_PERR#
PCI_IRDY# PCI_DEVSEL#
PCI_FRAME# PCI_PLOCK# PCI_STOP#
PCI_TRDY# ICH_PME#
1
CLK_PCI_DB_R CLK_PCI_FB_R CLK_PCI_KBC_R CLK_PCI_GOLDF CLK_PCI_TPM
PLT_RST# 5,26,35, 36,39,45
3
PCH(5/9)
U3E
U3E
H40
AD0
N34
AD1
C44
AD2
A38
AD3
C36
AD4
J34
AD5
A40
AD6
D45
AD7
E36
AD8
H48
AD9
E40
AD10
C40
AD11
M48
AD12
M45
AD13
F53
AD14
M40
AD15
M43
AD16
J36
AD17
K48
AD18
F40
AD19
C42
AD20
K46
AD21
M51
AD22
J52
AD23
K51
AD24
L34
AD25
F42
AD26
J40
AD27
G46
AD28
F44
AD29
M47
AD30
H36
AD31
J50
C/BE0#
G42
C/BE1#
H47
C/BE2#
G34
C/BE3#
G38
PIRQA#
H51
PIRQB#
B37
PIRQC#
A44
PIRQD#
F51
REQ0#
A46
REQ1#/GPIO50
B45
REQ2#/GPIO52
M53
REQ3#/GPIO54
F48
GNT0#
K45
GNT1#/GPIO51
F36
GNT2#/GPIO53
H53
GNT3#/GPIO55
B41
PIRQE#/GPIO2
K53
PIRQF#/GPIO3
A36
PIRQG#/GPIO4
A48
PIRQH#/GPIO5
K6
PCIRST#
E44
SERR#
E50
PERR#
A42
IRDY#
H44
PAR
F46
DEVSEL#
C46
FRAME#
D49
PLOCK#
D41
STOP#
C48
TRDY#
M7
PME#
D5
PLTRST#
N52
CLKOUT_PCI0
P53
CLKOUT_PCI1
P46
CLKOUT_PCI2
P51
CLKOUT_PCI3
P48
CLKOUT_PCI4
IBEXPEAK-M-GP-NF
IBEXPEAK-M-GP-NF
091019-1
A16 swap override Strap/Top-Block Swap Override jumper
OC2# USB_OC4#
PCI
PCI
+3VALW
NV_CE#0 NV_CE#1 NV_CE#2 NV_CE#3
NV_DQS0 NV_DQS1
NV_DQ0/NV_IO0 NV_DQ1/NV_IO1 NV_DQ2/NV_IO2 NV_DQ3/NV_IO3 NV_DQ4/NV_IO4 NV_DQ5/NV_IO5 NV_DQ6/NV_IO6 NV_DQ7/NV_IO7 NV_DQ8/NV_IO8
NV_DQ9/NV_IO9 NV_DQ10/NV_IO10 NV_DQ11/NV_IO11
NVRAM
NVRAM
NV_DQ12/NV_IO12 NV_DQ13/NV_IO13 NV_DQ14/NV_IO14 NV_DQ15/NV_IO15
NV_RCOMP
NV_WR#0_RE# NV_WR#1_RE#
NV_WE#_CK0 NV_WE#_CK1
USB
USB
USBP10N USBP10P USBP11N USBP11P USBP12N USBP12P USBP13N USBP13P
USBRBIAS#
USBRBIAS
OC0#/GPIO59 OC1#/GPIO40 OC2#/GPIO41 OC3#/GPIO42 OC4#/GPIO43
OC5#/GPIO9 OC6#/GPIO10 OC7#/GPIO14
RP2
RP2
1 2 3 4 5 6
SRN10KJ-L3-GP
SRN10KJ-L3-GP
5 OF 10
5 OF 10
NV_ALE NV_CLE
NV_RB#
USBP0N USBP0P USBP1N USBP1P USBP2N USBP2P USBP3N USBP3P USBP4N USBP4P USBP5N USBP5P USBP6N USBP6P USBP7N USBP7P USBP8N USBP8P USBP9N USBP9P
AY9 BD1 AP15 BD8
AV9 BG8
AP7 AP6 AT6 AT9 BB1 AV6 BB3 BA4 BE4 BB6 BD6 BB7 BC8 BJ8 BJ6 BG6
BD3 AY6
AU2 AV7 AY8
AY5 AV11
BF5
H18 J18 A18 C18 N20 P20 J20 L20 F20 G20 A20 C20 M22 N22 B21 D21 H22 J22 E22 F22 A22 C22 G24 H24 L24 M24 A24 C24
B25 D25
N16 J16 F16 L16 E14 G16 F12 T15
10 9 8 7
NV_ALE NV_CLE
NV_RCOMP
USB_RBIAS_PN
090821-1-SI
090901-1
1 2
R619 32D4R2F-GPR619 32D4R2F-GP
USB_OC0# BT_OFF OC2# FPR_OFF USB_OC4# ISO_PREP# LANLINK_STATUS# GPIO14
+3VALW
ISO_PREP#
1 2
22D6R2F-L1-GP
22D6R2F-L1-GP
CLKREQ_WWAN# 19
PCI_GNT#3 Low = A16 swap
http://hobi-elektronika.net
3
2
USB20_N0 44 USB20_P0 44 USB20_N1 44 USB20_P1 44 USB20_N2 44 USB20_P2 44 USB20_N3 38 USB20_P3 38 USB20_N4 35 USB20_P4 35 USB20_N5 39 USB20_P5 39
USB20_N8 44 USB20_P8 44 USB20_N9 40 USB20_P9 40 USB20_N10 34 USB20_P10 34 USB20_N11 44 USB20_P11 44 USB20_N12 32 USB20_P12 32
R367
R367
091019-1
WLAN_TRANSMIT_OFF#19,39
override/Top-Block Swap Override enabled High = Default
2
090901-1
DMI Termination Voltage
NV_CLE Set to Vss when low.
Set to Vcc when high.
Danbury Technology: Disabled when Low. Enable when High.
External USB2
USB1
ESATA USB4
091019-1
Card Reader
NEW CARD
WLAN
BLUETOOTH
WWAN
Fingerprint
External USB3
CAMERA
BT_OFF 44 FPR_OFF 34
LANLINK_STATUS# 36,37,46
GPIO14
+3VALW
1 2 3 4 5 6
SRN10KJ-L3-GP
SRN10KJ-L3-GP
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
NV_CLE
NV_ALE
Pair
0
1
2
3
4 NEW CARD
5
6
7
8
9
10
11
12
13
USB20_N12 USB20_P12
12
C872
C872
C871
C871
SC33P50V2JN-3GP
SC33P50V2JN-3GP
DY
DY
RP3
RP3
10 9 8 7
PCH (5/9)-PCI/USB
PCH (5/9)-PCI/USB
PCH (5/9)-PCI/USB
S-Class Intel
S-Class Intel
S-Class Intel
1
+1.8VS_NB
12
R725
R725 1KR2J-1-GP
1KR2J-1-GP
DY
DY
+1.8VS_NB
12
R748
R748 1KR2J-1-GP
1KR2J-1-GP
DY
DY
USB
Device
External USB2
USB1 (Debug port)
ESATA USB4
Card Reader
FREE
WLAN
FREE
BLUETOOTH
WWAN
Fingerprint
External USB3
CAMERA
FREE
12
SC33P50V2JN-3GP
SC33P50V2JN-3GP
DY
DY
+3VALW
USB_OC0#
091019-1
PCH_GPIO12 19CLK_PCIE_LAN_REQ#19,36
PCH_GPIO24 19
Wistron Incorporated
Wistron Incorporated
Wistron Incorporated
21F, 88, Hsin Tai Wu Rd
21F, 88, Hsin Tai Wu Rd
21F, 88, Hsin Tai Wu Rd Hsichih, Taipei
Hsichih, Taipei
Hsichih, Taipei
1
18 62Wednesday, October 28, 2009
18 62Wednesday, October 28, 2009
18 62Wednesday, October 28, 2009
18
of
of
of
5
4
3
2
1
PCH(6/9)
6 OF 10
U3F
RN45
RN45
+3VS
D D
C C
B B
A A
1 2 3
SRN10KJ-11-GP-U
SRN10KJ-11-GP-U
PCH_GPIO15
PCH_DDR_RST
LAN_DIS#
WW AN_TRANSMIT_OFF#
PCH_GPIO38
THERM_SCI# WWAN_DET#
091019-1
WEBCAM_OFF# STP_PCI# RUNSCI_EC# NPCI_RST#
+3VS
4
CRB_SV_DET
12
R653
R653
10KR2J-3-GP
10KR2J-3-GP
R717 10KR2J-3-GPR717 10KR2J-3-GP
R740 10KR2J-3-GPR740 10KR2J-3-GP
5
BMBUSY#
PCH_DDR_RST5
WW AN_TRANSMIT_OFF#40
091019-1
CLK_SATA_OE#CLK_SATA_OE#
NPCI_RST#46
WEBCAM_OFF#32
CLK_PCIE_LAN_REQ#18,36
CLKREQ_WWAN#18
WLAN_TRANSMIT_OFF#18,39
1 2
R648 1KR2J-1-GPR648 1KR2J-1-GP
1 2
1 2
1 2
DY
DY
R639 10KR2J-3-GP
R639 10KR2J-3-GP
1 2
R645 10KR2J-3-GPR645 10KR2J-3-GP
RN78
RN78
1
4
2 3
SRN10KJ-11-GP-U
SRN10KJ-11-GP-U
RP1
RP1
1 2 3 4 5 6
SRN10KJ-L3-GP
SRN10KJ-L3-GP
10
PCH_GPIO17
9
PCH_GPIO48
8
PCH_GPIO16
7
PCH_GPIO49
RUNSCI_EC#46 THERM_SCI#11
PCH_GPIO1218
WWAN_DET#40 PCH_GPIO2418
+3VS
LAN_DIS#36
+3VALW
+3VS
OCP#60
TP107TPAD14-GP TP107TPAD14-GP
1
TP108TPAD14-GP TP108TPAD14-GP
TP103TPAD14-GP TP103TPAD14-GP
091019-1
091019-1
OCP# RUNSCI_EC# THERM_SCI# PCH_DDR_RST PCH_GPIO12 PCH_GPIO15 PCH_GPIO16 PCH_GPIO17 WWAN_DET#
PCH_GPIO24
1
WW AN_TRANSMIT_OFF# LAN_DIS# STP_PCI#
1
NPCI_RST#
PCH_GPIO38 CRB_SV_DET CLK_PCIE_LAN_REQ# CLKREQ_WWAN# PCH_GPIO48 PCH_GPIO49 WLAN_TRANSMIT_OFF#
VSS_NCTF#A53 VSS_NCTF#B2
VSS_NCTF#BJ1
VSS_NCTF#BJ53
4
BMBUSY#
U3F
Y3
BMBUSY#/GPIO0
C38
TACH1/GPIO1
D37
TACH2/GPIO6
J32
TACH3/GPIO7
F10
GPIO8
K9
LAN_PHY_PWR_CTRL/GPIO12
T7
GPIO15
AA2
SATA4GP/GPIO16
F38
TACH0/GPIO17
Y7
SCLOCK/GPIO22
H10
GPIO24
AB12
GPIO27
V13
GPIO28
M11
STP_PCI#/GPIO34
V6
SATACLKREQ#/GPIO35
AB7
SATA2GP/GPIO36
AB13
SATA3GP/GPIO37
V3
SLOAD/GPIO38
P3
SDATAOUT0/GPIO39
H3
PCIECLKRQ6#/GPIO45
F1
PCIECLKRQ7#/GPIO46
AB6
SDATAOUT1/GPIO48
AA4
SATA5GP/GPIO49
F8
GPIO57
B4
VSS_NCTF_8
B52
VSS_NCTF_9
BH2
VSS_NCTF_16
BH52
VSS_NCTF_17
D2
VSS_NCTF_28
A4
VSS_NCTF#A4
A49
VSS_NCTF#A49
A5
VSS_NCTF#A5
A50
VSS_NCTF#A50
A52
VSS_NCTF#A52
A53
VSS_NCTF#A53
B2
VSS_NCTF#B2
B53
VSS_NCTF#B53
BE1
VSS_NCTF#BE1
BE53
VSS_NCTF#BE53
BF1
VSS_NCTF#BF1
BF53
VSS_NCTF#BF53
BH1
VSS_NCTF#BH1
BH53
VSS_NCTF#BH53
BJ1
VSS_NCTF#BJ1
BJ2
VSS_NCTF#BJ2
BJ4
VSS_NCTF#BJ4
BJ49
VSS_NCTF#BJ49
BJ5
VSS_NCTF#BJ5
BJ50
VSS_NCTF#BJ50
BJ52
VSS_NCTF#BJ52
BJ53
VSS_NCTF#BJ53
D1
VSS_NCTF#D1
D53
VSS_NCTF#D53
E1
VSS_NCTF#E1
E53
VSS_NCTF#E53
IBEXPEAK-M-GP-NF
IBEXPEAK-M-GP-NF
http://hobi-elektronika.net
MISC
MISC
CLKOUT_BCLK0_N/CLKOUT_PCIE8N CLKOUT_BCLK0_P/CLKOUT_PCIE8P
GPIO
GPIO
CPU
CPU
NCTF
NCTF
RSVD
RSVD
NCTF TEST PIN:
A4,A49,A5,A50,A52,A53,B2,B53,BE1,
BE53,BF1,BF53,BH1,BH53,BJ1,BJ2,BJ4,
BJ49,BJ5,BJ50,BJ52,BJ53,D1,D53,E1,E53
NCTF TEST PIN:
A4,A49,A5,A50,A52,A53,B2,B53,BE1,
BE53,BF1,BF53,BH1,BH53,BJ1,BJ2,BJ4,
BJ49,BJ5,BJ50,BJ52,BJ53,D1,D53,E1,E53
3
6 OF 10
CLKOUT_PCIE6N CLKOUT_PCIE6P
CLKOUT_PCIE7N CLKOUT_PCIE7P
A20GATE
PECI
RCIN#
PROCPWRGD
THRMTRIP#
TP10 TP11 TP12 TP13 TP14 TP15 TP16 TP17 TP18
TP19 NC_1 NC_2 NC_3 NC_4 NC_5
INIT3_3V#
TP24
TP1 TP2 TP3 TP4 TP5 TP6 TP7 TP8 TP9
CLK_PCIE_LAN_N_R
AH45
CLK_PCIE_LAN_P_R
AH46
PCH_SRC7_DMI_LAI_N
AF48
PCH_SRC7_DMI_LAI_P
AF47
U2
AM3 AM1 BG10 T1 BE10 BD10
BA22 AW22 BB22 AY45 AY46 AV43 AV45 AF13 M18 N18 AJ24 AK41 AK42 M32 N32 M30 N30 H12 AA23 AB45 AB38 AB42 AB41 T39
P6 C10
INIT3_3V#
091019-1
1 1
GATEA20
KB_RST#
PCH_THERMTRIP_R
CRACK_BGA9,28,46
1
R794 0R0402-PAD-1- GPR794 0R0402-PAD-1-GP
1 2
R795 0R0402-PAD-1- GPR795 0R0402-PAD-1-GP
1 2
TP91 TPAD14-GPTP91 TPAD14-GP TP90 TPAD14-GPTP90 TPAD14-GP
GATEA20 46
BCLK_CPU_N 5 BCLK_CPU_P 5
H_PECI 5
KB_RST# 46
H_PWRGD 5
1 2
R606 56R2J-4-GPR606 56R2J-4-GP
+3VS
R361
R361 100KR2J-1-GP
100KR2J-1-GP
1 2
VSS_NCTF#B2
CRACK_BGA
+3VS
R291
R291 100KR2J-1-GP
100KR2J-1-GP
1 2
CRACK_BGA
TP96 TPAD14-GPTP96 TPAD14-GP
2
CLK_PCIE_LAN_N 36 CLK_PCIE_LAN_P 36
RN46
RN46
GATEA20
1
KB_RST#
2 3
SRN10KJ-11-GP-U
SRN10KJ-11-GP-U
1 2
R605 56R2J-4-GPR605 56R2J-4-GP
+3VS
4
+1.05VS_VTT
H_THRMTRIP-A# 5,11,25
Placed Within 2" from PCH
R356
R356 100KR2J-1-GP
090819-1-SI
U45
U45
1 2 3 4
DMN66D0LDW-7-GP
DMN66D0LDW-7-GP
6 5
CRACK_BGA VSS_NCTF#A53
090819-1-SI
U32
U32
1 2 3 4
DMN66D0LDW-7-GP
DMN66D0LDW-7-GP
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
CRACK_BGA
6
VSS_NCTF#BJ1VSS_NCTF#BJ53
5
PCH (6/9)-GPIO
PCH (6/9)-GPIO
PCH (6/9)-GPIO
100KR2J-1-GP
1 2
R292
R292 100KR2J-1-GP
100KR2J-1-GP
1 2
S-Class Intel
S-Class Intel
S-Class Intel
1
19
Wistron Incorporated
Wistron Incorporated
Wistron Incorporated
21F, 88, Hsin Tai Wu Rd
21F, 88, Hsin Tai Wu Rd
21F, 88, Hsin Tai Wu Rd Hsichih, Taipei
Hsichih, Taipei
Hsichih, Taipei
19 62Wednesday, October 28, 2009
19 62Wednesday, October 28, 2009
19 62Wednesday, October 28, 2009
of
of
of
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