FUJITSU MBM29PL3200TE, MBM29PL3200BE70, MBM29PL3200BE90 DATA SHEET

FUJITSU SEMICONDUCTOR

DATA SHEET

PAGE MODE FLASH MEMORY

CMOS

DS05-20890-1E

32 M (2 M

MBM29PL3200TE/BE

DESCRIPTION

■■■■

The MBM29PL3200TE/BE is 32 M-bit, 3.0 V-only Page mode Flash memory organized as 2 M words of 16 bits
each or 1 M words of 32 bits each. The device is off ered in 90-pin SSOP and 84-ball FBGA packages . This device
is designed to be programmed in-system with the standard system 3.0 V V
are not required for write or erase operations. The device can also be reprogrammed in standard EPROM pro­grammers.

PRODUCT LINE-UP

■■■■

Part No. MBM29PL3200TE/BE

V

Ordering Part No.

Max. Random Address Access Time (ns) 70 90

CC = 3.3 V 70 

V

CC = 3.0 V  90

16/1 M

××××

+

0.3 V

−

0.3 V

+

0.6 V

−

0.3 V

32) BIT

××××

70/90

CC supply. 12.0 V VPP and 5.0 V VCC

(Continued)

Max. Page Address Access Time (ns) 25 35
Max. CE
Max. OE Access Time (ns) 25 35

■■■■

Access Time (ns) 70 90

PACKAGES

90-pin plastic SSOP 84-ball plastic FBGA

(FPT-90P-M01) (BGA-84P-M01)

MBM29PL3200TE/BE70/90

(Continued)

The device provides truly high perfor mance non-volatile Flash memory solution. The device offers fast page
access times of 25 ns and 35 ns with random access times of 70 ns and 90 ns, allowing operation of high-speed
microprocessors without wait states. To eliminate bus contention, the device has separate chip enable (CE
write enable (WE

The device is command set compatible with JEDEC standard E
register using standard microprocessor write timings. Register contents serve as input to an internal state­machine which controls the erase and programming circuitry. Write cycles also internally latch addresses and
data needed for the programming and erase operations. Reading data out of the device is similar to reading
from 5.0 V and 12.0 V Flash or EPROM devices.

) and output enable (OE) controls. The page size is 8 words or 4 double words.

2

PROMs. Commands are written to the command

),

The device is programmed by executing the program command sequence. This will invoke the Embedded
Program

TM

* Algorithm, which is an internal algorithm that automatically times the program pulse widths and
verifies proper cell margins. Typically, each sector can be programmed and v erified in about 2.2 seconds. Erase
is accomplished by ex ecuting the erase command sequence. This will inv oke the Embedded Erase

TM

* Algorithm,
which is an internal algorithm that automatically preprograms the array if it is not already programmed before
ex ecuting the erase oper ation. During erase, the device automatically times the erase pulse widths and verifies
proper cell margins.

Any individual sector is typically erased and verified in 4.8 second. (If already preprogrammed.)
The device also features a sector erase architecture. The sector mode allows each sector to be erased and

reprogrammed without affecting other sectors. The device is erased when shipped from the factory.
The device f eatures single 3.0 V po w er supply operation for both read and write functions. Internally generated

and regulated voltages are provided for the program and erase operations. A low V
inhibits write operations on the loss of power. The end of program or erase is detected by Data
by the Toggle Bit feature on DQ

6, output pin. Once the end of a program or erase cycle has been completed,

CC detector automatically

Polling of DQ7,

the device internally resets to the read mode.
Fujitsu’s Flash technology combines years of Flash memory manufacturing experience to produce the highest

levels of quality, reliability, and cost effectiveness. The device memory electrically erases all bits within a sector
simultaneously via Fo wler-Nordhiem tunneling. The words/double words are programmed one word/doub le word
at a time using the EPROM programming mechanism of hot electron injection.

*: Embedded Erase

FEATURES

■■■■

•

•

µµµµ

0.23

m Process Technology

Single 3.0 V read, program and erase

TM

and Embedded ProgramTM are trademarks of Advanced Micro Devices, Inc.

Minimized system level power requirements

•

High Performance Page Mode

25 ns maximum page access time (70 ns random access time)

•

8 words Page (

•

Compatible with JEDEC-standard commands

Uses same software commands as E

•

Compatible with JEDEC-standard world-wide pinouts

××××

16) /4 double words (

××××

32) size

2

PROMs

90-pin SSOP (Package suffix : PFV)
84-ball FBGA (Package suffix : PBT)

•

Minimum 100,000 program/erase cycles

•

Sector erase architecture

One 16 K word, two 8 K words, one 96 K word, and fifteen 128 K words sectors in word mode ( × 16)
One 8 K double word, two 4 K doub le w ords, one 48 K doub le w ord, and fifteen 64 K doub le w ords sectors in
double word mode ( × 32)
Any combination of sectors can be concurrently erased. Also supports full chip erase

2

MBM29PL3200TE/BE70/90

•

Boot Code Sector Architecture

T = Top sector
B = Bottom sector

•

Embedded Erase

Automatically pre-programs and erases the chip or any sector

•

Embedded Program

Automatically programs and verifies data at specified address

•Data

•

Polling and Toggle Bit feature for detection of program or erase cycle completion

Automatic sleep mode

When addresses remain stable, automatically switches themselves to low power mode

•

•

CC

Low V

write inhibit

Erase Suspend/Resume

Suspends the erase operation to allow a read data and/or program in another sector within the same device

•

Sector protection

Hardware method disables any combination of sectors from program or erase operations

• Fast Programming Function by Extended command

•

Temporary sector unprotection

Temporary sector unprotection with the software command

• In accordance with CFI (C

TM

Algorithms

TM

Algorithms

≤≤≤≤

2.5 V

ommon Flash Memory Interface)

3

MBM29PL3200TE/BE70/90

PIN ASSIGNMENTS

■■■■

(TOP VIEW)

SSOP

N.C.
N.C.
N.C.
N.C.
N.C.

A
A1
A2
A3
A4
A5

VCC

DQ0

DQ16

DQ1

DQ17

VSS
VCC

DQ2

DQ18

DQ3

DQ19

DQ4

DQ20

DQ5

DQ21

VSS
VCC

DQ6

DQ22

DQ7

DQ23

VSS

A6
A7
A8

A9
A10
A11
A12

N.C.
N.C.
N.C.
N.C.
N.C.

1
2
3
4
5
6

0

7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45

90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46

N.C.
N.C.
ACC
WP
WE
N.C.
N.C.
N.C.
DW/W
OE
CE
V

SS

DQ31/A-1
DQ15
DQ30
DQ14
VSS
VCC
DQ29
DQ13
DQ28
DQ12
DQ27
DQ11
DQ26
DQ10
VSS
VCC
DQ25
DQ9
DQ24
DQ8
VCC
A19
A18
A17
A16
A15
A14
A13
N.C.
N.C.
N.C.
N.C.
N.C.

FPT-90P-M01

(Continued)

4

(Continued)

A8

CE

A7

N.C.

A6

WE

A5

N.C.

A4
A1

A3
A4

B9

DQ

30

B8

VSS

B7

DW/W

B6

N.C.

B5

ACC

B4
A2

B3
A5

B2

VCC

V

C9

CC

(TOP VIEW)

Marking Side

D9

DQ

DQ

13

MBM29PL3200TE/BE70/90

FBGA

E9

F9

G9

H9

J9

DQ

12

DQ

27

V

CC

DQ

N.C.N.C.N.C.N.C.N.C.N.C.WP

DQ23DQ7DQ6DQ4DQ19VSSDQ1

DQ22VCCVSSDQ20DQ3VCCDQ17

9

K8

J8H8G8F8E8D8C8

VCCDQ24VSSDQ11DQ28DQ29DQ15

A19

K7

J7H7G7F7E7D7C7

A16

A17A18DQ25DQ10VSSDQ14OE

K6

J6H6G6F6E6D6C6

A13

A14A15DQ8N.C.N.C.DQ31/A-1N.C.

K5

J5H5G5F5E5D5C5

N.C.

K4

J4H4G4F4E4D4C4

A10

A9A11A12N.C.DQ2A0A3

K3

J3H3G3F3E3D3C3

A7

A6A8DQ21DQ5DQ18DQ16DQ0

K2

J2H2G2F2E2D2C2

VSS

J1H1G1F1E1D1C1

26

BGA-84P-M01

5

MBM29PL3200TE/BE70/90

PIN DESCRIPTIONS

■■■■

Table 1 MBM29PL3200TE/BE Pin Configuration

Pin Name Function

A

19 to A0, A-1 Address Input

DQ

31 to DQ0 Data Input/Output

CE Chip Enable
OE

WE

DW/W Selects 32-bit or 16-bit mode

WP
ACC Program Acceleration
N.C. Pin Not Connected Internally

V

SS Device Ground

V

CC Device Power Supply

BLOCK DIAGRAM

■■■■

VCC
VSS

WE

DW/W

WP

ACC

CE
OE

State

Control

Circuit

(Command

Register)

Output Enable
Write Enable

Hardware Write Protection

Erase Voltage

Generator

Program Voltage

Generator

Chip Enable

Output Enable

Logic

STB

DQ31 to DQ0

Input/Output

Buffers

Data Latch

A

19 to A29

A1, A0
(A−1)

Low V

CC Detector

Timer for

Program/Erase

STB

Address

Latch

Y-Decoder

X-Decoder

Y-Gating

33,554,432

Cell Matrix

6

LOGIC SYMBOL

■■■■

20

A-1

A

19 to A0

CE
OE
WE
DW/W

MBM29PL3200TE/BE70/90

32 or 16

DQ31 to DQ0

7

MBM29PL3200TE/BE70/90

DEVICE BUS OPERATION

■■■■

Table 2 MBM29PL3200TE/BE User Bus Operations (DW/W

=

IH)

V

Operation CE

Auto-Select Manufacturer Code *
Auto-Select Device Code *

1

1

Extended Auto-Select Device Code *
Read *

3

1

OE WE A0A1A2A3A6A9DQ31 to DQ0WP

LLHLLLLLVID Code X
LLHHLLLLVID Code X
LLHHHHHLVID Code X

LLHA0 A1 A2 A3 A6 A9 DOUT X
Standby H X X XXXXXX HIGH-Z X
Output Disable LHHXXXXXX HIGH-Z X
Write (Program/Erase) L H L A
Enable Sector Protection *
Verify Sector Protection *
Boot Block Sector Write Protection *

Legend : L = V

IL, H = VIH, X = VIL or VIH, = Pulse input. See DC Characteristics for voltage levels.

2, *4

2, *4

LVID LHLLLVID XX

LLHLHLLLVID Code X

5

XXXXXXXXX X L

0 A1 A2 A3 A6 A9 DIN X

*1:Manufacturer and device codes may also be accessed via a command register write sequence. See Table 4.
*2:Refer to section on Sector Protection.
*3:WE

can be VIL if OE is VIL, OE at VIH initiates the write operations.
*4:VCC = 3.3 V ± 10%
*5:Protect “outermost” 16 K words (8 K double words) of the boot block sectors.

=

Table 3 MBM29PL3200TE/BE User Bus Operations (DW/W

Operation CE

Auto-Select Manufacturer Code *
Auto-Select Device Code *

1

1

Extended Auto-Select Device Code *
Read *

3

OE WE DQ31/A-1A0A1A2A3A6A9DQ15 to DQ0WP

LLH L LLLLLVID Code X
LLH L HLLLLVID Code X

1

LL H L HHHHLVID Code X
LLH A-1 A0 A1 A2 A3 A6 A9 DOUT X

IL)

V

Standby H X X X XXXXXX HIGH-Z X
Output Disable LHH X XXXXXX HIGH-Z X
Write (Program/Erase) L H L A­Enable Sector Protection *
Verify Sector Protection *
Boot Block Sector Write Protection *

Legend : L = V

IL, H = VIH, X = VIL or VIH, = Pulse input. See DC Characteristics for voltage levels.

2, *4

2, *4

LVID L LHLLLVID XX
LLH L LHLLLVID Code X

5

XXX X XXXXXX X L

1 A0 A1 A2 A3 A6 A9 DIN X

*1:Manufacturer and device codes may also be accessed via a command register write sequence. See Table 4.
*2:Refer to section on Sector Protection.
*3:WE

can be VIL if OE is VIL, OE at VIH initiates the write operations.
*4:VCC = 3.3 V ± 10%
*5:Protect “outermost” 16 K words (8 K double words) of the boot block sectors.

8

Command

Sequence

Read/Reset

DW

W

MBM29PL3200TE/BE70/90

Table 4 MBM29PL3200TE/BE Command Definitions

Bus

Write

First Bus

Write Cycle

Second Bus

Write Cycle

Third Bus

Write Cycle

Cycles

Req’d

Addr. Data Addr. Data Addr. Data Addr. Data Addr. Data Addr. Data

1XXXhF0h

Fourth Bus
Read/Write

Cycle

Fifth Bus

Write Cycle

Sixth Bus

Write Cycle

Read/Reset

DW

555h

3

AAh

2AAh

55h

555h

F0h RA RD 

W AAAh 555h AAAh

Autoselect

DW

555h

3

AAh

2AAh

55h

555h

90h 

W AAAh 555h AAAh

Program

DW

555h

4

AAh

2AAh

55h

555h

A0h PA PD 

W AAAh 555h AAAh

Chip Erase

DW

555h

6

AAh

2AAh

55h

555h

80h

555h

AAh

2AAh

55h

555h

10h

W AAAh 555h AAAh AAAh 555h AAAh

Sector Erase

DW

555h

6

AAh

2AAh

55h

555h

80h

555h

AAh

2AAh

55h SA 30h

W AAAh 555h AAAh AAAh 555h
Erase Suspend 1 XXXh B0h 
Erase Resume 1 XXXh 30h 

Set to
Fast Mode

Fast
Program *

1

Reset from
Fast Mode *

Temporary
Unprotection
Enable

DW

W AAAh 555h AAAh

DW

WXXXh

DW

1

W XXXh XXXh

DW

W AAAh 555h AAAh

555h

3

AAh

2AAh

55h

555h

20h 

XXXh

2

XXXh

2

555h

4

A0h PA PD 

XXXh

90h

2AAh

AAh

*

F0h

55h

4



555h

E0h XXXh 01h 

Temporary
Unprotection
Disable

Query *

2

Hi-ROM
Entry

Hi-ROM
Program *

3

Hi-ROM

3

Exit *

DW

555h

4

AAh

2AAh

555h

55h

W AAAh 555h AAAh

DW

1

55h

98h





WAAh

DW

555h

3

AAh

2AAh

555h

55h

W AAAh 555h AAAh

DW

555h

4

AAh

2AAh

555h

55h

W AAAh 555h AAAh

DW

555h

4

AAh

2AAh

555h

55h

W AAAh 555h AAAh

E0h XXXh 00h 

88h 

(HRA)

A0h

PA

PD 

90h XXXh 00h 

(Continued)

9

MBM29PL3200TE/BE70/90

(Continued)

DW : Double Word
W : Word

*1:This command is valid while Fast Mode.
*2:The valid addresses are A

6 to A0.

*3:This command is valid while Hi-ROM mode.
*4:The data “00h” is also acceptable.

Notes : 1.Address bits A

19 to A11 = X = “H” or “L” for all address commands except or Program Address (PA), and

Sector Address (SA).

2.Bus operations are defined in Tables 2 and 3.

3.RA = Address of the memory location to be read
PA = Address of the memory location to be programmed

Addresses are latched on the falling edge of the write pulse.

SA = Address of the sector to be erased. The combination of A

will uniquely select any sector.

4.RD = Data read from location RA during read operation.
PD = Data to be programmed at location PA. Data is latched on the falling edge of write pulse.

5.HRA = Address of the Hi-ROM area Word Mode : 000000h to 000100h

6.The system should generate the following address patterns :
DW (Double Word) Mode : 555h or 2AAh to addresses A
W (Word) Mode : AAAh or 555h to addresses A10 to A0, and A-1

7.Both Read/Reset commands are functionally equivalent, resetting the device to the read mode.

19, A18, A17, A16, A15, A14, A13 and A12

Double Word Mode : 000000h to 000080h

10 to A0

10

Table 5.1 MBM29PL3200TE Sector Protection Verify Autoselect Codes

Type A

19

to A

MBM29PL3200TE/BE70/90

12

6

A

3

A

2

A

1

A

0

A

A-1 *

1

Code (HEX)

Manufacture’s Code X V

Word

Device Code

Double

XV

Word
Word

XV

XV

Extended Device
Code

Double

Word
Word

Double

Word
Sector Protection
Temporary Sector

Unprotection

*1 : A-

1 is for W ord mode. In double word mode, DQ15 to DQ30 become “High-Z” and DQ31 becomes the lo wer address

“A-

1”.

Sector

Addresses

XVIL VIL VIL VIH VIH VIL 01h *

IL VIL VIL VIL VIL VIL 04h

VIL 227Eh

IL VIL VIL VIL VIH

X 2222227Eh

VIL 2203h

IL VIH VIH VIH VIL

X 22222203h

VIL 2201h

IL VIH VIH VIH VIH

X 22222201h

V

IL VIL VIL VIH VIL VIL 01h *

*2 : Outputs 01h at protected sector addresses and outputs 00h at unprotected sector addresses.
*3 : Outputs 01h at Temporary Sector Unprotection and outputs 00h at Non Temporary Sector Unprotection.

2

3

11

MBM29PL3200TE/BE70/90

Table 5.2 Expanded Autoselect Code

Type Code

DQ31DQ30DQ29DQ28DQ27DQ26DQ25DQ24DQ23DQ22DQ21DQ20DQ19DQ18DQ17DQ

16

Manufacturer’s
Code

(W)

227Eh A-1 HI-Z HI-Z HI-Z HI-Z HI-Z HI-Z HI-Z HI-Z HI-Z HI-Z HI-Z HI-Z HI-Z HI-Z HI-Z

04h

A-1/0

000000000000000

Device
Code

Extended
Device
Code

Sector
Protection

2222

(DW)

227Eh

(W)

2203h A-1 HI-Z HI-Z HI-Z HI-Z HI-Z HI-Z HI-Z HI-Z HI-Z HI-Z HI-Z HI-Z HI-Z HI-Z HI-Z

2222

(DW)

2203h

(W)

2201h A-1 HI-Z HI-Z HI-Z HI-Z HI-Z HI-Z HI-Z HI-Z HI-Z HI-Z HI-Z HI-Z HI-Z HI-Z HI-Z

2222

(DW)

2201h

0010001000100010

0010001000100010

0010001000100010

A-1/0

01h

000000000000000

Temporary
Sector

01h

A-1/0

000000000000000

Unprotection

Type

DQ15DQ14DQ13DQ12DQ11DQ10DQ9DQ8DQ7DQ6DQ5DQ4DQ3DQ2DQ1DQ

0

Manufacturer’s Code0000000000000100

(W)0010001001111110

Device Code

(DW)0010001001111110

(W)0010001000000011

Extended
Device Code

(DW)0010001000000011

(W)0010001000000001

(DW)0010001000000001
Sector Protection 0000000000000001
Temporary Sector

Unprotection

0000000000000001

(W) : Word mode
(DW) : Double Word mode

12

Table 5.3 MBM29PL3200BE Sector Protection Verify Autoselect Codes

Type A

19

to A

MBM29PL3200TE/BE70/90

12

6

A

3

A

2

A

1

A

0

A

A-1 *

1

Code (HEX)

Manufacture’s Code X V

Word

Device Code

Double

XV

Word
Word

XV

XV

Extended Device
Code

Double

Word
Word

Double

Word
Sector Protection
Temporary Sector

Unprotection

*1 : A-

1 is for W ord mode. In double word mode, DQ15 to DQ30 become “High-Z” and DQ31 becomes the lo wer address

“A-

1”.

Sector

Addresses

XVIL VIL VIL VIH VIH VIL 01h *

IL VIL VIL VIL VIL VIL 04h

VIL 227Eh

IL VIL VIL VIL VIH

X 2222227Eh

VIL 2203h

IL VIH VIH VIH VIL

X 22222203h

VIL 2200h

IL VIH VIH VIH VIH

X 22222200h

V

IL VIL VIL VIH VIL VIL 01h *

*2 : Outputs 01h at protected sector addresses and outputs 00h at unprotected sector addresses.
*3 : Outputs 01h at Temporary Sector Unprotection and outputs 00h at Non Temporary Sector Unprotection.

2

3

13

MBM29PL3200TE/BE70/90

Table 5.4 Expanded Autoselect Code

Type Code

DQ31DQ30DQ29DQ28DQ27DQ26DQ25DQ24DQ23DQ22DQ21DQ20DQ19DQ18DQ17DQ

16

Manufacturer’s
Code

(W)

227Eh A-1 HI-Z HI-Z HI-Z HI-Z HI-Z HI-Z HI-Z HI-Z HI-Z HI-Z HI-Z HI-Z HI-Z HI-Z HI-Z

04h

A-1/0

000000000000000

Device
Code

Extended
Device
Code

Sector
Protection

2222

(DW)

227Eh

(W)

2203h A-1 HI-Z HI-Z HI-Z HI-Z HI-Z HI-Z HI-Z HI-Z HI-Z HI-Z HI-Z HI-Z HI-Z HI-Z HI-Z

2222

(DW)

(DW)

2203h

(W)

2200h A-1 HI-Z HI-Z HI-Z HI-Z HI-Z HI-Z HI-Z HI-Z HI-Z HI-Z HI-Z HI-Z HI-Z HI-Z HI-Z

2222

2200h

01h

0010001000100010

0010001000100010

0010001000100010

A-1/0

000000000000000

Temporary
Sector

01h

A-1/0

000000000000000

Unprotection

Type

DQ15DQ14DQ13DQ12DQ11DQ10DQ9DQ8DQ7DQ6DQ5DQ4DQ3DQ2DQ1DQ

0

Manufacturer’s Code 0000000000000100

(W)0010001001111110

Device Code

(DW)0010001001111110

(W)0010001000000011

Extended
Device Code

(DW)0010001000000011

(W)0010001000000000

(DW)0010001000000000
Sector Protection 0000000000000001
Temporary Sector

Unprotection

0000000000000001

(W) : Word mode
(DW) : Double Word mode

14

MBM29PL3200TE/BE70/90

Table 7 Sector Address (MBM29PL3200TE)

Sector Address Sector

Size

Sector

19A18A17A16A15A14A13A12

A

(Kwords/

Double

××××

(

16) Address Range (

kwords)

SA0 0 0 0 0 X X X X 128/64 000000h to 01FFFFh 00000h to 0FFFFh
SA1 0 0 0 1 X X X X 128/64 020000h to 03FFFFh 10000h to 1FFFFh
SA2 0 0 1 0 X X X X 128/64 040000h to 05FFFFh 20000h to 2FFFFh
SA3 0 0 1 1 X X X X 128/64 060000h to 07FFFFh 30000h to 3FFFFh
SA4 0 1 0 0 X X X X 128/64 080000h to 09FFFFh 40000h to 4FFFFh
SA5 0 1 0 1 X X X X 128/64 0A0000h to 0BFFFFh 50000h to 5FFFFh
SA6 0 1 1 0 X X X X 128/64 0C0000h to 0DFFFFh 60000h to 6FFFFh
SA7 0 1 1 1 X X X X 128/64 0E0000h to 0FFFFFh 70000h to 7FFFFh
SA8 1 0 0 0 X X X X 128/64 100000h to 11FFFFh 80000h to 8FFFFh
SA9 1 0 0 1 X X X X 128/64 120000h to 13FFFFh 90000h to 9FFFFh

SA10 1 0 1 0 X X X X 128/64 140000h to 15FFFFh A0000h to AFFFFh

××××

32) Address Range

SA11 1 0 1 1 X X X X 128/64 160000h to 17FFFFh B0000h to BFFFFh
SA12 1 1 0 0 X X X X 128/64 180000h to 19FFFFh C0000h to CFFFFh
SA13 1 1 0 1 X X X X 128/64 1A0000h to 1BFFFFh D0000h to DFFFFh
SA14 1 1 1 0 X X X X 128/64 1C0000h to 1DFFFFh E0000h to EFFFFh
SA15 1 1 1 1 0000 to 1011 96/48 1E0000h to 1F7FFFh F0000h to FBFFFh
SA1611111100 8/4 1F8000h to 1F9FFFh FC000h to FEFFFh
SA1711111101 8/4 1FA000h to 1FBFFFhFD000h to FDFFFh
SA181111111X 16/8 1FC000h to 1FFFFFh FE000h to FFFFFh

Note : The address range is A

The address range is A

19 to A-1 if in word mode (DW/W = VIL).
19 to A0 if in double word mode (DW/W = VIH).

15

MBM29PL3200TE/BE70/90

Table 8 Sector Address (MBM29PL3200BE)

Sector Address Sector

Size

Sector

19A18A17A16A15A14A13A12

A

(Kwords/

Double

××××

(

16) Address Range (

kwords)

SA00000000X 16/8 000000h to 003FFFh 00000h to 01FFFh
SA100000010 8/4 004000h to 005FFFh 02000h to 02FFFh
SA200000011 8/4 006000h to 007FFFh 03000h to 03FFFh
SA3 0 0 0 0 0100 to 1111 96/48 008000h to 01FFFFh 04000h to 0FFFFh
SA4 0001XXXX 128/64 020000h to 03FFFFh 10000h to 1FFFFh
SA5 0010XXXX 128/64 040000h to 05FFFFh 20000h to 2FFFFh
SA6 0011XXXX 128/64 060000h to 07FFFFh 30000h to 3FFFFh
SA7 0100XXXX 128/64 080000h to 09FFFFh 40000h to 4FFFFh
SA8 0101XXXX 128/640A0000h to 0BFFFFh 50000h to 5FFFFh
SA9 0110XXXX 128/640C0000h to 0DFFFFh 60000h to 6FFFFh

SA100111XXXX 128/64 0E0000h to 0FFFFFh 70000h to 7FFFFh

××××

32) Address Range

SA111000XXXX 128/64 100000h to 11FFFFh 80000h to 8FFFFh
SA121001XXXX 128/64 120000h to 13FFFFh 90000h to 9FFFFh
SA131010XXXX 128/64 140000h to 15FFFFh A0000h to AFFFFh
SA141011XXXX 128/64 160000h to 17FFFFh B0000h to BFFFFh
SA151100XXXX 128/64 180000h to 19FFFFh C0000h to CFFFFh
SA161101XXXX 128/641A0000h to 1BFFFFh D0000h to DFFFFh
SA171110XXXX 128/641C0000h to 1DFFFFh E0000h to EFFFFh
SA181111XXXX 128/64 1E0000h to 1FFFFFh F0000h to FFFFFh

Note : The address range is A

The address range is A

19 to A-1 if in word mode (DW/W = VIL).
19 to A0 if in double word mode (DW/W = VIH).

16

MBM29PL3200TE/BE70/90

Table 9 Common Flash Memory Interface Code

A6 to A0DQ15 to DQ

10h
11h
12h

13h
14h

15h
16h

17h
18h

19h
1Ah

0051h
0052h
0059h

0002h
0000h

0040h
0000h

0000h
0000h

0000h
0000h

1Bh 0027h

1Ch 0036h

0

Description

Query-unique ASCII string
“QRY”

Primary OEM Command Set
2h : AMD/FJ standard type

Address for Primary
Extended Table

Alternate OEM Command Set
(00h = not applicable)

Address for Alternate OEM
Extended Table

V

CC Min. (write/erase)

D7-4 : 1 V, D3-0 : 100 mV
V

CC Max. (write/erase)

D7-4 : 1 V, D3-0 : 100 mV
1Dh 0000h VPP Min. voltage
1Eh 0000h V

1Fh 0004h

20h 0000h

21h 000Ah

22h 0000h

23h 0005h

24h 0000h

25h 0006h

26h 0000h

PP Max. voltage

Typical timeout per single

byte/word write (2

Typical timeout for Min. size

buffer write (2

Typical timeout per individual

block erase (2

Typical timeout for full chip

erase (2

N

ms)

Max. timeout for byte/word write

N

(2

× typical time)

Max. timeout for buffer write

N

(2

× typical time)

Max. timeout per individual

block erase (2

Max. timeout for full chip erase

N

(2

× typical time)
27h 0016h Device Size = 2
28h

29h

2Ah
2Bh

2Ch 0004h

0005h
0000h

0000h
0000h

Flash Device Interface
description

Max. number of bytes in
multi-byte write = 2

Number of Erase Block
Regions within device

N

µs)

N

µs)

N

ms)

N

× typical time)

N

byte

N

A6 to A0DQ15 to DQ

2Dh
2Eh
2Fh
30h

31h
32h
33h
34h

35h
36h
37h
38h

40h
41h
42h

0000h
0000h
0080h
0000h

0001h
0000h
0040h
0000h

0000h
0000h
0000h
0003h

0050h
0052h
0049h

0

Description

Erase Block Region 1
Information

Bit0 to 15: y = Number of sectors
Bit16 to 31: z = Size
(Z × 256 Byte)

Erase Block Region 2
Information

Bit0 to 15: y = Number of sectors
Bit16 to 31: z = Size
(Z × 256 Byte)

Erase Block Region 3
Information

Bit0 to 15: y = Number of sectors
Bit16 to 31: z = Size
(Z × 256 Byte)

Query-unique ASCII string
“PRI”

43h 0031h Major version number, ASCII
44h 0033h Minor version number, ASCII

Address Sensitive Unlock

45h 0000h

0h = Required
1h = Not Required

Erase Suspend

46h 0002h

0h = Not Supported
1h = To Read Only
2h = To Read & Write

Sector Protection

47h 0001h

0h = Not Supported
X = Number of sectors per
group

Sector Temporary

48h 0001h

Unprotection
00h = Not Supported
01h = Supported

49h 0003h Sector Protection Algorithm

00h = Not Supported,

4Ah 0000h

X = Total number of sectors in
all Banks except Bank 1

4Bh 0000h

4Ch 0002h

Burst Mode Type
00h = Not Supported

Page Mode Type
00h = Not Supported

(Continued)

17

MBM29PL3200TE/BE70/90

(Continued)

6

to A0DQ15 to DQ

A

4Dh 00B5h

4Eh 00C5h

4Fh 00XXh

Note : DQ31 to DQ16 = “0000h”

0

ACC (Acceleration) Supply
Minimum
00h = Not Supported,
D7-4 : 1 V, D3-0 : 100 mV

ACC (Acceleration) Supply
Maximum
00h = Not Supported,
D7-4 : 1 V, D3-0 : 100 mV

Boot Type
02h = MBM29PL3200BE
03h = MBM29PL3200TE

Description

18