The Fujitsu MBF200 Solid-State Fingerprint Sensor is a direct
contact, fingerprint acquisition device. It is a high performance,
low power, low cost, capacitive sensor composed of a twodimensional array of metal electrodes in the sensing array.
Each metal electrode acts as one plate of a capacitor and the
contacting finger acts as the second plate. A passivation layer on the
device surface forms the dielectric between these two plates. Ridges
and valleys on the finger yield varying capacitor values across the
array, and the resulting varying discharge voltages are read to form
an image of the fingerprint.
The MBF200 is manufactured in standard CMOS technology.
The 256 X 300 sensor array has a 50 µm pitch and yields a 500-dpi
image. The sensor surface is protected by a patented, ultra-hard,
abrasion and chemical resistant coating.
Features
• Capacitive solid-state device
Packages
Applications
• Secure access for databases, networks, local storage
• 500-dpi resolution (50 µm pitch)
• 1.28 cm x 1.50 cm (0.5” x 0.6”) sensor area
• 256 x 300 sensor array
• Smart Cards
• 3.3V to 5V operating range
• Exceptionally hard protective coating
• Integrated 8-bit analog to digital converter
• One of three bus interfaces:
8-bit microprocessor bus interface
Integrated USB Full-Speed Interface
Integrated Serial Peripheral Interface
• Standard CMOS technology
• Low power, less than 70 mW operating at 5V
• Automatic finger detection
• Portable fingerprint acquisition
• Smart Cards
• Identity verification for ATM transactions
• Cellular phone-based security access
• Access control and monitoring (home, auto, office, etc.)
Device Bus Operation.............................................................................................................................................................7
Microprocessor Bus Interface............................................................................................................................................7
Serial Peripheral Bus Interface (SPI) Slave ................................................................................................................................8
SPI Bus Mode.................................................................................................................................................................8
Register Read Command in SPI Slave Mode ........................................................................................................................8
Register Write Command for SPI Slave Mode......................................................................................................................8
USB Interface Mode, Using Internal ROM ................................................................................................................................8
USB Interface Mode, Using External ROM ...............................................................................................................................8
Function Register Descriptions ...............................................................................................................................................9
Function Register Map...........................................................................................................................................................9
CAL 0x02....................................................................................................................................................................10
CEL 0x05 ....................................................................................................................................................................10
PGC 0x0C ...................................................................................................................................................................15
Get Row ............................................................................................................................................................... 18
Get Whole Image ................................................................................................................................................... 19
Get Sub-Image ...................................................................................................................................................... 20
Serial Peripheral Interface ...................................................................................................................................... 21
Get Image............................................................................................................................................................. 21
USB Interface........................................................................................................................................................ 22
Get Image............................................................................................................................................................. 22
Absolute Maximum Ratings ................................................................................................................................................. 23
Operating Range ................................................................................................................................................................ 23
DC Characteristics .............................................................................................................................................................. 23
Power Supply Consumption ................................................................................................................................................. 24
AC Characteristics .............................................................................................................................................................. 25
Microprocessor Bus Mode.............................................................................................................................................. 25
Recommended Land Pattern................................................................................................................................................. 32
Appendix A ........................................................................................................................................................................ 34
Recommended Power and Ground Connections ................................................................................................................ 34
The sensor array includes 256 columns and 300 rows of sensor plates.
Associated with each column are two sample-and-hold circuits.
A fingerprint image is sensed or captured one row at a time. This
“row capture” occurs in two phases. In the first phase, the sensor
plates of the selected row are pre-charged to the VDD voltage.
During this pre-charge period, an internal signal enables the first
set of sample-and-hold circuits to store the pre-charged plate
voltages of the row.
In the second phase, the row of sensor plates is discharged with a
current source. The rate at which a cell is discharged is proportional
Block Diagram
P0
P1
D[7:0]
DATA
REGISTER
to the “discharge current.” After a period of time (referred to as
the “discharge time”), an internal signal enables the second set
of sample-and-hold circuits to store the final plate voltages.
The difference between the precharged and discharged plate voltages
is a measure of the capacitance of a sensor cell. After the row capture,
the cells within the row are ready to be digitized.
The sensitivity of the chip is adjusted by changing the discharge
current and discharge time. The nominal value of the current source
is controlled by an external resistor connected between the ISET pin
and ground. The current source is controlled from the Discharge
Current Register (DCR). The discharge time is controlled by the
Discharge Time Register (DTR).
Power Supply to the analog section of the sensor. VDDA1 powers the array, row drivers, column receivers, A/D converter, and sample/hold
amplifier. VDDA2 powers the multi-vibrator and bias circuits.
VSSA1, VSSA2 (Pins 2 and 6)
Ground for the analog section of the sensor. VSSA1 is the ground return for the array, row drivers, column receivers, A/D converter, and
sample hold amplifier. VSSA2 is the ground return for the multi-vibrator and bias circuits.
VDD1, VDD2, VDD3 ( Pins 25, 16, and 39)
Power supply to the digital logic and I/O drivers. VDD2 powers the core digital logic, oscillators, phase-locked loops, and digital inputs.
VDD1 and VDD3 supply power to the digital output circuits and USB transceivers.
VSS1, VSS2, VSS3 (Pins 24, 15, and 40)
Ground for the digital logic and I/O drivers.
VSS2 is the ground connection for the core digital logic, oscillators, phase-locked loops, and digital inputs. VSS1 and VSS3 are the ground
connections for the digital outputs and USB transceivers.
ISET (Pin 3)
Connect a 200k ohm resistor between ISET and analog ground VSSA1 to set the internal reference current. The discharge current is a scalar
function of the internal reference current.
AIN (Pin 4)
Alternate analog input to the A/D converter. Set the AINSEL bit in register CTRLA to select AIN as the input to the A/D converter. Pull this
pin to ground, preferably with a resistor.
FSET (Pin 5)
Connect a resistor between FSET and ground to set the internal multi-vibrator and automatic finger detection frequency. Use a 56k ohm
resistor for standard 12 MHz (±20%) multi-vibrator operation and 120KHz (±20%) automatic finger detection sampling rate.
XTAL1 (Pin 27)
Input to the internal oscillator. To use the internal oscillator, connect a crystal circuit to this pin. If an external oscillator is used, connect its
output to this pin.
XTAL2 (Pin 26)
Output from the internal oscillator. To use the internal oscillator, connect a crystal circuit to this pin. If an external oscillator is used, leave this
pin unconnected.
D[7:0] (Pins 11-14, 17-20)
Bi-directional data bus. D[7:0] have weak latches that hold the bus’s state when not being driven. These pins may be left unconnected in SPI or
USB mode.
A0 (Pin 21)
Address input. Drive A0 low to select the address index register. Drive A0 high to select the data buffer. A0 has a weak latch that holds the pin
state when not being driven. This pin may be left unconnected in SPI or USB mode.
Read enable, active low. To read from the chip, drive RD
resistor and may be left unconnected in SPI or USB mode.
(Pin 23)
WR
Write enable, active low. To write to the chip, drive WR
and may be left unconnected in SPI or USB mode.
/ SCS (Pin 32)
CS0
Chip select, active low. The CS0
USB mode if not using an external serial ROM. The function of the CS0
MODE[1:0] = 00b (Microprocessor Bus Interface Mode)
/SCS functions as an active-low chip select input. Drive CS0/SCS low while CS1 is high to select the chip.
CS0
/SCS pin has a weak latch that holds the pin’s state when not being driven. CS0/SCS may be left unconnected in
low while WR is high and the chip is selected. RD has an internal, weak pull-up
low while RD is high and the chip is selected. WR has an internal, weak pull-up resistor
MBF200
/SCS pin depends on the MODE1 and MODE0 pins.
MODE[1:0] = 01b (SPI Slave Mode)
CS0
/SCS functions as an active-low slave chip select input. Connect a pull-up resistor between CS0/SCS and VDD.
MODE[1:0] = 10b (USB Interface Mode, Using Internal ROM)
CS0
/SCS has no function.
MODE[1:0] = 11b (USB Interface Mode, Using External ROM)
CS0
/SCS functions as the master chip select output, active low to the slave serial ROM chip select. Connect a pullup resistor between
/SCS and VDD.
CS0
CS1 / SCLK (Pin 31)
Chip select, active high. The CS1/SCLK pin has a weak latch that holds the pin’s state when not being driven. CS1/SCLK may be left
unconnected in USB mode if not using an external serial ROM. The function of this pin depends on the MODE1 and MODE0 pins.
MODE[1:0] = 00b (Microprocessor Bus Interface Mode)
CS1/SCLK functions as an active-high chip select input. Drive CS1/SCLK high while CS0-/CSC- is low to select the chip.
MODE[1:0] = 01b (SPI Slave Mode)
CS1/SCLK functions as the slave serial clock input.
MODE[1:0] = 10b (USB Interface Mode, Using Internal ROM)
CS1/SCLK has no function.
MODE[1:0] = 11b (USB Interface Mode, Using External ROM)
CS1/SCLK functions as the master serial clock output to the slave serial ROM clock input. Connect a pull-up resistor between
CS1/SCLK and VDD.
EXTINT (Pin 30)
External Interrupt input. This pin can be programmed to be edge or level sensitive, active-high or active-low. EXTINT has a weak pull-up and
may be left unconnected in MCU, SPI, or USB mode.
INTR
(Pin 28)
Interrupt output, active low. INTR
be enabled if the sensor is in MCU or SPI mode. In USB mode leave this pin unconnected.
is high impedance when it is not active and is driven low when an enabled interrupt event occurs. INTR can
Wait output, active low. W
an A/D conversion is in progress. W
MOSI (Pin 33)
SPI Master Output/Slave input. The MOSI pin has a weak latch that holds the pin’s state when not being driven. MOSI may be left
unconnected in MCU mode or USB mode if not using an external serial ROM. The function of this pin depends on the MODE1 and MODE0
pins.
MODE[1:0] = 00b (Microprocessor Bus Interface Mode)
MOSI has no function.
MODE[1:0] = 01b (SPI Slave Mode)
MOSI functions as the slave serial input.
AIT is driven low when active and high-impedance when not active. WAIT goes low if the A/D converter is read while
AIT will remain low until the A/D conversion is completed.
MODE[1:0] = 10b (USB Interface Mode, Using Internal ROM)
MOSI has no function.
MODE[1:0] = 11b (USB Interface Mode, Using External ROM)
MOSI functions as the master serial data output to the slave serial ROM data input. Unlike standard SPI, MOSI is actively driven high
and low when transmitting data and is high impedance when idle. Connect a pull-up resistor between MOSI and VDD to pull MOSI
high when idle.
MISO (Pin 34)
SPI Master Input/Slave Output. The MISO pin has a weak latch that holds the pin’s state when not being driven. MISO may be left
unconnected in MCU mode or USB mode if not using an external serial ROM. The function of this pin depends on the MODE1 and MODE0
pins.
MODE[1:0] = 00b (Microprocessor Bus Interface Mode)
MISO has no function.
MODE[1:0] = 01b (SPI Slave Mode)
MISO functions as the slave serial data output. Unlike standard SPI, the MISO connection is actively driven high and low when
transmitting data and is high impedance when idle. Connect a pull-up resistor between MISO and VDD to pull MISO high when idle.
MODE1/MODE0 = 10b (USB Interface Mode, Using Internal ROM)
MISO has no function.
MODE1/MODE0 = 11b (USB Interface Mode, Using External ROM)
MISO functions as the master serial data input from the slave serial ROM data output.
P0 (Pin 9)
Port Output 0. This output is controlled by bit 0 of the CTRLC register.
P1 (Pin 10)
Port Output 1. This output is controlled by bit 1 of the CTRLC register.
DP (Pin 38)
USB D+ data line. In USB mode, connect a 1.5k ohm resistor between DP and VDD3, which must be between 3.3V and 3.6V in this mode.
Use a 43 ohm series resistor. In MCU or SPI mode, either pull-up this pin with a resistor or tie it to ground.
USB D- data line. Use 43 ohm series resistor. In MCU or SPI mode, either pull-up this pin with a resistor or tie it to ground.
MODE[1:0] (Pins 35 and 36)
Mode Select pins. MODE[1:0] select one of four operating modes.
MBF200
MODE[1:0]
00bMicroprocessor Bus Mode
01bSPI Bus Mode
10bUSB Mode, Using Internal ROM
11bUSB Mode, Using External ROM
Description
TEST (Pin 8)
Test Mode Enable. It is intended for factory use only. Connect this pin to VSS.
No Connect (Pins 41-80)
Unconnected pins.
Device Bus Operation
Microprocessor Bus Interface
The microprocessor bus interface mode uses the following pins:
D[7:0], A0, RD
the internal multi-vibrator or the XTAL1/XTAL2 oscillator can be
selected to provide the clock to the chip. The SPI and USB interfaces
are disabled.
The fingerprint sensor chip uses an indexed addressing scheme to
access its function registers. The chip has eight data lines (D[7:0]) and
one address line (A0). The address line selects between the index
register and the data register. Drive A0 low to select the index
register. Drive A0 high to access the function register selected by the
index register. The index register retains its value until it is rewritten
or the chip is reset.
, WR, CS0, CS1, EXTINT, INTR, and WAIT. Either
The chip has four control inputs: CS0
low and CS1 high to select the chip. Data is latched on the rising edge
of WR-.
The chip has two status lines: INTR
asserted when an interrupt event occurs. The W
when the A/D converter is read while an A/D conversion is in
progress. The W
conversion is completed. Both the W
impedance when they are not active. As a result, they can be activelow WIRE-ORed in conjunction with other interrupts or wait
signals.
The SPI and USB interfaces are disabled when the microprocessor
bus interface is selected. A truth table for the microprocessor bus
interface is shown below:
SPI (Slave) bus mode uses the following pins: SCLK, SCS
MISO, and EXTINT. Either the internal multivibrator or the
XTAL1/XTAL2 oscillator can be selected to provide the clock to the
chip. The microprocessor bus and USB interface are disabled.
SPI Slave Mode
In SPI Slave Mode, the sensor can operate in either SPI mode (0, 0)
where CPOL = 0 and CPHA = 0 or SPI mode (1, 1) where CPOL = 1
and CPHA = 1. T he SPI Master may clock in commands and clock out
data up to 12 Mbits per second. The SPI Master can write and read the
registers of the sensor even when the internal 12 MHz multivibrator or
XTAL1/XTAL2 oscillator is halted.
• MOSI bits are sampled on the rising edge of SCK
• MISO bits change on the falling edge of SCK
• SCK can be idle in either a high or low state
• The most significant bits are shifted out first
, MOSI,
USB Interface Mode, Using Internal
ROM
This USB mode uses the following pins: DP, DM, EXTINT, XTAL1,
and XTAL2. XTAL1 must be driven from a 12 MHz source or XTAL1
and XTAL2 must be connected to a 12 MHz crystal circuit. The
internal 12 MHz multivibrator, the microprocessor bus, and SPI
interface are disabled. The internal USB descriptor ROM will be
accessed in response to a USB GET_DESCRIPTOR command.
The sensor’s USB interface uses three endpoints:
Endpoint 0
Endpoint 0 is a control endpoint used for device enumeration and
configuration. The sensor function registers are written and read
using control transfers of vendor specific commands to endpoint 0.
Endpoint 1
Endpoint 1 is a bulk-in endpoint specifically for reading the CTRLA
register, which is the output buffer of the A/D converter. Data is
transmitted in 64-byte packets except for the last packet of a
GETROW operation which may be 64-bytes or less, depending on
the row length.
Register Read Command in SPI Slave Mode
The Register Read command includes a command byte and address
byte. The command sequence begins when the SPI master drives SCS
low and sends the Read Command byte (encoded as 0x03) on the
MOSI pin. Following the command byte, the master sends the
address byte, which is the index to the register to be read. After
receiving the least significant bit (LSB) of the address byte, the SPI
slave sensor sends the contents of the selected register on the MISO
pin. Finally, the master drives SCS
of the data byte. When reading the A/D converter, the Master may
keep SCS
row. A new Register Read command must be issued to read the next
row. The SPI Master must drive SCS
command.
low to read consecutive pixels up to the end of the current
high after it has sampled the LSB
high before beginning another
Register Write Command for SPI Slave Mode
The Register Write command includes a command byte and address
byte followed by the data to be written. The command sequence
begins when the SPI Master drives SCS
Command byte (encoded as 0x02) on the MOSI pin. Then the master
sends the address byte, which is the index to the register to be
written. Finally, the master sends the data byte and thereafter drives
high.
SCS
low and sends the Write
Endpoint 2
Endpoint 2 is an interrupt endpoint. In the event of an interrupt,
the contents of the ISR (Interrupt Status Register) are transfered to
endpoint 2.
USB Interface Mode, Using External
ROM
This USB mode the uses following pins: DP, DM, SCLK, SCS
MOSI, MISO, EXTINT, XTAL1, and XTAL2. XTAL1 must be
driven from a 12 MHz source or a 12 MHz crystal circuit must be
connected to XTAL1 and XTAL2. The internal 12 MHz multivibrator and the microprocessor bus are disabled.
The SPI interface is enabled as an SPI Master. The external SPI serial
ROM will be accessed in response to a USB GET_DESCRIPTOR
command. The internal USB descriptor ROM is disabled. This mode
allows an external serial ROM to override the internal descriptor ROM.
Note: When the MBF200 is directly connected to USB in either of
the modes above, the VDD and VDDA pins must be powered
between 3.3V and 3.6V so that the MBF200 DP and DM pins do
not drive the USB beyond 3.6V.
In SPI Master Mode the sensor operates in SPI mode (1,1) where
CPOL = 1, and CPHA = 1. SCK is limited to 1 MHz.
• MOSI bits change on the falling edge of SCK
• MISO bits are sampled on the rising edge of SCK
• SCK is idle in the high state
• The most significant bits are shifted out first
Function Register Map
Index
0x00RAHRow Address, HighR/W
0x01RALRow Address, LowR/W
0x02CALColumn Address, LowR/W
0x03REHRow Address End, HighR/W
0x04RELRow Address End, LowR/W
0x05CELColumn Address End, LowR/W
0x06DTRDischarge Time RegisterR/W
0x07DCRDischarge Current RegisterR/W
0x08CTRLAControl Register AR/W
0x09CTRLBControl Register BR/W
0x0ACTRLCControl Register CR/W
0x0BSRAStatus Register AR
0x0CPGCProgrammable Gain Control RegisterR/W
0x0DICRInterrupt Control RegisterR/W
0x0EISRInterrupt Status RegisterR/W
0x0FTHRThreshold RegisterR/W
0x10CIDHChip Identification, HighR
0x11CIDLChip Identification, LowR
0x12TSTTest Mode RegisterR/W
NameDescriptionRead/Write Access
Function Register Descriptions
The function registers are accessed by indexed addressing. Write the
index register to select a function register. Read or write the data
register to access the contents of the function register. All registers
can be read and written except as noted in the following
descriptions.
Note: In the following descriptions, “sub-image” means a rectangular region of the sensor array, up to and including the entire array.
RAH0x00
Row Address Register High.
Reset State: 0x00
This register holds the high order bit of the address of the first row of a sub-image.
Bit Number
[7:1] - Reserved. Write 0 to these bits.
0 RA[8] Most Significant Bit of Row Address Register
Bit Name Function
Fujitsu Microelectronics America, Inc.
9
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