The Fujitsu MBF200 Solid-State Fingerprint Sensor is a direct
contact, fingerprint acquisition device. It is a high performance,
low power, low cost, capacitive sensor composed of a twodimensional array of metal electrodes in the sensing array.
Each metal electrode acts as one plate of a capacitor and the
contacting finger acts as the second plate. A passivation layer on the
device surface forms the dielectric between these two plates. Ridges
and valleys on the finger yield varying capacitor values across the
array, and the resulting varying discharge voltages are read to form
an image of the fingerprint.
The MBF200 is manufactured in standard CMOS technology.
The 256 X 300 sensor array has a 50 µm pitch and yields a 500-dpi
image. The sensor surface is protected by a patented, ultra-hard,
abrasion and chemical resistant coating.
Features
• Capacitive solid-state device
Packages
Applications
• Secure access for databases, networks, local storage
• 500-dpi resolution (50 µm pitch)
• 1.28 cm x 1.50 cm (0.5” x 0.6”) sensor area
• 256 x 300 sensor array
• Smart Cards
• 3.3V to 5V operating range
• Exceptionally hard protective coating
• Integrated 8-bit analog to digital converter
• One of three bus interfaces:
8-bit microprocessor bus interface
Integrated USB Full-Speed Interface
Integrated Serial Peripheral Interface
• Standard CMOS technology
• Low power, less than 70 mW operating at 5V
• Automatic finger detection
• Portable fingerprint acquisition
• Smart Cards
• Identity verification for ATM transactions
• Cellular phone-based security access
• Access control and monitoring (home, auto, office, etc.)
Device Bus Operation.............................................................................................................................................................7
Microprocessor Bus Interface............................................................................................................................................7
Serial Peripheral Bus Interface (SPI) Slave ................................................................................................................................8
SPI Bus Mode.................................................................................................................................................................8
Register Read Command in SPI Slave Mode ........................................................................................................................8
Register Write Command for SPI Slave Mode......................................................................................................................8
USB Interface Mode, Using Internal ROM ................................................................................................................................8
USB Interface Mode, Using External ROM ...............................................................................................................................8
Function Register Descriptions ...............................................................................................................................................9
Function Register Map...........................................................................................................................................................9
CAL 0x02....................................................................................................................................................................10
CEL 0x05 ....................................................................................................................................................................10
PGC 0x0C ...................................................................................................................................................................15
Get Row ............................................................................................................................................................... 18
Get Whole Image ................................................................................................................................................... 19
Get Sub-Image ...................................................................................................................................................... 20
Serial Peripheral Interface ...................................................................................................................................... 21
Get Image............................................................................................................................................................. 21
USB Interface........................................................................................................................................................ 22
Get Image............................................................................................................................................................. 22
Absolute Maximum Ratings ................................................................................................................................................. 23
Operating Range ................................................................................................................................................................ 23
DC Characteristics .............................................................................................................................................................. 23
Power Supply Consumption ................................................................................................................................................. 24
AC Characteristics .............................................................................................................................................................. 25
Microprocessor Bus Mode.............................................................................................................................................. 25
Recommended Land Pattern................................................................................................................................................. 32
Appendix A ........................................................................................................................................................................ 34
Recommended Power and Ground Connections ................................................................................................................ 34
The sensor array includes 256 columns and 300 rows of sensor plates.
Associated with each column are two sample-and-hold circuits.
A fingerprint image is sensed or captured one row at a time. This
“row capture” occurs in two phases. In the first phase, the sensor
plates of the selected row are pre-charged to the VDD voltage.
During this pre-charge period, an internal signal enables the first
set of sample-and-hold circuits to store the pre-charged plate
voltages of the row.
In the second phase, the row of sensor plates is discharged with a
current source. The rate at which a cell is discharged is proportional
Block Diagram
P0
P1
D[7:0]
DATA
REGISTER
to the “discharge current.” After a period of time (referred to as
the “discharge time”), an internal signal enables the second set
of sample-and-hold circuits to store the final plate voltages.
The difference between the precharged and discharged plate voltages
is a measure of the capacitance of a sensor cell. After the row capture,
the cells within the row are ready to be digitized.
The sensitivity of the chip is adjusted by changing the discharge
current and discharge time. The nominal value of the current source
is controlled by an external resistor connected between the ISET pin
and ground. The current source is controlled from the Discharge
Current Register (DCR). The discharge time is controlled by the
Discharge Time Register (DTR).
Power Supply to the analog section of the sensor. VDDA1 powers the array, row drivers, column receivers, A/D converter, and sample/hold
amplifier. VDDA2 powers the multi-vibrator and bias circuits.
VSSA1, VSSA2 (Pins 2 and 6)
Ground for the analog section of the sensor. VSSA1 is the ground return for the array, row drivers, column receivers, A/D converter, and
sample hold amplifier. VSSA2 is the ground return for the multi-vibrator and bias circuits.
VDD1, VDD2, VDD3 ( Pins 25, 16, and 39)
Power supply to the digital logic and I/O drivers. VDD2 powers the core digital logic, oscillators, phase-locked loops, and digital inputs.
VDD1 and VDD3 supply power to the digital output circuits and USB transceivers.
VSS1, VSS2, VSS3 (Pins 24, 15, and 40)
Ground for the digital logic and I/O drivers.
VSS2 is the ground connection for the core digital logic, oscillators, phase-locked loops, and digital inputs. VSS1 and VSS3 are the ground
connections for the digital outputs and USB transceivers.
ISET (Pin 3)
Connect a 200k ohm resistor between ISET and analog ground VSSA1 to set the internal reference current. The discharge current is a scalar
function of the internal reference current.
AIN (Pin 4)
Alternate analog input to the A/D converter. Set the AINSEL bit in register CTRLA to select AIN as the input to the A/D converter. Pull this
pin to ground, preferably with a resistor.
FSET (Pin 5)
Connect a resistor between FSET and ground to set the internal multi-vibrator and automatic finger detection frequency. Use a 56k ohm
resistor for standard 12 MHz (±20%) multi-vibrator operation and 120KHz (±20%) automatic finger detection sampling rate.
XTAL1 (Pin 27)
Input to the internal oscillator. To use the internal oscillator, connect a crystal circuit to this pin. If an external oscillator is used, connect its
output to this pin.
XTAL2 (Pin 26)
Output from the internal oscillator. To use the internal oscillator, connect a crystal circuit to this pin. If an external oscillator is used, leave this
pin unconnected.
D[7:0] (Pins 11-14, 17-20)
Bi-directional data bus. D[7:0] have weak latches that hold the bus’s state when not being driven. These pins may be left unconnected in SPI or
USB mode.
A0 (Pin 21)
Address input. Drive A0 low to select the address index register. Drive A0 high to select the data buffer. A0 has a weak latch that holds the pin
state when not being driven. This pin may be left unconnected in SPI or USB mode.
Read enable, active low. To read from the chip, drive RD
resistor and may be left unconnected in SPI or USB mode.
(Pin 23)
WR
Write enable, active low. To write to the chip, drive WR
and may be left unconnected in SPI or USB mode.
/ SCS (Pin 32)
CS0
Chip select, active low. The CS0
USB mode if not using an external serial ROM. The function of the CS0
MODE[1:0] = 00b (Microprocessor Bus Interface Mode)
/SCS functions as an active-low chip select input. Drive CS0/SCS low while CS1 is high to select the chip.
CS0
/SCS pin has a weak latch that holds the pin’s state when not being driven. CS0/SCS may be left unconnected in
low while WR is high and the chip is selected. RD has an internal, weak pull-up
low while RD is high and the chip is selected. WR has an internal, weak pull-up resistor
MBF200
/SCS pin depends on the MODE1 and MODE0 pins.
MODE[1:0] = 01b (SPI Slave Mode)
CS0
/SCS functions as an active-low slave chip select input. Connect a pull-up resistor between CS0/SCS and VDD.
MODE[1:0] = 10b (USB Interface Mode, Using Internal ROM)
CS0
/SCS has no function.
MODE[1:0] = 11b (USB Interface Mode, Using External ROM)
CS0
/SCS functions as the master chip select output, active low to the slave serial ROM chip select. Connect a pullup resistor between
/SCS and VDD.
CS0
CS1 / SCLK (Pin 31)
Chip select, active high. The CS1/SCLK pin has a weak latch that holds the pin’s state when not being driven. CS1/SCLK may be left
unconnected in USB mode if not using an external serial ROM. The function of this pin depends on the MODE1 and MODE0 pins.
MODE[1:0] = 00b (Microprocessor Bus Interface Mode)
CS1/SCLK functions as an active-high chip select input. Drive CS1/SCLK high while CS0-/CSC- is low to select the chip.
MODE[1:0] = 01b (SPI Slave Mode)
CS1/SCLK functions as the slave serial clock input.
MODE[1:0] = 10b (USB Interface Mode, Using Internal ROM)
CS1/SCLK has no function.
MODE[1:0] = 11b (USB Interface Mode, Using External ROM)
CS1/SCLK functions as the master serial clock output to the slave serial ROM clock input. Connect a pull-up resistor between
CS1/SCLK and VDD.
EXTINT (Pin 30)
External Interrupt input. This pin can be programmed to be edge or level sensitive, active-high or active-low. EXTINT has a weak pull-up and
may be left unconnected in MCU, SPI, or USB mode.
INTR
(Pin 28)
Interrupt output, active low. INTR
be enabled if the sensor is in MCU or SPI mode. In USB mode leave this pin unconnected.
is high impedance when it is not active and is driven low when an enabled interrupt event occurs. INTR can
Wait output, active low. W
an A/D conversion is in progress. W
MOSI (Pin 33)
SPI Master Output/Slave input. The MOSI pin has a weak latch that holds the pin’s state when not being driven. MOSI may be left
unconnected in MCU mode or USB mode if not using an external serial ROM. The function of this pin depends on the MODE1 and MODE0
pins.
MODE[1:0] = 00b (Microprocessor Bus Interface Mode)
MOSI has no function.
MODE[1:0] = 01b (SPI Slave Mode)
MOSI functions as the slave serial input.
AIT is driven low when active and high-impedance when not active. WAIT goes low if the A/D converter is read while
AIT will remain low until the A/D conversion is completed.
MODE[1:0] = 10b (USB Interface Mode, Using Internal ROM)
MOSI has no function.
MODE[1:0] = 11b (USB Interface Mode, Using External ROM)
MOSI functions as the master serial data output to the slave serial ROM data input. Unlike standard SPI, MOSI is actively driven high
and low when transmitting data and is high impedance when idle. Connect a pull-up resistor between MOSI and VDD to pull MOSI
high when idle.
MISO (Pin 34)
SPI Master Input/Slave Output. The MISO pin has a weak latch that holds the pin’s state when not being driven. MISO may be left
unconnected in MCU mode or USB mode if not using an external serial ROM. The function of this pin depends on the MODE1 and MODE0
pins.
MODE[1:0] = 00b (Microprocessor Bus Interface Mode)
MISO has no function.
MODE[1:0] = 01b (SPI Slave Mode)
MISO functions as the slave serial data output. Unlike standard SPI, the MISO connection is actively driven high and low when
transmitting data and is high impedance when idle. Connect a pull-up resistor between MISO and VDD to pull MISO high when idle.
MODE1/MODE0 = 10b (USB Interface Mode, Using Internal ROM)
MISO has no function.
MODE1/MODE0 = 11b (USB Interface Mode, Using External ROM)
MISO functions as the master serial data input from the slave serial ROM data output.
P0 (Pin 9)
Port Output 0. This output is controlled by bit 0 of the CTRLC register.
P1 (Pin 10)
Port Output 1. This output is controlled by bit 1 of the CTRLC register.
DP (Pin 38)
USB D+ data line. In USB mode, connect a 1.5k ohm resistor between DP and VDD3, which must be between 3.3V and 3.6V in this mode.
Use a 43 ohm series resistor. In MCU or SPI mode, either pull-up this pin with a resistor or tie it to ground.
USB D- data line. Use 43 ohm series resistor. In MCU or SPI mode, either pull-up this pin with a resistor or tie it to ground.
MODE[1:0] (Pins 35 and 36)
Mode Select pins. MODE[1:0] select one of four operating modes.
MBF200
MODE[1:0]
00bMicroprocessor Bus Mode
01bSPI Bus Mode
10bUSB Mode, Using Internal ROM
11bUSB Mode, Using External ROM
Description
TEST (Pin 8)
Test Mode Enable. It is intended for factory use only. Connect this pin to VSS.
No Connect (Pins 41-80)
Unconnected pins.
Device Bus Operation
Microprocessor Bus Interface
The microprocessor bus interface mode uses the following pins:
D[7:0], A0, RD
the internal multi-vibrator or the XTAL1/XTAL2 oscillator can be
selected to provide the clock to the chip. The SPI and USB interfaces
are disabled.
The fingerprint sensor chip uses an indexed addressing scheme to
access its function registers. The chip has eight data lines (D[7:0]) and
one address line (A0). The address line selects between the index
register and the data register. Drive A0 low to select the index
register. Drive A0 high to access the function register selected by the
index register. The index register retains its value until it is rewritten
or the chip is reset.
, WR, CS0, CS1, EXTINT, INTR, and WAIT. Either
The chip has four control inputs: CS0
low and CS1 high to select the chip. Data is latched on the rising edge
of WR-.
The chip has two status lines: INTR
asserted when an interrupt event occurs. The W
when the A/D converter is read while an A/D conversion is in
progress. The W
conversion is completed. Both the W
impedance when they are not active. As a result, they can be activelow WIRE-ORed in conjunction with other interrupts or wait
signals.
The SPI and USB interfaces are disabled when the microprocessor
bus interface is selected. A truth table for the microprocessor bus
interface is shown below:
SPI (Slave) bus mode uses the following pins: SCLK, SCS
MISO, and EXTINT. Either the internal multivibrator or the
XTAL1/XTAL2 oscillator can be selected to provide the clock to the
chip. The microprocessor bus and USB interface are disabled.
SPI Slave Mode
In SPI Slave Mode, the sensor can operate in either SPI mode (0, 0)
where CPOL = 0 and CPHA = 0 or SPI mode (1, 1) where CPOL = 1
and CPHA = 1. T he SPI Master may clock in commands and clock out
data up to 12 Mbits per second. The SPI Master can write and read the
registers of the sensor even when the internal 12 MHz multivibrator or
XTAL1/XTAL2 oscillator is halted.
• MOSI bits are sampled on the rising edge of SCK
• MISO bits change on the falling edge of SCK
• SCK can be idle in either a high or low state
• The most significant bits are shifted out first
, MOSI,
USB Interface Mode, Using Internal
ROM
This USB mode uses the following pins: DP, DM, EXTINT, XTAL1,
and XTAL2. XTAL1 must be driven from a 12 MHz source or XTAL1
and XTAL2 must be connected to a 12 MHz crystal circuit. The
internal 12 MHz multivibrator, the microprocessor bus, and SPI
interface are disabled. The internal USB descriptor ROM will be
accessed in response to a USB GET_DESCRIPTOR command.
The sensor’s USB interface uses three endpoints:
Endpoint 0
Endpoint 0 is a control endpoint used for device enumeration and
configuration. The sensor function registers are written and read
using control transfers of vendor specific commands to endpoint 0.
Endpoint 1
Endpoint 1 is a bulk-in endpoint specifically for reading the CTRLA
register, which is the output buffer of the A/D converter. Data is
transmitted in 64-byte packets except for the last packet of a
GETROW operation which may be 64-bytes or less, depending on
the row length.
Register Read Command in SPI Slave Mode
The Register Read command includes a command byte and address
byte. The command sequence begins when the SPI master drives SCS
low and sends the Read Command byte (encoded as 0x03) on the
MOSI pin. Following the command byte, the master sends the
address byte, which is the index to the register to be read. After
receiving the least significant bit (LSB) of the address byte, the SPI
slave sensor sends the contents of the selected register on the MISO
pin. Finally, the master drives SCS
of the data byte. When reading the A/D converter, the Master may
keep SCS
row. A new Register Read command must be issued to read the next
row. The SPI Master must drive SCS
command.
low to read consecutive pixels up to the end of the current
high after it has sampled the LSB
high before beginning another
Register Write Command for SPI Slave Mode
The Register Write command includes a command byte and address
byte followed by the data to be written. The command sequence
begins when the SPI Master drives SCS
Command byte (encoded as 0x02) on the MOSI pin. Then the master
sends the address byte, which is the index to the register to be
written. Finally, the master sends the data byte and thereafter drives
high.
SCS
low and sends the Write
Endpoint 2
Endpoint 2 is an interrupt endpoint. In the event of an interrupt,
the contents of the ISR (Interrupt Status Register) are transfered to
endpoint 2.
USB Interface Mode, Using External
ROM
This USB mode the uses following pins: DP, DM, SCLK, SCS
MOSI, MISO, EXTINT, XTAL1, and XTAL2. XTAL1 must be
driven from a 12 MHz source or a 12 MHz crystal circuit must be
connected to XTAL1 and XTAL2. The internal 12 MHz multivibrator and the microprocessor bus are disabled.
The SPI interface is enabled as an SPI Master. The external SPI serial
ROM will be accessed in response to a USB GET_DESCRIPTOR
command. The internal USB descriptor ROM is disabled. This mode
allows an external serial ROM to override the internal descriptor ROM.
Note: When the MBF200 is directly connected to USB in either of
the modes above, the VDD and VDDA pins must be powered
between 3.3V and 3.6V so that the MBF200 DP and DM pins do
not drive the USB beyond 3.6V.
In SPI Master Mode the sensor operates in SPI mode (1,1) where
CPOL = 1, and CPHA = 1. SCK is limited to 1 MHz.
• MOSI bits change on the falling edge of SCK
• MISO bits are sampled on the rising edge of SCK
• SCK is idle in the high state
• The most significant bits are shifted out first
Function Register Map
Index
0x00RAHRow Address, HighR/W
0x01RALRow Address, LowR/W
0x02CALColumn Address, LowR/W
0x03REHRow Address End, HighR/W
0x04RELRow Address End, LowR/W
0x05CELColumn Address End, LowR/W
0x06DTRDischarge Time RegisterR/W
0x07DCRDischarge Current RegisterR/W
0x08CTRLAControl Register AR/W
0x09CTRLBControl Register BR/W
0x0ACTRLCControl Register CR/W
0x0BSRAStatus Register AR
0x0CPGCProgrammable Gain Control RegisterR/W
0x0DICRInterrupt Control RegisterR/W
0x0EISRInterrupt Status RegisterR/W
0x0FTHRThreshold RegisterR/W
0x10CIDHChip Identification, HighR
0x11CIDLChip Identification, LowR
0x12TSTTest Mode RegisterR/W
NameDescriptionRead/Write Access
Function Register Descriptions
The function registers are accessed by indexed addressing. Write the
index register to select a function register. Read or write the data
register to access the contents of the function register. All registers
can be read and written except as noted in the following
descriptions.
Note: In the following descriptions, “sub-image” means a rectangular region of the sensor array, up to and including the entire array.
RAH0x00
Row Address Register High.
Reset State: 0x00
This register holds the high order bit of the address of the first row of a sub-image.
Bit Number
[7:1] - Reserved. Write 0 to these bits.
0 RA[8] Most Significant Bit of Row Address Register
[6:0] DT[6:0] Sets the discharge time in oscillator clock periods.
Bit Name Function
DCR0x07
Discharge Current Register
Reset State: 0x00
Bit Number
[7:5] - Reserved. Write 0 to these bits.
[4:0] DC[4:0] Sets the discharge current rate.
Bit Name Function
CTRLA 0x08
Control Register A.
Reset State: 0x00
Write this register to initiate image conversion. Read this register to read the A/D converter.
Bit Number
7 - Reserved. Write 0 to this bit.
6 - Reserved. Write 0 to this bit.
5 - Reserved. Write 0 to this bit.
4 - Reserved. Write 0 to this bit.
3 AINSEL
2 GETSUB Initiates Auto-increment for sub-image
1 GETIMG Initiates Auto-increment for whole image
0 GETROW Initiates Auto-increment for selected row
Bit Name Function
0=Select Array for Conversion
1=Select External Analog Input Pin and Start Conversion
The GETSUB, GETIMG, and GETROW bits select an image access mode and initiate an A/D conversion sequence. The AINSEL bit selects
the input source to the A/D converter.
Set the GETSUB bit to initiate the capture of a rectangular sub-image defined by the RAH, RAL, CAL, REH, REL, and CEL registers.
In CPU or SPI mode, the sub-image can be an arbitrary rectangle ranging from a single pixel to the entire array. In USB mode, the number of
columns in the sub-image must be an integral multiple of 64.
Set the GETIMG bit to initiate the capture of a whole image starting from row zero and column zero through row 299 and column 255,
regardless of the RAH, RAL, CAL, REH, REL, and CEL registers.
Set the GETROW bit to initiate the capture of a row specified by the RAH and RAL registers.
Writing a 1 to any of GETSUB, GETIMG, or GETROW abandons the current image access operation and restarts at the beginning of the
sub-image, image, or row. Set at most one of these three bits. If more than one these three bits are set, image conversion will not start.
Setting the GETROW bit causes the following events to happen:
• Row address loaded with contents of RAH and RAL register.
• Column address resets to zero
• Row capture automatically starts
• Analog to digital conversion of first pixel automatically starts
Setting the GETIMG bit causes the following events to happen:
• Row address resets to zero
• Column address resets to zero
• Row capture automatically starts
• Analog to digital conversion of first pixel automatically starts
Setting the GETSUB bit causes the following events to happen:
• Row address loaded with contents of RAH and RAL register
• Column address loaded with contents of CAL
• Row capture automatically starts
• Analog to digital conversion of first pixel automatically starts
Set the AINSEL bit along with one of the other three bits to begin the analog to digital conversion of the voltage on the AIN pin instead of the
sensor array.
Writing 0 to the CTRLA register has no effect other than clearing AINSEL; the current image access operation is not abandoned.
Read CTRLA for the result of the A/D conversion. The rising edge of RD
Parameter Description
Rising Edge of WR to First Data Valid 28 + DT[6:0]Clock Cycles
Rising Edge of RD
Note: DT[6:0] refers to the contents of the Discharge Time Register.
Control Register B.
Reset State: CTRLB[7:6] = state of MODE[1:0].
CTRLB[5] = 1.
CTRLB [4:0] = 0, Chip is disabled, oscillator is stopped.
MBF200
Bit Number
[7:6]MODE[1:0]Reflects the state of the MODE[1:0] pins. These bits are read-only. Writing to these bits has no effect. Write 0 to these bits.
5RDY
4-Reserved. Write 0 to this bit.
3AFDEN
2AUTOINCEN
1XTALSEL
0ENABLE
Bit NameFunction
This is a read-only bit that indicates the status of the A/D Converter.
0 = A/D Conversion is in progress.
1 = A/D Converter is idle.
Writing this bit has no effect. Write 0 to this bit.
Set this bit to enable the automatic finger detection circuit.
In USB mode, automatic finger detection will generate an interrupt on endpoint 2.
In CPU or SPI mode, automatic finger detection will generate a finger detect interrupt on the INTR pin as controlled by the Interrupt
Control Register (ICR). In any mode, the automatic finger detection can be combined with ENABLE=0 to save power.
0 = Column and row addresses do not automatically increment after the A/D converter is read.
1 = Column addresses increment and another A/D conversion is initiated after the A/D converter is read. The row address
increments at the end of each column.
In USB mode this bit has no function. In CPU and SPI mode this bit selects the clock source for the digital logic.
0 = Selects the internal 12 MHz multi-vibrator.
1 = Selects the XTAL1 pin.
0 = Place the sensor array, digital, and analog block into low-power state (12 MHz clock is halted, A/D Converter is shut down).
1= Enable the sensor array, digital, and analog blocks (12 MHz clock and A/D Converter are enabled).
Control Register C. This register controls the behavior of general output port pins P0 and P1.
Reset State: 0x00
Bit Number Bit Name Function
Programs the toggle rate of the P1 pin.
If PT1[2:0] = 000, then the P1 pin follows the state of the P1 bit. Otherwise PT1[2:0] selects the clock divisor to generate a square
wave on the P1 pin.
000 = P1 pin follows state of bit P1.
[7:5] PT1[2:0]
[4:2] PT0[2:0]
1 P1
0 P0
001 = clock divided by 2
010 = clock divided by 223.
011 = clock divided by 222.
100 = clock divided by 221.
101 = Reserved.
110 = Reserved.
111 = Reserved.
Programs the toggle rate of the P0 pin.
If PT0[2:0] = 000, then the P0 pin follows the state of the P0 bit. Otherwise PT0[2:0] selects the clock divisor to generate a square
wave on the P0 pin.
000 = P0 pin follows state of bit P0.
001 = clock divided by 2
010 = clock divided by 223.
011 = clock divided by 222.
100 = clock divided by 221.
101 = Reserved.
110 = Reserved.
111 = Reserved.
General Purpose Output Port. When PT1[2:0] bits are 000, this bit controls the P1 pin.
0 = P1 pin low.
1 = P1 pin high.
General Purpose Output Port. When PT0[2:0] bits are 000, this bit controls the P0 pin.
0 = P0 pin low.
1 = P0 pin high.
24
.
24
.
SRA0x0B
Status Register A. Read Only. This register shadows the state of CTRLA.
Reset State: 0x00
Bit Number Bit Name Function
7 - Reserved. Returns 0.
6 - Reserved. Returns 0.
5 - Reserved. Returns 0.
4 - Reserved. Returns 0.
3 AINSEL This bit is set or cleared when the AINSEL bit (CTRLA bit 3) is set or cleared by software.
2 GETSUB This bit is set when the GETSUB bit (CTRLA bit 2) is set by software. This bit is cleared after the last byte is read.
1 GETIMG This bit is set when the GETIMG bit (CTRLA bit 1) is set by software. This bit is cleared after the last byte is read.
0 GETROW This bit is set when the GETROW bit (CTRLA bit 0) is set by software. This bit is cleared after the last byte is read.
This register controls the behavior of the two interrupt sources of the fingerprint sensor. Interrupt request 0 corresponds to the finger detect
interrupt. Interrupt request 1 corresponds to the external interrupt pin EXTINT.
Set bits IE[1:0] to enable the corresponding interrupt. Disabling an interrupt prevents the interrupt event from causing the chip to assert
or to send a packet on USB endpoint 2. However, the interrupt event is not prevented from setting its corresponding bit in the ISR
INTR
register.
Set bits IM[1:0] to prevent an interrupt event from setting the corresponding bit in the ISR. Setting or clearing IM[1:0] will not clear ISR bits
IR[1:0].
Set bits IT[1:0] to program the interrupts as edge or level sensitive. If IT1 is programmed as edge triggered, then IR1 (interrupt request 1) will
be set by the falling edge of EXTINT.
IP[1:0] select the polarity of the interrupt source. To detect finger down and finger up states with the internal finger detect circuit, set the IP0
bit to detect finger down (rising or high signal). After the finger down interrupt occurs, clear the IP0 bit to detect finger up (falling or low
signal). Similarly, IP1 can be programmed to select the polarity of the EXTINT signal.
Read this register to determine source(s) of interrupt(s).
Write a 1 to IR[1:0] to acknowledge and clear the corresponding interrupt bit.
Bits IS[1:0] reflect the state of the finger detect sensor and the EXTINT pin, regardless of the bit settings in the ICR register. When the finger
detect sensor is not triggered, the IS0 bit will be constantly low. However the IS0 bit may not be constantly high when a finger is present; the
bit may be repeatedly changing from a low to high state.
Bit Number Bit Name Function
[7:4] - Reserved. Write 0 to these bits. Returns 0 when read.
3 IS1 Reflects the state of the EXTINT Pin. Write 0 to this bit.
2 IS0 Reflects the state of the Finger Detect Sensor. Write 0 to this bit.
1 IR1 EXTINT Interrupt Request Pending.
0 IR0 Finger Detect Interrupt Request Pending.
THR0x0F
Threshold Register.
Reset State 0x00.
This register controls the threshold at which a finger is detected by the automatic finger detection circuit.
The sensor should be enabled and its image parameters adjusted
before beginning a GETIMG, GETROW, or GETSUB operation.
Enable ADC
Write CTRLB with bits
2 and 0 set.
Wait 30 µS.
Sensor Enabled.
If using an external clock,
then set bit 1 also.
Other registers (DTR and
DCR for example) can be
initialized during this time.
Image Retrieval
Microprocessor Interface
Get Row
First load the RAH and RAL registers with the address of the row to
be fetched. Then write the CTRLA register to initiate a GETROW
operation. Finally, read the CTRLA register 256 times to retrieve
the row data.
No row or column registers need to be loaded prior to starting a GETIMG operation. The sensor will automatically begin A/D conversion at
row zero, column zero.
First, load the RAH, RAL, and CAL registers with the starting row and column address of the sensor sub-region. Then load registers REH,
REL, and CEL with the ending row and column address of the sensor sub-region. Write the CTRLA register to initiate a GETSUB operation.
Finally, read CTRLA register until the sub-image has been retrieved. The RAH, RAL, CAL, REH, REL, and CEL registers do not have to be
loaded before each GETIMG operation unless a different sensor sub0region is to be captured.
The “Get Image,” “Get Sub-Image,” and “Get Row” operations are initiated by writing the same registers as described in the microprocessor
interface, except that the commands are written to the MOSI pin and the data is read back on the MISO pin. However, in SPI mode, an image
or sub-image cannot be retrieved by issuing a single Register Read Command and shifting in the entire image; a separate Register Read
Command must be issued prior to reading each row.
The “Get Image,” “Get Sub-Image,” and “Get Row” operations are initiated by writing the same registers as described in the microprocessor
interface, except that the registers are written and read on endpoint 0 and the image data is read from endpoint 1.
VIN, VOUTVoltage on Any Pin Relative to VSS -0.5V to +7.0VV
IOUTOutput Current per I/O8.0mA
TSTGStorage Temperature-65°C to +150°C°C
Stresses above those listed under Absolute Maximum Ratings may cause permanent device failure. Functionality at or above these limits is not
implied. Exposure to Absolute Maximum Ratings for extended periods may affect device reliability.
Operating Range
Symbol Description Min Max Unit
VDDSupply Voltage
TA Ambient Temperature 0°C60°C°C
USB Mode 3.3 3.6 V
DC Characteristics
3.35.5V
(VDD=5.0V)
Symbol Description Test Conditions Min Max Units
VILInput LOW Voltage VDO = 4.5V-0.50.8V
VIHInput HIGH Voltage –2.0 VDD V
VOLOutput LOW Voltage VDD = MIN, IOL = 8 mA -0.4 V
VOHOutput HIGH Voltage VDD = MIN, IOH = -4 mA 2.4 - V
ILIInput Leakage Current VDD = MAX, VIN = VSS to VDD-5.05.0µA
ILO Output Leakage Current VDD = MAX, VOUT = VSS to VDD, CE0- = VIH or CE1 = VIL-5.05.0µA
(VDD=3.3V)
Symbol Description Test Conditions Min Max Units
VILInput LOW Voltage VDD = 3.0V-0.50.6 V
VIH Input HIGH Voltage 2.0VDD V
V
OL Output LOW VoltageVDD = 3.6V, IOL = 4 mA -0.4V
OH Output HIGH Voltage VDD = 3.0V, IOH = -2 mA 2.4 - V
V
ILIInput Leakage Current VDD = 3.6V VIN = VSS to VDD -5.05.0 µA
I
LOOutput Leakage Current VDD = 3.6V, VOUT = VSS to VDD, CE0- = VIH or CE1 = VIL-5.05.0 µA
The following describes the recommended method for reducing
image noise to get the best image from the sensor.
VDDA1 (Pin 1) and VDDA2 (Pin 7) are the analog power supply
pins. VSSA1 (Pin 2) and VSSA2 (Pin 6) are the ground returns.
Connect one bulk capacitor (4.7µF to 10µF) and two 0.1µF
capacitors in parallel between analog power and ground to provide
filtering of low and high frequency noise. Place the bulk capacitor
near VDDA1. Separate VDDA1 and VDDA2 from the digital power
pins through a 10 ohm resistor.
VDD
0.1 µF0.1 µF0.1 µ F0.1 µF
VSS3
VDD3
VDD2 VSS2
VDD1 VSS1 VDDA2 VSSA2 VSSA1 VDDA1
VDD1 (Pin 16), VDD2 (Pin 25), and VDD3 (Pin 39) are the digital
power supply pins. VSS1 (Pin 15), VSS2 (Pin 24), and VSS3 (Pin
40) are the ground returns. Place 0.1µF capacitors between digital
power and ground, as close to the pins as possible.
Input signals that are to be tied high should not be shorted directly
to VDD, but connected through a 1K to 10K ohm resistor in order
to maximize ESD immunity of the sensor. A single resistor may be
used for all inputs that are tied high.
Mount the MBF200 such that pins 1 through 40 point away the user
and pins 41 through 80 point toward from the user. When a finger is
placed on the sensor, the tip of the finger should be near pins 1
through 40, the cuticle should be centered over the sensor, and the
knuckle should be near pins 41 through 80. This orientation ensures
that fingerprint images will be captured right-side up, not sideways
nor upside down, using Fujitsu’s standard software.
The sensor should be mounted flush with the surrounding surface to
allow the finger to rest flat on the sensor surface and increase the
contact area between the finger and the sensor. If the sensor is
recessed too deeply, only the tip of the finger will be imaged.
It is also recommended that there be a groove or channel to guide the
finger into the proper position so that images are captured with a
uniform orientation.