Fujitsu MB86R11, MB86R11EVB Hardware Manual
MB86R11 Evaluation Board
MB86R11EVB
Hardware Manual
January, 2011
The 1.1 edition
FUJITSU SEMICONDUCTOR LIMITED
MB86R11 Evaluation Board
MB86R11EVB Hardware Manual
Preface
Objectives and Intended Reader
MB86R11EVB is an evaluation board of LSI MB86R11 for graphics applications.
This manual describes hardware specifications of MB86R11EVB for engineers who evaluate MB86R11
basic function.
Trademarks
ARM is a registered trademark of ARM Limited in the EU and other countries.
Cortex is a trademark of ARM Limited in the EU and other countries.
The company names and brand names herein are the trademarks or registered trademarks of their
respective owners.
Notation
Term Description
MB86R11EVB
Generic term of MB86R11 evaluation board which is a set of MB86R11EVB-CPU01 (CPU
board), MB86R11EVB-BASE01 (Base board), and MB86R11EVB-OPT01 (Option board).
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MB86R11 Evaluation Board
MB86R11EVB Hardware Manual
• The contents of this document are subject to change without notice.
Customers are advised to consult with sales representatives before ordering.
• The information, such as descriptions of function and application circuit examples, in this document are
presented solely for the purpose of reference to show examples of operations and uses of FUJITSU
SEMICONDUCTOR device; FUJITSU SEMICONDUCTOR does not warrant proper operation of the device
with respect to use based on such information. When you develop equipment incorporating the device based
on such information, you must assume any responsibility arising out of such use of the information. FUJITSU
SEMICONDUCTOR assumes no liability for any damages whatsoever arising out of the use of the
information.
• Any information in this document, including descriptions of function and schematic diagrams, shall not be
construed as license of the use or exercise of any intellectual property right, such as patent right or copyright,
or any other right of FUJITSU SEMICONDUCTOR or any third party or does FUJITSU
SEMICONDUCTOR warrant non-infringement of any third-party's intellectual property right or other right
by using such information. FUJITSU SEMICONDUCTOR assumes no liability for any infringement of the
intellectual property rights or other rights of third parties which would result from the use of information
contained herein.
• The products described in this document are designed, developed and manufactured as contemplated for
general use, including without limitation, ordinary industrial use, general office use, personal use, and
household use, but are not designed, developed and manufactured as contemplated (1) for use accompanying
fatal risks or dangers that, unless extremely high safety is secured, could have a serious effect to the public,
and could lead directly to death, personal injury, severe physical damage or other loss (i.e., nuclear reaction
control in nuclear facility, aircraft flight control, air traffic control, mass transport control, medical life
support system, missile launch control in weapon system), or (2) for use requiring extremely high reliability
(i.e., submersible repeater and artificial satellite).
Please note that FUJITSU SEMICONDUCTOR will not be liable against you and/or any third party for any
claims or damages arising in connection with above-mentioned uses of the products.
• Any semiconductor devices have an inherent chance of failure. You must protect against injury, damage or
loss from such failures by incorporating safety design measures into your facility and equipment such as
redundancy, fire protection, and prevention of over-current levels and other abnormal operating conditions.
• Exportation/release of any products described in this document may require necessary procedures in
accordance with the regulations of the Foreign Exchange and Foreign Trade Control Law of Japan and/or US
export control laws.
• The company names and brand names herein are the trademarks or registered trademarks of their respective
owners.
All rights reserved, Copyright FUJITSU SEMICONDUCTOR LIMITED 2011
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MB86R11 Evaluation Board
MB86R11EVB Hardware Manual
Revision History
Date Ver. Contents
2011/1/13 1.0 Newly issued
2011/1/25 1.1
Table 9-1 Revised description
Added FPGA specifications
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MB86R11 Evaluation Board
MB86R11EVB Hardware Manual
Contents
1. Outline of MB86R11EVB..................................................................................... 1
1.1. Composition............................................................................................................................................ 1
1.2. General specifications ............................................................................................................................. 2
1.3. External view .......................................................................................................................................... 3
1.4. Connection configuration........................................................................................................................ 5
2. Outline of Hardware............................................................................................ 6
2.1. Hardware specifications of CPU board................................................................................................... 6
2.2. Hardware specifications of Base board................................................................................................... 7
2.3. Hardware specifications of Option board................................................................................................ 9
2.4. Block diagram ....................................................................................................................................... 10
3. Details of hardware............................................................................................11
3.1. CPU board..............................................................................................................................................11
3.1.1. External Bus...................................................................................................................................11
3.1.2. DDR2 .............................................................................................................................................11
3.1.3. USB-Host .......................................................................................................................................11
3.1.4. USB-Function ............................................................................................................................... 12
3.1.5. ARM JTAG/ETM.......................................................................................................................... 12
3.1.6. Selection of boot flash memory..................................................................................................... 13
3.1.7. Pin Multiplex Switch..................................................................................................................... 14
3.1.8. Jumper setting ............................................................................................................................... 16
3.2. Base board............................................................................................................................................. 17
3.2.1. FPGA ............................................................................................................................................ 17
3.2.2. External Bus.................................................................................................................................. 17
3.2.3. Display .......................................................................................................................................... 18
3.2.4. Capture.......................................................................................................................................... 24
3.2.5. Ethernet ......................................................................................................................................... 26
3.2.6. EEPROM ...................................................................................................................................... 26
3.2.7. I2S (AUDIO)................................................................................................................................. 26
3.2.8. CAN .............................................................................................................................................. 27
3.2.9. USART (UART)............................................................................................................................ 28
3.2.10. GPIO ............................................................................................................................................. 29
3.2.11. SDIO ............................................................................................................................................. 30
3.2.12. TS.................................................................................................................................................. 31
3.2.13. MediaLB ....................................................................................................................................... 32
3.2.14. Pin Multiplex Switch..................................................................................................................... 33
3.3. Option board ......................................................................................................................................... 37
3.3.1. Display .......................................................................................................................................... 37
3.3.2. I2S (AUDIO)................................................................................................................................. 43
3.3.3. CAN .............................................................................................................................................. 44
3.3.4. USART (UART)............................................................................................................................ 44
3.3.5. LIN................................................................................................................................................ 45
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MB86R11EVB Hardware Manual
3.3.6. SDIO ............................................................................................................................................. 46
3.3.7. PWM ............................................................................................................................................. 47
3.3.8. IrDA .............................................................................................................................................. 48
3.3.9. IDE................................................................................................................................................ 49
3.3.10. SPI-FLASH (Quad)....................................................................................................................... 50
3.3.11. SPI-FLASH (Single) ..................................................................................................................... 50
3.3.12. I2C................................................................................................................................................. 50
3.3.13. General-purpose ADC................................................................................................................... 51
3.3.14. TCON............................................................................................................................................ 52
3.3.15. External INT.................................................................................................................................. 52
4. Board interface ................................................................................................. 53
4.1. CPU – Base board I/F ........................................................................................................................... 53
4.2. Base – Option board I/F ........................................................................................................................ 58
4.3. Customer I/F ......................................................................................................................................... 63
5. Memory map ..................................................................................................... 66
5.1. MB86R11EVB memory map ................................................................................................................ 66
5.2. FPGA register........................................................................................................................................ 66
5.2.1. VERSION register ........................................................................................................................ 67
5.2.2. PINMUX register.......................................................................................................................... 68
5.2.3. DEVICE_SEL register .................................................................................................................. 70
5.2.4. ACC_TEST register...................................................................................................................... 71
5.2.5. FPGA signal timing....................................................................................................................... 72
6. Allocation of peripheral resource and I2C port.............................................. 73
7. Power system diagram..................................................................................... 74
8. Clock system diagram...................................................................................... 77
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MB86R11EVB Hardware Manual
Evaluation Board
1. Outline of MB86R11EVB
This chapter describes the outline of MB86R11EVB.
1.1. Composition
MB86R11EVB consists of following 3 evaluation boards:
MB86R11EVB-CPU01 (CPU board)
This board mounts MB86R11.
MB86R11EVB-BASE01 (Base board)
This board has external I/F and the power supply input part.
MB86R11EVB-OPT01 (Option board)
This board mounts only the external peripheral functions.
The pin of MB86R11 is multifunctional, and is switched by the external pin setting or the register setting.
In MB86R11EVB, to realize the switching of each resource according to the setting mode by an enable
control, the buffer is inserted between MB86R11 and each resource.
This board executes an enable control with FPGA, and has the selector function of Display and Capture.
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1. Outline of MB86R11EVB
MB86R11
MB86R11EVB Hardware Manual
Evaluation Board
1.2. General specifications
The table below shows the general specifications.
Table 1-1 General specifications
No. Item Contents Remarks
CPU board
1 Board name
Base board
Option board
DDR2
Flash ROM
Display I/F
Capture I/F
Ethernet I/F
I2S I/F
MLB I/F
CAN I/F
LIN (USART) / UART I/F
SD I/F
USB I/F
PWM I/F
GPIO I/F
2 Function
IrDA I/F
IDE I/F
TS I/F
JTAG I/F
TRACE I/F
I2C I/F
A/D I/F
TCON
Quad-SPI
SFI
External Bus
DMA REQ
External INT
SW
LED
Operating ambient
3
temperature
4 Storage temperature 0 to 70°C
5 Humidity Normal humidity No condensation
6 Environment friendly Conforming product
7 Power supply AC adaptor input +12V 5A or less
Normal temperature
CPU board
W H = 127mm 117.5mm
8 Board dimensions
Base board
W H = 330mm 222.5mm
Option board
W H = 222.5mm 105mm
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1. Outline of MB86R11EVB
MB86R11
MB86R11EVB Hardware Manual
Evaluation Board
1.3. External view
The external view of MB86R11EVB is shown as follows.
Figure 1-1 External view of MB86R11EVB
External view of CPU board
Figure 1-2 External view of CPU board
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1. Outline of MB86R11EVB
MB86R11
MB86R11EVB Hardware Manual
Evaluation Board
External view of Base board
Figure 1-3 External view of Base board
External view of Option board
Figure 1-4 External view of Option board
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1. Outline of MB86R11EVB
MB86R11
MB86R11EVB Hardware Manual
Evaluation Board
1.4. Connection configuration
The connection configuration is shown as follows.
CPU Board Option Board
A
Base Board
MB86R1
1
Option Board
B
Base Board
CPU Board
A
CPUboard side connector CN8
Base board side connector
CPU board side connector CN9
Base board side connector
CN32
Figure 1-5 Connection configuration of MB86R11EVB
CN31
Option board side connector
Base board side connector
Option board side connector
CN7
Base board side connector
CN33
B
CN8
CN34
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1. Outline of MB86R11EVB
MB86R11
MB86R11EVB Hardware Manual
Evaluation Board
2. Outline of Hardware
This chapter describes the outline of hardware of MB86R11EVB.
2.1. Hardware specifications of CPU board
Table 2-1 shows the hardware specifications of CPU board.
Table 2-1 Hardware specifications of CPU board
Used CPU
1 MB86R11 PBGA-544pin
Installed function
No. Item Contents Remarks
1 DDR2
2 NOR-FLASH
3 USB-Host 292303-1 (Tyco) USB-A connector
USB-Host 292303-1 (Tyco)
4
USB-Function UX60SC-MB-5ST (HRS)
5 ICE PS-20PE-D4T1-B1 (JAE) JTAG connector
6 TRACE 2-5767004-2 (Tyco) ETM connector
7 Base board connection
MT47H64M16HR-25E_IT (Micron) 2
1Gbit (64M×16bit) 2
JS28F512M29EWL (Numonyx) 2
512Mbit (32Mword 16bit) 2
53647-1674 (Molex) 2
This is a composition when 32bit bus is
connected.
When boot from NOR-FLASH is used, it
becomes a composition of 512Mbit 1 because
the bus is fixed to 16bit.
USB-A connector
(Exclusive use with USB-Function)
Mini-B connector
(Exclusive use with USB-Host)
160pin stack
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2. Outline of Hardware
MB86R11
MB86R11EVB Hardware Manual
Evaluation Board
2.2. Hardware specifications of Base board
Table 2-2 shows the hardware specifications of Base board.
Table 2-2 Hardware specifications of Base board (1/2)
Used FPGA
1 Spartan6 XC6SLX100-2FGG676C (Xilinx) FBGA-676pin
No. Item Contents Remarks
The connector is DVI-I.
SiI164BCT64 (Silicon Image)
1.27mm pitch
1.27mm pitch
The connector is DVI-I.
SiI164BCT64 (Silicon Image)
1.27mm pitch
SiI1161CT (Silicon Image)
The connector is DVI-I.
1.27mm pitch
1.27mm pitch
1.27mm pitch
1.27mm pitch
GbE-PHY
88E1111-B2-BAB-C000 (Marvell)
OUTPUT
INPUT
2.0mm pitch
1.27mm pitch
Diplay0
1 Display (2ch)
Display1
Capture0
Capture (4ch)
2
Capture1
3 Ethernet
4 I2S (CH0: AUDIO)
5 MediaLB
6 CAN (CH0)
7 USART/UART (CH0, CH1)
8 SD (CH0)
DVI-D
CVBS ADV7343BSTZ (Analog devices)
Analog RGB ADV7343BSTZ (Analog devices)
RSDS (Header pin)
OQW-11-4.2-20PW (Mac8)
External output (Header pin)
OQW-11-4.2-20PW (Mac8)
DVI-D
External output (Header pin)
OQW-11-4.2-20PW (Mac8)
DVI-D
CVBS (YUV) ADV7403KSTZ (Analog devices)
External input (Header pin)
OQW-11-4.2-20PW (Mac8)
CVBS (YUV) ADV7403KSTZ (Analog devices)
Video Component (720P) ADV7403KSTZ (Analog devices)
External input (Header pin)
OQW-11-4.2-10PW (Mac8)
CVBS (YUV) ADV7403KSTZ (Analog devices)
External input (Header pin)
OQW-11-4.2-10PW (Mac8)
CVBS (YUV) ADV7403KSTZ (Analog devices)
External input (Header pin)
OQW-11-4.2-10PW (Mac8)
RJ45 connector
TM21R-5C-88 (HRS)
Stereo mini Jack 1
STX-3500-4N (Kycon)
Stereo mini Jack 1
STX-3500-4N (Kycon)
Connector for evaluation (Header pin)
A3A-10PA-2SV (71) (Hirose)
D-sub9
RDED-9P-LNA (4-40) (55)
(HONDA TSUSHIN)
D-sub9
RDED-9P-LNA (4-40) (55)
(HONDA TSUSHIN)
External input/output (Header pin)
OQW-11-4.2-03PW (Mac8)
SD card slot
DM1AA-SF-PEJ(HRS)
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2. Outline of Hardware
MB86R11
MB86R11EVB Hardware Manual
Evaluation Board
Table 2-2 Hardware specifications of Base board (2/2)
No. Item Contents Remarks
LED for power supply (Green)
LED 1 SML-310MT (ROHM)
9 LED
CH11-14
10
GPIO 10
CH5-10
11 TS
12 I2C (CH0, CH1) For setting of IC
13 EEPROM
INT_A0
14 External INT
INT_A1
15 NAND FLASH
FPGA
16
configuration
17 CPU board connection
18 Option board connection
Customer board connection
19
connector
20 MB86R11 mode selection switch
21 Capture input selection switch
JTAG 98424-G52-14ALF (FCI) For FPGA writing
Config-ROM S25FL032P0XMFI011 (SPANSION) Quad SPI
LED for FPGA reset (Green)
LED 1 SML-310MT (ROHM)
LED for configuration (Green)
LED 1 SML-310MT (ROHM)
LED 4
SML-310MT (ROHM)
External input/output (Header pin)
OQW-11-4.2-03PW (Mac8)
SW 6
SKRPABE010 (ALPS ELECTRIC)
External pin (Header pin)
OQW-11-4.2-07PW (Mac8)
BR25S256F (ROHM)
256Kbit
SW 1
SKRPABE010 (ALPS ELECTRI)
External input (Header pin)
FFC-03ASM1 (HONDA TSUSHI)
External input (Header pin)
FFC-03ASM1 (HONDA TSUSHI)
MT29F2G08ABAEAWP (Micron)
2Gbit (8bit Bus)
52837-1679 (Molex) 2
52837-1679 (Molex) 2
87BFN100R-3F (KEL) 100pin right angle
8bit slide switch 4
CHS-08B (NIDEC COPAL
ELECTRONICS)
8bit slide switch
CHS-08B (NIDEC COPAL
ELECTRONICS)
It lights when SW17 is turned on when
the power is supplied to the Base board.
It lights when FPGA is reset.
It lights when the FPGA configuration is
completed.
Green LED
Tact switch
1.27mm pitch
Tact switch
2.54mm pitch
2.54mm pitch
160pin stack
160pin stack
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2. Outline of Hardware
MB86R11
MB86R11EVB Hardware Manual
Evaluation Board
2.3. Hardware specifications of Option board
Table 2-3 shows the hardware specifications of Option board.
Table 2-3 Hardware specifications of Option board
No. Item Contents Remarks
Diplay0 DVI-D
Diplay1 DVI-D
1 Display (3ch)
DVI-D
Diplay2
2 I2S (CH1)
3 I2S (CH2, CH3)
4 CAN (CH1)
5 LIN (USART)/UART (CH5) B2B-PH-SM4-TB (JST)
6
SD 2 (CH1, CH2)
7
PWM 12
8 IrDA
9
I2C (CH2～4)
10 General-purpose ADC
11 TCON
12 SPI-FLASH (Quad)
13 SPI-FLASH (Single)
14 External INT (CH2)
15 DMA REQ
16 IDE
External output (Header pin)
OQW-11-4.2-20PW (Mac8)
OUT: Stereo mini Jack 1
STX-3500-4N (Kycon)
IN: Stereo mini Jack 1
STX-3500-4N (Kycon)
External input/output (Header pin)
OQW-11-4.2-04PW (Mac8)
D-sub9
RDED-9P-LNA (4-40) (55)
(HONDA TSUSHIN)
SD card slot
DM1AA-SF-PEJ (HRS)
External output (Header pin)
OQW-11-4.2-07PW (Mac8)
External input/output (Header pin)
OQW-11-4.2-06PW (Mac8)
External input/output (Header pin)
FFC-03ASM1 (HONDA TSUSHIN)
External input/output (Header pin)
OQW-11-4.2-05PW (Mac8)
External output (Header pin)
OQW-11-4.2-07PW (Mac8)
S25FL064P0XMFI001 (Spansion)
64Mbit
W25Q32BVSSIG (Winbond)
32Mbit
External input (Header pin)
OQW-11-4.2-04PW (Mac8)
External input/output (Header pin)
FFC-03ASM1 (HONDA TSUSHIN)
External input/output (Header pin)
WCAW-20-2-22PW (Mac8)
The connector is DVI-I.
SiI164BCT64(Silicon Image)
The connector is DVI-I.
SiI164BCT64(Silicon Image)
The connector is DVI-I.
SiI164BCT64(Silicon Image)
1.27mm pitch
1.27mm pitch
1.27mm pitch
1.27mm pitch
2.54mm pitch
1.27mm pitch
1.27mm pitch
1.27mm pitch
2.54mm pitch
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2. Outline of Hardware
MB86R11
Evaluation Board
MB86R11EVB Hardware Manual
2.4. Block diagram
Figure 2-1 shows the block diagram of MB86R11EVB.
MB86R11 FPGA
DDR2
Nor Flash
USB-
Host
USB-
Host
USB-
Function
ICE
TRACE
Enable signal of
each buffer
PIN
(RSDS)
PIN
PIN
PIN
PIN
PINPIN
DISP0
DISP1
CAP0
CAP1
CAP2
CAP3
Ethernet
AUDIO
MLB
CAN
USART
SD Card
DISP0
DISP1
PIN
DISP2
LIN
IDE
AUDIO
PIN
CAN
USART
SD Card
PWM
IrDA
PINPIN
GPIO
TS
I2C
EEPROM
INT
NAND
Flash
I2C
A/D
TCON
Quad SPI
SPI Flash
INT
DMA REQ
Figure 2-1 Block diagram of MB 86 R 11EVB
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2. Outline of Hardware
MB86R11
MB86R11EVB Hardware Manual
Evaluation Board
3. Details of hardware
This chapter describes details of the hardware of MB86R11EVB.
3.1. CPU board
Single-chip system LSI MB86R11 with built-in CoreTex-A9 is used for CPU.
Table 3-1 CPU
No. Item Model number Manufacturer Quantity Remarks
1 CPU MB86R11 Fujitsu Semiconductor 1 PBGA544pin
3.1.1. External Bus
NOR-FLASH of 1Gbit (512Mbit) is connected to External Bus of CPU board.
Table 3-2 NOR-FLASH
No. Item Model number Manufacturer Quantity Remarks
1 NOR-FLASH JS28F512M29EWL Numonyx 2 128MB
(32Mword×16bit×2)
3.1.2. DDR2
The CPU board has 2Gbit (1Gbit 2) as DDR2 interface.
It is a composition in which 4Gbit (2Gbit 2) can be connected.
Table 3-3 DDR2
No. Item Model number Manufacturer Quantity Remarks
1 DDR2 MT47H64M16HR-25E_IT MICRON 2 256MB
(64Mb 16bit 2)
3.1.3. USB-Host
The CPU board has the USB2.0-Host by 2 ports (CN3 and CN5).
The CN3 is exclusively used with Function (CN4).
Table 3-4 USB-Host
No. Item Model number Manufacturer Quantity Remarks
1 USB connector 292303-1 Tyco 2 TypeA
2 High side switch TPS2061D TI 1 Power supply control
3 Crystal oscillator MXO3-7050 48MHz MITADENPA 1 48MHz/50ppm
All USB ports
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3. Details of hardware
MB86R11
MB86R11EVB Hardware Manual
Evaluation Board
3.1.4. USB-Function
The CPU board has the USB2.0-Function by 1 port (CN4).
VBUS is connected to INT_A[1].
Table 3-5 USB-Function
No. Item Model number Manufacturer Quantity Remarks
1 USB connector UX60SC-MB-5ST HRS 1 miniB
2 Schmitt buffer SN74LVC1G17DCK TI 1 VBUS detection
3 Crystal oscillator MXO3-7050 48MHz MITADENPA 1 48MHz/50ppm
All USB ports
3.1.5. ARM JTAG/ETM
The CPU board has JTAG (CN1) and the ETM connector (CN2) for the ARM debugging.
Enable ETM probe (HLX600TP) and JTAG cable (HLX600JP) of YDC AdviceLUNA to be connected.
Table 3-6 ARM JT A G/ E T M
No. Item Model number Manufacturer Quantity Remarks
1 JTAG PS-20PE-D4T-B1 JAE 1
2 ETM 2-5767004-2 Tyco 1
2列20極
2列38極
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3. Details of hardware
MB86R11
MB86R11EVB Hardware Manual
Evaluation Board
3.1.6. Selection of boot flash memory
The CPU board has the switch that selects the boot memory. It can select either of NOR-FLASH or
NAND-FLASH of the external memory.
Table 3-7 Slide switch
No. Item Model number Manufacturer Quantity Remarks
1 Slide switch MAS-D20A1 Fujisoku 1
SW1 (Selection of boot memory type)
MB86R11
NAND-FLASH
Table 3-8 SW1 setting
SW1 Boot memory type Remarks
MB86R11 side NAND-FLASH
The other side NOR-FLASH (Default) Default
NOR-FLASH
Cannot used
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3. Details of hardware
MB86R11
MB86R11EVB Hardware Manual
Evaluation Board
3.1.7. Pin Multiplex Switch
The setting of each switch on CPU board is as follows.
Table 3-9 DIP SW
No. Item Model numbe r Manufacturer Quantity Remarks
1 DIP SW CHS-08B NIDEC COPAL
ELECTRONICS
SW2 (PLLMODE)
8 1
2
ON
Default
Table 3-10 SW2 setting
SW2 Signal Description Default
4:1 CRIPM[3:0] ON=0, OFF=1
SW[4, 3, 2, 1]=[ON, ON, ON, ON]=0000
SW[4, 3, 2, 1]=[OFF, OFF, OFF, OFF]=1111
5 PLLBYPASS OFF=PLL clock is not bypassed.
ON=PLL clock is bypassed.
6 PSMODE ON=PSMODE are reflected to the PLL clock frequency.
OFF=PSMODE are not reflected to the PLL clock frequency
7 VINTHI ON=The exception vectors are located at 0xFFFF_0000.
OFF=The exception vectors are located at 0x0000_0000.
8 USB_S Use USB-Host (CN3) / USB-Function
ON=USB-Host (CN3)
OFF=USB-Function (CN4)
SW[4, 3, 2, 1]=
[OFF, ON, ON, ON]
OFF
ON
OFF
OFF
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3. Details of hardware
MB86R11
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MB86R11EVB Hardware Manual
Evaluation Board
SW3 (MPXMODE)
Table 3-11 SW3 setting
SW3 Signal Description Default
2:1 MPXMODE[1:0] SW[2:1]=[OFF, OFF]=Mode0
3 MPXMODE[2] OFF=Mode0
4 NOR_EAEN NOR-FLASH bus select
5 JTAGSEL JTAG select
6 TEST MODE TEST mode
7 TRACEEN0 Pin Group B ETM
8 TRACEEN1 Pin Group H ETM
8 1
ON
SW[2:1]=[OFF, ON]=Mode1
SW[2:1]=[ON, ON]=Mode1
SW[2:1]=[ON, OFF]=Mode2
ON=Mode2
ON=32bit
OFF=16bit
OFF= Normal
ON=DFT
OFF= Normal
ON= TEST mode
ON=Used
OFF=Unused
ON= Used
OFF= Unused
Defaul
SW[2, 1]=
[OFF, OFF]
ON
OFF
OFF
OFF
OFF
OFF
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3. Details of hardware
MB86R11
MB86R11EVB Hardware Manual
Evaluation Board
3.1.8. Jumper setting
The CPU board has the header pin that has the following functions.
Table 3-12 General-purpose pin header
No. Item Model number Manufacturer Quantity Remarks
1 General-purpose pin
header
Table 3-13 Jumper setting
CN Function Description Default
10 OSC Open (Fixed) Open
11 VRH0 Short= ADC is not used.
12 VRH1 Short= ADC is not used.
13 VRL0 Short= ADC is not used.
14 VRL1 Short= ADC is not used.
15 VIN0 Short= ADC is not used.
16 VIN1 Short= ADC is not used.
Note:
CN11-16 must "OPEN" when the ADC connector of the Option board is used.
FFC-2ASM1 HONDA TSUSHIN 7 1 row, 2 poles
Short
Open= ADC is used.
Open= ADC is used.
Open= ADC is used.
Open= ADC is used.
Open= ADC is used.
Open= ADC is used.
Short
Short
Short
Short
Short
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3. Details of hardware
MB86R11
MB86R11EVB Hardware Manual
Evaluation Board
3.2. Base board
The AC adaptor is connected to this board, and it supplies power to each board.
The signal of the Display, Capture, and External Bus are connected to FPGA, and an enable control is
performed for the buffer of each resource according to the mode that the user set.
3.2.1. FPGA
The FPGA of the Base board provides a selector function of Display and Capture and a buffer enable
control functions of each resource.
External Bus connects the following signals with FPGA:
lower 10 bits of address (A[11:1])
32 bits control signal (excluding the signal for NAND) of data
Table 3-14 FPGA
No. Item Model number Manufacturer Quantity Remarks
1 FPGA XC6SLX100-2FGG676C Xilinx 1 Spartan6
2 Writing connector 98424-G52-14ALF FCI 1 2 rows, 14 poles
3 Configuration ROM S25FL032P0XMFI011 SPANSION 1 32Mbit
3.2.2. External Bus
The 256MB NAND-FLASH is connected to External Bus of the Base board.
To connect External Bus signals with customer's board, they are connected to the connector.
Refer to "4.3 Customer I/F" for detail.
Table 3-15 External Bus
No. Item Model number Manufacturer Quantity Remarks
1 NAND-FLASH MT29F2G08ABAEAWP MICRON 1
256MB (8bit×256Mbit)
17
3. Details of hardware
MB86R11
MB86R11EVB Hardware Manual
Evaluation Board
3.2.3. Display
The Base board has 2 ports (Display0 and Display1) as an image output interface, and is output with the
DVI connector. In addition, only the Diplay0 port has CVBS and the analog RGB connector for the analog
output.
The pin header of Display is described below.
Table 3-16 Display
No. Item Model number Manufacturer Quantity Remarks
1 DVI transmitter SiI164BCT64 SiliconImage 2
2 DVI-I connector 1734148-1 Tyco 2
3 Video DAC ADV7343 AnalogDevices 1
4 AnalogRGB connector 1-1734570-1 Tyco 1 Dsub15
5 NTSC connector LPR6520-0804F SMK 1
6 Display Header pins I/F OQW-11-4.2-20PW Mac8 2 2 rows, 40 poles
1.27mm pitch
(Remark) DISP0 connector DVI-I=CN1, CVBS=CN4, RGB=CN3,Header pin=CN20
DISP1 connector DVI-I=CN2,Header pin=CN27
Figure 3-1 Display circuit
18
3. Details of hardware
MB86R11
MB86R11EVB Hardware Manual
Evaluation Board
Table 3-17 Capture (CH0) pin assignment
No. Signal name I/O Description No. Signal name I/O Description
1 GND - Ground 21 GND - Ground
2 GND - Ground 22 GND - Ground
3 B0 I 23 HD I
4 B1 I 24 VD I
5 B2 I 25 DE I
6 B3 I 26 - -
7 B4 I 27 GND - Ground
8 B5 I 28 GND - Ground
9 B6 I 29 R0 I
10 B7 I 30 R1 I
11 GND - Ground 31 R2 I
12 GND - Ground 32 R3 I
13 G0 I 33 R4 I
14 G1 I 34 R5 I
15 G2 I 35 R6 I
16 G3 I 36 R7 I
17 G4 I 37 GND - Ground
18 G5 I 38 GND - Ground
19 G6 I 39 CLK I
20 G7 I 40 GND - Ground
(Remark) The physical pin assignment is the same as the audio general-purpose pin header.
Table 3-18 Capture YUV (CH0, CH1, CH 2, CH3) pin assignment
No. Signal name I/O Description No. Signal name I/O Description
1 V0 I 2 GND - Ground
3 V1 I 4 GND - Ground
5 V2 I 6 GND - Ground
7 V3 I 8 GND - Ground
9 V4 I 10 GND - Ground
11 V5 I 12 GND - Ground
13 V6 I 14 GND - Ground
15 V7 I 16 GND - Ground
17 CLK I 18 GND - Ground
19 - - 20 GND - Ground
(Remark) The physical pin assignment is the same as the audio general-purpose pin header.
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3. Details of hardware
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