Foxconn 748A01 Schematics

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Foxconn Precision Co.Inc.
Date:2004/03/01
D D
PAGE INDEX
748A01
01. Index Page
02. Topology
03. Reset Map
04. Clock Distribution
05. Power Delivery Map
06. CPU-1
C C
07. CPU-2
08. CPU-3
09. ISL6563 VCCP
10. ISL6563 VCCP
11. 748-1(Host/AGP)
12. 748-2 Memory
13. 748-3 MuTIOL/Other
14. 748-4 Power
15. 2.5V_DDR & 1.25V_VTT
B B
16. SB1.8V & SB3V & 5V_DUAL
17. 1D8V_VCC & VDDQ
18. Hardware Trap*
19. Main Clock Generator
20. Clock Buffer-1(3DDR/MIX)
21. DDR/MIX DIMM1,2
22. DDR/MIX DIMM3
23. SSTL-2 Termination Res
24. AGP.SCH
25. SIS964-PCI, IDE, MUTIOL
26. SIS964-LPC/MII/GPIO
27. SIS964-USB, SATA
28. SIS964-POWER
29. PCI 1&2.SCH
30. PCI 3&4.SCH
31. PCI5.SCH
32. VT6307
33. USB Header & 1394 Port
34. LAN POWER
35. RTL8110S/RTL8100C
36. LAN & USB PORT
37. IDE.SCH
38. AC97 CODEC.SCH
39. AC97 I/O
40. ITE8705
41. Keyboard Mouse.SCH
42. FAN HW Monitor
43. BIOS/FLOPPY
44. COM/PRT PORT
45. Power BTN/RTC Batt.SCH
46. Power Connector
47. GPIO Setting
48. Change list
A A
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Index
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AMD K7
D D
Host Bus
AGP SLOT
DDR SDRAM
CHANNEL A
SiS748
CHANNEL B
PCI Slot 1
C C
PCI Slot 2
PCI Slot 3
MuTIOL 1G
PCI Slot 4
PCI Slot 5
ATA 66/100/133
SiS964
IDE 1
IDE 2
B B
KEYBOARD
/MOUSE
PS/2
LPC Bus
Media Interface
FAN 1
FAN 2
ISA
FAN 3
ROM
FAN CONTROL
ISA Bus
LPC Super I/O
VOLTAGE MONITOR
TEMPERATURE MONITOR
Gigabit LAN
LAN PHY
AC'97
Audio Codec
Back Panel
USB 0
USB 1
USB 2
USB 3
RJ45
Audio I/O
SATA1,2
Front Panel
USB 4
USB 5
USB 6
USB 7
A A
IR
5
4
PARALLEL
3
FLOPPY
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Topology
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Reset Map
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B B
A A
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Clock Distribution
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Power Delivery Map
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548Sunday, September 05, 2004
1
8
DCCBB
A
A
SDATAINCLKJ[0..3]11
SDATAOUTCLKJ[0..3]11 SADDINJ[2..1 4]11 SADDOUTJ[2..14]11
SDATAJ[0..63]11
SDATAINCLKJ[0..3]
SDATAOUTCLKJ[0..3]
SADDOUTJ[2..14]
D
SDATAJ0 ADINCLKJ SDATAJ1 SDATAJ2 SADDINJ0 SDATAJ3 SDATAJ4 SDATAJ5 SDATAJ6 SDATAJ7 SDATAJ8 SDATAJ9 SDATAJ10 SDATAJ11 SDATAJ12 SDATAJ13 SDATAJ14 SDATAJ15 SDATAJ16 SDATAJ17 SDATAJ18 SDATAJ19 SADDOUTCLKJ SDATAJ20 SDATAJ21 SDATAJ22 SDATAJ23 SADDOUTJ2 SDATAJ24 SDATAJ25 SDATAJ26 SDATAJ27 SDATAJ28 SDATAJ29 SDATAJ30 SDATAJ31 SDATAJ32 SDATAJ33 SDATAJ34 SDATAJ35 SDATAJ36 SDATAJ37 SDATAJ38 SDATAJ39 SDATAJ40 SDATAJ41 SDATAJ42 SDATAJ43 SDATAJ44 SDATAJ45 SDATAJ46 SDATAJ47 SDATAJ48 SDATAJ49 SDATAJ50 SDATAJ51 SDATAJ52 SDATAJ53 SDATAJ54 SDATAJ55 SDATAJ56 SDATAJ57 SDATAJ58 SDATAJ59 SDATAJ60 SDATAJ61 SDATAJ62 SDATAJ63
Close to S748
L3
DAINCLKJ0 SDATAINCLKJ0 SDATAINCLKJ2
10nH
DAINCLKJ1 M_DAINCLKJ1 SDATAINCLKJ1 SDATAINCLKJ3
L0603 10nH
1 2
L7
L0603 10nH
1 2
M_DAINCLKJ0 DAINCLKJ2
*
*
7
SADDIN J[2..14 ]
SDATAJ[0..63]
AA35
W37 W35
Y35 U35 U33 S37
S33 AA33 AE37 AC33 AC37
Y37 AA37 AC35
S35
Q37
Q35
N37
J33 G33 G37 E37 G35 Q33 N33 L33 N35 L37
J37 A37 E35 E31 E29 A27 A25 E21 C23 C27 A23 A35 C35 C33 C31 A29 C29 E23 C25 E17 E13 E11 C15
A13
C21 A21 E19 C19 C17 A11 A17 A15
L4
1 2
BC4
4.7pF
50V, NPO, +/-0.25pF
C0603
L8
1 2
BC6
4.7pF
50V, NPO, +/-0.25pF
C0603
SYSDATA#0 SYSDATA#1 SYSDATA#2 SYSDATA#3 SYSDATA#4 SYSDATA#5 SYSDATA#6 SYSDATA#7 SYSDATA#8 SYSDATA#9 SYSDATA#10 SYSDATA#11 SYSDATA#12 SYSDATA#13 SYSDATA#14 SYSDATA#15 SYSDATA#16 SYSDATA#17 SYSDATA#18 SYSDATA#19 SYSDATA#20 SYSDATA#21 SYSDATA#22 SYSDATA#23 SYSDATA#24 SYSDATA#25 SYSDATA#26 SYSDATA#27 SYSDATA#28 SYSDATA#29 SYSDATA#30 SYSDATA#31 SYSDATA#32 SYSDATA#33 SYSDATA#34 SYSDATA#35 SYSDATA#36 SYSDATA#37 SYSDATA#38 SYSDATA#39 SYSDATA#40 SYSDATA#41 SYSDATA#42 SYSDATA#43 SYSDATA#44 SYSDATA#45 SYSDATA#46 SYSDATA#47 SYSDATA#48 SYSDATA#49 SYSDATA#50 SYSDATA#51
E9
SYSDATA#52 SYSDATA#53
C9
SYSDATA#54
A9
SYSDATA#55 SYSDATA#56 SYSDATA#57 SYSDATA#58 SYSDATA#59 SYSDATA#60 SYSDATA#61 SYSDATA#62 SYSDATA#63
L0603 10nH
L0603 10nH
6
F30
G11
G13
G19
G21
G27
G29
NC1F8NC2
NC3
NC4
NC5
NC6
NC7
SOCKETA-1
VID[4:0]
00000
00001
00010
00011
00100
00101
00110
00111
01000
01001
01010
01011
01100
01101
01110
01111 1.475
NC35
NC36
NC37
NC38
NC39
NC40
NC41
AF6
AF8
AG5
AF10
AF28
AF30
AE31
AF32
5
THERMDA THERMDC
G31
H10
H28
H30
H32
J31
K30
L31
N31
Q31
S31
U31
W31
NC8
NC9
NC10H6NC11H8NC12
NC13
NC14
NC15
NC16J5NC17
NC18K8NC19
NC20
NC21
NC22
NC23S7NC24
NC25U7NC26
NC27W7NC28
VCC_CORE VID[4:0] VCC_CORE
1.850
1.825
1.800
1.775
1.750
1.725
1.700
1.675
1.650
1.625
1.600
1.575
1.550
1.525
1.500
NC42
NC43
NC44
NC45
NC46
AG19
AG21
AG23
AG25
L5
L0603 10nH
1 2
L9
L0603 10nH
1 2
AH8
NC47
AH30
NC48
AJ7
FSB1
NC49
NC50
NC51
NC52
NC53
AJ9
AJ11
AJ15
AJ17
AJ19
FSB_Sense[1]
FSB1 19,26
BC5
4.7pF
*
50V, NPO, +/-0.25pF
C0603
M_DAINCLKJ3DAINCLKJ3
BC7
4.7pF
*
50V, NPO, +/-0.25pF
C0603
10000
10001
10010
10011
10100
10101
10110
10111
11000
11001
11010
11011
11100
11101
11110
11111
NC57
NC58
NC54
NC55
AL7
AK8
AJ27
L6
1 2
L10 L0603 10nH
1 2
NC59
NC60
NC61
AL9
AL11
AL25
L0603 10nH
NC62
AL27
10/10
THERMDA 40,42 THERMDC 42
Y31
AA31
AC31
AD8
NC29Y5NC30
NC31
NC32
1.450
1.425
1.400
1.375
1.350
1.325
1.300
1.275
1.250
1.225
1.200
1.175
1.150
1.125
1.100
NO CPU
NC63
NC64
NC65
NC66
AN7
AN9
AM8
AN11
AN25
AD30
NC33
NC67
AN27
NC34
NC68
4
SYSADDINCLK#
SYSADDIN#0 SYSADDIN#1 SYSADDIN#2 SYSADDIN#3 SYSADDIN#4 SYSADDIN#5 SYSADDIN#6 SYSADDIN#7 SYSADDIN#8
SYSADDIN#9 SYSADDIN#10 SYSADDIN#11 SYSADDIN#12 SYSADDIN#13 SYSADDIN#14
SYSADDOUTCLK#
SYSADDOUT#0 SYSADDOUT#1 SYSADDOUT#2 SYSADDOUT#3 SYSADDOUT#4 SYSADDOUT#5 SYSADDOUT#6 SYSADDOUT#7 SYSADDOUT#8
SYSADDOUT#9 SYSADDOUT#10 SYSADDOUT#11 SYSADDOUT#12 SYSADDOUT#13 SYSADDOUT#14
SYSDATAINCLK#0 SYSDATAINCLK#1 SYSDATAINCLK#2 SYSDATAINCLK#3
SYSDATAOUTCLK#0 SYSDATAOUTCLK#1 SYSDATAOUTCLK#2 SYSDATAOUTCLK#3
SYSCHECK#0 SYSCHECK#1 SYSCHECK#2 SYSCHECK#3 SYSCHECK#4 SYSCHECK#5 SYSCHECK#6 SYSCHECK#7
RSTCLK#
CLKIN#
RSTCLK
CLKIN
SDATAIN_VALID#
SDATAOUT_VALID#
SYSFILLVALID#
U1A
AJ33 AJ29
AL29 AG33 AJ37 AL35 AE33 AJ35 AG37 AL33 AN37 AL37 AG35 AN29 AN35 AN31
E3 J1
J3 C7 A7 E5 A5 E7 C1 C5 C3 G1 E1 A3 G5 G3
W33 J35 E27 E15
AE35 C37 A33 C11
U37 Y33 L35 E33 E25 A31 C13 A19
AL19 AL17
AN19 AN17
AN33 AL31
AJ31
SOCKETA
3
L1
ADINCLKJ SADDINCLKJ
L0603 4.7nH
1 2
4.7nH
VCCP
R1 680 +/-5%
SADDINJ1 SADDINJ2 SADDINJ3 SADDINJ4 SADDINJ5 SADDINJ6 SADDINJ7 SADDINJ8 SADDINJ9 SADDINJ10 SADDINJ11 SADDINJ12 SADDINJ13 SADDINJ14
SADDOUTJ3 SADDOUTJ4 SADDOUTJ5 SADDOUTJ6 SADDOUTJ7 SADDOUTJ8 SADDOUTJ9 SADDOUTJ10 SADDOUTJ11 SADDOUTJ12 SADDOUTJ13 SADDOUTJ14
DAINCLKJ0 DAINCLKJ1 DAINCLKJ2 DAINCLKJ3
SDATAOUTCLKJ0 SDATAOUTCLKJ1 SDATAOUTCLKJ2 SDATAOUTCLKJ3
SDATAINVALJ
R2 680 +/-5%
600 0.1uF
* *
R6 270
+/-5%
R0603
SADDOUTCLKJ 11
BC2
680pF
50V, NPO, +/-5%
BC3
C0603
680pF
50V, NPO, +/-5%
C0603
R7 270
+/-5%
R0603
Title
Document Number R ev
Date: Sheet
2
L2
1 2
BC1
2.7pF
*
50V, NPO, +/-0.25pF
C0603
R3
60.4
+/-1%
R0603
R5 301
+/-1%
R0603
L0603 4.7nH
VCCPVCCP
CPU-1
R4
60.4
+/-1%
R0603
748A01
SADDINCLKJ 11
CK_133M_CPUJ 19
CK_133M_CPU 19
SDATAINVALJ 11
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DCCBB
A
A
VCCP
*After Model 6,VCC_Z/VSS_Z is NC
R12 0
BC8
*
0.1uF
DUMMY
D
*After Model 6,SYSVERFMODE is NC
R13 0
TRSTJ TDI
TCK CONNECT TMS P ROCRDY
DBREQJ SCANCLK1 PICD0
SCANCLK2 PICCLK0 SCANSHIFTEN SCANINTEVAL
PLLTESTJ PLLMON1 COREFBJ
PLLMON2 COREFB
PLLBYPASSJ FID0 PLLBYPASSCLKJ FID2
PLLBYPASSCLK FID3
ZP ZN
VREFSYS
SYSVREFMODE CPURSTJ
BC9
0.1uF
*
25V, Y5V, +80%/-20%
C0603
3D3V_SYS
*
VCCP
VCCA
R27 100
+/-1%
R0603
R30 100
+/-1%
R0603
BC12
1uF
DUMMY
DUMMY
VREFSYS
*
U2 AME8800
3
AC7
AE7
U3 U5 U1 Q1 Q3
AA1 AA3
S1 S5 Q5 S3
AC3
AN13
AL13
AJ25 AL15
AN15
AJ23
AE5 AC5
W5
AA5
BC10
0.33uF/NC
C0603
V_IN
VCC_Z
VSS_Z
TRST# TDO TDI TCK TMS
DBRDY DBREQ#
SCANCLK1 SCANCLK2 SCANSHIFTEN SCANINTEVAL
PLLTEST# PLLMON1
PLLMON2
PLLBYPASS# PLLBYPASSCLK#
PLLBYPASSCLK
VCCA
ZP ZN
VREFSYS
SYSVREFMODE
U1B
SOCKETA
BC11
47nF
*
C0603
2
V_OUT
GND
1
7
G15
G17
G23
KEY1G7KEY2G9KEY3
KEY4
SOCKETA-2
A individual power plane, Isolate with digital power.
12
BC13
*
10uF
C0805
G25
KEY5
BC15
10nF
KEY6
KEY7N7KEY8Q7KEY9
*
Y7
AA7
AG7
KEY10
KEY11
R47 10
BC14
39pF
AG9
KEY12
AG15
KEY13
6
AG17
KEY14
AG27
KEY15
AG29
AG31
KEY16
+/-5%
R0603
KEY17
FSB_Sense[0]
FSB0
FSB0 19,26
IGNNE#
STPCLK#
FLUSH#
CONNECT PROCRDY
CLKFWDRESET
K7CLKOUT
K7CLKOUT#
COREFB-
COREFB+
AMDPIN
ANALOG
PWROK RESET#
VCCA
39pF
*
BC16
NMI
SMI#
A20M#
FERR
INTR
INIT#
PIC#1 PIC#0
PICCLK
FID0 FID1 FID2 FID3
VID0 VID1 VID2 VID3 VID4
5
NMI
AN3
SMIJ
AN5
A20MJ
AE1
FERR PLLBYPASSCLKJ PLLBYPASSCLK K7CLKOUT K7CLKOUTJ
AG1
INTR
AL1
INITJ
AJ3
IGNNEJ
AJ1
STPCLKJ
AC1
FLUSHJ
AL3
AL23 AN23
CLKFWDRST
AJ21
PICD1
N5 N3 N1
K7CLKOUT
AL21
K7CLKOUTJ PICD0 PICD1 PICCLK0
AN21
AG13 AG11
W1 W3 Y1 Y3
L1 L3 L5 L7 J7
AH6 AJ13
AE3 AG3
FID1
VID0 VID1 VID2 VID3 VID4
PWRGOOD
BC17
39pF
*
50V, NPO, +/-5%
C0603
15MIL
K7_PLL_PGD 46
4
NMI 26 SMIJ 26 A20MJ 26
INTR 26 INITJ 26 IGNNEJ 26 STPCLKJ 26
CONNECT 11 PROCRDY 11 CLKFWDRST 11
PICD1 26 PICD0 26 PICCLK0 19
COREFB 9
FID[0..3] 18
VID0 9 VID1 9 VID2 9 VID3 9 VID4 9
PWRGOOD 46 CPURSTJ 11
3
VCCP
R8 100
+/-5%
R0603
R14 100
+/-5%
R0603
DBREQJ PLLTESTJ
TRSTJ TDI TCK TMS
PLLMON1 PLLMON2
PLLBYPASSJ
ZN
SMIJ INITJ FLUSHJ
NMI
INTR
IGNNEJ A20MJ STPCLKJ
CPURSTJ COREFB
R28 510 R29 510
RN1 510
1
*
3 5 7 8
CIS
R31 56 R33 56
R35 680
R38 40.2
RN62 680
1
*
3 5 7 8
RN63
+/-5%
1
*
3 5 7 8
680 8P4R0603
+/-5%
R49 100 R50 10K
2
VCCP VCCP VCCP
R9 100
+/-5%
R0603
R15 100
+/-5%
R0603
3D3V_SYS
R18 330
+/-5%
R0603
R21 1K
+/-5%
R0603
VCCP
600 have vccp pull up
VCCP
FERR
B
2 4 6
SCANCLK2 SCANINTEVAL SCANCLK1 SCANSHIFTEN
2 4 6
8P4R0603
2 4 6
600 NC
ZP SYSVREFMODE
VREFMODE=Low=No voltage scaling
COREFBJ
1
R10 100
+/-5%
R0603
R16 100
+/-5%
R0603
3D3V_SYS 3D3V_SYS
R19 330
+/-5%
R0603
R22 1K
+/-5%
R0603
R25 150
Change Component
+/-5%
R0603
FERRJ 26
Q1 MMBT3904
E C
RN2
270
1
*
3 5 7 8
2 4 6
R32 56 R34 270DUMMY
R36 10K
R11 100
+/-5%
R0603
R17 100
+/-5%
R0603
R20 330
+/-5%
R0603
R23 1K
+/-5%
R0603
JP18
12
SHORT
Title
Document Number R ev
Date: Sheet
SocketA-2
748A01
of
748Sunday, September 05, 2004
A
TECHNOLOGY COPR.
8
DCCBB
A
A
VCCP
D
AB30 AB32 AB34 AB36
AD2 AD4
AD6 AF14 AF18 AF22 AF26 AF34 AF36 AH10 AH14 AH18
AH2 AH22 AH26
AH4
AJ5 AK10 AK14 AK18 AK22 AK26 AK30 AK34 AK36
AL5 AM10 AM14 AM18
AM2 AM22 AM26 AM30 AM34
B12 B16 B20 B24 B28 B32 B36
D12 D16
D20 D24 D28 D32
F12 F16 F20 F24 F28 F32 F34
F36 H12 H16
H20 H24
K32
K34
K36
P30
P32
P34
P36
T30
T32
T34
T36
X30
X32
X34
X36
B4 B8
D2
D4 D8
H2
H4
M2 M4 M6 M8
R2 R4 R6 R8
V2 V4 V6 V8
Z2 Z4 Z6 Z8
7
U1C
VCC_CORE1 VCC_CORE2 VCC_CORE3 VCC_CORE4 VCC_CORE5 VCC_CORE6 VCC_CORE7 VCC_CORE8 VCC_CORE9 VCC_CORE10 VCC_CORE11 VCC_CORE12 VCC_CORE13 VCC_CORE14 VCC_CORE15 VCC_CORE16 VCC_CORE17 VCC_CORE18 VCC_CORE19 VCC_CORE20 VCC_CORE21 VCC_CORE22 VCC_CORE23 VCC_CORE24 VCC_CORE25 VCC_CORE26 VCC_CORE27 VCC_CORE28 VCC_CORE29 VCC_CORE30 VCC_CORE31 VCC_CORE32 VCC_CORE33 VCC_CORE34 VCC_CORE35 VCC_CORE36 VCC_CORE37 VCC_CORE38 VCC_CORE39 VCC_CORE40 VCC_CORE41 VCC_CORE42 VCC_CORE43 VCC_CORE44 VCC_CORE45 VCC_CORE46 VCC_CORE47 VCC_CORE48 VCC_CORE49 VCC_CORE50 VCC_CORE51 VCC_CORE52 VCC_CORE53 VCC_CORE54 VCC_CORE55 VCC_CORE56 VCC_CORE57 VCC_CORE58 VCC_CORE59 VCC_CORE60 VCC_CORE61 VCC_CORE62 VCC_CORE63 VCC_CORE64 VCC_CORE65 VCC_CORE66 VCC_CORE67 VCC_CORE68 VCC_CORE69 VCC_CORE70 VCC_CORE71 VCC_CORE72 VCC_CORE73 VCC_CORE74 VCC_CORE75 VCC_CORE76 VCC_CORE77 VCC_CORE78 VCC_CORE79 VCC_CORE80 VCC_CORE81 VCC_CORE82 VCC_CORE83 VCC_CORE84 VCC_CORE85 VCC_CORE86 VCC_CORE87 VCC_CORE88 VCC_CORE89 VCC_CORE90 VCC_CORE91 VCC_CORE92 VCC_CORE93 VCC_CORE94 VCC_CORE95 VCC_CORE96 VCC_CORE97 VCC_CORE98 VCC_CORE99 VCC_CORE100 VCC_CORE101
SOCKETA
6
AB2
VSS1
AB4
VSS2
AB6
VSS3
AB8
VSS4
AD32
VSS5
AD34
VSS6
AD36
VSS7
AF12
VSS8
AF16
VSS9
AF2
VSS10
AF20
VSS11
AF24
VSS12
AF4
VSS13
AH12
VSS14
AH16
VSS15
AH20
VSS16
AH24
VSS17
AH28
VSS18
AH32
VSS19
AH34
VSS20
AH36
VSS21
AK12
VSS22
AK16
VSS23
AK2
VSS24
AK20
VSS25
AK24
VSS26
AK28
VSS27
AK32
VSS28
AK4
VSS29
AK6
VSS30
AM12
VSS31
AM16
VSS32
AM20
VSS33
AM24
VSS34
AM28
VSS35
AM32
VSS36
AM36
VSS37
AM4
VSS38
AM6
VSS39
B10
VSS40
B14
SOCKETA-3
VSS41
B18
VSS42
B2
VSS43
B22
VSS44
B26
VSS45
B30
VSS46
B34
VSS47
B6
VSS48
D10
VSS49
D14
VSS50
D18
VSS51
D22
VSS52
D26
VSS53
D30
VSS54
D34
VSS55
D36
VSS56
D6
VSS57
F10
VSS58
F14
VSS59
F18
VSS60
F2
VSS61
F22
VSS62
F26
VSS63
F4
VSS64
F6
VSS65
H14
VSS66
H18
VSS67
H22
VSS68
H26
VSS69
H34
VSS70
H36
VSS71
K2
VSS72
K4
VSS73
K6
VSS74
M30
VSS75
M32
VSS76
M34
VSS77
M36
VSS78
P2
VSS79
P4
VSS80
P6
VSS81
P8
VSS82
R30
VSS83
R32
VSS84
R34
VSS85
R36
VSS86
T2
VSS87
T4
VSS88
T6
VSS89
T8
VSS90
V30
VSS91
V32
VSS92
V34
VSS93
V36
VSS94
X2
VSS95
X4
VSS96
X6
VSS97
X8
VSS98
Z30
VSS99
Z32
VSS100
Z34
VSS101
Z36
VSS102
5
CPR#(AK6): CPU_PRESENCE#
CPR#
is connected to VSS on the processor package. If pulled-up on the motherboard, CPU_PRESENCE# may be used to detect the presence or absence of a processor.
4
High Frequency Decoupling Capacitors
VCCP
BC18 4.7uF
C1206
*
BC21 4.7uF
C1206
*
BC24 4.7uF/NC
C1206
*
BC27 4.7uF
C1206
*
High Frequency Decoupling Capacitors
VCCP
BC30 0.22uF
*
BC34 0.22uF
*
BC38 0.22uF
*
BC42 0.22uF
*
BC46 0.22uF
*
BC50 0.22uF
*
3
BC19 4.7uF
C1206
*
BC22 4.7uF/NC
C1206
*
BC25 4.7uF/NC
C1206
*
BC28 4.7uF/NC
C1206
*
BC31 0.22uF/NC
*
BC35 0.22uF/NC
*
BC39 0.22uF/NC
*
BC43 0.22uF/NC
*
BC47 0.22uF/NC
*
BC51 0.22uF/NC
*
BC20 10uF
C1206
*
BC23 10uF
C1206
*
BC26 10uF/NC
C1206
*
BC29 10uFNC
C1206
*
BC32 0.22uF/nc
*
BC36 0.22uF/NC
*
BC40 0.22uF/NC
*
BC44 0.22uF/NC
*
BC48 0.22uF/NC
*
2
BC33 0.22uF/NC
*
BC37 0.22uF/NC
*
BC41 0.22uF/NC
*
BC45 0.22uF/NC
*
BC49 0.22uF/NC
*
1
TECHNOLOGY COPR.
Title
Document Number R ev
Date: Sheet
SocketA-3
748A01
of
848Sunday, September 05, 2004
A
5
4
3
2
1
D D
R52 1K
+/-5%
R57 10K/NC
+/-5%
R0603
R0603
5V_SYS
5V_SYS
BC72
0.1uF_NC
*
5V_SYS
5V_SYS
VID47 VID37 VID27 VID17 VID07
R59
1K
R0603
+/-5%
R56
10K
R0603
+/-5%
PWMOK
C C
PWMOK46
COREFB7
B B
R536 2K/NC
+/-5%
R0603
R537
3.3K/NC
+/-5%
R0603
ISL6563CR FOR K7 POWER
R0805
+/-5%
1
VIN
*
DS
Q2AOD412
G
DS
Q3AOD412
G
VIN
DS
*
Q4AOD412
G
DS
Q5AOD412
G
3D3V_SYS
642
RN3
1K
*
135
7 8
R58 2K
BC75 0.1uF_NC
*
R60 150K_NC
R63
10K
R0603
+/-5%
JP17
12
SHORT
*
BC73
0.1uF
BC853
10nF
BC68
10uF
*
*
C1206
22
VID4
23
VID3
24
VID2
1
VID1
2
VID0
3
DACSEL/VID5
10
SSEND
21
ENLL
5
COMP
6
FB
9
OFS
R62 10K
+/-5%
R0603
7
ISEN
4
VRM10
BOTTOM PAD CONNECT TO GND
5V_SYS
8
VCC
GND
25
R51 2
+/-5%
R0603
16
UGATE1
PVCC
PHASE1
LGATE1
BOOT1
BOOT2
UGATE2
PHASE2
LGATE2
PGND
ISL6563CR
5V_SYS
BC69
10uF
C1206
19
18
17
R1151
20
11
R1152 2.2
12
13
15 14
BC854
0.1uF
R53 1 R0805
BC71
*
0.1uF
2.2
*
U3
Seperated from GND Pad
*
+/-5%
R54 0
BC76
*
0.1uF
R61
R64
0
R0805
+/-5%
5V_SYS
BC70
10uF
6.3V, X5R, +/-20%
C1206
BC77
10uF
6.3V, X5R, +/-20%
C1206
BC834
10uF/NC
*
6.3V, X5R, +/-20%
C1206
Choke COIL 0.7uH
L12
*
R55
2.2
+/-5%
R0805
*
BC74
10nF
Choke COIL 0.7uH
L13
*
R65
2.2
+/-5%
R0805
*
BC78
10nF
Choke COIL 0.7uH
L11
*
*
EC1
1500uF
16V,+/-20%
CE50D100H300
123
EC4
2200uF 6.3V
123
2200uF 6.3V
*
123
2200uF 6.3V
EC8
EC2
1500uF
16V,+/-20%
CE50D100H300
EC5
2200uF 6.3V/NC
123
EC9
2200uF 6.3V
123
EC6
EC3
1500uF
*
16V,+/-20%
CE50D100H300
VIN
VCCP
A A
TECHNOLOGY COPR.
Title
Document Number Re v
5
4
3
2
Date: Sheet
VCCP
A
of
948Sunday, September 05, 2004
1
5
D D
4
3
2
1
H4 Mounting Hole
H1 FMARK
FD40
C C
B B
H2 FMARK
FD40
H3 FMARK
FD40
mh40x80_8
7 8 9
H5 Mounting Hole
mh40x80_8
5
6
4
7
3
8
2
9
1
H6 Mounting Hole
mh40x80_8
5
6
7
4
8
3
9
2
1
H7 Mounting Hole
mh40x80_8
5
6
7
4
8
3
9
2
1
H8 Mounting Hole
mh40x80_8
5
6
4
7
3
8
2
9
1
H9 Mounting Hole
mh40x80_8
5
6
4 3 2
1
5
6
4
7
3
8
2
9
1
A A
TECHNOLOGY COPR.
Title
Document Number Re v
5
4
3
2
Date: Sheet
VRD DRIVER
A
of
10 48Sunday, September 05, 2004
1
DCCBB
A
A
Place near the 748 chip.
3D3V_SYS
3D3V_SYS
D
SDATAINCLKJ[0..3]6
SDATAOUTCLKJ[0..3]6
Put near 748 chip
VCCP
R70 62
+/-1%
R0603
BC859
*
3.3pF/NC
Place near the 748 chip.
VCCP
VCCP
8
BC80
0.1uF
*
C0603
CPUPHYAVDD
JP3
12
SHORT
CK_133M_S74819
SDATAINVALJ6
CPURSTJ7
PROCRDY7
CONNECT7
CLKFWDRST7 SADDINCLKJ6
SADDOUTCLKJ6
CK_133M_S748
SADDINJ[2..14]6
SADDOUTJ[2..14]6
R73 33
+/-5%
R0603
R74 33
+/-5%
R0603
R77 100
+/-1%
R0603
R81 100
+/-1%
R0603
JP6
SHORT
CPUCLKAVDD
BC81
10nF
*
25V, Y5V, +80%/-20%
C0603
CPUCLKAVSS
BC83
0.1uF
*
*
C0603
SDATAOUTCLKJ0
SDATAOUTCLKJ1
SDATAOUTCLKJ2
SDATAOUTCLKJ3
S2KCOMPND
S2KCOMPPD
BC91
10nF/NC
*
C0603
HSTLVREFA
BC95
10nF
*
C0603
12
BC84
10nF
25V, Y5V, +80%/-20%
C0603
CPUPHYAVSS
VDDREFA VSSREFA
VDDREFB VSSREFB
HSTLVREFA HSTLVREFB
SDATAINVALJ CPURSTJ PROCRDY CONNECT CLKFWDRST
SADDINCLKJ SADDOUTCLKJ
SDATAINCLKJ0 SDATAINCLKJ1 SDATAINCLKJ2 SDATAINCLKJ3
SADDINJ2 SADDINJ3 SADDINJ4 SADDINJ5 SADDINJ6 SADDINJ7 SADDINJ8 SADDINJ9 SADDINJ10 SADDINJ11 SADDINJ12 SADDINJ13 SADDINJ14
SADDOUTJ2 SADDOUTJ3 SADDOUTJ4 SADDOUTJ5 SADDOUTJ6 SADDOUTJ7 SADDOUTJ8 SADDOUTJ9 SADDOUTJ10 SADDOUTJ11 SADDOUTJ12 SADDOUTJ13 SADDOUTJ14
CPUCLKAVDD CPUCLKAVSS CPUPHYAVDD CPUPHYAVSS
15 mil trace
7
VCCP
M27 M29
A23 C23
L29 B23
W29
E20 D18 D19 C19 F18
A22 U29
A26 E27 K29 P29
A24 G28 H29 R28
F21 D21 B21 E22 F20 D22 C20 C21 D20 C22 A20 A21 F19
U24 T27
W24
U25 U27
W26
U28 V25
W27
V27 U26 Y25 V29
Y26 Y27 B19 A19
R76 100
+/-1%
R0603
HSTLVREFB
R80 100
+/-1%
R0603
SHORT
SDATAJ[0..63]
S2KCOMPND
E18
VDDREFA VSSREFA
VDDREFB VSSREFB
HSTLVREFA HSTLVREFB
CPUCLK SDATAINVAL#
CPURST# PROCRDY CONNECT CLKFWDRST
SADDINCLK# SADDOUTCLK#
SDATAINCLK#0 SDATAINCLK#1 SDATAINCLK#2 SDATAINCLK#3
SDATAOUTCLK#0 SDATAOUTCLK#1 SDATAOUTCLK#2 SDATAOUTCLK#3
SADDIN#2 SADDIN#3 SADDIN#4 SADDIN#5 SADDIN#6 SADDIN#7 SADDIN#8 SADDIN#9 SADDIN#10 SADDIN#11 SADDIN#12 SADDIN#13 SADDIN#14
SADDOUT#2 SADDOUT#3 SADDOUT#4 SADDOUT#5 SADDOUT#6 SADDOUT#7 SADDOUT#8 SADDOUT#9 SADDOUT#10 SADDOUT#11 SADDOUT#12 SADDOUT#13 SADDOUT#14
CPUAVDD CPUAVSS CPUPHYAVDD CPUPHYAVSS
U4A 748
JP7
*
*
12
S2KCOMPND
BC92
10nF/NC
C0603
BC97
10nF
C0603
6
SDATAJ[0..63]6
S2KCOMPPD
SDATAJ0
SDATAJ4
SDATAJ3
SDATAJ1
SDATAJ2
D17
C25
F24
E24
D25
C26
SDATA#0
SDATA#1
SDATA#2
S2KCOMPPD
SDATA#3
HOST
15 mil trace
SDATAJ5
F23
SDATA#4
SDATA#5
SDATAJ7
SDATAJ6
A27
C27
SDATA#6
SDATAJ[0..63]
SDATAJ9
SDATAJ10
SDATAJ8
SDATAJ11
A25
D23
F22
C24
SDATA#7
SDATA#8
SDATA#9
SDATA#10
1D8V_VCCNB
SDATAJ12
SDATA#11
D26
SDATAJ13
SDATA#12
B25
SDATAJ14
D24
SDATA#13
SDATAJ15
SDATAJ16
B27
F26
SDATA#14
SDATA#15
SBA7
F12
E11
SBAJ6
SBAJ7
JP8
SHORT
5
SDATAJ18
SDATAJ17
SDATAJ19
SDATAJ20
SDATAJ21
SDATAJ22
SDATAJ23
SDATAJ24
SDATAJ25
SDATAJ27
SDATAJ26
SDATAJ28
SDATAJ29
E26
D27
D29
E28
E29
F29
F27
G24
F25
C29
C28
G26
H25
SDATA#16
SDATA#17
SDATA#18
SDATA#19
SDATA#20
SDATA#21
SDATA#22
SDATA#23
SDATA#24
SDATA#25
SDATA#26
SDATA#27
SDATA#28
748-1
SBA6
SBA5
SBA4
SBA3
SBA2
SBA1
SBA0
ST0
ST1
ST2
AAD0H2AAD1J6AAD2G1AAD3H4AAD4J4AAD5G3AAD6F3AAD7G4AAD8E2AAD9E4AAD10D2AAD11G6AAD12F5AAD13D3AAD14C1AAD15D4AAD16D7AAD17B5AAD18E7AAD19F8AAD20A6AAD21C6AAD22E8AAD23F9AAD24C8AAD25D9AAD26
F14
SBAJ3
C12
D12
SBAJ1
SBAJ2
BC100
0.1uF
C0603
E13
SBAJ0
*
F15
A14
E14
ST1
ST2
ST0
BC101
10nF/NC
C0603
VSSREFB
AAD1
AAD0
A10
C11
SBAJ4
SBAJ5
VDDREFB
*
12
SDATAJ30
SDATA#29
AAD2
G29
SDATAJ31
SDATA#30
AAD3
G27
SDATA#31
SDATAJ32
SDATAJ33
J25
K25
SDATA#32
AAD5
AAD4
SDATAJ34
SDATAJ36
SDATAJ35
L24
K27
M26
SDATA#33
SDATA#34
SDATA#35
AAD7
AAD8
AAD6
1D8V_VCCNB
SDATAJ37
L28
SDATA#36
AAD9
SDATAJ38
SDATA#37
AAD10
L25
SDATAJ39
SDATA#38
AAD11
L27
SDATAJ40
J24
SDATA#39
AAD12
SDATAJ41
J26
SDATA#40
AAD13
4
SDATAJ42
SDATAJ43
H27
J27
SDATA#41
SDATA#42
AAD14
AAD15
JP9
SHORT
SDATAJ45
SDATAJ44
J29
J28
SDATA#43
SDATA#44
SDATA#45
AAD16
AAD17
VDDREFA
*
12
SDATAJ46
M24
AAD18
SDATAJ47
SDATAJ48
SDATAJ49
SDATAJ50
SDATAJ51
SDATAJ52
L26
N26
R25
R26
P27
T26
SDATA#46
SDATA#47
SDATA#48
SDATA#49
SDATA#50
SDATA#51
AGP
AAD21
AAD22
AAD23
AAD19
AAD20
AAD24
BC103
BC104
0.1uF
10nF/NC
*
C0603
C0603
VSSREFA
SDATAJ54
SDATAJ53
SDATAJ55
SDATAJ56
SDATAJ57
R27
T24
T29
N27
N24
SDATA#52
SDATA#53
SDATA#54
SDATA#55
SDATA#56
SDATA#57
GC_DET#/AGP8XDET#
AAD27C9AAD28
AAD29A9AAD30
F11
E10
AAD28
AAD27
AAD26
AAD25
AAD29
SDATAJ58
SDATAJ59
SDATAJ60
N25
N28
SDATA#58
SDATA#59
PIPE#/DBI_HI
AGPVSSREF
AAD31
B10
D10
AAD30
AAD31
3
SDATAJ61
SDATAJ63
SDATAJ62
P25
R29
N29
R24
SDATA#60
SDATA#61
SDATA#62
SDATA#63
AC/BE3# AC/BE2# AC/BE1# AC/BE0#
AREQ# AGNT#
AFRAME#
AIRDY#
ATRDY#
ADEVSEL#
ASERR#
ASTOP#
APAR#
RBF#
WBF#
DBI_LO
SB_STBF SB_STBS
AD_STBF0 AD_STBS0
AD_STBF1 AD_STBS1
AGPCLK
AGPRCOMP AGPRCOMN
A1XAVDD A1XAVSS
A4XAVDD A4XAVSS
AGPVREF
2
AAD[0..31] SBAJ[0..7] AC-BE[0..3] ST[0..2] ADSTBF[0..1] ADSTBS[0..1]
AC-BE3
B7
AC-BE2
C5
AC-BE1
C3
AC-BE0
H5 D15
E16 F6 A4 E5 D6 B4 A3
B2 C14
B13
GCDETJ
C15
DBI_HI
A13
DBI_LOW
D13 A12
B11
ADSTBF0
E1
ADSTBS0
F2
ADSTBF1
B8
ADSTBS1
A7
AGPCLK0
C16
AGPRCOMP
J3
AGPRCOMN
J1
A1XAVDD
A16
A1XAVSS
B16
A4XAVDD
B15
A4XAVSS
A15 H1 J2
Title
Document Number R ev
Date: Sheet
AREQ 24 AGNT 24 AFRAME 24 AIRDY 24 ATRDY 24 ADEVSEL 24 ASERR 24 ASTOP 24
APAR 24 RBF 24
WBF 24 GCDETJ 24
DBI_HI 24 DBI_LOW 24
SBSTBF 24 SBSTBS 24
CK_66M_S748 19
AVREFGC 24
A1XAVDD
*
A1XAVSS
A4XAVDD
*
A4XAVSS
HOST & AGP
748A01
BC85
0.1uF
C0603
BC88
0.1uF
C0603
AAD[0..31] 24
AC-BE[0..3] 24
ADSTBF[0..1] 24 ADSTBS[0..1] 24
AGPRCOMN
AGPRCOMP
BC86
10nF
*
C0603
JP4
SHORT
BC89
10nF
*
C0603
1
SBAJ[0..7] 24
ST[0..2] 24
AGP3.0 = 50 ohm
R68
49.9
+/-1%
R0603
R69
43.2
+/-1%
R0603
3D3V_SYS
12
3D3V_SYS
JP5
12
SHORT
TECHNOLOGY COPR.
of
11 48Sunday, September 05, 2004
VDDQ
A
8
DCCBB
A
A
MD[0..63] MAA[0..14] DQM[0..7] DQS[0..7] CSAJ[0..5]
MD[0..63] 21,22,23 DQM[0..7] 21,22,23 DQS[0..7] 21,22,23
D
2D5V_DDR 2D5V_DDR
BC106
0.1uF/NC
*
C0603
DDRVREFA
( 10-mil trace ) ( 10-mil trace ) 25-mil clearance or shielded by VSS trace and VDD trace
BC108
0.1uF
*
C0603
R88 150
+/-1%
R0603
R92 150
+/-1%
R0603
25-mil clearance or shielded by VSS trace and VDD trace
7
DDRVREFB
*
*
BC107
0.1uF/NC
C0603
BC109
0.1uF
C0603
R87 150
+/-1%
R0603
R91 150
+/-1%
R0603
6
AD25 AH28 AD24 AH26
AF27
AG25
AF26
AG27
AJ26
AJ27 AE25 AE23 AG24 AH23
AF24 AH25 AE22 AD21 AD22
AJ24 AH22 AG22
AF20 AH20 AE20
AF21 AE19
AJ20 AG21
AJ21 AE16 AH17
AF15
AJ15
AF17 AD16 AG15 AH16 AG16
AJ17
AJ12
AF12 AG10
AF11 AG12 AD12 AE11 AH10 AH11
AJ11
AJ6 AF6 AE7
AH4 AH7 AG7 AG6
AF5
AJ5
AH5 AD7
AE5 AE4 AF2
AG4
AF3
AG3 AD6 AH2 AG1 AC2
AE1 AB3
AD3
AE2
AC6 AD5 AC4
AB5
AD1
DDRAVDD
DDRAVSS
U4B
MD0 MD1 MD2 MD3 MD4 MD5 MD6 MD7 DQM0 CSB#0/DQS0 MD8 MD9 MD10 MD11 MD12 MD13 MD14 MD15 DQM1 CSB#1/DQS1 MD16 MD17 MD18 MD19 MD20 MD21 MD22 MD23 DQM2 CSB#2/DQS2 MD24 MD25 MD26 MD27 MD28 MD29 MD30 MD31 DQM3 CSB#3/DQS3 MD32 MD33 MD34 MD35 MD36 MD37 MD38 MD39 DQM4 CSB#4/DQS4 MD40 MD41 MD42 MD43 MD44 MD45 MD46 MD47 DQM5 CSB#5/DQS5 MD48 MD49 MD50 MD51 MD52 MD53 MD54 MD55 DQM6 CSB#6/DQS6 MD56 MD57 MD58 MD59 MD60 MD61 MD62 MD63 DQM7 CSB#7/DQS7
748
MD0 MD1 MD2 MD3 MD4 MD5 MD6 MD7 DQM0 DQS0 MD8 MD9 MD10 MD11 MD12 MD13 MD14 MD15 DQM1 DQS1 MD16 MD17 MD18 MD19 MD20 MD21 MD22 MD23 DQM2 DQS2 MD24 MD25 MD26 MD27 MD28 MD29 MD30 MD31 DQM3 DQS3 MD32 MD33 MD34 MD35 MD36 MD37 MD38 MD39 DQM4 DQS4 MD40 MD41 MD42 MD43 MD44 MD45 MD46 MD47 DQM5 DQS5 MD48 MD49 MD50 MD51 MD52 MD53 MD54 MD55 DQM6 DQS6 MD56 MD57 MD58 MD59 MD60 MD61 MD62 MD63 DQM7 DQS7
5
MAA[0..14] 21,22,23
CSAJ[0..5] 21,22,23
748-2
BC110
BC111
0.1uF
C0603
10nF
*
C0603
*
FWDSDCLKO
3D3V_SYS
MAA0 MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA8
MAA9 MAA10 MAA11 MAA12 MAA13 MAA14 MAA15
RAMRWA#
SRASA# SCASA#
Reserved
CS0# CS1# CS2# CS3# CS4# CS5#
DDRVREFA DDRVREFB
DLLAVDD DLLAVSS
SDRCLKI
DDRAVDD DDRAVSS
CKE0
CKE1
CKE2
CKE3
CKE4
CKE5
S3AUXSW#
DDRCOMP DDRCOMN
4
AE13 AJ14 AH14 AE14 AD15 AD18 AJ18 AF18 AG18 AH19 AF14 AE10 AD13 AG19 AD19 AF23
AF9 AG9 AJ9
AE17
AD9 AD10 AJ8 AE8 AF8 AH8
AJ23 AJ3
AA29 AA28
AG13 AH13
Y29 Y28
AA6 AB6 AA5 AA3 AB4 AA4
Y6
AB2 AB1
DLLAVDD
DLLAVSS
10 mil wire
MAA0 MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA8 MAA9 MAA10 MAA11 MAA12 MAA13 MAA14
MWAJ RASAJ CASAJ
CSAJ0 CSAJ1 CSAJ2 CSAJ3 CSAJ4 CSAJ5
DDRCOMP DDRCOMN
BC113
0.1uF
*
C0603
DDRVREFA DDRVREFB
DLLAVDD DLLAVSS
FWDSDCLKO
DDRAVDD DDRAVSS
CKE0 CKE1 CKE2 CKE3 CKE4 CKE5
*
BC114
10nF
C0603
3
CKE0 21 CKE1 21 CKE2 21 CKE3 21 CKE4 22 CKE5 22
3D3V_SYS
RASAJ MWAJ CASAJ
FWDSDCLKO
2
RASAJ 21,22,23 MWAJ 21,22,23 CASAJ 21,22,23
DDRCOMN DDRCOMP
Put near 748 chip.
R86 22
+/-5%
R0603
R83 40.2 +/-1% R84 40.2 +/-1%
*
1
SDCLKO_DDR 20
BC105
10pF
50V, NPO, +/-5%
C0603
2D5V_DDR
TECHNOLOGY COPR.
Title
Document Number R ev
Date: Sheet
748-MEM
748A01
of
12 48Sunday, September 05, 2004
A
D
DCCBBAA
The differences between the traces of MuTIOL Strobes and Data should be smaller than 0.05"
8
ZSTB025
ZSTBJ025
ZSTB125
ZSTBJ125
ZUREQ25 ZDREQ25
7
ZCLK0
ZCLK019
ZSTB0 ZSTBJ0
ZSTB1 ZSTBJ1 TRAP0
Z1XAVDD TRAP3 Z1XAVSS
Z4XAVDD Z4XAVSS
ZCMPJN DRAM_SEL ZCMPJP
ZVREF
ZUREQ ZDREQ
AA1 AA2
W1
U1 V2
P2 R1
Y2 Y1
W2 W4
W3
W6
V3
U4C 748
ZCLK ZSTB0
ZSTB0# ZSTB1
ZSTB1#
Z1XAVDD Z1XAVSS
Z4XAVDD Z4XAVSS
ZCMP_N ZCMP_P
ZVREF
ZUREQ ZDREQ
6
748-3
MuTIOL
ZAD0V4ZAD1T2ZAD2U5ZAD3T5ZAD4U3ZAD5T4ZAD6R3ZAD7T6ZAD8P6ZAD9P1ZAD10R5ZAD11P4ZAD12N2ZAD13N5ZAD14N3ZAD15N6ZAD16
5
V6
TESTMODE0 TESTMODE1 TESTMODE2
TRAP0 TRAP1 TRAP2 TRAP3 TRAP4
ENTEST
DLLEN#
DRAM_SEL
PCIRST#
PWROK
AUXOK
B18 A18 F17
E17 C17 B17 A17 F16
D16 C18
Y4 W5
Y5 Y3
BC116
1uF
*
C0603
dummy
4
NB Hardware Trap Table
CPUDLLENN
TMODE0
TMODE1
TMODE2
TRAP4 MuTIOL type (verision 1 , 2) Ver. 1 Ver. 2 OFF
TMODE0 TMODE1 TMODE2
*
R94 0
BC117
1uF
C0603
dummy
TRAP0 18 TRAP1 18 TRAP2 18 TRAP3 18
PWRGD_NB 46
AUXOK 26,45
TRAP1 TRAP2
TRAP4 ENTEST
DLLENJ
PWRGD_NB
CPUCLK SDCLK PLL/DLL Circuit Enable
P748 Debug Mode Selection OFF
R1160 0
3D3V_SB
DUMMY
PCIRSTJ2 25,37
3
A0/A1
MuTIOL ( ASL ) DBI Mode
MuTIOL ( ASL ) initialize Mode
2
DLLENJ
ON/1
DISABLE
Packet
ENABLE
OFF/0
ENABLE
ENABLE
Series
DISABLE
3D3V_SYS
R1145
4.7K/NC
+/-5%
R0603
1
Default
OFFDISABLE
OFF
OFF
BC833
10uF
C1206
*
FB52
2 1
FB L0603 47 Ohm
JP14
12
SHORT
8
The differences between the traces of MuTIOL Strobes and Data should be smaller than 0.05"
Z4XAVDD
BC121
0.1uF
*
C0603
Z4XAVSS
BC120
10nF
*
C0603
7
TMODE0 TMODE1 TMODE2 TRAP4
ZCMPJN
ZVREF
ZCMPJP
NB Hardware Trap
1
*
3 5 7 8
R1144 4.7KDUMMY
3
3D3V_SYS
RN75
2 4 6
4.7K DUMMY
TECHNOLOGY COPR.
Title
Document Number Re v
Date: Sheet
MuTIOL
13 48Sunday, September 05, 2004
2
A
of
1
ZAD16
ZAD11
ZAD14
ZAD13
ZAD12
ZAD10
ZAD0
ZAD[0..16]25
ZAD[0..16]
3D3V_SYS3D3V_SYS
BC123
10nF
*
JP15
SHORT
C0603
12
ZAD6
ZAD3
ZAD4
ZAD2
ZAD1
ZAD8
ZAD9
ZAD5
ZAD7
Z1XAVDD
BC124
0.1uF
*
C0603
Z1XAVSS
6
ZAD15
PULL LOW
NB Hardware Trap has internal pull-low in SiS748 chip
for DRAM_SEL,CPUDLLENN,TMODE0,TMODE1,TMODE2 signals.
Place near 748 chip.
1D8V_VCCNB
JP16
SHORT
BC118
0.1uF
*
C0603
BC126
0.1uF
*
C0603
12
4
R96 150
+/-1%
R0603
R98
49.9
+/-1%
R0603
5
R95 56
+/-5%
R0603
R99 56
+/-5%
R0603
D
DCCBB
A
A
VDDQ
BC129
*
BC133
*
BC137 1uF/ NC
*
BC140 1uF
*
BC142 0.1 uF
*
BC144 0.1 uF/NC
*
3D3V_SB
BC673
10uF
*
C1206
8
10uF C1206
10uF/NCC1206
1D8V_SB
*
VCCP
3D3V_SYS
BC188
10nF
C0603
VDDQ
1D8V_VCCNB
U4D
K10 K11 K13 K14
M10 M11 N11
K12 K15 K16 K18 K20
M20 N10
V20 Y12
Y15 Y18 Y19
AB13 AB17
H21 H22
K17 K19
M19 N19 N20 P19 P20 R19 R20
H16
L10 L11 L12 L13 L14 L15
L20
J22
L16 L17 L18 L19
T19 T20
J16
H8 H9
J8
T9 U9
7
VDDQ VDDQ VDDQ
VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ
IVDD IVDD IVDD IVDD IVDD
IVDD IVDD IVDD
IVDD IVDD
IVDD IVDD IVDD
IVDD IVDD
S2KOVDD S2KOVDD
S2KOVDD S2KOVDD S2KOVDD S2KOVDD S2KOVDD S2KOVDD S2KOVDD S2KOVDD S2KOVDD S2KOVDD S2KOVDD S2KOVDD S2KOVDD S2KOVDD S2KOVDD S2KOVDD
VDD3.3 VDD3.3
AUX1.8 AUX3.3
748
6
1D8V_VCCNB
T10
VDDZ
R11
VDDZ
R10
VDDZ
P11
VDDZ
P10
VDDZ
W20
IVDD
T11
VDDM
U10
VDDM
U11
VDDM
U19
VDDM
U20
VDDM
V10
VDDM
V11
VDDM
V19
VDDM
W10
VDDM
VSS
M17
VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM
VDDM VDDM VDDM VDDM VDDM
PVDDM PVDDM
PVDDM PVDDM
VSSM VSSM VSSM VSSM VSSM VSSM VSSM VSSM VSSM VSSM VSSM VSSM VSSM VSSM VSSM VSSM VSSM VSSM VSSM VSSM VSSM VSSM VSSM VSSM VSSM VSSM VSSM VSSM VSSM
VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ
VSS
M16
W11 W12 W13 W14 W15 W16 W17 W18 W19 Y10 Y13 Y14 Y16 Y17 Y20 AA8
AA22 AB8 AB9 AB21 AB22
W9 Y11
AA13 AA17
P12 P13 P14 P15 P16 R12 R13 R14 R15 R16 T12 T13 T14 T15 T16 U12 U13 U14 U15 U16 U17 U18 V12 V13 V14 V15 V16 V17 V18
M12 M13 M14 M15 N12 N13 N14 N15
748-4
Power(inside)
VSS
VSS
VSS
VSS
VSS
T18
VSS
T17
R18
R17
P18
VSS
P17
VSS
N18
N17
N16
VSS
VSS
M18
2D5V_DDR
5
VDDQ
1D8V_VCCNB
2D5V_DDR
VCCP
U4E
Y24 AA24 AA25 AA26 AA27 AB24 AB25 AB26 AB27 AB28 AB29 AC24 AC25 AC26 AC27 AC28 AC29 AD26 AD27 AD28 AD29 AE26 AE27 AE28 AE29
AF28 AF29
AG29
B20
B22
B24
B26
B28
D28
F28
H28
K28
M28
P28
T28
V28
W28
K1 K2 K3 K4 K5 K6
M1 M2 M3 M4 M5 M6
N1 P3 R2 T1 T3 U2 V1
VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ
L1
VDDQ
L2
VDDQ
L3
VDDQ
L4
VDDQ
L5
VDDQ
L6
VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ
VDDZ VDDZ VDDZ VDDZ VDDZ VDDZ VDDZ
VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM
S2KOVDD S2KOVDD S2KOVDD S2KOVDD S2KOVDD S2KOVDD S2KOVDD S2KOVDD S2KOVDD S2KOVDD S2KOVDD S2KOVDD S2KOVDD S2KOVDD
748
748-5
. Power (outside)
VSS
VSS
VSS
VSS
VSS
E25
E19
E21
E23
H24
G25
4
VSSZN4VSSZP5VSSZR4VSSZR6VSSZU4VSSZU6VSSZ
VSS
VSS
VSS
VSS
K24
K26
H26
M25
VSS
P24
VSS
P26
VSS
T25
VSS
V24
VSS
V5
V26
VSS
W25
VSS
VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ
VSSM VSSM VSSM VSSM VSSM VSSM VSSM VSSM VSSM VSSM VSSM VSSM VSSM VSSM VSSM VSSM VSSM VSSM VSSM VSSM VSSM VSSM VSSM VSSM VSSM VSSM VSSM VSSM VSSM VSSM VSSM VSSM VSSM VSSM VSSM VSSM VSSM VSSM VSSM VSSM VSSM VSSM VSSM VSSM VSSM VSSM VSSM VSSM VSSM VSSM VSSM VSSM VSSM VSSM VSSM
A5 A8 A11 B3 B6 B9 B12 B14 C2 C4 C7 C10 C13 D1 D5 D8 D11 D14 E3 E6 E9 E12 E15 F1 F4 F7 F10 F13 G2 G5 H3 H6 J5
AC1 AC3 AC5 AD2 AD4 AD8 AD11 AD14 AD17 AD20 AD23 AE3 AE6 AE9 AE12 AE15 AE18 AE21 AE24 AF1 AF4 AF7 AF10 AF13 AF16 AF19 AF22 AF25 AG2 AG5 AG8 AG11 AG14 AG17 AG20 AG23 AG26 AG28 AH3 AH6 AH9 AH12 AH15 AH18 AH21 AH24 AH27 AJ4 AJ7 AJ10 AJ13 AJ16 AJ19 AJ22 AJ25
3
3D3V_SYS
BC131 0.1uF
*
BC135 0.1uF
*
2D5V_DDR
2
1D8V_VCCNB
BC127 10uF C1206
*
BC128 1uF/NC
*
BC132 1uF
*
BC136 0.1uF/NC
*
BC139 0.1uF
*
VCCP
BC130
1
10uF C1206
*
BC134 1uF/NC
*
BC138 0.1uF
*
BC141 0.1uF/NC
*
BC143 0.1uF
*
BC145 1uF/NC
*
BC147 1uF/NC
*
BC150 0.1uF/NC
*
BC153 0.1uF/NC
*
BC156 1uF
*
BC158 1uF
*
BC160 0.1uF
*
BC161 0.1uF
BC146 10uF
*
BC148
10uF/NC
VCCP
C1206
C1206
*
BC149 10uF/NC
*
BC152 1uF/NC
*
BC155 0.1uF
*
BC157 0.1uF/NC
*
BC159 0.1uF
C1206
*
*
Place these capacitors under 748 solder side.
VDDQ
BC164 0.1uF-BOT
*
VDDQ
BC170 0.1uF-BOT
1D8V_VCCNB
BC172 0.1uF-BOT
BC174 0.1uF-BOT BC176 0.1uF-BOT BC178
VCCP
BC180 0.1uF-BOT
BC182 0.1uF-BOT
BC184 0.1uF-BOT
BC186 0.1uF-BOT
*
*
0.1uF-BOT
*
*
* *
* *
*
2D5V_DDR
BC163 0.1uF-BOT BC165
*
BC166 0.1uF-BOT
*
0.1uF-BOT
*
Title
Document Number R ev
Date: Sheet
748-POWER
748A01
A
of
14 48Sunday, September 05, 2004
TECHNOLOGY COPR.
5
3D3V_SB
R1132 270
+/-1%
D D
R0603
R1134 1K
+/-1%
R0603
12V_SYS
BC778
0.1uF
*
25V, Y5V, +80%/-20%
C0603
411
3
+
2
-
LM324
U26A
1
R1133
R0603 +/-5%
6.3V, +/-20%
CE35D80H200
G
1K
EC79
1000uF
4
3D3V_SYS
DS
*
1000uF
6.3V, +/-20%
CE35D80H200
Q54
SDU3055L2
EC14
*
EC15
1000uF
*
6.3V, +/-20%
CE35D80H200
EC78
1000uF
*
6.3V, +/-20%
EC68
1000uF/NC
*
6.3V, +/-20%
CE35D80H200
CE35D80H200
2D5V_DDR
2.598
3
3D3V_SB
R1135 169
+/-1%
R0603
R1136 205
+/-1%
R0603
2
3D3V_SYS
BC779
0.1uF
*
25V, Y5V, +80%/-20%
C0603
1D8V_VCCSB
*
G
*
DS
Q50
SDU3055L2
BC678
0.1uF
25V, Y5V, +80%/-20%
C0603
U26B
411
5
+
6
7
-
LM324
R522 1K
R0603
EC59
1000uF
6.3V, +/-20%
CE35D80H200
1
C C
3D3V_SB
R1137 340
+/-1%
R0603
R1138 301
+/-1%
R0603
B B
2D5V_DDR
U6
1
12
BC191
1uF/NC
A A
*
12
12
BC193
0.1uF/NC
25V, Y5V, +80%/-20%
C0603
R109 1K
R110
1K
VIN
3
REFEN
RT9173
5
1D5V_AGP POWER FOR NB/AGP
U26C
411
10
+
VCNTL VCNTL VCNTL VCNTL
VOUT
GND
9
8
-
LM324
3D3V_SYS
8 7 6 5
4
EC17
2
470uF
*
6.3V, +/-20%
CE25D60H110
R526
1K
R0603
+/-5%
G
*
*
3D3V_SYS
*
DS
Q51
SDU3055L2
VDDQ
BC679
0.1uF
*
EC18
470uF/NC
6.3V, +/-20%
CE25D60H110
*
BC190
0.1uF
25V, Y5V, +80%/-20%
C0603
4
EC60
1000uF/NC
6.3V, +/-20%
CE35D80H200
EC61
1000uF
6.3V, +/-20%
CE35D80H200
DDR_VTT
BC192
0.1uF
*
25V, Y5V, +80%/-20%
C0603
3D3V_SB
R1139 150
+/-1%
R0603
12 13
R1141 205
+/-1%
R0603
3
U26D
411
+
14
-
LM324
2
G
R1140 1K
R0603
Title
Document Number Re v
Date: Sheet
1.8V--SB
3D3V_SYS
DS
Q55
SDU3055L2
BC780
0.1uF
*
25V, Y5V, +80%/-20%
C0603
1.9V--NB
EC58
1000uF
*
6.3V, +/-20%
CE35D80H200
1D8V_VCCNB
EC80
1000uF
*
6.3V, +/-20%
CE35D80H200
2.5V_DDR & 1.25_VTT
TECHNOLOGY COPR.
15 48Sunday, September 05, 2004
1
A
of
5
4
3
2
1
SB1.8V
D D
C C
3D3V_SB 1D8V_SB
3
1
2
U7
Vin
AME1117
ADJ
4
Vout 4
BC194
10uF
*
10V, Y5V, +80%/-20%
C1206
Vref=1.25V
+
Vref
-
R111 750
+/-1%
R0603
R113 330
+/-1%
R0603
EC21
470uF
*
6.3V, +/-20%
CE25D60H110
BC195
0.1uF
*
25V, Y5V, +80%/-20%
C0603
5V_SB 3D3V_SB
5V_SB 3D3V_SB
B B
EC19
22uF
*
50V, +/-20%
CE20D50H110
A A
*
BC196
10uF/NC
C1206
U36 AIC1086CE/NC
3
VIN
3
1
2
U8
Vin
AME1117
ADJ
Vout 4
4
VOUT
ADJ
1
ADJ
SB3.3V
Vref=1.25V
+
Vref
-
ADJ
2
R112 196
+/-1%
R0603
R114 330
+/-1%
R0603
EC20
470uF
*
6.3V, +/-20%
CE25D60H110
BC197
0.1uF/NC
*
25V, Y5V, +80%/-20%
C0603
TECHNOLOGY COPR.
Title
Document Number Re v
5
4
3
2
Date: Sheet
SB1.8V & SB3V & 5V_DUAL
1
A
of
16 48Sunday, September 05, 2004
5
3D3V_SYS
D D
J9
3
3
2
2
1
1
HEADER_1X3
C C
2-3
1-2
R1165 1K
+/-5%
R0603
PRI_DNJ
B
E C
ENABLE CNR AUDIO
ENABLE PRIMARY AUDIO
R1167 10K
+/-5%
R0603
Q56 MMBT3904
4
ATTACH R1166 FOR NO CNR SKU
R1166
0/NC
D22
21
1N4148W
AC_RESETJ
CODEC_RSTJ 38
3
5V_SB-12V_SYS3D3V_SYS
SMB_CLK_MAIN19,20,21,22,26
SYNC26,38
SDATO26,38
BIT_CLK26,38
R1170 10K
PRI_DNJ
B10 B11 B12 B13 B14 B15 B16 B17 B18 B19
B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30
CNR1
B1
RESERVED
B2
RESERVED
B3
RESERVED
B4
GND
B5
RESERVED
B6
RESERVED
B7
GND
B8
LAN_TXD1
B9
LAN_RSTSYNC GND LAN_RXD2 LAN_RXD0 GND RESERVED +5VDUAL USB_OC# GND
-12V +3.3VD
GND EE_DOUT EE_SHCLK GND SMB_A0 SMB_SCL PRIMARY_DN# GND AC97_SYNC AC97_SD_OUT AC97_BITCLK
CNR
5V_SYS
2
RESERVED RESERVED
GND RESERVED RESERVED
GND
LAN_TXD2 LAN_TXD0
GND
LAN_CLK
LAN_RXD1
RESERVED
USB+
GND
USB-
+12V
GND
+3.3VDUAL
+5VD
GND
EE_DIN
EE_CS SMB_A1 SMB_A2
SMB_SDA
AC97_RESET#
AC97_SD_IN2 AC97_SD_IN1 AC97_SD_IN0
GND
A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19
A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30
R1171
10K/NC
SMA1 SMA2SMA0
R1172 10K
1
5V_SYS12V_SYS 3D3V_SB
SMB_DATA_MAIN 19,20,21,22,26
AC_RESETJ 26
SDATI2 26 SDATI1 26 SDATI0 26,38
R1173
10K/NC
R1175
R1176
10K
R1174 10K
B B
R1177
10K/NC
A A
10K
SMA0 SMA1 SMA2
TECHNOLOGY COPR.
Title
Document Number Re v
5
4
3
2
Date: Sheet
EMPTY
A
of
17 48Sunday, September 05, 2004
1
8
DCCBBAA
7
6
5
4
3
2
1
D
GPIO4 26 GPIO3 26 GPIO1 26 GPIO0 26
GPIO7 26
OC4-( SB debug mode)
SYNC( PCICLK PLL)
0
enable R409 un-stuffdisable
ROM yes
enable
enable
PCI AD R410 un-stuffSDATO( Trap mode)
disable
disable
Default1
R411 un-stuff
NONE
internal pull-low
(30~50K Ohm)
yesSPKR( LPC addr mapping)
NO
yes
*
135
642
R1157 0/NC
+/-5%
R0603
7 8
DS
Q22
G
2N7002
DS
Q23
G
2N7002
DS
Q24
G
2N7002
DS
Q25
G
2N7002
3D3V_SB
FID2
R152 10K
+/-5%
R0603
6
FID[0..3]
FID0
FID1
FID3
2D5V_DDR
642
*
135
FID[0..3] 7
RN71
680
8P4R0603
+/-5%
7 8
max 2.625v
NB Hardware Trap has internal pull-low in SiS748 chip FOR TRAP[0..3].
(FID3)
11.0
11.5
12.0
12.5
5.0
5.5 1
6.0
6.5
7.0
7.5
8.5
9.0
9.5
10.0
10.5
(FID2)
0 0 0 0 0 0 0 0 1 1
1 1
1
(FID1)
0 0 0 1
1 1 0 0 0 0 1 1 1 1
(FID0)
0 0 1 1 0 0 1 1 0 0 11 1 0 0 11 1
00 1 0 1 0 1 0 1 0 1
08.0 11 0 1 0 1
TECHNOLOGY COPR.
Title
Document Number Re v
5
4
3
Date: Sheet
Hardware Trap
2
A
of
18 48Sunday, September 05, 2004
1
RN76
3D3V_SYS
135
TRAP0
TRAP013
TRAP1
TRAP113
TRAP2
TRAP213
TRAP3
TRAP313
RN72
1
*
3 5 7 8
1K
+/-5%
8P4R0603
2 4 6
8
0/NC
642
RN70
10K
8P4R0603
+/-5%
*
7 8
7
8
DCCBBAA
2D5V_DDR
21
FB6
D
FB L0805 60 Ohm
CLK_2.5V
BC686
10uF
*
16V, X5R, +/-10%
C1206
BC225
0.1uF
*
C0603
3D3V_SYS
21
CLK_3V
BC230
0.1uF
*
C0603
7
FB5 FB L0805 60 Ohm
BC215
0.1uF
*
C0603
*
BC231
0.1uF
*
C0603
*
BC220
0.1uF
C0603
3D3V_SYS
FB L0805 60 Ohm
BC216
0.1uF
C0603
FB7
2 1
BC221
0.1uF
*
C0603
6
BC217
0.1uF
*
C0603
*
CLK_2.5V
R53 SATA FOR SRC
BC245
0.1uF
*
C0603
BC222
0.1uF
C0603
*
5
Main Clock Generator
U11
ICS952703
1
VDDREF
11
VDDZ
13
R180 475
+/-1%
R0603
BC246
1nF
25V, NPO, +/-5%
C0603
19 28 29
5
8 18 24 25 32
44 48 39
45 41
34
36
35
VDDPCI VDDPCI_1 AVDD48 VDDAGP
GNDREF GNDZ GNDPCI GNDPCI_1 GND48 GNDAGP
VDDSRC VDDAPIC GNDCPU
GNDAPIC GNDSRC
IREF
VDDA
GNDA
*(CPU_STOP#)PCICLK4
12_48MHz/SEL12_48#MHz*
24_48MHz/SEL24_48#MHz**~
SRCCLKT SRCCLKC
CPUCLK_0T CPUCLK_0C CPUCLK_1T
IOAPIC1 IOAPIC0
AGPCLK0 AGPCLK1
ZCLK0 ZCLK1
*FS2/PCICLK_F0 *FS3/PCICLK_F1
PCICLK0 PCICLK1
*(PCI_STOP#)PCICLK3
PCICLK2
*(PD#)PCICLK5
**FS0/REF0 **FS1/REF1
**Mode/REF2
SDATA
SCLK
4
SATA FOR SRC
43 42
38 37 40
47 46
31 30
9 10
FS2
14
FS3
15 16 17 20 21 22 23
FS0
2
FS1
3 4
27 26
12 33
R186 10K
+/-5%
R0603
DUMMY
Damping Resistors Place near to the Clock Outputs
R161 22 R162 22
R163 10 R164 10 R165 0
R166 10 R167 10
R168 22 R169 22
R170 22 R171 22
RN64
7 8 5 3
*
1
33 8P4R0603
+/-5%
R181 33 R182 33 R183 33/NC
R187 22 R185 22
Frequency Selection
R188 10K
+/-5%
R0603
DUMMY
6 4 2
3
CPUCLK0 CPUCLK-0 748CCLK
PICCLK0 PICCLK1
AGPCLK0 AGPCLK1
ZCLK0 ZCLK1
OSCI VOSCI REFCLK2
USB12M SIO48M
7 8 5
33
3
*
1
RN65
SMB_CLK_MAIN SMB_DATA_MAIN
R1164
10K
+/-5%
R0603
DUMMY
2
CK_133M_CPU 6 CK_133M_CPUJ 6 CK_133M_S748 11
PICCLK0 7 PICCLK1 26
CK_66M_S748 11
ZCLK0 13 ZCLK1 25
CK_33M_SIO 40 CK_33M_1394 32
CK_33M_PCI5 31
CK_33M_PCI2 29
6 4 2
CK_14M_S964 26 CK_14M_AUDIO 38
CK_48M_SIO 40
SMB_CLK_MAIN 17,20,21,22,26 SMB_DATA_MAIN 17,20,21,22,26
REFCLK2
CPU
SB
NB&SB
3D3V_SYS
BC684 10pFC0603 DUMMY
*
R1161
49.9
+/-1%
R0603
CK_33M_PCI1 29 CK_33M_PCI3 30 CK_33M_PCI4 30 CK_33M_S964 25
*
BC860
10pF
C0603
DUMMY
1
CK_100M_SATA 27 CK_100M_SATAJ 27
R1162
49.9
+/-1%
R0603
CK_66M_AGP 24
*
BC856
10pF
C0603
DUMMY
CK_12M_USB 27
X1
BC247
33pF
C0603
5
6
1 2
XTAL-14.318MHz
*
3D3V_SYS
R190 10K
+/-5%
R0603
J8
Header_1X2
R193 10K
+/-5%
R0603
FS3FSB0
FS2
3D3V_SYS
FSB1
R191 10K
1 2
R197 10K
7
FSB07,26
SB--GPIO
FSB16,26
SB--GPIO
8
FS1
6
*
3D3V_SYS
FS0
BC861
22pF
50V, NPO, +/-5%
C0603
R189 10K
+/-5%
R0603
R192 10K
+/-5%
R0603
DUMMY
50V,NPO,+/-5%
X2
7
FSB_Sense[1] FSB_Sense[0] Bus Frequency 1 0 RESERVED
X1
BC248
33pF
*
50V,NPO,+/-5%
C0603
1 1 133 MHz 0 1 166 MHz 0 0 200 MHz
FS3 FS2 FS1 FS0 CPU SRC ZCLK AGP PCI
0 0 0 1 200.01 100.00 133.34 66.67 33.33 1 0 0 1 166.65 100.00 133.32 66.66 33.33 1 1 0 1 133.34 100.00 133.34 66.67 33.33
0 1 0 1
4
100.00 100.00 133.34 66.67 33.33
Title
Document Number Re v
Date: Sheet
3
CLK 952703
2
TECHNOLOGY COPR.
of
19 48Sunday, September 05, 2004
1
A
8
DCCBBAA
7
6
5
4
3
2
1
Clock Buffer ( FOR 3 DDR SDRAM DIMMS )
1. Cypress CY28351C
D
CBVDD
CBVDD
2D5V_DDR
21
FB50 FB L0805 60 Ohm
BC754
0.1uF
*
C0603
SMB_CLK_MAIN17,19,21,22,26 SMB_DATA_MAIN17,19,21,22,26
SDCLKO_DDR12
SMB_CLK_MAIN SMB_DATA_MAIN
SDCLKO_DDR
BC755
10nF
*
25V, Y5V, +80%/-20%
C0603
FB_OUT
2. ICS 93735
3. Hitachi CDCV851
4. Phaselink 102-08
5. Realtek RTM 680-648
U34 ICS 93705
15
VDDI2C
4
VDD
11
VDD
21
VDD
28
VDD
34
VDD
38
VDD
45
VDD
16
AVDD
17
AGND
12
SCLK
37
SDATA
13
CLK_IN
14
CLK_IN#
35
FB_IN
36
FB_IN#
FB_OUT#
GND1GND7GND8GND18GND24GND25GND31GND41GND42GND
CLK0 CLK1 CLK2 CLK3 CLK4 CLK5 CLK6 CLK7 CLK8 CLK9
CLK#0 CLK#1 CLK#2 CLK#3 CLK#4 CLK#5 CLK#6 CLK#7 CLK#8 CLK#9
FB_OUT
48
3 5 10 20 22 46 44 39 29 27
2 6 9 19 23 47 43 40 30 26
BFB_OUT FB_OUT
33 32
DDRCLK[0..8]
DDRCLK3 DDRCLK6 DDRCLK2 DDRCLK5 DDRCLK8 DDRCLK0 DDRCLK4 DDRCLK1 DDRCLK7
DDRCLKJ3 DDRCLKJ6 DDRCLKJ2 DDRCLKJ5 DDRCLKJ8 DDRCLKJ0 DDRCLKJ4 DDRCLKJ1 DDRCLKJ7
R1131 22
DDRCLKJ[0..8]
DDRCLK[0..8] 21,22
DDRCLKJ[0..8] 21,22
By-Pass Capacitors Place near to the Clock Buffer
DDRCLK8 DDRCLK5 DDRCLK2 DDRCLK6 DDRCLK3 DDRCLK0 DDRCLK7 DDRCLK4 DDRCLK1
DDRCLKJ8 DDRCLKJ5 DDRCLKJ2 DDRCLKJ6 DDRCLKJ3 DDRCLKJ0 DDRCLKJ7 DDRCLKJ4 DDRCLKJ1
BC751 10pFC0603 DUMMY
*
BC753 10pFC0603 DUMMY
*
BC757 10pFC0603 DUMMY
*
BC759 10pFC0603 DUMMY
*
BC761 10pFC0603 DUMMY
*
BC762 10pFC0603 DUMMY
*
BC764
*
BC766 10pFC0603 DUMMY
*
BC768 10pFC0603 DUMMY
*
BC770 10pFC0603 DUMMY
*
BC752 10pFC0603 DUMMY
*
BC756 10pFC0603 DUMMY
*
BC758 10pFC0603 DUMMY
*
BC760 10pFC0603 DUMMY
*
10pF
BC763 10pFC0603 DUMMY
*
C0603 DUMMY
BC765 10pFC0603 DUMMY
*
BC767 10pFC0603 DUMMY
*
BC769 10pFC0603 DUMMY
*
2D5V_DDR
BC775
10nF
*
C0603
FB51
2 1
FB L0805 60 Ohm
BC772
10nF
*
25V, Y5V, +80%/-20%
C0603
BC776
0.1uF
*
C0603
FB_OUT
CBVDD
BC774
0.1uF
*
C0603
BC777
0.1uF
*
C0603
BC771 27pFC0603
*
TECHNOLOGY COPR.
Title
Document Number Re v
8
7
6
5
4
3
Date: Sheet
Clock Buffer
2
A
of
20 48Sunday, September 05, 2004
1
8
A
2D5V_DDR
D D
MAA[0..14]12,22,23
2D5V_DDR
CSAJ012,23 CSAJ112,23
DQS[0..7]12,22,23
DQM[0..7]12 , 22,23
R225 8.2K
CSAJ0 CSAJ1
RASAJ CASAJ MWAJ
C C
B B
CKE0
CKE012
CKE1
CKE112
DDRCLK120 DDRCLKJ120
DDRCLK020 DDRCLKJ020
DDRCLK220 DDRCLKJ220
SMB_CLK_MAIN17,19,20,22,26 SMB_DATA_MAIN17,19,20,22,26
DDRCLK1 DDRCLKJ1
DDRCLK0 DDRCLKJ0
DDRCLK2 DDRCLKJ2
SMB_CLK_MAIN SMB_DATA_MAIN
WP
MAA0 MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA8 MAA9 MAA10 MAA13 MAA14
MAA11 MAA12
DQM0 DQM1 DQM2 DQM3 DQM4 DQM5 DQM6 DQM7
DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7
7
108
120
148
VDD7VDD38VDD46VDD70VDD85VDD
VDD
15
VDDQ
22
VDDQ
30
VDDQ
54
VDDQ
62
VDDQ
77
VDDQ
96
VDDQ
104
VDDQ
112
VDDQ
128
VDDQ
136
VDDQ
143
VDDQ
156
VDDQ
164
VDDQ
172
VDDQ
180
VDDQ
48
A0
43
A1
41
A2
130
A3
37
A4
32
A5
125
A6
29
A7
122
A8
27
A9
141
A10
118
A11
115
NC/A12
167
NC/A13
59
BA0
52
BA1
113
NC/BA2
97
DQMB0
107
DQMB1
119
DQMB2
129
DQMB3
149
DQMB4
159
DQMB5
169
DQMB6
177
DQMB7
140
DQMB8
157
CS0
158
CS1
71
NC/CS2
163
NC/CS3
154
RAS
65
CAS
63
WE
5
DQS0
14
DQS1
25
DQS2
36
DQS3
56
DQS4
67
DQS5
78
DQS6
86
DQS7
47
DQS8
21
CKE0
111
CKE1
16
CK0/(NC)
17
CK0/(NC)
137
CK1(CK0)
138
CK1(CK0)
76
CK2/(NC)
75
CK2/(NC)
VDDQ=
181
SA0
182
SA1
183
SA2
92
SCL
91
SDA
90
WP
VSS3VSS11VSS18VSS26VSS34VSS42VSS50VSS58VSS66VSS74VSS81VSS89VSS93VSS
VDD
VDD VDDQ VDDID
3.3V 3.3V OPEN
3.3V 2.5V VSS
2.5V 2.5V OPEN
2.5V 1.8V VSS
1.8V 1.8V OPEN
VOLTAGE KEY
2.5V 1.8 V 3.3 V
FRONT VIEW
6
DDRVREF
DIMM1
1
184
168
82
DDR_DIMM
VDD
VDDID
VREF/NC
VDDSPD/VCC3
DQ10 DQ11 DQ12 DQ13 DQ14 DQ15
DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23
DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31
DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39
DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47
DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55
DQ56 DQ57 DQ58 DQ59
PIN 1 PIN 52 PIN 53 PIN 92
DQ60
PIN 93 PIN 144 PIN 145 PIN 184
DQ61
BACK
DQ62
FRONT
DQ63
NC/ (RESET)
NC/ (FETEN)
VSS
VSS
VSS
VSS
VSS
VSS
VSS
100
116
124
132
139
145
152
160
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7
DQ8 DQ9
CB0 CB1 CB2 CB3 CB4 CB5 CB6 CB7
DDRVREF 22
MD0
2
MD1
4
MD2
6
MD3
8
MD4
94
MD5
95
MD6
98
MD7
99
MD8
12
MD9
13
MD10
19
MD11
20
MD12
105
MD13
106
MD14
109
MD15
110
MD16
23
MD17
24
MD18
28
MD19
31
MD20
114
MD21
117
MD22
121
MD23
123
MD24
33
MD25
35
MD26
39
MD27
40
MD28
126
MD29
127
MD30
131
MD31
133
MD32
53
MD33
55
MD34
57
MD35
60
MD36
146
MD37
147
MD38
150
MD39
151
MD40
61
MD41
64
MD42
68
MD43
69
MD44
153
MD45
155
MD46
161
MD47
162
MD48
72
MD49
73
MD50
79
MD51
80
MD52
165
MD53
166
MD54
170
MD55
171
MD56
83
MD57
84
MD58
87
MD59
88
MD60
174
MD61
175
MD62
178
MD63
179
44 45 49 51 134 135 142 144
9
NC
10 101
NC
102
NC
103 173
NC
VSS
176
5
MD[0..63] 12,22,23
2D5V_DDR
2D5V_DDR
CSAJ212,23 CSAJ312,23
RASAJ12,22,23 CASAJ12,22,23 MWAJ12,22,23
SMB_CLK_MAIN17,19,20,22,26 SMB_DATA_MAIN17,19,20,22,26
R226 8.2K
CKE212 CKE312
DDRCLK420 DDRCLKJ420
DDRCLK320 DDRCLKJ320
DDRCLK520 DDRCLKJ520
R227 8.2K
WP22
4
2D5V_DDR
CSAJ2 CSAJ3
RASAJ CASAJ MWAJ
MAA0 MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA8 MAA9 MAA10 MAA13 MAA14
MAA11 MAA12
DQM0 DQM1 DQM2 DQM3 DQM4 DQM5 DQM6 DQM7
DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7
CKE2 CKE3
DDRCLK4 DDRCLKJ4
DDRCLK3 DDRCLKJ3
DDRCLK5 DDRCLKJ5
WP
3
DDRVREF
DIMM2
1
108
120
148
VDD7VDD38VDD46VDD70VDD85VDD
VDD
15
VDDQ
22
VDDQ
30
VDDQ
54
VDDQ
62
VDDQ
77
VDDQ
96
VDDQ
104
VDDQ
112
VDDQ
128
VDDQ
136
VDDQ
143
VDDQ
156
VDDQ
164
VDDQ
172
VDDQ
180
VDDQ
48
A0
43
A1
41
A2
130
A3
37
A4
32
A5
125
A6
29
A7
122
A8
27
A9
141
A10
118
A11
115
NC/A12
167
NC/A13
59
BA0
52
BA1
113
NC/BA2
97
DQMB0
107
DQMB1
119
DQMB2
129
DQMB3
149
DQMB4
159
DQMB5
169
DQMB6
177
DQMB7
140
DQMB8
157
CS0
158
CS1
71
NC/CS2
163
NC/CS3
154
RAS
65
CAS
63
WE
5
DQS0
14
DQS1
25
DQS2
36
DQS3
56
DQS4
67
DQS5
78
DQS6
86
DQS7
47
DQS8
21
CKE0
111
CKE1
16
CK0/(NC)
17
CK0/(NC)
137
CK1(CK0)
138
CK1(CK0)
76
CK2/(NC)
75
CK2/(NC)
VDDQ=
181
SA0
182
SA1
183
SA2
92
SCL
91
SDA
90
WP
VSS3VSS11VSS18VSS26VSS34VSS42VSS50VSS58VSS66VSS74VSS81VSS89VSS93VSS
VDD
VDD VDDQ VDDID
3.3V 3.3V OPEN
3.3V 2.5V VSS
2.5V 2.5V OPEN
2.5V 1.8V VSS
1.8V 1.8V OPEN
VOLTAGE KEY
2.5V 1.8 V 3.3V
FRONT VIEW
184
168
82
DDR_DIMM
VDD
VDDID
DQ0 DQ1
VREF/NC
DQ2 DQ3
VDDSPD/VCC3
DQ4 DQ5 DQ6 DQ7
DQ8
DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15
DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23
DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31
DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39
DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47
DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55
DQ56 DQ57 DQ58 DQ59
PIN 1 PIN 52 PIN 53 PIN 92
DQ60
PIN 93 PIN 144 PIN 145 PIN 184
DQ61
BACK
DQ62
FRONT
DQ63
CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
NC
NC/ (RESET)
NC NC
NC/ (FETEN)
NC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
100
116
124
132
139
145
152
160
176
2
MD0
2
MD1
4
MD2
6
MD3
8
MD4
94
MD5
95
MD6
98
MD7
99
MD8
12
MD9
13
MD10
19
MD11
20
MD12
105
MD13
106
MD14
109
MD15
110
MD16
23
MD17
24
MD18
28
MD19
31
MD20
114
MD21
117
MD22
121
MD23
123
MD24
33
MD25
35
MD26
39
MD27
40
MD28
126
MD29
127
MD30
131
MD31
133
MD32
53
MD33
55
MD34
57
MD35
60
MD36
146
MD37
147
MD38
150
MD39
151
MD40
61
MD41
64
MD42
68
MD43
69
MD44
153
MD45
155
MD46
161
MD47
162
MD48
72
MD49
73
MD50
79
MD51
80
MD52
165
MD53
166
MD54
170
MD55
171
MD56
83
MD57
84
MD58
87
MD59
88
MD60
174
MD61
175
MD62
178
MD63
179
44 45 49 51 134 135 142 144
9 10 101 102 103 173
1
A
TECHNOLOGY COPR.
Title
Document Number Re v
Date: Sheet
8
7
6
5
4
3
2
DDR Slot 1 / 2
748A01
A
of
21 48Sunday, September 05, 2004
1
8
DCCBB
A
A
7
6
5
4
3
2
1
OK
2D5V_DDR
108
120
148
168
82
VDD7VDD38VDD46VDD70VDD85VDD
VDDQ=
MAA0 MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA8 MAA9 MAA10 MAA13 MAA14
MAA11 MAA12
DQM0 DQM1 DQM2 DQM3 DQM4 DQM5 DQM6 DQM7
DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7
15
VDDQ
22
VDDQ
30
VDDQ
54
VDDQ
62
VDDQ
77
VDDQ
96
VDDQ
104
VDDQ
112
VDDQ
128
VDDQ
136
VDDQ
143
VDDQ
156
VDDQ
164
VDDQ
172
VDDQ
180
VDDQ
48
A0
43
A1
41
A2
130
A3
37
A4
32
A5
125
A6
29
A7
122
A8
27
A9
141
A10
118
A11
115
NC/A12
167
NC/A13
59
BA0
52
BA1
113
NC/BA2
97
DQMB0
107
DQMB1
119
DQMB2
129
DQMB3
149
DQMB4
159
DQMB5
169
DQMB6
177
DQMB7
140
DQMB8
157
CS0
158
CS1
71
NC/CS2
163
NC/CS3
154
RAS
65
CAS
63
WE
5
DQS0
14
DQS1
25
DQS2
36
DQS3
56
DQS4
67
DQS5
78
DQS6
86
DQS7
47
DQS8
21
CKE0
111
CKE1
16
CK0/(NC)
17
CK0/(NC)
137
CK1(CK0)
138
CK1(CK0)
76
CK2/(NC)
75
CK2/(NC)
181
SA0
182
SA1
183
SA2
92
SCL
91
SDA
90
WP
D
MAA[0..14]12,21,23
DQM[0..7]12,21,23
2D5V_DDR
R1063 8.2K
RASAJ12,21,23 CASAJ12,21,23 MWAJ12,21,23
CKE412 CKE512
DDRCLK720 DDRCLKJ720
DDRCLK620 DDRCLKJ620
DDRCLK820 DDRCLKJ820
R1064 8.2K
SMB_CLK_MAIN SMB_DATA_MAIN
CSAJ4 CSAJ5
RASAJ CASAJ MWAJ
CKE4
CKE5
DDRCLK7
DDRCLKJ7 DDRCLK6
DDRCLKJ6 DDRCLK8
DDRCLKJ8
WP
CSAJ412,23 CSAJ512,23
2D5V_DDR
SMB_CLK_MAIN17,19,20,21,26 SMB_DATA_MAIN17,19,20,21,26
DQS[0..7]12,21,23
WP21
VDD
VDD
VDD
VDD VDDQ VDDID
3.3V 3.3V OPEN
3.3V 2.5V VSS
2.5V 2.5V OPEN
2.5V 1.8V VSS
1.8V 1.8V OPEN
VOLTAGE KEY
2.5V 1.8V 3.3V
FRONT VIEW
VDDID
PIN 1 PIN 52 PIN 53 PIN 92
FRONT
DIMM3
184
1
DDR_DIMM
VREF/NC
VDDSPD/VCC3
DQ10 DQ11 DQ12 DQ13 DQ14 DQ15
DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23
DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31
DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39
DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47
DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55
DQ56 DQ57 DQ58 DQ59 DQ60
PIN 93 PIN 144 PIN 145 PIN 184
DQ61
BACK
DQ62 DQ63
NC/ (RESET)
NC/ (FETEN)
DDRVREF
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7
DQ8 DQ9
CB0 CB1 CB2 CB3 CB4 CB5 CB6 CB7
NC NC
NC NC
2 4 6 8 94 95 98 99
12 13 19 20 105 106 109 110
23 24 28 31 114 117 121 123
33 35 39 40 126 127 131 133
53 55 57 60 146 147 150 151
61 64 68 69 153 155 161 162
72 73 79 80 165 166 170 171
83 84 87 88 174 175 178 179
44 45 49 51 134 135 142 144
9 10 101 102 103 173
DDRVREF 21
MD0 MD1 MD2 MD3 MD4 MD5 MD6 MD7
MD8 MD9 MD10 MD11 MD12 MD13 MD14 MD15
MD16 MD17 MD18 MD19 MD20 MD21 MD22 MD23
MD24 MD25 MD26 MD27 MD28 MD29 MD30 MD31
MD32 MD33 MD34 MD35 MD36 MD37 MD38 MD39
MD40 MD41 MD42 MD43 MD44 MD45 MD46 MD47
MD48 MD49 MD50 MD51 MD52 MD53 MD54 MD55
MD56 MD57 MD58 MD59 MD60 MD61 MD62 MD63
MD[0..63] 12,21,23
2D5V_DDR
R228 75
+/-5%
R0603
DDRVREF
R229 75
+/-5%
R0603
DDRVREF GEN. & DECOUPLING
BC288
10nF
*
C0603
BC292
10nF
*
C0603
close to resistor divider
2D5V_DDR
BC296
*
BC299 0.1u F/NC
*
BC302 0.1u F/NC
*
BC305
*
BC308 0.1u F/NC
*
BC311 0.1uF/NC
*
BC289
10nF
*
C0603
BC293
10nF
*
C0603
close to DIMM1 VREF pin
DIMM DECOUPLING
0.1uF
0.1uF
BC290
10nF
*
C0603
BC294
10nF
*
C0603
close to DIMM2 VREF pin
BC297
0.1uF
*
BC300 0.1 uF/NC
*
0.1uF/NC
BC303
*
BC306 0.1uF
*
BC309 0.1uF/NC
*
BC312 0.1uF/NC
*
BC291
10nF
*
C0603
BC295
10nF
*
C0603
close to DIMM3 VREF pin
BC298 0.1uF
BC301 0.1uF/NC
BC304 0.1uF/NC
BC307 0.1uF
BC310 0.1uF/NC
BC313 0.1uF/NC
DDRVREF 21
*
*
*
*
*
*
VSS3VSS11VSS18VSS26VSS34VSS42VSS50VSS58VSS66VSS74VSS81VSS89VSS93VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
100
116
124
132
139
145
152
160
176
Title
Document Number R ev
Date: Sheet
DDR SLOT3
748A01
TECHNOLOGY COPR.
of
22 48Sunday, September 05, 2004
A
8
DCCBB
A
A
RASAJ12,21,22
MWAJ12,21,22
CASAJ12,21,22
MD[0..63] DQM[0..7] DQS[0..7]
D
Pullup resistance can reswap by layout result.
RN6 33
MD12
2
MD8
4
MD3
6
MD7 MD6
MD2 DQM0 DQS0
RN10 33
MD1
2
MD5
4
MD4
6
MD0 DQM1
DQS1 MD13 MD9
RN14 33
MD11
2
MD10
4
MD15
6
MD14 DQS2
MD21 MD17 MD16
RN17 33
MD22
2 4
MD18
6
DQM2 MD25
MD29 MD28 MD24
DQM3 DQS3 MD19 MD23 MD20
7
RASAJ MWAJ CASAJ
MD[0..63] 12,21,22 DQM[0..7] 12,21,22 DQS[0..7] 12,21,22
1
*
3 5 78
RN8 33
2
*
4 6
1
*
3 5 78
RN12 33
2
*
4 6
1
*
3 5 78
RN15 33
2
*
4 6
1
*
3 5 78
RN19 33
2
*
4 6
R237 33 R238 33 R239 33 R240 33 R241 33
6
5
4
3
2
1
SSTL-2 Termination Resistors
(Note: The termination resistors are only for DDR application)
DDR
MD/DQM(/DQS)RsSSTL-2 MA/Control CS CKE
1 3 5 78
1 3 5 78
1 3 5 78
1 3 5 78
SSTL-2 SSTL-2 LV-CMOS/OD 2.5V
MD27 MD31 MD26 MD30
RN9 33
MD37
2
MD33
4
MD36
6
MD32 MD38
MD34 DQM4 DQS4
RN13 33
MD44
2
MD40
4
MD35
6
MD39
MD45 MD41 MD59 MD63
MD46 MD42 DQM5 DQS5
RN18 33
MD52
2
MD48
4
MD47
6
MD43 DQS6
DQM6 MD53 MD49
RN21 33
MD51
2
MD55
4
MD50
6
MD54
*
*
R233 33 R234 33 R235 33 R236 33
*
*
RN7 33
2 4 6
1 3 5 78
RN11 33
2 4 6
1 3 5 78
RN16 33
2 4 6
1 3 5 78
RN20 33
2 4 6
1 3 5 78
10/0 10/0 10/0
*
*
*
*
Rtt 33/47 22/33 22/33
DDR_VTT
1 3 5 78
1 3 5 78
1 3 5 78
1 3 5 78
OK
DECOUPLING CAPACITOR FOR SSTL-2 END TERMIANTION VTT ISLAND 0603 Package placed within 350mils of VTT Termination R-packs
DDR_VTT
BC314
*
BC318 0.1uF/NC
*
BC322 0.1uF/NC
*
BC326 0.1uF/NC
*
BC330 0.1uF
*
BC334 0.1 uF
*
BC338 0.1uF/NC
*
BC342 0.1u F/NC
0.1uF
BC315
BC319 0.1uF/NC
BC323 0.1uF
BC327 0.1uF/NC
BC331 0.1uF
BC335 0.1uF/NC
BC339 0.1uF
BC343 0.1uF/NC
*
MAA[0..14] CSAJ[0..5]
DUMMY ONE HALF DEPEND ON LAYOUT
BC316 0 . 1uF
0.1uF
*
*
*
*
*
*
*
*
*
BC320 0.1uF/NC
*
BC324 0.1uF/NC
*
BC328 0.1uF
*
BC332 0.1uF
*
BC336 0.1uF
*
BC340 0.1uF/NC
*
BC344 0.1uF/NC
*
MAA[0..14] 12,21,22 CSAJ[0..5] 12,21,22
BC317 0.1 uF
*
BC321 0.1uF
*
BC325 0.1uF
*
BC329 0.1uF
*
BC333 0.1uF
*
BC337 0.1uF
*
BC341 0.1uF
*
BC345 0.1uF/NC
*
Pullup resistance can reswap by layout result.
DDR_VTT DDR_VTT
MD57 MD61 MD56 MD60
RN23 33
MD58
2
MD62
4
DQS7
6
DQM7 CSAJ3
CSAJ5 CSAJ2 CSAJ4
CSAJ0 RASAJ
R257 47
CSAJ1
R259 47
RN22 33
RN24 47
1
*
3 5 78
1
*
3 5 78
2 4 6
1
*
3 5 78
2 4 6
MAA14 MAA13 MAA9 MAA7 MAA8 MAA5 MAA6 MAA4 MAA3 MAA2 MAA1 MAA0 MAA10 MAA12 MAA11
MWAJ CASAJ
R242 33 R243 33 R244 33 R245 33 R246 33 R247 33 R248 33 R249 33 R250 33 R251 33 R252 33 R253 33 R254 33 R255 33 R256 33 R258 33 R260 33 R261 33
TECHNOLOGY COPR.
Title
Document Number R ev
Date: Sheet
DDR Termination Res
748A01
A
of
23 48Sunday, September 05, 2004
8
DCCBBAA
SBAJ[0..7]11
ST[0..2]11
AC-BE[0..3]11
AAD[0..31]11
ADSTBF[0..1]11
ADSTBS[0..1]11
SBAJ[0..7] ST[0..2] AC-BE[0..3]
AAD[0..31] ADSTBF[0..1] ADSTBS[0..1]
7
3D3V_SB
VDDQ
3D3V_SYS
5V_SYS
6
OK
5
12V_SYS
VDDQ
3D3V_SYS
4
3
NOTE: This AGP slot support both AGP3.0 display card and SiS301 video bridge card.
2
GCDET- on card
GND
OPEN
1
GCDET- AVREFCG APERR
0V
1.47V
0.35V
0.75V0V1.5V
D
AGP1
B1
OVRCNT#
B2
+5V
B3
+5V
B4
USB+
B5
GND
B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 B33 B34 B35 B36 B37 B38 B39 B40 B41
B46 B47 B48 B49 B50 B51 B52 B53 B54 B55 B56 B57 B58 B59 B60 B61 B62 B63 B64 B65 B66
B6 B7 B8 B9
INTB# CLK REQ# VCC3.3 ST0 ST2 RBF# GND RESERVEDB14 SBA0 VCC3.3 SBA2 SB_STB GND SBA4 SBA6 DBI_LO GND VCC3_AUX VCC3.3 AD31 AD29 VCC3.3 AD27 AD25 GND AD_STB1 AD23 VDDQ AD21 AD19 GND AD17 C/BE#2 VDDQ IRDY#
DEVEL# VDDQ PERR# GND SERR# C/BE1# VDDQ AD14 AD12 GND AD10 AD8 VDDQ AD_STB0 AD7 GND AD5 AD3 VDDQ AD1 VREF_CG
AGP_SLOT
INTJB25,29,30,31
CK_66M_AGP19
AREQ11
RBF11
DBI_LOW11
SBSTBF11
AIRDY11
ADEVSEL11
ASERR11
CK_66M_AGP
AREQ
ST2 RBF
SBAJ0 SBAJ2
SBSTBF
AAD29 AAD27
AAD25
AAD23
AAD19 AAD17
AC-BE2
APERR
AC-BE1 AAD14
AAD12 AAD10
AAD8 ADSTBF0
AAD5 AAD3
AVREFCG
TYPEDET#
GC_AGP8X_DET
MB_AGP8X_DET
RESERVEDA24
AD_STB1#
AD_STB0#
11223
3
AGP CONNECTOR DECOUPLING close to
put CAP close to AGP slot each POWER PIN
+12V
USB­GND
INTA#
RST#
GNT#
VCC3.3
ST1
PIPE#
GND
WBF#
SBA1
VCC3.3
SBA3
SB_STB#
GND SBA5 SBA7
DBI_HI
GND
VCC3.3
AD30 AD28
VCC3.3
AD26 AD24
GND
C/BE3#
VDDQ
AD22 AD20
GND AD18 AD16
VDDQ
FRAME#
TRDY# STOP#
PME#
GND
PAR
AD15
VDDQ
AD13 AD11
GND
AD9
C/BE0#
VDDQ
AD6
GND
AD4 AD2
VDDQ
AD0
VREF_GC
A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 A41
A46 A47 A48 A49 A50 A51 A52 A53 A54 A55 A56 A57 A58 A59 A60 A61 A62 A63 A64 A65 A66
GCDETJ
INTJAINTJB PCIRSTJ0 AGNT
ST1ST0 DBI_HI WBF
SBAJ1
SBAJ3 SBSTBS
SBAJ5SBAJ4 SBAJ7SBAJ6
AAD30AAD31 AAD28
AAD26 AAD24
ADSTBS1ADSTBF1 AC-BE3
AAD22AAD21 AAD20
AAD18 AAD16
AFRAMEAIRDY
ATRDY ASTOP PMEJ
APAR AAD15
AAD13 AAD11
AAD9 AC-BE0
ADSTBS0 AAD6AAD7
AAD4 AAD2
AAD0AAD1
GCDETJ 11
INTJA 25,29,30,31 PCIRSTJ0 25,29,30,31,40 AGNT 11
DBI_HI 11 WBF 11
SBSTBS 11
AFRAME 11
ATRDY 11 ASTOP 11 PMEJ 26,29,30,31,40
APAR 11
AVREFGC 11
BC363
0.1uF
*
C0603
748
GCDETJ
R263 10K
+/-5%
R0603
R267
close to AGP SLOT
5V_SYS3D3V_SYS VDDQ
R264 10K
+/-5%
R0603
4.3K
B
Q27 MMBT3904
E C
G
R265 54.9
DS
Q26
2N7002
VDDQ
R268
8.2K
+/-5%
R0603
DS
G
R269 1K
+/-5%
R0603
Q28
2N7002
R262 124
R0603
+/-1%
R266 124
R0603
+/-1%
APERR
AVREFCG
*
BC362
10nF
C0603
VDDQ
*
C0603
C0603
BC365
BC364
10nF
10nF
*
BC366
10nF
*
C0603
*
BC367
10nF/NC
C0603
8
*
BC368
10nF/NC
C0603
7
*
BC369
10nF/NC
C0603
BC370
10nF
*
C0603
BC371
10nF
*
C0603
6
3D3V_SYS
12V_SYS 5V _SYS
BC376
10nF
*
C0603
*
BC377
10nF
C0603
3
Title
Document Number Re v
Date: Sheet
2
AGP
of
24 48Sunday, September 05, 2004
1
TECHNOLOGY COPR.
A
BC372
10nF
*
C0603
*
BC373
10nF/NC
C0603
*
BC374
10nF/NC
C0603
5
*
BC375
10nF/NC
C0603
4
8
A
D D
3D3V_SYS
R271
4.7K
+/-5%
R0603
DUMMY
PCIRSTJ
C C
C/BEJ[0..3]29,30,31,32
1D8V_VCCSB
R275 150
+/-1%
R0603
R276
49.9
+/-1%
R0603
BC380
0.1uF
*
C0603
SZVREF
BC381
0.1uF
*
C0603
B B
AD[0..31]29,30,31,32
Analog Power supplies of Transzip function for 96X Chip.
1D8V_VCCSB 1D8V_VCCSB
8
7
PREQJ431 PREQJ330 PREQJ230 PREQJ129 PREQJ029
PGNTJ431 PGNTJ330 PGNTJ230 PGNTJ129 PGNTJ029
INTJA24,29,30,31
INTJB24,29,30,31 INTJC29,30,31 INTJD29,30,31,32
FRAMEJ29,30,31,32
IRDYJ29,30,31,32
TRDYJ29,30,31,32
STOPJ29,30,31,32
SERRJ2 9,30,31,32
PAR29,30,31,32
DEVSELJ29,30,31,32
PLOCKJ2 9,30,31
CK_33M_S96419
PCIRSTJ024,29,30,31,40 PCIRSTJ132 PCIRSTJ213,37
ZCLK119
ZSTB013
ZSTBJ013
ZSTB113
ZSTBJ113 ZUREQ13 ZDREQ13
BC387
BC386
10nF
0.1uF
*
*
C0603
C0603
PREQJ4 PREQJ3 PREQJ2 PREQJ1 PREQJ0
PGNTJ4 PGNTJ3 PGNTJ2 PGNTJ1 PGNTJ0
INTJA INTJB
INTJC INTJD
FRAMEJ IRDYJ TRDYJ STOPJ
SERRJ PAR DEVSELJ PLOCKJ
CK_33M_S964 IDESAB2
R272 33 R273 33
R274 33
C/BEJ3 C/BEJ2 C/BEJ1 C/BEJ0
AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31
ZCLK1
SZCMP_N SZCMP_P SZ1XAVDD SZ1XAVSS SZ4XAVDD SZ4XAVSS SZVREF
SZ1XAVDD
SZ1XAVSS
7
6
PCIRSTJ
6
5
F1
PREQ4#
F2
PREQ3#
F3
PREQ2#
F4
PREQ1#
E1
PREQ0#
H4
PGNT4#
G1
PGNT3#
G2
PGNT2#
G3
PGNT1#
G4
PGNT0#
F5
INTA#
E4
INTB#
E3
INTC#
E2
INTD#
M1
FRAME#
N4
IRDY#
N3
TRDY#
P4
STOP#
P3
SERR#
P2
PAR
N2
DEVSEL#
N1
PLOCK#
W3
PCICLK
B3
PCIRST#
K3
C/BE3#
M2
C/BE2#
P1
C/BE1#
U4
C/BE0#
W4
AD0
V1
AD1
V2
AD2
V3
AD3
V4
AD4
U1
AD5
U2
AD6
U3
AD7
T1
AD8
T2
AD9
T3
AD10
T4
AD11
R1
AD12
R2
AD13
R3
AD14
R4
AD15
M3
AD16
M4
AD17
L1
AD18
L2
AD19
L3
AD20
L4
AD21
K1
AD22
K2
AD23
K4
AD24
J1
AD25
J2
AD26
J3
AD27
J4
AD28
H1
AD29
H2
AD30
H3
AD31
ZCLK
ZSTB0
ZSTB0#
ZSTB1
V24
R25
W26
AB26
BC389
0.1uF
*
C0603
*
P C I
M U T I O L
ZSTB1#
ZUREQ
ZDREQ
ZCMP_N
ZCMP_P
Z1XAVDD
Z1XAVSS
Z4XAVDD
Z4XAVSS
ZVREF
ZAD0
ZAD1
T26
Y24
Y23
Y22
W24
AA26
ZAD0
W25
ZAD1
BC390
10nF
C0603
AA24
AA25
AC26
SZ4XAVDD
AB25
AA23
ZAD2
ZAD3
ZAD4
ZAD5
V22
V23
V26
U22
ZAD5
ZAD6
ZAD2
ZAD3
ZAD4
1D8V_VCCSB
U25
ZAD6
ZAD7
ZAD7
U24
ZAD8
5
OK
ZAD8
T22
ZAD9
ZAD9
U26
ZAD10
T23
ZAD10
ZAD11
R22
ZAD11
ZAD12
T24
ZAD12
ZAD13
R24
ZAD13
*
4
IDEAVDD
IDEAVSS
ICHRDYA
IDREQA
IIRQA
CBLIDA
IIORA#
IIOWA#
IDACKA#
ICHRDYB
IDREQB
IIRQB
CBLIDB
IIORB#
IIOWB#
IDACKB#
IDSAA2 IDSAA1 IDSAA0
IDECSA1# IDECSA0#
I D E
IDSAB2 IDSAB1 IDSAB0
IDECSB1# IDECSB0#
IDA0 IDA1 IDA2 IDA3 IDA4 IDA5 IDA6 IDA7 IDA8
IDA9 IDA10 IDA11 IDA12 IDA13 IDA14 IDA15
IDB0
IDB1
IDB2
IDB3
IDB4
IDB5
IDB6
IDB7
IDB8
IDB9 IDB10 IDB11 IDB12 IDB13 IDB14 IDB15
ZAD16
ZAD14
ZAD15
Y26
P22
R26
ZAD14
ZAD15
ZAD16
BC383
0.1uF
*
C0603
4
U14A
W1 W2
AE15 AD14 AC15 AE16
AF15 AC14 AD15
AE22 AD21 AC22 AE23
AF22 AC21 AD22
AC16 AF16 AD16
AE17 AF17
AF24 AF23 AD23
AF25 AE24
AF14 AD13 AF13 AD12 AF12 AD11 AF11 AF10 AE10 AE11 AC11 AE12 AC12 AE13 AC13 AE14
AF21 AD20 AF20 AD19 AF19 AD18 AF18 AD17 AC17 AE18 AC18 AE19 AC19 AE20 AC20 AE21
SiS964
R278 56
BC384
10nF
C0603
R281 56
3
ICHRDYA IDEREQA IDEIRQA CBLIDA
IDEIORJA IDEIOWJA IDACKJA
ICHRDYB IDEREQB IDEIRQB CBLIDB
IDEIORJB IDEIOWJB IDACKJB
IDESAA2 IDESAA1 IDESAA0
IDECSJA1 IDECSJA0
IDESAB1 IDESAB0
IDECSJB1 IDECSJB0
IDEDA0 IDEDA1 IDEDA2 IDEDA3 IDEDA4 IDEDA5 IDEDA6 IDEDA7 IDEDA8 IDEDA9 IDEDA10 IDEDA11 IDEDA12 IDEDA13 IDEDA14 IDEDA15
IDEDB0 IDEDB1 IDEDB2 IDEDB3 IDEDB4 IDEDB5 IDEDB6 IDEDB7 IDEDB8 IDEDB9 IDEDB10 IDEDB11 IDEDB12 IDEDB13 IDEDB14 IDEDB15
ZAD[0..16]
3
*
ICHRDYA 37 IDEREQA 37 IDEIRQA 37 CBLIDA 37
IDEIORJA 37 IDEIOWJA 37 IDACKJA 37
ICHRDYB 37 IDEREQB 37 IDEIRQB 37 CBLIDB 37
IDEIORJB 37 IDEIOWJB 37 IDACKJB 37
INTJB INTJA INTJC INTJD
SZCMP_N
SZCMP_PSZ4XAVSS
BC378
BC379
10nF
0.1uF
*
C0603
C0603
RN25
2
*
4 6
8.2K
+/-5%
8P4R0603
ZAD[0..16] 13
1D8V_VCCSB
IDESAA[0..2] 37
IDECSJA[0..1] 37
IDESAB[0..2] 37
IDECSJB[0..1] 37
IDEDA[0..15] 37
IDEDB[0..15] 37
3D3V_SYS
1 3 5 78
2
1
TECHNOLOGY COPR.
Title
Document Number Rev
Date: Sheet
PCI IDE MUTIOL
2
748A01
of
25 48Sunday, September 05, 2004
1
A
A
D D
A
C C
B B
CPUSLPJ
8
VCCP
R284 4.7K/NC
R1159 4.7K
8
A20MJ7
IGNNEJ7
FERRJ7
STPCLKJ7
PICCLK119
PICD07 PICD17
LAD[0..3]40
LFRAMEJ40
LDRQJ40
SIRQ40
SDATI017,38 SDATI117
SDATO17,38
SYNC17,38
AC_RESETJ17
BIT_CLK17,38
PWRGD_SB46
CK_14M_S96419
SPKR38,45
PWRBTNJ45
PSONJ46
S1LED_GREEN45
AUXOK13,45
KBDAT41 KBCLK41 PMDAT41 PMCLK41
SiS963, 964 GPIO 0~7 internal pull up
SDATI0
R305 4.7KDUMMY
SDATI1
R306 4.7KDUMMY
SDATI2
R307 4.7KDUMMY
GPIO7
R308 4.7KDUMMY
7
INITJ7
SMIJ7
INTR7
NMI7
BATOK45
INITJ A20MJ SMIJ INTR NMI IGNNEJ FERRJ STPCLKJ CPUSLPJ
LAD0 LAD1 LAD2 LAD3
LFRAMEJ LDRQJ SIRQ
SDATI0 SDATI1
SDATO SYNC
AC_RESETJ BIT_CLK
OSC32KHI OSC32KHO BATOK
*
CK_14M_S964 SENTEST SPKR
PWRBTNJ
PMEJ24,29,30,31,40
3D3V_SB
PMEJ PSONJ
S1LED_GREEN
AUXOK
KBDAT KBCLK PMDAT
SiS963, 964 GPIO 9,10 internal pull down
7
RTCVDD
BC397
0.1uF
25V, Y5V, +80%/-20%
C0603
BC398
0.1uF
*
25V, Y5V, +80%/-20%
C0603
R294 4.7K/NC R295 4.7K/NC
AB23 AD26 AE25 AC24 AD25 AD24 AE26 AB22 AC23
AF26 AC25 AB24
AC4 AC3
AD3
AC1
AC2
AD2 AD1
AE1 AF1
AE2 AF2
AB3
E6 B4
B5
C2 C1 D4
D2
C3 D3
D1
D5 A7 D8
B6 A3
B2 A5 B8 A8 C8 D6
6
INIT# A20M# SMI# INTR NMI IGNNE# FERR# STPCLK# CPUSLP#
APICCK/LDTREQ# APICD0/THERM2# APICD1/GPIOFF#
LAD0 LAD1 LAD2 LAD3
LFRAME# LDRQ# SIRQ
AC_SDIN0 AC_SDIN1
AC_SDOUT AC_SYNC
AC_RESET# AC_BIT_CLK
OSC32KHI OSC32KHO BATOK
PWROK
RTCVDD RTCVSS
OSCI ENTEST SPK
PWRBTN# PME# PSON#
ACPILED AUXOK
GPIO13 GPIO14 GPIO15/KBDAT GPIO16/KBCLK GPIO17/PMDAT GPIO18/PMCLK
6
5
CPU_S APIC L P C AC97 R T C
M I I
G P I O
ACPI/OTHERS
GPIO10/AC_SDIN3
GPIO11/OSC25M/STP_PCI#
GPIO12/CPUSTP#
K B C
OSC25MHI
OSC25MHO
TXCLK
TXEN
TXD0 TXD1 TXD2 TXD3
RXCLK
RXDV RXER RXD0 RXD1 RXD2 RXD3
COL CRS
MDC
MDIO
MIIAVDD
MIIAVSS
GPIO0/SPDIF
GPIO1/LDRQ1#
GPIO2/THERM#
GPIO3/EXTSMI#
GPIO4/CLKRUN#
GPIO5/PREQ5# GPIO6/PGNT5#
GPIO7
GPIO8/RING
GPIO9/AC_SDIN2
GPIO19 GPIO20
NC30 NC31 NC32 NC33 NC34 NC35 NC36 NC37 NC38
4
U14B
OSC25MHI
D7
OSC25MHO
C7
TXCLK
D10 E10 E11 D12 C12 E13
C13 A12 A13 B12 A11 B11 C11
B14 C15 C9 E9 B7 A6
Y3 AE3 Y4 AA1 AA2 AA3 AA4 A4 C6 C5 C4 F6 E5 AB2 AB1
D15 E14 C14 A14 D13 C10 A10 B9 A9
STXEN STXD0 STXD1 STXD2 STXD3
RXCLK RXDV RXER RXD0 RXD1 RXD2 RXD3
COL
CRS SMDC SMDIO
TXEN TXD0 TXD1 TXD2 TXD3
MDC MDIO
3
RN60 33
STXEN STXD0 STXD1 STXD2
TXCLK 35 TXEN 35 TXD0 35 TXD1 35 TXD2 35 TXD3 35
RXCLK 35 RXDV 35 RXER 35 RXD0 35 RXD1 35 RXD2 35 RXD3 35
COL 35 CRS 35 MDC 35 MDIO 35
MIIAVDD MIIAVSS
THERMJ
PREQJ5 LAD1 PGNTJ5 GPIO7 RING SDATI2
GPIO11 GPIO12
SMB_CLK_MAIN SMB_DATA_MAIN
+/-5%
1
2
*
3
4
5
6
7 8
SMDIO SMDC STXD3
GPIO0 18 GPIO1 18 THERMJ 40 GPIO3 18 GPIO4 18 PREQJ5 32 PGNTJ5 32 GPIO7 18 RING 44
SDATI2 17
FSB0 7,19 FSB1 6,19 SMB_CLK_MAIN 17,19,20,21,22 SMB_DATA_MAIN 17,19,20,21,22
RN61
1
*
3 5 7 8
TXEN TXD0 TXD1 TXD2
50V, NPO, +/-5%
2
33
MDIO
+/-5%
2
MDC
4
TXD3
6
MIIAVDD
*
MIIAVSS
Analog power of MII
Put closed to 96X CHIP
OSC32KHI OSC32KHO
BC395
15pF
*
C0603
NEED NOT to place close to 96X
LAD0 LAD2
LAD3
LDRQJ SIRQ SENTEST
GPIO pins pull down NEED NOT to place close to 96X
THERMJ
SMB_DATA_MAIN SMB_CLK_MAIN
Put closed to 964 CHIP
OSC25MHO
OSC25MHI
R1097
1 2
1 2
BC717
15pF
XTAL-25MHz
*
C0603
50V, NPO, +/-5%
BC393
BC392
10nF
0.1uF
*
25V, Y5V, +80%/-20%
C0603
C0603
R285 10M
X4 XTAL-32.768kHz
1 2
3
4
RN8SMDA
RN26 4.7K/NC +/-5%
7 8 5 3
*
1
R288 4.7KDUMMY R289 4.7KDUMMY
R290 0
PMEJ
R292 4.7K
RING
R1163 4.7KDUMMY
R293 4.7KDU MMY
R296 4.7K R300 4.7K
10M
6 4 2
X8
1D8V_SB
*
1
BC718
12
20pF
20PF
BC396
22pF
50V, NPO, +/-5%
C0603
3D3V_SYS
3D3V_SB
3D3V_SYS
A
Place near to 96X
BIT_CLK
5
BC399
15pF
*
50V, NPO, +/-5%
C0603
SiS964
Title
Document Number Rev
4
3
Date: Sheet
964-LPC/MII/GPIO
748A01
2
TECHNOLOGY COPR.
of
26 48Sunday, September 05, 2004
1
A
8
DCC
A
A
D
1D8V_SB
FB L0805 300 Ohm
1D8V_VCCSB
FB L0805 300 Ohm
B B
CN1
1 2 3
8
4 5
9
6 7
SATA
CN2
1 2 3
8
4 5
9
6 7
SATA
STX1P STX1N
SRX1N SRX1P
STX2P STX2N
SRX2N SRX2P
8
FB13
FB15
7
21
21
CK_100M_SATAJ19
CK_100M_SATA19
7
UV0+33
UV0-33
UV1+33
UV1-33
UV2+36
UV2-36
UV3+36
UV3-36
UV4+33
UV4-33
UV5+33
UV5-33
UV6+33
UV6-33 UV7+33 UV7-33
5V_SB
BC408
10nF
*
C0603
BC413
10nF
*
C0603
SATACMPAVSS
3D3V_SB
GPIO24 GPIO21 GPIO22 GPIO23
*
BC414
0.1uF
*
C0603
4.7K R299
1 2
UV0+ UV0­UV1+ UV1­UV2+ UV2­UV3+ UV3­UV4+ UV4­UV5+ UV5­UV6+ UV6­UV7+ UV7-
R1142
10K
R0603
+/-5%
BC409
0.1uF
C0603
SATARXAVDD SATARXAVSS
SATATXAVDD SATATXAVSS
SATACMPAVDD SATACMPAVSS
U35
1
CS
2
SK
3
DI
4
DO
AT93C46
OSC12MHI OSC12MHO
USBPVSS1.8
R311 374
+/-1%
R0603
AA10
VCC
NC ORG GND
XTAL-12MHz/NC
1 2
6
G26 G25 H24 H23 C21 D21
A22
B22 C19 D19
A20
B20 C17 D17
A18
B18 C26
C24 D26 D25 D24
E24
E23
F22
E18
E20
E22
F17
F18
F19
F20
F21 G22 H22
AA6 AA7 AA8 AA9
AB6 AF3
AD4
Y2 Y1
AB5 AD5
AC5
AE4
AF4
8
7
6
5
R319
X3
1 2
BC427
20pF/NC
6
UV0+ UV0­UV1+ UV1­UV2+ UV2­UV3+ UV3­UV4+ UV4­UV5+ UV5­UV6+ UV6­UV7+ UV7-
OC0# OC1# OC2# OC3# OC4# OC5# OC6# OC7#
UVDD18 UVDD18 UVDD18 UVDD18 UVDD18 UVDD18 UVDD18 UVDD18 UVDD18 UVDD18
AVDDSATA AVDDSATA AVDDSATA AVDDSATA AVDDSATA AVDDSATA
SATARXAVDD SATARXAVSS
SATATXAVDD SATATXAVSS
SATACMPAVDD SATACMPAVSS
REXT
CLK25MI
CLK25MO
3D3V_SB
10M/NC
1 2
5
OK
USB
SATA
CHECK
IPB_OUT0
IPB_OUT1
IPB_OUT0 pull up: MuTIOL clock PLL disable IPB_OUT1 pull up: MuTIOL V1.0, default V2.0
BC428
20pF/NC
SDATO( Trap from)
R317 4.7KDUMMY
R318 4.7KDUMMY
5
3D3V_SB
disableSPKR( LPC addr mapping)
enable
4
USBPVDD18 USBPVSS18
USBCMPAVDD18 USBCMPAVSS18
USBCMPAVDD33 USBCMPAVSS33
GPIO21/EESK
GPIO22/EEDI GPIO23/EEDO GPIO24/EECS
IPB_OUT0/PLLENN
IPB_OUT1/ZCLKSEL
0
4
OSC12MHI
OSC12MHO
USBREF
IVDD_AUX IVDD_AUX
UVDD33 UVDD33 UVDD33
TX1+
TX1­RX1+ RX1­TX2+
TX2­RX2+ RX2-
HDACT
TRAP0 TRAP1
SiS964
1
enable
PCI AD
disable
U14C
E25 E26 A24 F24
F23 A25
B24 D23
C23
G21 H21
G16 G18 H20
AD7 AC7 AF6 AE6 AD9 AC9 AF8 AE8
A16 A15 B16 B15
A26 B25
AB4
B26 C25
R314
+/-5%
R0603
22
Default
3
OSC12MHI OSC12MHO USBREF
USBPVDD1.8 USBPVSS1.8
USBCMPAVDD1.8 USBCMPAVSS1.8
USBCMPAVDD3.3 USBCMPAVSS3.3
IVDD_AUX IVDD_AUX
BC407
BC406
1uF
10nF
*
*
GPIO21 GPIO22 GPIO23 GPIO24
R312 4.7KDUMMY R313 4.7KDUMMY
0
0
1
C0603
STX1P STX1N SRX1P SRX1N STX2P STX2N SRX2P SRX2N
IPB_OUT0 IPB_OUT1
SATALED
R315
CHECK
22
+/-5%
R0603
C0603
internal pull-low
(30~50K Ohm)
Yes
YesROM
NoOC45-( SB debug mode)
3
CK_12M_USB 19
R309 127
3D3V_SB
SATALED 37
3D3V_SB
USBCMPAVDD1.8
USBCMPAVSS1.8
USBPVDD1.8
USBPVSS1.8
IVDD_AUX
USBCMPAVDD3.3
USBCMPAVSS3.3
SATARXAVDD
SATARXAVSS
SATATXAVDD
SATATXAVSS
SATACMPAVDD
SATACMPAVSS
2
BC401
10nF
C0603
BC404
10nF
C0603
BC411
10nF
C0603
BC415
10nF
C0603
BC425
10nF
C0603
*
*
*
*
*
*
*
*
*
*
*
BC419
10nF
*
C0603
BC422
10nF
*
C0603
*
1
1D8V_SB
BC402
1uF
C0603
1D8V_SB
BC405
1uF
C0603
1D8V_SB
BC412
1uF
C0603
3D3V_SB
BC416
1uF
C0603
1D8V_VCCSB
BC420
1uF
C0603
1D8V_VCCSB
BC423
1uF
10V, Y5V, +80%/-20%
C0603
1D8V_VCCSB
BC426
1uF
10V, Y5V, +80%/-20%
C0603
TECHNOLOGY C OPR.
Title
Document Number Rev
Date: Sheet
SIS748-USB, SATA
748A01
2
of
27 48Sunday, September 05, 2004
1
A
8
DCCBBAA
1D8V_VCCSB
P26 P21 R21 T25 V25 V21
W21
Y25
D
3D3V_SYS
VCCP
1D8V_SB
3D3V_SB
BC447
BC448
10nF
C0603
0.1uF
*
C0603
*
Y21
M21 N21 T21
U21 AB18 AB16 AB14 AB11
AA5
AA21 AB19 AB13
K21 AB20
AB17 AB15 AB12 AB10
AA22 AB21
F12
F15
B10
B13
E12
E15
F10
F11
F13
G20
F14
W22
P25
P24
P23
N26
N25
N24
N23
N22
M26
M25
M24
M23
M22
Y5 T5 R5 L5
G5
L21
U5
M5
H5
J21
W5
V5 P5 N5 K5
J5
F9
E7
F7 E8
L26 L25 L24 L23 L22
8
VDDZ VDDZ VDDZ VDDZ VDDZ VDDZ VDDZ VDDZ VDDZ
IVDD IVDD IVDD IVDD IVDD IVDD IVDD IVDD IVDD IVDD IVDD IVDD IVDD IVDD
PVDD PVDD PVDD PVDD PVDD PVDD PVDD
OVDD OVDD OVDD OVDD OVDD OVDD OVDD OVDD OVDD OVDD OVDD OVDD OVDD
VTT VTT
IVDD_AUX IVDD_AUX IVDD_AUX
OVDD_AUX OVDD_AUX OVDD_AUX OVDD_AUX OVDD_AUX OVDD_AUX OVDD_AUX OVDD_AUX OVDD_AUX OVDD_AUX PVDD_AUX PVDD_AUX
NC1 NC2 NC3 NC4 NC5 NC6 NC7 NC8 NC9 NC10 NC11 NC12 NC13 NC14 NC15 NC16 NC17 NC18 NC19
7
K26
7
NC20
K25
NC21
K24
NC22
K23
NC23
J26
Power
NC24
NC25
NC26
NC27
J25
J22
F16
K22
NC28
E16
NC29
VSSD9VSS
D11
D14
VSS
6
R23
6
VSSZ
U23
VSSZ
W23
VSSZ
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
VSSZ VSSZ VSSZ VSSZ VSSZ VSSZ VSSZ
USBVSS USBVSS USBVSS USBVSS USBVSS USBVSS USBVSS USBVSS USBVSS USBVSS USBVSS USBVSS USBVSS USBVSS USBVSS USBVSS USBVSS USBVSS USBVSS USBVSS USBVSS USBVSS USBVSS USBVSS USBVSS USBVSS USBVSS
USBVSS USBVSS USBVSS USBVSS USBVSS USBVSS USBVSS USBVSS
AVSSSATA AVSSSATA AVSSSATA AVSSSATA AVSSSATA AVSSSATA AVSSSATA AVSSSATA AVSSSATA AVSSSATA AVSSSATA AVSSSATA AVSSSATA AVSSSATA AVSSSATA AVSSSATA AVSSSATA AVSSSATA AVSSSATA
U14D
L10 L11 L12 M10 M11 M12 N10 N11 N12 N13 N14 N15 N16 P10 P11 P12 P13 P14 R10 R11 R12 R13 R14 T10 T13 T14 U10 U13 U14 U15
P15 P16 R15 R16 T15 T16 U16
F25 F26 G23 G24 H25 H26 J23 J24 A23 B23 C22 D22 A21 B21 E21 C20 D20 A19 B19 E19 C18 D18 A17 B17 E17 C16 D16
L13 L14 L15 L16 M13 M14 M15 M16
AD10 AC10 AF9 AE9 AB9 AD8 AC8 AB8 AF7 AE7 AB7 AD6 AC6 AF5 AE5 T11 T12 U11 U12
SiS964
5
4
3
2
1
OK
3D3V_SYS
BC430 10uF/NC
C1206
*
BC432 10uF
C1206
*
BC435 0.1uF/NC
C0603
*
BC437
0.1uF/NC
C0603
*
BC438 0.1uF
C0603
*
BC441
0.1uF
C0603
*
BC444 0.1uF
C0603
*
1D8V_VCCSB
BC781 0.10uF/B/NC
BC783 0.10uF/B/NC
BC786 0.10uF/B/NC
BC787 0.10uF/B/NC
1D8V_SB
5
Put in Bottom side of 964
1 2
1 2
1 2
1 2
BC791 0.10uF/B/NC
1 2
4
1D8V_VCCSB
BC431
10uF
C1206
*
BC434
1uF/NC
C0603
*
BC436
0.1uF/NC
C0603
*
BC439
0.1uF/NC
C0603
*
BC442
0.1uF
C0603
*
3D3V_SB
BC782 0.10uF/B/NC
1 2
BC784 0.10uF/B/NC
1 2
3D3V_SYS
BC788 0.10uF/B/NC
1 2
BC789 0.10uF/B/NC
1 2
BC790 0.10uF/B/NC
1 2
3
Title
Document Number Re v
Date: Sheet
1D8V_SB
VCCP
964 POWER
2
BC429
1uF
C0603
*
BC433
0.1uF/NC
C0603
*
BC440
1uF
C0603
*
BC443
0.1uF/NC
C0603
*
VCCP
BC785 0.10uF/B/NC
1 2
TECHNOLOGY COPR.
of
28 48Sunday, September 05, 2004
1
A
8
A
C/BEJ[0..3]25,30,31,32
AD[0..31]25,30,31,32
C/BEJ[0..3]
AD[0..31]
7
6
5
4
3
2
1
PCI Slot 1 & 2
OK
PCIRSTJ024,25,30,31,40
5V_SYS 5V_SYS 5V_SYS 5V_SYS
-12V_SYS 12V_SYS -12V_SYS
3D3V_SYS 3D3V_SYS 3D3V_SYS
RESET#
PCI_PME#
FRAME#
SDONE
+3.3V10
C/BE#(0)
+3.3V11
REQ64#
X1X1X2
X2
J1PCI_SLOT
TRST#
+12V
TMS
TDI
+5V2 INTA# INTC#
+5V4
RSV1
+5V5
RSV3 GND3 GND5
SB3V
+5V6 GNT# GND8
AD(30) +3.3V1 AD(28) AD(26) GND10 AD(24)
IDSEL
+3.3V3 AD(22) AD(20) GND12 AD(18) AD(16) +3.3V5
GND14 TRDY# GND15 STOP# +3.3V7
SBO#
GND17
PAR
AD(15) AD(13)
AD(11) GND19
AD(9)
B50 B51
AD(6) AD(4)
GND21
AD(2) AD(0)
+5V9 +5V11
+5V13
A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49 B50 B51 A52 A53 A54 A55 A56 A57 A58 A59 A60 A61 A62
INTJA
3D3V_SB 3D3V_SB
PCIRSTJ0 PGNTJ0 PMEJ
AD28
AD24
R320 100
AD22
AD18
FRAMEJ TRDYJ STOPJ
SBOJ1 PAR
AD13
AD9
AD6
AD2
INTJA 24,25,30,31 INTJC 25,30,31
PGNTJ0 25
PMEJ 24,26,30,31,40
FRAMEJ 25,30,31,32
TRDYJ 25,30,31,32 STOPJ 25,30,31,32
PAR 25,30,31,32
INTJC INTJA
CK_33M_PCI219
CK_33M_PCI2 PREQJ1
PREQJ125
D D
INTJB24,25,30,31
INTJD2 5 ,30,31,32
CK_33M_PCI119
PREQJ025
C C
IRDYJ2 5,30,31,32 DEVSELJ25,30,31,32
PERRJ30,31,32 SERRJ25,30,31,32
B B
INTJB INTJC INTJD
CK_33M_PCI1 PREQJ0 AD31 AD30
AD29 AD27 AD26
AD25 C/BEJ3 AD18
AD21 AD20 AD19
AD17 AD16 C/BEJ2
IRDYJ DEVSELJ PLOCKJ
PLOCKJ25,30,31
PERRJ SDONE1 SERRJ C/BEJ1 AD15
AD14 AD12 AD11
AD10
AD8 C/BEJ0 AD7
AD5 AD4 AD3
AD1 AD0 PACK64J1 PREQ64J1
B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 B33 B34 B35 B36 B37 B38 B39 B40 B41 B42 B43 B44 B45 B46 B47 B48 B49 A50 A51 B52 B53 B54 B55 B56 B57 B58 B59 B60 B61 B62
B1 B2 B3 B4 B5 B6 B7 B8 B9
-12V TCK GND1 TDO +5V1 +5V3 INTB# INTD# PRSNT1# RSV2 PRSNT2# GND2 GND4 RSV4 GND6 CLK GND7 REQ# +5V7 AD(31) AD(29) GND9 AD(27) AD(25) +3.3V2 C/BE#(3) AD(23) GND11 AD(21) AD(19) +3.3V4 AD(17) C/BE#(2) GND13 IRDY# +3.3V6 DEVSEL# GND16 LOCK# PERR# +3.3V8 SERR# +3.3V9 C/BE#(1) AD(14) GND18 AD(12) AD(10) GND20 A50 A51 AD(8) AD(7) +3.3V12 AD(5) AD(3) GND22 AD(1) +5V8 ACK64# +5V10 +5V12
AD31 AD29
AD27 AD25
C/BEJ3 AD23
AD21 AD19
AD17 C/BEJ2
IRDYJ DEVSELJ PLOCKJ
PERRJ SERRJ C/BEJ1
AD14 AD12
AD10
AD8 AD7
AD5 AD3
AD1 PACK64J2
3D3V_SYS
B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 B33 B34 B35 B36 B37 B38 B39 B40 B41 B42 B43 B44 B45 B46 B47 B48 B49 A50 A51 B52 B53 B54 B55 B56 B57 B58 B59 B60 B61 B62
B1 B2 B3 B4 B5 B6 B7 B8 B9
-12V TCK GND1 TDO +5V1 +5V3 INTB# INTD# PRSNT1# RSV2 PRSNT2# GND2 GND4 RSV4 GND6 CLK GND7 REQ# +5V7 AD(31) AD(29) GND9 AD(27) AD(25) +3.3V2 C/BE#(3) AD(23) GND11 AD(21) AD(19) +3.3V4 AD(17) C/BE#(2) GND13 IRDY# +3.3V6 DEVSEL# GND16 LOCK# PERR# +3.3V8 SERR# +3.3V9 C/BE#(1) AD(14) GND18 AD(12) AD(10) GND20 A50 A51 AD(8) AD(7) +3.3V12 AD(5) AD(3) GND22 AD(1) +5V8 ACK64# +5V10 +5V12
TRST#
INTA# INTC#
RESET#
PCI_PME#
AD(30) +3.3V1 AD(28) AD(26)
GND10
AD(24)
IDSEL
+3.3V3
AD(22) AD(20)
GND12
AD(18) AD(16)
+3.3V5
FRAME#
GND14 TRDY# GND15 STOP# +3.3V7
SDONE
GND17
AD(15)
+3.3V10
AD(13) AD(11)
GND19
C/BE#(0)
+3.3V11
GND21
REQ64#
+5V11 +5V13
X1X1X2
X2
J2PCI_SLOT
+12V
TMS
+5V2
+5V4
RSV1
+5V5 RSV3 GND3 GND5
SB3V
+5V6 GNT# GND8
SBO#
PAR
AD(9)
AD(6) AD(4)
AD(2) AD(0)
+5V9
TDI
B50 B51
A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49 B50 B51 A52 A53 A54 A55 A56 A57 A58 A59 A60 A61 A62
12V_SYS
INTJB INTJD
PCIRSTJ0 PGNTJ1 PMEJ
AD30 AD28
AD26 AD24
R321 100
AD22 AD20
AD18 AD16
FRAMEJ TRDYJ STOPJ SDONE2
SBOJ2 PAR
AD15 AD13
AD11 AD9
C/BEJ0 AD6
AD4 AD2
AD0 PREQ64J2
PGNTJ1 25
AD19AD23
5V_SYS
1
*
3 5 78
PREQJ0 PREQJ1
R322 2. 7KDUMMY R323 2. 7KDUMMY
A
TECHNOLOGY C OPR.
1 3 5 78
Title
Document Number Rev
Date: Sheet
PCI 1, 2
748A01
of
29 48Sunday, September 05, 2004
A
SERRJ PERRJ PLOCKJ STOPJ
SDONE2 SBOJ2 SDONE1 SBOJ1
2 4 6
2 4 6
RN30
RN27
4.7K
DUMMY
*
4.7K
5V_SYS 5V_SYS
1
*
3 5 78
1 3 5 78
DEVSELJ TRDYJ IRDYJ FRAMEJ
PREQ64J2 PACK64J2 PACK64J1 PREQ64J1
RN28
2 4 6
2.7K
RN67
2
*
4 6
2.7K
8
A
7
6
5
4
3
2
1
OK
C/BEJ[0..3]
C/BEJ[0..3]25,29,31,32
AD[0..31]25,29,31,32
D D
INTJD25,29,31,32
INTJB24,25,29,31
CK_33M_PCI319
PREQJ225
C C
IRDYJ25,29,31,32 DEVSELJ25,29,31,32
PLOCKJ25,29,31
PERRJ29,31,32 SERRJ25,29,31,32
AD[0..31]
PCIRSTJ024, 25,29, 31,40
5V_SYS 5V_SYS 5V_SYS 5V_SYS
-12V_SYS 12V_SYS - 12V_SYS 12V_SYS
3D3V_SYS 3D3V_SYS 3D3V_SYS
-12V TCK GND1 TDO +5V1 +5V3 INTB# INTD# PRSNT1# RSV2 PRSNT2# GND2 GND4 RSV4 GND6 CLK GND7 REQ# +5V7 AD(31) AD(29) GND9 AD(27) AD(25) +3.3V2 C/BE#(3) AD(23) GND11 AD(21) AD(19) +3.3V4 AD(17) C/BE#(2) GND13 IRDY# +3.3V6 DEVSEL# GND16 LOCK# PERR# +3.3V8 SERR# +3.3V9 C/BE#(1) AD(14) GND18 AD(12) AD(10) GND20 A50 A51 AD(8) AD(7) +3.3V12 AD(5) AD(3) GND22 AD(1) +5V8 ACK64# +5V10 +5V12
PCI_PME#
X1X1X2
X2
J3PCI_SLOT
TRST#
+12V TMS
+5V2 INTA# INTC#
+5V4
RSV1
+5V5
RSV3 GND3 GND5
SB3V
RESET#
+5V6 GNT# GND8
AD(30) +3.3V1 AD(28) AD(26)
GND10
AD(24)
IDSEL
+3.3V3 AD(22) AD(20)
GND12
AD(18) AD(16) +3.3V5
FRAME#
GND14
TRDY#
GND15
STOP# +3.3V7
SDONE
SBO#
GND17
PAR
AD(15)
+3.3V10
AD(13) AD(11)
GND19
AD(9)
C/BE#(0)
+3.3V11
AD(6) AD(4)
GND21
AD(2) AD(0)
+5V9
REQ64#
+5V11 +5V13
A1 A2 A3 A4
TDI
A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49 B50
B50
B51
B51
A52 A53 A54 A55 A56 A57 A58 A59 A60 A61 A62
INTJC
INTJC 25,29,31
PGNTJ2 25
R328 100
FRAMEJ 25,29,31,32
TRDYJ 25,29,31,32 STOPJ 25, 29,31, 32
INTJA 24,25,29,31
PMEJ 24,26,29,31,40
3D3V_SB 3D3V_SB
PCIRSTJ0 PGNTJ2
B1 B2 B3 B4 B5 B6 B7 B8
B9 B10 B11 B12 B13 B14
CK_33M_PCI3
C/BEJ3 AD20
AD8 C/BEJ0
PACK64J3 PR EQ64J3
B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 B33 B34 B35 B36 B37 B38 B39 B40 B41 B42 B43 B44 B45 B46 B47 B48 B49 A50 A51 B52 B53 B54 B55 B56 B57 B58 B59 B60 B61 B62
PCI Slot 1 & 2
PAR 25 , 29,31, 32
3D3V_SYS
-12V TCK GND1 TDO +5V1 +5V3 INTB# INTD# PRSNT1# RSV2 PRSNT2# GND2 GND4 RSV4 GND6 CLK GND7 REQ# +5V7 AD(31) AD(29) GND9 AD(27) AD(25) +3.3V2 C/BE#(3) AD(23) GND11 AD(21) AD(19) +3.3V4 AD(17) C/BE#(2) GND13 IRDY# +3.3V6 DEVSEL# GND16 LOCK# PERR# +3.3V8 SERR# +3.3V9 C/BE#(1) AD(14) GND18 AD(12) AD(10) GND20 A50 A51 AD(8) AD(7) +3.3V12 AD(5) AD(3) GND22 AD(1) +5V8 ACK64# +5V10 +5V12
RESET#
PCI_PME#
FRAME#
+3.3V10
C/BE#(0)
+3.3V11
REQ64#
X1X1X2
X2
J4PCI_SLOT
TRST#
+12V TMS
+5V2 INTA# INTC#
+5V4
RSV1
+5V5
RSV3 GND3 GND5
SB3V
+5V6
GNT# GND8
AD(30) +3.3V1 AD(28) AD(26)
GND10
AD(24)
IDSEL
+3.3V3 AD(22) AD(20)
GND12
AD(18) AD(16) +3.3V5
GND14 TRDY# GND15 STOP#
+3.3V7
SDONE
SBO#
GND17
AD(15) AD(13)
AD(11)
GND19
AD(9)
AD(6)
AD(4)
GND21
AD(2)
AD(0)
+5V9
+5V11 +5V13
A1 A2 A3 A4
TDI
A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43
PAR
A44 A45 A46 A47 A48 A49 B50
B50
B51
B51
A52 A53 A54 A55 A56 A57 A58 A59 A60 A61 A62
INTJDINTJD INTJA
PCIRSTJ0 PGNTJ3PREQJ2 PMEJAD31 AD30
AD28AD27 AD26
AD24
R329 100
AD22AD21 AD20
AD18AD17 AD16
FRAMEJIRDYJ TRDYJDEVSELJ STOPJPLO CKJ
SBOJ4SERRJ PARC/BEJ1 AD15
AD13AD12 AD11
AD9
AD6AD5 AD4
AD2AD1 AD0
PGNTJ3 25
AD21
B1 B2 B3 B4 B5
INTJA INTJBINTJB INTJC
CK_33M_PCI419
CK_33M_PCI4 PREQJ3PMEJ
PREQJ325
AD31 AD30AD29 AD29AD28
AD27 AD26AD25 AD25AD24
C/BEJ3AD23 AD23AD22
AD21 AD20AD19 AD19AD18
AD17 AD16C/BEJ2 C/BEJ2FRAMEJ
IRDYJTRDYJ DEVSELJSTOPJ PLOCKJPERRJ SDONE3
PERRJ SDONE4SBOJ3 SERRJPAR C/BEJ1 AD15AD14
AD14AD13 AD12 AD11AD10
AD10AD9
AD8 C/BEJ0AD7 AD7AD6
AD5 AD4AD3 AD3AD2
AD1 AD0 PACK64J4 PREQ64J4
B6 B7 B8
B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 B33 B34 B35 B36 B37 B38 B39 B40 B41 B42 B43 B44 B45 B46 B47 B48 B49 A50 A51 B52 B53 B54 B55 B56 B57 B58 B59 B60 B61 B62
B B
PREQJ2 PREQJ3
R330 2.7KDUMMY R331 2.7KDUMMY
PREQ64J4 PACK64J4 PACK64J3 PREQ64J3
SDONE4 SBOJ4 SDONE3 SBOJ3
5V_SYS
RN31
1
2
*
3
4
5
6
78
2.7K
RN68
1
2
*
3
4
5
6
78
2.7K
Confidential Document.Do Not Reproduce Without Foxconn Authorization.
8
7
6
5V_SYS
A
Title
Document Number Rev
5
4
3
Date: Sheet
2
Index
748A01
TECHNOLOGY COPR.
of
30 48Sunday, September 05, 2004
1
A
5
C/BEJ[0..3]25,29,30,32
AD[0..31]25,29,30,32
D D
CK_33M_PCI519
C C
B B
C/BEJ[0..3] AD[0..31]
5V_SYS 5 V_SYS
-12V_SYS 12V_SYS
3D3V_SYS 3D3V_SYS
B1
-12V
B2
TCK
B3
GND1
B4
TDO
B5
+5V1
B6
B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 B33 B34 B35 B36 B37 B38 B39 B40 B41 B42 B43 B44 B45 B46 B47 B48 B49 A50 A51 B52 B53 B54 B55 B56 B57 B58 B59 B60 B61 B62
B7 B8 B9
+5V3 INTB# INTD# PRSNT1# RSV2 PRSNT2# GND2 GND4 RSV4 GND6 CLK GND7 REQ# +5V7 AD(31) AD(29) GND9 AD(27) AD(25) +3.3V2 C/BE#(3) AD(23) GND11 AD(21) AD(19) +3.3V4 AD(17) C/BE#(2) GND13 IRDY# +3.3V6 DEVSEL# GND16 LOCK# PERR# +3.3V8 SERR# +3.3V9 C/BE#(1) AD(14) GND18 AD(12) AD(10) GND20 A50 A51 AD(8) AD(7) +3.3V12 AD(5) AD(3) GND22 AD(1) +5V8 ACK64# +5V10 +5V12
INTJB24,25,29,30
INTJD25,29,30,32
PREQJ425
IRDYJ25,29,30,32
DEVSELJ25,29,30,32
PLOCKJ25,29,30
PERRJ29,30,32 SERRJ25,29,30,32
INTJB INTJC
INTJD
CK_33M_PCI5 PREQJ4 AD31 AD30
AD29 AD27 AD26
AD25 C/BEJ3 AD22
AD23 AD21 AD20
AD19 AD17 AD16
C/BEJ2 IRDYJ DEVSELJ PLOCKJ
PERRJ SDONE5 SERRJ C/BEJ1 AD15
AD14 AD12 AD11
AD10
AD8 C/BEJ0 AD7
AD5 AD4 AD3
AD1 AD0 PACK64J5 PREQ64J5
4
TRST#
RESET#
PCI_PME#
AD(30) +3.3V1 AD(28) AD(26)
GND10
AD(24) +3.3V3
AD(22) AD(20)
GND12
AD(18) AD(16) +3.3V5
FRAME#
GND14
TRDY#
GND15
STOP# +3.3V7
SDONE
GND17
AD(15)
+3.3V10
AD(13) AD(11)
GND19
C/BE#(0)
+3.3V11
GND21
REQ64#
X1X1X2
X2
J5PCI_SLOT
+12V
TMS
+5V2
INTA#
INTC#
+5V4
RSV1
+5V5
RSV3 GND3 GND5
SB3V
+5V6 GNT# GND8
IDSEL
SBO#
PAR
AD(9)
B50 B51
AD(6) AD(4)
AD(2) AD(0)
+5V9
+5V11 +5V13
3
2
1
OK
A1 A2 A3 A4
TDI
A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49 B50 B51 A52 A53 A54 A55 A56 A57 A58 A59 A60 A61 A62
INTJA
3D3V_SB
PCIRSTJ
PGNTJ4 PMEJ
AD28
AD24
R336 100
AD22
AD18
FRAMEJ TRDYJ STOPJ
SBOJ5 PAR
AD13
AD9
AD6
AD2
INTJA 24,25,29,30 INTJC 25,29,30
PCIRSTJ0 24,25,29,30,40 PGNTJ4 25 PMEJ 24,26,29,30,40
FRAMEJ 25,29,30,32 TRDYJ 25,29,30,32 STOPJ 25,29,30,32
PAR 25,29,30,32
PREQ64J5 PACK64J5 SBOJ5 SDONE5
RN66
1
*
3 5 7 8
2.7K
+/-5%
8P4R0603
5V_SYS 5V_SYS
PREQJ4
2 4 6
R337 2.7K DUMMY
A A
TECHNOLOGY COPR.
Title
Document Number Re v
5
4
3
2
Date: Sheet
Index
A
of
31 48Sunday, September 05, 2004
1
5
4
3
2
1
FB44 FB L0805 30 Ohm
99
FW322-100
VSS
VSS12VSS22VSS33VSS38VSS
62
52
100
R1178 0/nc
+/-5%
R0603
3D3V_1394
70
69 68 65 64 63 61 60 59 56 55 54 53 51 50 49 48 35 34 31 30 29 28 26 25 21 20 19 18 16 15 14 13
58 47 36 23
46 37 39 40 41 42 24
9
8 44 45
11
7
6 10
U27
PCI_VIOS
PCI_AD0 PCI_AD1 PCI_AD2 PCI_AD3 PCI_AD4 PCI_AD5 PCI_AD6 PCI_AD7 PCI_AD8 PCI_AD9 PCI_AD10 PCI_AD11 PCI_AD12 PCI_AD13 PCI_AD14 PCI_AD15 PCI_AD16 PCI_AD17 PCI_AD18 PCI_AD19 PCI_AD20 PCI_AD21 PCI_AD22 PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 PCI_AD28 PCI_AD29 PCI_AD30 PCI_AD31
PCI_CBE0# PCI_CBE1# PCI_CBE2# PCI_CBE3#
PCI_PAR PCI_FRAME# PCI_IRDY# PCI_TRDY# PCI_DEVSEL# PCI_STOP# PCI_IDSEL
PCI_REQ# PCI_GNT# PCI_PERR# PCI_SERR#
PCI_PCLK
PCI_PRST# PCI_INTA# PCI_PME#
3D3V_SYS
FB45 FB L0805 30 Ohm
2 1
BC724
BC725
12
12
0.10uF
0.10uF
C0603
D D
C C
C0603
BC737
1 2
0.10uF
C0603
BC727
BC726
12
12
0.10uF
0.10uF
C0603
C0603
3D3V_13943D3V_SYS
AD[0..31]25,29,30,31
BC729
BC728
12
12
0.01uF
0.01uF
C0603
C0603
AD[0..31]
BC731
BC730
12
12
0.01uF
0.01uF
C0603
C0603
C/BEJ025,29,30,31 C/BEJ125,29,30,31 C/BEJ225,29,30,31 C/BEJ325,29,30,31
PAR25,29,30,31 FRAMEJ25,29,30,31 IRDYJ25,29,30,31 TRDYJ25,29,30,31 DEVSELJ25,29,30,31 STOPJ25 , 29,30, 31
PREQJ526 PGNTJ526 PERRJ29,30,31 SERRJ25,29,30,31
CK_33M_139419
PCIRSTJ125
INTJD25,29,30,31
BC732
12
0.01uF
C0603
R1106 100
R1179
0
5V_SYS
AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31
C/BE-0 C/BE-1C/BE-1 C/BE-2 C/BE-3
PAR FRAMEJ
IRDYJ TRDYJ DEVSELJ STOPJ IDSELAD24
REQ5_1J GNT5_1J PERRJ SERRJ
PCIRSTJ INT-D
21
BC721
BC720
BC719
12
0.10uF
C0603
91
VDD72VDD67VDD57VDD43VDD32VDD27VDD17VDD
VDDA75VDDA88VDDA
VSS66VSS
RESET#
TPBIAS0
TPA0+ TPB0+
TPBIAS1
TPA1+ TPB1+
CARDBUSN
TEST0 TEST1 PTEST
ROM_AD
ROM_CLK
VSSA74VSSA87VSSA92VSSA
76
TPA0­TPB0-
TPA1­TPB1-
93
XI
94
XO
95
90
R1
R1100
2.49K
+/-1%
R0603
89
R0
86 85 84 83 82 81 80 79 78 77
73
CPS
R1103 10K
71
PC2
1
5 2 96 98
SE
97
SM
4 3
12
0.10uF
C0603
330
TPBIAS0 TPA0 TPA0J TPB0 TPB0J TPBIAS1 TPA1 TPA1J TPB1 TPB1J
R1109 10K R1110 10K R1102 10K R1112 10K R1101 10K
12
0.10uF
C0603
R1098
TPA0 39 TPA0J 39 TPB0 39 TPB0J 39
TPA1 39 TPA1J 39 TPB1 39 TPB1J 39
402K
R1153
R1113 10K
12
X9 XTAL-24.576MHz
BC736 0.10uF
1 2
25V,Y5V,+80%/-20%
BPWR
12
BC738
0.10uF
R1114 10K
SCL SDA
R1111
330
BC735
510K
R0603
+/-5%
3D3V_1394
BC734
22pF
C0603
*
50V, NPO, +/-5%
22pF
C0603
*
50V, NPO, +/-5%
R1099
8
VCC
7
WP/NC
6
SCL
5
VSS/GND
SDA
AT24C02N-2.7V
A2/NC
U33
1
A0
2
A1
3 4
B B
R1117 56 .2
TPBIAS0
A A
R1120 56 .2
R1125 56 .2
BC743 0.33uF
5
C0805
*
16V, X7R, +/-10%
TPA0J
TPA0
TPBIAS1
R1122 56. 2
R1128 56. 2
BC741 0.33uF
4
C0805
*
16V, X7R, +/-10%
TPA1
TPA1J
R1121 56 .2
R1126
4.99K +/-1%
BC742 220pF C0603
50V, NPO, +/-5%
*
3
TPB0
TPB0J
R1118 56. 2
R1123 56. 2
R1127
4.99K +/-1%
BC740 220pF C0603
50V, NPO, +/-5%
*
TPB1
TPB1J
Title
Document Number Rev
2
Date: Sheet
IEE1394
748A01
1
TECHNOLOGY COPR.
of
32 48Sunday , S ept ember 05, 2004
A
5
4
3
2
1
Rear Dual USB Connector
5V_SYS
D D
SVCC1
UV0­UV0+
UV1­UV1+
CN5
1 2 3 5 7 8
X
HEADER_2X5_9
5V_SYS
4 6
10
UV7- 27 UV7+ 27
UV0-27 UV0+27
C C
UV1-27 UV1+27
USB Header1
B B
UV6-27 UV6+27
12
BC512
0.10uF
C0603
EC45
1000uF/NC
*
6.3V, +/-20%
CE35D80H200
USB Header2
UV4-27 UV4+27
BC511
12
0.10uF
C0603
SVCC2
1 2 3 4
5 6 7 8
9
12
BOTTOM TOP
11
10
CN4
1 2 3 5 7 8
X
HEADER_2X5_9
USB USBX2
4 6
10
5V_SYS
EC47
1000uF/NC
*
6.3V, +/-20%
CE35D80H200
UV5- 27 UV5+ 27
A A
TECHNOLOGY COPR.
Title
Document Number Re v
5
4
3
2
Date: Sheet
USB Header & USB Port
1
A
of
33 48Sunday, September 05, 2004
8
DCCBBAA
7
6
5
4
3
2
1
BC839
0.1uF
*
VIN
BC840
0.1uF
*
BC849
0.1uF
*
VCCP
BC841
0.1uF
*
BC857
0.1uF
*
BC858
0.1uF
*
5V_SYS
D
BC844
0.1uF
*
BC845
0.1uF
*
BC852
0.1uF
*
BC847
0.1uF
*
5V_SB
BC848
0.1uF
*
BC850
0.1uF
*
BC843
BC842
0.1uF
0.1uF
*
*
3D3V_SYS -12V_SYS
BC851
0.1uF
*
Title
Document Number Re v
8
7
6
5
4
3
Date: Sheet
EMPTY
2
TECHNOLOGY COPR.
of
34 48Sunday, September 05, 2004
1
A
5
3D3V_SB
D D
BC828
22pF
C0603
3D3V_SB
MDC MDIO TXD0 TXD1 TXD2 TXD3 TXEN TXCLK RXDV RXD0 RXD1 RXD2 RXD3 RXCLK COL CRS RXER
LED0/PHYAD0 LED1/PHYAD1 LED2/PHYAD2 LED3/PHYAD3 LED4/PHYAD4
BC830
0.1uF
*
C0603
MDC26 MDIO26 TXD026 TXD126 TXD226 TXD326 TXEN26 TXCLK26 RXDV26 RXD026 RXD126 RXD226 RXD326 RXCLK26 COL26 CRS26 RXER26
C C
BC827
22pF
C0603
X7
1 2
BC829
0.1uF
C0603
*
*
*
XTAL-25MHz
Place L2, C17, C18, C19 as close to each power pin as possible.
R1093
5.1K
R0603
U31
+/-5%
25
MDC
26
MDIO
6
TXD0
5
TXD1
4
TXD2
3
TXD3
2
TXEN
7
TXC
22
RXDV
21
RXD0
20
RXD1
19
RXD2
18
RXD3
16
RXC
1
COL
23
CRS
24
RXER/FXEN
46
X1
47
X2
9
LED0/PHYAD0
10
LED1/PHYAD1
12
LED2/PHYAD2
13
LED3/PHYAD3
15
PWFBIN
LED4/PHYAD4
8
PWFBIN
14
DVDD33
48
DVDD33
11
DGND0
17
DGND1
45
DGND2
U17/pin14 U17/pin48
4
RTL8201BL
MII/SNIB/RTT3
3D3V_SB
PWFBOUT
32 36
AVDD33
29
AGND
35
AGND
27
NC1
31
TPRX+
30
TPRX-
33
TPTX-
34
TPTX+
28
RTSET
43
ISOLATE
40
RPTR
39
SPEED
38
DUPLEX
37
ANE
41
LDPS
44 42
RESETB
IP101
R1095 5.1K/NC
R0603 +/-5%
PWFBOUT AVDD33
*
0.1uF
C0603
BC831
3D3V_SB
BC826
0.1uF
*
25V, Y5V, +80%/-20%
C0603
LRDP LRDN
LTDN LTDP
3
FB L0805 120 Ohm
PWFBOUT36
Place C14, C15, L1 close to PWFBOUT and place C16 close to PWFBIN.
LRDP 36 LRDN 36
LTDN 36 LTDP 36
135
*
642
R1094
6.2K
+/-5%
R0603
1
*
3 5 7 8
RN57
+/-5%
8P4R0603
5.1K
78
+/-5%
8P4R0603
5.1K
RN58
3D3V_SB
*
8201 5.9K
2 4 6
BC824
0.1uF
C0603
3D3V_SB
2
PWFBINPWFBOUT
21
BC825
*
0.1uF
L48
C0603
1
Hardwire Configuration network:
B B
LED3/PHYAD336
LED2/PHYAD236
LED3/PHYAD3
LED4/PHYAD4 LED2/PHYAD2 LED1/PHYAD1
RN59
1
*
3 5 7 8
5.1K
+/-5%
8P4R0603
2 4 6
LED0/PHYAD036
This schematic sets PHY address to 00001b. You could set PHY address from 00001b to 11111b. But the LED polarity must matchs the respective PHYAD setting. Refer to datasheet's detailed description.
LED0/PHYAD0
R1096
5.1K/NC R0603 +/-5%
3D3V_SB
1. This configuration shows Enable: Auto negotiation, Full duplex, 100Mbps, Link Down Power Saving, MII interface Disable: Isolate, Repeater mode
2. These senven configuration pins could be connected to VDD or GND directly.
LED0 LED1 LED2 LED3 LED4
A A
Link Dupx 10Act 100Act COL
TECHNOLOGY COPR.
Title
Document Number Re v
5
4
3
2
Date: Sheet
RTL8110S/RTL8100C
A
of
35 48Sunday, September 05, 2004
1
5
D D
PWFBOUT35
C C
B B
LTDN
LTDN35
LTDP
LTDP35
LRDP
LRDP35
LRDN
LRDN35
BC715
0.1uF
C0603
BC713
10nF
*
135
*
642
*
*
C0603
78
*
+/-5%
8P4R0603
51
RN56
BC716
0.1uF
C0603
BC714
0.1uF
C0603
L47
3
TD-
1
TD+
6
RD+
8
RD-
7
CTD
2
TDT
4
NC_4 NC_55NC_12
XFMR 350uH
R1143
0/NC
R0603
+/-5%
CTX
TCMT
NC_13
4
14
TX-
16
TX+
11
RX+
9
RX-
10 15
13 12
3D3V_SB
Close to USB connector
*
135
642
7 8
RN55
75
8P4R0603
+/-5%
BC832
1.5nF
3
5V_SYS
USB_LAN1
9
RJ45-1
GigaLAN
SVCC3
SVCC4
10
RJ45-2
11
RJ45-3
14
RJ45-6
12
RJ45-4
13
RJ45-5
15
RJ45-7
16
RJ45-8
5
VCC2
6
Up USB
D2-
7
D2+
8
GND2
1
VCC1
2
Down USB
D1-
3
D1+
4
GND1
USBX2_RJ45 10/100 Mbit LAN
GRN
DYA
GRNYEL
DGA
CGND5 CGND6 CGND7 CGND8
CGND3 CGND4
CGND1 CGND2
GC GA
2
3D3V_SB
R1091 510/NC
+/-5%
R0603
D19
R1092
17 18
20 19 25
26 27 28
23 24
21 22
510/NC
+/-5%
R0603
LED0/PHYAD0 35
3
BAT54C/NC
1
2
1
LED2/PHYAD2 35
LED3/PHYAD3 35
UV2-27
UV2+27
UV3-27
UV3+27
A A
TECHNOLOGY COPR.
Title
Document Number Re v
5
4
3
2
Date: Sheet
LAN & USB PORT
A
of
36 48Sunday, September 05, 2004
1
8
DCCBBAA
IDEDA[0..15]25
D
IDEREQA25
IDEIOWJA25
IDEIORJA25
ICHRDYA25
IDACKJA25
IDEIRQA25
HDDLED45
PCIRSTJ213,25
IDEREQB25
IDEIOWJB25
IDEIORJB25
ICHRDYB25
IDACKJB25
IDEIRQB25
R405 4.7K
IDEREQB IDEREQB
IDEIRQB IDEIRQB
7
IDEDA[0..15]
3D3V_SYS 5V_SYS
R402
4.7K
+/-5%
R0603
Q34
B
MMBT3904
E C
IDERSTJ
HDDLED
B
R403
4.7K
+/-5%
R0603
Q33 MMBT3904
E C
6
IDEREQA IDEIOWJA IDEIORJA ICHRDYA IDACKJA IDEIRQA
IDERSTJ
IDEIOWJBIDEIOWJB IDEIORJBIDEIORJB MICHRDYBICHRDYB IDACKJBIDACKJB
IDEDA7
R398 5.6K
IDESAA1 IDESAA0 IDECSJA0 IDECSJA1
D6
1N4148W
D7
1N4148W
IDEDB7
IDEDB8? Page35
IDESAB1 CBLIDB IDESAB0 IDECSJB0
5
21
21
SATALED
4
CN6
1
IDEDA7 IDEDA8 IDEDA6 IDEDA9 IDEDA5 IDEDA10 IDEDA4 IDEDA11 IDEDA3 IDEDA12 IDEDA2 IDEDA13 IDEDA1 IDEDA0
SATALED 27
R404 5.6K
IDEDB7 IDEDB6 IDEDB5 IDEDB4 IDEDB3 IDEDB2 IDEDB1 IDEDB0
3 5 7
9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39
CONN40 (IDE2)
2 4 6 8 10 12 14 16 18
X
22 24 26 28 30 32 34 36 38 40
IDEDB[0..15]25
1 3 5 7
9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39
CN7
2 4 6 8 10 12 14 16 18
X
22 24 26 28 30 32 34 36 38 40
CONN40 (IDE1)
3
IDEDA14 IDEDA15
IDEDB[0..15]
IDEDB8 IDEDB9 IDEDB10 IDEDB11 IDEDB12 IDEDB13 IDEDB14 IDEDB15
CBLIDA
IDESAA[0..2]25
IDECSJA[0..1]25
IDESAB[0..2]25
IDECSJB[0..1]25
IDESAA2
2
IDESAB2 IDECSJB1
1
CBLIDA 25
CBLIDB 25
HDDLED45
HDDLED
D8
1N4148W
21
TECHNOLOGY COPR.
Title
Document Number Re v
8
7
6
5
4
3
Date: Sheet
IDE
2
37 48Sunday, September 05, 2004
1
A
of
8
A
D D
CK_14M_AUDIO19
CODEC_RSTJ17
BIT_CLK17,26
SYNC17,26 SDATI017,26 SDATO17,26
CD_L CD_GND CD_R MIC1
MIC2 LINE_IN_L LINE_IN_R
BIT_CLK SYNC SDATI0 SDATO
*
22pF/NC
BC802
BC803 1uF C0603 BC804 1uF C0603
*
BC805 1uF C0603
*
BC806 1uF C0 805
*
BC807 1uF C0 805
*
BC808 1uF C0603
*
BC809 1uF C0603
*
*
SPDIF_OUT
C C
7
3D3V_SYS
BC794
BC795
0.1uF
0.1uF
*
*
C0603
C0603
25
38
1
9
AVdd1
DVdd1
3 2
11
6
10
8 5
12 13 14 15 16 17 18 19 20 21 22 23 24 47 48
XTL_OUT XTL_IN
RESET# BIT_CLK SYNC SDATA_IN SDATA_OUT
PC_BEEP PHONE AUX_L AUX_R JD2 JD1 CD_L CD_GND CD_R MIC1 MIC2 LINE_IN_L LINE_IN_R SPDIFI(EAPD) SPDIFO
XTL-IN
PC_BEEP
JD2 JD1
DVdd2
ALC655
DVss1
DVss2
4
7
26
50 mil wide trace etched on the PCB
AVdd2
AVss1
42
AVss2
NC_49
49
6
VCC5A
BC796
*
*
0.1uF
C0603
FRONT_OUT_L FRONT_OUT_R
MONO_OUT
NC_33
Front-MIC1
SURR-OUT-L
NC_40
SURR-OUT-R
CEN-OUT
LFE-OUT
JD0(GPIO0)
XTLSEL
VREFOUT
VREF AFILT1 AFILT2
VRDA
Front-MIC2
ALC655
EMI
R1074
R1077 0 R0 603 +/-5%
*
BC837 0.1uF
BC797
0.1uF
C0603
U30
35 36 37 33 34 39 40 41 43 44 45 46
28 27 29 30 31 32
0/NC
R0603 +/-5%
FB43
FB L0805 60 Ohm+/-25%
EC81
22uF/nc
16V, +/-20%
CE20D50H110
2 1
BC801 1uF C0603
*
5V_SYS
21
1
BC798
*
0.1uF/NC
C0603
EC71 100uF EC72 100uF
*
*
*
BC811
BC812
*
1uF
1nF
C0603
C0603
5
U29 L M78L05/N C
OUT
GND
2
CE25D60H110
16V, +/-20% 16V, +/-20%
CE25D60H110
JD0
BC814
BC813
4.7uF
*
*
1nF
C0603
C0805
IN
F_MIC
*
12V_SYS
3
*
LINE_OUT_L LINE_OUT_R
BC815
10uF/NC
C1206
BC799
1uF/NC
C0603
VREFOUT
R1072
5.6K
R0603
+/-5%
4
JACK_AUDX3 Vertical
MIC IN
AUDIO1A
37 36
JACK_AUDX3 Vertical
LINE IN
AUDIO1C
40
3
*
BC792
100pF/NC
R107110K
R0603+/-5%
BC816
100pF/NC
*
50V, NPO, +/-5%
C0603
C0603
50V, NPO, +/-5%
*
BC800
100pF/NC
C0603
50V, NPO, +/-5%
JD0
*
BC810
3.3uF
C0805
BC817
100pF/NC
*
50V, NPO, +/-5%
C0603
R1067 10K
R0603 +/-5%
32 33 34 35
1 2 3 4 5
2
R1066 22K
R0603
+/-5%
*
BC793
3.3uF
C0805
10V, Y5V, +80%/-20%
R1068 22K
R0603
+/-5%
R1069
4.7K
R0603
+/-5%
R1075 22K
R0603
+/-5%
LINE_IN_L
R1070
4.7K
R0603
+/-5%
R1076 22K
R0603
+/-5%
1
JD2
LINE_IN_R
VREFOUT
MIC1
MIC2
PC_BEEP
BC818 1uF
C0603
*
*
B B
CD IN
JST-CON4-2-Black
1 2
5
3 4
CD_IN
BC819
100pF/NC
C0603
R1078 10K
R1081 1K
+/-1%
R0603
R0603+/-5%
SPKR 26,45
CD_L CD_GND
CD_R
SPDIF_OUT
*
R1079
100
R0603
+/-5%
R1080 200
*
BC707
25V, Y5V, +80%/-20%
R0603 +/-5%
*
C0603
10nF
*
CN20 RCA
RCA3
231
BC836
100pF
50V, NPO, +/-5%
C0603
SPDIF OUT
VCC5A
FB53 FB L0603 47 Ohm
2 1
BC855
*
1uF
C0603
F_MIC
LINE_OUT_R FRONT_OUT_R LINE_OUT_L
R1084 10K
+/-5%
R0603
F_AUDIO
1 2 3 5106 7
X
9
Header_2X5_8
VCC5A
4
FRONT_OUT_L
BC823
0.1uF
*
25V, Y5V, +80%/-20%
C0603
JD1
FRONT_OUT_R
FRONT_OUT_L
*
BC820
3.3uF
C0805
10V, Y5V, +80%/-20%
R1085
R0603
+/-5%
22K
R1082 10K
R0603 +/-5%
R1086 22K
R0603
+/-5%
BC821
100pF/NC
LINE OUT
*
*
BC822
100pF/NC
C0603
C0603
50V, NPO, +/-5%
JACK_AUDX3 Vertical
25 24 23 22
AUDIO1B
38 39
A
Title
Document Number Rev
8
7
6
5
4
3
Date: Sheet
2
AC97 CODEC
748A01
TECHNOLOGY COPR.
of
38 48Sunday, September 05, 2004
1
A
8
DCCBBAA
D
BC746
0.10uFC0603
1 2
FB46
21
FB L0805 60 Ohm
7
BPWR
6
12
BC745
0.10uF
C0603
EC74
470uF/NC
*
16V, +/-20%
CE35D80H200
5
D20
2 1
B320B
4
12V_SYS
3
2
1
BC749 0.10uF
1 2
TPB0_L
2
1394GND
4
1394D0+
6
1394D1+
8
SHD2
CN17 1394 CONN
TPB0 32
CN18
1 2 3 5 6 7 8
HEADER_2X5_9_Shield
4
10
X
9
1394VCC
1394D0-
SHD3
1394D1-
SHD1
1 3 5 7
12
TPB1_L
BC747
0.10uF
C0603
2 1
EC76
470uF/NC
*
16V, +/-20%
CE35D80H200
TPA1J_L TPA1_L TPB1J_L
TPB0J 32
TPA0J 32
TPA0 32
D21
12V_SYS
B320B
TPA1J 32 TPA1 32 TPB1J 32
TPB1 32
FB48
21
FB L0805 60 Ohm
TECHNOLOGY COPR.
Title
Document Number Re v
8
7
6
5
4
3
Date: Sheet
1394 I/O
2
A
of
39 48Sunday, September 05, 2004
1
5
DCCBBAA
3D3V_SB
BC598
4.7uF
*
*
10V, Y5V, +80%/-20%
C0805
D
118 119 120 121 122 123 124 125
126 127 128
1 2 3 5 6
DCD1# RI1# CTS1# DTR1#/JP1 RTS1#/JP2 DSR1# SOUT1/JP3 SIN1
DCD2# RI2# CTS2# DTR2#/JP4 RTS2# DSR2# SOUT2/JP5 SIN2
COM
DCDJ144
RIJ144 CTSJ144 DTRJ144 RTSJ144
DSRJ144
TD144 RD144
DTRJ1 RTSJ1
TD1
DTRJ2
TD2
VBAT
BC599
0.1uF/NC
C0603
4
5V_SB
76
VBAT
5V_SYS 5V_SYS
77
4
35
99
VCC
VCC
VCCH
VCC
BC600
0.1uF
*
C0603
BC601
0.1uF
*
C0603
STB# AFD#
ERR# SLIN#
ACK# BUSY
SLCT
PD7 PD6 PD5 PD4 PD3 PD2 PD1 PD0
INIT#
3
BC602
0.1uF/NC
*
C0603
U22
PRPD7
116
PRPD6
115
PRPD5
114
PRPD4
113
PRPD3
112
PRPD2
111
PRPD1
110
PRPD0
109
PSTB#
108
PAFD#
107
PRERR#
106
PINIT#
105
PSLIN#
104
PACK#
103
PBUSY
102
PE
101
PE
100
PRPD[0..7]
PSTBJ 44 PAFDJ 44 PRERRJ 44 PINITJ 44 PSLINJ 44 PACKJ 44 PBUSY 44 PE 44
PRPD[0..7] 44
R446 22
PSLCT
2
Print Port
PSLCT 44
DTRJ2 TD1 RTSJ1 DTRJ1
POWER ON TRAPS
RN69
1
*
3 5 7 8
2.2K
+/-5%
8P4R0603
1
5V_SYS
2 4 6
ISA
LPC
FD0
FD[0..7]43
FA[0..17]43
FRDJ43 FCSJ43 FWEJ43
LAD[0..3]26
CK_33M_SIO19
LAD0 LAD1 LAD2 LAD3
LDRQJ26
SIRQ26
PCIRSTJ024,25,29,30,31
LFRAMEJ26
CK_48M_SIO19
THERMJ26 SIOSPKR45
FD1 FD2 FD3 FD4 FD5 FD6 FD7
FA0 FA1 FA2 FA3 FA4 FA5 FA6 FA7 FA8 FA9 FA10 FA11 FA12 FA13 FA14 FA15 FA16 FA17
LDRQJ SIRQ
CK_48M_SIO
5
7 8
9 10 11 12 13 14
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33
34 47 48
42
38 39 40 41
36 37 45 46
44
49 50 51 52
53 54 55 56
FD0/GP10 FD1/GP11 FD2/GP12 FD3/GP13 FD4/GP14 FD5/GP15 FD6/GP16 FD7/GP17
FA0/GP20 FA1/GP21 FA2/GP22 FA3/GP23 FA4/GP24 FA5/GP25 FA6/GP26 FA7/GP27 FA8/GP30 FA9/GP31 FA10/GP32 FA11/GP33 FA12/GP34 FA13/GP35 FA14/GP36 FA15/GP37 FA16/GP50 FA17/GP51
FRD#/GP52 FCS#/GP53 FWE#/GP54
PCICLK
LAD0 LAD1 LAD2 LAD3
LDRQ# SERIRQ LRESET# LFRAME#
CLKIN
JSACX/GP40 JSACY/GP41 JSAB1/GP42 JSAB2/GP43
JSBCX/GP44 JSBCY/GP45 JSBB1/GP46 JSBB2/GP47
ITE8705
GNDD1
GND
GNDA
86
4
GNDD2
15
43
117
GNDD3
67
VIN0 VIN1 VIN2 VIN3 VIN4 VIN5 VIN6 VIN7
VREF
TMPIN1 TMPIN2 TMPIN3
CIRRX/GP67 CIRTX/GP66
IRRX/GP65 IRTX/GP64
PME#/GP63
FAN_CTL3/GP62 FAN_CTL2/GP61 FAN_CTL1/GP60
G/FA18/FAN_TAC3
GP56/FAN_TAC2 GP55/FAN_TAC1
DSKCHG#
WPT#
INDEX#
TRK0#
RDATA#
WGATE#
HDSEL#
STEP#
DIR#
WDATA#
DRVB# DRVA# MTRB# MTRA#
DENSEL#
98 97 96 95 94 93 92 91
90
89 88 87
85 84
83 82
81
80 79 78
75 74 73
72 71 70 69 68 66 65 64 63 62 61 60 59 58 57
ITE8705
3
VIN0 VIN1
VIN2
SIOVREF
IRRX IRTX
PMEJ 24,26,29,30,31
PN74
FA18 43 FAN_TAC2 42 FAN_TAC1 42
DSKCHGJ 43 WPJ 43 INDEXJ 43 TRK0J 43 RDATAJ 43 WGATEJ 43 HEADJ 43 STEPJ 43 DIRJ 43 WDJ 43 DSBJ 43 DSAJ 43 MOBJ 43 MOAJ 43 RWCJ 43
VIN0 42 VIN1 42
VIN2 42 VIN3 42
SIOVREF 42
91 TMPIN3
TMPIN1 6,42 TMPIN2 42
87 COPEN
FLOPPY
1.If use LPC ROM, pull down S4 ~ S7 and pull down S8 with 2.2Kohm.
2.If use Legacy 2MB flash rom, pull high S4 ~ S7 and pull down S8 with 2.2Kohm.
3.If use Legacy 4MB flash rom, pull high S4 ~ S7 and pull high S8 with 2.2Kohm.
ITE8705 POWER ON TRAP
S8
1-2 : 4M FLASH ROM ENABLE
2-3 : PIN 75 IS FAN_TAC3
5V_SYS
IR CONNECTOR
IRRX
IRTX
Title
Document Number Re v
Date: Sheet
2
TD2
(PIN 75 IS FA18)
HEADER_1X5_2/NC
ITE8705GX
R448 2.2K/NC
R449 2.2K
IR
CN8
1 3
4 5
TECHNOLOGY COPR.
40 48Sunday, September 05, 2004
1
A
of
8
DCCBBAA
7
6
5
4
3
2
1
D
RN35
10K
8P4R0603
+/-5%
5V_SB
642
7 8
*
135
5V_SB
KBDAT
KBDAT26
KBCLK
KBCLK26
PMDAT26
PMCLK26
PMDAT
PMCLK
*
*
BC604
56pF/NC
C0603
BC607
56pF/NC
C0603
BC605
56pF/NC
*
50V, NPO, +/-5%
C0603
BC608
56pF/NC
*
50V, NPO, +/-5%
C0603
XKBDAT
XKBCLK
XPMDAT
XPMCLK
BC606
0.1uF/NC
*
25V, Y5V, +80%/-20%
C0603
*
11
16
BC609
0.1uF/NC
25V, Y5V, +80%/-20%
C0603
CONNECTOR VIEW
12 11
64213135
14
879
15
CN9 PS2-KBMS-2
UP DOWN
17
12
10
. .
10 9 . .
8 7 . .
56
..
4 3 . .
2 1 . .
NOTE: SIS IS NOT RESPONSIBLE FOR ANY ERRORS OR OMISSIONS IN THESE SCHEMATICS. THIS IS AN EXAMPLE ONLY.
TOP VIEW
12 11 . .
. . . .
10 8 7 9
6 5 . .
. . . .
4 2 1 3
Title
Document Number Re v
8
7
6
5
4
3
Date: Sheet
Keyboard Mouse
2
TECHNOLOGY COPR.
of
41 48Sunday, September 05, 2004
1
A
8
DCCBBAA
7
6
5
4
3
2
1
Voltage Monitor
3D3V_SYS 12V_SYS
5V_SYSVCCP
FAN Input and Output
D
R456
R457
10K
10K
+/-5%
+/-5%
R0603
R0603
VIN040 VIN140
VIN240 VIN340
R465 10K
+/-5%
R0603
DUMMY
R458
6.8K
+/-5%
R0603
R466 10K
+/-5%
R0603
R459 30K
+/-5%
R0603
R467 10K
+/-5%
R0603
12V_SYS
12V_SYS
R464
21
4.7K
+/-5%
R0603
FAN_TAC240
R468 22 R527
10K
+/-5%
R0603
BC610
0.1uF
*
25V, Y5V, +80%/-20%
C0603
DUMMY
D17 1N4148W/NC
Fan Header 1 For CPU
3 2 1
CONN3(FAN3P)
CN10
4
CHECK FAN PCB FOOTPRINT
Temperature Monitor
Choosing method of measuring temperature by either thermistor or diode
SIOVREF40
BC615
0.1uF/NC
*
C0603
TMPIN240 TMPIN16,40
BC617
*
0.1uF/NC
C0603
8
R475 10K
+/-1%
R0603
*
RT1
T
10K
+/-1%
R0603
7
For CPU
BC619
3.3nF
*
16V, NPO, +/-5%
C0603
6
R477 30K
+/-1%
R0603
JP19
SHORT
12V_SYS
21
R474
4.7K
+/-5%
R0603
R529 10K
+/-5%
R0603
R528 22
BC616
0.1uF
*
25V, Y5V, +80%/-20%
C0603
DUMMY
3
FAN_TAC140
THERMDA 6,40
12
THERMDC 6
5
4
D18 1N4148W/NC
Title
Document Number Re v
Date: Sheet
12V_SYS
FAN HW Monitor
2
check footprint
CN11
3
4 2 1
CONN3(FAN3P)
TECHNOLOGY COPR.
42 48Sunday, September 05, 2004
A
of
1
8
DCCBBAA
7
6
5
4
3
2
1
R480 0/NC
+/-5%
R0603
FA0 FA1 FA2 FA3 FA4 FA5 FA6 FA7 FA8 FA9 FA10 FA11 FA12 FA13 FA14 FA15 FA16 FA17
BIOSVCC
5V_SYS
R481 0
+/-5%
R0603
32 12 11 10
27 26 23 25
28 29
30 22 24
31 16
U23
VCC A0 A1 A2
9
A3
8
A4
7
A5
6
A6
5
A7 A8 A9 A10 A11
4
A12 A13 A14
3
A15
2
A16 A17 CE OE
1
VPP PGM GND
PLCC-32-SKT
BIOSVCC
FD3
FD2
6
FD1
4
FD0
2
FD7
O0 O1 O2 O3 O4 O5 O6 O7
FD1
14
FD2
15
FD3
17
FD4
18
FD5
19
FD6
20
FD7
21
5V_SYS
FD0
13
FD6 FD5 FD4
6 4 2
RN37
78
4.7K
5
+/-5%
3
*
8P4R0603
1
RN38
78
4.7K
5
+/-5%
3
*
8P4R0603
1
*
BC680
0.1uF
3D3V_SYS
D
FA1840 FWEJ40
ISA INTERFACE ROM
FD[0..7]40
FA[0..17]40
BIOSVCC
R482
8.2K
+/-5%
R0603
FAN_TAC3
R484 0
DUMMY
FCSJ
FCSJ40
FRDJ
FRDJ40
FD[0..7] FA[0..17]
R485 330
FCSJ FRDJ
*
135
642
7 8
RN39
330
8P4R0603
+/-5%
RWCJ 40
INDEXJ 40 MOAJ 40 DSBJ 40 DSAJ 40 MOBJ 40 DIRJ 40 STEPJ 40 WDJ 40 WGATEJ 40 TRK0J 40 WPJ 40 RDATAJ 40
HEADJ 40
DSKCHGJ 40
CN13
1
1
3
3
5
5
7
7
9
9
11
11
13
13
15
15
17
17
19
19
21
21
23
23
25
25
27
27
29
29
31
31
33
33
CONN34 (FDD)
FDC
10 12 14 16 18 20 22 24 26 28 30 32 34
R486 330
+/-5%
R0603
2
2
4
4
6
6
8
8
10 12 14 16 18 20 22 24 26 28 30 32 34
TECHNOLOGY COPR.
Title
Document Number Re v
8
7
6
5
4
3
Date: Sheet
2
Index
A
of
43 48Sunday, September 05, 2004
1
A
B
C
D
E
5V_SYS
SLINJ INIT PERRJ AFDJ
PRINT PORT
COM_PORT_9
PSLCT PE PBUSY PACKJ P_D7 P_D6 P_D5 P_D4 P_D3 P_D2 P_D1 P_D0 STRBJ
10
1 6 2 7 3 8 4 9 5
11
PRPD[0..7]40
4 4
PSTBJ40
PAFDJ40
PINITJ40
PSLINJ40
PRERRJ40
PACKJ40
3 3
2 2
PBUSY40
PSLCT40
DCDJ140 DSRJ140
RTSJ140 CTSJ140
DTRJ140
PRPD[0..7]
PE40
RD140
TD140
RIJ140
PRPD3 PRPD2 PRPD1 PRPD0
PRPD7 PRPD6 PRPD5 PRPD4
RN40 33
1
*
3 5 7 8
RN45
1
*
3 5 7 8
33
+/-5%
8P4R0603
PACKJ PBUSY PPE PSLCT
2 4 6
2 4 6
RN46
1
*
3 5 7 8
2 4 6
33
+/-5%
8P4R0603
5V_SYS 12V_SYS
BC637
0.1uF/NC
*
25V, Y5V, +80%/-20%
C0603
20 19 18 17 16 15 14 13 12 11
COM1
U24
VCC ROUT1 ROUT2 ROUT3 DIN1 DIN2 ROUT4 DIN3 ROUT5 GND
GD75232
RIN1 RIN2
RIN3 DOUT1 DOUT2
RIN4 DOUT3
RIN5
V+
V-
RN41
2.7K
+/-5%
8P4R0603
1 2 3 4 5 6 7 8 9 10
-12V_SYS
642
*
135
7 8
12
12
12
12
BC620220pF/NC
BC621220pF/NC
BC622220pF/NC
BC638
0.1uF/NC
*
25V, Y5V, +80%/-20%
C0603
RIN11 RIN21 RIN31 DOUT11 DOUT21 RIN41 DOUT31 XRIJ1
BC640
0.1uF/NC
*
25V, Y5V, +80%/-20%
C0603
RN42
BC623220pF/NC
*
135
2.7K
+/-5%
8P4R0603
12
BC624220pF/NC
BC641
47pF
1 2
DUMMY
642
12
7 8
12
BC625220pF/NC
DUMMY
12
BC626220pF/NC
BC642
47pF
1 2
RN43
BC627220pF/NC
*
135
2.7K
+/-5%
8P4R0603
12
BC628220pF/NC
BC643
47pF
1 2
DUMMY
642
12
BC629220pF/NC
7 8
12
BC630220pF/NC
1 2
DUMMY
12
BC631220pF/NC
BC644
47pF
RN44
2.7K
DUMMY
1 2
135
12
BC645
47pF
642
*
12
BC632220pF/NC
BC633220pF/NC
NEAR CONN
7 8
12
BC634220pF/NC
BC646
47pF
1 2
DUMMY
12
BC635220pF/NC
12
12
BC636220pF/NC
1 2
DUMMY
R487
2.7K
BC647
47pF
PERRJ AFDJ INIT SLINJ
STRBJ P_D0 P_D1 P_D2 P_D3 P_D4 P_D5 P_D6 P_D7
1 2
DUMMY
BC648
47pF
COM1
13 25 12 24 11 23 10 22
21 20 19 18 17 16 15 14
CN14
9 8 7 6 5 4 3 2 1
PRNT25-M
26 27 28
XRIJ1
RING
RING26
BY EXPERIENCED
D11
1N4148W
*
21
C0603
100pF
BC639
DUMMY
R488 560K
+/-5%
R0603
R489 220K
+/-5%
R0603
1 1
TECHNOLOGY COPR.
Title
Document Number Re v
A
B
C
D
Date: Sheet
COM/PRT PORT
A
of
44 48Sunday, September 05, 2004
E
8
DCCBBAA
D
HDDLED37
RSTSWJ46
7
5V_SYS
R1156 330
+/-5%
R0603
HD_LED+ PLED+
12
BC662
0.1uF/NC
HD_LEDJ
1 2 3 5 7 8 9
6
3D3V_SYS
FP1
4 6
X
Header_2X5_10 Shield
G_LED
R1155 330
+/-5%
R0603
12
3D3V_SB
BC663
0.1uF
R1154 330
+/-5%
R0603
PWRBTNJ 26
5
4
SPKR26,38
SIOSPKR40
3
5V_SYS
R495 33
D13
2
3
B
Q39
1
BAT54C
MMBT3904
E C
2
R490 220
+/-5%
R0603
SPK
BC661
0.1uF
*
25V, Y5V, +80%/-20%
C0603
J7
1
1
3
3
4
4
Header_1X4_2
1
S1LED_GREEN26
R496 220
G_LED
RTC
NOTE!
1.The RTCVDD is 3V
3D3V_SB
2.Decoupling capacitor must be close to 96X RTCVDD pin.
3.RTC circuit must strictly follow SiS's recommended design SiS is not responsible for RTC problems from foreign designs.
D15
2
3
1K R500
Battery holder
2 1
8
CN16
BAT
1
BAT54C
BC664
1uF
*
10V, Y5V, +80%/-20%
C0603
7
CN15
3
3
2
2
1
1
HEADER_1X3
2-3: NORMAL 1-2: Clear CMOS
6
BC665
1uF
*
C0603
Decoupling Capacitor Place close to 96X
RTCVDD
BC666
15nF/NC
*
25V, Y5V, +80%/-20%
C0603
5
D16
2 1
1N4148W/NC
R499 10K
BC667
10uF
*
10V, Y5V, +80%/-20%
C1206
4
3D3V_SB
BATOK 26
D14
2 1
1N4148W/NC
R497 1K
R498 100K
+/-5%
R0603
AUXOK
EC56
22uF
2 1
CE20D50H110
AUXOK 13,26
TECHNOLOGY COPR.
Title
Document Number Re v
Date: Sheet
3
Power BTN/RTC Batt
2
A
of
45 48Sunday, September 05, 2004
1
5
4
3
2
1
5V_SB
D D
PSONJ26
C C
B B
PWRGOODMB
BC835
10uF/NC
*
6.3V, X5R, +/-20%
C1206
R501
8.2K
+/-5%
R0603
R516
4.7K/NC
+/-5%
R0603
-12V_SYS 3D3V_SYS
5V_SYS 12V_SYS5V_SB5V_SYS3D3V_SYS
12
BC668
0.1uF/NC
25V, Y5V, +80%/-20%
C0603
PWR1
12
BC669
0.1uF/NC
C0603
B
BC676
0.1uF
*
25V, Y5V, +80%/-20%
C0603
DUMMY
11
3.3V*
12
-12V
13
COM
14
PS-ON
15
COM
16
COM
17
COM
18
-5V
19
5V
20
5V
ATX Power 2X10
R1148
0
R0603
+/-5%
5V_SB 3D3V_SYS
R511
4.7K/NC
+/-5%
R0603
G
Q47 MMBT3904/NC
E C
G
3.3V*
3.3V* COM
COM COM
PW-OK
5VSB
12V
21
21
R512 100/NC
+/-5%
R0603
DS
Q46
2N7002/NC
3D3V_SYS
R518 100/NC
+/-5%
R0603
DS
Q49
2N7002/NC
1 2 3 4
5V
5 6
5V
7 8 9 10
R514 51K/NC
+/-5%
R0603
R520 51K/NC
+/-5%
R0603
12
12
BC670
0.1uF/NC
C0603
Increase PWRGOOD signal rising speed for avoid CPU can't weakup from S3/S4/S5 state issue.
TO south-bridge
PWRGD_SB 26
R515 10
RSTSWJ 45
+/-5%
R0603
TO north-bridge
PWRGD_NB 13
5V_SYS
BC671
0.1uF/NC
C0603
R119
8.2K
+/-5%
R0603
ATX_PWOK
The circuit generates PWRGOOD signal to CPU, Be s u re that the rising time of CPU PWRGOOD must be short than 200ns and delay > 3ms after Vcc_core stable.
VCCP
K7_PLL_PGD7
PWMOK9
R1158 1K/NC
ATX_PWOK
+/-5%
R0603
ATX_PWOK
PWMOK
R510 20K/NC
+/-5%
R0603
R507
5.6K
+/-5%
R0603
DUMMY
R508 3K/NC
+/-5%
R0603
R513 10K/NC
+/-5%
R0603
R517
4.7K
+/-5%
R0603
R519 10K
+/-5%
R0603
*
*
*
R502
4.7K
+/-5%
R0603
Q44
MMBT3904/NC BC674
1uF/NC
C0603
Q45
MMBT3904/NC BC675
47nF/NC
25V, Y5V, +80%/-20%
C0603
Q48
MMBT3904 BC677
0.1uF
25V, Y5V, +80%/-20%
C0603
DUMMY
R1149 0
+/-5%
R0603
VCCP5V_SB
R505 100
+/-5%
R0603
PWRGOOD
DS
Q43
BC672
G
3D3V_SYS
R530 100
+/-5%
R0603
DS
Q52
G
2N7002
*
2N7002
PWRGOODMB
BC681
270pF
*
50V, NPO, +/-10%
C0603
270pF
50V, NPO, +/-10%
C0603
TO CPU
PWRGOOD 7
A A
5
R1150
0
R0603
+/-5%
Title
Document Number Re v
4
3
2
Date: Sheet
Power Connector
A
of
46 48Sunday, September 05, 2004
1
TECHNOLOGY COPR.
5
D D
C C
4
3
2
1
B B
A A
TECHNOLOGY COPR.
Title
Document Number Re v
5
4
3
2
Date: Sheet
GPIO Setting
A
of
47 48Sunday, September 05, 2004
1
5
D D
C C
4
3
2
1
B B
A A
TECHNOLOGY COPR.
Title
Document Number Re v
5
4
3
2
Date: Sheet
Change List
A
of
48 48Sunday, September 05, 2004
1
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