Fairchild Semiconductor MM74HCT05MTC, MM74HCT05CW, MM74HCT05SJX, MM74HCT05MTCX, MM74HCT05MX Datasheet
...
February 1984
Revised February 1999
MM74HCT05 Hex Inverter (Open Drain)
© 1999 Fairchild Semiconductor Corporation DS005358.prf www.fairchildsemi.com
MM74HCT05
Hex Inverter (Open Drain)
General Description
The MM74HCT05 is a logic function fabricated by using
advanced silicon-gate CMOS technology, which provides
the inherent benefit s of CMOS—low qui escent power and
wide power supply range. The device is also inp ut an d ou tput characteristic and pinout compatible with standard
DM74LS logic families. The MM74HCT05 open drain Hex
Inverter requires the ad dition of an externa l resist or to pe rform a wire-NOR function.
All inputs are protect ed from static discharge dam age by
internal diodes to V
CC
and ground.
MM74HCT devices are intended to i nterface between TTL
and NMOS components and standard CMOS devices.
These parts are also plug-in replacements for LS-TTL
devices and can be used to redu ce power consumption in
existing designs.
Features
■ Open drain for wire-NOR function
■ LS-TTL pinout and threshold compatible
■ Fanout of 10 LS-TTL loads
■ Typical propagation delays:
t
PLH
(with 1 kΩ resistor) 10 ns
t
PHL
(with 1 kΩ resistor) 8 ns
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Pin Assignments for DIP, SOIC, SOP and TSSOP
Top View
Logic Diagram
Typical Application
Order Number Package Number Package Description
MM74HCT05M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow
MM74HCT05SJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
MM74HCT05MTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
MM74HCT05N N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
www.fairchildsemi.com 2
MM74HCT05
Absolute Maximum Ratings(Note 1)
(Note 2)
Recommended Operating
Conditions
Note 1: Absolute Maximum Ratings are those values beyond which dam-
age to the device may occur.
Note 2: Unless otherwise specified all voltages are referenced to gro und.
Note 3: Power Dissipation temperat ure derat ing — plas tic “N” p ackage: −
12 mW/°C from 65 °C to 85°C.
DC Electrical Characteristics
(V
CC
= 5V ± 10%,unless otherwise specified)
Note 4: This is measured per input with all oth er inputs held at VCC or ground.
Supply Voltage (VCC) −0.5 to +7.0V
DC Input Voltage (V
IN
) −1.5 to V
CC
+1.5V
DC Output Voltage (V
OUT
) −0.5 to V
CC
+0.5V
Clamp Diode Current (I
IK
, IOK) ± 20 mA
DC Output Current, per pin (I
OUT
) ± 25 mA
DC V
CC
or GND Current, per pin (ICC) ± 50 mA
Storage Temperature Range (T
STG
) −65°C to +150°C
Power Dissipation (P
D
)
(Note 3) 600 mW
S.O. Package only 500 mW
Lead Temperature (T
L
)
(Soldering 10 seconds) 260°C
Min Max Units
Supply Voltage (V
CC
)4.55.5V
DC Input or Output Voltage
(V
IN
, V
OUT
)0V
CC
V
Operating Temperature Range (T
A
) −40 +85 °C
Input Rise or Fall Times
(t
r
, tf)500ns
Symbol Parameter Conditions
TA = 25°C
TA = −40 to 85°C
Units
Typ Guaranteed Limits
V
IH
Minimum HIGH Level 2.0 2.0 V
Input Voltage
V
IL
Maximum LOW Level 0.8 0.8 V
Input Voltage
V
OL
Maximum LOW VIN = V
IH
Level Voltage |I
OUT
| = 20 µA00.10.1V
|I
OUT
| = 4.0 mA, VCC = 4.5V 0.2 0.26 0.33 V
|I
OUT
| = 4.8 mA, VCC = 5.5V 0.2 0.26 0.33 V
I
IN
Maximum Input V
IN
= VCC or GND, ± 0.1 ± 1.0 µA
Current VIH or V
IL
I
LKG
Maximum HIGH Level VIN = VIH or VIL, V
OUT
= V
CC
0.5 5.0 µA
Output Leakage
Current
I
CC
Maximum Quiescent VIN = VCC or GND 2.0 20 µA
Supply Current I
OUT
= 0µA
VIN = 2.4V or 0.5V 0.3 0.4 mA
(Note 4)
Loading...