Fairchild Semiconductor KSD569, KSD568 Datasheet
KSD568/569
Low Frequency Power Amplifier
• Low Speed Switching Industrial Use
• Complement to KSB707/708
KSD568/569
1
TO-220
1.Base 2.Collector 3.Emitter
NPN Epitaxial Silicon Transistor
Absolute Maximum Ratings
Symbol Parameter Value Units
V
CBO
V
CEO
V
EBO
I
C
ICP
IB
P
C
PC
T
J
T
STG
* PW≤300µs, Duty Cycle≤10%
Collector-Base Voltage 100 V
Collector-Emitter Voltage : KSD568
Emitter-Base Voltage 7 V
Collector Current (DC) 7 A
*Collector Current (Pulse) 15 A
Base Current 3.5 A
Collector Dissipation (TC=25°C) 40 W
Collector Dissipation (Ta=25°C) 1.5 W
Junction Temperature 150 °C
Storage T emperature - 55 ~ 150 °C
Electrical Characteristics
Symbol Parameter Tes t Condition Min. Max. Units
I
CBO
I
EBO
h
FE1
h
FE2
(sat) *Collector-Emitter Saturation Voltage IC = 5A, IB = 0.5A 0.5 V
V
CE
(sat) *Base-Emitter Saturat ion Voltage IC = 5A, IB = 0.5A 1.5 V
V
BE
* Pulse Test: PW≤350µs, Duty Cycle≤2%
Collector Cut-off Current V
Emitter Cut-off Current V
*DC Current Gain V
TC=25°C unless otherwise noted
: KSD569
TC=25°C unless otherwise noted
= 80V, IE = 0 10 µA
CB
= 5V, IC = 0 10 µA
EB
= 1V , IC = 3A
CE
V
= 1V , IC = 5A
CE
60
80
4020200
V
V
hFE Classification
Classification R O Y
h
FE1
©2000 Fairchild Semiconductor International Rev. A, February 2000
40 ~ 80 60 ~ 120 100 ~ 200
Typical Characteristics
KSD568/569
1.0
IB = 18mA
IB = 16mA
0.8
IB = 14mA
IB = 12mA
0.6
0.4
[A], COLLECTOR CURRENT
0.2
C
I
0.0
0 1020304050
IB = 10mA
IB = 8mA
IB = 6mA
IB = 4mA
IB = 2mA
VCE[V], COLLECTOR-EMITTER VOLTAGE
Figure 1. Static Characteristic Figure 2. DC current Gain
10
1
0.1
(sat)[V], SATURATION VOLTAGE
CE
(sat), V
BE
V
0.01
0.01 0.1 1 10
VBE(sat)
VCE(sat)
IC[A], COLLECTOR CURRENT
IC = 10 I
B
1000
VCE = 1V
100
, DC CURRENT GAIN
FE
h
10
0.01 0.1 1 10
IC[A], COLLECTOR CURRENT
S/b LIMITED
S/b LIMITED
160
140
120
100
DERATING
C
80
60
dT(%), I
40
20
0
0 25 50 75 100 125 150 175 200
TC[oC], CASE TEMPERATURE
Figure 3. Base-Emitter Saturation Voltage
Collector-Emitter Saturation Voltage
100
10
DISSPATION LIMITED
1
0.1
[A], COLLECTOR CURRENT
C
I
0.01
1 10 100 1000
VCE[V], COLLECTOR-EMITTER VOLTAGE
Figure 5. Forward Bias Safe Operating Area Figure 6. Power Derating
©2000 Fairchild Semiconductor International
100ms
300us
1ms
10ms
S/b LIMITED
100us
50us
Figure 4. Derating Curve Of Safe Operating Areas
50
45
40
35
30
25
20
15
10
[W], POWER DISSIPATION
C
P
5
0
0 25 50 75 100 1 25 150 175
TC[oC], CASE TEMPERATURE
Rev. A, February 2000
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