Fairchild Semiconductor KSD560 Datasheet

Low Frequency Power Amplifier
• Low Speed Switching Industrial Use
• Complement to KSB601
KSD560
KSD560
1
TO-220
1.Base 2.Collector 3.Emitter
NPN Epitaxial Silicon Darlington Transistor
Absolute Maximum Ratings
Symbol Parameter Value Units
V
CBO
V
CEO
V
EBO
I
C ICP IB
P
C
PC
T
J
T
STG
* PW10ms, Duty Cycle≤50%
Collector-Base Voltage 150 V Collector-Emitter Voltage 100 V Emitter-Base Voltage 7 V Collector Current (DC) 5 A *Collector Current (Pulse) 8 A Base Current 0.5 A Collector Dissipation (Ta=25°C) 1.5 W Collector Dissipation (TC=25°C) 30 W Junction Temperature 150 °C Storage T emperature - 55 ~ 150 °C
Symbol Parameter T est Condition Min. T yp. Max. Units
I
CBO
h
FE1
h
FE2
(sat) *Collector-Emitter Saturation Voltage IC = 3A, IB = 3mA 0.9 1.5 V
V
CE
(sat) *Base-Emitter Saturat ionVoltage IC = 3A, IB = 3mA 1.6 2 V
V
BE
t
ON
t
STG
f
T
* Pulse Test: PW≤350µs, Duty Cycle2% Pulsed
Collector Cut-off Current V *DC Current Gain V
Turn ON Time V Storage Time 3.5 µs Fall Time 1.2 µs
TC=25°C unless otherwise noted
TC=25°C unless otherwise noted
= 100V, IE = 0 1 µA
CB
= 2V, IC = 3A
CE
V
= 2V, IC = 5A
CE
=⋅ 50V, IC = 3A
CC
= - IB2 = 3mA
I
B1
= 16.7
R
L
2K
500
6K 15K
1 µs
hFE Classification
Classification R O Y
h
FE1
©2000 Fairchild Semiconductor International Rev. A, February 2000
2000 ~ 5000 3000 ~ 7000 5000 ~ 15000
Typical Characteristics
KSD560
= 0.7mA
B
I
IB = 0.5mA
IB = 0.4mA
IB = 0.35mA
IB = 0.3mA
5
= 1.0mA
B
4
3
2
[A], COLLECTOR CURRENT
1
C
I
0
012345
I
VCE[V], COLLECTOR-EMITTER VOLTAGE
Figure 1. Static Characteristic Figure 2. DC current Gain
10
VBE(sat)
1
(sat)[V], SATURATION VOLTAGE
CE
(sat), V
BE
V
0.1
0.1 1 10
VCE(sat)
IC[A], COLLECTOR CURRENT
IC = 1000 I
B
10000
VCE = 2V
1000
100
, DC CURRENT GAIN
FE
h
10
0.01 0.1 1 10
IC[A], COLLECTOR CURRENT
10
PW=100us
300us
1ms
100ms
3ms
10ms
1
0.1
[A], COLLECTOR CURRENT
C
I
0.01 1 10 100 1000
VCE[V], COLLECTOR-EMITTER VOLTAGE
Figure 3. Base-Emitter Saturation Voltage
Collector-Emitter Saturation Voltage
40
35
30
25
20
15
10
[W], POWER DISSIPATION
C
P
5
0
0 25 50 75 100 125 150 175
TC[oC], CASE TEMPERATURE
Figure 5. Power Derating
©2000 Fairchild Semiconductor International
Figure 4. Safe Operating Area
Rev. A, February 2000
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