Fairchild Semiconductor FDP7030L, FDB7030L Datasheet
FDP7030L / FDB7030L
N-Channel Logic Level Enhancement Mode Field Effect Transistor
General Description Features
April 1998
These N-Channel logic level enhancement mode power field
effect transistors are produced using Fairchild's proprietary,
high cell density, DMOS technology. This very high density
process is especially tailored to minimize on-state resistance.
These devices are particularly suited for low voltage
applications such as DC/DC converters and high efficiency
switching circuits where fast switching, low in-line power
loss, and resistance to transients are needed.
100 A, 30 V. R
R
Critical DC electrical parameters specified at elevated
temperature.
Rugged internal source-drain diode can eliminate the need
for an external Zener diode transient suppressor.
High density cell design for extremely low R
= 0.007 Ω @ VGS=10 V
DS(ON)
= 0.010 Ω @ VGS=5 V.
DS(ON)
.
DS(ON)
175°C maximum junction temperature rating.
_________________________________________________________________________________
D
G
S
Absolute Maximum Ratings T
= 25°C unless otherwise noted
C
Symbol Parameter FDP7030L FDB7030L Units
V
DSS
V
GSS
I
D
Drain-Source Voltage 30 V
Gate-Source Voltage - Continuous ±20 V
Drain Current - Continuous (Note 1) 100 A
75
- Pulsed (Note 1) 300
P
D
Total Power Dissipation @ TC = 25°C 125 W
Derate above 25°C 0.83 W/°C
TJ,T
T
L
Operating and Storage Temperature Range -65 to 175 °C
STG
Maximum lead temperature for soldering purposes,
275 °C
1/8" from case for 5 seconds
THERMAL CHARACTERISTICS
R
JC
θ
R
JA
θ
© 1998 Fairchild Semiconductor Corporation
Thermal Resistance, Junction-to-Case 1.2 °C/W
Thermal Resistance, Junction-to-Ambient 62.5 °C/W
FDP7030L Rev.D1
Electrical Characteristics (T
= 25°C unless otherwise noted)
C
Symbol Parameter Conditions Min Typ Max Unit
DRAIN-SOURCE AVALANCHE RATINGS (Note 1)
W
DSS
I
AR
Single Pulse Drain-Source Avalanche Energy VDD = 15 V, ID = 38 A 200 mJ
Maximum Drain-Source Avalanche Current 38 A
OFF CHARACTERISTICS
BV
∆BV
I
DSS
DSS
DSS
Drain-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
/∆T
J
Zero Gate Voltage Drain Current
VGS = 0 V, ID = 250 µA
ID = 250 µA, Referenced to 25 oC
VDS = 24 V, V
GS
= 0 V
30 V
36
mV/oC
10 µA
TJ =125 °C 1 mA
I
GSSF
I
GSSR
Gate - Body Leakage, Forward
VGS = 20 V, VDS = 0 V
Gate - Body Leakage, Reverse VGS = -20 V, VDS = 0 V -100 nA
100 nA
ON CHARACTERISTICS (Note 2)
V
∆V
R
GS(th)
GS(th)
DS(ON)
Gate Threshold Voltage
Gate Threshold Voltage Temp.Coefficient ID = 250 µA, Referenced to 25 oC -5 mV/oC
/∆T
J
VDS = VGS, ID = 250 µA
Static Drain-Source On-Resistance VGS = 10 V, ID = 50 A 0.006 0.007
1 1.5 2 V
Ω
TJ = 125°C 0.009 0.011
0.009 0.01
50 S
I
g
D(on)
VGS = 5 V, ID = 40 A
On-State Drain Current VGS = 10 V, VDS = 10 V 60 A
FS
Forward Transconductance
VDS = 10 V, ID = 50 A
DYNAMIC CHARACTERISTICS
C
iss
C
oss
C
rss
Input Capacitance VDS = 15 V, VGS = 0 V,
Output Capacitance 1290 pF
f = 1.0 MHz
Reverse Transfer Capacitance 420 pF
2150 pF
SWITCHING CHARACTERISTICS (Note 2)
t
t
t
t
Q
Q
Q
D(on)
r
D(off)
f
Turn - On Delay Time
Turn - On Rise Time 160 225 nS
Turn - Off Delay Time 70 95 nS
VDD = 15 V, ID = 75 A,
VGS = 10 V, R
R
= 10 Ω
GS
GEN
= 6 Ω
Turn - Off Fall Time 140 195 nS
g
gs
gd
Total Gate Charge V
Gate-Source Charge 12 nC
Gate-Drain Charge 18 nC
= 12 V
DS
ID = 50 A, VGS= 4.5 V
10 20 nS
35 50 nC
DRAIN-SOURCE DIODE CHARACTERISTICS
I
S
ISM
V
SD
Notes
1. Calculated continuous current based on maximum allowable junction temperature. Actual maximum continuous current limited by package constraints to 75A.
2. Pulse Test: Pulse Width < 300 µs, Duty Cycle < 2.0%.
Maximum Continuos Drain-Source Diode Forward Current (Note 1) 100 A
Maximum Pulsed Drain-Source Diode Forward Current (Note 2) 300 A
Drain-Source Diode Forward Voltage
VGS = 0 V, IS = 50 A (Note 2)
TJ = 125°C
1 1.3 V
0.85 1.1
FDP7030L Rev.D1
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