Fairchild Semiconductor DM74LS139SJX, DM74LS139SJ, DM74LS139N, DM74LS139MX, DM74LS139M Datasheet
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© 2000 Fairchild Semiconductor Corporation DS006391 www.fairchildsemi.com
August 1986
Revised March 2000
DM74LS138 • DM74LS139 Decoder/Demultiplexer
DM74LS138 • DM74LS139
Decoder/Demultiplexer
General Description
These Schottky-clamped circuits are designed to be used
in high-performance memory-decoding or data-routing
applications, requiring very short propagatio n delay times.
In high-performance memo ry systems these decoders can
be used to minimize the effects of system decoding. When
used with high-speed me mories, the delay tim es of these
decoders are usually less th an the typical access time of
the memory. This means that the effective system delay
introduced by the decoder is negligible.
The DM74LS138 decodes one-of-eight lines, based upon
the conditions at the three binary select inputs and the
three enable inputs. Two active-low and one active-high
enable inputs reduce the need fo r external gate s or inverters when expanding. A 24-line decoder can be implemented with no externa l inverters, and a 32-line de coder
requires only one inverter. An enable input can be used as
a data input for demultiplexing applications.
The DM74LS139 comprises tw o separate two-line-to- fourline decoders in a single package. The active-low enable
input can be used as a data lin e in demul tiplexi ng a pplications.
All of these decoders/dem ultiplexers feature fu lly buffered
inputs, presenting on ly one normalized load to its driving
circuit. All inputs are clamped with high-performance
Schottky diodes to suppress lin e-ringing and simplify system design.
Features
■ Designed specifically for high speed:
Memory decoders
Data transmission systems
■ DM74LS138 3-to-8-li ne decoder s incorpor ates 3 enable
inputs to simplify cascading and/or data reception
■ DM74LS139 contains tw o fully independent 2-t o-4-line
decoders/demultiplex ers
■ Schottky clamped for high performance
■ Typical propagation delay (3 levels of logic)
DM74LS138 21 ns
DM74LS139 21 ns
■ Typical power dissipation
DM74LS138 32 mW
DM74LS139 34 mW
Ordering Code:
Devices also availab le in Tape and Reel. Specify by appending th e s uffix let t er “X” to the ordering code.
Order Number Package Number Package Description
DM74LS138M M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
DM74LS138SJ M16D 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
DM74LS138N N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
DM74LS139M M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
DM74LS139SJ M16D 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
DM74LS139N N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
www.fairchildsemi.com 2
DM74LS138 • DM74LS139
Connection Diagrams
DM74LS138 DM74LS139
Function Tables
DM74LS138 DM74LS139
H = HIGH Level
L = LOW Level
X = Don’t Care
Note 1: G2 = G2A + G2B
Logic Diagrams
DM74LS138 DM74LS139
Inputs
Outputs
Enable Select
G1G2 (Note 1)CBAYOY1Y2Y3Y4Y5Y6Y7
X H XXXHHHHHHHH
L X XXXHHHHHHHH
H L LLLL HHHHHHH
H L LLHHLHHHHHH
H L LHLHHLHHHHH
H L LHHHHHLHHHH
H L HLLHHHHLHHH
H L HLHHHHHHLHH
H L HHLH HHHHHLH
H L HHHHHHHHHHL
Inputs
Outputs
Enable Select
G BAY0Y1Y2Y3
HXXHHHH
LLLLHHH
LLHHLHH
LHLHHLH
LHHHHHL
3 www.fairchildsemi.com
DM74LS138 • DM74LS139
Absolute Maximum Ratings(Note 2)
Note 2: The “Absolute Maximum Ratings ” are those val ues beyond w hich
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The “Recommend ed O peratin g Cond itions” t able w ill defin e the condition s
for actual device operation.
DM74LS138 Recommended Operating Conditions
DM74LS138 Electrical Characteristics
over recommended operating free air temperature range (unless otherwise noted)
Note 3: All typicals are at VCC = 5V, TA = 25°C.
Note 4: Not more than one output should be shorted at a time, and the duration should not exceed one second.
Note 5: I
CC
is measured with all out puts enabled and OPEN.
DM74LS138 Switching Characteristics
at VCC = 5V and TA = 25°C
Supply Voltage 7V
Input Voltage 7V
Operating Free Air Temperature Range 0°C to +70°C
Storage Temperature Range −65°C to +150°C
Symbol Parameter Min Nom Max Units
V
CC
Supply Voltage 4.75 5 5.25 V
V
IH
HIGH Level Input Voltage 2 V
V
IL
LOW Level Input Voltage 0.8 V
I
OH
HIGH Level Output Current −0.4 mA
I
OL
LOW Level Output Current 8 mA
T
A
Free Air Operating Temperature 0 70 °C
Symbol Parameter Conditions Min
Typ
Max Units
(Note 3)
V
I
Input Clamp Voltage VCC = Min, II = −18 mA −1.5 V
V
OH
HIGH Level Output Voltage VCC = Min, IOH = Max, VIL = Max, VIH = Min 2.7 3.4 V
V
OL
LOW Level VCC = Min, IOL = Max, VIL = Max, VIH = Min 0.35 0.5
V
Output Voltage IOL = 4 mA, VCC = Min 0.25 0.4
I
I
Input Current @ Max Input Voltage VCC = Max, VI = 7V 0.1 mA
I
IH
HIGH Level Input Current VCC = Max, VI = 2.7V 20 µA
I
IL
LOW Level Input Current VCC = Max, VI = 0.4V −0.36 mA
I
OS
Short Circuit Output Current VCC = Max (Note 4) −20 −100 mA
I
CC
Supply Current VCC = Max (Note 5) 6.3 10 mA
From (Input) Levels
RL = 2 kΩ
Symbol Parameter
To (Output) of Delay
CL = 15 pF CL = 50 pF Units
Min Max Min Max
t
PLH
Propagation Delay Time
Select to Output 2 18 27 ns
LOW-to-HIGH Level Output
t
PHL
Propagation Delay Time
Select to Output 2 27 40 ns
HIGH-to-LOW Level Output
t
PLH
Propagation Delay Time
Select to Output 3 18 27 ns
LOW-to-HIGH Level Output
t
PHL
Propagation Delay Time
Select to Output 3 27 40 ns
HIGH-to-LOW Level Output
t
PLH
Propagation Delay Time
Enable to Output 2 18 27 ns
LOW-to-HIGH Level Output
t
PHL
Propagation Delay Time
Enable to Output 2 24 40 ns
HIGH-to-LOW Level Output
t
PLH
Propagation Delay Time
Enable to Output 3 18 27 ns
LOW-to-HIGH Level Output
t
PHL
Propagation Delay Time
Enable to Output 3 28 40 ns
HIGH-to-LOW Level Output
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